| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | * memory fill offload engine support | 
|  | 3 | * | 
|  | 4 | * Copyright © 2006, Intel Corporation. | 
|  | 5 | * | 
|  | 6 | *      Dan Williams <dan.j.williams@intel.com> | 
|  | 7 | * | 
|  | 8 | *      with architecture considerations by: | 
|  | 9 | *      Neil Brown <neilb@suse.de> | 
|  | 10 | *      Jeff Garzik <jeff@garzik.org> | 
|  | 11 | * | 
|  | 12 | * This program is free software; you can redistribute it and/or modify it | 
|  | 13 | * under the terms and conditions of the GNU General Public License, | 
|  | 14 | * version 2, as published by the Free Software Foundation. | 
|  | 15 | * | 
|  | 16 | * This program is distributed in the hope it will be useful, but WITHOUT | 
|  | 17 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 
|  | 18 | * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for | 
|  | 19 | * more details. | 
|  | 20 | * | 
|  | 21 | * You should have received a copy of the GNU General Public License along with | 
|  | 22 | * this program; if not, write to the Free Software Foundation, Inc., | 
|  | 23 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | 
|  | 24 | * | 
|  | 25 | */ | 
|  | 26 | #include <linux/kernel.h> | 
|  | 27 | #include <linux/interrupt.h> | 
|  | 28 | #include <linux/mm.h> | 
|  | 29 | #include <linux/dma-mapping.h> | 
|  | 30 | #include <linux/async_tx.h> | 
|  | 31 |  | 
|  | 32 | /** | 
|  | 33 | * async_memset - attempt to fill memory with a dma engine. | 
|  | 34 | * @dest: destination page | 
|  | 35 | * @val: fill value | 
|  | 36 | * @offset: offset in pages to start transaction | 
|  | 37 | * @len: length in bytes | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 38 | * | 
|  | 39 | * honored flags: ASYNC_TX_ACK | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 40 | */ | 
|  | 41 | struct dma_async_tx_descriptor * | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 42 | async_memset(struct page *dest, int val, unsigned int offset, size_t len, | 
|  | 43 | struct async_submit_ctl *submit) | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 44 | { | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 45 | struct dma_chan *chan = async_tx_find_channel(submit, DMA_MEMSET, | 
| Dan Williams | 47437b2 | 2008-02-02 19:49:59 -0700 | [diff] [blame] | 46 | &dest, 1, NULL, 0, len); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 47 | struct dma_device *device = chan ? chan->device : NULL; | 
| Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 48 | struct dma_async_tx_descriptor *tx = NULL; | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 49 |  | 
| Dan Williams | 83544ae | 2009-09-08 17:42:53 -0700 | [diff] [blame] | 50 | if (device && is_dma_fill_aligned(device, offset, 0, len)) { | 
| Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 51 | dma_addr_t dma_dest; | 
| Dan Williams | 0403e38 | 2009-09-08 17:42:50 -0700 | [diff] [blame] | 52 | unsigned long dma_prep_flags = 0; | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 53 |  | 
| Dan Williams | 0403e38 | 2009-09-08 17:42:50 -0700 | [diff] [blame] | 54 | if (submit->cb_fn) | 
|  | 55 | dma_prep_flags |= DMA_PREP_INTERRUPT; | 
|  | 56 | if (submit->flags & ASYNC_TX_FENCE) | 
|  | 57 | dma_prep_flags |= DMA_PREP_FENCE; | 
| Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 58 | dma_dest = dma_map_page(device->dev, dest, offset, len, | 
| Dan Williams | d909b34 | 2008-02-02 19:30:14 -0700 | [diff] [blame] | 59 | DMA_FROM_DEVICE); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 60 |  | 
| Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 61 | tx = device->device_prep_dma_memset(chan, dma_dest, val, len, | 
| Dan Williams | d4c56f9 | 2008-02-02 19:49:58 -0700 | [diff] [blame] | 62 | dma_prep_flags); | 
| Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 63 | } | 
|  | 64 |  | 
|  | 65 | if (tx) { | 
| Dan Williams | 3280ab3e | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 66 | pr_debug("%s: (async) len: %zu\n", __func__, len); | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 67 | async_tx_submit(chan, tx, submit); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 68 | } else { /* run the memset synchronously */ | 
|  | 69 | void *dest_buf; | 
| Dan Williams | 3280ab3e | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 70 | pr_debug("%s: (sync) len: %zu\n", __func__, len); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 71 |  | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 72 | dest_buf = page_address(dest) + offset; | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 73 |  | 
|  | 74 | /* wait for any prerequisite operations */ | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 75 | async_tx_quiesce(&submit->depend_tx); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 76 |  | 
|  | 77 | memset(dest_buf, val, len); | 
|  | 78 |  | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 79 | async_tx_sync_epilog(submit); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 80 | } | 
|  | 81 |  | 
|  | 82 | return tx; | 
|  | 83 | } | 
|  | 84 | EXPORT_SYMBOL_GPL(async_memset); | 
|  | 85 |  | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 86 | MODULE_AUTHOR("Intel Corporation"); | 
|  | 87 | MODULE_DESCRIPTION("asynchronous memset api"); | 
|  | 88 | MODULE_LICENSE("GPL"); |