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Stepan Moskovchenko24cd8642011-11-29 13:07:53 -08001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#include <linux/init.h>
15#include <linux/ioport.h>
16#include <linux/platform_device.h>
17#include <linux/bootmem.h>
18#include <asm/mach-types.h>
19#include <mach/msm_bus_board.h>
Huaibin Yanga5419422011-12-08 23:52:10 -080020#include <mach/msm_memtypes.h>
Stepan Moskovchenko24cd8642011-11-29 13:07:53 -080021#include <mach/board.h>
22#include <mach/gpio.h>
23#include <mach/gpiomux.h>
24#include "devices.h"
Stepan Moskovchenko5a83dba2011-12-05 17:30:17 -080025#include "board-8960.h"
Stepan Moskovchenko24cd8642011-11-29 13:07:53 -080026
27#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
28#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 3) /* 4 bpp x 3 pages */
29#else
30#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 2) /* 4 bpp x 2 pages */
31#endif
32
33#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
34#define MSM_FB_EXT_BUF_SIZE (1920 * 1088 * 2 * 1) /* 2 bpp x 1 page */
35#elif defined(CONFIG_FB_MSM_TVOUT)
36#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
37#else
38#define MSM_FB_EXT_BUF_SIZE 0
39#endif
40
Huaibin Yang335f4012011-12-02 14:11:48 -080041#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
Stepan Moskovchenko24cd8642011-11-29 13:07:53 -080042/* width x height x 3 bpp x 2 frame buffer */
43#define MSM_FB_WRITEBACK_SIZE (1376 * 768 * 3 * 2)
44#define MSM_FB_WRITEBACK_OFFSET \
45 (MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE)
46#else
47#define MSM_FB_WRITEBACK_SIZE 0
48#define MSM_FB_WRITEBACK_OFFSET 0
49#endif
50
51#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
52/* 4 bpp x 2 page HDMI case */
53#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
54#else
55/* Note: must be multiple of 4096 */
56#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
57 MSM_FB_WRITEBACK_SIZE, 4096)
58#endif
59
Huaibin Yanga5419422011-12-08 23:52:10 -080060#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
61#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
62#else
63#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
64#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
65
66#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
67#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
68#else
69#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
70#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
71
Stepan Moskovchenko24cd8642011-11-29 13:07:53 -080072#define MDP_VSYNC_GPIO 0
73
74#define PANEL_NAME_MAX_LEN 30
75#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
76#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
77#define MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME "mipi_video_toshiba_wsvga"
78#define MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME "mipi_video_chimei_wxga"
79#define MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME "mipi_video_simulator_vga"
80#define MIPI_CMD_RENESAS_FWVGA_PANEL_NAME "mipi_cmd_renesas_fwvga"
81#define HDMI_PANEL_NAME "hdmi_msm"
82#define TVOUT_PANEL_NAME "tvout_msm"
83
84static int writeback_offset(void)
85{
86 return MSM_FB_WRITEBACK_OFFSET;
87}
88
89static struct resource msm_fb_resources[] = {
90 {
91 .flags = IORESOURCE_DMA,
92 }
93};
94
95static int msm_fb_detect_panel(const char *name)
96{
97 if (machine_is_msm8960_liquid()) {
98 if (!strncmp(name, MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME,
99 strnlen(MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME,
100 PANEL_NAME_MAX_LEN)))
101 return 0;
102 } else {
103 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
104 strnlen(MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
105 PANEL_NAME_MAX_LEN)))
106 return 0;
107
108#ifndef CONFIG_FB_MSM_MIPI_PANEL_DETECT
109 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
110 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
111 PANEL_NAME_MAX_LEN)))
112 return 0;
113
114 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
115 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
116 PANEL_NAME_MAX_LEN)))
117 return 0;
118
119 if (!strncmp(name, MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
120 strnlen(MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
121 PANEL_NAME_MAX_LEN)))
122 return 0;
123
124 if (!strncmp(name, MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
125 strnlen(MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
126 PANEL_NAME_MAX_LEN)))
127 return 0;
128#endif
129 }
130
131 if (!strncmp(name, HDMI_PANEL_NAME,
132 strnlen(HDMI_PANEL_NAME,
133 PANEL_NAME_MAX_LEN)))
134 return 0;
135
136 if (!strncmp(name, TVOUT_PANEL_NAME,
137 strnlen(TVOUT_PANEL_NAME,
138 PANEL_NAME_MAX_LEN)))
139 return 0;
140
141 pr_warning("%s: not supported '%s'", __func__, name);
142 return -ENODEV;
143}
144
145static struct msm_fb_platform_data msm_fb_pdata = {
146 .detect_client = msm_fb_detect_panel,
147};
148
149static struct platform_device msm_fb_device = {
150 .name = "msm_fb",
151 .id = 0,
152 .num_resources = ARRAY_SIZE(msm_fb_resources),
153 .resource = msm_fb_resources,
154 .dev.platform_data = &msm_fb_pdata,
155};
156
157static bool dsi_power_on;
158
159/**
160 * LiQUID panel on/off
161 *
162 * @param on
163 *
164 * @return int
165 */
166static int mipi_dsi_liquid_panel_power(int on)
167{
168 static struct regulator *reg_l2, *reg_ext_3p3v;
169 static int gpio21, gpio24, gpio43;
170 int rc;
171
172 pr_info("%s: on=%d\n", __func__, on);
173
174 gpio21 = PM8921_GPIO_PM_TO_SYS(21); /* disp power enable_n */
175 gpio43 = PM8921_GPIO_PM_TO_SYS(43); /* Displays Enable (rst_n)*/
176 gpio24 = PM8921_GPIO_PM_TO_SYS(24); /* Backlight PWM */
177
178 if (!dsi_power_on) {
179
180 reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
181 "dsi_vdda");
182 if (IS_ERR(reg_l2)) {
183 pr_err("could not get 8921_l2, rc = %ld\n",
184 PTR_ERR(reg_l2));
185 return -ENODEV;
186 }
187
188 rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
189 if (rc) {
190 pr_err("set_voltage l2 failed, rc=%d\n", rc);
191 return -EINVAL;
192 }
193
194 reg_ext_3p3v = regulator_get(&msm_mipi_dsi1_device.dev,
195 "vdd_lvds_3p3v");
196 if (IS_ERR(reg_ext_3p3v)) {
197 pr_err("could not get reg_ext_3p3v, rc = %ld\n",
198 PTR_ERR(reg_ext_3p3v));
199 return -ENODEV;
200 }
201
202 rc = gpio_request(gpio21, "disp_pwr_en_n");
203 if (rc) {
204 pr_err("request gpio 21 failed, rc=%d\n", rc);
205 return -ENODEV;
206 }
207
208 rc = gpio_request(gpio43, "disp_rst_n");
209 if (rc) {
210 pr_err("request gpio 43 failed, rc=%d\n", rc);
211 return -ENODEV;
212 }
213
214 rc = gpio_request(gpio24, "disp_backlight_pwm");
215 if (rc) {
216 pr_err("request gpio 24 failed, rc=%d\n", rc);
217 return -ENODEV;
218 }
219
220 dsi_power_on = true;
221 }
222
223 if (on) {
224 rc = regulator_set_optimum_mode(reg_l2, 100000);
225 if (rc < 0) {
226 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
227 return -EINVAL;
228 }
229 rc = regulator_enable(reg_l2);
230 if (rc) {
231 pr_err("enable l2 failed, rc=%d\n", rc);
232 return -ENODEV;
233 }
234
235 rc = regulator_enable(reg_ext_3p3v);
236 if (rc) {
237 pr_err("enable reg_ext_3p3v failed, rc=%d\n", rc);
238 return -ENODEV;
239 }
240
241 /* set reset pin before power enable */
242 gpio_set_value_cansleep(gpio43, 0); /* disp disable (resx=0) */
243
244 gpio_set_value_cansleep(gpio21, 0); /* disp power enable_n */
245 msleep(20);
246 gpio_set_value_cansleep(gpio43, 1); /* disp enable */
247 msleep(20);
248 gpio_set_value_cansleep(gpio43, 0); /* disp enable */
249 msleep(20);
250 gpio_set_value_cansleep(gpio43, 1); /* disp enable */
251 msleep(20);
252 } else {
253 gpio_set_value_cansleep(gpio43, 0);
254 gpio_set_value_cansleep(gpio21, 1);
255
256 rc = regulator_disable(reg_l2);
257 if (rc) {
258 pr_err("disable reg_l2 failed, rc=%d\n", rc);
259 return -ENODEV;
260 }
261 rc = regulator_disable(reg_ext_3p3v);
262 if (rc) {
263 pr_err("disable reg_ext_3p3v failed, rc=%d\n", rc);
264 return -ENODEV;
265 }
266 rc = regulator_set_optimum_mode(reg_l2, 100);
267 if (rc < 0) {
268 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
269 return -EINVAL;
270 }
271 }
272
273 return 0;
274}
275
276static int mipi_dsi_cdp_panel_power(int on)
277{
278 static struct regulator *reg_l8, *reg_l23, *reg_l2;
279 static int gpio43;
280 int rc;
281
282 pr_info("%s: state : %d\n", __func__, on);
283
284 if (!dsi_power_on) {
285
286 reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev,
287 "dsi_vdc");
288 if (IS_ERR(reg_l8)) {
289 pr_err("could not get 8921_l8, rc = %ld\n",
290 PTR_ERR(reg_l8));
291 return -ENODEV;
292 }
293 reg_l23 = regulator_get(&msm_mipi_dsi1_device.dev,
294 "dsi_vddio");
295 if (IS_ERR(reg_l23)) {
296 pr_err("could not get 8921_l23, rc = %ld\n",
297 PTR_ERR(reg_l23));
298 return -ENODEV;
299 }
300 reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
301 "dsi_vdda");
302 if (IS_ERR(reg_l2)) {
303 pr_err("could not get 8921_l2, rc = %ld\n",
304 PTR_ERR(reg_l2));
305 return -ENODEV;
306 }
307 rc = regulator_set_voltage(reg_l8, 2800000, 3000000);
308 if (rc) {
309 pr_err("set_voltage l8 failed, rc=%d\n", rc);
310 return -EINVAL;
311 }
312 rc = regulator_set_voltage(reg_l23, 1800000, 1800000);
313 if (rc) {
314 pr_err("set_voltage l23 failed, rc=%d\n", rc);
315 return -EINVAL;
316 }
317 rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
318 if (rc) {
319 pr_err("set_voltage l2 failed, rc=%d\n", rc);
320 return -EINVAL;
321 }
322 gpio43 = PM8921_GPIO_PM_TO_SYS(43);
323 rc = gpio_request(gpio43, "disp_rst_n");
324 if (rc) {
325 pr_err("request gpio 43 failed, rc=%d\n", rc);
326 return -ENODEV;
327 }
328 dsi_power_on = true;
329 }
330 if (on) {
331 rc = regulator_set_optimum_mode(reg_l8, 100000);
332 if (rc < 0) {
333 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
334 return -EINVAL;
335 }
336 rc = regulator_set_optimum_mode(reg_l23, 100000);
337 if (rc < 0) {
338 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
339 return -EINVAL;
340 }
341 rc = regulator_set_optimum_mode(reg_l2, 100000);
342 if (rc < 0) {
343 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
344 return -EINVAL;
345 }
346 rc = regulator_enable(reg_l8);
347 if (rc) {
348 pr_err("enable l8 failed, rc=%d\n", rc);
349 return -ENODEV;
350 }
351 rc = regulator_enable(reg_l23);
352 if (rc) {
353 pr_err("enable l8 failed, rc=%d\n", rc);
354 return -ENODEV;
355 }
356 rc = regulator_enable(reg_l2);
357 if (rc) {
358 pr_err("enable l2 failed, rc=%d\n", rc);
359 return -ENODEV;
360 }
361 gpio_set_value_cansleep(gpio43, 1);
362 } else {
363 rc = regulator_disable(reg_l2);
364 if (rc) {
365 pr_err("disable reg_l2 failed, rc=%d\n", rc);
366 return -ENODEV;
367 }
368 rc = regulator_disable(reg_l8);
369 if (rc) {
370 pr_err("disable reg_l8 failed, rc=%d\n", rc);
371 return -ENODEV;
372 }
373 rc = regulator_disable(reg_l23);
374 if (rc) {
375 pr_err("disable reg_l23 failed, rc=%d\n", rc);
376 return -ENODEV;
377 }
378 rc = regulator_set_optimum_mode(reg_l8, 100);
379 if (rc < 0) {
380 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
381 return -EINVAL;
382 }
383 rc = regulator_set_optimum_mode(reg_l23, 100);
384 if (rc < 0) {
385 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
386 return -EINVAL;
387 }
388 rc = regulator_set_optimum_mode(reg_l2, 100);
389 if (rc < 0) {
390 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
391 return -EINVAL;
392 }
393 gpio_set_value_cansleep(gpio43, 0);
394 }
395 return 0;
396}
397
398static int mipi_dsi_panel_power(int on)
399{
400 int ret;
401
402 pr_info("%s: on=%d\n", __func__, on);
403
404 if (machine_is_msm8960_liquid())
405 ret = mipi_dsi_liquid_panel_power(on);
406 else
407 ret = mipi_dsi_cdp_panel_power(on);
408
409 return ret;
410}
411
412static struct mipi_dsi_platform_data mipi_dsi_pdata = {
413 .vsync_gpio = MDP_VSYNC_GPIO,
414 .dsi_power_save = mipi_dsi_panel_power,
415};
416
417#ifdef CONFIG_MSM_BUS_SCALING
418
419static struct msm_bus_vectors mdp_init_vectors[] = {
420 {
421 .src = MSM_BUS_MASTER_MDP_PORT0,
422 .dst = MSM_BUS_SLAVE_EBI_CH0,
423 .ab = 0,
424 .ib = 0,
425 },
426};
427
428#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
429static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
430 /* If HDMI is used as primary */
431 {
432 .src = MSM_BUS_MASTER_MDP_PORT0,
433 .dst = MSM_BUS_SLAVE_EBI_CH0,
434 .ab = 2000000000,
435 .ib = 2000000000,
436 },
437};
438static struct msm_bus_paths mdp_bus_scale_usecases[] = {
439 {
440 ARRAY_SIZE(mdp_init_vectors),
441 mdp_init_vectors,
442 },
443 {
444 ARRAY_SIZE(hdmi_as_primary_vectors),
445 hdmi_as_primary_vectors,
446 },
447 {
448 ARRAY_SIZE(hdmi_as_primary_vectors),
449 hdmi_as_primary_vectors,
450 },
451 {
452 ARRAY_SIZE(hdmi_as_primary_vectors),
453 hdmi_as_primary_vectors,
454 },
455 {
456 ARRAY_SIZE(hdmi_as_primary_vectors),
457 hdmi_as_primary_vectors,
458 },
459 {
460 ARRAY_SIZE(hdmi_as_primary_vectors),
461 hdmi_as_primary_vectors,
462 },
463};
464#else
465static struct msm_bus_vectors mdp_ui_vectors[] = {
466 {
467 .src = MSM_BUS_MASTER_MDP_PORT0,
468 .dst = MSM_BUS_SLAVE_EBI_CH0,
469 .ab = 216000000 * 2,
470 .ib = 270000000 * 2,
471 },
472};
473
474static struct msm_bus_vectors mdp_vga_vectors[] = {
475 /* VGA and less video */
476 {
477 .src = MSM_BUS_MASTER_MDP_PORT0,
478 .dst = MSM_BUS_SLAVE_EBI_CH0,
479 .ab = 216000000 * 2,
480 .ib = 270000000 * 2,
481 },
482};
483
484static struct msm_bus_vectors mdp_720p_vectors[] = {
485 /* 720p and less video */
486 {
487 .src = MSM_BUS_MASTER_MDP_PORT0,
488 .dst = MSM_BUS_SLAVE_EBI_CH0,
489 .ab = 230400000 * 2,
490 .ib = 288000000 * 2,
491 },
492};
493
494static struct msm_bus_vectors mdp_1080p_vectors[] = {
495 /* 1080p and less video */
496 {
497 .src = MSM_BUS_MASTER_MDP_PORT0,
498 .dst = MSM_BUS_SLAVE_EBI_CH0,
499 .ab = 334080000 * 2,
500 .ib = 417600000 * 2,
501 },
502};
503
504static struct msm_bus_paths mdp_bus_scale_usecases[] = {
505 {
506 ARRAY_SIZE(mdp_init_vectors),
507 mdp_init_vectors,
508 },
509 {
510 ARRAY_SIZE(mdp_ui_vectors),
511 mdp_ui_vectors,
512 },
513 {
514 ARRAY_SIZE(mdp_ui_vectors),
515 mdp_ui_vectors,
516 },
517 {
518 ARRAY_SIZE(mdp_vga_vectors),
519 mdp_vga_vectors,
520 },
521 {
522 ARRAY_SIZE(mdp_720p_vectors),
523 mdp_720p_vectors,
524 },
525 {
526 ARRAY_SIZE(mdp_1080p_vectors),
527 mdp_1080p_vectors,
528 },
529};
530#endif
531
532static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
533 mdp_bus_scale_usecases,
534 ARRAY_SIZE(mdp_bus_scale_usecases),
535 .name = "mdp",
536};
537
538#endif
539
540#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800541static int mdp_core_clk_rate_table[] = {
Stepan Moskovchenko24cd8642011-11-29 13:07:53 -0800542 200000000,
543 200000000,
544 200000000,
545 200000000,
546};
547#else
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800548static int mdp_core_clk_rate_table[] = {
Stepan Moskovchenko24cd8642011-11-29 13:07:53 -0800549 85330000,
550 85330000,
551 160000000,
552 200000000,
553};
554#endif
555
556static struct msm_panel_common_pdata mdp_pdata = {
557 .gpio = MDP_VSYNC_GPIO,
558#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
559 .mdp_core_clk_rate = 200000000,
560#else
561 .mdp_core_clk_rate = 85330000,
562#endif
563 .mdp_core_clk_table = mdp_core_clk_rate_table,
564 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
565#ifdef CONFIG_MSM_BUS_SCALING
566 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
567#endif
568 .mdp_rev = MDP_REV_42,
569 .writeback_offset = writeback_offset,
Huaibin Yanga5419422011-12-08 23:52:10 -0800570 .mdp_writeback_memtype = MEMTYPE_EBI1,
571 .mdp_writeback_phys = NULL,
Stepan Moskovchenko24cd8642011-11-29 13:07:53 -0800572};
573
Huaibin Yanga5419422011-12-08 23:52:10 -0800574void __init msm8960_mdp_writeback(struct memtype_reserve* reserve_table)
575{
576 mdp_pdata.mdp_writeback_size_ov0 = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
577 mdp_pdata.mdp_writeback_size_ov1 = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
578
579 reserve_table[mdp_pdata.mdp_writeback_memtype].size +=
580 mdp_pdata.mdp_writeback_size_ov0;
581 reserve_table[mdp_pdata.mdp_writeback_memtype].size +=
582 mdp_pdata.mdp_writeback_size_ov1;
583}
584
Stepan Moskovchenko24cd8642011-11-29 13:07:53 -0800585static struct platform_device mipi_dsi_renesas_panel_device = {
586 .name = "mipi_renesas",
587 .id = 0,
588};
589
590static struct platform_device mipi_dsi_simulator_panel_device = {
591 .name = "mipi_simulator",
592 .id = 0,
593};
594
595#define LPM_CHANNEL0 0
596static int toshiba_gpio[] = {LPM_CHANNEL0};
597
598static struct mipi_dsi_panel_platform_data toshiba_pdata = {
599 .gpio = toshiba_gpio,
600};
601
602static struct platform_device mipi_dsi_toshiba_panel_device = {
603 .name = "mipi_toshiba",
604 .id = 0,
605 .dev = {
606 .platform_data = &toshiba_pdata,
607 }
608};
609
610#define FPGA_3D_GPIO_CONFIG_ADDR 0xB5
611static int dsi2lvds_gpio[2] = {
612 0,/* Backlight PWM-ID=0 for PMIC-GPIO#24 */
613 0x1F08 /* DSI2LVDS Bridge GPIO Output, mask=0x1f, out=0x08 */
614 };
615
616static struct msm_panel_common_pdata mipi_dsi2lvds_pdata = {
617 .gpio_num = dsi2lvds_gpio,
618};
619
620static struct mipi_dsi_phy_ctrl dsi_novatek_cmd_mode_phy_db = {
621
622/* DSI_BIT_CLK at 500MHz, 2 lane, RGB888 */
623 {0x0F, 0x0a, 0x04, 0x00, 0x20}, /* regulator */
624 /* timing */
625 {0xab, 0x8a, 0x18, 0x00, 0x92, 0x97, 0x1b, 0x8c,
626 0x0c, 0x03, 0x04, 0xa0},
627 {0x5f, 0x00, 0x00, 0x10}, /* phy ctrl */
628 {0xff, 0x00, 0x06, 0x00}, /* strength */
629 /* pll control */
630 {0x40, 0xf9, 0x30, 0xda, 0x00, 0x40, 0x03, 0x62,
631 0x40, 0x07, 0x03,
632 0x00, 0x1a, 0x00, 0x00, 0x02, 0x00, 0x20, 0x00, 0x01},
633};
634
635static struct mipi_dsi_panel_platform_data novatek_pdata = {
636 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
637 .fpga_ctrl_mode = FPGA_SPI_INTF,
638 .phy_ctrl_settings = &dsi_novatek_cmd_mode_phy_db,
639};
640
641static struct platform_device mipi_dsi_novatek_panel_device = {
642 .name = "mipi_novatek",
643 .id = 0,
644 .dev = {
645 .platform_data = &novatek_pdata,
646 }
647};
648
649static struct platform_device mipi_dsi2lvds_bridge_device = {
650 .name = "mipi_tc358764",
651 .id = 0,
652 .dev.platform_data = &mipi_dsi2lvds_pdata,
653};
654
655#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
656static struct resource hdmi_msm_resources[] = {
657 {
658 .name = "hdmi_msm_qfprom_addr",
659 .start = 0x00700000,
660 .end = 0x007060FF,
661 .flags = IORESOURCE_MEM,
662 },
663 {
664 .name = "hdmi_msm_hdmi_addr",
665 .start = 0x04A00000,
666 .end = 0x04A00FFF,
667 .flags = IORESOURCE_MEM,
668 },
669 {
670 .name = "hdmi_msm_irq",
671 .start = HDMI_IRQ,
672 .end = HDMI_IRQ,
673 .flags = IORESOURCE_IRQ,
674 },
675};
676
677static int hdmi_enable_5v(int on);
678static int hdmi_core_power(int on, int show);
679static int hdmi_cec_power(int on);
680
681static struct msm_hdmi_platform_data hdmi_msm_data = {
682 .irq = HDMI_IRQ,
683 .enable_5v = hdmi_enable_5v,
684 .core_power = hdmi_core_power,
685 .cec_power = hdmi_cec_power,
686};
687
688static struct platform_device hdmi_msm_device = {
689 .name = "hdmi_msm",
690 .id = 0,
691 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
692 .resource = hdmi_msm_resources,
693 .dev.platform_data = &hdmi_msm_data,
694};
695#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
696
697#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
698static struct platform_device wfd_panel_device = {
699 .name = "wfd_panel",
700 .id = 0,
701 .dev.platform_data = NULL,
702};
Stepan Moskovchenko270888d2011-11-30 12:19:11 -0800703
704static struct platform_device wfd_device = {
705 .name = "msm_wfd",
706 .id = -1,
707};
Stepan Moskovchenko24cd8642011-11-29 13:07:53 -0800708#endif
709
710#ifdef CONFIG_MSM_BUS_SCALING
711static struct msm_bus_vectors dtv_bus_init_vectors[] = {
712 {
713 .src = MSM_BUS_MASTER_MDP_PORT0,
714 .dst = MSM_BUS_SLAVE_EBI_CH0,
715 .ab = 0,
716 .ib = 0,
717 },
718};
719
720#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
721static struct msm_bus_vectors dtv_bus_def_vectors[] = {
722 {
723 .src = MSM_BUS_MASTER_MDP_PORT0,
724 .dst = MSM_BUS_SLAVE_EBI_CH0,
725 .ab = 2000000000,
726 .ib = 2000000000,
727 },
728};
729#else
730static struct msm_bus_vectors dtv_bus_def_vectors[] = {
731 {
732 .src = MSM_BUS_MASTER_MDP_PORT0,
733 .dst = MSM_BUS_SLAVE_EBI_CH0,
734 .ab = 566092800 * 2,
735 .ib = 707616000 * 2,
736 },
737};
738#endif
739
740static struct msm_bus_paths dtv_bus_scale_usecases[] = {
741 {
742 ARRAY_SIZE(dtv_bus_init_vectors),
743 dtv_bus_init_vectors,
744 },
745 {
746 ARRAY_SIZE(dtv_bus_def_vectors),
747 dtv_bus_def_vectors,
748 },
749};
750static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
751 dtv_bus_scale_usecases,
752 ARRAY_SIZE(dtv_bus_scale_usecases),
753 .name = "dtv",
754};
755
756static struct lcdc_platform_data dtv_pdata = {
757 .bus_scale_table = &dtv_bus_scale_pdata,
758};
759#endif
760
Stepan Moskovchenko24cd8642011-11-29 13:07:53 -0800761#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
Stepan Moskovchenko24cd8642011-11-29 13:07:53 -0800762static int hdmi_enable_5v(int on)
763{
764 /* TBD: PM8921 regulator instead of 8901 */
765 static struct regulator *reg_8921_hdmi_mvs; /* HDMI_5V */
766 static int prev_on;
767 int rc;
768
769 if (on == prev_on)
770 return 0;
771
772 if (!reg_8921_hdmi_mvs)
773 reg_8921_hdmi_mvs = regulator_get(&hdmi_msm_device.dev,
774 "hdmi_mvs");
775
776 if (on) {
777 rc = regulator_enable(reg_8921_hdmi_mvs);
778 if (rc) {
779 pr_err("'%s' regulator enable failed, rc=%d\n",
780 "8921_hdmi_mvs", rc);
781 return rc;
782 }
783 pr_debug("%s(on): success\n", __func__);
784 } else {
785 rc = regulator_disable(reg_8921_hdmi_mvs);
786 if (rc)
787 pr_warning("'%s' regulator disable failed, rc=%d\n",
788 "8921_hdmi_mvs", rc);
789 pr_debug("%s(off): success\n", __func__);
790 }
791
792 prev_on = on;
793
794 return 0;
795}
796
797static int hdmi_core_power(int on, int show)
798{
799 static struct regulator *reg_8921_l23, *reg_8921_s4;
800 static int prev_on;
801 int rc;
802
803 if (on == prev_on)
804 return 0;
805
806 /* TBD: PM8921 regulator instead of 8901 */
807 if (!reg_8921_l23) {
808 reg_8921_l23 = regulator_get(&hdmi_msm_device.dev, "hdmi_avdd");
809 if (IS_ERR(reg_8921_l23)) {
810 pr_err("could not get reg_8921_l23, rc = %ld\n",
811 PTR_ERR(reg_8921_l23));
812 return -ENODEV;
813 }
814 rc = regulator_set_voltage(reg_8921_l23, 1800000, 1800000);
815 if (rc) {
816 pr_err("set_voltage failed for 8921_l23, rc=%d\n", rc);
817 return -EINVAL;
818 }
819 }
820 if (!reg_8921_s4) {
821 reg_8921_s4 = regulator_get(&hdmi_msm_device.dev, "hdmi_vcc");
822 if (IS_ERR(reg_8921_s4)) {
823 pr_err("could not get reg_8921_s4, rc = %ld\n",
824 PTR_ERR(reg_8921_s4));
825 return -ENODEV;
826 }
827 rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000);
828 if (rc) {
829 pr_err("set_voltage failed for 8921_s4, rc=%d\n", rc);
830 return -EINVAL;
831 }
832 }
833
834 if (on) {
835 rc = regulator_set_optimum_mode(reg_8921_l23, 100000);
836 if (rc < 0) {
837 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
838 return -EINVAL;
839 }
840 rc = regulator_enable(reg_8921_l23);
841 if (rc) {
842 pr_err("'%s' regulator enable failed, rc=%d\n",
843 "hdmi_avdd", rc);
844 return rc;
845 }
846 rc = regulator_enable(reg_8921_s4);
847 if (rc) {
848 pr_err("'%s' regulator enable failed, rc=%d\n",
849 "hdmi_vcc", rc);
850 return rc;
851 }
852 rc = gpio_request(100, "HDMI_DDC_CLK");
853 if (rc) {
854 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
855 "HDMI_DDC_CLK", 100, rc);
856 goto error1;
857 }
858 rc = gpio_request(101, "HDMI_DDC_DATA");
859 if (rc) {
860 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
861 "HDMI_DDC_DATA", 101, rc);
862 goto error2;
863 }
864 rc = gpio_request(102, "HDMI_HPD");
865 if (rc) {
866 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
867 "HDMI_HPD", 102, rc);
868 goto error3;
869 }
870 pr_debug("%s(on): success\n", __func__);
871 } else {
872 gpio_free(100);
873 gpio_free(101);
874 gpio_free(102);
875
876 rc = regulator_disable(reg_8921_l23);
877 if (rc) {
878 pr_err("disable reg_8921_l23 failed, rc=%d\n", rc);
879 return -ENODEV;
880 }
881 rc = regulator_disable(reg_8921_s4);
882 if (rc) {
883 pr_err("disable reg_8921_s4 failed, rc=%d\n", rc);
884 return -ENODEV;
885 }
886 rc = regulator_set_optimum_mode(reg_8921_l23, 100);
887 if (rc < 0) {
888 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
889 return -EINVAL;
890 }
891 pr_debug("%s(off): success\n", __func__);
892 }
893
894 prev_on = on;
895
896 return 0;
897
898error3:
899 gpio_free(101);
900error2:
901 gpio_free(100);
902error1:
903 regulator_disable(reg_8921_l23);
904 regulator_disable(reg_8921_s4);
905 return rc;
906}
907
908static int hdmi_cec_power(int on)
909{
910 static int prev_on;
911 int rc;
912
913 if (on == prev_on)
914 return 0;
915
916 if (on) {
917 rc = gpio_request(99, "HDMI_CEC_VAR");
918 if (rc) {
919 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
920 "HDMI_CEC_VAR", 99, rc);
921 goto error;
922 }
923 pr_debug("%s(on): success\n", __func__);
924 } else {
925 gpio_free(99);
926 pr_debug("%s(off): success\n", __func__);
927 }
928
929 prev_on = on;
930
931 return 0;
932error:
933 return rc;
934}
935#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
936
937void __init msm8960_init_fb(void)
938{
Stepan Moskovchenko24cd8642011-11-29 13:07:53 -0800939 platform_device_register(&msm_fb_device);
940
Stepan Moskovchenko270888d2011-11-30 12:19:11 -0800941#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
942 platform_device_register(&wfd_panel_device);
943 platform_device_register(&wfd_device);
944#endif
945
Stepan Moskovchenko24cd8642011-11-29 13:07:53 -0800946 if (machine_is_msm8960_sim())
947 platform_device_register(&mipi_dsi_simulator_panel_device);
948
949 if (machine_is_msm8960_rumi3())
950 platform_device_register(&mipi_dsi_renesas_panel_device);
951
952 if (!machine_is_msm8960_sim() && !machine_is_msm8960_rumi3()) {
953 platform_device_register(&mipi_dsi_novatek_panel_device);
954
955#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
956 platform_device_register(&hdmi_msm_device);
957#endif
958 }
959
960 if (machine_is_msm8960_liquid())
961 platform_device_register(&mipi_dsi2lvds_bridge_device);
962 else
963 platform_device_register(&mipi_dsi_toshiba_panel_device);
964
965 if (machine_is_msm8x60_rumi3()) {
966 msm_fb_register_device("mdp", NULL);
967 mipi_dsi_pdata.target_type = 1;
968 } else
969 msm_fb_register_device("mdp", &mdp_pdata);
970 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
971#ifdef CONFIG_MSM_BUS_SCALING
972 msm_fb_register_device("dtv", &dtv_pdata);
973#endif
974}
975
976void __init msm8960_allocate_fb_region(void)
977{
978 void *addr;
979 unsigned long size;
980
981 size = MSM_FB_SIZE;
982 addr = alloc_bootmem_align(size, 0x1000);
983 msm_fb_resources[0].start = __pa(addr);
984 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
985 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
986 size, addr, __pa(addr));
987}