blob: 082b29eea1911ade3ff17bd64bf957d317ae81fc [file] [log] [blame]
Kiran Kandi3426e512011-09-13 22:50:10 -07001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/module.h>
13#include <linux/init.h>
Bradley Rubin229c6a52011-07-12 16:18:48 -070014#include <linux/firmware.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070015#include <linux/slab.h>
16#include <linux/platform_device.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053017#include <linux/device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/printk.h>
19#include <linux/ratelimit.h>
Bradley Rubincb3950a2011-08-18 13:07:26 -070020#include <linux/debugfs.h>
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +053021#include <linux/mfd/wcd9xxx/core.h>
22#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
23#include <linux/mfd/wcd9xxx/wcd9310_registers.h>
24#include <linux/mfd/wcd9xxx/pdata.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053025#include <sound/pcm.h>
26#include <sound/pcm_params.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070027#include <sound/soc.h>
28#include <sound/soc-dapm.h>
29#include <sound/tlv.h>
30#include <linux/bitops.h>
31#include <linux/delay.h>
Kuirong Wanga545e722012-02-06 19:12:54 -080032#include <linux/pm_runtime.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070033#include "wcd9310.h"
34
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070035#define WCD9310_RATES (SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|\
36 SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_48000)
37
38#define NUM_DECIMATORS 10
39#define NUM_INTERPOLATORS 7
40#define BITS_PER_REG 8
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080041#define TABLA_CFILT_FAST_MODE 0x00
42#define TABLA_CFILT_SLOW_MODE 0x40
Patrick Lai64b43262011-12-06 17:29:15 -080043#define MBHC_FW_READ_ATTEMPTS 15
44#define MBHC_FW_READ_TIMEOUT 2000000
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070045
Patrick Lai49efeac2011-11-03 11:01:12 -070046#define TABLA_JACK_MASK (SND_JACK_HEADSET | SND_JACK_OC_HPHL | SND_JACK_OC_HPHR)
47
Santosh Mardie15e2302011-11-15 10:39:23 +053048#define TABLA_I2S_MASTER_MODE_MASK 0x08
49
Patrick Laic7cae882011-11-18 11:52:49 -080050#define TABLA_OCP_ATTEMPT 1
51
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080052#define AIF1_PB 1
53#define AIF1_CAP 2
Neema Shettyd3a89262012-02-16 10:23:50 -080054#define AIF2_PB 3
55#define NUM_CODEC_DAIS 3
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080056
57struct tabla_codec_dai_data {
58 u32 rate;
59 u32 *ch_num;
60 u32 ch_act;
61 u32 ch_tot;
62};
63
Joonwoo Park0976d012011-12-22 11:48:18 -080064#define TABLA_MCLK_RATE_12288KHZ 12288000
65#define TABLA_MCLK_RATE_9600KHZ 9600000
66
Joonwoo Parkf4267c22012-01-10 13:25:24 -080067#define TABLA_FAKE_INS_THRESHOLD_MS 2500
Joonwoo Park6b9b03f2012-01-23 18:48:54 -080068#define TABLA_FAKE_REMOVAL_MIN_PERIOD_MS 50
Joonwoo Parkf4267c22012-01-10 13:25:24 -080069
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070070static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
71static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
72static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080073static struct snd_soc_dai_driver tabla_dai[];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070074
75enum tabla_bandgap_type {
76 TABLA_BANDGAP_OFF = 0,
77 TABLA_BANDGAP_AUDIO_MODE,
78 TABLA_BANDGAP_MBHC_MODE,
79};
80
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -070081struct mbhc_micbias_regs {
82 u16 cfilt_val;
83 u16 cfilt_ctl;
84 u16 mbhc_reg;
85 u16 int_rbias;
86 u16 ctl_reg;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080087 u8 cfilt_sel;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -070088};
89
Ben Romberger1f045a72011-11-04 10:14:57 -070090/* Codec supports 2 IIR filters */
91enum {
92 IIR1 = 0,
93 IIR2,
94 IIR_MAX,
95};
96/* Codec supports 5 bands */
97enum {
98 BAND1 = 0,
99 BAND2,
100 BAND3,
101 BAND4,
102 BAND5,
103 BAND_MAX,
104};
105
Joonwoo Parka9444452011-12-08 18:48:27 -0800106/* Flags to track of PA and DAC state.
107 * PA and DAC should be tracked separately as AUXPGA loopback requires
108 * only PA to be turned on without DAC being on. */
109enum tabla_priv_ack_flags {
110 TABLA_HPHL_PA_OFF_ACK = 0,
111 TABLA_HPHR_PA_OFF_ACK,
112 TABLA_HPHL_DAC_OFF_ACK,
113 TABLA_HPHR_DAC_OFF_ACK
114};
115
Joonwoo Park0976d012011-12-22 11:48:18 -0800116/* Data used by MBHC */
117struct mbhc_internal_cal_data {
118 u16 dce_z;
119 u16 dce_mb;
120 u16 sta_z;
121 u16 sta_mb;
Joonwoo Park433149a2012-01-11 09:53:54 -0800122 u32 t_sta_dce;
Joonwoo Park0976d012011-12-22 11:48:18 -0800123 u32 t_dce;
124 u32 t_sta;
125 u32 micb_mv;
126 u16 v_ins_hu;
127 u16 v_ins_h;
128 u16 v_b1_hu;
129 u16 v_b1_h;
130 u16 v_b1_huc;
131 u16 v_brh;
132 u16 v_brl;
133 u16 v_no_mic;
Joonwoo Park0976d012011-12-22 11:48:18 -0800134 u8 npoll;
135 u8 nbounce_wait;
136};
137
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800138struct tabla_reg_address {
139 u16 micb_4_ctl;
140 u16 micb_4_int_rbias;
141 u16 micb_4_mbhc;
142};
143
Bradley Rubin229c6a52011-07-12 16:18:48 -0700144struct tabla_priv {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700145 struct snd_soc_codec *codec;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800146 struct tabla_reg_address reg_addr;
Joonwoo Park0976d012011-12-22 11:48:18 -0800147 u32 mclk_freq;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700148 u32 adc_count;
Patrick Lai3043fba2011-08-01 14:15:57 -0700149 u32 cfilt1_cnt;
150 u32 cfilt2_cnt;
151 u32 cfilt3_cnt;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700152 u32 rx_bias_count;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700153 enum tabla_bandgap_type bandgap_type;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700154 bool mclk_enabled;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700155 bool clock_active;
156 bool config_mode_active;
157 bool mbhc_polling_active;
Joonwoo Parkf4267c22012-01-10 13:25:24 -0800158 unsigned long mbhc_fake_ins_start;
Bradley Rubincb1e2732011-06-23 16:49:20 -0700159 int buttons_pressed;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700160
Joonwoo Park0976d012011-12-22 11:48:18 -0800161 enum tabla_micbias_num micbias;
162 /* void* calibration contains:
163 * struct tabla_mbhc_general_cfg generic;
164 * struct tabla_mbhc_plug_detect_cfg plug_det;
165 * struct tabla_mbhc_plug_type_cfg plug_type;
166 * struct tabla_mbhc_btn_detect_cfg btn_det;
167 * struct tabla_mbhc_imped_detect_cfg imped_det;
168 * Note: various size depends on btn_det->num_btn
169 */
170 void *calibration;
171 struct mbhc_internal_cal_data mbhc_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700172
Bradley Rubincb1e2732011-06-23 16:49:20 -0700173 struct snd_soc_jack *headset_jack;
174 struct snd_soc_jack *button_jack;
Bradley Rubin229c6a52011-07-12 16:18:48 -0700175
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +0530176 struct wcd9xxx_pdata *pdata;
Bradley Rubina7096d02011-08-03 18:29:02 -0700177 u32 anc_slot;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700178
179 bool no_mic_headset_override;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -0700180 /* Delayed work to report long button press */
181 struct delayed_work btn0_dwork;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700182
183 struct mbhc_micbias_regs mbhc_bias_regs;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -0700184 u8 cfilt_k_value;
185 bool mbhc_micbias_switched;
Patrick Lai49efeac2011-11-03 11:01:12 -0700186
Joonwoo Parka9444452011-12-08 18:48:27 -0800187 /* track PA/DAC state */
188 unsigned long hph_pa_dac_state;
189
Santosh Mardie15e2302011-11-15 10:39:23 +0530190 /*track tabla interface type*/
191 u8 intf_type;
192
Patrick Lai49efeac2011-11-03 11:01:12 -0700193 u32 hph_status; /* track headhpone status */
194 /* define separate work for left and right headphone OCP to avoid
195 * additional checking on which OCP event to report so no locking
196 * to ensure synchronization is required
197 */
198 struct work_struct hphlocp_work; /* reporting left hph ocp off */
199 struct work_struct hphrocp_work; /* reporting right hph ocp off */
Joonwoo Park8b1f0982011-12-08 17:12:45 -0800200
Patrick Laic7cae882011-11-18 11:52:49 -0800201 u8 hphlocp_cnt; /* headphone left ocp retry */
202 u8 hphrocp_cnt; /* headphone right ocp retry */
Joonwoo Park0976d012011-12-22 11:48:18 -0800203
204 /* Callback function to enable MCLK */
205 int (*mclk_cb) (struct snd_soc_codec*, int);
Patrick Lai64b43262011-12-06 17:29:15 -0800206
207 /* Work to perform MBHC Firmware Read */
208 struct delayed_work mbhc_firmware_dwork;
209 const struct firmware *mbhc_fw;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -0800210
211 /* num of slim ports required */
212 struct tabla_codec_dai_data dai[NUM_CODEC_DAIS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700213};
214
Bradley Rubincb3950a2011-08-18 13:07:26 -0700215#ifdef CONFIG_DEBUG_FS
216struct tabla_priv *debug_tabla_priv;
217#endif
218
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700219static int tabla_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
220 struct snd_kcontrol *kcontrol, int event)
221{
222 struct snd_soc_codec *codec = w->codec;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700223
224 pr_debug("%s %d\n", __func__, event);
225 switch (event) {
226 case SND_SOC_DAPM_POST_PMU:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700227 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
228 0x01);
229 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x08);
230 usleep_range(200, 200);
231 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x00);
232 break;
233 case SND_SOC_DAPM_PRE_PMD:
234 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_RESET_CTL, 0x10,
235 0x10);
236 usleep_range(20, 20);
237 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x08);
238 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x10);
239 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x00);
240 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
241 0x00);
242 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700243 break;
244 }
245 return 0;
246}
247
Bradley Rubina7096d02011-08-03 18:29:02 -0700248static int tabla_get_anc_slot(struct snd_kcontrol *kcontrol,
249 struct snd_ctl_elem_value *ucontrol)
250{
251 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
252 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
253 ucontrol->value.integer.value[0] = tabla->anc_slot;
254 return 0;
255}
256
257static int tabla_put_anc_slot(struct snd_kcontrol *kcontrol,
258 struct snd_ctl_elem_value *ucontrol)
259{
260 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
261 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
262 tabla->anc_slot = ucontrol->value.integer.value[0];
263 return 0;
264}
265
Kiran Kandid2d86b52011-09-09 17:44:28 -0700266static int tabla_pa_gain_get(struct snd_kcontrol *kcontrol,
267 struct snd_ctl_elem_value *ucontrol)
268{
269 u8 ear_pa_gain;
270 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
271
272 ear_pa_gain = snd_soc_read(codec, TABLA_A_RX_EAR_GAIN);
273
274 ear_pa_gain = ear_pa_gain >> 5;
275
276 if (ear_pa_gain == 0x00) {
277 ucontrol->value.integer.value[0] = 0;
278 } else if (ear_pa_gain == 0x04) {
279 ucontrol->value.integer.value[0] = 1;
280 } else {
281 pr_err("%s: ERROR: Unsupported Ear Gain = 0x%x\n",
282 __func__, ear_pa_gain);
283 return -EINVAL;
284 }
285
286 pr_debug("%s: ear_pa_gain = 0x%x\n", __func__, ear_pa_gain);
287
288 return 0;
289}
290
291static int tabla_pa_gain_put(struct snd_kcontrol *kcontrol,
292 struct snd_ctl_elem_value *ucontrol)
293{
294 u8 ear_pa_gain;
295 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
296
297 pr_debug("%s: ucontrol->value.integer.value[0] = %ld\n", __func__,
298 ucontrol->value.integer.value[0]);
299
300 switch (ucontrol->value.integer.value[0]) {
301 case 0:
302 ear_pa_gain = 0x00;
303 break;
304 case 1:
305 ear_pa_gain = 0x80;
306 break;
307 default:
308 return -EINVAL;
309 }
310
311 snd_soc_update_bits(codec, TABLA_A_RX_EAR_GAIN, 0xE0, ear_pa_gain);
312 return 0;
313}
314
Ben Romberger1f045a72011-11-04 10:14:57 -0700315static int tabla_get_iir_enable_audio_mixer(
316 struct snd_kcontrol *kcontrol,
317 struct snd_ctl_elem_value *ucontrol)
318{
319 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
320 int iir_idx = ((struct soc_multi_mixer_control *)
321 kcontrol->private_value)->reg;
322 int band_idx = ((struct soc_multi_mixer_control *)
323 kcontrol->private_value)->shift;
324
325 ucontrol->value.integer.value[0] =
326 snd_soc_read(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx)) &
327 (1 << band_idx);
328
329 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
330 iir_idx, band_idx,
331 (uint32_t)ucontrol->value.integer.value[0]);
332 return 0;
333}
334
335static int tabla_put_iir_enable_audio_mixer(
336 struct snd_kcontrol *kcontrol,
337 struct snd_ctl_elem_value *ucontrol)
338{
339 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
340 int iir_idx = ((struct soc_multi_mixer_control *)
341 kcontrol->private_value)->reg;
342 int band_idx = ((struct soc_multi_mixer_control *)
343 kcontrol->private_value)->shift;
344 int value = ucontrol->value.integer.value[0];
345
346 /* Mask first 5 bits, 6-8 are reserved */
347 snd_soc_update_bits(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx),
348 (1 << band_idx), (value << band_idx));
349
350 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
351 iir_idx, band_idx, value);
352 return 0;
353}
354static uint32_t get_iir_band_coeff(struct snd_soc_codec *codec,
355 int iir_idx, int band_idx,
356 int coeff_idx)
357{
358 /* Address does not automatically update if reading */
Ben Romberger0915aae2012-02-06 23:32:43 -0800359 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700360 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800361 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700362
363 /* Mask bits top 2 bits since they are reserved */
364 return ((snd_soc_read(codec,
365 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx)) << 24) |
366 (snd_soc_read(codec,
367 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx)) << 16) |
368 (snd_soc_read(codec,
369 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx)) << 8) |
370 (snd_soc_read(codec,
371 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx)))) &
372 0x3FFFFFFF;
373}
374
375static int tabla_get_iir_band_audio_mixer(
376 struct snd_kcontrol *kcontrol,
377 struct snd_ctl_elem_value *ucontrol)
378{
379 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
380 int iir_idx = ((struct soc_multi_mixer_control *)
381 kcontrol->private_value)->reg;
382 int band_idx = ((struct soc_multi_mixer_control *)
383 kcontrol->private_value)->shift;
384
385 ucontrol->value.integer.value[0] =
386 get_iir_band_coeff(codec, iir_idx, band_idx, 0);
387 ucontrol->value.integer.value[1] =
388 get_iir_band_coeff(codec, iir_idx, band_idx, 1);
389 ucontrol->value.integer.value[2] =
390 get_iir_band_coeff(codec, iir_idx, band_idx, 2);
391 ucontrol->value.integer.value[3] =
392 get_iir_band_coeff(codec, iir_idx, band_idx, 3);
393 ucontrol->value.integer.value[4] =
394 get_iir_band_coeff(codec, iir_idx, band_idx, 4);
395
396 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
397 "%s: IIR #%d band #%d b1 = 0x%x\n"
398 "%s: IIR #%d band #%d b2 = 0x%x\n"
399 "%s: IIR #%d band #%d a1 = 0x%x\n"
400 "%s: IIR #%d band #%d a2 = 0x%x\n",
401 __func__, iir_idx, band_idx,
402 (uint32_t)ucontrol->value.integer.value[0],
403 __func__, iir_idx, band_idx,
404 (uint32_t)ucontrol->value.integer.value[1],
405 __func__, iir_idx, band_idx,
406 (uint32_t)ucontrol->value.integer.value[2],
407 __func__, iir_idx, band_idx,
408 (uint32_t)ucontrol->value.integer.value[3],
409 __func__, iir_idx, band_idx,
410 (uint32_t)ucontrol->value.integer.value[4]);
411 return 0;
412}
413
414static void set_iir_band_coeff(struct snd_soc_codec *codec,
415 int iir_idx, int band_idx,
416 int coeff_idx, uint32_t value)
417{
418 /* Mask top 3 bits, 6-8 are reserved */
419 /* Update address manually each time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800420 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700421 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800422 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700423
424 /* Mask top 2 bits, 7-8 are reserved */
Ben Romberger0915aae2012-02-06 23:32:43 -0800425 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700426 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800427 (value >> 24) & 0x3F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700428
429 /* Isolate 8bits at a time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800430 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700431 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800432 (value >> 16) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700433
Ben Romberger0915aae2012-02-06 23:32:43 -0800434 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700435 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800436 (value >> 8) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700437
Ben Romberger0915aae2012-02-06 23:32:43 -0800438 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700439 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800440 value & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700441}
442
443static int tabla_put_iir_band_audio_mixer(
444 struct snd_kcontrol *kcontrol,
445 struct snd_ctl_elem_value *ucontrol)
446{
447 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
448 int iir_idx = ((struct soc_multi_mixer_control *)
449 kcontrol->private_value)->reg;
450 int band_idx = ((struct soc_multi_mixer_control *)
451 kcontrol->private_value)->shift;
452
453 set_iir_band_coeff(codec, iir_idx, band_idx, 0,
454 ucontrol->value.integer.value[0]);
455 set_iir_band_coeff(codec, iir_idx, band_idx, 1,
456 ucontrol->value.integer.value[1]);
457 set_iir_band_coeff(codec, iir_idx, band_idx, 2,
458 ucontrol->value.integer.value[2]);
459 set_iir_band_coeff(codec, iir_idx, band_idx, 3,
460 ucontrol->value.integer.value[3]);
461 set_iir_band_coeff(codec, iir_idx, band_idx, 4,
462 ucontrol->value.integer.value[4]);
463
464 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
465 "%s: IIR #%d band #%d b1 = 0x%x\n"
466 "%s: IIR #%d band #%d b2 = 0x%x\n"
467 "%s: IIR #%d band #%d a1 = 0x%x\n"
468 "%s: IIR #%d band #%d a2 = 0x%x\n",
469 __func__, iir_idx, band_idx,
470 get_iir_band_coeff(codec, iir_idx, band_idx, 0),
471 __func__, iir_idx, band_idx,
472 get_iir_band_coeff(codec, iir_idx, band_idx, 1),
473 __func__, iir_idx, band_idx,
474 get_iir_band_coeff(codec, iir_idx, band_idx, 2),
475 __func__, iir_idx, band_idx,
476 get_iir_band_coeff(codec, iir_idx, band_idx, 3),
477 __func__, iir_idx, band_idx,
478 get_iir_band_coeff(codec, iir_idx, band_idx, 4));
479 return 0;
480}
481
Kiran Kandid2d86b52011-09-09 17:44:28 -0700482static const char *tabla_ear_pa_gain_text[] = {"POS_6_DB", "POS_2_DB"};
483static const struct soc_enum tabla_ear_pa_gain_enum[] = {
484 SOC_ENUM_SINGLE_EXT(2, tabla_ear_pa_gain_text),
485};
486
Santosh Mardi024010f2011-10-18 06:27:21 +0530487/*cut of frequency for high pass filter*/
488static const char *cf_text[] = {
489 "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
490};
491
492static const struct soc_enum cf_dec1_enum =
493 SOC_ENUM_SINGLE(TABLA_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
494
495static const struct soc_enum cf_dec2_enum =
496 SOC_ENUM_SINGLE(TABLA_A_CDC_TX2_MUX_CTL, 4, 3, cf_text);
497
498static const struct soc_enum cf_dec3_enum =
499 SOC_ENUM_SINGLE(TABLA_A_CDC_TX3_MUX_CTL, 4, 3, cf_text);
500
501static const struct soc_enum cf_dec4_enum =
502 SOC_ENUM_SINGLE(TABLA_A_CDC_TX4_MUX_CTL, 4, 3, cf_text);
503
504static const struct soc_enum cf_dec5_enum =
505 SOC_ENUM_SINGLE(TABLA_A_CDC_TX5_MUX_CTL, 4, 3, cf_text);
506
507static const struct soc_enum cf_dec6_enum =
508 SOC_ENUM_SINGLE(TABLA_A_CDC_TX6_MUX_CTL, 4, 3, cf_text);
509
510static const struct soc_enum cf_dec7_enum =
511 SOC_ENUM_SINGLE(TABLA_A_CDC_TX7_MUX_CTL, 4, 3, cf_text);
512
513static const struct soc_enum cf_dec8_enum =
514 SOC_ENUM_SINGLE(TABLA_A_CDC_TX8_MUX_CTL, 4, 3, cf_text);
515
516static const struct soc_enum cf_dec9_enum =
517 SOC_ENUM_SINGLE(TABLA_A_CDC_TX9_MUX_CTL, 4, 3, cf_text);
518
519static const struct soc_enum cf_dec10_enum =
520 SOC_ENUM_SINGLE(TABLA_A_CDC_TX10_MUX_CTL, 4, 3, cf_text);
521
522static const struct soc_enum cf_rxmix1_enum =
523 SOC_ENUM_SINGLE(TABLA_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
524
525static const struct soc_enum cf_rxmix2_enum =
526 SOC_ENUM_SINGLE(TABLA_A_CDC_RX2_B4_CTL, 1, 3, cf_text);
527
528static const struct soc_enum cf_rxmix3_enum =
529 SOC_ENUM_SINGLE(TABLA_A_CDC_RX3_B4_CTL, 1, 3, cf_text);
530
531static const struct soc_enum cf_rxmix4_enum =
532 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B4_CTL, 1, 3, cf_text);
533
534static const struct soc_enum cf_rxmix5_enum =
535 SOC_ENUM_SINGLE(TABLA_A_CDC_RX5_B4_CTL, 1, 3, cf_text)
536;
537static const struct soc_enum cf_rxmix6_enum =
538 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B4_CTL, 1, 3, cf_text);
539
540static const struct soc_enum cf_rxmix7_enum =
541 SOC_ENUM_SINGLE(TABLA_A_CDC_RX7_B4_CTL, 1, 3, cf_text);
542
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700543static const struct snd_kcontrol_new tabla_snd_controls[] = {
Kiran Kandid2d86b52011-09-09 17:44:28 -0700544
545 SOC_ENUM_EXT("EAR PA Gain", tabla_ear_pa_gain_enum[0],
546 tabla_pa_gain_get, tabla_pa_gain_put),
547
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700548 SOC_SINGLE_TLV("LINEOUT1 Volume", TABLA_A_RX_LINE_1_GAIN, 0, 12, 1,
549 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700550 SOC_SINGLE_TLV("LINEOUT2 Volume", TABLA_A_RX_LINE_2_GAIN, 0, 12, 1,
551 line_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700552 SOC_SINGLE_TLV("LINEOUT3 Volume", TABLA_A_RX_LINE_3_GAIN, 0, 12, 1,
553 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700554 SOC_SINGLE_TLV("LINEOUT4 Volume", TABLA_A_RX_LINE_4_GAIN, 0, 12, 1,
555 line_gain),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700556 SOC_SINGLE_TLV("LINEOUT5 Volume", TABLA_A_RX_LINE_5_GAIN, 0, 12, 1,
557 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700558
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700559 SOC_SINGLE_TLV("HPHL Volume", TABLA_A_RX_HPH_L_GAIN, 0, 12, 1,
560 line_gain),
561 SOC_SINGLE_TLV("HPHR Volume", TABLA_A_RX_HPH_R_GAIN, 0, 12, 1,
562 line_gain),
563
Bradley Rubin410383f2011-07-22 13:44:23 -0700564 SOC_SINGLE_S8_TLV("RX1 Digital Volume", TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
565 -84, 40, digital_gain),
566 SOC_SINGLE_S8_TLV("RX2 Digital Volume", TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
567 -84, 40, digital_gain),
568 SOC_SINGLE_S8_TLV("RX3 Digital Volume", TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
569 -84, 40, digital_gain),
570 SOC_SINGLE_S8_TLV("RX4 Digital Volume", TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
571 -84, 40, digital_gain),
572 SOC_SINGLE_S8_TLV("RX5 Digital Volume", TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
573 -84, 40, digital_gain),
574 SOC_SINGLE_S8_TLV("RX6 Digital Volume", TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
575 -84, 40, digital_gain),
Neema Shettyd3a89262012-02-16 10:23:50 -0800576 SOC_SINGLE_S8_TLV("RX7 Digital Volume", TABLA_A_CDC_RX7_VOL_CTL_B2_CTL,
577 -84, 40, digital_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700578
Bradley Rubin410383f2011-07-22 13:44:23 -0700579 SOC_SINGLE_S8_TLV("DEC1 Volume", TABLA_A_CDC_TX1_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700580 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700581 SOC_SINGLE_S8_TLV("DEC2 Volume", TABLA_A_CDC_TX2_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700582 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700583 SOC_SINGLE_S8_TLV("DEC3 Volume", TABLA_A_CDC_TX3_VOL_CTL_GAIN, -84, 40,
584 digital_gain),
585 SOC_SINGLE_S8_TLV("DEC4 Volume", TABLA_A_CDC_TX4_VOL_CTL_GAIN, -84, 40,
586 digital_gain),
587 SOC_SINGLE_S8_TLV("DEC5 Volume", TABLA_A_CDC_TX5_VOL_CTL_GAIN, -84, 40,
588 digital_gain),
589 SOC_SINGLE_S8_TLV("DEC6 Volume", TABLA_A_CDC_TX6_VOL_CTL_GAIN, -84, 40,
590 digital_gain),
591 SOC_SINGLE_S8_TLV("DEC7 Volume", TABLA_A_CDC_TX7_VOL_CTL_GAIN, -84, 40,
592 digital_gain),
593 SOC_SINGLE_S8_TLV("DEC8 Volume", TABLA_A_CDC_TX8_VOL_CTL_GAIN, -84, 40,
594 digital_gain),
595 SOC_SINGLE_S8_TLV("DEC9 Volume", TABLA_A_CDC_TX9_VOL_CTL_GAIN, -84, 40,
596 digital_gain),
597 SOC_SINGLE_S8_TLV("DEC10 Volume", TABLA_A_CDC_TX10_VOL_CTL_GAIN, -84,
598 40, digital_gain),
Patrick Lai29006372011-09-28 17:57:42 -0700599 SOC_SINGLE_S8_TLV("IIR1 INP1 Volume", TABLA_A_CDC_IIR1_GAIN_B1_CTL, -84,
600 40, digital_gain),
601 SOC_SINGLE_S8_TLV("IIR1 INP2 Volume", TABLA_A_CDC_IIR1_GAIN_B2_CTL, -84,
602 40, digital_gain),
603 SOC_SINGLE_S8_TLV("IIR1 INP3 Volume", TABLA_A_CDC_IIR1_GAIN_B3_CTL, -84,
604 40, digital_gain),
605 SOC_SINGLE_S8_TLV("IIR1 INP4 Volume", TABLA_A_CDC_IIR1_GAIN_B4_CTL, -84,
606 40, digital_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700607 SOC_SINGLE_TLV("ADC1 Volume", TABLA_A_TX_1_2_EN, 5, 3, 0, analog_gain),
608 SOC_SINGLE_TLV("ADC2 Volume", TABLA_A_TX_1_2_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700609 SOC_SINGLE_TLV("ADC3 Volume", TABLA_A_TX_3_4_EN, 5, 3, 0, analog_gain),
610 SOC_SINGLE_TLV("ADC4 Volume", TABLA_A_TX_3_4_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700611 SOC_SINGLE_TLV("ADC5 Volume", TABLA_A_TX_5_6_EN, 5, 3, 0, analog_gain),
612 SOC_SINGLE_TLV("ADC6 Volume", TABLA_A_TX_5_6_EN, 1, 3, 0, analog_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700613
614 SOC_SINGLE("MICBIAS1 CAPLESS Switch", TABLA_A_MICB_1_CTL, 4, 1, 1),
Santosh Mardi680b41e2011-11-22 16:51:16 -0800615 SOC_SINGLE("MICBIAS2 CAPLESS Switch", TABLA_A_MICB_2_CTL, 4, 1, 1),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700616 SOC_SINGLE("MICBIAS3 CAPLESS Switch", TABLA_A_MICB_3_CTL, 4, 1, 1),
Bradley Rubina7096d02011-08-03 18:29:02 -0700617
618 SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 0, 100, tabla_get_anc_slot,
619 tabla_put_anc_slot),
Santosh Mardi024010f2011-10-18 06:27:21 +0530620 SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
621 SOC_ENUM("TX2 HPF cut off", cf_dec2_enum),
622 SOC_ENUM("TX3 HPF cut off", cf_dec3_enum),
623 SOC_ENUM("TX4 HPF cut off", cf_dec4_enum),
624 SOC_ENUM("TX5 HPF cut off", cf_dec5_enum),
625 SOC_ENUM("TX6 HPF cut off", cf_dec6_enum),
626 SOC_ENUM("TX7 HPF cut off", cf_dec7_enum),
627 SOC_ENUM("TX8 HPF cut off", cf_dec8_enum),
628 SOC_ENUM("TX9 HPF cut off", cf_dec9_enum),
629 SOC_ENUM("TX10 HPF cut off", cf_dec10_enum),
630
631 SOC_SINGLE("TX1 HPF Switch", TABLA_A_CDC_TX1_MUX_CTL, 3, 1, 0),
632 SOC_SINGLE("TX2 HPF Switch", TABLA_A_CDC_TX2_MUX_CTL, 3, 1, 0),
633 SOC_SINGLE("TX3 HPF Switch", TABLA_A_CDC_TX3_MUX_CTL, 3, 1, 0),
634 SOC_SINGLE("TX4 HPF Switch", TABLA_A_CDC_TX4_MUX_CTL, 3, 1, 0),
635 SOC_SINGLE("TX5 HPF Switch", TABLA_A_CDC_TX5_MUX_CTL, 3, 1, 0),
636 SOC_SINGLE("TX6 HPF Switch", TABLA_A_CDC_TX6_MUX_CTL, 3, 1, 0),
637 SOC_SINGLE("TX7 HPF Switch", TABLA_A_CDC_TX7_MUX_CTL, 3, 1, 0),
638 SOC_SINGLE("TX8 HPF Switch", TABLA_A_CDC_TX8_MUX_CTL, 3, 1, 0),
639 SOC_SINGLE("TX9 HPF Switch", TABLA_A_CDC_TX9_MUX_CTL, 3, 1, 0),
640 SOC_SINGLE("TX10 HPF Switch", TABLA_A_CDC_TX10_MUX_CTL, 3, 1, 0),
641
642 SOC_SINGLE("RX1 HPF Switch", TABLA_A_CDC_RX1_B5_CTL, 2, 1, 0),
643 SOC_SINGLE("RX2 HPF Switch", TABLA_A_CDC_RX2_B5_CTL, 2, 1, 0),
644 SOC_SINGLE("RX3 HPF Switch", TABLA_A_CDC_RX3_B5_CTL, 2, 1, 0),
645 SOC_SINGLE("RX4 HPF Switch", TABLA_A_CDC_RX4_B5_CTL, 2, 1, 0),
646 SOC_SINGLE("RX5 HPF Switch", TABLA_A_CDC_RX5_B5_CTL, 2, 1, 0),
647 SOC_SINGLE("RX6 HPF Switch", TABLA_A_CDC_RX6_B5_CTL, 2, 1, 0),
648 SOC_SINGLE("RX7 HPF Switch", TABLA_A_CDC_RX7_B5_CTL, 2, 1, 0),
649
650 SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
651 SOC_ENUM("RX2 HPF cut off", cf_rxmix2_enum),
652 SOC_ENUM("RX3 HPF cut off", cf_rxmix3_enum),
653 SOC_ENUM("RX4 HPF cut off", cf_rxmix4_enum),
654 SOC_ENUM("RX5 HPF cut off", cf_rxmix5_enum),
655 SOC_ENUM("RX6 HPF cut off", cf_rxmix6_enum),
656 SOC_ENUM("RX7 HPF cut off", cf_rxmix7_enum),
Ben Romberger1f045a72011-11-04 10:14:57 -0700657
658 SOC_SINGLE_EXT("IIR1 Enable Band1", IIR1, BAND1, 1, 0,
659 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
660 SOC_SINGLE_EXT("IIR1 Enable Band2", IIR1, BAND2, 1, 0,
661 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
662 SOC_SINGLE_EXT("IIR1 Enable Band3", IIR1, BAND3, 1, 0,
663 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
664 SOC_SINGLE_EXT("IIR1 Enable Band4", IIR1, BAND4, 1, 0,
665 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
666 SOC_SINGLE_EXT("IIR1 Enable Band5", IIR1, BAND5, 1, 0,
667 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
668 SOC_SINGLE_EXT("IIR2 Enable Band1", IIR2, BAND1, 1, 0,
669 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
670 SOC_SINGLE_EXT("IIR2 Enable Band2", IIR2, BAND2, 1, 0,
671 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
672 SOC_SINGLE_EXT("IIR2 Enable Band3", IIR2, BAND3, 1, 0,
673 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
674 SOC_SINGLE_EXT("IIR2 Enable Band4", IIR2, BAND4, 1, 0,
675 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
676 SOC_SINGLE_EXT("IIR2 Enable Band5", IIR2, BAND5, 1, 0,
677 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
678
679 SOC_SINGLE_MULTI_EXT("IIR1 Band1", IIR1, BAND1, 255, 0, 5,
680 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
681 SOC_SINGLE_MULTI_EXT("IIR1 Band2", IIR1, BAND2, 255, 0, 5,
682 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
683 SOC_SINGLE_MULTI_EXT("IIR1 Band3", IIR1, BAND3, 255, 0, 5,
684 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
685 SOC_SINGLE_MULTI_EXT("IIR1 Band4", IIR1, BAND4, 255, 0, 5,
686 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
687 SOC_SINGLE_MULTI_EXT("IIR1 Band5", IIR1, BAND5, 255, 0, 5,
688 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
689 SOC_SINGLE_MULTI_EXT("IIR2 Band1", IIR2, BAND1, 255, 0, 5,
690 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
691 SOC_SINGLE_MULTI_EXT("IIR2 Band2", IIR2, BAND2, 255, 0, 5,
692 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
693 SOC_SINGLE_MULTI_EXT("IIR2 Band3", IIR2, BAND3, 255, 0, 5,
694 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
695 SOC_SINGLE_MULTI_EXT("IIR2 Band4", IIR2, BAND4, 255, 0, 5,
696 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
697 SOC_SINGLE_MULTI_EXT("IIR2 Band5", IIR2, BAND5, 255, 0, 5,
698 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700699};
700
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800701static const struct snd_kcontrol_new tabla_1_x_snd_controls[] = {
702 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_1_A_MICB_4_CTL, 4, 1, 1),
703};
704
705static const struct snd_kcontrol_new tabla_2_higher_snd_controls[] = {
706 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_2_A_MICB_4_CTL, 4, 1, 1),
707};
708
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700709static const char *rx_mix1_text[] = {
710 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2", "RX1", "RX2", "RX3", "RX4",
711 "RX5", "RX6", "RX7"
712};
713
Kiran Kandi8b3a8302011-09-27 16:13:28 -0700714static const char *rx_dsm_text[] = {
715 "CIC_OUT", "DSM_INV"
716};
717
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700718static const char *sb_tx1_mux_text[] = {
719 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
720 "DEC1"
721};
722
723static const char *sb_tx5_mux_text[] = {
724 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
725 "DEC5"
726};
727
728static const char *sb_tx6_mux_text[] = {
729 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
730 "DEC6"
731};
732
733static const char const *sb_tx7_to_tx10_mux_text[] = {
734 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
735 "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
736 "DEC9", "DEC10"
737};
738
739static const char *dec1_mux_text[] = {
740 "ZERO", "DMIC1", "ADC6",
741};
742
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700743static const char *dec2_mux_text[] = {
744 "ZERO", "DMIC2", "ADC5",
745};
746
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700747static const char *dec3_mux_text[] = {
748 "ZERO", "DMIC3", "ADC4",
749};
750
751static const char *dec4_mux_text[] = {
752 "ZERO", "DMIC4", "ADC3",
753};
754
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700755static const char *dec5_mux_text[] = {
756 "ZERO", "DMIC5", "ADC2",
757};
758
759static const char *dec6_mux_text[] = {
760 "ZERO", "DMIC6", "ADC1",
761};
762
763static const char const *dec7_mux_text[] = {
764 "ZERO", "DMIC1", "DMIC6", "ADC1", "ADC6", "ANC1_FB", "ANC2_FB",
765};
766
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700767static const char *dec8_mux_text[] = {
768 "ZERO", "DMIC2", "DMIC5", "ADC2", "ADC5",
769};
770
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700771static const char *dec9_mux_text[] = {
772 "ZERO", "DMIC4", "DMIC5", "ADC2", "ADC3", "ADCMB", "ANC1_FB", "ANC2_FB",
773};
774
775static const char *dec10_mux_text[] = {
776 "ZERO", "DMIC3", "DMIC6", "ADC1", "ADC4", "ADCMB", "ANC1_FB", "ANC2_FB",
777};
778
Bradley Rubin229c6a52011-07-12 16:18:48 -0700779static const char const *anc_mux_text[] = {
780 "ZERO", "ADC1", "ADC2", "ADC3", "ADC4", "ADC5", "ADC6", "ADC_MB",
781 "RSVD_1", "DMIC1", "DMIC2", "DMIC3", "DMIC4", "DMIC5", "DMIC6"
782};
783
784static const char const *anc1_fb_mux_text[] = {
785 "ZERO", "EAR_HPH_L", "EAR_LINE_1",
786};
787
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700788static const char *iir1_inp1_text[] = {
789 "ZERO", "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
790 "DEC9", "DEC10", "RX1", "RX2", "RX3", "RX4", "RX5", "RX6", "RX7"
791};
792
793static const struct soc_enum rx_mix1_inp1_chain_enum =
794 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 0, 12, rx_mix1_text);
795
Bradley Rubin229c6a52011-07-12 16:18:48 -0700796static const struct soc_enum rx_mix1_inp2_chain_enum =
797 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 4, 12, rx_mix1_text);
798
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700799static const struct soc_enum rx2_mix1_inp1_chain_enum =
800 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 0, 12, rx_mix1_text);
801
Bradley Rubin229c6a52011-07-12 16:18:48 -0700802static const struct soc_enum rx2_mix1_inp2_chain_enum =
803 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 4, 12, rx_mix1_text);
804
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700805static const struct soc_enum rx3_mix1_inp1_chain_enum =
806 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 0, 12, rx_mix1_text);
807
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700808static const struct soc_enum rx3_mix1_inp2_chain_enum =
809 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 4, 12, rx_mix1_text);
810
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700811static const struct soc_enum rx4_mix1_inp1_chain_enum =
812 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 0, 12, rx_mix1_text);
813
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700814static const struct soc_enum rx4_mix1_inp2_chain_enum =
815 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 4, 12, rx_mix1_text);
816
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700817static const struct soc_enum rx5_mix1_inp1_chain_enum =
818 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 0, 12, rx_mix1_text);
819
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700820static const struct soc_enum rx5_mix1_inp2_chain_enum =
821 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 4, 12, rx_mix1_text);
822
823static const struct soc_enum rx6_mix1_inp1_chain_enum =
824 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 0, 12, rx_mix1_text);
825
826static const struct soc_enum rx6_mix1_inp2_chain_enum =
827 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 4, 12, rx_mix1_text);
828
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700829static const struct soc_enum rx7_mix1_inp1_chain_enum =
830 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 0, 12, rx_mix1_text);
831
832static const struct soc_enum rx7_mix1_inp2_chain_enum =
833 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 4, 12, rx_mix1_text);
834
Kiran Kandi8b3a8302011-09-27 16:13:28 -0700835static const struct soc_enum rx4_dsm_enum =
836 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B6_CTL, 4, 2, rx_dsm_text);
837
838static const struct soc_enum rx6_dsm_enum =
839 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B6_CTL, 4, 2, rx_dsm_text);
840
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700841static const struct soc_enum sb_tx5_mux_enum =
842 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0, 9, sb_tx5_mux_text);
843
844static const struct soc_enum sb_tx6_mux_enum =
845 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0, 9, sb_tx6_mux_text);
846
847static const struct soc_enum sb_tx7_mux_enum =
848 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0, 18,
849 sb_tx7_to_tx10_mux_text);
850
851static const struct soc_enum sb_tx8_mux_enum =
852 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0, 18,
853 sb_tx7_to_tx10_mux_text);
854
Kiran Kandi3426e512011-09-13 22:50:10 -0700855static const struct soc_enum sb_tx9_mux_enum =
856 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0, 18,
857 sb_tx7_to_tx10_mux_text);
858
859static const struct soc_enum sb_tx10_mux_enum =
860 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0, 18,
861 sb_tx7_to_tx10_mux_text);
862
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700863static const struct soc_enum sb_tx1_mux_enum =
864 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0, 9, sb_tx1_mux_text);
865
866static const struct soc_enum dec1_mux_enum =
867 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 0, 3, dec1_mux_text);
868
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700869static const struct soc_enum dec2_mux_enum =
870 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 2, 3, dec2_mux_text);
871
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700872static const struct soc_enum dec3_mux_enum =
873 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 4, 3, dec3_mux_text);
874
875static const struct soc_enum dec4_mux_enum =
876 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 6, 3, dec4_mux_text);
877
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700878static const struct soc_enum dec5_mux_enum =
879 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 0, 3, dec5_mux_text);
880
881static const struct soc_enum dec6_mux_enum =
882 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 2, 3, dec6_mux_text);
883
884static const struct soc_enum dec7_mux_enum =
885 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 4, 7, dec7_mux_text);
886
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700887static const struct soc_enum dec8_mux_enum =
888 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 0, 7, dec8_mux_text);
889
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700890static const struct soc_enum dec9_mux_enum =
891 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 3, 8, dec9_mux_text);
892
893static const struct soc_enum dec10_mux_enum =
894 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B4_CTL, 0, 8, dec10_mux_text);
895
Bradley Rubin229c6a52011-07-12 16:18:48 -0700896static const struct soc_enum anc1_mux_enum =
897 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 0, 16, anc_mux_text);
898
899static const struct soc_enum anc2_mux_enum =
900 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 4, 16, anc_mux_text);
901
902static const struct soc_enum anc1_fb_mux_enum =
903 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B2_CTL, 0, 3, anc1_fb_mux_text);
904
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700905static const struct soc_enum iir1_inp1_mux_enum =
906 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_EQ1_B1_CTL, 0, 18, iir1_inp1_text);
907
908static const struct snd_kcontrol_new rx_mix1_inp1_mux =
909 SOC_DAPM_ENUM("RX1 MIX1 INP1 Mux", rx_mix1_inp1_chain_enum);
910
Bradley Rubin229c6a52011-07-12 16:18:48 -0700911static const struct snd_kcontrol_new rx_mix1_inp2_mux =
912 SOC_DAPM_ENUM("RX1 MIX1 INP2 Mux", rx_mix1_inp2_chain_enum);
913
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700914static const struct snd_kcontrol_new rx2_mix1_inp1_mux =
915 SOC_DAPM_ENUM("RX2 MIX1 INP1 Mux", rx2_mix1_inp1_chain_enum);
916
Bradley Rubin229c6a52011-07-12 16:18:48 -0700917static const struct snd_kcontrol_new rx2_mix1_inp2_mux =
918 SOC_DAPM_ENUM("RX2 MIX1 INP2 Mux", rx2_mix1_inp2_chain_enum);
919
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700920static const struct snd_kcontrol_new rx3_mix1_inp1_mux =
921 SOC_DAPM_ENUM("RX3 MIX1 INP1 Mux", rx3_mix1_inp1_chain_enum);
922
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700923static const struct snd_kcontrol_new rx3_mix1_inp2_mux =
924 SOC_DAPM_ENUM("RX3 MIX1 INP2 Mux", rx3_mix1_inp2_chain_enum);
925
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700926static const struct snd_kcontrol_new rx4_mix1_inp1_mux =
927 SOC_DAPM_ENUM("RX4 MIX1 INP1 Mux", rx4_mix1_inp1_chain_enum);
928
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700929static const struct snd_kcontrol_new rx4_mix1_inp2_mux =
930 SOC_DAPM_ENUM("RX4 MIX1 INP2 Mux", rx4_mix1_inp2_chain_enum);
931
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700932static const struct snd_kcontrol_new rx5_mix1_inp1_mux =
933 SOC_DAPM_ENUM("RX5 MIX1 INP1 Mux", rx5_mix1_inp1_chain_enum);
934
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700935static const struct snd_kcontrol_new rx5_mix1_inp2_mux =
936 SOC_DAPM_ENUM("RX5 MIX1 INP2 Mux", rx5_mix1_inp2_chain_enum);
937
938static const struct snd_kcontrol_new rx6_mix1_inp1_mux =
939 SOC_DAPM_ENUM("RX6 MIX1 INP1 Mux", rx6_mix1_inp1_chain_enum);
940
941static const struct snd_kcontrol_new rx6_mix1_inp2_mux =
942 SOC_DAPM_ENUM("RX6 MIX1 INP2 Mux", rx6_mix1_inp2_chain_enum);
943
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700944static const struct snd_kcontrol_new rx7_mix1_inp1_mux =
945 SOC_DAPM_ENUM("RX7 MIX1 INP1 Mux", rx7_mix1_inp1_chain_enum);
946
947static const struct snd_kcontrol_new rx7_mix1_inp2_mux =
948 SOC_DAPM_ENUM("RX7 MIX1 INP2 Mux", rx7_mix1_inp2_chain_enum);
949
Kiran Kandi8b3a8302011-09-27 16:13:28 -0700950static const struct snd_kcontrol_new rx4_dsm_mux =
951 SOC_DAPM_ENUM("RX4 DSM MUX Mux", rx4_dsm_enum);
952
953static const struct snd_kcontrol_new rx6_dsm_mux =
954 SOC_DAPM_ENUM("RX6 DSM MUX Mux", rx6_dsm_enum);
955
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700956static const struct snd_kcontrol_new sb_tx5_mux =
957 SOC_DAPM_ENUM("SLIM TX5 MUX Mux", sb_tx5_mux_enum);
958
959static const struct snd_kcontrol_new sb_tx6_mux =
960 SOC_DAPM_ENUM("SLIM TX6 MUX Mux", sb_tx6_mux_enum);
961
962static const struct snd_kcontrol_new sb_tx7_mux =
963 SOC_DAPM_ENUM("SLIM TX7 MUX Mux", sb_tx7_mux_enum);
964
965static const struct snd_kcontrol_new sb_tx8_mux =
966 SOC_DAPM_ENUM("SLIM TX8 MUX Mux", sb_tx8_mux_enum);
967
Kiran Kandi3426e512011-09-13 22:50:10 -0700968static const struct snd_kcontrol_new sb_tx9_mux =
969 SOC_DAPM_ENUM("SLIM TX9 MUX Mux", sb_tx9_mux_enum);
970
971static const struct snd_kcontrol_new sb_tx10_mux =
972 SOC_DAPM_ENUM("SLIM TX10 MUX Mux", sb_tx10_mux_enum);
973
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700974static const struct snd_kcontrol_new sb_tx1_mux =
975 SOC_DAPM_ENUM("SLIM TX1 MUX Mux", sb_tx1_mux_enum);
976
977static const struct snd_kcontrol_new dec1_mux =
978 SOC_DAPM_ENUM("DEC1 MUX Mux", dec1_mux_enum);
979
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700980static const struct snd_kcontrol_new dec2_mux =
981 SOC_DAPM_ENUM("DEC2 MUX Mux", dec2_mux_enum);
982
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700983static const struct snd_kcontrol_new dec3_mux =
984 SOC_DAPM_ENUM("DEC3 MUX Mux", dec3_mux_enum);
985
986static const struct snd_kcontrol_new dec4_mux =
987 SOC_DAPM_ENUM("DEC4 MUX Mux", dec4_mux_enum);
988
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700989static const struct snd_kcontrol_new dec5_mux =
990 SOC_DAPM_ENUM("DEC5 MUX Mux", dec5_mux_enum);
991
992static const struct snd_kcontrol_new dec6_mux =
993 SOC_DAPM_ENUM("DEC6 MUX Mux", dec6_mux_enum);
994
995static const struct snd_kcontrol_new dec7_mux =
996 SOC_DAPM_ENUM("DEC7 MUX Mux", dec7_mux_enum);
997
Bradley Rubin229c6a52011-07-12 16:18:48 -0700998static const struct snd_kcontrol_new anc1_mux =
999 SOC_DAPM_ENUM("ANC1 MUX Mux", anc1_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001000static const struct snd_kcontrol_new dec8_mux =
1001 SOC_DAPM_ENUM("DEC8 MUX Mux", dec8_mux_enum);
1002
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001003static const struct snd_kcontrol_new dec9_mux =
1004 SOC_DAPM_ENUM("DEC9 MUX Mux", dec9_mux_enum);
1005
1006static const struct snd_kcontrol_new dec10_mux =
1007 SOC_DAPM_ENUM("DEC10 MUX Mux", dec10_mux_enum);
1008
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001009static const struct snd_kcontrol_new iir1_inp1_mux =
1010 SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);
1011
Bradley Rubin229c6a52011-07-12 16:18:48 -07001012static const struct snd_kcontrol_new anc2_mux =
1013 SOC_DAPM_ENUM("ANC2 MUX Mux", anc2_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001014
Bradley Rubin229c6a52011-07-12 16:18:48 -07001015static const struct snd_kcontrol_new anc1_fb_mux =
1016 SOC_DAPM_ENUM("ANC1 FB MUX Mux", anc1_fb_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001017
Bradley Rubin229c6a52011-07-12 16:18:48 -07001018static const struct snd_kcontrol_new dac1_switch[] = {
1019 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_EAR_EN, 5, 1, 0)
1020};
1021static const struct snd_kcontrol_new hphl_switch[] = {
1022 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_HPH_L_DAC_CTL, 6, 1, 0)
1023};
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001024
1025static const struct snd_kcontrol_new lineout3_ground_switch =
1026 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_3_DAC_CTL, 6, 1, 0);
1027
1028static const struct snd_kcontrol_new lineout4_ground_switch =
1029 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_4_DAC_CTL, 6, 1, 0);
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001030
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001031static void tabla_codec_enable_adc_block(struct snd_soc_codec *codec,
1032 int enable)
1033{
1034 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1035
1036 pr_debug("%s %d\n", __func__, enable);
1037
1038 if (enable) {
1039 tabla->adc_count++;
1040 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0xE0);
1041 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x2, 0x2);
1042 } else {
1043 tabla->adc_count--;
1044 if (!tabla->adc_count) {
1045 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL,
1046 0x2, 0x0);
1047 if (!tabla->mbhc_polling_active)
1048 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS,
1049 0xE0, 0x0);
1050 }
1051 }
1052}
1053
1054static int tabla_codec_enable_adc(struct snd_soc_dapm_widget *w,
1055 struct snd_kcontrol *kcontrol, int event)
1056{
1057 struct snd_soc_codec *codec = w->codec;
1058 u16 adc_reg;
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001059 u8 init_bit_shift;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001060
1061 pr_debug("%s %d\n", __func__, event);
1062
1063 if (w->reg == TABLA_A_TX_1_2_EN)
1064 adc_reg = TABLA_A_TX_1_2_TEST_CTL;
1065 else if (w->reg == TABLA_A_TX_3_4_EN)
1066 adc_reg = TABLA_A_TX_3_4_TEST_CTL;
1067 else if (w->reg == TABLA_A_TX_5_6_EN)
1068 adc_reg = TABLA_A_TX_5_6_TEST_CTL;
1069 else {
1070 pr_err("%s: Error, invalid adc register\n", __func__);
1071 return -EINVAL;
1072 }
1073
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001074 if (w->shift == 3)
1075 init_bit_shift = 6;
1076 else if (w->shift == 7)
1077 init_bit_shift = 7;
1078 else {
1079 pr_err("%s: Error, invalid init bit postion adc register\n",
1080 __func__);
1081 return -EINVAL;
1082 }
1083
1084
1085
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001086 switch (event) {
1087 case SND_SOC_DAPM_PRE_PMU:
1088 tabla_codec_enable_adc_block(codec, 1);
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001089 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift,
1090 1 << init_bit_shift);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001091 break;
1092 case SND_SOC_DAPM_POST_PMU:
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001093
1094 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift, 0x00);
1095
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001096 break;
1097 case SND_SOC_DAPM_POST_PMD:
1098 tabla_codec_enable_adc_block(codec, 0);
1099 break;
1100 }
1101 return 0;
1102}
1103
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001104static int tabla_codec_enable_lineout(struct snd_soc_dapm_widget *w,
1105 struct snd_kcontrol *kcontrol, int event)
1106{
1107 struct snd_soc_codec *codec = w->codec;
1108 u16 lineout_gain_reg;
1109
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001110 pr_debug("%s %d %s\n", __func__, event, w->name);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001111
1112 switch (w->shift) {
1113 case 0:
1114 lineout_gain_reg = TABLA_A_RX_LINE_1_GAIN;
1115 break;
1116 case 1:
1117 lineout_gain_reg = TABLA_A_RX_LINE_2_GAIN;
1118 break;
1119 case 2:
1120 lineout_gain_reg = TABLA_A_RX_LINE_3_GAIN;
1121 break;
1122 case 3:
1123 lineout_gain_reg = TABLA_A_RX_LINE_4_GAIN;
1124 break;
1125 case 4:
1126 lineout_gain_reg = TABLA_A_RX_LINE_5_GAIN;
1127 break;
1128 default:
1129 pr_err("%s: Error, incorrect lineout register value\n",
1130 __func__);
1131 return -EINVAL;
1132 }
1133
1134 switch (event) {
1135 case SND_SOC_DAPM_PRE_PMU:
1136 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x40);
1137 break;
1138 case SND_SOC_DAPM_POST_PMU:
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08001139 pr_debug("%s: sleeping 16 ms after %s PA turn on\n",
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001140 __func__, w->name);
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08001141 usleep_range(16000, 16000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001142 break;
1143 case SND_SOC_DAPM_POST_PMD:
1144 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x00);
1145 break;
1146 }
1147 return 0;
1148}
1149
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001150
1151static int tabla_codec_enable_dmic(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001152 struct snd_kcontrol *kcontrol, int event)
1153{
1154 struct snd_soc_codec *codec = w->codec;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001155 u16 tx_mux_ctl_reg, tx_dmic_ctl_reg;
1156 u8 dmic_clk_sel, dmic_clk_en;
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07001157 unsigned int dmic;
1158 int ret;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001159
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07001160 ret = kstrtouint(strpbrk(w->name, "123456"), 10, &dmic);
1161 if (ret < 0) {
1162 pr_err("%s: Invalid DMIC line on the codec\n", __func__);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001163 return -EINVAL;
1164 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001165
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07001166 switch (dmic) {
1167 case 1:
1168 case 2:
1169 dmic_clk_sel = 0x02;
1170 dmic_clk_en = 0x01;
1171 break;
1172
1173 case 3:
1174 case 4:
1175 dmic_clk_sel = 0x08;
1176 dmic_clk_en = 0x04;
1177 break;
1178
1179 case 5:
1180 case 6:
1181 dmic_clk_sel = 0x20;
1182 dmic_clk_en = 0x10;
1183 break;
1184
1185 default:
1186 pr_err("%s: Invalid DMIC Selection\n", __func__);
1187 return -EINVAL;
1188 }
1189
1190 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (dmic - 1);
1191 tx_dmic_ctl_reg = TABLA_A_CDC_TX1_DMIC_CTL + 8 * (dmic - 1);
1192
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001193 pr_debug("%s %d\n", __func__, event);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001194
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001195 switch (event) {
1196 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001197 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x1, 0x1);
1198
1199 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
1200 dmic_clk_sel, dmic_clk_sel);
1201
1202 snd_soc_update_bits(codec, tx_dmic_ctl_reg, 0x1, 0x1);
1203
1204 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
1205 dmic_clk_en, dmic_clk_en);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001206 break;
1207 case SND_SOC_DAPM_POST_PMD:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001208 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
1209 dmic_clk_en, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001210 break;
1211 }
1212 return 0;
1213}
1214
Bradley Rubin229c6a52011-07-12 16:18:48 -07001215static int tabla_codec_enable_anc(struct snd_soc_dapm_widget *w,
1216 struct snd_kcontrol *kcontrol, int event)
1217{
1218 struct snd_soc_codec *codec = w->codec;
1219 const char *filename;
1220 const struct firmware *fw;
1221 int i;
1222 int ret;
Bradley Rubina7096d02011-08-03 18:29:02 -07001223 int num_anc_slots;
1224 struct anc_header *anc_head;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001225 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubina7096d02011-08-03 18:29:02 -07001226 u32 anc_writes_size = 0;
1227 int anc_size_remaining;
1228 u32 *anc_ptr;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001229 u16 reg;
1230 u8 mask, val, old_val;
1231
1232 pr_debug("%s %d\n", __func__, event);
1233 switch (event) {
1234 case SND_SOC_DAPM_PRE_PMU:
1235
Bradley Rubin4283a4c2011-07-29 16:18:54 -07001236 filename = "wcd9310/wcd9310_anc.bin";
Bradley Rubin229c6a52011-07-12 16:18:48 -07001237
1238 ret = request_firmware(&fw, filename, codec->dev);
1239 if (ret != 0) {
1240 dev_err(codec->dev, "Failed to acquire ANC data: %d\n",
1241 ret);
1242 return -ENODEV;
1243 }
1244
Bradley Rubina7096d02011-08-03 18:29:02 -07001245 if (fw->size < sizeof(struct anc_header)) {
Bradley Rubin229c6a52011-07-12 16:18:48 -07001246 dev_err(codec->dev, "Not enough data\n");
1247 release_firmware(fw);
1248 return -ENOMEM;
1249 }
1250
1251 /* First number is the number of register writes */
Bradley Rubina7096d02011-08-03 18:29:02 -07001252 anc_head = (struct anc_header *)(fw->data);
1253 anc_ptr = (u32 *)((u32)fw->data + sizeof(struct anc_header));
1254 anc_size_remaining = fw->size - sizeof(struct anc_header);
1255 num_anc_slots = anc_head->num_anc_slots;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001256
Bradley Rubina7096d02011-08-03 18:29:02 -07001257 if (tabla->anc_slot >= num_anc_slots) {
1258 dev_err(codec->dev, "Invalid ANC slot selected\n");
1259 release_firmware(fw);
1260 return -EINVAL;
1261 }
1262
1263 for (i = 0; i < num_anc_slots; i++) {
1264
1265 if (anc_size_remaining < TABLA_PACKED_REG_SIZE) {
1266 dev_err(codec->dev, "Invalid register format\n");
1267 release_firmware(fw);
1268 return -EINVAL;
1269 }
1270 anc_writes_size = (u32)(*anc_ptr);
1271 anc_size_remaining -= sizeof(u32);
1272 anc_ptr += 1;
1273
1274 if (anc_writes_size * TABLA_PACKED_REG_SIZE
1275 > anc_size_remaining) {
1276 dev_err(codec->dev, "Invalid register format\n");
1277 release_firmware(fw);
1278 return -ENOMEM;
1279 }
1280
1281 if (tabla->anc_slot == i)
1282 break;
1283
1284 anc_size_remaining -= (anc_writes_size *
1285 TABLA_PACKED_REG_SIZE);
Bradley Rubin939ff3f2011-08-26 17:19:34 -07001286 anc_ptr += anc_writes_size;
Bradley Rubina7096d02011-08-03 18:29:02 -07001287 }
1288 if (i == num_anc_slots) {
1289 dev_err(codec->dev, "Selected ANC slot not present\n");
Bradley Rubin229c6a52011-07-12 16:18:48 -07001290 release_firmware(fw);
1291 return -ENOMEM;
1292 }
1293
Bradley Rubina7096d02011-08-03 18:29:02 -07001294 for (i = 0; i < anc_writes_size; i++) {
1295 TABLA_CODEC_UNPACK_ENTRY(anc_ptr[i], reg,
Bradley Rubin229c6a52011-07-12 16:18:48 -07001296 mask, val);
1297 old_val = snd_soc_read(codec, reg);
Bradley Rubin4283a4c2011-07-29 16:18:54 -07001298 snd_soc_write(codec, reg, (old_val & ~mask) |
1299 (val & mask));
Bradley Rubin229c6a52011-07-12 16:18:48 -07001300 }
1301 release_firmware(fw);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001302
1303 break;
1304 case SND_SOC_DAPM_POST_PMD:
1305 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_RESET_CTL, 0xFF);
1306 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_CLK_EN_CTL, 0);
1307 break;
1308 }
1309 return 0;
1310}
1311
1312
Bradley Rubincb3950a2011-08-18 13:07:26 -07001313static void tabla_codec_disable_button_presses(struct snd_soc_codec *codec)
1314{
1315 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL, 0x80);
1316 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL, 0x00);
1317}
1318
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001319static void tabla_codec_start_hs_polling(struct snd_soc_codec *codec)
1320{
Bradley Rubincb3950a2011-08-18 13:07:26 -07001321 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1322
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001323 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05301324 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
Bradley Rubincb3950a2011-08-18 13:07:26 -07001325 if (!tabla->no_mic_headset_override) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05301326 wcd9xxx_enable_irq(codec->control_data,
1327 TABLA_IRQ_MBHC_POTENTIAL);
1328 wcd9xxx_enable_irq(codec->control_data,
1329 TABLA_IRQ_MBHC_RELEASE);
Bradley Rubincb3950a2011-08-18 13:07:26 -07001330 } else {
1331 tabla_codec_disable_button_presses(codec);
1332 }
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001333 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
1334 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
1335 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
1336}
1337
1338static void tabla_codec_pause_hs_polling(struct snd_soc_codec *codec)
1339{
Bradley Rubincb3950a2011-08-18 13:07:26 -07001340 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1341
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001342 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05301343 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
Bradley Rubincb3950a2011-08-18 13:07:26 -07001344 if (!tabla->no_mic_headset_override) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05301345 wcd9xxx_disable_irq(codec->control_data,
Bradley Rubincb3950a2011-08-18 13:07:26 -07001346 TABLA_IRQ_MBHC_POTENTIAL);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05301347 wcd9xxx_disable_irq(codec->control_data,
1348 TABLA_IRQ_MBHC_RELEASE);
Bradley Rubincb3950a2011-08-18 13:07:26 -07001349 }
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001350}
1351
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08001352static void tabla_codec_switch_cfilt_mode(struct snd_soc_codec *codec,
1353 int mode)
1354{
1355 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1356 u8 reg_mode_val, cur_mode_val;
1357 bool mbhc_was_polling = false;
1358
1359 if (mode)
1360 reg_mode_val = TABLA_CFILT_FAST_MODE;
1361 else
1362 reg_mode_val = TABLA_CFILT_SLOW_MODE;
1363
1364 cur_mode_val = snd_soc_read(codec,
1365 tabla->mbhc_bias_regs.cfilt_ctl) & 0x40;
1366
1367 if (cur_mode_val != reg_mode_val) {
1368 if (tabla->mbhc_polling_active) {
1369 tabla_codec_pause_hs_polling(codec);
1370 mbhc_was_polling = true;
1371 }
1372 snd_soc_update_bits(codec,
1373 tabla->mbhc_bias_regs.cfilt_ctl, 0x40, reg_mode_val);
1374 if (mbhc_was_polling)
1375 tabla_codec_start_hs_polling(codec);
1376 pr_debug("%s: CFILT mode change (%x to %x)\n", __func__,
1377 cur_mode_val, reg_mode_val);
1378 } else {
1379 pr_debug("%s: CFILT Value is already %x\n",
1380 __func__, cur_mode_val);
1381 }
1382}
1383
1384static void tabla_codec_update_cfilt_usage(struct snd_soc_codec *codec,
1385 u8 cfilt_sel, int inc)
1386{
1387 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1388 u32 *cfilt_cnt_ptr = NULL;
1389 u16 micb_cfilt_reg;
1390
1391 switch (cfilt_sel) {
1392 case TABLA_CFILT1_SEL:
1393 cfilt_cnt_ptr = &tabla->cfilt1_cnt;
1394 micb_cfilt_reg = TABLA_A_MICB_CFILT_1_CTL;
1395 break;
1396 case TABLA_CFILT2_SEL:
1397 cfilt_cnt_ptr = &tabla->cfilt2_cnt;
1398 micb_cfilt_reg = TABLA_A_MICB_CFILT_2_CTL;
1399 break;
1400 case TABLA_CFILT3_SEL:
1401 cfilt_cnt_ptr = &tabla->cfilt3_cnt;
1402 micb_cfilt_reg = TABLA_A_MICB_CFILT_3_CTL;
1403 break;
1404 default:
1405 return; /* should not happen */
1406 }
1407
1408 if (inc) {
1409 if (!(*cfilt_cnt_ptr)++) {
1410 /* Switch CFILT to slow mode if MBHC CFILT being used */
1411 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
1412 tabla_codec_switch_cfilt_mode(codec, 0);
1413
1414 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0x80);
1415 }
1416 } else {
1417 /* check if count not zero, decrement
1418 * then check if zero, go ahead disable cfilter
1419 */
1420 if ((*cfilt_cnt_ptr) && !--(*cfilt_cnt_ptr)) {
1421 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0);
1422
1423 /* Switch CFILT to fast mode if MBHC CFILT being used */
1424 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
1425 tabla_codec_switch_cfilt_mode(codec, 1);
1426 }
1427 }
1428}
1429
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001430static int tabla_find_k_value(unsigned int ldoh_v, unsigned int cfilt_mv)
1431{
1432 int rc = -EINVAL;
1433 unsigned min_mv, max_mv;
1434
1435 switch (ldoh_v) {
1436 case TABLA_LDOH_1P95_V:
1437 min_mv = 160;
1438 max_mv = 1800;
1439 break;
1440 case TABLA_LDOH_2P35_V:
1441 min_mv = 200;
1442 max_mv = 2200;
1443 break;
1444 case TABLA_LDOH_2P75_V:
1445 min_mv = 240;
1446 max_mv = 2600;
1447 break;
1448 case TABLA_LDOH_2P85_V:
1449 min_mv = 250;
1450 max_mv = 2700;
1451 break;
1452 default:
1453 goto done;
1454 }
1455
1456 if (cfilt_mv < min_mv || cfilt_mv > max_mv)
1457 goto done;
1458
1459 for (rc = 4; rc <= 44; rc++) {
1460 min_mv = max_mv * (rc) / 44;
1461 if (min_mv >= cfilt_mv) {
1462 rc -= 4;
1463 break;
1464 }
1465 }
1466done:
1467 return rc;
1468}
1469
1470static bool tabla_is_hph_pa_on(struct snd_soc_codec *codec)
1471{
1472 u8 hph_reg_val = 0;
1473 hph_reg_val = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_EN);
1474
1475 return (hph_reg_val & 0x30) ? true : false;
1476}
1477
Joonwoo Parka9444452011-12-08 18:48:27 -08001478static bool tabla_is_hph_dac_on(struct snd_soc_codec *codec, int left)
1479{
1480 u8 hph_reg_val = 0;
1481 if (left)
1482 hph_reg_val = snd_soc_read(codec,
1483 TABLA_A_RX_HPH_L_DAC_CTL);
1484 else
1485 hph_reg_val = snd_soc_read(codec,
1486 TABLA_A_RX_HPH_R_DAC_CTL);
1487
1488 return (hph_reg_val & 0xC0) ? true : false;
1489}
1490
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001491static void tabla_codec_switch_micbias(struct snd_soc_codec *codec,
1492 int vddio_switch)
1493{
1494 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1495 int cfilt_k_val;
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001496 bool mbhc_was_polling = false;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001497
1498 switch (vddio_switch) {
1499 case 1:
1500 if (tabla->mbhc_polling_active) {
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001501
1502 tabla_codec_pause_hs_polling(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08001503 /* VDDIO switch enabled */
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001504 tabla->cfilt_k_value = snd_soc_read(codec,
1505 tabla->mbhc_bias_regs.cfilt_val);
1506 cfilt_k_val = tabla_find_k_value(
1507 tabla->pdata->micbias.ldoh_v, 1800);
1508 snd_soc_update_bits(codec,
1509 tabla->mbhc_bias_regs.cfilt_val,
1510 0xFC, (cfilt_k_val << 2));
1511
1512 snd_soc_update_bits(codec,
1513 tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x80);
1514 snd_soc_update_bits(codec,
1515 tabla->mbhc_bias_regs.mbhc_reg, 0x10, 0x00);
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001516 tabla_codec_start_hs_polling(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001517
1518 tabla->mbhc_micbias_switched = true;
Joonwoo Park0976d012011-12-22 11:48:18 -08001519 pr_debug("%s: VDDIO switch enabled\n", __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001520 }
1521 break;
1522
1523 case 0:
1524 if (tabla->mbhc_micbias_switched) {
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001525 if (tabla->mbhc_polling_active) {
1526 tabla_codec_pause_hs_polling(codec);
1527 mbhc_was_polling = true;
1528 }
Joonwoo Park0976d012011-12-22 11:48:18 -08001529 /* VDDIO switch disabled */
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001530 if (tabla->cfilt_k_value != 0)
1531 snd_soc_update_bits(codec,
1532 tabla->mbhc_bias_regs.cfilt_val, 0XFC,
1533 tabla->cfilt_k_value);
1534 snd_soc_update_bits(codec,
1535 tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
1536 snd_soc_update_bits(codec,
1537 tabla->mbhc_bias_regs.mbhc_reg, 0x10, 0x00);
1538
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001539 if (mbhc_was_polling)
1540 tabla_codec_start_hs_polling(codec);
1541
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001542 tabla->mbhc_micbias_switched = false;
Joonwoo Park0976d012011-12-22 11:48:18 -08001543 pr_debug("%s: VDDIO switch disabled\n", __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001544 }
1545 break;
1546 }
1547}
1548
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001549static int tabla_codec_enable_micbias(struct snd_soc_dapm_widget *w,
1550 struct snd_kcontrol *kcontrol, int event)
1551{
1552 struct snd_soc_codec *codec = w->codec;
Patrick Lai3043fba2011-08-01 14:15:57 -07001553 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1554 u16 micb_int_reg;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001555 int micb_line;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001556 u8 cfilt_sel_val = 0;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001557 char *internal1_text = "Internal1";
1558 char *internal2_text = "Internal2";
1559 char *internal3_text = "Internal3";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001560
1561 pr_debug("%s %d\n", __func__, event);
1562 switch (w->reg) {
1563 case TABLA_A_MICB_1_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001564 micb_int_reg = TABLA_A_MICB_1_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001565 cfilt_sel_val = tabla->pdata->micbias.bias1_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001566 micb_line = TABLA_MICBIAS1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001567 break;
1568 case TABLA_A_MICB_2_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001569 micb_int_reg = TABLA_A_MICB_2_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001570 cfilt_sel_val = tabla->pdata->micbias.bias2_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001571 micb_line = TABLA_MICBIAS2;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001572 break;
1573 case TABLA_A_MICB_3_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001574 micb_int_reg = TABLA_A_MICB_3_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001575 cfilt_sel_val = tabla->pdata->micbias.bias3_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001576 micb_line = TABLA_MICBIAS3;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001577 break;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001578 case TABLA_1_A_MICB_4_CTL:
1579 case TABLA_2_A_MICB_4_CTL:
1580 micb_int_reg = tabla->reg_addr.micb_4_int_rbias;
Patrick Lai3043fba2011-08-01 14:15:57 -07001581 cfilt_sel_val = tabla->pdata->micbias.bias4_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001582 micb_line = TABLA_MICBIAS4;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001583 break;
1584 default:
1585 pr_err("%s: Error, invalid micbias register\n", __func__);
1586 return -EINVAL;
1587 }
1588
1589 switch (event) {
1590 case SND_SOC_DAPM_PRE_PMU:
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001591 /* Decide whether to switch the micbias for MBHC */
1592 if ((w->reg == tabla->mbhc_bias_regs.ctl_reg)
1593 && tabla->mbhc_micbias_switched)
1594 tabla_codec_switch_micbias(codec, 0);
1595
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001596 snd_soc_update_bits(codec, w->reg, 0x0E, 0x0A);
Patrick Lai3043fba2011-08-01 14:15:57 -07001597 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 1);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001598
1599 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001600 snd_soc_update_bits(codec, micb_int_reg, 0xE0, 0xE0);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001601 else if (strnstr(w->name, internal2_text, 30))
1602 snd_soc_update_bits(codec, micb_int_reg, 0x1C, 0x1C);
1603 else if (strnstr(w->name, internal3_text, 30))
1604 snd_soc_update_bits(codec, micb_int_reg, 0x3, 0x3);
1605
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001606 break;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001607 case SND_SOC_DAPM_POST_PMU:
1608 if (tabla->mbhc_polling_active &&
Joonwoo Park0976d012011-12-22 11:48:18 -08001609 tabla->micbias == micb_line) {
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001610 tabla_codec_pause_hs_polling(codec);
1611 tabla_codec_start_hs_polling(codec);
1612 }
1613 break;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001614
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001615 case SND_SOC_DAPM_POST_PMD:
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001616
1617 if ((w->reg == tabla->mbhc_bias_regs.ctl_reg)
1618 && tabla_is_hph_pa_on(codec))
1619 tabla_codec_switch_micbias(codec, 1);
1620
Bradley Rubin229c6a52011-07-12 16:18:48 -07001621 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001622 snd_soc_update_bits(codec, micb_int_reg, 0x80, 0x00);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001623 else if (strnstr(w->name, internal2_text, 30))
1624 snd_soc_update_bits(codec, micb_int_reg, 0x10, 0x00);
1625 else if (strnstr(w->name, internal3_text, 30))
1626 snd_soc_update_bits(codec, micb_int_reg, 0x2, 0x0);
1627
Patrick Lai3043fba2011-08-01 14:15:57 -07001628 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001629 break;
1630 }
1631
1632 return 0;
1633}
1634
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001635static int tabla_codec_enable_dec(struct snd_soc_dapm_widget *w,
1636 struct snd_kcontrol *kcontrol, int event)
1637{
1638 struct snd_soc_codec *codec = w->codec;
1639 u16 dec_reset_reg;
1640
1641 pr_debug("%s %d\n", __func__, event);
1642
1643 if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL)
1644 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B1_CTL;
1645 else if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL)
1646 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B2_CTL;
1647 else {
1648 pr_err("%s: Error, incorrect dec\n", __func__);
1649 return -EINVAL;
1650 }
1651
1652 switch (event) {
1653 case SND_SOC_DAPM_PRE_PMU:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001654 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift,
1655 1 << w->shift);
1656 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift, 0x0);
1657 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001658 }
1659 return 0;
1660}
1661
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001662static int tabla_codec_reset_interpolator(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001663 struct snd_kcontrol *kcontrol, int event)
1664{
1665 struct snd_soc_codec *codec = w->codec;
1666
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001667 pr_debug("%s %d %s\n", __func__, event, w->name);
1668
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001669 switch (event) {
1670 case SND_SOC_DAPM_PRE_PMU:
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001671 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
1672 1 << w->shift, 1 << w->shift);
1673 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
1674 1 << w->shift, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001675 break;
1676 }
1677 return 0;
1678}
1679
Bradley Rubin229c6a52011-07-12 16:18:48 -07001680static int tabla_codec_enable_ldo_h(struct snd_soc_dapm_widget *w,
1681 struct snd_kcontrol *kcontrol, int event)
1682{
1683 switch (event) {
1684 case SND_SOC_DAPM_POST_PMU:
1685 case SND_SOC_DAPM_POST_PMD:
1686 usleep_range(1000, 1000);
1687 break;
1688 }
1689 return 0;
1690}
1691
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07001692
1693static void tabla_enable_rx_bias(struct snd_soc_codec *codec, u32 enable)
1694{
1695 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1696
1697 if (enable) {
1698 tabla->rx_bias_count++;
1699 if (tabla->rx_bias_count == 1)
1700 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1701 0x80, 0x80);
1702 } else {
1703 tabla->rx_bias_count--;
1704 if (!tabla->rx_bias_count)
1705 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1706 0x80, 0x00);
1707 }
1708}
1709
1710static int tabla_codec_enable_rx_bias(struct snd_soc_dapm_widget *w,
1711 struct snd_kcontrol *kcontrol, int event)
1712{
1713 struct snd_soc_codec *codec = w->codec;
1714
1715 pr_debug("%s %d\n", __func__, event);
1716
1717 switch (event) {
1718 case SND_SOC_DAPM_PRE_PMU:
1719 tabla_enable_rx_bias(codec, 1);
1720 break;
1721 case SND_SOC_DAPM_POST_PMD:
1722 tabla_enable_rx_bias(codec, 0);
1723 break;
1724 }
1725 return 0;
1726}
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001727static int tabla_hphr_dac_event(struct snd_soc_dapm_widget *w,
1728 struct snd_kcontrol *kcontrol, int event)
1729{
1730 struct snd_soc_codec *codec = w->codec;
1731
1732 pr_debug("%s %s %d\n", __func__, w->name, event);
1733
1734 switch (event) {
1735 case SND_SOC_DAPM_PRE_PMU:
1736 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
1737 break;
1738 case SND_SOC_DAPM_POST_PMD:
1739 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
1740 break;
1741 }
1742 return 0;
1743}
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07001744
Joonwoo Park8b1f0982011-12-08 17:12:45 -08001745static void tabla_snd_soc_jack_report(struct tabla_priv *tabla,
1746 struct snd_soc_jack *jack, int status,
1747 int mask)
1748{
1749 /* XXX: wake_lock_timeout()? */
1750 snd_soc_jack_report(jack, status, mask);
1751}
1752
Patrick Lai49efeac2011-11-03 11:01:12 -07001753static void hphocp_off_report(struct tabla_priv *tabla,
1754 u32 jack_status, int irq)
1755{
1756 struct snd_soc_codec *codec;
1757
1758 if (tabla) {
1759 pr_info("%s: clear ocp status %x\n", __func__, jack_status);
1760 codec = tabla->codec;
1761 tabla->hph_status &= ~jack_status;
1762 if (tabla->headset_jack)
Joonwoo Park8b1f0982011-12-08 17:12:45 -08001763 tabla_snd_soc_jack_report(tabla, tabla->headset_jack,
1764 tabla->hph_status,
1765 TABLA_JACK_MASK);
Joonwoo Park0976d012011-12-22 11:48:18 -08001766 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x00);
1767 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
Patrick Laic7cae882011-11-18 11:52:49 -08001768 /* reset retry counter as PA is turned off signifying
1769 * start of new OCP detection session
1770 */
1771 if (TABLA_IRQ_HPH_PA_OCPL_FAULT)
1772 tabla->hphlocp_cnt = 0;
1773 else
1774 tabla->hphrocp_cnt = 0;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05301775 wcd9xxx_enable_irq(codec->control_data, irq);
Patrick Lai49efeac2011-11-03 11:01:12 -07001776 } else {
1777 pr_err("%s: Bad tabla private data\n", __func__);
1778 }
1779}
1780
1781static void hphlocp_off_report(struct work_struct *work)
1782{
1783 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
1784 hphlocp_work);
1785 hphocp_off_report(tabla, SND_JACK_OC_HPHL, TABLA_IRQ_HPH_PA_OCPL_FAULT);
1786}
1787
1788static void hphrocp_off_report(struct work_struct *work)
1789{
1790 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
1791 hphrocp_work);
1792 hphocp_off_report(tabla, SND_JACK_OC_HPHR, TABLA_IRQ_HPH_PA_OCPR_FAULT);
1793}
1794
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001795static int tabla_hph_pa_event(struct snd_soc_dapm_widget *w,
1796 struct snd_kcontrol *kcontrol, int event)
1797{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001798 struct snd_soc_codec *codec = w->codec;
1799 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1800 u8 mbhc_micb_ctl_val;
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001801 pr_debug("%s: event = %d\n", __func__, event);
1802
1803 switch (event) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001804 case SND_SOC_DAPM_PRE_PMU:
1805 mbhc_micb_ctl_val = snd_soc_read(codec,
1806 tabla->mbhc_bias_regs.ctl_reg);
1807
1808 if (!(mbhc_micb_ctl_val & 0x80)
1809 && !tabla->mbhc_micbias_switched)
1810 tabla_codec_switch_micbias(codec, 1);
1811
1812 break;
1813
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001814 case SND_SOC_DAPM_POST_PMD:
Patrick Lai49efeac2011-11-03 11:01:12 -07001815 /* schedule work is required because at the time HPH PA DAPM
1816 * event callback is called by DAPM framework, CODEC dapm mutex
1817 * would have been locked while snd_soc_jack_report also
1818 * attempts to acquire same lock.
1819 */
Joonwoo Parka9444452011-12-08 18:48:27 -08001820 if (w->shift == 5) {
1821 clear_bit(TABLA_HPHL_PA_OFF_ACK,
1822 &tabla->hph_pa_dac_state);
1823 clear_bit(TABLA_HPHL_DAC_OFF_ACK,
1824 &tabla->hph_pa_dac_state);
1825 if (tabla->hph_status & SND_JACK_OC_HPHL)
1826 schedule_work(&tabla->hphlocp_work);
1827 } else if (w->shift == 4) {
1828 clear_bit(TABLA_HPHR_PA_OFF_ACK,
1829 &tabla->hph_pa_dac_state);
1830 clear_bit(TABLA_HPHR_DAC_OFF_ACK,
1831 &tabla->hph_pa_dac_state);
1832 if (tabla->hph_status & SND_JACK_OC_HPHR)
1833 schedule_work(&tabla->hphrocp_work);
1834 }
1835
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001836 if (tabla->mbhc_micbias_switched)
1837 tabla_codec_switch_micbias(codec, 0);
1838
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001839 pr_debug("%s: sleep 10 ms after %s PA disable.\n", __func__,
1840 w->name);
1841 usleep_range(10000, 10000);
1842
1843 break;
1844 }
1845 return 0;
1846}
1847
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001848static void tabla_get_mbhc_micbias_regs(struct snd_soc_codec *codec,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001849 struct mbhc_micbias_regs *micbias_regs)
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001850{
1851 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001852 unsigned int cfilt;
1853
Joonwoo Park0976d012011-12-22 11:48:18 -08001854 switch (tabla->micbias) {
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001855 case TABLA_MICBIAS1:
1856 cfilt = tabla->pdata->micbias.bias1_cfilt_sel;
1857 micbias_regs->mbhc_reg = TABLA_A_MICB_1_MBHC;
1858 micbias_regs->int_rbias = TABLA_A_MICB_1_INT_RBIAS;
1859 micbias_regs->ctl_reg = TABLA_A_MICB_1_CTL;
1860 break;
1861 case TABLA_MICBIAS2:
1862 cfilt = tabla->pdata->micbias.bias2_cfilt_sel;
1863 micbias_regs->mbhc_reg = TABLA_A_MICB_2_MBHC;
1864 micbias_regs->int_rbias = TABLA_A_MICB_2_INT_RBIAS;
1865 micbias_regs->ctl_reg = TABLA_A_MICB_2_CTL;
1866 break;
1867 case TABLA_MICBIAS3:
1868 cfilt = tabla->pdata->micbias.bias3_cfilt_sel;
1869 micbias_regs->mbhc_reg = TABLA_A_MICB_3_MBHC;
1870 micbias_regs->int_rbias = TABLA_A_MICB_3_INT_RBIAS;
1871 micbias_regs->ctl_reg = TABLA_A_MICB_3_CTL;
1872 break;
1873 case TABLA_MICBIAS4:
1874 cfilt = tabla->pdata->micbias.bias4_cfilt_sel;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001875 micbias_regs->mbhc_reg = tabla->reg_addr.micb_4_mbhc;
1876 micbias_regs->int_rbias = tabla->reg_addr.micb_4_int_rbias;
1877 micbias_regs->ctl_reg = tabla->reg_addr.micb_4_ctl;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001878 break;
1879 default:
1880 /* Should never reach here */
1881 pr_err("%s: Invalid MIC BIAS for MBHC\n", __func__);
Jordan Crouse239d8412011-11-23 11:47:02 -07001882 return;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001883 }
1884
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08001885 micbias_regs->cfilt_sel = cfilt;
1886
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001887 switch (cfilt) {
1888 case TABLA_CFILT1_SEL:
1889 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_1_VAL;
1890 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_1_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08001891 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt1_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001892 break;
1893 case TABLA_CFILT2_SEL:
1894 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_2_VAL;
1895 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_2_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08001896 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt2_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001897 break;
1898 case TABLA_CFILT3_SEL:
1899 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_3_VAL;
1900 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_3_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08001901 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt3_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001902 break;
1903 }
1904}
Santosh Mardie15e2302011-11-15 10:39:23 +05301905static const struct snd_soc_dapm_widget tabla_dapm_i2s_widgets[] = {
1906 SND_SOC_DAPM_SUPPLY("RX_I2S_CLK", TABLA_A_CDC_CLK_RX_I2S_CTL,
1907 4, 0, NULL, 0),
1908 SND_SOC_DAPM_SUPPLY("TX_I2S_CLK", TABLA_A_CDC_CLK_TX_I2S_CTL, 4,
1909 0, NULL, 0),
1910};
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001911
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001912static int tabla_lineout_dac_event(struct snd_soc_dapm_widget *w,
1913 struct snd_kcontrol *kcontrol, int event)
1914{
1915 struct snd_soc_codec *codec = w->codec;
1916
1917 pr_debug("%s %s %d\n", __func__, w->name, event);
1918
1919 switch (event) {
1920 case SND_SOC_DAPM_PRE_PMU:
1921 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
1922 break;
1923
1924 case SND_SOC_DAPM_POST_PMD:
1925 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
1926 break;
1927 }
1928 return 0;
1929}
1930
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001931static const struct snd_soc_dapm_widget tabla_1_x_dapm_widgets[] = {
1932 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_1_A_MICB_4_CTL, 7,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05301933 0, tabla_codec_enable_micbias,
1934 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
1935 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001936};
1937
1938static const struct snd_soc_dapm_widget tabla_2_higher_dapm_widgets[] = {
1939 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_2_A_MICB_4_CTL, 7,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05301940 0, tabla_codec_enable_micbias,
1941 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
1942 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001943};
1944
Santosh Mardie15e2302011-11-15 10:39:23 +05301945static const struct snd_soc_dapm_route audio_i2s_map[] = {
1946 {"RX_I2S_CLK", NULL, "CDC_CONN"},
1947 {"SLIM RX1", NULL, "RX_I2S_CLK"},
1948 {"SLIM RX2", NULL, "RX_I2S_CLK"},
1949 {"SLIM RX3", NULL, "RX_I2S_CLK"},
1950 {"SLIM RX4", NULL, "RX_I2S_CLK"},
1951
1952 {"SLIM TX7", NULL, "TX_I2S_CLK"},
1953 {"SLIM TX8", NULL, "TX_I2S_CLK"},
1954 {"SLIM TX9", NULL, "TX_I2S_CLK"},
1955 {"SLIM TX10", NULL, "TX_I2S_CLK"},
1956};
1957
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001958static const struct snd_soc_dapm_route audio_map[] = {
1959 /* SLIMBUS Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001960
1961 {"SLIM TX1", NULL, "SLIM TX1 MUX"},
1962 {"SLIM TX1 MUX", "DEC1", "DEC1 MUX"},
1963
1964 {"SLIM TX5", NULL, "SLIM TX5 MUX"},
1965 {"SLIM TX5 MUX", "DEC5", "DEC5 MUX"},
1966
1967 {"SLIM TX6", NULL, "SLIM TX6 MUX"},
1968 {"SLIM TX6 MUX", "DEC6", "DEC6 MUX"},
1969
1970 {"SLIM TX7", NULL, "SLIM TX7 MUX"},
1971 {"SLIM TX7 MUX", "DEC1", "DEC1 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001972 {"SLIM TX7 MUX", "DEC2", "DEC2 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001973 {"SLIM TX7 MUX", "DEC3", "DEC3 MUX"},
1974 {"SLIM TX7 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001975 {"SLIM TX7 MUX", "DEC5", "DEC5 MUX"},
1976 {"SLIM TX7 MUX", "DEC6", "DEC6 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001977 {"SLIM TX7 MUX", "DEC7", "DEC7 MUX"},
1978 {"SLIM TX7 MUX", "DEC8", "DEC8 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001979 {"SLIM TX7 MUX", "DEC9", "DEC9 MUX"},
1980 {"SLIM TX7 MUX", "DEC10", "DEC10 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001981
1982 {"SLIM TX8", NULL, "SLIM TX8 MUX"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001983 {"SLIM TX8 MUX", "DEC1", "DEC1 MUX"},
1984 {"SLIM TX8 MUX", "DEC2", "DEC2 MUX"},
1985 {"SLIM TX8 MUX", "DEC3", "DEC3 MUX"},
Bhalchandra Gajare9ec83cd2011-09-23 17:25:07 -07001986 {"SLIM TX8 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001987 {"SLIM TX8 MUX", "DEC5", "DEC5 MUX"},
1988 {"SLIM TX8 MUX", "DEC6", "DEC6 MUX"},
1989
Kiran Kandi3426e512011-09-13 22:50:10 -07001990 {"SLIM TX9", NULL, "SLIM TX9 MUX"},
1991 {"SLIM TX9 MUX", "DEC1", "DEC1 MUX"},
1992 {"SLIM TX9 MUX", "DEC2", "DEC2 MUX"},
1993 {"SLIM TX9 MUX", "DEC3", "DEC3 MUX"},
1994 {"SLIM TX9 MUX", "DEC4", "DEC4 MUX"},
1995 {"SLIM TX9 MUX", "DEC5", "DEC5 MUX"},
1996 {"SLIM TX9 MUX", "DEC6", "DEC6 MUX"},
1997 {"SLIM TX9 MUX", "DEC7", "DEC7 MUX"},
1998 {"SLIM TX9 MUX", "DEC8", "DEC8 MUX"},
1999 {"SLIM TX9 MUX", "DEC9", "DEC9 MUX"},
2000 {"SLIM TX9 MUX", "DEC10", "DEC10 MUX"},
2001
2002 {"SLIM TX10", NULL, "SLIM TX10 MUX"},
2003 {"SLIM TX10 MUX", "DEC1", "DEC1 MUX"},
2004 {"SLIM TX10 MUX", "DEC2", "DEC2 MUX"},
2005 {"SLIM TX10 MUX", "DEC3", "DEC3 MUX"},
2006 {"SLIM TX10 MUX", "DEC4", "DEC4 MUX"},
2007 {"SLIM TX10 MUX", "DEC5", "DEC5 MUX"},
2008 {"SLIM TX10 MUX", "DEC6", "DEC6 MUX"},
2009 {"SLIM TX10 MUX", "DEC7", "DEC7 MUX"},
2010 {"SLIM TX10 MUX", "DEC8", "DEC8 MUX"},
2011 {"SLIM TX10 MUX", "DEC9", "DEC9 MUX"},
2012 {"SLIM TX10 MUX", "DEC10", "DEC10 MUX"},
2013
2014
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002015 /* Earpiece (RX MIX1) */
2016 {"EAR", NULL, "EAR PA"},
Kiran Kandiac034ac2011-07-29 16:39:08 -07002017 {"EAR PA", NULL, "DAC1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002018 {"DAC1", NULL, "CP"},
2019
2020 {"ANC1 FB MUX", "EAR_HPH_L", "RX1 MIX1"},
2021 {"ANC1 FB MUX", "EAR_LINE_1", "RX2 MIX1"},
2022 {"ANC", NULL, "ANC1 FB MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002023
2024 /* Headset (RX MIX1 and RX MIX2) */
2025 {"HEADPHONE", NULL, "HPHL"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002026 {"HEADPHONE", NULL, "HPHR"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002027
2028 {"HPHL", NULL, "HPHL DAC"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002029 {"HPHR", NULL, "HPHR DAC"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002030
2031 {"HPHL DAC", NULL, "CP"},
2032 {"HPHR DAC", NULL, "CP"},
2033
2034 {"ANC", NULL, "ANC1 MUX"},
2035 {"ANC", NULL, "ANC2 MUX"},
2036 {"ANC1 MUX", "ADC1", "ADC1"},
2037 {"ANC1 MUX", "ADC2", "ADC2"},
2038 {"ANC1 MUX", "ADC3", "ADC3"},
2039 {"ANC1 MUX", "ADC4", "ADC4"},
2040 {"ANC2 MUX", "ADC1", "ADC1"},
2041 {"ANC2 MUX", "ADC2", "ADC2"},
2042 {"ANC2 MUX", "ADC3", "ADC3"},
2043 {"ANC2 MUX", "ADC4", "ADC4"},
2044
Bradley Rubine1d08622011-07-20 18:01:35 -07002045 {"ANC", NULL, "CDC_CONN"},
2046
Bradley Rubin229c6a52011-07-12 16:18:48 -07002047 {"DAC1", "Switch", "RX1 CHAIN"},
2048 {"HPHL DAC", "Switch", "RX1 CHAIN"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002049 {"HPHR DAC", NULL, "RX2 CHAIN"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002050
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002051 {"LINEOUT1", NULL, "LINEOUT1 PA"},
2052 {"LINEOUT2", NULL, "LINEOUT2 PA"},
2053 {"LINEOUT3", NULL, "LINEOUT3 PA"},
2054 {"LINEOUT4", NULL, "LINEOUT4 PA"},
2055 {"LINEOUT5", NULL, "LINEOUT5 PA"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002056
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002057 {"LINEOUT1 PA", NULL, "LINEOUT1 DAC"},
2058 {"LINEOUT2 PA", NULL, "LINEOUT2 DAC"},
2059 {"LINEOUT3 PA", NULL, "LINEOUT3 DAC"},
2060 {"LINEOUT4 PA", NULL, "LINEOUT4 DAC"},
2061 {"LINEOUT5 PA", NULL, "LINEOUT5 DAC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002062
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002063 {"LINEOUT1 DAC", NULL, "RX3 MIX1"},
2064 {"LINEOUT5 DAC", NULL, "RX7 MIX1"},
2065
Bradley Rubin229c6a52011-07-12 16:18:48 -07002066 {"RX1 CHAIN", NULL, "RX1 MIX1"},
2067 {"RX2 CHAIN", NULL, "RX2 MIX1"},
2068 {"RX1 CHAIN", NULL, "ANC"},
2069 {"RX2 CHAIN", NULL, "ANC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002070
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002071 {"CP", NULL, "RX_BIAS"},
2072 {"LINEOUT1 DAC", NULL, "RX_BIAS"},
2073 {"LINEOUT2 DAC", NULL, "RX_BIAS"},
2074 {"LINEOUT3 DAC", NULL, "RX_BIAS"},
2075 {"LINEOUT4 DAC", NULL, "RX_BIAS"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002076 {"LINEOUT5 DAC", NULL, "RX_BIAS"},
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002077
Bradley Rubin229c6a52011-07-12 16:18:48 -07002078 {"RX1 MIX1", NULL, "RX1 MIX1 INP1"},
2079 {"RX1 MIX1", NULL, "RX1 MIX1 INP2"},
2080 {"RX2 MIX1", NULL, "RX2 MIX1 INP1"},
2081 {"RX2 MIX1", NULL, "RX2 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002082 {"RX3 MIX1", NULL, "RX3 MIX1 INP1"},
2083 {"RX3 MIX1", NULL, "RX3 MIX1 INP2"},
2084 {"RX4 MIX1", NULL, "RX4 MIX1 INP1"},
2085 {"RX4 MIX1", NULL, "RX4 MIX1 INP2"},
2086 {"RX5 MIX1", NULL, "RX5 MIX1 INP1"},
2087 {"RX5 MIX1", NULL, "RX5 MIX1 INP2"},
2088 {"RX6 MIX1", NULL, "RX6 MIX1 INP1"},
2089 {"RX6 MIX1", NULL, "RX6 MIX1 INP2"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002090 {"RX7 MIX1", NULL, "RX7 MIX1 INP1"},
2091 {"RX7 MIX1", NULL, "RX7 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002092
Bradley Rubin229c6a52011-07-12 16:18:48 -07002093 {"RX1 MIX1 INP1", "RX1", "SLIM RX1"},
2094 {"RX1 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302095 {"RX1 MIX1 INP1", "RX3", "SLIM RX3"},
2096 {"RX1 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002097 {"RX1 MIX1 INP1", "RX6", "SLIM RX6"},
2098 {"RX1 MIX1 INP1", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002099 {"RX1 MIX1 INP1", "IIR1", "IIR1"},
2100 {"RX1 MIX1 INP2", "RX1", "SLIM RX1"},
2101 {"RX1 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302102 {"RX1 MIX1 INP2", "RX3", "SLIM RX3"},
2103 {"RX1 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002104 {"RX1 MIX1 INP2", "RX6", "SLIM RX6"},
2105 {"RX1 MIX1 INP2", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002106 {"RX1 MIX1 INP2", "IIR1", "IIR1"},
2107 {"RX2 MIX1 INP1", "RX1", "SLIM RX1"},
2108 {"RX2 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302109 {"RX2 MIX1 INP1", "RX3", "SLIM RX3"},
2110 {"RX2 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002111 {"RX2 MIX1 INP1", "RX6", "SLIM RX6"},
2112 {"RX2 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002113 {"RX2 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002114 {"RX2 MIX1 INP2", "RX1", "SLIM RX1"},
2115 {"RX2 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302116 {"RX2 MIX1 INP2", "RX3", "SLIM RX3"},
2117 {"RX2 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002118 {"RX2 MIX1 INP2", "RX6", "SLIM RX6"},
2119 {"RX2 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002120 {"RX2 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002121 {"RX3 MIX1 INP1", "RX1", "SLIM RX1"},
2122 {"RX3 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302123 {"RX3 MIX1 INP1", "RX3", "SLIM RX3"},
2124 {"RX3 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002125 {"RX3 MIX1 INP1", "RX6", "SLIM RX6"},
2126 {"RX3 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002127 {"RX3 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002128 {"RX3 MIX1 INP2", "RX1", "SLIM RX1"},
2129 {"RX3 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302130 {"RX3 MIX1 INP2", "RX3", "SLIM RX3"},
2131 {"RX3 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002132 {"RX3 MIX1 INP2", "RX6", "SLIM RX6"},
2133 {"RX3 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002134 {"RX3 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002135 {"RX4 MIX1 INP1", "RX1", "SLIM RX1"},
2136 {"RX4 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302137 {"RX4 MIX1 INP1", "RX3", "SLIM RX3"},
2138 {"RX4 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002139 {"RX4 MIX1 INP1", "RX6", "SLIM RX6"},
2140 {"RX4 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002141 {"RX4 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002142 {"RX4 MIX1 INP2", "RX1", "SLIM RX1"},
2143 {"RX4 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302144 {"RX4 MIX1 INP2", "RX3", "SLIM RX3"},
2145 {"RX4 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002146 {"RX4 MIX1 INP2", "RX6", "SLIM RX6"},
2147 {"RX4 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002148 {"RX4 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002149 {"RX5 MIX1 INP1", "RX1", "SLIM RX1"},
2150 {"RX5 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302151 {"RX5 MIX1 INP1", "RX3", "SLIM RX3"},
2152 {"RX5 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002153 {"RX5 MIX1 INP1", "RX6", "SLIM RX6"},
2154 {"RX5 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002155 {"RX5 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002156 {"RX5 MIX1 INP2", "RX1", "SLIM RX1"},
2157 {"RX5 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302158 {"RX5 MIX1 INP2", "RX3", "SLIM RX3"},
2159 {"RX5 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002160 {"RX5 MIX1 INP2", "RX6", "SLIM RX6"},
2161 {"RX5 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002162 {"RX5 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002163 {"RX6 MIX1 INP1", "RX1", "SLIM RX1"},
2164 {"RX6 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302165 {"RX6 MIX1 INP1", "RX3", "SLIM RX3"},
2166 {"RX6 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002167 {"RX6 MIX1 INP1", "RX6", "SLIM RX6"},
2168 {"RX6 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002169 {"RX6 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002170 {"RX6 MIX1 INP2", "RX1", "SLIM RX1"},
2171 {"RX6 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302172 {"RX6 MIX1 INP2", "RX3", "SLIM RX3"},
2173 {"RX6 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002174 {"RX6 MIX1 INP2", "RX6", "SLIM RX6"},
2175 {"RX6 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002176 {"RX6 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002177 {"RX7 MIX1 INP1", "RX1", "SLIM RX1"},
2178 {"RX7 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302179 {"RX7 MIX1 INP1", "RX3", "SLIM RX3"},
2180 {"RX7 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002181 {"RX7 MIX1 INP1", "RX6", "SLIM RX6"},
2182 {"RX7 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002183 {"RX7 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002184 {"RX7 MIX1 INP2", "RX1", "SLIM RX1"},
2185 {"RX7 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302186 {"RX7 MIX1 INP2", "RX3", "SLIM RX3"},
2187 {"RX7 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002188 {"RX7 MIX1 INP2", "RX6", "SLIM RX6"},
2189 {"RX7 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002190 {"RX7 MIX1 INP2", "IIR1", "IIR1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002191
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002192 /* Decimator Inputs */
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002193 {"DEC1 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002194 {"DEC1 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002195 {"DEC1 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002196 {"DEC2 MUX", "DMIC2", "DMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002197 {"DEC2 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002198 {"DEC2 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002199 {"DEC3 MUX", "DMIC3", "DMIC3"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002200 {"DEC3 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002201 {"DEC3 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002202 {"DEC4 MUX", "DMIC4", "DMIC4"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002203 {"DEC4 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002204 {"DEC4 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002205 {"DEC5 MUX", "DMIC5", "DMIC5"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002206 {"DEC5 MUX", "ADC2", "ADC2"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002207 {"DEC5 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002208 {"DEC6 MUX", "DMIC6", "DMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002209 {"DEC6 MUX", "ADC1", "ADC1"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002210 {"DEC6 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002211 {"DEC7 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002212 {"DEC7 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002213 {"DEC7 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002214 {"DEC8 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002215 {"DEC8 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002216 {"DEC9 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002217 {"DEC9 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002218 {"DEC10 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002219 {"DEC10 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002220
2221 /* ADC Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002222 {"ADC1", NULL, "AMIC1"},
2223 {"ADC2", NULL, "AMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002224 {"ADC3", NULL, "AMIC3"},
2225 {"ADC4", NULL, "AMIC4"},
2226 {"ADC5", NULL, "AMIC5"},
2227 {"ADC6", NULL, "AMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002228
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002229 {"IIR1", NULL, "IIR1 INP1 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07002230 {"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
2231 {"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
2232 {"IIR1 INP1 MUX", "DEC3", "DEC3 MUX"},
2233 {"IIR1 INP1 MUX", "DEC4", "DEC4 MUX"},
2234 {"IIR1 INP1 MUX", "DEC5", "DEC5 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002235 {"IIR1 INP1 MUX", "DEC6", "DEC6 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07002236 {"IIR1 INP1 MUX", "DEC7", "DEC7 MUX"},
2237 {"IIR1 INP1 MUX", "DEC8", "DEC8 MUX"},
2238 {"IIR1 INP1 MUX", "DEC9", "DEC9 MUX"},
2239 {"IIR1 INP1 MUX", "DEC10", "DEC10 MUX"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002240
2241 {"MIC BIAS1 Internal1", NULL, "LDO_H"},
2242 {"MIC BIAS1 Internal2", NULL, "LDO_H"},
2243 {"MIC BIAS1 External", NULL, "LDO_H"},
2244 {"MIC BIAS2 Internal1", NULL, "LDO_H"},
2245 {"MIC BIAS2 Internal2", NULL, "LDO_H"},
2246 {"MIC BIAS2 Internal3", NULL, "LDO_H"},
2247 {"MIC BIAS2 External", NULL, "LDO_H"},
2248 {"MIC BIAS3 Internal1", NULL, "LDO_H"},
2249 {"MIC BIAS3 Internal2", NULL, "LDO_H"},
2250 {"MIC BIAS3 External", NULL, "LDO_H"},
2251 {"MIC BIAS4 External", NULL, "LDO_H"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002252};
2253
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002254static const struct snd_soc_dapm_route tabla_1_x_lineout_2_to_4_map[] = {
2255
2256 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX1"},
2257 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
2258
2259 {"LINEOUT2 DAC", NULL, "RX4 DSM MUX"},
2260
2261 {"LINEOUT3 DAC", NULL, "RX5 MIX1"},
2262 {"LINEOUT3 DAC GROUND", "Switch", "RX3 MIX1"},
2263 {"LINEOUT3 DAC", NULL, "LINEOUT3 DAC GROUND"},
2264
2265 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
2266 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
2267
2268 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
2269 {"LINEOUT4 DAC GROUND", "Switch", "RX4 DSM MUX"},
2270 {"LINEOUT4 DAC", NULL, "LINEOUT4 DAC GROUND"},
2271};
2272
Kiran Kandi7a9fd902011-11-14 13:51:45 -08002273
2274static const struct snd_soc_dapm_route tabla_2_x_lineout_2_to_4_map[] = {
2275
2276 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX1"},
2277 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
2278
2279 {"LINEOUT3 DAC", NULL, "RX4 DSM MUX"},
2280
2281 {"LINEOUT2 DAC", NULL, "RX5 MIX1"},
2282
2283 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
2284 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
2285
2286 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
2287};
2288
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002289static int tabla_readable(struct snd_soc_codec *ssc, unsigned int reg)
2290{
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002291 int i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302292 struct wcd9xxx *tabla_core = dev_get_drvdata(ssc->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002293
2294 if (TABLA_IS_1_X(tabla_core->version)) {
2295 for (i = 0; i < ARRAY_SIZE(tabla_1_reg_readable); i++) {
2296 if (tabla_1_reg_readable[i] == reg)
2297 return 1;
2298 }
2299 } else {
2300 for (i = 0; i < ARRAY_SIZE(tabla_2_reg_readable); i++) {
2301 if (tabla_2_reg_readable[i] == reg)
2302 return 1;
2303 }
2304 }
2305
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002306 return tabla_reg_readable[reg];
2307}
2308
2309static int tabla_volatile(struct snd_soc_codec *ssc, unsigned int reg)
2310{
2311 /* Registers lower than 0x100 are top level registers which can be
2312 * written by the Tabla core driver.
2313 */
2314
2315 if ((reg >= TABLA_A_CDC_MBHC_EN_CTL) || (reg < 0x100))
2316 return 1;
2317
Ben Romberger1f045a72011-11-04 10:14:57 -07002318 /* IIR Coeff registers are not cacheable */
2319 if ((reg >= TABLA_A_CDC_IIR1_COEF_B1_CTL) &&
2320 (reg <= TABLA_A_CDC_IIR2_COEF_B5_CTL))
2321 return 1;
2322
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002323 return 0;
2324}
2325
2326#define TABLA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
2327static int tabla_write(struct snd_soc_codec *codec, unsigned int reg,
2328 unsigned int value)
2329{
2330 int ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002331
2332 BUG_ON(reg > TABLA_MAX_REGISTER);
2333
2334 if (!tabla_volatile(codec, reg)) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002335 ret = snd_soc_cache_write(codec, reg, value);
2336 if (ret != 0)
2337 dev_err(codec->dev, "Cache write to %x failed: %d\n",
2338 reg, ret);
2339 }
2340
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302341 return wcd9xxx_reg_write(codec->control_data, reg, value);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002342}
2343static unsigned int tabla_read(struct snd_soc_codec *codec,
2344 unsigned int reg)
2345{
2346 unsigned int val;
2347 int ret;
2348
2349 BUG_ON(reg > TABLA_MAX_REGISTER);
2350
2351 if (!tabla_volatile(codec, reg) && tabla_readable(codec, reg) &&
2352 reg < codec->driver->reg_cache_size) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002353 ret = snd_soc_cache_read(codec, reg, &val);
2354 if (ret >= 0) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002355 return val;
2356 } else
2357 dev_err(codec->dev, "Cache read from %x failed: %d\n",
2358 reg, ret);
2359 }
2360
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302361 val = wcd9xxx_reg_read(codec->control_data, reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002362 return val;
2363}
2364
2365static void tabla_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
2366{
2367 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL, 0x1C);
2368 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2369 0x80);
2370 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x04,
2371 0x04);
2372 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
2373 0x01);
2374 usleep_range(1000, 1000);
2375 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2376 0x00);
2377}
2378
2379static void tabla_codec_enable_bandgap(struct snd_soc_codec *codec,
2380 enum tabla_bandgap_type choice)
2381{
2382 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2383
2384 /* TODO lock resources accessed by audio streams and threaded
2385 * interrupt handlers
2386 */
2387
2388 pr_debug("%s, choice is %d, current is %d\n", __func__, choice,
2389 tabla->bandgap_type);
2390
2391 if (tabla->bandgap_type == choice)
2392 return;
2393
2394 if ((tabla->bandgap_type == TABLA_BANDGAP_OFF) &&
2395 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
2396 tabla_codec_enable_audio_mode_bandgap(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05302397 } else if (choice == TABLA_BANDGAP_MBHC_MODE) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002398 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x2,
2399 0x2);
2400 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2401 0x80);
2402 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x4,
2403 0x4);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05302404 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
2405 0x01);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002406 usleep_range(1000, 1000);
2407 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2408 0x00);
2409 } else if ((tabla->bandgap_type == TABLA_BANDGAP_MBHC_MODE) &&
2410 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
2411 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
2412 usleep_range(100, 100);
2413 tabla_codec_enable_audio_mode_bandgap(codec);
2414 } else if (choice == TABLA_BANDGAP_OFF) {
2415 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
2416 } else {
2417 pr_err("%s: Error, Invalid bandgap settings\n", __func__);
2418 }
2419 tabla->bandgap_type = choice;
2420}
2421
2422static int tabla_codec_enable_config_mode(struct snd_soc_codec *codec,
2423 int enable)
2424{
2425 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2426
2427 if (enable) {
2428 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x10, 0);
2429 snd_soc_write(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x17);
2430 usleep_range(5, 5);
2431 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80,
2432 0x80);
2433 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80,
2434 0x80);
2435 usleep_range(10, 10);
2436 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80, 0);
2437 usleep_range(20, 20);
2438 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x08);
2439 } else {
2440 snd_soc_update_bits(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x1,
2441 0);
2442 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80, 0);
Bhalchandra Gajareb95fb592012-01-18 12:49:17 -08002443 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002444 }
2445 tabla->config_mode_active = enable ? true : false;
2446
2447 return 0;
2448}
2449
2450static int tabla_codec_enable_clock_block(struct snd_soc_codec *codec,
2451 int config_mode)
2452{
2453 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2454
Bhalchandra Gajareb95fb592012-01-18 12:49:17 -08002455 pr_debug("%s: config_mode = %d\n", __func__, config_mode);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002456
2457 if (config_mode) {
2458 tabla_codec_enable_config_mode(codec, 1);
2459 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x00);
2460 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
2461 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN1, 0x0D);
2462 usleep_range(1000, 1000);
2463 } else
2464 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
2465
2466 if (!config_mode && tabla->mbhc_polling_active) {
2467 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
2468 tabla_codec_enable_config_mode(codec, 0);
2469
2470 }
2471
2472 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x05);
2473 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x00);
2474 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x04);
2475 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_MCLK_CTL, 0x01, 0x01);
2476 usleep_range(50, 50);
2477 tabla->clock_active = true;
2478 return 0;
2479}
2480static void tabla_codec_disable_clock_block(struct snd_soc_codec *codec)
2481{
2482 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2483 pr_debug("%s\n", __func__);
2484 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x00);
2485 ndelay(160);
2486 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x02);
2487 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x00);
2488 tabla->clock_active = false;
2489}
2490
Joonwoo Park107edf02012-01-11 11:42:24 -08002491static int tabla_codec_mclk_index(const struct tabla_priv *tabla)
2492{
2493 if (tabla->mclk_freq == TABLA_MCLK_RATE_12288KHZ)
2494 return 0;
2495 else if (tabla->mclk_freq == TABLA_MCLK_RATE_9600KHZ)
2496 return 1;
2497 else {
2498 BUG_ON(1);
2499 return -EINVAL;
2500 }
2501}
2502
Bradley Rubincb1e2732011-06-23 16:49:20 -07002503static void tabla_codec_calibrate_hs_polling(struct snd_soc_codec *codec)
2504{
Joonwoo Parkc0672392012-01-11 11:03:14 -08002505 u8 *n_ready, *n_cic;
Joonwoo Park0976d012011-12-22 11:48:18 -08002506 struct tabla_mbhc_btn_detect_cfg *btn_det;
2507 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002508
Joonwoo Park0976d012011-12-22 11:48:18 -08002509 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002510
Joonwoo Park0976d012011-12-22 11:48:18 -08002511 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2512 tabla->mbhc_data.v_ins_hu & 0xFF);
2513 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2514 (tabla->mbhc_data.v_ins_hu >> 8) & 0xFF);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002515
Joonwoo Park0976d012011-12-22 11:48:18 -08002516 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL,
2517 tabla->mbhc_data.v_b1_hu & 0xFF);
2518 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
2519 (tabla->mbhc_data.v_b1_hu >> 8) & 0xFF);
2520
2521 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL,
2522 tabla->mbhc_data.v_b1_h & 0xFF);
2523 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL,
2524 (tabla->mbhc_data.v_b1_h >> 8) & 0xFF);
2525
2526 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B9_CTL,
2527 tabla->mbhc_data.v_brh & 0xFF);
2528 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B10_CTL,
2529 (tabla->mbhc_data.v_brh >> 8) & 0xFF);
2530
2531 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B11_CTL,
2532 tabla->mbhc_data.v_brl & 0xFF);
2533 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B12_CTL,
2534 (tabla->mbhc_data.v_brl >> 8) & 0xFF);
2535
Joonwoo Parkc0672392012-01-11 11:03:14 -08002536 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Park0976d012011-12-22 11:48:18 -08002537 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B1_CTL,
Joonwoo Parkc0672392012-01-11 11:03:14 -08002538 n_ready[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08002539 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B2_CTL,
2540 tabla->mbhc_data.npoll);
2541 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B3_CTL,
2542 tabla->mbhc_data.nbounce_wait);
Joonwoo Park0976d012011-12-22 11:48:18 -08002543 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08002544 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL,
2545 n_cic[tabla_codec_mclk_index(tabla)]);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002546}
2547
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002548static int tabla_startup(struct snd_pcm_substream *substream,
2549 struct snd_soc_dai *dai)
2550{
Kuirong Wanga545e722012-02-06 19:12:54 -08002551 struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002552 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
2553 substream->name, substream->stream);
Kuirong Wanga545e722012-02-06 19:12:54 -08002554 if ((tabla_core != NULL) &&
2555 (tabla_core->dev != NULL) &&
2556 (tabla_core->dev->parent != NULL))
2557 pm_runtime_get_sync(tabla_core->dev->parent);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002558
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002559 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002560}
2561
2562static void tabla_shutdown(struct snd_pcm_substream *substream,
2563 struct snd_soc_dai *dai)
2564{
Kuirong Wanga545e722012-02-06 19:12:54 -08002565 struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002566 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
2567 substream->name, substream->stream);
Kuirong Wanga545e722012-02-06 19:12:54 -08002568 if ((tabla_core != NULL) &&
2569 (tabla_core->dev != NULL) &&
2570 (tabla_core->dev->parent != NULL)) {
2571 pm_runtime_mark_last_busy(tabla_core->dev->parent);
2572 pm_runtime_put(tabla_core->dev->parent);
2573 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002574}
2575
2576int tabla_mclk_enable(struct snd_soc_codec *codec, int mclk_enable)
2577{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002578 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2579
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002580 pr_debug("%s() mclk_enable = %u\n", __func__, mclk_enable);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002581
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002582 if (mclk_enable) {
2583 tabla->mclk_enabled = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002584
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002585 if (tabla->mbhc_polling_active && (tabla->mclk_enabled)) {
Bradley Rubincb1e2732011-06-23 16:49:20 -07002586 tabla_codec_pause_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002587 tabla_codec_enable_bandgap(codec,
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002588 TABLA_BANDGAP_AUDIO_MODE);
2589 tabla_codec_enable_clock_block(codec, 0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002590 tabla_codec_calibrate_hs_polling(codec);
2591 tabla_codec_start_hs_polling(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05302592 } else {
2593 tabla_codec_enable_bandgap(codec,
2594 TABLA_BANDGAP_AUDIO_MODE);
2595 tabla_codec_enable_clock_block(codec, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002596 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002597 } else {
2598
2599 if (!tabla->mclk_enabled) {
2600 pr_err("Error, MCLK already diabled\n");
2601 return -EINVAL;
2602 }
2603 tabla->mclk_enabled = false;
2604
2605 if (tabla->mbhc_polling_active) {
2606 if (!tabla->mclk_enabled) {
2607 tabla_codec_pause_hs_polling(codec);
2608 tabla_codec_enable_bandgap(codec,
2609 TABLA_BANDGAP_MBHC_MODE);
2610 tabla_enable_rx_bias(codec, 1);
2611 tabla_codec_enable_clock_block(codec, 1);
2612 tabla_codec_calibrate_hs_polling(codec);
2613 tabla_codec_start_hs_polling(codec);
2614 }
2615 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1,
2616 0x05, 0x01);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05302617 } else {
2618 tabla_codec_disable_clock_block(codec);
2619 tabla_codec_enable_bandgap(codec,
2620 TABLA_BANDGAP_OFF);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002621 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002622 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002623 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002624}
2625
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002626static int tabla_set_dai_sysclk(struct snd_soc_dai *dai,
2627 int clk_id, unsigned int freq, int dir)
2628{
2629 pr_debug("%s\n", __func__);
2630 return 0;
2631}
2632
2633static int tabla_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2634{
Santosh Mardie15e2302011-11-15 10:39:23 +05302635 u8 val = 0;
2636 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
2637
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002638 pr_debug("%s\n", __func__);
Santosh Mardie15e2302011-11-15 10:39:23 +05302639 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2640 case SND_SOC_DAIFMT_CBS_CFS:
2641 /* CPU is master */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302642 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002643 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05302644 snd_soc_update_bits(dai->codec,
2645 TABLA_A_CDC_CLK_TX_I2S_CTL,
2646 TABLA_I2S_MASTER_MODE_MASK, 0);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002647 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05302648 snd_soc_update_bits(dai->codec,
2649 TABLA_A_CDC_CLK_RX_I2S_CTL,
2650 TABLA_I2S_MASTER_MODE_MASK, 0);
2651 }
2652 break;
2653 case SND_SOC_DAIFMT_CBM_CFM:
2654 /* CPU is slave */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302655 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05302656 val = TABLA_I2S_MASTER_MODE_MASK;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002657 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05302658 snd_soc_update_bits(dai->codec,
2659 TABLA_A_CDC_CLK_TX_I2S_CTL, val, val);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002660 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05302661 snd_soc_update_bits(dai->codec,
2662 TABLA_A_CDC_CLK_RX_I2S_CTL, val, val);
2663 }
2664 break;
2665 default:
2666 return -EINVAL;
2667 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002668 return 0;
2669}
2670
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002671static int tabla_set_channel_map(struct snd_soc_dai *dai,
2672 unsigned int tx_num, unsigned int *tx_slot,
2673 unsigned int rx_num, unsigned int *rx_slot)
2674
2675{
2676 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
2677 u32 i = 0;
2678 if (!tx_slot && !rx_slot) {
2679 pr_err("%s: Invalid\n", __func__);
2680 return -EINVAL;
2681 }
2682 pr_debug("%s: DAI-ID %x %d %d\n", __func__, dai->id, tx_num, rx_num);
2683
Neema Shettyd3a89262012-02-16 10:23:50 -08002684 if (dai->id == AIF1_PB || dai->id == AIF2_PB) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002685 for (i = 0; i < rx_num; i++) {
2686 tabla->dai[dai->id - 1].ch_num[i] = rx_slot[i];
2687 tabla->dai[dai->id - 1].ch_act = 0;
2688 tabla->dai[dai->id - 1].ch_tot = rx_num;
2689 }
2690 } else if (dai->id == AIF1_CAP) {
2691 for (i = 0; i < tx_num; i++) {
2692 tabla->dai[dai->id - 1].ch_num[i] = tx_slot[i];
2693 tabla->dai[dai->id - 1].ch_act = 0;
2694 tabla->dai[dai->id - 1].ch_tot = tx_num;
2695 }
2696 }
2697 return 0;
2698}
2699
2700static int tabla_get_channel_map(struct snd_soc_dai *dai,
2701 unsigned int *tx_num, unsigned int *tx_slot,
2702 unsigned int *rx_num, unsigned int *rx_slot)
2703
2704{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302705 struct wcd9xxx *tabla = dev_get_drvdata(dai->codec->control_data);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002706
2707 u32 cnt = 0;
2708 u32 tx_ch[SLIM_MAX_TX_PORTS];
2709 u32 rx_ch[SLIM_MAX_RX_PORTS];
2710
2711 if (!rx_slot && !tx_slot) {
2712 pr_err("%s: Invalid\n", __func__);
2713 return -EINVAL;
2714 }
2715 pr_debug("%s: DAI-ID %x\n", __func__, dai->id);
2716 /* for virtual port, codec driver needs to do
2717 * housekeeping, for now should be ok
2718 */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302719 wcd9xxx_get_channel(tabla, rx_ch, tx_ch);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002720 if (dai->id == AIF1_PB) {
2721 *rx_num = tabla_dai[dai->id - 1].playback.channels_max;
2722 while (cnt < *rx_num) {
2723 rx_slot[cnt] = rx_ch[cnt];
2724 cnt++;
2725 }
2726 } else if (dai->id == AIF1_CAP) {
2727 *tx_num = tabla_dai[dai->id - 1].capture.channels_max;
2728 while (cnt < *tx_num) {
2729 tx_slot[cnt] = tx_ch[6 + cnt];
2730 cnt++;
2731 }
Neema Shettyd3a89262012-02-16 10:23:50 -08002732 } else if (dai->id == AIF2_PB) {
2733 *rx_num = tabla_dai[dai->id - 1].playback.channels_max;
2734 while (cnt < *rx_num) {
2735 rx_slot[cnt] = rx_ch[5 + cnt];
2736 cnt++;
2737 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002738 }
2739 return 0;
2740}
2741
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002742static int tabla_hw_params(struct snd_pcm_substream *substream,
2743 struct snd_pcm_hw_params *params,
2744 struct snd_soc_dai *dai)
2745{
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002746 struct snd_soc_codec *codec = dai->codec;
Santosh Mardie15e2302011-11-15 10:39:23 +05302747 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
Bhalchandra Gajare038bf3a2011-09-02 15:32:30 -07002748 u8 path, shift;
2749 u16 tx_fs_reg, rx_fs_reg;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002750 u8 tx_fs_rate, rx_fs_rate, rx_state, tx_state;
2751
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002752 pr_debug("%s: DAI-ID %x rate %d\n", __func__, dai->id,
2753 params_rate(params));
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002754
2755 switch (params_rate(params)) {
2756 case 8000:
2757 tx_fs_rate = 0x00;
2758 rx_fs_rate = 0x00;
2759 break;
2760 case 16000:
2761 tx_fs_rate = 0x01;
2762 rx_fs_rate = 0x20;
2763 break;
2764 case 32000:
2765 tx_fs_rate = 0x02;
2766 rx_fs_rate = 0x40;
2767 break;
2768 case 48000:
2769 tx_fs_rate = 0x03;
2770 rx_fs_rate = 0x60;
2771 break;
2772 default:
2773 pr_err("%s: Invalid sampling rate %d\n", __func__,
2774 params_rate(params));
2775 return -EINVAL;
2776 }
2777
2778
2779 /**
2780 * If current dai is a tx dai, set sample rate to
2781 * all the txfe paths that are currently not active
2782 */
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002783 if (dai->id == AIF1_CAP) {
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002784
2785 tx_state = snd_soc_read(codec,
2786 TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL);
2787
2788 for (path = 1, shift = 0;
2789 path <= NUM_DECIMATORS; path++, shift++) {
2790
2791 if (path == BITS_PER_REG + 1) {
2792 shift = 0;
2793 tx_state = snd_soc_read(codec,
2794 TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL);
2795 }
2796
2797 if (!(tx_state & (1 << shift))) {
2798 tx_fs_reg = TABLA_A_CDC_TX1_CLK_FS_CTL
2799 + (BITS_PER_REG*(path-1));
2800 snd_soc_update_bits(codec, tx_fs_reg,
2801 0x03, tx_fs_rate);
2802 }
2803 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302804 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05302805 switch (params_format(params)) {
2806 case SNDRV_PCM_FORMAT_S16_LE:
2807 snd_soc_update_bits(codec,
2808 TABLA_A_CDC_CLK_TX_I2S_CTL,
2809 0x20, 0x20);
2810 break;
2811 case SNDRV_PCM_FORMAT_S32_LE:
2812 snd_soc_update_bits(codec,
2813 TABLA_A_CDC_CLK_TX_I2S_CTL,
2814 0x20, 0x00);
2815 break;
2816 default:
2817 pr_err("invalid format\n");
2818 break;
2819 }
2820 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_TX_I2S_CTL,
2821 0x03, tx_fs_rate);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002822 } else {
2823 tabla->dai[dai->id - 1].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05302824 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002825 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002826 /**
2827 * TODO: Need to handle case where same RX chain takes 2 or more inputs
2828 * with varying sample rates
2829 */
2830
2831 /**
2832 * If current dai is a rx dai, set sample rate to
2833 * all the rx paths that are currently not active
2834 */
Neema Shettyd3a89262012-02-16 10:23:50 -08002835 if (dai->id == AIF1_PB || dai->id == AIF2_PB) {
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002836
2837 rx_state = snd_soc_read(codec,
2838 TABLA_A_CDC_CLK_RX_B1_CTL);
2839
2840 for (path = 1, shift = 0;
2841 path <= NUM_INTERPOLATORS; path++, shift++) {
2842
2843 if (!(rx_state & (1 << shift))) {
2844 rx_fs_reg = TABLA_A_CDC_RX1_B5_CTL
2845 + (BITS_PER_REG*(path-1));
2846 snd_soc_update_bits(codec, rx_fs_reg,
2847 0xE0, rx_fs_rate);
2848 }
2849 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302850 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05302851 switch (params_format(params)) {
2852 case SNDRV_PCM_FORMAT_S16_LE:
2853 snd_soc_update_bits(codec,
2854 TABLA_A_CDC_CLK_RX_I2S_CTL,
2855 0x20, 0x20);
2856 break;
2857 case SNDRV_PCM_FORMAT_S32_LE:
2858 snd_soc_update_bits(codec,
2859 TABLA_A_CDC_CLK_RX_I2S_CTL,
2860 0x20, 0x00);
2861 break;
2862 default:
2863 pr_err("invalid format\n");
2864 break;
2865 }
2866 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_I2S_CTL,
2867 0x03, (rx_fs_rate >> 0x05));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002868 } else {
2869 tabla->dai[dai->id - 1].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05302870 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002871 }
2872
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002873 return 0;
2874}
2875
2876static struct snd_soc_dai_ops tabla_dai_ops = {
2877 .startup = tabla_startup,
2878 .shutdown = tabla_shutdown,
2879 .hw_params = tabla_hw_params,
2880 .set_sysclk = tabla_set_dai_sysclk,
2881 .set_fmt = tabla_set_dai_fmt,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002882 .set_channel_map = tabla_set_channel_map,
2883 .get_channel_map = tabla_get_channel_map,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002884};
2885
2886static struct snd_soc_dai_driver tabla_dai[] = {
2887 {
2888 .name = "tabla_rx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002889 .id = AIF1_PB,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002890 .playback = {
2891 .stream_name = "AIF1 Playback",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002892 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002893 .formats = TABLA_FORMATS,
2894 .rate_max = 48000,
2895 .rate_min = 8000,
2896 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002897 .channels_max = 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002898 },
2899 .ops = &tabla_dai_ops,
2900 },
2901 {
2902 .name = "tabla_tx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002903 .id = AIF1_CAP,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002904 .capture = {
2905 .stream_name = "AIF1 Capture",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002906 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002907 .formats = TABLA_FORMATS,
2908 .rate_max = 48000,
2909 .rate_min = 8000,
2910 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002911 .channels_max = 4,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002912 },
2913 .ops = &tabla_dai_ops,
2914 },
Neema Shettyd3a89262012-02-16 10:23:50 -08002915 {
2916 .name = "tabla_rx2",
2917 .id = AIF2_PB,
2918 .playback = {
2919 .stream_name = "AIF2 Playback",
2920 .rates = WCD9310_RATES,
2921 .formats = TABLA_FORMATS,
2922 .rate_min = 8000,
2923 .rate_max = 48000,
2924 .channels_min = 1,
2925 .channels_max = 2,
2926 },
2927 .ops = &tabla_dai_ops,
2928 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002929};
Santosh Mardie15e2302011-11-15 10:39:23 +05302930
2931static struct snd_soc_dai_driver tabla_i2s_dai[] = {
2932 {
2933 .name = "tabla_i2s_rx1",
2934 .id = 1,
2935 .playback = {
2936 .stream_name = "AIF1 Playback",
2937 .rates = WCD9310_RATES,
2938 .formats = TABLA_FORMATS,
2939 .rate_max = 48000,
2940 .rate_min = 8000,
2941 .channels_min = 1,
2942 .channels_max = 4,
2943 },
2944 .ops = &tabla_dai_ops,
2945 },
2946 {
2947 .name = "tabla_i2s_tx1",
2948 .id = 2,
2949 .capture = {
2950 .stream_name = "AIF1 Capture",
2951 .rates = WCD9310_RATES,
2952 .formats = TABLA_FORMATS,
2953 .rate_max = 48000,
2954 .rate_min = 8000,
2955 .channels_min = 1,
2956 .channels_max = 4,
2957 },
2958 .ops = &tabla_dai_ops,
2959 },
2960};
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002961
2962static int tabla_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
2963 struct snd_kcontrol *kcontrol, int event)
2964{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302965 struct wcd9xxx *tabla;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002966 struct snd_soc_codec *codec = w->codec;
2967 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
2968 u32 j = 0;
2969 u32 ret = 0;
2970 codec->control_data = dev_get_drvdata(codec->dev->parent);
2971 tabla = codec->control_data;
2972 /* Execute the callback only if interface type is slimbus */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302973 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002974 return 0;
2975 switch (event) {
2976 case SND_SOC_DAPM_POST_PMU:
2977 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
2978 if (tabla_dai[j].id == AIF1_CAP)
2979 continue;
2980 if (!strncmp(w->sname,
2981 tabla_dai[j].playback.stream_name, 13)) {
2982 ++tabla_p->dai[j].ch_act;
2983 break;
2984 }
2985 }
2986 if (tabla_p->dai[j].ch_act == tabla_p->dai[j].ch_tot)
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302987 ret = wcd9xxx_cfg_slim_sch_rx(tabla,
2988 tabla_p->dai[j].ch_num,
2989 tabla_p->dai[j].ch_tot,
2990 tabla_p->dai[j].rate);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002991 break;
2992 case SND_SOC_DAPM_POST_PMD:
2993 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
2994 if (tabla_dai[j].id == AIF1_CAP)
2995 continue;
2996 if (!strncmp(w->sname,
2997 tabla_dai[j].playback.stream_name, 13)) {
2998 --tabla_p->dai[j].ch_act;
2999 break;
3000 }
3001 }
3002 if (!tabla_p->dai[j].ch_act) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303003 ret = wcd9xxx_close_slim_sch_rx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003004 tabla_p->dai[j].ch_num,
3005 tabla_p->dai[j].ch_tot);
3006 tabla_p->dai[j].rate = 0;
3007 memset(tabla_p->dai[j].ch_num, 0, (sizeof(u32)*
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303008 tabla_p->dai[j].ch_tot));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003009 tabla_p->dai[j].ch_tot = 0;
3010 }
3011 }
3012 return ret;
3013}
3014
3015static int tabla_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
3016 struct snd_kcontrol *kcontrol, int event)
3017{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303018 struct wcd9xxx *tabla;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003019 struct snd_soc_codec *codec = w->codec;
3020 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
3021 /* index to the DAI ID, for now hardcoding */
3022 u32 j = 0;
3023 u32 ret = 0;
3024
3025 codec->control_data = dev_get_drvdata(codec->dev->parent);
3026 tabla = codec->control_data;
3027
3028 /* Execute the callback only if interface type is slimbus */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303029 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003030 return 0;
3031 switch (event) {
3032 case SND_SOC_DAPM_POST_PMU:
3033 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Neema Shettyd3a89262012-02-16 10:23:50 -08003034 if (tabla_dai[j].id == AIF1_PB ||
3035 tabla_dai[j].id == AIF2_PB)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003036 continue;
3037 if (!strncmp(w->sname,
3038 tabla_dai[j].capture.stream_name, 13)) {
3039 ++tabla_p->dai[j].ch_act;
3040 break;
3041 }
3042 }
3043 if (tabla_p->dai[j].ch_act == tabla_p->dai[j].ch_tot)
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303044 ret = wcd9xxx_cfg_slim_sch_tx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003045 tabla_p->dai[j].ch_num,
3046 tabla_p->dai[j].ch_tot,
3047 tabla_p->dai[j].rate);
3048 break;
3049 case SND_SOC_DAPM_POST_PMD:
3050 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Neema Shettyd3a89262012-02-16 10:23:50 -08003051 if (tabla_dai[j].id == AIF1_PB ||
3052 tabla_dai[j].id == AIF2_PB)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003053 continue;
3054 if (!strncmp(w->sname,
3055 tabla_dai[j].capture.stream_name, 13)) {
3056 --tabla_p->dai[j].ch_act;
3057 break;
3058 }
3059 }
3060 if (!tabla_p->dai[j].ch_act) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303061 ret = wcd9xxx_close_slim_sch_tx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003062 tabla_p->dai[j].ch_num,
3063 tabla_p->dai[j].ch_tot);
3064 tabla_p->dai[j].rate = 0;
3065 memset(tabla_p->dai[j].ch_num, 0, (sizeof(u32)*
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303066 tabla_p->dai[j].ch_tot));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003067 tabla_p->dai[j].ch_tot = 0;
3068 }
3069 }
3070 return ret;
3071}
3072
3073/* Todo: Have seperate dapm widgets for I2S and Slimbus.
3074 * Might Need to have callbacks registered only for slimbus
3075 */
3076static const struct snd_soc_dapm_widget tabla_dapm_widgets[] = {
3077 /*RX stuff */
3078 SND_SOC_DAPM_OUTPUT("EAR"),
3079
3080 SND_SOC_DAPM_PGA("EAR PA", TABLA_A_RX_EAR_EN, 4, 0, NULL, 0),
3081
3082 SND_SOC_DAPM_MIXER("DAC1", TABLA_A_RX_EAR_EN, 6, 0, dac1_switch,
3083 ARRAY_SIZE(dac1_switch)),
3084
3085 SND_SOC_DAPM_AIF_IN_E("SLIM RX1", "AIF1 Playback", 0, SND_SOC_NOPM, 0,
3086 0, tabla_codec_enable_slimrx,
3087 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3088 SND_SOC_DAPM_AIF_IN_E("SLIM RX2", "AIF1 Playback", 0, SND_SOC_NOPM, 0,
3089 0, tabla_codec_enable_slimrx,
3090 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3091
3092 SND_SOC_DAPM_AIF_IN("SLIM RX3", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
3093 SND_SOC_DAPM_AIF_IN("SLIM RX4", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
3094
Neema Shettyd3a89262012-02-16 10:23:50 -08003095 SND_SOC_DAPM_AIF_IN_E("SLIM RX6", "AIF2 Playback", 0, SND_SOC_NOPM, 0,
3096 0, tabla_codec_enable_slimrx,
3097 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3098 SND_SOC_DAPM_AIF_IN_E("SLIM RX7", "AIF2 Playback", 0, SND_SOC_NOPM, 0,
3099 0, tabla_codec_enable_slimrx,
3100 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3101
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003102 /* Headphone */
3103 SND_SOC_DAPM_OUTPUT("HEADPHONE"),
3104 SND_SOC_DAPM_PGA_E("HPHL", TABLA_A_RX_HPH_CNP_EN, 5, 0, NULL, 0,
3105 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
3106 SND_SOC_DAPM_POST_PMD),
3107 SND_SOC_DAPM_MIXER("HPHL DAC", TABLA_A_RX_HPH_L_DAC_CTL, 7, 0,
3108 hphl_switch, ARRAY_SIZE(hphl_switch)),
3109
3110 SND_SOC_DAPM_PGA_E("HPHR", TABLA_A_RX_HPH_CNP_EN, 4, 0, NULL, 0,
3111 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
3112 SND_SOC_DAPM_POST_PMD),
3113
3114 SND_SOC_DAPM_DAC_E("HPHR DAC", NULL, TABLA_A_RX_HPH_R_DAC_CTL, 7, 0,
3115 tabla_hphr_dac_event,
3116 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3117
3118 /* Speaker */
3119 SND_SOC_DAPM_OUTPUT("LINEOUT1"),
3120 SND_SOC_DAPM_OUTPUT("LINEOUT2"),
3121 SND_SOC_DAPM_OUTPUT("LINEOUT3"),
3122 SND_SOC_DAPM_OUTPUT("LINEOUT4"),
3123 SND_SOC_DAPM_OUTPUT("LINEOUT5"),
3124
3125 SND_SOC_DAPM_PGA_E("LINEOUT1 PA", TABLA_A_RX_LINE_CNP_EN, 0, 0, NULL,
3126 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
3127 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3128 SND_SOC_DAPM_PGA_E("LINEOUT2 PA", TABLA_A_RX_LINE_CNP_EN, 1, 0, NULL,
3129 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
3130 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3131 SND_SOC_DAPM_PGA_E("LINEOUT3 PA", TABLA_A_RX_LINE_CNP_EN, 2, 0, NULL,
3132 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
3133 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3134 SND_SOC_DAPM_PGA_E("LINEOUT4 PA", TABLA_A_RX_LINE_CNP_EN, 3, 0, NULL,
3135 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
3136 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3137 SND_SOC_DAPM_PGA_E("LINEOUT5 PA", TABLA_A_RX_LINE_CNP_EN, 4, 0, NULL, 0,
3138 tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
3139 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3140
3141 SND_SOC_DAPM_DAC_E("LINEOUT1 DAC", NULL, TABLA_A_RX_LINE_1_DAC_CTL, 7, 0
3142 , tabla_lineout_dac_event,
3143 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3144 SND_SOC_DAPM_DAC_E("LINEOUT2 DAC", NULL, TABLA_A_RX_LINE_2_DAC_CTL, 7, 0
3145 , tabla_lineout_dac_event,
3146 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3147 SND_SOC_DAPM_DAC_E("LINEOUT3 DAC", NULL, TABLA_A_RX_LINE_3_DAC_CTL, 7, 0
3148 , tabla_lineout_dac_event,
3149 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3150 SND_SOC_DAPM_SWITCH("LINEOUT3 DAC GROUND", SND_SOC_NOPM, 0, 0,
3151 &lineout3_ground_switch),
3152 SND_SOC_DAPM_DAC_E("LINEOUT4 DAC", NULL, TABLA_A_RX_LINE_4_DAC_CTL, 7, 0
3153 , tabla_lineout_dac_event,
3154 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3155 SND_SOC_DAPM_SWITCH("LINEOUT4 DAC GROUND", SND_SOC_NOPM, 0, 0,
3156 &lineout4_ground_switch),
3157 SND_SOC_DAPM_DAC_E("LINEOUT5 DAC", NULL, TABLA_A_RX_LINE_5_DAC_CTL, 7, 0
3158 , tabla_lineout_dac_event,
3159 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3160
3161 SND_SOC_DAPM_MIXER_E("RX1 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 0, 0, NULL,
3162 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
3163 SND_SOC_DAPM_MIXER_E("RX2 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 1, 0, NULL,
3164 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
3165 SND_SOC_DAPM_MIXER_E("RX3 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 2, 0, NULL,
3166 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
3167 SND_SOC_DAPM_MIXER_E("RX4 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0, NULL,
3168 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
3169 SND_SOC_DAPM_MIXER_E("RX5 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 4, 0, NULL,
3170 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
3171 SND_SOC_DAPM_MIXER_E("RX6 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0, NULL,
3172 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
3173 SND_SOC_DAPM_MIXER_E("RX7 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 6, 0, NULL,
3174 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
3175
3176 SND_SOC_DAPM_MUX_E("RX4 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0,
3177 &rx4_dsm_mux, tabla_codec_reset_interpolator,
3178 SND_SOC_DAPM_PRE_PMU),
3179
3180 SND_SOC_DAPM_MUX_E("RX6 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0,
3181 &rx6_dsm_mux, tabla_codec_reset_interpolator,
3182 SND_SOC_DAPM_PRE_PMU),
3183
3184 SND_SOC_DAPM_MIXER("RX1 CHAIN", TABLA_A_CDC_RX1_B6_CTL, 5, 0, NULL, 0),
3185 SND_SOC_DAPM_MIXER("RX2 CHAIN", TABLA_A_CDC_RX2_B6_CTL, 5, 0, NULL, 0),
3186
3187 SND_SOC_DAPM_MUX("RX1 MIX1 INP1", SND_SOC_NOPM, 0, 0,
3188 &rx_mix1_inp1_mux),
3189 SND_SOC_DAPM_MUX("RX1 MIX1 INP2", SND_SOC_NOPM, 0, 0,
3190 &rx_mix1_inp2_mux),
3191 SND_SOC_DAPM_MUX("RX2 MIX1 INP1", SND_SOC_NOPM, 0, 0,
3192 &rx2_mix1_inp1_mux),
3193 SND_SOC_DAPM_MUX("RX2 MIX1 INP2", SND_SOC_NOPM, 0, 0,
3194 &rx2_mix1_inp2_mux),
3195 SND_SOC_DAPM_MUX("RX3 MIX1 INP1", SND_SOC_NOPM, 0, 0,
3196 &rx3_mix1_inp1_mux),
3197 SND_SOC_DAPM_MUX("RX3 MIX1 INP2", SND_SOC_NOPM, 0, 0,
3198 &rx3_mix1_inp2_mux),
3199 SND_SOC_DAPM_MUX("RX4 MIX1 INP1", SND_SOC_NOPM, 0, 0,
3200 &rx4_mix1_inp1_mux),
3201 SND_SOC_DAPM_MUX("RX4 MIX1 INP2", SND_SOC_NOPM, 0, 0,
3202 &rx4_mix1_inp2_mux),
3203 SND_SOC_DAPM_MUX("RX5 MIX1 INP1", SND_SOC_NOPM, 0, 0,
3204 &rx5_mix1_inp1_mux),
3205 SND_SOC_DAPM_MUX("RX5 MIX1 INP2", SND_SOC_NOPM, 0, 0,
3206 &rx5_mix1_inp2_mux),
3207 SND_SOC_DAPM_MUX("RX6 MIX1 INP1", SND_SOC_NOPM, 0, 0,
3208 &rx6_mix1_inp1_mux),
3209 SND_SOC_DAPM_MUX("RX6 MIX1 INP2", SND_SOC_NOPM, 0, 0,
3210 &rx6_mix1_inp2_mux),
3211 SND_SOC_DAPM_MUX("RX7 MIX1 INP1", SND_SOC_NOPM, 0, 0,
3212 &rx7_mix1_inp1_mux),
3213 SND_SOC_DAPM_MUX("RX7 MIX1 INP2", SND_SOC_NOPM, 0, 0,
3214 &rx7_mix1_inp2_mux),
3215
3216 SND_SOC_DAPM_SUPPLY("CP", TABLA_A_CP_EN, 0, 0,
3217 tabla_codec_enable_charge_pump, SND_SOC_DAPM_POST_PMU |
3218 SND_SOC_DAPM_PRE_PMD),
3219
3220 SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
3221 tabla_codec_enable_rx_bias, SND_SOC_DAPM_PRE_PMU |
3222 SND_SOC_DAPM_POST_PMD),
3223
3224 /* TX */
3225
3226 SND_SOC_DAPM_SUPPLY("CDC_CONN", TABLA_A_CDC_CLK_OTHR_CTL, 2, 0, NULL,
3227 0),
3228
3229 SND_SOC_DAPM_SUPPLY("LDO_H", TABLA_A_LDO_H_MODE_1, 7, 0,
3230 tabla_codec_enable_ldo_h, SND_SOC_DAPM_POST_PMU),
3231
3232 SND_SOC_DAPM_INPUT("AMIC1"),
3233 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", TABLA_A_MICB_1_CTL, 7, 0,
3234 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3235 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3236 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal1", TABLA_A_MICB_1_CTL, 7, 0,
3237 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3238 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3239 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal2", TABLA_A_MICB_1_CTL, 7, 0,
3240 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3241 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3242 SND_SOC_DAPM_ADC_E("ADC1", NULL, TABLA_A_TX_1_2_EN, 7, 0,
3243 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
3244 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3245
3246 SND_SOC_DAPM_INPUT("AMIC3"),
3247 SND_SOC_DAPM_ADC_E("ADC3", NULL, TABLA_A_TX_3_4_EN, 7, 0,
3248 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
3249 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3250
3251 SND_SOC_DAPM_INPUT("AMIC4"),
3252 SND_SOC_DAPM_ADC_E("ADC4", NULL, TABLA_A_TX_3_4_EN, 3, 0,
3253 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
3254 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3255
3256 SND_SOC_DAPM_INPUT("AMIC5"),
3257 SND_SOC_DAPM_ADC_E("ADC5", NULL, TABLA_A_TX_5_6_EN, 7, 0,
3258 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
3259
3260 SND_SOC_DAPM_INPUT("AMIC6"),
3261 SND_SOC_DAPM_ADC_E("ADC6", NULL, TABLA_A_TX_5_6_EN, 3, 0,
3262 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
3263
3264 SND_SOC_DAPM_MUX_E("DEC1 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 0, 0,
3265 &dec1_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3266
3267 SND_SOC_DAPM_MUX_E("DEC2 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 1, 0,
3268 &dec2_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3269
3270 SND_SOC_DAPM_MUX_E("DEC3 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 2, 0,
3271 &dec3_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3272
3273 SND_SOC_DAPM_MUX_E("DEC4 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 3, 0,
3274 &dec4_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3275
3276 SND_SOC_DAPM_MUX_E("DEC5 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 4, 0,
3277 &dec5_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3278
3279 SND_SOC_DAPM_MUX_E("DEC6 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 5, 0,
3280 &dec6_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3281
3282 SND_SOC_DAPM_MUX_E("DEC7 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 6, 0,
3283 &dec7_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3284
3285 SND_SOC_DAPM_MUX_E("DEC8 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 7, 0,
3286 &dec8_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3287
3288 SND_SOC_DAPM_MUX_E("DEC9 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 0, 0,
3289 &dec9_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3290
3291 SND_SOC_DAPM_MUX_E("DEC10 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 1, 0,
3292 &dec10_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3293
3294 SND_SOC_DAPM_MUX("ANC1 MUX", SND_SOC_NOPM, 0, 0, &anc1_mux),
3295 SND_SOC_DAPM_MUX("ANC2 MUX", SND_SOC_NOPM, 0, 0, &anc2_mux),
3296
3297 SND_SOC_DAPM_MIXER_E("ANC", SND_SOC_NOPM, 0, 0, NULL, 0,
3298 tabla_codec_enable_anc, SND_SOC_DAPM_PRE_PMU |
3299 SND_SOC_DAPM_POST_PMD),
3300
3301 SND_SOC_DAPM_MUX("ANC1 FB MUX", SND_SOC_NOPM, 0, 0, &anc1_fb_mux),
3302
3303 SND_SOC_DAPM_INPUT("AMIC2"),
3304 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", TABLA_A_MICB_2_CTL, 7, 0,
3305 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3306 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3307 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal1", TABLA_A_MICB_2_CTL, 7, 0,
3308 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3309 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3310 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal2", TABLA_A_MICB_2_CTL, 7, 0,
3311 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3312 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3313 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal3", TABLA_A_MICB_2_CTL, 7, 0,
3314 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3315 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3316 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 External", TABLA_A_MICB_3_CTL, 7, 0,
3317 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3318 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3319 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal1", TABLA_A_MICB_3_CTL, 7, 0,
3320 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3321 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3322 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal2", TABLA_A_MICB_3_CTL, 7, 0,
3323 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3324 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3325 SND_SOC_DAPM_ADC_E("ADC2", NULL, TABLA_A_TX_1_2_EN, 3, 0,
3326 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
3327 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3328
3329 SND_SOC_DAPM_MUX("SLIM TX1 MUX", SND_SOC_NOPM, 0, 0, &sb_tx1_mux),
3330 SND_SOC_DAPM_AIF_OUT("SLIM TX1", "AIF1 Capture", NULL, SND_SOC_NOPM,
3331 0, 0),
3332
3333 SND_SOC_DAPM_MUX("SLIM TX5 MUX", SND_SOC_NOPM, 0, 0, &sb_tx5_mux),
3334 SND_SOC_DAPM_AIF_OUT("SLIM TX5", "AIF1 Capture", NULL, SND_SOC_NOPM,
3335 4, 0),
3336
3337 SND_SOC_DAPM_MUX("SLIM TX6 MUX", SND_SOC_NOPM, 0, 0, &sb_tx6_mux),
3338 SND_SOC_DAPM_AIF_OUT("SLIM TX6", "AIF1 Capture", NULL, SND_SOC_NOPM,
3339 5, 0),
3340
3341 SND_SOC_DAPM_MUX("SLIM TX7 MUX", SND_SOC_NOPM, 0, 0, &sb_tx7_mux),
3342 SND_SOC_DAPM_AIF_OUT_E("SLIM TX7", "AIF1 Capture", 0, SND_SOC_NOPM, 0,
3343 0, tabla_codec_enable_slimtx,
3344 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3345
3346 SND_SOC_DAPM_MUX("SLIM TX8 MUX", SND_SOC_NOPM, 0, 0, &sb_tx8_mux),
3347 SND_SOC_DAPM_AIF_OUT_E("SLIM TX8", "AIF1 Capture", 0, SND_SOC_NOPM, 0,
3348 0, tabla_codec_enable_slimtx,
3349 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3350
3351 SND_SOC_DAPM_MUX("SLIM TX9 MUX", SND_SOC_NOPM, 0, 0, &sb_tx9_mux),
3352 SND_SOC_DAPM_AIF_OUT_E("SLIM TX9", "AIF1 Capture", NULL, SND_SOC_NOPM,
3353 0, 0, tabla_codec_enable_slimtx,
3354 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3355
3356 SND_SOC_DAPM_MUX("SLIM TX10 MUX", SND_SOC_NOPM, 0, 0, &sb_tx10_mux),
3357 SND_SOC_DAPM_AIF_OUT_E("SLIM TX10", "AIF1 Capture", NULL, SND_SOC_NOPM,
3358 0, 0, tabla_codec_enable_slimtx,
3359 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3360
3361 /* Digital Mic Inputs */
3362 SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
3363 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
3364 SND_SOC_DAPM_POST_PMD),
3365
3366 SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 0, 0,
3367 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
3368 SND_SOC_DAPM_POST_PMD),
3369
3370 SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 0, 0,
3371 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
3372 SND_SOC_DAPM_POST_PMD),
3373
3374 SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 0, 0,
3375 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
3376 SND_SOC_DAPM_POST_PMD),
3377
3378 SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 0, 0,
3379 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
3380 SND_SOC_DAPM_POST_PMD),
3381 SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 0, 0,
3382 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
3383 SND_SOC_DAPM_POST_PMD),
3384
3385 /* Sidetone */
3386 SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
3387 SND_SOC_DAPM_PGA("IIR1", TABLA_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
3388};
3389
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003390static short tabla_codec_read_sta_result(struct snd_soc_codec *codec)
Bradley Rubincb1e2732011-06-23 16:49:20 -07003391{
3392 u8 bias_msb, bias_lsb;
3393 short bias_value;
3394
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003395 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B3_STATUS);
3396 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B2_STATUS);
3397 bias_value = (bias_msb << 8) | bias_lsb;
3398 return bias_value;
3399}
3400
3401static short tabla_codec_read_dce_result(struct snd_soc_codec *codec)
3402{
3403 u8 bias_msb, bias_lsb;
3404 short bias_value;
3405
3406 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B5_STATUS);
3407 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B4_STATUS);
3408 bias_value = (bias_msb << 8) | bias_lsb;
3409 return bias_value;
3410}
3411
Joonwoo Park0976d012011-12-22 11:48:18 -08003412static short tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce)
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003413{
Joonwoo Park0976d012011-12-22 11:48:18 -08003414 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003415 short bias_value;
3416
Joonwoo Park925914c2012-01-05 13:35:18 -08003417 /* Turn on the override */
3418 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x4, 0x4);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003419 if (dce) {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003420 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3421 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
3422 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08003423 usleep_range(tabla->mbhc_data.t_sta_dce,
3424 tabla->mbhc_data.t_sta_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003425 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
Joonwoo Park0976d012011-12-22 11:48:18 -08003426 usleep_range(tabla->mbhc_data.t_dce,
3427 tabla->mbhc_data.t_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003428 bias_value = tabla_codec_read_dce_result(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003429 } else {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003430 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003431 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
3432 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08003433 usleep_range(tabla->mbhc_data.t_sta_dce,
3434 tabla->mbhc_data.t_sta_dce);
Joonwoo Park0976d012011-12-22 11:48:18 -08003435 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
3436 usleep_range(tabla->mbhc_data.t_sta,
3437 tabla->mbhc_data.t_sta);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003438 bias_value = tabla_codec_read_sta_result(codec);
3439 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3440 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003441 }
Joonwoo Park925914c2012-01-05 13:35:18 -08003442 /* Turn off the override after measuring mic voltage */
3443 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003444
Bradley Rubincb1e2732011-06-23 16:49:20 -07003445 return bias_value;
3446}
3447
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003448static short tabla_codec_setup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003449{
3450 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003451 short bias_value;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003452 u8 cfilt_mode;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003453
Joonwoo Park0976d012011-12-22 11:48:18 -08003454 if (!tabla->calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003455 pr_err("Error, no tabla calibration\n");
Bradley Rubincb1e2732011-06-23 16:49:20 -07003456 return -ENODEV;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003457 }
3458
3459 tabla->mbhc_polling_active = true;
3460
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003461 if (!tabla->mclk_enabled) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003462 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_MBHC_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003463 tabla_enable_rx_bias(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003464 tabla_codec_enable_clock_block(codec, 1);
3465 }
3466
3467 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x01);
3468
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003469 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0xE0);
3470
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003471 /* Make sure CFILT is in fast mode, save current mode */
Joonwoo Parkf4267c22012-01-10 13:25:24 -08003472 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
3473 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x70, 0x00);
Patrick Lai3043fba2011-08-01 14:15:57 -07003474
Joonwoo Parkf4267c22012-01-10 13:25:24 -08003475 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x1F, 0x16);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003476
3477 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003478 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003479
3480 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x80);
3481 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x1F, 0x1C);
3482 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x40, 0x40);
3483
3484 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003485 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3486 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003487
Joonwoo Park925914c2012-01-05 13:35:18 -08003488 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x2, 0x2);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003489 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3490
Bradley Rubincb1e2732011-06-23 16:49:20 -07003491 tabla_codec_calibrate_hs_polling(codec);
3492
Joonwoo Park0976d012011-12-22 11:48:18 -08003493 bias_value = tabla_codec_sta_dce(codec, 0);
3494 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
3495 cfilt_mode);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003496 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003497
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003498 return bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003499}
3500
3501static int tabla_codec_enable_hs_detect(struct snd_soc_codec *codec,
3502 int insertion)
3503{
3504 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003505 int central_bias_enabled = 0;
Joonwoo Park0976d012011-12-22 11:48:18 -08003506 const struct tabla_mbhc_general_cfg *generic =
3507 TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration);
3508 const struct tabla_mbhc_plug_detect_cfg *plug_det =
3509 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->calibration);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003510 u8 wg_time;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003511
Joonwoo Park0976d012011-12-22 11:48:18 -08003512 if (!tabla->calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003513 pr_err("Error, no tabla calibration\n");
3514 return -EINVAL;
3515 }
3516
3517 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0);
3518
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003519 if (insertion) {
3520 /* Make sure mic bias and Mic line schmitt trigger
3521 * are turned OFF
3522 */
3523 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg,
3524 0x81, 0x01);
3525 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
3526 0x90, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003527 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
3528 wg_time += 1;
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003529
3530 /* Enable HPH Schmitt Trigger */
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003531 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x11, 0x11);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003532 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x0C,
Joonwoo Park0976d012011-12-22 11:48:18 -08003533 plug_det->hph_current << 2);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003534
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003535 /* Turn off HPH PAs and DAC's during insertion detection to
3536 * avoid false insertion interrupts
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003537 */
3538 if (tabla->mbhc_micbias_switched)
3539 tabla_codec_switch_micbias(codec, 0);
3540 snd_soc_update_bits(codec, TABLA_A_RX_HPH_CNP_EN, 0x30, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003541 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_DAC_CTL,
Joonwoo Park0976d012011-12-22 11:48:18 -08003542 0xC0, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003543 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_DAC_CTL,
Joonwoo Park0976d012011-12-22 11:48:18 -08003544 0xC0, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003545 usleep_range(wg_time * 1000, wg_time * 1000);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003546
3547 /* setup for insetion detection */
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003548 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x02, 0x02);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003549 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003550 } else {
3551 /* Make sure the HPH schmitt trigger is OFF */
3552 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12, 0x00);
3553
3554 /* enable the mic line schmitt trigger */
3555 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x60,
Joonwoo Park0976d012011-12-22 11:48:18 -08003556 plug_det->mic_current << 5);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003557 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
3558 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08003559 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003560 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
3561 0x10, 0x10);
3562
3563 /* Setup for low power removal detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003564 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0x2);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003565 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003566
3567 if (snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x4) {
3568 if (!(tabla->clock_active)) {
3569 tabla_codec_enable_config_mode(codec, 1);
3570 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07003571 0x06, 0);
Joonwoo Park0976d012011-12-22 11:48:18 -08003572 usleep_range(generic->t_shutdown_plug_rem,
3573 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003574 tabla_codec_enable_config_mode(codec, 0);
3575 } else
3576 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07003577 0x06, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003578 }
3579
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003580 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.int_rbias, 0x80, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003581
3582 /* If central bandgap disabled */
3583 if (!(snd_soc_read(codec, TABLA_A_PIN_CTL_OE1) & 1)) {
3584 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x3, 0x3);
Joonwoo Park0976d012011-12-22 11:48:18 -08003585 usleep_range(generic->t_bg_fast_settle,
3586 generic->t_bg_fast_settle);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003587 central_bias_enabled = 1;
3588 }
3589
3590 /* If LDO_H disabled */
3591 if (snd_soc_read(codec, TABLA_A_PIN_CTL_OE0) & 0x80) {
3592 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x10, 0);
3593 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08003594 usleep_range(generic->t_ldoh, generic->t_ldoh);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003595 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0);
3596
3597 if (central_bias_enabled)
3598 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x1, 0);
3599 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003600
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003601 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x3,
3602 tabla->micbias);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003603
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303604 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003605 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
3606 return 0;
3607}
3608
Joonwoo Park0976d012011-12-22 11:48:18 -08003609static u16 tabla_codec_v_sta_dce(struct snd_soc_codec *codec, bool dce,
3610 s16 vin_mv)
3611{
3612 short diff, zero;
3613 struct tabla_priv *tabla;
3614 u32 mb_mv, in;
3615
3616 tabla = snd_soc_codec_get_drvdata(codec);
3617 mb_mv = tabla->mbhc_data.micb_mv;
3618
3619 if (mb_mv == 0) {
3620 pr_err("%s: Mic Bias voltage is set to zero\n", __func__);
3621 return -EINVAL;
3622 }
3623
3624 if (dce) {
3625 diff = tabla->mbhc_data.dce_mb - tabla->mbhc_data.dce_z;
3626 zero = tabla->mbhc_data.dce_z;
3627 } else {
3628 diff = tabla->mbhc_data.sta_mb - tabla->mbhc_data.sta_z;
3629 zero = tabla->mbhc_data.sta_z;
3630 }
3631 in = (u32) diff * vin_mv;
3632
3633 return (u16) (in / mb_mv) + zero;
3634}
3635
3636static s32 tabla_codec_sta_dce_v(struct snd_soc_codec *codec, s8 dce,
3637 u16 bias_value)
3638{
3639 struct tabla_priv *tabla;
3640 s32 mv;
3641
3642 tabla = snd_soc_codec_get_drvdata(codec);
3643
3644 if (dce) {
3645 mv = ((s32)bias_value - (s32)tabla->mbhc_data.dce_z) *
3646 (s32)tabla->mbhc_data.micb_mv /
3647 (s32)(tabla->mbhc_data.dce_mb - tabla->mbhc_data.dce_z);
3648 } else {
3649 mv = ((s32)bias_value - (s32)tabla->mbhc_data.sta_z) *
3650 (s32)tabla->mbhc_data.micb_mv /
3651 (s32)(tabla->mbhc_data.sta_mb - tabla->mbhc_data.sta_z);
3652 }
3653
3654 return mv;
3655}
3656
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003657static void btn0_lpress_fn(struct work_struct *work)
3658{
3659 struct delayed_work *delayed_work;
3660 struct tabla_priv *tabla;
Joonwoo Park0976d012011-12-22 11:48:18 -08003661 short bias_value;
3662 int dce_mv, sta_mv;
Joonwoo Park816b8e62012-01-23 16:03:21 -08003663 struct tabla *core;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003664
3665 pr_debug("%s:\n", __func__);
3666
3667 delayed_work = to_delayed_work(work);
3668 tabla = container_of(delayed_work, struct tabla_priv, btn0_dwork);
Joonwoo Park816b8e62012-01-23 16:03:21 -08003669 core = dev_get_drvdata(tabla->codec->dev->parent);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003670
3671 if (tabla) {
3672 if (tabla->button_jack) {
Joonwoo Park0976d012011-12-22 11:48:18 -08003673 bias_value = tabla_codec_read_sta_result(tabla->codec);
3674 sta_mv = tabla_codec_sta_dce_v(tabla->codec, 0,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303675 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08003676 bias_value = tabla_codec_read_dce_result(tabla->codec);
3677 dce_mv = tabla_codec_sta_dce_v(tabla->codec, 1,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303678 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08003679 pr_debug("%s: Reporting long button press event"
3680 " STA: %d, DCE: %d\n", __func__,
3681 sta_mv, dce_mv);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003682 tabla_snd_soc_jack_report(tabla, tabla->button_jack,
3683 SND_JACK_BTN_0,
3684 SND_JACK_BTN_0);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003685 }
3686 } else {
3687 pr_err("%s: Bad tabla private data\n", __func__);
3688 }
3689
3690}
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003691
Joonwoo Park0976d012011-12-22 11:48:18 -08003692void tabla_mbhc_cal(struct snd_soc_codec *codec)
3693{
3694 struct tabla_priv *tabla;
3695 struct tabla_mbhc_btn_detect_cfg *btn_det;
3696 u8 cfilt_mode, bg_mode;
3697 u8 ncic, nmeas, navg;
3698 u32 mclk_rate;
3699 u32 dce_wait, sta_wait;
3700 u8 *n_cic;
3701
3702 tabla = snd_soc_codec_get_drvdata(codec);
3703
3704 /* First compute the DCE / STA wait times
3705 * depending on tunable parameters.
3706 * The value is computed in microseconds
3707 */
3708 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
3709 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08003710 ncic = n_cic[tabla_codec_mclk_index(tabla)];
Joonwoo Park0976d012011-12-22 11:48:18 -08003711 nmeas = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration)->n_meas;
3712 navg = TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration)->mbhc_navg;
3713 mclk_rate = tabla->mclk_freq;
Joonwoo Park433149a2012-01-11 09:53:54 -08003714 dce_wait = (1000 * 512 * ncic * (nmeas + 1)) / (mclk_rate / 1000);
3715 sta_wait = (1000 * 128 * (navg + 1)) / (mclk_rate / 1000);
Joonwoo Park0976d012011-12-22 11:48:18 -08003716
3717 tabla->mbhc_data.t_dce = dce_wait;
3718 tabla->mbhc_data.t_sta = sta_wait;
3719
3720 /* LDOH and CFILT are already configured during pdata handling.
3721 * Only need to make sure CFILT and bandgap are in Fast mode.
3722 * Need to restore defaults once calculation is done.
3723 */
3724 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
3725 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40, 0x00);
3726 bg_mode = snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02,
3727 0x02);
3728
3729 /* Micbias, CFILT, LDOH, MBHC MUX mode settings
3730 * to perform ADC calibration
3731 */
3732 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x60,
3733 tabla->micbias << 5);
3734 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
3735 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x60, 0x60);
3736 snd_soc_write(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x78);
3737 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x04);
3738
3739 /* DCE measurement for 0 volts */
3740 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
3741 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
3742 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08003743 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
3744 usleep_range(100, 100);
3745 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
3746 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
3747 tabla->mbhc_data.dce_z = tabla_codec_read_dce_result(codec);
3748
3749 /* DCE measurment for MB voltage */
3750 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
3751 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
3752 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
3753 usleep_range(100, 100);
3754 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
3755 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
3756 tabla->mbhc_data.dce_mb = tabla_codec_read_dce_result(codec);
3757
3758 /* Sta measuremnt for 0 volts */
3759 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
3760 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
3761 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08003762 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
3763 usleep_range(100, 100);
3764 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
3765 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
3766 tabla->mbhc_data.sta_z = tabla_codec_read_sta_result(codec);
3767
3768 /* STA Measurement for MB Voltage */
3769 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
3770 usleep_range(100, 100);
3771 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
3772 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
3773 tabla->mbhc_data.sta_mb = tabla_codec_read_sta_result(codec);
3774
3775 /* Restore default settings. */
3776 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
3777 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
3778 cfilt_mode);
3779 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02, bg_mode);
3780
3781 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
3782 usleep_range(100, 100);
3783}
3784
3785void *tabla_mbhc_cal_btn_det_mp(const struct tabla_mbhc_btn_detect_cfg* btn_det,
3786 const enum tabla_mbhc_btn_det_mem mem)
3787{
3788 void *ret = &btn_det->_v_btn_low;
3789
3790 switch (mem) {
3791 case TABLA_BTN_DET_GAIN:
3792 ret += sizeof(btn_det->_n_cic);
3793 case TABLA_BTN_DET_N_CIC:
3794 ret += sizeof(btn_det->_n_ready);
Joonwoo Parkc0672392012-01-11 11:03:14 -08003795 case TABLA_BTN_DET_N_READY:
Joonwoo Park0976d012011-12-22 11:48:18 -08003796 ret += sizeof(btn_det->_v_btn_high[0]) * btn_det->num_btn;
3797 case TABLA_BTN_DET_V_BTN_HIGH:
3798 ret += sizeof(btn_det->_v_btn_low[0]) * btn_det->num_btn;
3799 case TABLA_BTN_DET_V_BTN_LOW:
3800 /* do nothing */
3801 break;
3802 default:
3803 ret = NULL;
3804 }
3805
3806 return ret;
3807}
3808
3809static void tabla_mbhc_calc_thres(struct snd_soc_codec *codec)
3810{
3811 struct tabla_priv *tabla;
3812 s16 btn_mv = 0, btn_delta_mv;
3813 struct tabla_mbhc_btn_detect_cfg *btn_det;
3814 struct tabla_mbhc_plug_type_cfg *plug_type;
3815 u16 *btn_high;
Joonwoo Parkc0672392012-01-11 11:03:14 -08003816 u8 *n_ready;
Joonwoo Park0976d012011-12-22 11:48:18 -08003817 int i;
3818
3819 tabla = snd_soc_codec_get_drvdata(codec);
3820 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
3821 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->calibration);
3822
Joonwoo Parkc0672392012-01-11 11:03:14 -08003823 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Park0976d012011-12-22 11:48:18 -08003824 if (tabla->mclk_freq == TABLA_MCLK_RATE_12288KHZ) {
Joonwoo Park0976d012011-12-22 11:48:18 -08003825 tabla->mbhc_data.npoll = 9;
3826 tabla->mbhc_data.nbounce_wait = 30;
3827 } else if (tabla->mclk_freq == TABLA_MCLK_RATE_9600KHZ) {
Joonwoo Park0976d012011-12-22 11:48:18 -08003828 tabla->mbhc_data.npoll = 7;
3829 tabla->mbhc_data.nbounce_wait = 23;
Joonwoo Parkc0672392012-01-11 11:03:14 -08003830 }
Joonwoo Park0976d012011-12-22 11:48:18 -08003831
Joonwoo Park433149a2012-01-11 09:53:54 -08003832 tabla->mbhc_data.t_sta_dce = ((1000 * 256) / (tabla->mclk_freq / 1000) *
Joonwoo Parkc0672392012-01-11 11:03:14 -08003833 n_ready[tabla_codec_mclk_index(tabla)]) +
3834 10;
Joonwoo Park0976d012011-12-22 11:48:18 -08003835 tabla->mbhc_data.v_ins_hu =
3836 tabla_codec_v_sta_dce(codec, STA, plug_type->v_hs_max);
3837 tabla->mbhc_data.v_ins_h =
3838 tabla_codec_v_sta_dce(codec, DCE, plug_type->v_hs_max);
3839
3840 btn_high = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_HIGH);
3841 for (i = 0; i < btn_det->num_btn; i++)
3842 btn_mv = btn_high[i] > btn_mv ? btn_high[i] : btn_mv;
3843
3844 tabla->mbhc_data.v_b1_h = tabla_codec_v_sta_dce(codec, DCE, btn_mv);
3845 btn_delta_mv = btn_mv + btn_det->v_btn_press_delta_sta;
3846
3847 tabla->mbhc_data.v_b1_hu =
3848 tabla_codec_v_sta_dce(codec, STA, btn_delta_mv);
3849
3850 btn_delta_mv = btn_mv + btn_det->v_btn_press_delta_cic;
3851
3852 tabla->mbhc_data.v_b1_huc =
3853 tabla_codec_v_sta_dce(codec, DCE, btn_delta_mv);
3854
3855 tabla->mbhc_data.v_brh = tabla->mbhc_data.v_b1_h;
3856 tabla->mbhc_data.v_brl = 0xFA55;
3857
3858 tabla->mbhc_data.v_no_mic =
3859 tabla_codec_v_sta_dce(codec, STA, plug_type->v_no_mic);
3860}
3861
3862void tabla_mbhc_init(struct snd_soc_codec *codec)
3863{
3864 struct tabla_priv *tabla;
3865 struct tabla_mbhc_general_cfg *generic;
3866 struct tabla_mbhc_btn_detect_cfg *btn_det;
3867 int n;
Joonwoo Park0976d012011-12-22 11:48:18 -08003868 u8 *n_cic, *gain;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303869 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Joonwoo Park0976d012011-12-22 11:48:18 -08003870
3871 tabla = snd_soc_codec_get_drvdata(codec);
3872 generic = TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration);
3873 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
3874
Joonwoo Park0976d012011-12-22 11:48:18 -08003875 for (n = 0; n < 8; n++) {
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08003876 if ((!TABLA_IS_1_X(tabla_core->version)) || n != 7) {
Joonwoo Park0976d012011-12-22 11:48:18 -08003877 snd_soc_update_bits(codec,
3878 TABLA_A_CDC_MBHC_FEATURE_B1_CFG,
3879 0x07, n);
3880 snd_soc_write(codec, TABLA_A_CDC_MBHC_FEATURE_B2_CFG,
3881 btn_det->c[n]);
3882 }
3883 }
3884 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x07,
3885 btn_det->nc);
3886
3887 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
3888 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL, 0xFF,
Joonwoo Park107edf02012-01-11 11:42:24 -08003889 n_cic[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08003890
3891 gain = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_GAIN);
Joonwoo Park107edf02012-01-11 11:42:24 -08003892 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x78,
3893 gain[tabla_codec_mclk_index(tabla)] << 3);
Joonwoo Park0976d012011-12-22 11:48:18 -08003894
3895 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x70,
3896 generic->mbhc_nsa << 4);
3897
3898 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x0F,
3899 btn_det->n_meas);
3900
3901 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B5_CTL, generic->mbhc_navg);
3902
3903 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x80, 0x80);
3904
3905 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x78,
3906 btn_det->mbhc_nsc << 3);
3907
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003908 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x03,
3909 TABLA_MICBIAS2);
Joonwoo Park0976d012011-12-22 11:48:18 -08003910
3911 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
3912}
3913
Patrick Lai64b43262011-12-06 17:29:15 -08003914static bool tabla_mbhc_fw_validate(const struct firmware *fw)
3915{
3916 u32 cfg_offset;
3917 struct tabla_mbhc_imped_detect_cfg *imped_cfg;
3918 struct tabla_mbhc_btn_detect_cfg *btn_cfg;
3919
3920 if (fw->size < TABLA_MBHC_CAL_MIN_SIZE)
3921 return false;
3922
3923 /* previous check guarantees that there is enough fw data up
3924 * to num_btn
3925 */
3926 btn_cfg = TABLA_MBHC_CAL_BTN_DET_PTR(fw->data);
3927 cfg_offset = (u32) ((void *) btn_cfg - (void *) fw->data);
3928 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_BTN_SZ(btn_cfg)))
3929 return false;
3930
3931 /* previous check guarantees that there is enough fw data up
3932 * to start of impedance detection configuration
3933 */
3934 imped_cfg = TABLA_MBHC_CAL_IMPED_DET_PTR(fw->data);
3935 cfg_offset = (u32) ((void *) imped_cfg - (void *) fw->data);
3936
3937 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_MIN_SZ))
3938 return false;
3939
3940 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_SZ(imped_cfg)))
3941 return false;
3942
3943 return true;
3944}
3945static void mbhc_fw_read(struct work_struct *work)
3946{
3947 struct delayed_work *dwork;
3948 struct tabla_priv *tabla;
3949 struct snd_soc_codec *codec;
3950 const struct firmware *fw;
3951 int ret = -1, retry = 0, rc;
3952
3953 dwork = to_delayed_work(work);
3954 tabla = container_of(dwork, struct tabla_priv,
3955 mbhc_firmware_dwork);
3956 codec = tabla->codec;
3957
3958 while (retry < MBHC_FW_READ_ATTEMPTS) {
3959 retry++;
3960 pr_info("%s:Attempt %d to request MBHC firmware\n",
3961 __func__, retry);
3962 ret = request_firmware(&fw, "wcd9310/wcd9310_mbhc.bin",
3963 codec->dev);
3964
3965 if (ret != 0) {
3966 usleep_range(MBHC_FW_READ_TIMEOUT,
3967 MBHC_FW_READ_TIMEOUT);
3968 } else {
3969 pr_info("%s: MBHC Firmware read succesful\n", __func__);
3970 break;
3971 }
3972 }
3973
3974 if (ret != 0) {
3975 pr_err("%s: Cannot load MBHC firmware use default cal\n",
3976 __func__);
3977 } else if (tabla_mbhc_fw_validate(fw) == false) {
3978 pr_err("%s: Invalid MBHC cal data size use default cal\n",
3979 __func__);
3980 release_firmware(fw);
3981 } else {
3982 tabla->calibration = (void *)fw->data;
3983 tabla->mbhc_fw = fw;
3984 }
3985
3986 tabla->mclk_cb(codec, 1);
3987 tabla_mbhc_init(codec);
3988 tabla_mbhc_cal(codec);
3989 tabla_mbhc_calc_thres(codec);
3990 tabla->mclk_cb(codec, 0);
3991 tabla_codec_calibrate_hs_polling(codec);
3992 rc = tabla_codec_enable_hs_detect(codec, 1);
3993
3994 if (IS_ERR_VALUE(rc))
3995 pr_err("%s: Failed to setup MBHC detection\n", __func__);
3996
3997}
3998
Bradley Rubincb1e2732011-06-23 16:49:20 -07003999int tabla_hs_detect(struct snd_soc_codec *codec,
Joonwoo Park0976d012011-12-22 11:48:18 -08004000 struct snd_soc_jack *headset_jack,
4001 struct snd_soc_jack *button_jack,
4002 void *calibration, enum tabla_micbias_num micbias,
4003 int (*mclk_cb_fn) (struct snd_soc_codec*, int),
4004 int read_fw_bin, u32 mclk_rate)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004005{
4006 struct tabla_priv *tabla;
Patrick Lai64b43262011-12-06 17:29:15 -08004007 int rc = 0;
Patrick Lai49efeac2011-11-03 11:01:12 -07004008
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004009 if (!codec || !calibration) {
4010 pr_err("Error: no codec or calibration\n");
4011 return -EINVAL;
4012 }
Joonwoo Park107edf02012-01-11 11:42:24 -08004013
4014 if (mclk_rate != TABLA_MCLK_RATE_12288KHZ) {
4015 if (mclk_rate == TABLA_MCLK_RATE_9600KHZ)
4016 pr_err("Error: clock rate %dHz is not yet supported\n",
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304017 mclk_rate);
Joonwoo Park107edf02012-01-11 11:42:24 -08004018 else
4019 pr_err("Error: unsupported clock rate %d\n", mclk_rate);
4020 return -EINVAL;
4021 }
4022
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004023 tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004024 tabla->headset_jack = headset_jack;
4025 tabla->button_jack = button_jack;
Joonwoo Park0976d012011-12-22 11:48:18 -08004026 tabla->micbias = micbias;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004027 tabla->calibration = calibration;
Joonwoo Park0976d012011-12-22 11:48:18 -08004028 tabla->mclk_cb = mclk_cb_fn;
4029 tabla->mclk_freq = mclk_rate;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07004030 tabla_get_mbhc_micbias_regs(codec, &tabla->mbhc_bias_regs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004031
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08004032 /* Put CFILT in fast mode by default */
4033 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl,
4034 0x40, TABLA_CFILT_FAST_MODE);
Patrick Lai64b43262011-12-06 17:29:15 -08004035 INIT_DELAYED_WORK(&tabla->mbhc_firmware_dwork, mbhc_fw_read);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004036 INIT_DELAYED_WORK(&tabla->btn0_dwork, btn0_lpress_fn);
Patrick Lai49efeac2011-11-03 11:01:12 -07004037 INIT_WORK(&tabla->hphlocp_work, hphlocp_off_report);
4038 INIT_WORK(&tabla->hphrocp_work, hphrocp_off_report);
Joonwoo Park0976d012011-12-22 11:48:18 -08004039
4040 if (!read_fw_bin) {
4041 tabla->mclk_cb(codec, 1);
4042 tabla_mbhc_init(codec);
4043 tabla_mbhc_cal(codec);
4044 tabla_mbhc_calc_thres(codec);
4045 tabla->mclk_cb(codec, 0);
4046 tabla_codec_calibrate_hs_polling(codec);
4047 rc = tabla_codec_enable_hs_detect(codec, 1);
4048 } else {
Patrick Lai64b43262011-12-06 17:29:15 -08004049 schedule_delayed_work(&tabla->mbhc_firmware_dwork,
4050 usecs_to_jiffies(MBHC_FW_READ_TIMEOUT));
Joonwoo Park0976d012011-12-22 11:48:18 -08004051 }
Patrick Lai49efeac2011-11-03 11:01:12 -07004052
4053 if (!IS_ERR_VALUE(rc)) {
4054 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
4055 0x10);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304056 wcd9xxx_enable_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07004057 TABLA_IRQ_HPH_PA_OCPL_FAULT);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304058 wcd9xxx_enable_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07004059 TABLA_IRQ_HPH_PA_OCPR_FAULT);
4060 }
4061
4062 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004063}
4064EXPORT_SYMBOL_GPL(tabla_hs_detect);
4065
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004066static int tabla_determine_button(const struct tabla_priv *priv,
4067 const s32 bias_mv)
4068{
4069 s16 *v_btn_low, *v_btn_high;
4070 struct tabla_mbhc_btn_detect_cfg *btn_det;
4071 int i, btn = -1;
4072
4073 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(priv->calibration);
4074 v_btn_low = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_LOW);
4075 v_btn_high = tabla_mbhc_cal_btn_det_mp(btn_det,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304076 TABLA_BTN_DET_V_BTN_HIGH);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004077 for (i = 0; i < btn_det->num_btn; i++) {
4078 if ((v_btn_low[i] <= bias_mv) && (v_btn_high[i] >= bias_mv)) {
4079 btn = i;
4080 break;
4081 }
4082 }
4083
4084 if (btn == -1)
4085 pr_debug("%s: couldn't find button number for mic mv %d\n",
4086 __func__, bias_mv);
4087
4088 return btn;
4089}
4090
4091static int tabla_get_button_mask(const int btn)
4092{
4093 int mask = 0;
4094 switch (btn) {
4095 case 0:
4096 mask = SND_JACK_BTN_0;
4097 break;
4098 case 1:
4099 mask = SND_JACK_BTN_1;
4100 break;
4101 case 2:
4102 mask = SND_JACK_BTN_2;
4103 break;
4104 case 3:
4105 mask = SND_JACK_BTN_3;
4106 break;
4107 case 4:
4108 mask = SND_JACK_BTN_4;
4109 break;
4110 case 5:
4111 mask = SND_JACK_BTN_5;
4112 break;
4113 case 6:
4114 mask = SND_JACK_BTN_6;
4115 break;
4116 case 7:
4117 mask = SND_JACK_BTN_7;
4118 break;
4119 }
4120 return mask;
4121}
4122
Bradley Rubincb1e2732011-06-23 16:49:20 -07004123static irqreturn_t tabla_dce_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004124{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004125 int i, mask;
4126 short bias_value_dce;
4127 s32 bias_mv_dce;
4128 int btn = -1, meas = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004129 struct tabla_priv *priv = data;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004130 const struct tabla_mbhc_btn_detect_cfg *d =
4131 TABLA_MBHC_CAL_BTN_DET_PTR(priv->calibration);
4132 short btnmeas[d->n_btn_meas + 1];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004133 struct snd_soc_codec *codec = priv->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304134 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004135
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304136 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
4137 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004138
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004139 bias_value_dce = tabla_codec_read_dce_result(codec);
4140 bias_mv_dce = tabla_codec_sta_dce_v(codec, 1, bias_value_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004141
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004142 /* determine pressed button */
4143 btnmeas[meas++] = tabla_determine_button(priv, bias_mv_dce);
4144 pr_debug("%s: meas %d - DCE %d,%d, button %d\n", __func__,
4145 meas - 1, bias_value_dce, bias_mv_dce, btnmeas[meas - 1]);
4146 if (d->n_btn_meas == 0)
4147 btn = btnmeas[0];
4148 for (; ((d->n_btn_meas) && (meas < (d->n_btn_meas + 1))); meas++) {
4149 bias_value_dce = tabla_codec_sta_dce(codec, 1);
4150 bias_mv_dce = tabla_codec_sta_dce_v(codec, 1, bias_value_dce);
4151 btnmeas[meas] = tabla_determine_button(priv, bias_mv_dce);
4152 pr_debug("%s: meas %d - DCE %d,%d, button %d\n",
4153 __func__, meas, bias_value_dce, bias_mv_dce,
4154 btnmeas[meas]);
4155 /* if large enough measurements are collected,
4156 * start to check if last all n_btn_con measurements were
4157 * in same button low/high range */
4158 if (meas + 1 >= d->n_btn_con) {
4159 for (i = 0; i < d->n_btn_con; i++)
4160 if ((btnmeas[meas] < 0) ||
4161 (btnmeas[meas] != btnmeas[meas - i]))
4162 break;
4163 if (i == d->n_btn_con) {
4164 /* button pressed */
4165 btn = btnmeas[meas];
4166 break;
4167 }
4168 }
4169 /* if left measurements are less than n_btn_con,
4170 * it's impossible to find button number */
4171 if ((d->n_btn_meas - meas) < d->n_btn_con)
4172 break;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004173 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004174
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004175 if (btn >= 0) {
4176 mask = tabla_get_button_mask(btn);
4177 priv->buttons_pressed |= mask;
4178
4179 msleep(100);
4180
4181 /* XXX: assuming button 0 has the lowest micbias voltage */
4182 if (btn == 0) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304183 wcd9xxx_lock_sleep(core);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004184 if (schedule_delayed_work(&priv->btn0_dwork,
4185 msecs_to_jiffies(400)) == 0) {
4186 WARN(1, "Button pressed twice without release"
4187 "event\n");
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304188 wcd9xxx_unlock_sleep(core);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004189 }
4190 } else {
4191 pr_debug("%s: Reporting short button %d(0x%x) press\n",
4192 __func__, btn, mask);
4193 tabla_snd_soc_jack_report(priv, priv->button_jack, mask,
4194 mask);
4195 }
Joonwoo Park816b8e62012-01-23 16:03:21 -08004196 } else {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004197 pr_debug("%s: bogus button press, too short press?\n",
4198 __func__);
Joonwoo Park816b8e62012-01-23 16:03:21 -08004199 }
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004200
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004201 return IRQ_HANDLED;
4202}
4203
Bradley Rubincb1e2732011-06-23 16:49:20 -07004204static irqreturn_t tabla_release_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004205{
Joonwoo Parke5d3aa92012-01-11 14:47:15 -08004206 int ret;
4207 short mb_v;
Joonwoo Park816b8e62012-01-23 16:03:21 -08004208 struct tabla_priv *priv = data;
4209 struct snd_soc_codec *codec = priv->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304210 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004211
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004212 pr_debug("%s: enter\n", __func__);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304213 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004214
Bradley Rubincb1e2732011-06-23 16:49:20 -07004215 if (priv->buttons_pressed & SND_JACK_BTN_0) {
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004216 ret = cancel_delayed_work(&priv->btn0_dwork);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004217 if (ret == 0) {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004218 pr_debug("%s: Reporting long button 0 release event\n",
4219 __func__);
Joonwoo Park0976d012011-12-22 11:48:18 -08004220 if (priv->button_jack)
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004221 tabla_snd_soc_jack_report(priv,
4222 priv->button_jack, 0,
4223 SND_JACK_BTN_0);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004224 } else {
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004225 /* if scheduled btn0_dwork is canceled from here,
4226 * we have to unlock from here instead btn0_work */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304227 wcd9xxx_unlock_sleep(core);
Joonwoo Park0976d012011-12-22 11:48:18 -08004228 mb_v = tabla_codec_sta_dce(codec, 0);
4229 pr_debug("%s: Mic Voltage on release STA: %d,%d\n",
4230 __func__, mb_v,
4231 tabla_codec_sta_dce_v(codec, 0, mb_v));
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004232
Joonwoo Parke5d3aa92012-01-11 14:47:15 -08004233 if (mb_v < (short)priv->mbhc_data.v_b1_hu ||
4234 mb_v > (short)priv->mbhc_data.v_ins_hu)
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004235 pr_debug("%s: Fake buttton press interrupt\n",
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004236 __func__);
Joonwoo Park0976d012011-12-22 11:48:18 -08004237 else if (priv->button_jack) {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004238 pr_debug("%s: Reporting short button 0 "
Joonwoo Park0976d012011-12-22 11:48:18 -08004239 "press and release\n", __func__);
4240 tabla_snd_soc_jack_report(priv,
4241 priv->button_jack,
4242 SND_JACK_BTN_0,
4243 SND_JACK_BTN_0);
4244 tabla_snd_soc_jack_report(priv,
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004245 priv->button_jack, 0,
4246 SND_JACK_BTN_0);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004247 }
4248 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004249
Bradley Rubincb1e2732011-06-23 16:49:20 -07004250 priv->buttons_pressed &= ~SND_JACK_BTN_0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004251 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004252
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004253 if (priv->buttons_pressed) {
4254 pr_debug("%s:reporting button release mask 0x%x\n", __func__,
4255 priv->buttons_pressed);
4256 tabla_snd_soc_jack_report(priv, priv->button_jack, 0,
4257 priv->buttons_pressed);
4258 /* hardware doesn't detect another button press until
4259 * already pressed button is released.
4260 * therefore buttons_pressed has only one button's mask. */
4261 priv->buttons_pressed &= ~TABLA_JACK_BUTTON_MASK;
4262 }
4263
Bradley Rubin688c66a2011-08-16 12:25:13 -07004264 tabla_codec_start_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004265 return IRQ_HANDLED;
4266}
4267
Bradley Rubincb1e2732011-06-23 16:49:20 -07004268static void tabla_codec_shutdown_hs_removal_detect(struct snd_soc_codec *codec)
4269{
4270 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08004271 const struct tabla_mbhc_general_cfg *generic =
4272 TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004273
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004274 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07004275 tabla_codec_enable_config_mode(codec, 1);
4276
4277 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
4278 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x6, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004279
Joonwoo Park0976d012011-12-22 11:48:18 -08004280 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
4281
4282 usleep_range(generic->t_shutdown_plug_rem,
4283 generic->t_shutdown_plug_rem);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004284
4285 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0xA, 0x8);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004286 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07004287 tabla_codec_enable_config_mode(codec, 0);
4288
4289 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x00);
4290}
4291
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004292static void tabla_codec_shutdown_hs_polling(struct snd_soc_codec *codec)
4293{
4294 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004295
4296 tabla_codec_shutdown_hs_removal_detect(codec);
4297
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004298 if (!tabla->mclk_enabled) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004299 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0x00);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05304300 tabla_codec_disable_clock_block(codec);
4301 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004302 }
4303
4304 tabla->mbhc_polling_active = false;
4305}
4306
Patrick Lai49efeac2011-11-03 11:01:12 -07004307static irqreturn_t tabla_hphl_ocp_irq(int irq, void *data)
4308{
4309 struct tabla_priv *tabla = data;
4310 struct snd_soc_codec *codec;
4311
4312 pr_info("%s: received HPHL OCP irq\n", __func__);
4313
4314 if (tabla) {
4315 codec = tabla->codec;
Patrick Laic7cae882011-11-18 11:52:49 -08004316 if (tabla->hphlocp_cnt++ < TABLA_OCP_ATTEMPT) {
4317 pr_info("%s: retry\n", __func__);
4318 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
4319 0x00);
4320 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
4321 0x10);
4322 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304323 wcd9xxx_disable_irq(codec->control_data,
Patrick Laic7cae882011-11-18 11:52:49 -08004324 TABLA_IRQ_HPH_PA_OCPL_FAULT);
4325 tabla->hphlocp_cnt = 0;
4326 tabla->hph_status |= SND_JACK_OC_HPHL;
4327 if (tabla->headset_jack)
4328 tabla_snd_soc_jack_report(tabla,
4329 tabla->headset_jack,
4330 tabla->hph_status,
4331 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07004332 }
4333 } else {
4334 pr_err("%s: Bad tabla private data\n", __func__);
4335 }
4336
4337 return IRQ_HANDLED;
4338}
4339
4340static irqreturn_t tabla_hphr_ocp_irq(int irq, void *data)
4341{
4342 struct tabla_priv *tabla = data;
4343 struct snd_soc_codec *codec;
4344
4345 pr_info("%s: received HPHR OCP irq\n", __func__);
4346
4347 if (tabla) {
4348 codec = tabla->codec;
Patrick Laic7cae882011-11-18 11:52:49 -08004349 if (tabla->hphrocp_cnt++ < TABLA_OCP_ATTEMPT) {
4350 pr_info("%s: retry\n", __func__);
4351 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
4352 0x00);
4353 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
4354 0x10);
4355 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304356 wcd9xxx_disable_irq(codec->control_data,
Patrick Laic7cae882011-11-18 11:52:49 -08004357 TABLA_IRQ_HPH_PA_OCPR_FAULT);
4358 tabla->hphrocp_cnt = 0;
4359 tabla->hph_status |= SND_JACK_OC_HPHR;
4360 if (tabla->headset_jack)
4361 tabla_snd_soc_jack_report(tabla,
4362 tabla->headset_jack,
4363 tabla->hph_status,
4364 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07004365 }
4366 } else {
4367 pr_err("%s: Bad tabla private data\n", __func__);
4368 }
4369
4370 return IRQ_HANDLED;
4371}
4372
Joonwoo Parka9444452011-12-08 18:48:27 -08004373static void tabla_sync_hph_state(struct tabla_priv *tabla)
4374{
4375 if (test_and_clear_bit(TABLA_HPHR_PA_OFF_ACK,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304376 &tabla->hph_pa_dac_state)) {
Joonwoo Parka9444452011-12-08 18:48:27 -08004377 pr_debug("%s: HPHR clear flag and enable PA\n", __func__);
4378 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x10,
4379 1 << 4);
4380 }
4381 if (test_and_clear_bit(TABLA_HPHL_PA_OFF_ACK,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304382 &tabla->hph_pa_dac_state)) {
Joonwoo Parka9444452011-12-08 18:48:27 -08004383 pr_debug("%s: HPHL clear flag and enable PA\n", __func__);
4384 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x20,
4385 1 << 5);
4386 }
4387
4388 if (test_and_clear_bit(TABLA_HPHR_DAC_OFF_ACK,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304389 &tabla->hph_pa_dac_state)) {
Joonwoo Parka9444452011-12-08 18:48:27 -08004390 pr_debug("%s: HPHR clear flag and enable DAC\n", __func__);
4391 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_R_DAC_CTL,
4392 0xC0, 0xC0);
4393 }
4394 if (test_and_clear_bit(TABLA_HPHL_DAC_OFF_ACK,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304395 &tabla->hph_pa_dac_state)) {
Joonwoo Parka9444452011-12-08 18:48:27 -08004396 pr_debug("%s: HPHL clear flag and enable DAC\n", __func__);
4397 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_L_DAC_CTL,
4398 0xC0, 0xC0);
4399 }
4400}
4401
Bradley Rubincb1e2732011-06-23 16:49:20 -07004402static irqreturn_t tabla_hs_insert_irq(int irq, void *data)
4403{
4404 struct tabla_priv *priv = data;
4405 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park0976d012011-12-22 11:48:18 -08004406 const struct tabla_mbhc_plug_detect_cfg *plug_det =
4407 TABLA_MBHC_CAL_PLUG_DET_PTR(priv->calibration);
Bradley Rubin355611a2011-08-24 14:01:18 -07004408 int ldo_h_on, micb_cfilt_on;
Joonwoo Park0976d012011-12-22 11:48:18 -08004409 short mb_v;
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004410 u8 is_removal;
Joonwoo Park0976d012011-12-22 11:48:18 -08004411 int mic_mv;
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07004412
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004413 pr_debug("%s: enter\n", __func__);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304414 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004415
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004416 is_removal = snd_soc_read(codec, TABLA_A_CDC_MBHC_INT_CTL) & 0x02;
4417 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x03, 0x00);
4418
4419 /* Turn off both HPH and MIC line schmitt triggers */
Joonwoo Park0976d012011-12-22 11:48:18 -08004420 snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004421 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004422
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004423 if (priv->mbhc_fake_ins_start &&
4424 time_after(jiffies, priv->mbhc_fake_ins_start +
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304425 msecs_to_jiffies(TABLA_FAKE_INS_THRESHOLD_MS))) {
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08004426 pr_debug("%s: fake context interrupt, reset insertion\n",
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004427 __func__);
4428 priv->mbhc_fake_ins_start = 0;
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08004429 tabla_codec_shutdown_hs_polling(codec);
4430 tabla_codec_enable_hs_detect(codec, 1);
4431 return IRQ_HANDLED;
4432 }
4433
Bradley Rubin355611a2011-08-24 14:01:18 -07004434 ldo_h_on = snd_soc_read(codec, TABLA_A_LDO_H_MODE_1) & 0x80;
Joonwoo Park0976d012011-12-22 11:48:18 -08004435 micb_cfilt_on = snd_soc_read(codec, priv->mbhc_bias_regs.cfilt_ctl)
4436 & 0x80;
Bradley Rubin355611a2011-08-24 14:01:18 -07004437
4438 if (!ldo_h_on)
4439 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x80, 0x80);
4440 if (!micb_cfilt_on)
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07004441 snd_soc_update_bits(codec, priv->mbhc_bias_regs.cfilt_ctl,
Joonwoo Park0976d012011-12-22 11:48:18 -08004442 0x80, 0x80);
4443 if (plug_det->t_ins_complete > 20)
4444 msleep(plug_det->t_ins_complete);
4445 else
4446 usleep_range(plug_det->t_ins_complete * 1000,
4447 plug_det->t_ins_complete * 1000);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004448
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004449 if (!ldo_h_on)
4450 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x80, 0x0);
4451 if (!micb_cfilt_on)
4452 snd_soc_update_bits(codec, priv->mbhc_bias_regs.cfilt_ctl,
Joonwoo Park0976d012011-12-22 11:48:18 -08004453 0x80, 0x0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004454
4455 if (is_removal) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07004456 /*
4457 * If headphone is removed while playback is in progress,
4458 * it is possible that micbias will be switched to VDDIO.
4459 */
4460 if (priv->mbhc_micbias_switched)
4461 tabla_codec_switch_micbias(codec, 0);
Patrick Lai72aa4da2011-12-08 12:38:18 -08004462 priv->hph_status &= ~SND_JACK_HEADPHONE;
Joonwoo Parka9444452011-12-08 18:48:27 -08004463
4464 /* If headphone PA is on, check if userspace receives
4465 * removal event to sync-up PA's state */
4466 if (tabla_is_hph_pa_on(codec)) {
4467 set_bit(TABLA_HPHL_PA_OFF_ACK, &priv->hph_pa_dac_state);
4468 set_bit(TABLA_HPHR_PA_OFF_ACK, &priv->hph_pa_dac_state);
4469 }
4470
4471 if (tabla_is_hph_dac_on(codec, 1))
4472 set_bit(TABLA_HPHL_DAC_OFF_ACK,
4473 &priv->hph_pa_dac_state);
4474 if (tabla_is_hph_dac_on(codec, 0))
4475 set_bit(TABLA_HPHR_DAC_OFF_ACK,
4476 &priv->hph_pa_dac_state);
4477
Bradley Rubincb1e2732011-06-23 16:49:20 -07004478 if (priv->headset_jack) {
4479 pr_debug("%s: Reporting removal\n", __func__);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004480 tabla_snd_soc_jack_report(priv, priv->headset_jack,
4481 priv->hph_status,
4482 TABLA_JACK_MASK);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004483 }
4484 tabla_codec_shutdown_hs_removal_detect(codec);
4485 tabla_codec_enable_hs_detect(codec, 1);
4486 return IRQ_HANDLED;
4487 }
4488
Joonwoo Park0976d012011-12-22 11:48:18 -08004489 mb_v = tabla_codec_setup_hs_polling(codec);
4490 mic_mv = tabla_codec_sta_dce_v(codec, 0, mb_v);
Bradley Rubin355611a2011-08-24 14:01:18 -07004491
Joonwoo Park0976d012011-12-22 11:48:18 -08004492 if (mb_v > (short) priv->mbhc_data.v_ins_hu) {
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004493 pr_debug("%s: Fake insertion interrupt since %dmsec ago, "
4494 "STA : %d,%d\n", __func__,
4495 (priv->mbhc_fake_ins_start ?
4496 jiffies_to_msecs(jiffies -
4497 priv->mbhc_fake_ins_start) :
4498 0),
4499 mb_v, mic_mv);
4500 if (time_after(jiffies,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304501 priv->mbhc_fake_ins_start +
4502 msecs_to_jiffies(TABLA_FAKE_INS_THRESHOLD_MS))) {
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004503 /* Disable HPH trigger and enable MIC line trigger */
4504 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12,
4505 0x00);
4506 snd_soc_update_bits(codec,
4507 priv->mbhc_bias_regs.mbhc_reg, 0x60,
4508 plug_det->mic_current << 5);
4509 snd_soc_update_bits(codec,
4510 priv->mbhc_bias_regs.mbhc_reg,
4511 0x80, 0x80);
4512 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
4513 snd_soc_update_bits(codec,
4514 priv->mbhc_bias_regs.mbhc_reg,
4515 0x10, 0x10);
4516 } else {
4517 if (priv->mbhc_fake_ins_start == 0)
4518 priv->mbhc_fake_ins_start = jiffies;
4519 /* Setup normal insert detection
4520 * Enable HPH Schmitt Trigger
4521 */
4522 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH,
4523 0x13 | 0x0C,
4524 0x13 | plug_det->hph_current << 2);
4525 }
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08004526 /* Setup for insertion detection */
4527 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304528 wcd9xxx_enable_irq(codec->control_data,
4529 TABLA_IRQ_MBHC_INSERTION);
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08004530 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
4531
Joonwoo Park0976d012011-12-22 11:48:18 -08004532 } else if (mb_v < (short) priv->mbhc_data.v_no_mic) {
4533 pr_debug("%s: Headphone Detected, mb_v: %d,%d\n",
4534 __func__, mb_v, mic_mv);
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004535 priv->mbhc_fake_ins_start = 0;
Patrick Lai49efeac2011-11-03 11:01:12 -07004536 priv->hph_status |= SND_JACK_HEADPHONE;
Bradley Rubincb1e2732011-06-23 16:49:20 -07004537 if (priv->headset_jack) {
4538 pr_debug("%s: Reporting insertion %d\n", __func__,
Joonwoo Park0976d012011-12-22 11:48:18 -08004539 SND_JACK_HEADPHONE);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004540 tabla_snd_soc_jack_report(priv, priv->headset_jack,
4541 priv->hph_status,
4542 TABLA_JACK_MASK);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004543 }
4544 tabla_codec_shutdown_hs_polling(codec);
4545 tabla_codec_enable_hs_detect(codec, 0);
Joonwoo Parka9444452011-12-08 18:48:27 -08004546 tabla_sync_hph_state(priv);
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07004547 } else {
Joonwoo Park0976d012011-12-22 11:48:18 -08004548 pr_debug("%s: Headset detected, mb_v: %d,%d\n",
4549 __func__, mb_v, mic_mv);
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004550 priv->mbhc_fake_ins_start = 0;
Patrick Lai49efeac2011-11-03 11:01:12 -07004551 priv->hph_status |= SND_JACK_HEADSET;
Bradley Rubincb1e2732011-06-23 16:49:20 -07004552 if (priv->headset_jack) {
4553 pr_debug("%s: Reporting insertion %d\n", __func__,
Joonwoo Park0976d012011-12-22 11:48:18 -08004554 SND_JACK_HEADSET);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004555 tabla_snd_soc_jack_report(priv, priv->headset_jack,
4556 priv->hph_status,
4557 TABLA_JACK_MASK);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004558 }
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004559 /* avoid false button press detect */
4560 msleep(50);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004561 tabla_codec_start_hs_polling(codec);
Joonwoo Parka9444452011-12-08 18:48:27 -08004562 tabla_sync_hph_state(priv);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004563 }
4564
4565 return IRQ_HANDLED;
4566}
4567
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004568static irqreturn_t tabla_hs_remove_irq(int irq, void *data)
4569{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004570 short bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004571 struct tabla_priv *priv = data;
4572 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park0976d012011-12-22 11:48:18 -08004573 const struct tabla_mbhc_general_cfg *generic =
4574 TABLA_MBHC_CAL_GENERAL_PTR(priv->calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004575 int fake_removal = 0;
4576 int min_us = TABLA_FAKE_REMOVAL_MIN_PERIOD_MS * 1000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004577
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004578 pr_debug("%s: enter, removal interrupt\n", __func__);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304579 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
4580 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
4581 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004582
Joonwoo Park0976d012011-12-22 11:48:18 -08004583 usleep_range(generic->t_shutdown_plug_rem,
4584 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004585
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004586 do {
4587 bias_value = tabla_codec_sta_dce(codec, 1);
4588 pr_debug("%s: DCE %d,%d, %d us left\n", __func__, bias_value,
4589 tabla_codec_sta_dce_v(codec, 1, bias_value), min_us);
4590 if (bias_value < (short)priv->mbhc_data.v_ins_h) {
4591 fake_removal = 1;
4592 break;
4593 }
4594 min_us -= priv->mbhc_data.t_dce;
4595 } while (min_us > 0);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004596
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004597 if (fake_removal) {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004598 pr_debug("False alarm, headset not actually removed\n");
4599 tabla_codec_start_hs_polling(codec);
4600 } else {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07004601 /*
4602 * If this removal is not false, first check the micbias
4603 * switch status and switch it to LDOH if it is already
4604 * switched to VDDIO.
4605 */
4606 if (priv->mbhc_micbias_switched)
4607 tabla_codec_switch_micbias(codec, 0);
Patrick Lai49efeac2011-11-03 11:01:12 -07004608 priv->hph_status &= ~SND_JACK_HEADSET;
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004609 if (priv->headset_jack) {
4610 pr_debug("%s: Reporting removal\n", __func__);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004611 tabla_snd_soc_jack_report(priv, priv->headset_jack, 0,
4612 TABLA_JACK_MASK);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004613 }
4614 tabla_codec_shutdown_hs_polling(codec);
4615
4616 tabla_codec_enable_hs_detect(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004617 }
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004618
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004619 return IRQ_HANDLED;
4620}
4621
4622static unsigned long slimbus_value;
4623
4624static irqreturn_t tabla_slimbus_irq(int irq, void *data)
4625{
4626 struct tabla_priv *priv = data;
4627 struct snd_soc_codec *codec = priv->codec;
4628 int i, j;
4629 u8 val;
4630
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304631 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++) {
4632 slimbus_value = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004633 TABLA_SLIM_PGD_PORT_INT_STATUS0 + i);
4634 for_each_set_bit(j, &slimbus_value, BITS_PER_BYTE) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304635 val = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004636 TABLA_SLIM_PGD_PORT_INT_SOURCE0 + i*8 + j);
4637 if (val & 0x1)
4638 pr_err_ratelimited("overflow error on port %x,"
4639 " value %x\n", i*8 + j, val);
4640 if (val & 0x2)
4641 pr_err_ratelimited("underflow error on port %x,"
4642 " value %x\n", i*8 + j, val);
4643 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304644 wcd9xxx_interface_reg_write(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004645 TABLA_SLIM_PGD_PORT_INT_CLR0 + i, 0xFF);
4646 }
4647
4648 return IRQ_HANDLED;
4649}
4650
Patrick Lai3043fba2011-08-01 14:15:57 -07004651
4652static int tabla_handle_pdata(struct tabla_priv *tabla)
4653{
4654 struct snd_soc_codec *codec = tabla->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304655 struct wcd9xxx_pdata *pdata = tabla->pdata;
Patrick Lai3043fba2011-08-01 14:15:57 -07004656 int k1, k2, k3, rc = 0;
Santosh Mardi22920282011-10-26 02:38:40 +05304657 u8 leg_mode = pdata->amic_settings.legacy_mode;
4658 u8 txfe_bypass = pdata->amic_settings.txfe_enable;
4659 u8 txfe_buff = pdata->amic_settings.txfe_buff;
4660 u8 flag = pdata->amic_settings.use_pdata;
4661 u8 i = 0, j = 0;
4662 u8 val_txfe = 0, value = 0;
Patrick Lai3043fba2011-08-01 14:15:57 -07004663
4664 if (!pdata) {
4665 rc = -ENODEV;
4666 goto done;
4667 }
4668
4669 /* Make sure settings are correct */
4670 if ((pdata->micbias.ldoh_v > TABLA_LDOH_2P85_V) ||
4671 (pdata->micbias.bias1_cfilt_sel > TABLA_CFILT3_SEL) ||
4672 (pdata->micbias.bias2_cfilt_sel > TABLA_CFILT3_SEL) ||
4673 (pdata->micbias.bias3_cfilt_sel > TABLA_CFILT3_SEL) ||
4674 (pdata->micbias.bias4_cfilt_sel > TABLA_CFILT3_SEL)) {
4675 rc = -EINVAL;
4676 goto done;
4677 }
4678
4679 /* figure out k value */
4680 k1 = tabla_find_k_value(pdata->micbias.ldoh_v,
4681 pdata->micbias.cfilt1_mv);
4682 k2 = tabla_find_k_value(pdata->micbias.ldoh_v,
4683 pdata->micbias.cfilt2_mv);
4684 k3 = tabla_find_k_value(pdata->micbias.ldoh_v,
4685 pdata->micbias.cfilt3_mv);
4686
4687 if (IS_ERR_VALUE(k1) || IS_ERR_VALUE(k2) || IS_ERR_VALUE(k3)) {
4688 rc = -EINVAL;
4689 goto done;
4690 }
4691
4692 /* Set voltage level and always use LDO */
4693 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x0C,
4694 (pdata->micbias.ldoh_v << 2));
4695
4696 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_1_VAL, 0xFC,
4697 (k1 << 2));
4698 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_2_VAL, 0xFC,
4699 (k2 << 2));
4700 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_3_VAL, 0xFC,
4701 (k3 << 2));
4702
4703 snd_soc_update_bits(codec, TABLA_A_MICB_1_CTL, 0x60,
4704 (pdata->micbias.bias1_cfilt_sel << 5));
4705 snd_soc_update_bits(codec, TABLA_A_MICB_2_CTL, 0x60,
4706 (pdata->micbias.bias2_cfilt_sel << 5));
4707 snd_soc_update_bits(codec, TABLA_A_MICB_3_CTL, 0x60,
4708 (pdata->micbias.bias3_cfilt_sel << 5));
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004709 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_ctl, 0x60,
4710 (pdata->micbias.bias4_cfilt_sel << 5));
Patrick Lai3043fba2011-08-01 14:15:57 -07004711
Santosh Mardi22920282011-10-26 02:38:40 +05304712 for (i = 0; i < 6; j++, i += 2) {
4713 if (flag & (0x01 << i)) {
4714 value = (leg_mode & (0x01 << i)) ? 0x10 : 0x00;
4715 val_txfe = (txfe_bypass & (0x01 << i)) ? 0x20 : 0x00;
4716 val_txfe = val_txfe |
4717 ((txfe_buff & (0x01 << i)) ? 0x10 : 0x00);
4718 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
4719 0x10, value);
4720 snd_soc_update_bits(codec,
4721 TABLA_A_TX_1_2_TEST_EN + j * 10,
4722 0x30, val_txfe);
4723 }
4724 if (flag & (0x01 << (i + 1))) {
4725 value = (leg_mode & (0x01 << (i + 1))) ? 0x01 : 0x00;
4726 val_txfe = (txfe_bypass &
4727 (0x01 << (i + 1))) ? 0x02 : 0x00;
4728 val_txfe |= (txfe_buff &
4729 (0x01 << (i + 1))) ? 0x01 : 0x00;
4730 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
4731 0x01, value);
4732 snd_soc_update_bits(codec,
4733 TABLA_A_TX_1_2_TEST_EN + j * 10,
4734 0x03, val_txfe);
4735 }
4736 }
4737 if (flag & 0x40) {
4738 value = (leg_mode & 0x40) ? 0x10 : 0x00;
4739 value = value | ((txfe_bypass & 0x40) ? 0x02 : 0x00);
4740 value = value | ((txfe_buff & 0x40) ? 0x01 : 0x00);
4741 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN,
4742 0x13, value);
4743 }
Patrick Lai49efeac2011-11-03 11:01:12 -07004744
4745 if (pdata->ocp.use_pdata) {
4746 /* not defined in CODEC specification */
4747 if (pdata->ocp.hph_ocp_limit == 1 ||
4748 pdata->ocp.hph_ocp_limit == 5) {
4749 rc = -EINVAL;
4750 goto done;
4751 }
4752 snd_soc_update_bits(codec, TABLA_A_RX_COM_OCP_CTL,
4753 0x0F, pdata->ocp.num_attempts);
4754 snd_soc_write(codec, TABLA_A_RX_COM_OCP_COUNT,
4755 ((pdata->ocp.run_time << 4) | pdata->ocp.wait_time));
4756 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL,
4757 0xE0, (pdata->ocp.hph_ocp_limit << 5));
4758 }
Patrick Lai3043fba2011-08-01 14:15:57 -07004759done:
4760 return rc;
4761}
4762
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004763static const struct tabla_reg_mask_val tabla_1_1_reg_defaults[] = {
4764
4765 /* Tabla 1.1 MICBIAS changes */
4766 TABLA_REG_VAL(TABLA_A_MICB_1_INT_RBIAS, 0x24),
4767 TABLA_REG_VAL(TABLA_A_MICB_2_INT_RBIAS, 0x24),
4768 TABLA_REG_VAL(TABLA_A_MICB_3_INT_RBIAS, 0x24),
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004769
4770 /* Tabla 1.1 HPH changes */
4771 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_PA, 0x57),
4772 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_LDO, 0x56),
4773
4774 /* Tabla 1.1 EAR PA changes */
4775 TABLA_REG_VAL(TABLA_A_RX_EAR_BIAS_PA, 0xA6),
4776 TABLA_REG_VAL(TABLA_A_RX_EAR_GAIN, 0x02),
4777 TABLA_REG_VAL(TABLA_A_RX_EAR_VCM, 0x03),
4778
4779 /* Tabla 1.1 Lineout_5 Changes */
4780 TABLA_REG_VAL(TABLA_A_RX_LINE_5_GAIN, 0x10),
4781
4782 /* Tabla 1.1 RX Changes */
4783 TABLA_REG_VAL(TABLA_A_CDC_RX1_B5_CTL, 0x78),
4784 TABLA_REG_VAL(TABLA_A_CDC_RX2_B5_CTL, 0x78),
4785 TABLA_REG_VAL(TABLA_A_CDC_RX3_B5_CTL, 0x78),
4786 TABLA_REG_VAL(TABLA_A_CDC_RX4_B5_CTL, 0x78),
4787 TABLA_REG_VAL(TABLA_A_CDC_RX5_B5_CTL, 0x78),
4788 TABLA_REG_VAL(TABLA_A_CDC_RX6_B5_CTL, 0x78),
4789 TABLA_REG_VAL(TABLA_A_CDC_RX7_B5_CTL, 0x78),
4790
4791 /* Tabla 1.1 RX1 and RX2 Changes */
4792 TABLA_REG_VAL(TABLA_A_CDC_RX1_B6_CTL, 0xA0),
4793 TABLA_REG_VAL(TABLA_A_CDC_RX2_B6_CTL, 0xA0),
4794
4795 /* Tabla 1.1 RX3 to RX7 Changes */
4796 TABLA_REG_VAL(TABLA_A_CDC_RX3_B6_CTL, 0x80),
4797 TABLA_REG_VAL(TABLA_A_CDC_RX4_B6_CTL, 0x80),
4798 TABLA_REG_VAL(TABLA_A_CDC_RX5_B6_CTL, 0x80),
4799 TABLA_REG_VAL(TABLA_A_CDC_RX6_B6_CTL, 0x80),
4800 TABLA_REG_VAL(TABLA_A_CDC_RX7_B6_CTL, 0x80),
4801
4802 /* Tabla 1.1 CLASSG Changes */
4803 TABLA_REG_VAL(TABLA_A_CDC_CLSG_FREQ_THRESH_B3_CTL, 0x1B),
4804};
4805
4806static const struct tabla_reg_mask_val tabla_2_0_reg_defaults[] = {
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004807 /* Tabla 2.0 MICBIAS changes */
4808 TABLA_REG_VAL(TABLA_A_MICB_2_MBHC, 0x02),
4809};
4810
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004811static const struct tabla_reg_mask_val tabla_1_x_only_reg_2_0_defaults[] = {
4812 TABLA_REG_VAL(TABLA_1_A_MICB_4_INT_RBIAS, 0x24),
4813};
4814
4815static const struct tabla_reg_mask_val tabla_2_only_reg_2_0_defaults[] = {
4816 TABLA_REG_VAL(TABLA_2_A_MICB_4_INT_RBIAS, 0x24),
4817};
4818
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004819static void tabla_update_reg_defaults(struct snd_soc_codec *codec)
4820{
4821 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304822 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004823
4824 for (i = 0; i < ARRAY_SIZE(tabla_1_1_reg_defaults); i++)
4825 snd_soc_write(codec, tabla_1_1_reg_defaults[i].reg,
4826 tabla_1_1_reg_defaults[i].val);
4827
4828 for (i = 0; i < ARRAY_SIZE(tabla_2_0_reg_defaults); i++)
4829 snd_soc_write(codec, tabla_2_0_reg_defaults[i].reg,
4830 tabla_2_0_reg_defaults[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004831
4832 if (TABLA_IS_1_X(tabla_core->version)) {
4833 for (i = 0; i < ARRAY_SIZE(tabla_1_x_only_reg_2_0_defaults);
4834 i++)
4835 snd_soc_write(codec,
4836 tabla_1_x_only_reg_2_0_defaults[i].reg,
4837 tabla_1_x_only_reg_2_0_defaults[i].val);
4838 } else {
4839 for (i = 0; i < ARRAY_SIZE(tabla_2_only_reg_2_0_defaults); i++)
4840 snd_soc_write(codec,
4841 tabla_2_only_reg_2_0_defaults[i].reg,
4842 tabla_2_only_reg_2_0_defaults[i].val);
4843 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004844}
4845
4846static const struct tabla_reg_mask_val tabla_codec_reg_init_val[] = {
Patrick Laic7cae882011-11-18 11:52:49 -08004847 /* Initialize current threshold to 350MA
4848 * number of wait and run cycles to 4096
4849 */
Patrick Lai49efeac2011-11-03 11:01:12 -07004850 {TABLA_A_RX_HPH_OCP_CTL, 0xE0, 0x60},
Patrick Laic7cae882011-11-18 11:52:49 -08004851 {TABLA_A_RX_COM_OCP_COUNT, 0xFF, 0xFF},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004852
Santosh Mardi32171012011-10-28 23:32:06 +05304853 {TABLA_A_QFUSE_CTL, 0xFF, 0x03},
4854
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004855 /* Initialize gain registers to use register gain */
4856 {TABLA_A_RX_HPH_L_GAIN, 0x10, 0x10},
4857 {TABLA_A_RX_HPH_R_GAIN, 0x10, 0x10},
4858 {TABLA_A_RX_LINE_1_GAIN, 0x10, 0x10},
4859 {TABLA_A_RX_LINE_2_GAIN, 0x10, 0x10},
4860 {TABLA_A_RX_LINE_3_GAIN, 0x10, 0x10},
4861 {TABLA_A_RX_LINE_4_GAIN, 0x10, 0x10},
4862
4863 /* Initialize mic biases to differential mode */
4864 {TABLA_A_MICB_1_INT_RBIAS, 0x24, 0x24},
4865 {TABLA_A_MICB_2_INT_RBIAS, 0x24, 0x24},
4866 {TABLA_A_MICB_3_INT_RBIAS, 0x24, 0x24},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004867
4868 {TABLA_A_CDC_CONN_CLSG_CTL, 0x3C, 0x14},
4869
4870 /* Use 16 bit sample size for TX1 to TX6 */
4871 {TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0x30, 0x20},
4872 {TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0x30, 0x20},
4873 {TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0x30, 0x20},
4874 {TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0x30, 0x20},
4875 {TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0x30, 0x20},
4876 {TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0x30, 0x20},
4877
4878 /* Use 16 bit sample size for TX7 to TX10 */
4879 {TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0x60, 0x40},
4880 {TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0x60, 0x40},
4881 {TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0x60, 0x40},
4882 {TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0x60, 0x40},
4883
4884 /* Use 16 bit sample size for RX */
4885 {TABLA_A_CDC_CONN_RX_SB_B1_CTL, 0xFF, 0xAA},
4886 {TABLA_A_CDC_CONN_RX_SB_B2_CTL, 0xFF, 0xAA},
4887
4888 /*enable HPF filter for TX paths */
4889 {TABLA_A_CDC_TX1_MUX_CTL, 0x8, 0x0},
4890 {TABLA_A_CDC_TX2_MUX_CTL, 0x8, 0x0},
4891 {TABLA_A_CDC_TX3_MUX_CTL, 0x8, 0x0},
4892 {TABLA_A_CDC_TX4_MUX_CTL, 0x8, 0x0},
4893 {TABLA_A_CDC_TX5_MUX_CTL, 0x8, 0x0},
4894 {TABLA_A_CDC_TX6_MUX_CTL, 0x8, 0x0},
4895 {TABLA_A_CDC_TX7_MUX_CTL, 0x8, 0x0},
4896 {TABLA_A_CDC_TX8_MUX_CTL, 0x8, 0x0},
4897 {TABLA_A_CDC_TX9_MUX_CTL, 0x8, 0x0},
4898 {TABLA_A_CDC_TX10_MUX_CTL, 0x8, 0x0},
4899};
4900
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004901static const struct tabla_reg_mask_val tabla_1_x_codec_reg_init_val[] = {
4902 /* Initialize mic biases to differential mode */
4903 {TABLA_1_A_MICB_4_INT_RBIAS, 0x24, 0x24},
4904};
4905
4906static const struct tabla_reg_mask_val tabla_2_higher_codec_reg_init_val[] = {
4907 /* Initialize mic biases to differential mode */
4908 {TABLA_2_A_MICB_4_INT_RBIAS, 0x24, 0x24},
4909};
4910
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004911static void tabla_codec_init_reg(struct snd_soc_codec *codec)
4912{
4913 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304914 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004915
4916 for (i = 0; i < ARRAY_SIZE(tabla_codec_reg_init_val); i++)
4917 snd_soc_update_bits(codec, tabla_codec_reg_init_val[i].reg,
4918 tabla_codec_reg_init_val[i].mask,
4919 tabla_codec_reg_init_val[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004920 if (TABLA_IS_1_X(tabla_core->version)) {
4921 for (i = 0; i < ARRAY_SIZE(tabla_1_x_codec_reg_init_val); i++)
4922 snd_soc_update_bits(codec,
4923 tabla_1_x_codec_reg_init_val[i].reg,
4924 tabla_1_x_codec_reg_init_val[i].mask,
4925 tabla_1_x_codec_reg_init_val[i].val);
4926 } else {
4927 for (i = 0; i < ARRAY_SIZE(tabla_2_higher_codec_reg_init_val);
4928 i++)
4929 snd_soc_update_bits(codec,
4930 tabla_2_higher_codec_reg_init_val[i].reg,
4931 tabla_2_higher_codec_reg_init_val[i].mask,
4932 tabla_2_higher_codec_reg_init_val[i].val);
4933 }
4934}
4935
4936static void tabla_update_reg_address(struct tabla_priv *priv)
4937{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304938 struct wcd9xxx *tabla_core = dev_get_drvdata(priv->codec->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004939 struct tabla_reg_address *reg_addr = &priv->reg_addr;
4940
4941 if (TABLA_IS_1_X(tabla_core->version)) {
4942 reg_addr->micb_4_ctl = TABLA_1_A_MICB_4_CTL;
4943 reg_addr->micb_4_int_rbias = TABLA_1_A_MICB_4_INT_RBIAS;
4944 reg_addr->micb_4_int_rbias = TABLA_1_A_MICB_4_INT_RBIAS;
4945 } else if (TABLA_IS_2_0(tabla_core->version)) {
4946 reg_addr->micb_4_ctl = TABLA_2_A_MICB_4_CTL;
4947 reg_addr->micb_4_int_rbias = TABLA_2_A_MICB_4_INT_RBIAS;
4948 reg_addr->micb_4_int_rbias = TABLA_2_A_MICB_4_INT_RBIAS;
4949 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004950}
4951
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004952static int tabla_codec_probe(struct snd_soc_codec *codec)
4953{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304954 struct wcd9xxx *control;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004955 struct tabla_priv *tabla;
4956 struct snd_soc_dapm_context *dapm = &codec->dapm;
4957 int ret = 0;
4958 int i;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004959 int ch_cnt;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004960
4961 codec->control_data = dev_get_drvdata(codec->dev->parent);
4962 control = codec->control_data;
4963
4964 tabla = kzalloc(sizeof(struct tabla_priv), GFP_KERNEL);
4965 if (!tabla) {
4966 dev_err(codec->dev, "Failed to allocate private data\n");
4967 return -ENOMEM;
4968 }
4969
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07004970 /* Make sure mbhc micbias register addresses are zeroed out */
4971 memset(&tabla->mbhc_bias_regs, 0,
4972 sizeof(struct mbhc_micbias_regs));
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07004973 tabla->cfilt_k_value = 0;
4974 tabla->mbhc_micbias_switched = false;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07004975
Joonwoo Park0976d012011-12-22 11:48:18 -08004976 /* Make sure mbhc intenal calibration data is zeroed out */
4977 memset(&tabla->mbhc_data, 0,
4978 sizeof(struct mbhc_internal_cal_data));
Joonwoo Park433149a2012-01-11 09:53:54 -08004979 tabla->mbhc_data.t_sta_dce = DEFAULT_DCE_STA_WAIT;
Joonwoo Park0976d012011-12-22 11:48:18 -08004980 tabla->mbhc_data.t_dce = DEFAULT_DCE_WAIT;
4981 tabla->mbhc_data.t_sta = DEFAULT_STA_WAIT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004982 snd_soc_codec_set_drvdata(codec, tabla);
4983
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004984 tabla->mclk_enabled = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004985 tabla->bandgap_type = TABLA_BANDGAP_OFF;
4986 tabla->clock_active = false;
4987 tabla->config_mode_active = false;
4988 tabla->mbhc_polling_active = false;
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004989 tabla->mbhc_fake_ins_start = 0;
Bradley Rubincb3950a2011-08-18 13:07:26 -07004990 tabla->no_mic_headset_override = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004991 tabla->codec = codec;
Patrick Lai3043fba2011-08-01 14:15:57 -07004992 tabla->pdata = dev_get_platdata(codec->dev->parent);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304993 tabla->intf_type = wcd9xxx_get_intf_type();
Patrick Lai3043fba2011-08-01 14:15:57 -07004994
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004995 tabla_update_reg_address(tabla);
Santosh Mardi22920282011-10-26 02:38:40 +05304996 tabla_update_reg_defaults(codec);
4997 tabla_codec_init_reg(codec);
Santosh Mardi22920282011-10-26 02:38:40 +05304998 ret = tabla_handle_pdata(tabla);
Patrick Lai3043fba2011-08-01 14:15:57 -07004999 if (IS_ERR_VALUE(ret)) {
5000 pr_err("%s: bad pdata\n", __func__);
5001 goto err_pdata;
5002 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005003
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005004 snd_soc_add_controls(codec, tabla_snd_controls,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005005 ARRAY_SIZE(tabla_snd_controls));
5006 if (TABLA_IS_1_X(control->version))
5007 snd_soc_add_controls(codec, tabla_1_x_snd_controls,
5008 ARRAY_SIZE(tabla_1_x_snd_controls));
5009 else
5010 snd_soc_add_controls(codec, tabla_2_higher_snd_controls,
5011 ARRAY_SIZE(tabla_2_higher_snd_controls));
5012
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005013 snd_soc_dapm_new_controls(dapm, tabla_dapm_widgets,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005014 ARRAY_SIZE(tabla_dapm_widgets));
5015 if (TABLA_IS_1_X(control->version))
5016 snd_soc_dapm_new_controls(dapm, tabla_1_x_dapm_widgets,
5017 ARRAY_SIZE(tabla_1_x_dapm_widgets));
5018 else
5019 snd_soc_dapm_new_controls(dapm, tabla_2_higher_dapm_widgets,
5020 ARRAY_SIZE(tabla_2_higher_dapm_widgets));
5021
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305022 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05305023 snd_soc_dapm_new_controls(dapm, tabla_dapm_i2s_widgets,
5024 ARRAY_SIZE(tabla_dapm_i2s_widgets));
5025 snd_soc_dapm_add_routes(dapm, audio_i2s_map,
5026 ARRAY_SIZE(audio_i2s_map));
5027 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005028 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
Kiran Kandi8b3a8302011-09-27 16:13:28 -07005029
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005030 if (TABLA_IS_1_X(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08005031 snd_soc_dapm_add_routes(dapm, tabla_1_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005032 ARRAY_SIZE(tabla_1_x_lineout_2_to_4_map));
5033 } else if (TABLA_IS_2_0(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08005034 snd_soc_dapm_add_routes(dapm, tabla_2_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005035 ARRAY_SIZE(tabla_2_x_lineout_2_to_4_map));
Kiran Kandi7a9fd902011-11-14 13:51:45 -08005036 } else {
5037 pr_err("%s : ERROR. Unsupported Tabla version 0x%2x\n",
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305038 __func__, control->version);
Kiran Kandi7a9fd902011-11-14 13:51:45 -08005039 goto err_pdata;
5040 }
5041
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005042 snd_soc_dapm_sync(dapm);
5043
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305044 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005045 tabla_hs_insert_irq, "Headset insert detect", tabla);
5046 if (ret) {
5047 pr_err("%s: Failed to request irq %d\n", __func__,
5048 TABLA_IRQ_MBHC_INSERTION);
5049 goto err_insert_irq;
5050 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305051 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005052
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305053 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005054 tabla_hs_remove_irq, "Headset remove detect", tabla);
5055 if (ret) {
5056 pr_err("%s: Failed to request irq %d\n", __func__,
5057 TABLA_IRQ_MBHC_REMOVAL);
5058 goto err_remove_irq;
5059 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305060 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005061
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305062 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07005063 tabla_dce_handler, "DC Estimation detect", tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005064 if (ret) {
5065 pr_err("%s: Failed to request irq %d\n", __func__,
5066 TABLA_IRQ_MBHC_POTENTIAL);
5067 goto err_potential_irq;
5068 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305069 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005070
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305071 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE,
Bradley Rubincb1e2732011-06-23 16:49:20 -07005072 tabla_release_handler, "Button Release detect", tabla);
5073 if (ret) {
5074 pr_err("%s: Failed to request irq %d\n", __func__,
5075 TABLA_IRQ_MBHC_RELEASE);
5076 goto err_release_irq;
5077 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305078 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005079
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305080 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_SLIMBUS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005081 tabla_slimbus_irq, "SLIMBUS Slave", tabla);
5082 if (ret) {
5083 pr_err("%s: Failed to request irq %d\n", __func__,
5084 TABLA_IRQ_SLIMBUS);
5085 goto err_slimbus_irq;
5086 }
5087
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305088 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++)
5089 wcd9xxx_interface_reg_write(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005090 TABLA_SLIM_PGD_PORT_INT_EN0 + i, 0xFF);
5091
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305092 ret = wcd9xxx_request_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07005093 TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla_hphl_ocp_irq,
5094 "HPH_L OCP detect", tabla);
5095 if (ret) {
5096 pr_err("%s: Failed to request irq %d\n", __func__,
5097 TABLA_IRQ_HPH_PA_OCPL_FAULT);
5098 goto err_hphl_ocp_irq;
5099 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305100 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPL_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07005101
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305102 ret = wcd9xxx_request_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07005103 TABLA_IRQ_HPH_PA_OCPR_FAULT, tabla_hphr_ocp_irq,
5104 "HPH_R OCP detect", tabla);
5105 if (ret) {
5106 pr_err("%s: Failed to request irq %d\n", __func__,
5107 TABLA_IRQ_HPH_PA_OCPR_FAULT);
5108 goto err_hphr_ocp_irq;
5109 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305110 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPR_FAULT);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005111 for (i = 0; i < ARRAY_SIZE(tabla_dai); i++) {
5112 switch (tabla_dai[i].id) {
5113 case AIF1_PB:
5114 ch_cnt = tabla_dai[i].playback.channels_max;
5115 break;
5116 case AIF1_CAP:
5117 ch_cnt = tabla_dai[i].capture.channels_max;
5118 break;
Neema Shettyd3a89262012-02-16 10:23:50 -08005119 case AIF2_PB:
5120 ch_cnt = tabla_dai[i].playback.channels_max;
5121 break;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005122 default:
5123 continue;
5124 }
5125 tabla->dai[i].ch_num = kzalloc((sizeof(unsigned int)*
5126 ch_cnt), GFP_KERNEL);
5127 }
Patrick Lai49efeac2011-11-03 11:01:12 -07005128
Bradley Rubincb3950a2011-08-18 13:07:26 -07005129#ifdef CONFIG_DEBUG_FS
5130 debug_tabla_priv = tabla;
5131#endif
5132
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005133 return ret;
5134
Patrick Lai49efeac2011-11-03 11:01:12 -07005135err_hphr_ocp_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305136 wcd9xxx_free_irq(codec->control_data,
5137 TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla);
Patrick Lai49efeac2011-11-03 11:01:12 -07005138err_hphl_ocp_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305139 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005140err_slimbus_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305141 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005142err_release_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305143 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005144err_potential_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305145 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005146err_remove_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305147 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005148err_insert_irq:
Patrick Lai3043fba2011-08-01 14:15:57 -07005149err_pdata:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005150 kfree(tabla);
5151 return ret;
5152}
5153static int tabla_codec_remove(struct snd_soc_codec *codec)
5154{
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005155 int i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005156 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305157 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
5158 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
5159 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
5160 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
5161 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005162 tabla_codec_disable_clock_block(codec);
5163 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Patrick Lai64b43262011-12-06 17:29:15 -08005164 if (tabla->mbhc_fw)
5165 release_firmware(tabla->mbhc_fw);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005166 for (i = 0; i < ARRAY_SIZE(tabla_dai); i++)
5167 kfree(tabla->dai[i].ch_num);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005168 kfree(tabla);
5169 return 0;
5170}
5171static struct snd_soc_codec_driver soc_codec_dev_tabla = {
5172 .probe = tabla_codec_probe,
5173 .remove = tabla_codec_remove,
5174 .read = tabla_read,
5175 .write = tabla_write,
5176
5177 .readable_register = tabla_readable,
5178 .volatile_register = tabla_volatile,
5179
5180 .reg_cache_size = TABLA_CACHE_SIZE,
5181 .reg_cache_default = tabla_reg_defaults,
5182 .reg_word_size = 1,
5183};
Bradley Rubincb3950a2011-08-18 13:07:26 -07005184
5185#ifdef CONFIG_DEBUG_FS
5186static struct dentry *debugfs_poke;
5187
5188static int codec_debug_open(struct inode *inode, struct file *file)
5189{
5190 file->private_data = inode->i_private;
5191 return 0;
5192}
5193
5194static ssize_t codec_debug_write(struct file *filp,
5195 const char __user *ubuf, size_t cnt, loff_t *ppos)
5196{
5197 char lbuf[32];
5198 char *buf;
5199 int rc;
5200
5201 if (cnt > sizeof(lbuf) - 1)
5202 return -EINVAL;
5203
5204 rc = copy_from_user(lbuf, ubuf, cnt);
5205 if (rc)
5206 return -EFAULT;
5207
5208 lbuf[cnt] = '\0';
5209 buf = (char *)lbuf;
5210 debug_tabla_priv->no_mic_headset_override = (*strsep(&buf, " ") == '0')
5211 ? false : true;
Bradley Rubincb3950a2011-08-18 13:07:26 -07005212 return rc;
5213}
5214
5215static const struct file_operations codec_debug_ops = {
5216 .open = codec_debug_open,
5217 .write = codec_debug_write,
5218};
5219#endif
5220
Joonwoo Park8b1f0982011-12-08 17:12:45 -08005221#ifdef CONFIG_PM
5222static int tabla_suspend(struct device *dev)
5223{
Joonwoo Park816b8e62012-01-23 16:03:21 -08005224 dev_dbg(dev, "%s: system suspend\n", __func__);
5225 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08005226}
5227
5228static int tabla_resume(struct device *dev)
5229{
Joonwoo Park816b8e62012-01-23 16:03:21 -08005230 dev_dbg(dev, "%s: system resume\n", __func__);
5231 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08005232}
5233
5234static const struct dev_pm_ops tabla_pm_ops = {
5235 .suspend = tabla_suspend,
5236 .resume = tabla_resume,
5237};
5238#endif
5239
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005240static int __devinit tabla_probe(struct platform_device *pdev)
5241{
Santosh Mardie15e2302011-11-15 10:39:23 +05305242 int ret = 0;
Bradley Rubincb3950a2011-08-18 13:07:26 -07005243#ifdef CONFIG_DEBUG_FS
5244 debugfs_poke = debugfs_create_file("TRRS",
5245 S_IFREG | S_IRUGO, NULL, (void *) "TRRS", &codec_debug_ops);
5246
5247#endif
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305248 if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Santosh Mardie15e2302011-11-15 10:39:23 +05305249 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
5250 tabla_dai, ARRAY_SIZE(tabla_dai));
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305251 else if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
Santosh Mardie15e2302011-11-15 10:39:23 +05305252 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
5253 tabla_i2s_dai, ARRAY_SIZE(tabla_i2s_dai));
5254 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005255}
5256static int __devexit tabla_remove(struct platform_device *pdev)
5257{
5258 snd_soc_unregister_codec(&pdev->dev);
Bradley Rubincb3950a2011-08-18 13:07:26 -07005259
5260#ifdef CONFIG_DEBUG_FS
5261 debugfs_remove(debugfs_poke);
5262#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005263 return 0;
5264}
5265static struct platform_driver tabla_codec_driver = {
5266 .probe = tabla_probe,
5267 .remove = tabla_remove,
5268 .driver = {
5269 .name = "tabla_codec",
5270 .owner = THIS_MODULE,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08005271#ifdef CONFIG_PM
5272 .pm = &tabla_pm_ops,
5273#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005274 },
5275};
5276
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08005277static struct platform_driver tabla1x_codec_driver = {
5278 .probe = tabla_probe,
5279 .remove = tabla_remove,
5280 .driver = {
5281 .name = "tabla1x_codec",
5282 .owner = THIS_MODULE,
5283#ifdef CONFIG_PM
5284 .pm = &tabla_pm_ops,
5285#endif
5286 },
5287};
5288
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005289static int __init tabla_codec_init(void)
5290{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08005291 int rtn = platform_driver_register(&tabla_codec_driver);
5292 if (rtn == 0) {
5293 rtn = platform_driver_register(&tabla1x_codec_driver);
5294 if (rtn != 0)
5295 platform_driver_unregister(&tabla_codec_driver);
5296 }
5297 return rtn;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005298}
5299
5300static void __exit tabla_codec_exit(void)
5301{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08005302 platform_driver_unregister(&tabla1x_codec_driver);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005303 platform_driver_unregister(&tabla_codec_driver);
5304}
5305
5306module_init(tabla_codec_init);
5307module_exit(tabla_codec_exit);
5308
5309MODULE_DESCRIPTION("Tabla codec driver");
5310MODULE_VERSION("1.0");
5311MODULE_LICENSE("GPL v2");