| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 1 | /* | 
| Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 2 |  * arch/blackfin/kernel/time.c | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 3 |  * | 
| Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 4 |  * This file contains the Blackfin-specific time handling details. | 
 | 5 |  * Most of the stuff is located in the machine specific files. | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 6 |  * | 
| Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 7 |  * Copyright 2004-2008 Analog Devices Inc. | 
 | 8 |  * Licensed under the GPL-2 or later. | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 9 |  */ | 
 | 10 |  | 
 | 11 | #include <linux/module.h> | 
 | 12 | #include <linux/profile.h> | 
 | 13 | #include <linux/interrupt.h> | 
 | 14 | #include <linux/time.h> | 
 | 15 | #include <linux/irq.h> | 
| Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 16 | #include <linux/delay.h> | 
| Alexey Dobriyan | d43c36d | 2009-10-07 17:09:06 +0400 | [diff] [blame] | 17 | #include <linux/sched.h> | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 18 |  | 
 | 19 | #include <asm/blackfin.h> | 
| Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 20 | #include <asm/time.h> | 
| Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 21 | #include <asm/gptimers.h> | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 22 |  | 
 | 23 | /* This is an NTP setting */ | 
 | 24 | #define	TICK_SIZE (tick_nsec / 1000) | 
 | 25 |  | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 26 | static struct irqaction bfin_timer_irq = { | 
| Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 27 | 	.name = "Blackfin Timer Tick", | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 28 | 	.flags = IRQF_DISABLED | 
 | 29 | }; | 
 | 30 |  | 
| Graf Yang | 9b9bfde | 2009-05-27 09:58:35 +0000 | [diff] [blame] | 31 | #if defined(CONFIG_IPIPE) | 
| Mike Frysinger | a1ee74c | 2009-01-07 23:14:38 +0800 | [diff] [blame] | 32 | void __init setup_system_timer0(void) | 
| Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 33 | { | 
 | 34 | 	/* Power down the core timer, just to play safe. */ | 
 | 35 | 	bfin_write_TCNTL(0); | 
 | 36 |  | 
 | 37 | 	disable_gptimers(TIMER0bit); | 
 | 38 | 	set_gptimer_status(0, TIMER_STATUS_TRUN0); | 
 | 39 | 	while (get_gptimer_status(0) & TIMER_STATUS_TRUN0) | 
 | 40 | 		udelay(10); | 
 | 41 |  | 
 | 42 | 	set_gptimer_config(0, 0x59); /* IRQ enable, periodic, PWM_OUT, SCLKed, OUT PAD disabled */ | 
 | 43 | 	set_gptimer_period(TIMER0_id, get_sclk() / HZ); | 
 | 44 | 	set_gptimer_pwidth(TIMER0_id, 1); | 
 | 45 | 	SSYNC(); | 
 | 46 | 	enable_gptimers(TIMER0bit); | 
 | 47 | } | 
| Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 48 | #else | 
| Mike Frysinger | a1ee74c | 2009-01-07 23:14:38 +0800 | [diff] [blame] | 49 | void __init setup_core_timer(void) | 
| Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 50 | { | 
 | 51 | 	u32 tcount; | 
 | 52 |  | 
 | 53 | 	/* power up the timer, but don't enable it just yet */ | 
 | 54 | 	bfin_write_TCNTL(1); | 
 | 55 | 	CSYNC(); | 
 | 56 |  | 
 | 57 | 	/* the TSCALE prescaler counter */ | 
 | 58 | 	bfin_write_TSCALE(TIME_SCALE - 1); | 
 | 59 |  | 
 | 60 | 	tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1); | 
 | 61 | 	bfin_write_TPERIOD(tcount); | 
 | 62 | 	bfin_write_TCOUNT(tcount); | 
 | 63 |  | 
 | 64 | 	/* now enable the timer */ | 
 | 65 | 	CSYNC(); | 
 | 66 |  | 
 | 67 | 	bfin_write_TCNTL(7); | 
 | 68 | } | 
| Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 69 | #endif | 
 | 70 |  | 
| Mike Frysinger | a1ee74c | 2009-01-07 23:14:38 +0800 | [diff] [blame] | 71 | static void __init | 
| Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 72 | time_sched_init(irqreturn_t(*timer_routine) (int, void *)) | 
 | 73 | { | 
| Graf Yang | 9b9bfde | 2009-05-27 09:58:35 +0000 | [diff] [blame] | 74 | #if defined(CONFIG_IPIPE) | 
| Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 75 | 	setup_system_timer0(); | 
| Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 76 | 	bfin_timer_irq.handler = timer_routine; | 
| Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 77 | 	setup_irq(IRQ_TIMER0, &bfin_timer_irq); | 
 | 78 | #else | 
| Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 79 | 	setup_core_timer(); | 
 | 80 | 	bfin_timer_irq.handler = timer_routine; | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 81 | 	setup_irq(IRQ_CORETMR, &bfin_timer_irq); | 
| Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 82 | #endif | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 83 | } | 
 | 84 |  | 
| john stultz | 10f03f1 | 2009-09-15 21:17:19 -0700 | [diff] [blame] | 85 | #ifdef CONFIG_ARCH_USES_GETTIMEOFFSET | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 86 | /* | 
 | 87 |  * Should return useconds since last timer tick | 
 | 88 |  */ | 
| john stultz | 10f03f1 | 2009-09-15 21:17:19 -0700 | [diff] [blame] | 89 | u32 arch_gettimeoffset(void) | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 90 | { | 
 | 91 | 	unsigned long offset; | 
 | 92 | 	unsigned long clocks_per_jiffy; | 
 | 93 |  | 
| Graf Yang | 9b9bfde | 2009-05-27 09:58:35 +0000 | [diff] [blame] | 94 | #if defined(CONFIG_IPIPE) | 
| Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 95 | 	clocks_per_jiffy = bfin_read_TIMER0_PERIOD(); | 
 | 96 | 	offset = bfin_read_TIMER0_COUNTER() / \ | 
| Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 97 | 		(((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC); | 
 | 98 |  | 
 | 99 | 	if ((get_gptimer_status(0) & TIMER_STATUS_TIMIL0) && offset < (100000 / HZ / 2)) | 
 | 100 | 		offset += (USEC_PER_SEC / HZ); | 
 | 101 | #else | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 102 | 	clocks_per_jiffy = bfin_read_TPERIOD(); | 
| Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 103 | 	offset = (clocks_per_jiffy - bfin_read_TCOUNT()) / \ | 
| Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 104 | 		(((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC); | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 105 |  | 
 | 106 | 	/* Check if we just wrapped the counters and maybe missed a tick */ | 
 | 107 | 	if ((bfin_read_ILAT() & (1 << IRQ_CORETMR)) | 
| Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 108 | 		&& (offset < (100000 / HZ / 2))) | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 109 | 		offset += (USEC_PER_SEC / HZ); | 
| Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 110 | #endif | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 111 | 	return offset; | 
 | 112 | } | 
| Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 113 | #endif | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 114 |  | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 115 | /* | 
 | 116 |  * timer_interrupt() needs to keep up the real-time clock, | 
 | 117 |  * as well as call the "do_timer()" routine every clocktick | 
 | 118 |  */ | 
 | 119 | #ifdef CONFIG_CORE_TIMER_IRQ_L1 | 
| Mike Frysinger | 1b047d8 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 120 | __attribute__((l1_text)) | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 121 | #endif | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 122 | irqreturn_t timer_interrupt(int irq, void *dummy) | 
 | 123 | { | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 124 | 	write_seqlock(&xtime_lock); | 
| Graf Yang | 9b9bfde | 2009-05-27 09:58:35 +0000 | [diff] [blame] | 125 | 	do_timer(1); | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 126 | 	write_sequnlock(&xtime_lock); | 
| Peter Zijlstra | aa02cd2 | 2008-02-13 21:33:16 +0100 | [diff] [blame] | 127 |  | 
| Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 128 | #ifdef CONFIG_IPIPE | 
 | 129 | 	update_root_process_times(get_irq_regs()); | 
 | 130 | #else | 
| Peter Zijlstra | aa02cd2 | 2008-02-13 21:33:16 +0100 | [diff] [blame] | 131 | 	update_process_times(user_mode(get_irq_regs())); | 
| Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 132 | #endif | 
| Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 133 | 	profile_tick(CPU_PROFILING); | 
| Peter Zijlstra | aa02cd2 | 2008-02-13 21:33:16 +0100 | [diff] [blame] | 134 |  | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 135 | 	return IRQ_HANDLED; | 
 | 136 | } | 
 | 137 |  | 
| John Stultz | cb0e996 | 2010-03-03 19:57:24 -0800 | [diff] [blame] | 138 | void read_persistent_clock(struct timespec *ts) | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 139 | { | 
 | 140 | 	time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60;	/* 1 Jan 2007 */ | 
| John Stultz | cb0e996 | 2010-03-03 19:57:24 -0800 | [diff] [blame] | 141 | 	ts->tv_sec = secs_since_1970; | 
 | 142 | 	ts->tv_nsec = 0; | 
 | 143 | } | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 144 |  | 
| John Stultz | cb0e996 | 2010-03-03 19:57:24 -0800 | [diff] [blame] | 145 | void __init time_init(void) | 
 | 146 | { | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 147 | #ifdef CONFIG_RTC_DRV_BFIN | 
 | 148 | 	/* [#2663] hack to filter junk RTC values that would cause | 
 | 149 | 	 * userspace to have to deal with time values greater than | 
 | 150 | 	 * 2^31 seconds (which uClibc cannot cope with yet) | 
 | 151 | 	 */ | 
 | 152 | 	if ((bfin_read_RTC_STAT() & 0xC0000000) == 0xC0000000) { | 
 | 153 | 		printk(KERN_NOTICE "bfin-rtc: invalid date; resetting\n"); | 
 | 154 | 		bfin_write_RTC_STAT(0); | 
 | 155 | 	} | 
 | 156 | #endif | 
 | 157 |  | 
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 158 | 	time_sched_init(timer_interrupt); | 
 | 159 | } |