blob: 171877006c70cd6777ba287abd3f9a8ddf94e621 [file] [log] [blame]
Flemmardc19623342013-09-11 09:38:51 +02001/* linux/driver/spi/spi_aic3254.h
2 *
3 * Copyright (C) 2009 HTC Corporation.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __SPI_AIC3254_H__
17#define __SPI_AIC3254_H__
18
19#include <linux/ioctl.h>
20
21typedef struct _CODEC_SPI_CMD {
22 unsigned char act;
23 unsigned char reg;
24 unsigned char data;
25} CODEC_SPI_CMD;
26
27typedef struct _CODEC_SPI_CMD_PARAM {
28 CODEC_SPI_CMD *data;
29 unsigned int len;
30} CODEC_SPI_CMD_PARAM;
31
32struct AIC3254_PARAM {
33 unsigned int row_num;
34 unsigned int col_num;
35 void *cmd_data;
36};
37
38struct CODEC_CFG {
39 unsigned char tb_idx;
40 unsigned char index;
41};
42
43/* IO CONTROL definition of AIC3254 */
44#define AIC3254_IOCTL_MAGIC 's'
45#define AIC3254_SET_TX_PARAM _IOW(AIC3254_IOCTL_MAGIC, 0x10, unsigned)
46#define AIC3254_SET_RX_PARAM _IOW(AIC3254_IOCTL_MAGIC, 0x11, unsigned)
47#define AIC3254_CONFIG_TX _IOW(AIC3254_IOCTL_MAGIC, 0x12, unsigned int)
48#define AIC3254_CONFIG_RX _IOW(AIC3254_IOCTL_MAGIC, 0x13, unsigned int)
49#define AIC3254_SET_DSP_PARAM _IOW(AIC3254_IOCTL_MAGIC, 0x20, unsigned)
50#define AIC3254_CONFIG_MEDIA _IOW(AIC3254_IOCTL_MAGIC, 0x21, unsigned int)
51#define AIC3254_CONFIG_VOICE _IOW(AIC3254_IOCTL_MAGIC, 0x22, unsigned int)
52#define AIC3254_CONFIG_VOLUME_L _IOW(AIC3254_IOCTL_MAGIC, 0x23, unsigned int)
53#define AIC3254_CONFIG_VOLUME_R _IOW(AIC3254_IOCTL_MAGIC, 0x24, unsigned int)
54#define AIC3254_POWERDOWN _IOW(AIC3254_IOCTL_MAGIC, 0x25, unsigned int)
55#define AIC3254_LOOPBACK _IOW(AIC3254_IOCTL_MAGIC, 0x26, unsigned int)
56#define AIC3254_DUMP_PAGES _IOW(AIC3254_IOCTL_MAGIC, 0x30, unsigned int)
57#define AIC3254_READ_REG _IOWR(AIC3254_IOCTL_MAGIC, 0x31, unsigned)
58#define AIC3254_WRITE_REG _IOW(AIC3254_IOCTL_MAGIC, 0x32, unsigned)
59#define AIC3254_RESET _IOW(AIC3254_IOCTL_MAGIC, 0x33, unsigned int)
60
61#define AIC3254_MAX_PAGES 255
62#define AIC3254_MAX_REGS 128
63#define AIC3254_MAX_RETRY 10
64
65#define IO_CTL_ROW_MAX 64
66#define IO_CTL_COL_MAX 1024
67#define MINIDSP_ROW_MAX 32
68#define MINIDSP_COL_MAX 16384
69
70enum aic3254_uplink_mode {
71 INITIAL = 0,
72 CALL_UPLINK_IMIC_RECEIVER = 1,
73 CALL_UPLINK_EMIC_HEADSET,
74 CALL_UPLINK_IMIC_HEADSET,
75 CALL_UPLINK_IMIC_SPEAKER,
76 CALL_UPLINK_IMIC_RECEIVER_DUALMIC,
77 CALL_UPLINK_EMIC_HEADSET_DUALMIC,
78 CALL_UPLINK_IMIC_SPEAKER_DUALMIC,
79 CALL_UPLINK_IMIC_RECIVER_TESTSIM,
80 CALL_UPLINK_EMIC_HEADSET_TESTSIM,
81 CALL_UPLINK_IMIC_SPEAKER_TESTSIM,
82 VOICERECORD_IMIC = 15,
83 VOICERECORD_EMIC,
84 VIDEORECORD_IMIC,
85 VIDEORECORD_EMIC,
86 VOICERECOGNITION_IMIC,
87 VOICERECOGNITION_EMIC,
88 FM_IN_SPEAKER,
89 FM_IN_HEADSET,
90 TTY_IN_HCO,
91 TTY_IN_VCO,
92 TTY_IN_FULL,
93 UPLINK_OFF = 29,
94 UPLINK_WAKEUP,
95 POWER_OFF,
96 SLEEP_WITH_HP_IN,
97 VOICERECORD_IMIC_PLAYBACK_SPEAKER,
98 VOICERECORD_EMIC_PLAYBACK_HEADSET,
99 VOICERECORD_IMIC_PLAYBACK_HEADSET,
100};
101
102enum aic3254_downlink_mode {
103 CALL_DOWNLINK_IMIC_RECEIVER = 1,
104 CALL_DOWNLINK_EMIC_HEADSET,
105 CALL_DOWNLINK_IMIC_HEADSET,
106 CALL_DOWNLINK_IMIC_SPEAKER,
107 CALL_DOWNLINK_IMIC_RECEIVER_DUALMIC,
108 CALL_DOWNLINK_EMIC_HEADSET_DUALMIC,
109 CALL_DOWNLINK_IMIC_SPEAKER_DUALMIC,
110 CALL_DOWNLINK_IMIC_RECIVER_TESTSIM,
111 CALL_DOWNLINK_EMIC_HEADSET_TESTSIM,
112 CALL_DOWNLINK_IMIC_SPEAKER_TESTSIM,
113 PLAYBACK_RECEIVER,
114 PLAYBACK_HEADSET,
115 PLAYBACK_SPEAKER = 13,
116 RING_HEADSET_SPEAKER,
117 PLAYBACK_SPEAKER_ALT,
118 USB_AUDIO,
119 FM_OUT_SPEAKER = 21,
120 FM_OUT_HEADSET,
121 TTY_OUT_HCO,
122 TTY_OUT_VCO,
123 TTY_OUT_FULL,
124 MUSE,
125 HAC,
126 LPM_IMIC_RECEIVER,
127 DOWNLINK_OFF = 29,
128 DOWNLINK_WAKEUP,
129};
130
131struct aic3254_ctl_ops {
132 void (*tx_amp_enable)(int en);
133 void (*rx_amp_enable)(int en);
134 int (*panel_sleep_in)(void);
135 void (*reset_3254)(void);
136 void (*spibus_enable)(int en);
137 CODEC_SPI_CMD_PARAM *downlink_off;
138 CODEC_SPI_CMD_PARAM *uplink_off;
139 CODEC_SPI_CMD_PARAM *downlink_on;
140 CODEC_SPI_CMD_PARAM *uplink_on;
141 CODEC_SPI_CMD_PARAM *lb_dsp_init;
142 CODEC_SPI_CMD_PARAM *lb_downlink_receiver;
143 CODEC_SPI_CMD_PARAM *lb_downlink_speaker;
144 CODEC_SPI_CMD_PARAM *lb_downlink_headset;
145 CODEC_SPI_CMD_PARAM *lb_uplink_imic;
146 CODEC_SPI_CMD_PARAM *lb_uplink_emic;
147 CODEC_SPI_CMD_PARAM *lb_receiver_imic;
148 CODEC_SPI_CMD_PARAM *lb_speaker_imic;
149 CODEC_SPI_CMD_PARAM *lb_headset_emic;
150 CODEC_SPI_CMD_PARAM *lb_receiver_bmic;
151 CODEC_SPI_CMD_PARAM *lb_speaker_bmic;
152 CODEC_SPI_CMD_PARAM *lb_headset_bmic;
153};
154
155void aic3254_register_ctl_ops(struct aic3254_ctl_ops *ops);
156void aic3254_set_mode(int config, int mode);
157void aic3254_set_mic_bias(int en);
158void aic3254_force_powerdown(void);
159#endif /* __SPI_AIC3254_H__*/