blob: 825556f24bae63d910b699b4db4a6eead5d6418f [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/module.h>
13#include <linux/init.h>
Bradley Rubin229c6a52011-07-12 16:18:48 -070014#include <linux/firmware.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070015#include <linux/slab.h>
16#include <linux/platform_device.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053017#include <linux/device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/printk.h>
19#include <linux/ratelimit.h>
Bradley Rubincb3950a2011-08-18 13:07:26 -070020#include <linux/debugfs.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070021#include <linux/mfd/wcd9310/core.h>
22#include <linux/mfd/wcd9310/registers.h>
Patrick Lai3043fba2011-08-01 14:15:57 -070023#include <linux/mfd/wcd9310/pdata.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053024#include <sound/pcm.h>
25#include <sound/pcm_params.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <sound/jack.h>
27#include <sound/soc.h>
28#include <sound/soc-dapm.h>
29#include <sound/tlv.h>
30#include <linux/bitops.h>
31#include <linux/delay.h>
32#include "wcd9310.h"
33
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070034#define WCD9310_RATES (SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|\
35 SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_48000)
36
37#define NUM_DECIMATORS 10
38#define NUM_INTERPOLATORS 7
39#define BITS_PER_REG 8
40#define TABLA_RX_DAI_ID 1
41#define TABLA_TX_DAI_ID 2
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080042#define TABLA_CFILT_FAST_MODE 0x00
43#define TABLA_CFILT_SLOW_MODE 0x40
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070044
Patrick Lai49efeac2011-11-03 11:01:12 -070045#define TABLA_JACK_MASK (SND_JACK_HEADSET | SND_JACK_OC_HPHL | SND_JACK_OC_HPHR)
46
Santosh Mardie15e2302011-11-15 10:39:23 +053047#define TABLA_I2S_MASTER_MODE_MASK 0x08
48
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070049static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
50static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
51static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
52
53enum tabla_bandgap_type {
54 TABLA_BANDGAP_OFF = 0,
55 TABLA_BANDGAP_AUDIO_MODE,
56 TABLA_BANDGAP_MBHC_MODE,
57};
58
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -070059struct mbhc_micbias_regs {
60 u16 cfilt_val;
61 u16 cfilt_ctl;
62 u16 mbhc_reg;
63 u16 int_rbias;
64 u16 ctl_reg;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080065 u8 cfilt_sel;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -070066};
67
Ben Romberger1f045a72011-11-04 10:14:57 -070068/* Codec supports 2 IIR filters */
69enum {
70 IIR1 = 0,
71 IIR2,
72 IIR_MAX,
73};
74/* Codec supports 5 bands */
75enum {
76 BAND1 = 0,
77 BAND2,
78 BAND3,
79 BAND4,
80 BAND5,
81 BAND_MAX,
82};
83
Joonwoo Parka9444452011-12-08 18:48:27 -080084/* Flags to track of PA and DAC state.
85 * PA and DAC should be tracked separately as AUXPGA loopback requires
86 * only PA to be turned on without DAC being on. */
87enum tabla_priv_ack_flags {
88 TABLA_HPHL_PA_OFF_ACK = 0,
89 TABLA_HPHR_PA_OFF_ACK,
90 TABLA_HPHL_DAC_OFF_ACK,
91 TABLA_HPHR_DAC_OFF_ACK
92};
93
Bradley Rubin229c6a52011-07-12 16:18:48 -070094struct tabla_priv {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070095 struct snd_soc_codec *codec;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070096 u32 adc_count;
Patrick Lai3043fba2011-08-01 14:15:57 -070097 u32 cfilt1_cnt;
98 u32 cfilt2_cnt;
99 u32 cfilt3_cnt;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700100 u32 rx_bias_count;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700101 enum tabla_bandgap_type bandgap_type;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700102 bool mclk_enabled;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700103 bool clock_active;
104 bool config_mode_active;
105 bool mbhc_polling_active;
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -0800106 bool fake_insert_context;
Bradley Rubincb1e2732011-06-23 16:49:20 -0700107 int buttons_pressed;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108
109 struct tabla_mbhc_calibration *calibration;
110
Bradley Rubincb1e2732011-06-23 16:49:20 -0700111 struct snd_soc_jack *headset_jack;
112 struct snd_soc_jack *button_jack;
Bradley Rubin229c6a52011-07-12 16:18:48 -0700113
Patrick Lai3043fba2011-08-01 14:15:57 -0700114 struct tabla_pdata *pdata;
Bradley Rubina7096d02011-08-03 18:29:02 -0700115 u32 anc_slot;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700116
117 bool no_mic_headset_override;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -0700118 /* Delayed work to report long button press */
119 struct delayed_work btn0_dwork;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700120
121 struct mbhc_micbias_regs mbhc_bias_regs;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -0700122 u8 cfilt_k_value;
123 bool mbhc_micbias_switched;
Patrick Lai49efeac2011-11-03 11:01:12 -0700124
Joonwoo Parka9444452011-12-08 18:48:27 -0800125 /* track PA/DAC state */
126 unsigned long hph_pa_dac_state;
127
Santosh Mardie15e2302011-11-15 10:39:23 +0530128 /*track tabla interface type*/
129 u8 intf_type;
130
Patrick Lai49efeac2011-11-03 11:01:12 -0700131 u32 hph_status; /* track headhpone status */
132 /* define separate work for left and right headphone OCP to avoid
133 * additional checking on which OCP event to report so no locking
134 * to ensure synchronization is required
135 */
136 struct work_struct hphlocp_work; /* reporting left hph ocp off */
137 struct work_struct hphrocp_work; /* reporting right hph ocp off */
Joonwoo Park8b1f0982011-12-08 17:12:45 -0800138
139 /* pm_cnt holds number of sleep lock holders + 1
140 * so if pm_cnt is 1 system is sleep-able. */
141 atomic_t pm_cnt;
142 wait_queue_head_t pm_wq;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700143};
144
Bradley Rubincb3950a2011-08-18 13:07:26 -0700145#ifdef CONFIG_DEBUG_FS
146struct tabla_priv *debug_tabla_priv;
147#endif
148
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700149static int tabla_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
150 struct snd_kcontrol *kcontrol, int event)
151{
152 struct snd_soc_codec *codec = w->codec;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700153
154 pr_debug("%s %d\n", __func__, event);
155 switch (event) {
156 case SND_SOC_DAPM_POST_PMU:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700157 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
158 0x01);
159 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x08);
160 usleep_range(200, 200);
161 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x00);
162 break;
163 case SND_SOC_DAPM_PRE_PMD:
164 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_RESET_CTL, 0x10,
165 0x10);
166 usleep_range(20, 20);
167 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x08);
168 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x10);
169 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x00);
170 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
171 0x00);
172 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700173 break;
174 }
175 return 0;
176}
177
Bradley Rubina7096d02011-08-03 18:29:02 -0700178static int tabla_get_anc_slot(struct snd_kcontrol *kcontrol,
179 struct snd_ctl_elem_value *ucontrol)
180{
181 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
182 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
183 ucontrol->value.integer.value[0] = tabla->anc_slot;
184 return 0;
185}
186
187static int tabla_put_anc_slot(struct snd_kcontrol *kcontrol,
188 struct snd_ctl_elem_value *ucontrol)
189{
190 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
191 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
192 tabla->anc_slot = ucontrol->value.integer.value[0];
193 return 0;
194}
195
Kiran Kandid2d86b52011-09-09 17:44:28 -0700196static int tabla_pa_gain_get(struct snd_kcontrol *kcontrol,
197 struct snd_ctl_elem_value *ucontrol)
198{
199 u8 ear_pa_gain;
200 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
201
202 ear_pa_gain = snd_soc_read(codec, TABLA_A_RX_EAR_GAIN);
203
204 ear_pa_gain = ear_pa_gain >> 5;
205
206 if (ear_pa_gain == 0x00) {
207 ucontrol->value.integer.value[0] = 0;
208 } else if (ear_pa_gain == 0x04) {
209 ucontrol->value.integer.value[0] = 1;
210 } else {
211 pr_err("%s: ERROR: Unsupported Ear Gain = 0x%x\n",
212 __func__, ear_pa_gain);
213 return -EINVAL;
214 }
215
216 pr_debug("%s: ear_pa_gain = 0x%x\n", __func__, ear_pa_gain);
217
218 return 0;
219}
220
221static int tabla_pa_gain_put(struct snd_kcontrol *kcontrol,
222 struct snd_ctl_elem_value *ucontrol)
223{
224 u8 ear_pa_gain;
225 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
226
227 pr_debug("%s: ucontrol->value.integer.value[0] = %ld\n", __func__,
228 ucontrol->value.integer.value[0]);
229
230 switch (ucontrol->value.integer.value[0]) {
231 case 0:
232 ear_pa_gain = 0x00;
233 break;
234 case 1:
235 ear_pa_gain = 0x80;
236 break;
237 default:
238 return -EINVAL;
239 }
240
241 snd_soc_update_bits(codec, TABLA_A_RX_EAR_GAIN, 0xE0, ear_pa_gain);
242 return 0;
243}
244
Ben Romberger1f045a72011-11-04 10:14:57 -0700245static int tabla_get_iir_enable_audio_mixer(
246 struct snd_kcontrol *kcontrol,
247 struct snd_ctl_elem_value *ucontrol)
248{
249 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
250 int iir_idx = ((struct soc_multi_mixer_control *)
251 kcontrol->private_value)->reg;
252 int band_idx = ((struct soc_multi_mixer_control *)
253 kcontrol->private_value)->shift;
254
255 ucontrol->value.integer.value[0] =
256 snd_soc_read(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx)) &
257 (1 << band_idx);
258
259 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
260 iir_idx, band_idx,
261 (uint32_t)ucontrol->value.integer.value[0]);
262 return 0;
263}
264
265static int tabla_put_iir_enable_audio_mixer(
266 struct snd_kcontrol *kcontrol,
267 struct snd_ctl_elem_value *ucontrol)
268{
269 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
270 int iir_idx = ((struct soc_multi_mixer_control *)
271 kcontrol->private_value)->reg;
272 int band_idx = ((struct soc_multi_mixer_control *)
273 kcontrol->private_value)->shift;
274 int value = ucontrol->value.integer.value[0];
275
276 /* Mask first 5 bits, 6-8 are reserved */
277 snd_soc_update_bits(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx),
278 (1 << band_idx), (value << band_idx));
279
280 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
281 iir_idx, band_idx, value);
282 return 0;
283}
284static uint32_t get_iir_band_coeff(struct snd_soc_codec *codec,
285 int iir_idx, int band_idx,
286 int coeff_idx)
287{
288 /* Address does not automatically update if reading */
289 snd_soc_update_bits(codec,
290 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
291 0x1F, band_idx * BAND_MAX + coeff_idx);
292
293 /* Mask bits top 2 bits since they are reserved */
294 return ((snd_soc_read(codec,
295 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx)) << 24) |
296 (snd_soc_read(codec,
297 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx)) << 16) |
298 (snd_soc_read(codec,
299 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx)) << 8) |
300 (snd_soc_read(codec,
301 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx)))) &
302 0x3FFFFFFF;
303}
304
305static int tabla_get_iir_band_audio_mixer(
306 struct snd_kcontrol *kcontrol,
307 struct snd_ctl_elem_value *ucontrol)
308{
309 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
310 int iir_idx = ((struct soc_multi_mixer_control *)
311 kcontrol->private_value)->reg;
312 int band_idx = ((struct soc_multi_mixer_control *)
313 kcontrol->private_value)->shift;
314
315 ucontrol->value.integer.value[0] =
316 get_iir_band_coeff(codec, iir_idx, band_idx, 0);
317 ucontrol->value.integer.value[1] =
318 get_iir_band_coeff(codec, iir_idx, band_idx, 1);
319 ucontrol->value.integer.value[2] =
320 get_iir_band_coeff(codec, iir_idx, band_idx, 2);
321 ucontrol->value.integer.value[3] =
322 get_iir_band_coeff(codec, iir_idx, band_idx, 3);
323 ucontrol->value.integer.value[4] =
324 get_iir_band_coeff(codec, iir_idx, band_idx, 4);
325
326 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
327 "%s: IIR #%d band #%d b1 = 0x%x\n"
328 "%s: IIR #%d band #%d b2 = 0x%x\n"
329 "%s: IIR #%d band #%d a1 = 0x%x\n"
330 "%s: IIR #%d band #%d a2 = 0x%x\n",
331 __func__, iir_idx, band_idx,
332 (uint32_t)ucontrol->value.integer.value[0],
333 __func__, iir_idx, band_idx,
334 (uint32_t)ucontrol->value.integer.value[1],
335 __func__, iir_idx, band_idx,
336 (uint32_t)ucontrol->value.integer.value[2],
337 __func__, iir_idx, band_idx,
338 (uint32_t)ucontrol->value.integer.value[3],
339 __func__, iir_idx, band_idx,
340 (uint32_t)ucontrol->value.integer.value[4]);
341 return 0;
342}
343
344static void set_iir_band_coeff(struct snd_soc_codec *codec,
345 int iir_idx, int band_idx,
346 int coeff_idx, uint32_t value)
347{
348 /* Mask top 3 bits, 6-8 are reserved */
349 /* Update address manually each time */
350 snd_soc_update_bits(codec,
351 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
352 0x1F, band_idx * BAND_MAX + coeff_idx);
353
354 /* Mask top 2 bits, 7-8 are reserved */
355 snd_soc_update_bits(codec,
356 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx),
357 0x3F, (value >> 24) & 0x3F);
358
359 /* Isolate 8bits at a time */
360 snd_soc_update_bits(codec,
361 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx),
362 0xFF, (value >> 16) & 0xFF);
363
364 snd_soc_update_bits(codec,
365 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx),
366 0xFF, (value >> 8) & 0xFF);
367
368 snd_soc_update_bits(codec,
369 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx),
370 0xFF, value & 0xFF);
371}
372
373static int tabla_put_iir_band_audio_mixer(
374 struct snd_kcontrol *kcontrol,
375 struct snd_ctl_elem_value *ucontrol)
376{
377 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
378 int iir_idx = ((struct soc_multi_mixer_control *)
379 kcontrol->private_value)->reg;
380 int band_idx = ((struct soc_multi_mixer_control *)
381 kcontrol->private_value)->shift;
382
383 set_iir_band_coeff(codec, iir_idx, band_idx, 0,
384 ucontrol->value.integer.value[0]);
385 set_iir_band_coeff(codec, iir_idx, band_idx, 1,
386 ucontrol->value.integer.value[1]);
387 set_iir_band_coeff(codec, iir_idx, band_idx, 2,
388 ucontrol->value.integer.value[2]);
389 set_iir_band_coeff(codec, iir_idx, band_idx, 3,
390 ucontrol->value.integer.value[3]);
391 set_iir_band_coeff(codec, iir_idx, band_idx, 4,
392 ucontrol->value.integer.value[4]);
393
394 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
395 "%s: IIR #%d band #%d b1 = 0x%x\n"
396 "%s: IIR #%d band #%d b2 = 0x%x\n"
397 "%s: IIR #%d band #%d a1 = 0x%x\n"
398 "%s: IIR #%d band #%d a2 = 0x%x\n",
399 __func__, iir_idx, band_idx,
400 get_iir_band_coeff(codec, iir_idx, band_idx, 0),
401 __func__, iir_idx, band_idx,
402 get_iir_band_coeff(codec, iir_idx, band_idx, 1),
403 __func__, iir_idx, band_idx,
404 get_iir_band_coeff(codec, iir_idx, band_idx, 2),
405 __func__, iir_idx, band_idx,
406 get_iir_band_coeff(codec, iir_idx, band_idx, 3),
407 __func__, iir_idx, band_idx,
408 get_iir_band_coeff(codec, iir_idx, band_idx, 4));
409 return 0;
410}
411
Kiran Kandid2d86b52011-09-09 17:44:28 -0700412static const char *tabla_ear_pa_gain_text[] = {"POS_6_DB", "POS_2_DB"};
413static const struct soc_enum tabla_ear_pa_gain_enum[] = {
414 SOC_ENUM_SINGLE_EXT(2, tabla_ear_pa_gain_text),
415};
416
Santosh Mardi024010f2011-10-18 06:27:21 +0530417/*cut of frequency for high pass filter*/
418static const char *cf_text[] = {
419 "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
420};
421
422static const struct soc_enum cf_dec1_enum =
423 SOC_ENUM_SINGLE(TABLA_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
424
425static const struct soc_enum cf_dec2_enum =
426 SOC_ENUM_SINGLE(TABLA_A_CDC_TX2_MUX_CTL, 4, 3, cf_text);
427
428static const struct soc_enum cf_dec3_enum =
429 SOC_ENUM_SINGLE(TABLA_A_CDC_TX3_MUX_CTL, 4, 3, cf_text);
430
431static const struct soc_enum cf_dec4_enum =
432 SOC_ENUM_SINGLE(TABLA_A_CDC_TX4_MUX_CTL, 4, 3, cf_text);
433
434static const struct soc_enum cf_dec5_enum =
435 SOC_ENUM_SINGLE(TABLA_A_CDC_TX5_MUX_CTL, 4, 3, cf_text);
436
437static const struct soc_enum cf_dec6_enum =
438 SOC_ENUM_SINGLE(TABLA_A_CDC_TX6_MUX_CTL, 4, 3, cf_text);
439
440static const struct soc_enum cf_dec7_enum =
441 SOC_ENUM_SINGLE(TABLA_A_CDC_TX7_MUX_CTL, 4, 3, cf_text);
442
443static const struct soc_enum cf_dec8_enum =
444 SOC_ENUM_SINGLE(TABLA_A_CDC_TX8_MUX_CTL, 4, 3, cf_text);
445
446static const struct soc_enum cf_dec9_enum =
447 SOC_ENUM_SINGLE(TABLA_A_CDC_TX9_MUX_CTL, 4, 3, cf_text);
448
449static const struct soc_enum cf_dec10_enum =
450 SOC_ENUM_SINGLE(TABLA_A_CDC_TX10_MUX_CTL, 4, 3, cf_text);
451
452static const struct soc_enum cf_rxmix1_enum =
453 SOC_ENUM_SINGLE(TABLA_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
454
455static const struct soc_enum cf_rxmix2_enum =
456 SOC_ENUM_SINGLE(TABLA_A_CDC_RX2_B4_CTL, 1, 3, cf_text);
457
458static const struct soc_enum cf_rxmix3_enum =
459 SOC_ENUM_SINGLE(TABLA_A_CDC_RX3_B4_CTL, 1, 3, cf_text);
460
461static const struct soc_enum cf_rxmix4_enum =
462 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B4_CTL, 1, 3, cf_text);
463
464static const struct soc_enum cf_rxmix5_enum =
465 SOC_ENUM_SINGLE(TABLA_A_CDC_RX5_B4_CTL, 1, 3, cf_text)
466;
467static const struct soc_enum cf_rxmix6_enum =
468 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B4_CTL, 1, 3, cf_text);
469
470static const struct soc_enum cf_rxmix7_enum =
471 SOC_ENUM_SINGLE(TABLA_A_CDC_RX7_B4_CTL, 1, 3, cf_text);
472
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700473static const struct snd_kcontrol_new tabla_snd_controls[] = {
Kiran Kandid2d86b52011-09-09 17:44:28 -0700474
475 SOC_ENUM_EXT("EAR PA Gain", tabla_ear_pa_gain_enum[0],
476 tabla_pa_gain_get, tabla_pa_gain_put),
477
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700478 SOC_SINGLE_TLV("LINEOUT1 Volume", TABLA_A_RX_LINE_1_GAIN, 0, 12, 1,
479 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700480 SOC_SINGLE_TLV("LINEOUT2 Volume", TABLA_A_RX_LINE_2_GAIN, 0, 12, 1,
481 line_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700482 SOC_SINGLE_TLV("LINEOUT3 Volume", TABLA_A_RX_LINE_3_GAIN, 0, 12, 1,
483 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700484 SOC_SINGLE_TLV("LINEOUT4 Volume", TABLA_A_RX_LINE_4_GAIN, 0, 12, 1,
485 line_gain),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700486 SOC_SINGLE_TLV("LINEOUT5 Volume", TABLA_A_RX_LINE_5_GAIN, 0, 12, 1,
487 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700488
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700489 SOC_SINGLE_TLV("HPHL Volume", TABLA_A_RX_HPH_L_GAIN, 0, 12, 1,
490 line_gain),
491 SOC_SINGLE_TLV("HPHR Volume", TABLA_A_RX_HPH_R_GAIN, 0, 12, 1,
492 line_gain),
493
Bradley Rubin410383f2011-07-22 13:44:23 -0700494 SOC_SINGLE_S8_TLV("RX1 Digital Volume", TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
495 -84, 40, digital_gain),
496 SOC_SINGLE_S8_TLV("RX2 Digital Volume", TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
497 -84, 40, digital_gain),
498 SOC_SINGLE_S8_TLV("RX3 Digital Volume", TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
499 -84, 40, digital_gain),
500 SOC_SINGLE_S8_TLV("RX4 Digital Volume", TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
501 -84, 40, digital_gain),
502 SOC_SINGLE_S8_TLV("RX5 Digital Volume", TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
503 -84, 40, digital_gain),
504 SOC_SINGLE_S8_TLV("RX6 Digital Volume", TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
505 -84, 40, digital_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700506
Bradley Rubin410383f2011-07-22 13:44:23 -0700507 SOC_SINGLE_S8_TLV("DEC1 Volume", TABLA_A_CDC_TX1_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700508 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700509 SOC_SINGLE_S8_TLV("DEC2 Volume", TABLA_A_CDC_TX2_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700510 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700511 SOC_SINGLE_S8_TLV("DEC3 Volume", TABLA_A_CDC_TX3_VOL_CTL_GAIN, -84, 40,
512 digital_gain),
513 SOC_SINGLE_S8_TLV("DEC4 Volume", TABLA_A_CDC_TX4_VOL_CTL_GAIN, -84, 40,
514 digital_gain),
515 SOC_SINGLE_S8_TLV("DEC5 Volume", TABLA_A_CDC_TX5_VOL_CTL_GAIN, -84, 40,
516 digital_gain),
517 SOC_SINGLE_S8_TLV("DEC6 Volume", TABLA_A_CDC_TX6_VOL_CTL_GAIN, -84, 40,
518 digital_gain),
519 SOC_SINGLE_S8_TLV("DEC7 Volume", TABLA_A_CDC_TX7_VOL_CTL_GAIN, -84, 40,
520 digital_gain),
521 SOC_SINGLE_S8_TLV("DEC8 Volume", TABLA_A_CDC_TX8_VOL_CTL_GAIN, -84, 40,
522 digital_gain),
523 SOC_SINGLE_S8_TLV("DEC9 Volume", TABLA_A_CDC_TX9_VOL_CTL_GAIN, -84, 40,
524 digital_gain),
525 SOC_SINGLE_S8_TLV("DEC10 Volume", TABLA_A_CDC_TX10_VOL_CTL_GAIN, -84,
526 40, digital_gain),
Patrick Lai29006372011-09-28 17:57:42 -0700527 SOC_SINGLE_S8_TLV("IIR1 INP1 Volume", TABLA_A_CDC_IIR1_GAIN_B1_CTL, -84,
528 40, digital_gain),
529 SOC_SINGLE_S8_TLV("IIR1 INP2 Volume", TABLA_A_CDC_IIR1_GAIN_B2_CTL, -84,
530 40, digital_gain),
531 SOC_SINGLE_S8_TLV("IIR1 INP3 Volume", TABLA_A_CDC_IIR1_GAIN_B3_CTL, -84,
532 40, digital_gain),
533 SOC_SINGLE_S8_TLV("IIR1 INP4 Volume", TABLA_A_CDC_IIR1_GAIN_B4_CTL, -84,
534 40, digital_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700535 SOC_SINGLE_TLV("ADC1 Volume", TABLA_A_TX_1_2_EN, 5, 3, 0, analog_gain),
536 SOC_SINGLE_TLV("ADC2 Volume", TABLA_A_TX_1_2_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700537 SOC_SINGLE_TLV("ADC3 Volume", TABLA_A_TX_3_4_EN, 5, 3, 0, analog_gain),
538 SOC_SINGLE_TLV("ADC4 Volume", TABLA_A_TX_3_4_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700539 SOC_SINGLE_TLV("ADC5 Volume", TABLA_A_TX_5_6_EN, 5, 3, 0, analog_gain),
540 SOC_SINGLE_TLV("ADC6 Volume", TABLA_A_TX_5_6_EN, 1, 3, 0, analog_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700541
542 SOC_SINGLE("MICBIAS1 CAPLESS Switch", TABLA_A_MICB_1_CTL, 4, 1, 1),
Santosh Mardi680b41e2011-11-22 16:51:16 -0800543 SOC_SINGLE("MICBIAS2 CAPLESS Switch", TABLA_A_MICB_2_CTL, 4, 1, 1),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700544 SOC_SINGLE("MICBIAS3 CAPLESS Switch", TABLA_A_MICB_3_CTL, 4, 1, 1),
545 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_A_MICB_4_CTL, 4, 1, 1),
Bradley Rubina7096d02011-08-03 18:29:02 -0700546
547 SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 0, 100, tabla_get_anc_slot,
548 tabla_put_anc_slot),
Santosh Mardi024010f2011-10-18 06:27:21 +0530549 SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
550 SOC_ENUM("TX2 HPF cut off", cf_dec2_enum),
551 SOC_ENUM("TX3 HPF cut off", cf_dec3_enum),
552 SOC_ENUM("TX4 HPF cut off", cf_dec4_enum),
553 SOC_ENUM("TX5 HPF cut off", cf_dec5_enum),
554 SOC_ENUM("TX6 HPF cut off", cf_dec6_enum),
555 SOC_ENUM("TX7 HPF cut off", cf_dec7_enum),
556 SOC_ENUM("TX8 HPF cut off", cf_dec8_enum),
557 SOC_ENUM("TX9 HPF cut off", cf_dec9_enum),
558 SOC_ENUM("TX10 HPF cut off", cf_dec10_enum),
559
560 SOC_SINGLE("TX1 HPF Switch", TABLA_A_CDC_TX1_MUX_CTL, 3, 1, 0),
561 SOC_SINGLE("TX2 HPF Switch", TABLA_A_CDC_TX2_MUX_CTL, 3, 1, 0),
562 SOC_SINGLE("TX3 HPF Switch", TABLA_A_CDC_TX3_MUX_CTL, 3, 1, 0),
563 SOC_SINGLE("TX4 HPF Switch", TABLA_A_CDC_TX4_MUX_CTL, 3, 1, 0),
564 SOC_SINGLE("TX5 HPF Switch", TABLA_A_CDC_TX5_MUX_CTL, 3, 1, 0),
565 SOC_SINGLE("TX6 HPF Switch", TABLA_A_CDC_TX6_MUX_CTL, 3, 1, 0),
566 SOC_SINGLE("TX7 HPF Switch", TABLA_A_CDC_TX7_MUX_CTL, 3, 1, 0),
567 SOC_SINGLE("TX8 HPF Switch", TABLA_A_CDC_TX8_MUX_CTL, 3, 1, 0),
568 SOC_SINGLE("TX9 HPF Switch", TABLA_A_CDC_TX9_MUX_CTL, 3, 1, 0),
569 SOC_SINGLE("TX10 HPF Switch", TABLA_A_CDC_TX10_MUX_CTL, 3, 1, 0),
570
571 SOC_SINGLE("RX1 HPF Switch", TABLA_A_CDC_RX1_B5_CTL, 2, 1, 0),
572 SOC_SINGLE("RX2 HPF Switch", TABLA_A_CDC_RX2_B5_CTL, 2, 1, 0),
573 SOC_SINGLE("RX3 HPF Switch", TABLA_A_CDC_RX3_B5_CTL, 2, 1, 0),
574 SOC_SINGLE("RX4 HPF Switch", TABLA_A_CDC_RX4_B5_CTL, 2, 1, 0),
575 SOC_SINGLE("RX5 HPF Switch", TABLA_A_CDC_RX5_B5_CTL, 2, 1, 0),
576 SOC_SINGLE("RX6 HPF Switch", TABLA_A_CDC_RX6_B5_CTL, 2, 1, 0),
577 SOC_SINGLE("RX7 HPF Switch", TABLA_A_CDC_RX7_B5_CTL, 2, 1, 0),
578
579 SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
580 SOC_ENUM("RX2 HPF cut off", cf_rxmix2_enum),
581 SOC_ENUM("RX3 HPF cut off", cf_rxmix3_enum),
582 SOC_ENUM("RX4 HPF cut off", cf_rxmix4_enum),
583 SOC_ENUM("RX5 HPF cut off", cf_rxmix5_enum),
584 SOC_ENUM("RX6 HPF cut off", cf_rxmix6_enum),
585 SOC_ENUM("RX7 HPF cut off", cf_rxmix7_enum),
Ben Romberger1f045a72011-11-04 10:14:57 -0700586
587 SOC_SINGLE_EXT("IIR1 Enable Band1", IIR1, BAND1, 1, 0,
588 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
589 SOC_SINGLE_EXT("IIR1 Enable Band2", IIR1, BAND2, 1, 0,
590 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
591 SOC_SINGLE_EXT("IIR1 Enable Band3", IIR1, BAND3, 1, 0,
592 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
593 SOC_SINGLE_EXT("IIR1 Enable Band4", IIR1, BAND4, 1, 0,
594 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
595 SOC_SINGLE_EXT("IIR1 Enable Band5", IIR1, BAND5, 1, 0,
596 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
597 SOC_SINGLE_EXT("IIR2 Enable Band1", IIR2, BAND1, 1, 0,
598 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
599 SOC_SINGLE_EXT("IIR2 Enable Band2", IIR2, BAND2, 1, 0,
600 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
601 SOC_SINGLE_EXT("IIR2 Enable Band3", IIR2, BAND3, 1, 0,
602 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
603 SOC_SINGLE_EXT("IIR2 Enable Band4", IIR2, BAND4, 1, 0,
604 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
605 SOC_SINGLE_EXT("IIR2 Enable Band5", IIR2, BAND5, 1, 0,
606 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
607
608 SOC_SINGLE_MULTI_EXT("IIR1 Band1", IIR1, BAND1, 255, 0, 5,
609 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
610 SOC_SINGLE_MULTI_EXT("IIR1 Band2", IIR1, BAND2, 255, 0, 5,
611 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
612 SOC_SINGLE_MULTI_EXT("IIR1 Band3", IIR1, BAND3, 255, 0, 5,
613 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
614 SOC_SINGLE_MULTI_EXT("IIR1 Band4", IIR1, BAND4, 255, 0, 5,
615 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
616 SOC_SINGLE_MULTI_EXT("IIR1 Band5", IIR1, BAND5, 255, 0, 5,
617 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
618 SOC_SINGLE_MULTI_EXT("IIR2 Band1", IIR2, BAND1, 255, 0, 5,
619 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
620 SOC_SINGLE_MULTI_EXT("IIR2 Band2", IIR2, BAND2, 255, 0, 5,
621 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
622 SOC_SINGLE_MULTI_EXT("IIR2 Band3", IIR2, BAND3, 255, 0, 5,
623 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
624 SOC_SINGLE_MULTI_EXT("IIR2 Band4", IIR2, BAND4, 255, 0, 5,
625 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
626 SOC_SINGLE_MULTI_EXT("IIR2 Band5", IIR2, BAND5, 255, 0, 5,
627 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700628};
629
630static const char *rx_mix1_text[] = {
631 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2", "RX1", "RX2", "RX3", "RX4",
632 "RX5", "RX6", "RX7"
633};
634
Kiran Kandi8b3a8302011-09-27 16:13:28 -0700635static const char *rx_dsm_text[] = {
636 "CIC_OUT", "DSM_INV"
637};
638
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700639static const char *sb_tx1_mux_text[] = {
640 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
641 "DEC1"
642};
643
644static const char *sb_tx5_mux_text[] = {
645 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
646 "DEC5"
647};
648
649static const char *sb_tx6_mux_text[] = {
650 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
651 "DEC6"
652};
653
654static const char const *sb_tx7_to_tx10_mux_text[] = {
655 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
656 "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
657 "DEC9", "DEC10"
658};
659
660static const char *dec1_mux_text[] = {
661 "ZERO", "DMIC1", "ADC6",
662};
663
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700664static const char *dec2_mux_text[] = {
665 "ZERO", "DMIC2", "ADC5",
666};
667
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700668static const char *dec3_mux_text[] = {
669 "ZERO", "DMIC3", "ADC4",
670};
671
672static const char *dec4_mux_text[] = {
673 "ZERO", "DMIC4", "ADC3",
674};
675
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700676static const char *dec5_mux_text[] = {
677 "ZERO", "DMIC5", "ADC2",
678};
679
680static const char *dec6_mux_text[] = {
681 "ZERO", "DMIC6", "ADC1",
682};
683
684static const char const *dec7_mux_text[] = {
685 "ZERO", "DMIC1", "DMIC6", "ADC1", "ADC6", "ANC1_FB", "ANC2_FB",
686};
687
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700688static const char *dec8_mux_text[] = {
689 "ZERO", "DMIC2", "DMIC5", "ADC2", "ADC5",
690};
691
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700692static const char *dec9_mux_text[] = {
693 "ZERO", "DMIC4", "DMIC5", "ADC2", "ADC3", "ADCMB", "ANC1_FB", "ANC2_FB",
694};
695
696static const char *dec10_mux_text[] = {
697 "ZERO", "DMIC3", "DMIC6", "ADC1", "ADC4", "ADCMB", "ANC1_FB", "ANC2_FB",
698};
699
Bradley Rubin229c6a52011-07-12 16:18:48 -0700700static const char const *anc_mux_text[] = {
701 "ZERO", "ADC1", "ADC2", "ADC3", "ADC4", "ADC5", "ADC6", "ADC_MB",
702 "RSVD_1", "DMIC1", "DMIC2", "DMIC3", "DMIC4", "DMIC5", "DMIC6"
703};
704
705static const char const *anc1_fb_mux_text[] = {
706 "ZERO", "EAR_HPH_L", "EAR_LINE_1",
707};
708
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700709static const char *iir1_inp1_text[] = {
710 "ZERO", "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
711 "DEC9", "DEC10", "RX1", "RX2", "RX3", "RX4", "RX5", "RX6", "RX7"
712};
713
714static const struct soc_enum rx_mix1_inp1_chain_enum =
715 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 0, 12, rx_mix1_text);
716
Bradley Rubin229c6a52011-07-12 16:18:48 -0700717static const struct soc_enum rx_mix1_inp2_chain_enum =
718 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 4, 12, rx_mix1_text);
719
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700720static const struct soc_enum rx2_mix1_inp1_chain_enum =
721 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 0, 12, rx_mix1_text);
722
Bradley Rubin229c6a52011-07-12 16:18:48 -0700723static const struct soc_enum rx2_mix1_inp2_chain_enum =
724 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 4, 12, rx_mix1_text);
725
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700726static const struct soc_enum rx3_mix1_inp1_chain_enum =
727 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 0, 12, rx_mix1_text);
728
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700729static const struct soc_enum rx3_mix1_inp2_chain_enum =
730 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 4, 12, rx_mix1_text);
731
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700732static const struct soc_enum rx4_mix1_inp1_chain_enum =
733 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 0, 12, rx_mix1_text);
734
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700735static const struct soc_enum rx4_mix1_inp2_chain_enum =
736 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 4, 12, rx_mix1_text);
737
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700738static const struct soc_enum rx5_mix1_inp1_chain_enum =
739 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 0, 12, rx_mix1_text);
740
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700741static const struct soc_enum rx5_mix1_inp2_chain_enum =
742 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 4, 12, rx_mix1_text);
743
744static const struct soc_enum rx6_mix1_inp1_chain_enum =
745 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 0, 12, rx_mix1_text);
746
747static const struct soc_enum rx6_mix1_inp2_chain_enum =
748 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 4, 12, rx_mix1_text);
749
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700750static const struct soc_enum rx7_mix1_inp1_chain_enum =
751 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 0, 12, rx_mix1_text);
752
753static const struct soc_enum rx7_mix1_inp2_chain_enum =
754 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 4, 12, rx_mix1_text);
755
Kiran Kandi8b3a8302011-09-27 16:13:28 -0700756static const struct soc_enum rx4_dsm_enum =
757 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B6_CTL, 4, 2, rx_dsm_text);
758
759static const struct soc_enum rx6_dsm_enum =
760 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B6_CTL, 4, 2, rx_dsm_text);
761
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700762static const struct soc_enum sb_tx5_mux_enum =
763 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0, 9, sb_tx5_mux_text);
764
765static const struct soc_enum sb_tx6_mux_enum =
766 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0, 9, sb_tx6_mux_text);
767
768static const struct soc_enum sb_tx7_mux_enum =
769 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0, 18,
770 sb_tx7_to_tx10_mux_text);
771
772static const struct soc_enum sb_tx8_mux_enum =
773 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0, 18,
774 sb_tx7_to_tx10_mux_text);
775
776static const struct soc_enum sb_tx1_mux_enum =
777 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0, 9, sb_tx1_mux_text);
778
779static const struct soc_enum dec1_mux_enum =
780 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 0, 3, dec1_mux_text);
781
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700782static const struct soc_enum dec2_mux_enum =
783 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 2, 3, dec2_mux_text);
784
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700785static const struct soc_enum dec3_mux_enum =
786 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 4, 3, dec3_mux_text);
787
788static const struct soc_enum dec4_mux_enum =
789 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 6, 3, dec4_mux_text);
790
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700791static const struct soc_enum dec5_mux_enum =
792 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 0, 3, dec5_mux_text);
793
794static const struct soc_enum dec6_mux_enum =
795 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 2, 3, dec6_mux_text);
796
797static const struct soc_enum dec7_mux_enum =
798 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 4, 7, dec7_mux_text);
799
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700800static const struct soc_enum dec8_mux_enum =
801 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 0, 7, dec8_mux_text);
802
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700803static const struct soc_enum dec9_mux_enum =
804 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 3, 8, dec9_mux_text);
805
806static const struct soc_enum dec10_mux_enum =
807 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B4_CTL, 0, 8, dec10_mux_text);
808
Bradley Rubin229c6a52011-07-12 16:18:48 -0700809static const struct soc_enum anc1_mux_enum =
810 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 0, 16, anc_mux_text);
811
812static const struct soc_enum anc2_mux_enum =
813 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 4, 16, anc_mux_text);
814
815static const struct soc_enum anc1_fb_mux_enum =
816 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B2_CTL, 0, 3, anc1_fb_mux_text);
817
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700818static const struct soc_enum iir1_inp1_mux_enum =
819 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_EQ1_B1_CTL, 0, 18, iir1_inp1_text);
820
821static const struct snd_kcontrol_new rx_mix1_inp1_mux =
822 SOC_DAPM_ENUM("RX1 MIX1 INP1 Mux", rx_mix1_inp1_chain_enum);
823
Bradley Rubin229c6a52011-07-12 16:18:48 -0700824static const struct snd_kcontrol_new rx_mix1_inp2_mux =
825 SOC_DAPM_ENUM("RX1 MIX1 INP2 Mux", rx_mix1_inp2_chain_enum);
826
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700827static const struct snd_kcontrol_new rx2_mix1_inp1_mux =
828 SOC_DAPM_ENUM("RX2 MIX1 INP1 Mux", rx2_mix1_inp1_chain_enum);
829
Bradley Rubin229c6a52011-07-12 16:18:48 -0700830static const struct snd_kcontrol_new rx2_mix1_inp2_mux =
831 SOC_DAPM_ENUM("RX2 MIX1 INP2 Mux", rx2_mix1_inp2_chain_enum);
832
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700833static const struct snd_kcontrol_new rx3_mix1_inp1_mux =
834 SOC_DAPM_ENUM("RX3 MIX1 INP1 Mux", rx3_mix1_inp1_chain_enum);
835
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700836static const struct snd_kcontrol_new rx3_mix1_inp2_mux =
837 SOC_DAPM_ENUM("RX3 MIX1 INP2 Mux", rx3_mix1_inp2_chain_enum);
838
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700839static const struct snd_kcontrol_new rx4_mix1_inp1_mux =
840 SOC_DAPM_ENUM("RX4 MIX1 INP1 Mux", rx4_mix1_inp1_chain_enum);
841
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700842static const struct snd_kcontrol_new rx4_mix1_inp2_mux =
843 SOC_DAPM_ENUM("RX4 MIX1 INP2 Mux", rx4_mix1_inp2_chain_enum);
844
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700845static const struct snd_kcontrol_new rx5_mix1_inp1_mux =
846 SOC_DAPM_ENUM("RX5 MIX1 INP1 Mux", rx5_mix1_inp1_chain_enum);
847
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700848static const struct snd_kcontrol_new rx5_mix1_inp2_mux =
849 SOC_DAPM_ENUM("RX5 MIX1 INP2 Mux", rx5_mix1_inp2_chain_enum);
850
851static const struct snd_kcontrol_new rx6_mix1_inp1_mux =
852 SOC_DAPM_ENUM("RX6 MIX1 INP1 Mux", rx6_mix1_inp1_chain_enum);
853
854static const struct snd_kcontrol_new rx6_mix1_inp2_mux =
855 SOC_DAPM_ENUM("RX6 MIX1 INP2 Mux", rx6_mix1_inp2_chain_enum);
856
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700857static const struct snd_kcontrol_new rx7_mix1_inp1_mux =
858 SOC_DAPM_ENUM("RX7 MIX1 INP1 Mux", rx7_mix1_inp1_chain_enum);
859
860static const struct snd_kcontrol_new rx7_mix1_inp2_mux =
861 SOC_DAPM_ENUM("RX7 MIX1 INP2 Mux", rx7_mix1_inp2_chain_enum);
862
Kiran Kandi8b3a8302011-09-27 16:13:28 -0700863static const struct snd_kcontrol_new rx4_dsm_mux =
864 SOC_DAPM_ENUM("RX4 DSM MUX Mux", rx4_dsm_enum);
865
866static const struct snd_kcontrol_new rx6_dsm_mux =
867 SOC_DAPM_ENUM("RX6 DSM MUX Mux", rx6_dsm_enum);
868
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700869static const struct snd_kcontrol_new sb_tx5_mux =
870 SOC_DAPM_ENUM("SLIM TX5 MUX Mux", sb_tx5_mux_enum);
871
872static const struct snd_kcontrol_new sb_tx6_mux =
873 SOC_DAPM_ENUM("SLIM TX6 MUX Mux", sb_tx6_mux_enum);
874
875static const struct snd_kcontrol_new sb_tx7_mux =
876 SOC_DAPM_ENUM("SLIM TX7 MUX Mux", sb_tx7_mux_enum);
877
878static const struct snd_kcontrol_new sb_tx8_mux =
879 SOC_DAPM_ENUM("SLIM TX8 MUX Mux", sb_tx8_mux_enum);
880
881static const struct snd_kcontrol_new sb_tx1_mux =
882 SOC_DAPM_ENUM("SLIM TX1 MUX Mux", sb_tx1_mux_enum);
883
884static const struct snd_kcontrol_new dec1_mux =
885 SOC_DAPM_ENUM("DEC1 MUX Mux", dec1_mux_enum);
886
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700887static const struct snd_kcontrol_new dec2_mux =
888 SOC_DAPM_ENUM("DEC2 MUX Mux", dec2_mux_enum);
889
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700890static const struct snd_kcontrol_new dec3_mux =
891 SOC_DAPM_ENUM("DEC3 MUX Mux", dec3_mux_enum);
892
893static const struct snd_kcontrol_new dec4_mux =
894 SOC_DAPM_ENUM("DEC4 MUX Mux", dec4_mux_enum);
895
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700896static const struct snd_kcontrol_new dec5_mux =
897 SOC_DAPM_ENUM("DEC5 MUX Mux", dec5_mux_enum);
898
899static const struct snd_kcontrol_new dec6_mux =
900 SOC_DAPM_ENUM("DEC6 MUX Mux", dec6_mux_enum);
901
902static const struct snd_kcontrol_new dec7_mux =
903 SOC_DAPM_ENUM("DEC7 MUX Mux", dec7_mux_enum);
904
Bradley Rubin229c6a52011-07-12 16:18:48 -0700905static const struct snd_kcontrol_new anc1_mux =
906 SOC_DAPM_ENUM("ANC1 MUX Mux", anc1_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700907static const struct snd_kcontrol_new dec8_mux =
908 SOC_DAPM_ENUM("DEC8 MUX Mux", dec8_mux_enum);
909
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700910static const struct snd_kcontrol_new dec9_mux =
911 SOC_DAPM_ENUM("DEC9 MUX Mux", dec9_mux_enum);
912
913static const struct snd_kcontrol_new dec10_mux =
914 SOC_DAPM_ENUM("DEC10 MUX Mux", dec10_mux_enum);
915
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700916static const struct snd_kcontrol_new iir1_inp1_mux =
917 SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);
918
Bradley Rubin229c6a52011-07-12 16:18:48 -0700919static const struct snd_kcontrol_new anc2_mux =
920 SOC_DAPM_ENUM("ANC2 MUX Mux", anc2_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700921
Bradley Rubin229c6a52011-07-12 16:18:48 -0700922static const struct snd_kcontrol_new anc1_fb_mux =
923 SOC_DAPM_ENUM("ANC1 FB MUX Mux", anc1_fb_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700924
Bradley Rubin229c6a52011-07-12 16:18:48 -0700925static const struct snd_kcontrol_new dac1_switch[] = {
926 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_EAR_EN, 5, 1, 0)
927};
928static const struct snd_kcontrol_new hphl_switch[] = {
929 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_HPH_L_DAC_CTL, 6, 1, 0)
930};
Kiran Kandi8b3a8302011-09-27 16:13:28 -0700931
932static const struct snd_kcontrol_new lineout3_ground_switch =
933 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_3_DAC_CTL, 6, 1, 0);
934
935static const struct snd_kcontrol_new lineout4_ground_switch =
936 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_4_DAC_CTL, 6, 1, 0);
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700937
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700938static void tabla_codec_enable_adc_block(struct snd_soc_codec *codec,
939 int enable)
940{
941 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
942
943 pr_debug("%s %d\n", __func__, enable);
944
945 if (enable) {
946 tabla->adc_count++;
947 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0xE0);
948 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x2, 0x2);
949 } else {
950 tabla->adc_count--;
951 if (!tabla->adc_count) {
952 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL,
953 0x2, 0x0);
954 if (!tabla->mbhc_polling_active)
955 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS,
956 0xE0, 0x0);
957 }
958 }
959}
960
961static int tabla_codec_enable_adc(struct snd_soc_dapm_widget *w,
962 struct snd_kcontrol *kcontrol, int event)
963{
964 struct snd_soc_codec *codec = w->codec;
965 u16 adc_reg;
966
967 pr_debug("%s %d\n", __func__, event);
968
969 if (w->reg == TABLA_A_TX_1_2_EN)
970 adc_reg = TABLA_A_TX_1_2_TEST_CTL;
971 else if (w->reg == TABLA_A_TX_3_4_EN)
972 adc_reg = TABLA_A_TX_3_4_TEST_CTL;
973 else if (w->reg == TABLA_A_TX_5_6_EN)
974 adc_reg = TABLA_A_TX_5_6_TEST_CTL;
975 else {
976 pr_err("%s: Error, invalid adc register\n", __func__);
977 return -EINVAL;
978 }
979
980 switch (event) {
981 case SND_SOC_DAPM_PRE_PMU:
982 tabla_codec_enable_adc_block(codec, 1);
983 break;
984 case SND_SOC_DAPM_POST_PMU:
985 snd_soc_update_bits(codec, adc_reg, 1 << w->shift,
986 1 << w->shift);
987 usleep_range(1000, 1000);
988 snd_soc_update_bits(codec, adc_reg, 1 << w->shift, 0x00);
989 usleep_range(1000, 1000);
990 break;
991 case SND_SOC_DAPM_POST_PMD:
992 tabla_codec_enable_adc_block(codec, 0);
993 break;
994 }
995 return 0;
996}
997
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700998static int tabla_codec_enable_lineout(struct snd_soc_dapm_widget *w,
999 struct snd_kcontrol *kcontrol, int event)
1000{
1001 struct snd_soc_codec *codec = w->codec;
1002 u16 lineout_gain_reg;
1003
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001004 pr_debug("%s %d %s\n", __func__, event, w->name);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001005
1006 switch (w->shift) {
1007 case 0:
1008 lineout_gain_reg = TABLA_A_RX_LINE_1_GAIN;
1009 break;
1010 case 1:
1011 lineout_gain_reg = TABLA_A_RX_LINE_2_GAIN;
1012 break;
1013 case 2:
1014 lineout_gain_reg = TABLA_A_RX_LINE_3_GAIN;
1015 break;
1016 case 3:
1017 lineout_gain_reg = TABLA_A_RX_LINE_4_GAIN;
1018 break;
1019 case 4:
1020 lineout_gain_reg = TABLA_A_RX_LINE_5_GAIN;
1021 break;
1022 default:
1023 pr_err("%s: Error, incorrect lineout register value\n",
1024 __func__);
1025 return -EINVAL;
1026 }
1027
1028 switch (event) {
1029 case SND_SOC_DAPM_PRE_PMU:
1030 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x40);
1031 break;
1032 case SND_SOC_DAPM_POST_PMU:
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001033 pr_debug("%s: sleeping 40 ms after %s PA turn on\n",
1034 __func__, w->name);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001035 usleep_range(40000, 40000);
1036 break;
1037 case SND_SOC_DAPM_POST_PMD:
1038 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x00);
1039 break;
1040 }
1041 return 0;
1042}
1043
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001044
1045static int tabla_codec_enable_dmic(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001046 struct snd_kcontrol *kcontrol, int event)
1047{
1048 struct snd_soc_codec *codec = w->codec;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001049 u16 tx_mux_ctl_reg, tx_dmic_ctl_reg;
1050 u8 dmic_clk_sel, dmic_clk_en;
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07001051 unsigned int dmic;
1052 int ret;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001053
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07001054 ret = kstrtouint(strpbrk(w->name, "123456"), 10, &dmic);
1055 if (ret < 0) {
1056 pr_err("%s: Invalid DMIC line on the codec\n", __func__);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001057 return -EINVAL;
1058 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001059
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07001060 switch (dmic) {
1061 case 1:
1062 case 2:
1063 dmic_clk_sel = 0x02;
1064 dmic_clk_en = 0x01;
1065 break;
1066
1067 case 3:
1068 case 4:
1069 dmic_clk_sel = 0x08;
1070 dmic_clk_en = 0x04;
1071 break;
1072
1073 case 5:
1074 case 6:
1075 dmic_clk_sel = 0x20;
1076 dmic_clk_en = 0x10;
1077 break;
1078
1079 default:
1080 pr_err("%s: Invalid DMIC Selection\n", __func__);
1081 return -EINVAL;
1082 }
1083
1084 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (dmic - 1);
1085 tx_dmic_ctl_reg = TABLA_A_CDC_TX1_DMIC_CTL + 8 * (dmic - 1);
1086
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001087 pr_debug("%s %d\n", __func__, event);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001088
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001089 switch (event) {
1090 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001091 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x1, 0x1);
1092
1093 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
1094 dmic_clk_sel, dmic_clk_sel);
1095
1096 snd_soc_update_bits(codec, tx_dmic_ctl_reg, 0x1, 0x1);
1097
1098 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
1099 dmic_clk_en, dmic_clk_en);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001100 break;
1101 case SND_SOC_DAPM_POST_PMD:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001102 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
1103 dmic_clk_en, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001104 break;
1105 }
1106 return 0;
1107}
1108
Bradley Rubin229c6a52011-07-12 16:18:48 -07001109static int tabla_codec_enable_anc(struct snd_soc_dapm_widget *w,
1110 struct snd_kcontrol *kcontrol, int event)
1111{
1112 struct snd_soc_codec *codec = w->codec;
1113 const char *filename;
1114 const struct firmware *fw;
1115 int i;
1116 int ret;
Bradley Rubina7096d02011-08-03 18:29:02 -07001117 int num_anc_slots;
1118 struct anc_header *anc_head;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001119 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubina7096d02011-08-03 18:29:02 -07001120 u32 anc_writes_size = 0;
1121 int anc_size_remaining;
1122 u32 *anc_ptr;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001123 u16 reg;
1124 u8 mask, val, old_val;
1125
1126 pr_debug("%s %d\n", __func__, event);
1127 switch (event) {
1128 case SND_SOC_DAPM_PRE_PMU:
1129
Bradley Rubin4283a4c2011-07-29 16:18:54 -07001130 filename = "wcd9310/wcd9310_anc.bin";
Bradley Rubin229c6a52011-07-12 16:18:48 -07001131
1132 ret = request_firmware(&fw, filename, codec->dev);
1133 if (ret != 0) {
1134 dev_err(codec->dev, "Failed to acquire ANC data: %d\n",
1135 ret);
1136 return -ENODEV;
1137 }
1138
Bradley Rubina7096d02011-08-03 18:29:02 -07001139 if (fw->size < sizeof(struct anc_header)) {
Bradley Rubin229c6a52011-07-12 16:18:48 -07001140 dev_err(codec->dev, "Not enough data\n");
1141 release_firmware(fw);
1142 return -ENOMEM;
1143 }
1144
1145 /* First number is the number of register writes */
Bradley Rubina7096d02011-08-03 18:29:02 -07001146 anc_head = (struct anc_header *)(fw->data);
1147 anc_ptr = (u32 *)((u32)fw->data + sizeof(struct anc_header));
1148 anc_size_remaining = fw->size - sizeof(struct anc_header);
1149 num_anc_slots = anc_head->num_anc_slots;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001150
Bradley Rubina7096d02011-08-03 18:29:02 -07001151 if (tabla->anc_slot >= num_anc_slots) {
1152 dev_err(codec->dev, "Invalid ANC slot selected\n");
1153 release_firmware(fw);
1154 return -EINVAL;
1155 }
1156
1157 for (i = 0; i < num_anc_slots; i++) {
1158
1159 if (anc_size_remaining < TABLA_PACKED_REG_SIZE) {
1160 dev_err(codec->dev, "Invalid register format\n");
1161 release_firmware(fw);
1162 return -EINVAL;
1163 }
1164 anc_writes_size = (u32)(*anc_ptr);
1165 anc_size_remaining -= sizeof(u32);
1166 anc_ptr += 1;
1167
1168 if (anc_writes_size * TABLA_PACKED_REG_SIZE
1169 > anc_size_remaining) {
1170 dev_err(codec->dev, "Invalid register format\n");
1171 release_firmware(fw);
1172 return -ENOMEM;
1173 }
1174
1175 if (tabla->anc_slot == i)
1176 break;
1177
1178 anc_size_remaining -= (anc_writes_size *
1179 TABLA_PACKED_REG_SIZE);
Bradley Rubin939ff3f2011-08-26 17:19:34 -07001180 anc_ptr += anc_writes_size;
Bradley Rubina7096d02011-08-03 18:29:02 -07001181 }
1182 if (i == num_anc_slots) {
1183 dev_err(codec->dev, "Selected ANC slot not present\n");
Bradley Rubin229c6a52011-07-12 16:18:48 -07001184 release_firmware(fw);
1185 return -ENOMEM;
1186 }
1187
Bradley Rubina7096d02011-08-03 18:29:02 -07001188 for (i = 0; i < anc_writes_size; i++) {
1189 TABLA_CODEC_UNPACK_ENTRY(anc_ptr[i], reg,
Bradley Rubin229c6a52011-07-12 16:18:48 -07001190 mask, val);
1191 old_val = snd_soc_read(codec, reg);
Bradley Rubin4283a4c2011-07-29 16:18:54 -07001192 snd_soc_write(codec, reg, (old_val & ~mask) |
1193 (val & mask));
Bradley Rubin229c6a52011-07-12 16:18:48 -07001194 }
1195 release_firmware(fw);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001196
1197 break;
1198 case SND_SOC_DAPM_POST_PMD:
1199 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_RESET_CTL, 0xFF);
1200 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_CLK_EN_CTL, 0);
1201 break;
1202 }
1203 return 0;
1204}
1205
1206
Bradley Rubincb3950a2011-08-18 13:07:26 -07001207static void tabla_codec_disable_button_presses(struct snd_soc_codec *codec)
1208{
1209 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL, 0x80);
1210 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL, 0x00);
1211}
1212
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001213static void tabla_codec_start_hs_polling(struct snd_soc_codec *codec)
1214{
Bradley Rubincb3950a2011-08-18 13:07:26 -07001215 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1216
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001217 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001218 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
Bradley Rubincb3950a2011-08-18 13:07:26 -07001219 if (!tabla->no_mic_headset_override) {
1220 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
1221 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
1222 } else {
1223 tabla_codec_disable_button_presses(codec);
1224 }
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001225 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
1226 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
1227 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
1228}
1229
1230static void tabla_codec_pause_hs_polling(struct snd_soc_codec *codec)
1231{
Bradley Rubincb3950a2011-08-18 13:07:26 -07001232 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1233
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001234 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
1235 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
Bradley Rubincb3950a2011-08-18 13:07:26 -07001236 if (!tabla->no_mic_headset_override) {
1237 tabla_disable_irq(codec->control_data,
1238 TABLA_IRQ_MBHC_POTENTIAL);
1239 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
1240 }
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001241}
1242
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08001243static void tabla_codec_switch_cfilt_mode(struct snd_soc_codec *codec,
1244 int mode)
1245{
1246 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1247 u8 reg_mode_val, cur_mode_val;
1248 bool mbhc_was_polling = false;
1249
1250 if (mode)
1251 reg_mode_val = TABLA_CFILT_FAST_MODE;
1252 else
1253 reg_mode_val = TABLA_CFILT_SLOW_MODE;
1254
1255 cur_mode_val = snd_soc_read(codec,
1256 tabla->mbhc_bias_regs.cfilt_ctl) & 0x40;
1257
1258 if (cur_mode_val != reg_mode_val) {
1259 if (tabla->mbhc_polling_active) {
1260 tabla_codec_pause_hs_polling(codec);
1261 mbhc_was_polling = true;
1262 }
1263 snd_soc_update_bits(codec,
1264 tabla->mbhc_bias_regs.cfilt_ctl, 0x40, reg_mode_val);
1265 if (mbhc_was_polling)
1266 tabla_codec_start_hs_polling(codec);
1267 pr_debug("%s: CFILT mode change (%x to %x)\n", __func__,
1268 cur_mode_val, reg_mode_val);
1269 } else {
1270 pr_debug("%s: CFILT Value is already %x\n",
1271 __func__, cur_mode_val);
1272 }
1273}
1274
1275static void tabla_codec_update_cfilt_usage(struct snd_soc_codec *codec,
1276 u8 cfilt_sel, int inc)
1277{
1278 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1279 u32 *cfilt_cnt_ptr = NULL;
1280 u16 micb_cfilt_reg;
1281
1282 switch (cfilt_sel) {
1283 case TABLA_CFILT1_SEL:
1284 cfilt_cnt_ptr = &tabla->cfilt1_cnt;
1285 micb_cfilt_reg = TABLA_A_MICB_CFILT_1_CTL;
1286 break;
1287 case TABLA_CFILT2_SEL:
1288 cfilt_cnt_ptr = &tabla->cfilt2_cnt;
1289 micb_cfilt_reg = TABLA_A_MICB_CFILT_2_CTL;
1290 break;
1291 case TABLA_CFILT3_SEL:
1292 cfilt_cnt_ptr = &tabla->cfilt3_cnt;
1293 micb_cfilt_reg = TABLA_A_MICB_CFILT_3_CTL;
1294 break;
1295 default:
1296 return; /* should not happen */
1297 }
1298
1299 if (inc) {
1300 if (!(*cfilt_cnt_ptr)++) {
1301 /* Switch CFILT to slow mode if MBHC CFILT being used */
1302 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
1303 tabla_codec_switch_cfilt_mode(codec, 0);
1304
1305 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0x80);
1306 }
1307 } else {
1308 /* check if count not zero, decrement
1309 * then check if zero, go ahead disable cfilter
1310 */
1311 if ((*cfilt_cnt_ptr) && !--(*cfilt_cnt_ptr)) {
1312 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0);
1313
1314 /* Switch CFILT to fast mode if MBHC CFILT being used */
1315 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
1316 tabla_codec_switch_cfilt_mode(codec, 1);
1317 }
1318 }
1319}
1320
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001321static int tabla_find_k_value(unsigned int ldoh_v, unsigned int cfilt_mv)
1322{
1323 int rc = -EINVAL;
1324 unsigned min_mv, max_mv;
1325
1326 switch (ldoh_v) {
1327 case TABLA_LDOH_1P95_V:
1328 min_mv = 160;
1329 max_mv = 1800;
1330 break;
1331 case TABLA_LDOH_2P35_V:
1332 min_mv = 200;
1333 max_mv = 2200;
1334 break;
1335 case TABLA_LDOH_2P75_V:
1336 min_mv = 240;
1337 max_mv = 2600;
1338 break;
1339 case TABLA_LDOH_2P85_V:
1340 min_mv = 250;
1341 max_mv = 2700;
1342 break;
1343 default:
1344 goto done;
1345 }
1346
1347 if (cfilt_mv < min_mv || cfilt_mv > max_mv)
1348 goto done;
1349
1350 for (rc = 4; rc <= 44; rc++) {
1351 min_mv = max_mv * (rc) / 44;
1352 if (min_mv >= cfilt_mv) {
1353 rc -= 4;
1354 break;
1355 }
1356 }
1357done:
1358 return rc;
1359}
1360
1361static bool tabla_is_hph_pa_on(struct snd_soc_codec *codec)
1362{
1363 u8 hph_reg_val = 0;
1364 hph_reg_val = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_EN);
1365
1366 return (hph_reg_val & 0x30) ? true : false;
1367}
1368
Joonwoo Parka9444452011-12-08 18:48:27 -08001369static bool tabla_is_hph_dac_on(struct snd_soc_codec *codec, int left)
1370{
1371 u8 hph_reg_val = 0;
1372 if (left)
1373 hph_reg_val = snd_soc_read(codec,
1374 TABLA_A_RX_HPH_L_DAC_CTL);
1375 else
1376 hph_reg_val = snd_soc_read(codec,
1377 TABLA_A_RX_HPH_R_DAC_CTL);
1378
1379 return (hph_reg_val & 0xC0) ? true : false;
1380}
1381
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001382static void tabla_codec_switch_micbias(struct snd_soc_codec *codec,
1383 int vddio_switch)
1384{
1385 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1386 int cfilt_k_val;
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001387 bool mbhc_was_polling = false;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001388
1389 switch (vddio_switch) {
1390 case 1:
1391 if (tabla->mbhc_polling_active) {
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001392
1393 tabla_codec_pause_hs_polling(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001394 /* Enable Mic Bias switch to VDDIO */
1395 tabla->cfilt_k_value = snd_soc_read(codec,
1396 tabla->mbhc_bias_regs.cfilt_val);
1397 cfilt_k_val = tabla_find_k_value(
1398 tabla->pdata->micbias.ldoh_v, 1800);
1399 snd_soc_update_bits(codec,
1400 tabla->mbhc_bias_regs.cfilt_val,
1401 0xFC, (cfilt_k_val << 2));
1402
1403 snd_soc_update_bits(codec,
1404 tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x80);
1405 snd_soc_update_bits(codec,
1406 tabla->mbhc_bias_regs.mbhc_reg, 0x10, 0x00);
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001407 tabla_codec_start_hs_polling(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001408
1409 tabla->mbhc_micbias_switched = true;
1410 pr_debug("%s: Enabled MBHC Mic bias to VDDIO Switch\n",
1411 __func__);
1412 }
1413 break;
1414
1415 case 0:
1416 if (tabla->mbhc_micbias_switched) {
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001417 if (tabla->mbhc_polling_active) {
1418 tabla_codec_pause_hs_polling(codec);
1419 mbhc_was_polling = true;
1420 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001421 /* Disable Mic Bias switch to VDDIO */
1422 if (tabla->cfilt_k_value != 0)
1423 snd_soc_update_bits(codec,
1424 tabla->mbhc_bias_regs.cfilt_val, 0XFC,
1425 tabla->cfilt_k_value);
1426 snd_soc_update_bits(codec,
1427 tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
1428 snd_soc_update_bits(codec,
1429 tabla->mbhc_bias_regs.mbhc_reg, 0x10, 0x00);
1430
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001431 if (mbhc_was_polling)
1432 tabla_codec_start_hs_polling(codec);
1433
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001434 tabla->mbhc_micbias_switched = false;
1435 pr_debug("%s: Disabled MBHC Mic bias to VDDIO Switch\n",
1436 __func__);
1437 }
1438 break;
1439 }
1440}
1441
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001442static int tabla_codec_enable_micbias(struct snd_soc_dapm_widget *w,
1443 struct snd_kcontrol *kcontrol, int event)
1444{
1445 struct snd_soc_codec *codec = w->codec;
Patrick Lai3043fba2011-08-01 14:15:57 -07001446 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1447 u16 micb_int_reg;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001448 int micb_line;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001449 u8 cfilt_sel_val = 0;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001450 char *internal1_text = "Internal1";
1451 char *internal2_text = "Internal2";
1452 char *internal3_text = "Internal3";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001453
1454 pr_debug("%s %d\n", __func__, event);
1455 switch (w->reg) {
1456 case TABLA_A_MICB_1_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001457 micb_int_reg = TABLA_A_MICB_1_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001458 cfilt_sel_val = tabla->pdata->micbias.bias1_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001459 micb_line = TABLA_MICBIAS1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001460 break;
1461 case TABLA_A_MICB_2_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001462 micb_int_reg = TABLA_A_MICB_2_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001463 cfilt_sel_val = tabla->pdata->micbias.bias2_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001464 micb_line = TABLA_MICBIAS2;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001465 break;
1466 case TABLA_A_MICB_3_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001467 micb_int_reg = TABLA_A_MICB_3_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001468 cfilt_sel_val = tabla->pdata->micbias.bias3_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001469 micb_line = TABLA_MICBIAS3;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001470 break;
1471 case TABLA_A_MICB_4_CTL:
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001472 micb_int_reg = TABLA_A_MICB_4_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001473 cfilt_sel_val = tabla->pdata->micbias.bias4_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001474 micb_line = TABLA_MICBIAS4;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001475 break;
1476 default:
1477 pr_err("%s: Error, invalid micbias register\n", __func__);
1478 return -EINVAL;
1479 }
1480
1481 switch (event) {
1482 case SND_SOC_DAPM_PRE_PMU:
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001483 /* Decide whether to switch the micbias for MBHC */
1484 if ((w->reg == tabla->mbhc_bias_regs.ctl_reg)
1485 && tabla->mbhc_micbias_switched)
1486 tabla_codec_switch_micbias(codec, 0);
1487
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001488 snd_soc_update_bits(codec, w->reg, 0x0E, 0x0A);
Patrick Lai3043fba2011-08-01 14:15:57 -07001489 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 1);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001490
1491 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001492 snd_soc_update_bits(codec, micb_int_reg, 0xE0, 0xE0);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001493 else if (strnstr(w->name, internal2_text, 30))
1494 snd_soc_update_bits(codec, micb_int_reg, 0x1C, 0x1C);
1495 else if (strnstr(w->name, internal3_text, 30))
1496 snd_soc_update_bits(codec, micb_int_reg, 0x3, 0x3);
1497
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001498 break;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001499 case SND_SOC_DAPM_POST_PMU:
1500 if (tabla->mbhc_polling_active &&
1501 (tabla->calibration->bias == micb_line)) {
1502 tabla_codec_pause_hs_polling(codec);
1503 tabla_codec_start_hs_polling(codec);
1504 }
1505 break;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001506
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001507 case SND_SOC_DAPM_POST_PMD:
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001508
1509 if ((w->reg == tabla->mbhc_bias_regs.ctl_reg)
1510 && tabla_is_hph_pa_on(codec))
1511 tabla_codec_switch_micbias(codec, 1);
1512
Bradley Rubin229c6a52011-07-12 16:18:48 -07001513 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001514 snd_soc_update_bits(codec, micb_int_reg, 0x80, 0x00);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001515 else if (strnstr(w->name, internal2_text, 30))
1516 snd_soc_update_bits(codec, micb_int_reg, 0x10, 0x00);
1517 else if (strnstr(w->name, internal3_text, 30))
1518 snd_soc_update_bits(codec, micb_int_reg, 0x2, 0x0);
1519
Patrick Lai3043fba2011-08-01 14:15:57 -07001520 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001521 break;
1522 }
1523
1524 return 0;
1525}
1526
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001527static int tabla_codec_enable_dec(struct snd_soc_dapm_widget *w,
1528 struct snd_kcontrol *kcontrol, int event)
1529{
1530 struct snd_soc_codec *codec = w->codec;
1531 u16 dec_reset_reg;
1532
1533 pr_debug("%s %d\n", __func__, event);
1534
1535 if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL)
1536 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B1_CTL;
1537 else if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL)
1538 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B2_CTL;
1539 else {
1540 pr_err("%s: Error, incorrect dec\n", __func__);
1541 return -EINVAL;
1542 }
1543
1544 switch (event) {
1545 case SND_SOC_DAPM_PRE_PMU:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001546 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift,
1547 1 << w->shift);
1548 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift, 0x0);
1549 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001550 }
1551 return 0;
1552}
1553
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001554static int tabla_codec_reset_interpolator(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001555 struct snd_kcontrol *kcontrol, int event)
1556{
1557 struct snd_soc_codec *codec = w->codec;
1558
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001559 pr_debug("%s %d %s\n", __func__, event, w->name);
1560
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001561 switch (event) {
1562 case SND_SOC_DAPM_PRE_PMU:
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001563 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
1564 1 << w->shift, 1 << w->shift);
1565 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
1566 1 << w->shift, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001567 break;
1568 }
1569 return 0;
1570}
1571
Bradley Rubin229c6a52011-07-12 16:18:48 -07001572static int tabla_codec_enable_ldo_h(struct snd_soc_dapm_widget *w,
1573 struct snd_kcontrol *kcontrol, int event)
1574{
1575 switch (event) {
1576 case SND_SOC_DAPM_POST_PMU:
1577 case SND_SOC_DAPM_POST_PMD:
1578 usleep_range(1000, 1000);
1579 break;
1580 }
1581 return 0;
1582}
1583
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07001584
1585static void tabla_enable_rx_bias(struct snd_soc_codec *codec, u32 enable)
1586{
1587 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1588
1589 if (enable) {
1590 tabla->rx_bias_count++;
1591 if (tabla->rx_bias_count == 1)
1592 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1593 0x80, 0x80);
1594 } else {
1595 tabla->rx_bias_count--;
1596 if (!tabla->rx_bias_count)
1597 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1598 0x80, 0x00);
1599 }
1600}
1601
1602static int tabla_codec_enable_rx_bias(struct snd_soc_dapm_widget *w,
1603 struct snd_kcontrol *kcontrol, int event)
1604{
1605 struct snd_soc_codec *codec = w->codec;
1606
1607 pr_debug("%s %d\n", __func__, event);
1608
1609 switch (event) {
1610 case SND_SOC_DAPM_PRE_PMU:
1611 tabla_enable_rx_bias(codec, 1);
1612 break;
1613 case SND_SOC_DAPM_POST_PMD:
1614 tabla_enable_rx_bias(codec, 0);
1615 break;
1616 }
1617 return 0;
1618}
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001619static int tabla_hphr_dac_event(struct snd_soc_dapm_widget *w,
1620 struct snd_kcontrol *kcontrol, int event)
1621{
1622 struct snd_soc_codec *codec = w->codec;
1623
1624 pr_debug("%s %s %d\n", __func__, w->name, event);
1625
1626 switch (event) {
1627 case SND_SOC_DAPM_PRE_PMU:
1628 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
1629 break;
1630 case SND_SOC_DAPM_POST_PMD:
1631 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
1632 break;
1633 }
1634 return 0;
1635}
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07001636
Joonwoo Park8b1f0982011-12-08 17:12:45 -08001637static void tabla_snd_soc_jack_report(struct tabla_priv *tabla,
1638 struct snd_soc_jack *jack, int status,
1639 int mask)
1640{
1641 /* XXX: wake_lock_timeout()? */
1642 snd_soc_jack_report(jack, status, mask);
1643}
1644
Patrick Lai49efeac2011-11-03 11:01:12 -07001645static void hphocp_off_report(struct tabla_priv *tabla,
1646 u32 jack_status, int irq)
1647{
1648 struct snd_soc_codec *codec;
1649
1650 if (tabla) {
1651 pr_info("%s: clear ocp status %x\n", __func__, jack_status);
1652 codec = tabla->codec;
1653 tabla->hph_status &= ~jack_status;
1654 if (tabla->headset_jack)
Joonwoo Park8b1f0982011-12-08 17:12:45 -08001655 tabla_snd_soc_jack_report(tabla, tabla->headset_jack,
1656 tabla->hph_status,
1657 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07001658 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
1659 0x00);
1660 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
1661 0x10);
1662 tabla_enable_irq(codec->control_data, irq);
1663 } else {
1664 pr_err("%s: Bad tabla private data\n", __func__);
1665 }
1666}
1667
1668static void hphlocp_off_report(struct work_struct *work)
1669{
1670 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
1671 hphlocp_work);
1672 hphocp_off_report(tabla, SND_JACK_OC_HPHL, TABLA_IRQ_HPH_PA_OCPL_FAULT);
1673}
1674
1675static void hphrocp_off_report(struct work_struct *work)
1676{
1677 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
1678 hphrocp_work);
1679 hphocp_off_report(tabla, SND_JACK_OC_HPHR, TABLA_IRQ_HPH_PA_OCPR_FAULT);
1680}
1681
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001682static int tabla_hph_pa_event(struct snd_soc_dapm_widget *w,
1683 struct snd_kcontrol *kcontrol, int event)
1684{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001685 struct snd_soc_codec *codec = w->codec;
1686 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1687 u8 mbhc_micb_ctl_val;
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001688 pr_debug("%s: event = %d\n", __func__, event);
1689
1690 switch (event) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001691 case SND_SOC_DAPM_PRE_PMU:
1692 mbhc_micb_ctl_val = snd_soc_read(codec,
1693 tabla->mbhc_bias_regs.ctl_reg);
1694
1695 if (!(mbhc_micb_ctl_val & 0x80)
1696 && !tabla->mbhc_micbias_switched)
1697 tabla_codec_switch_micbias(codec, 1);
1698
1699 break;
1700
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001701 case SND_SOC_DAPM_POST_PMD:
Patrick Lai49efeac2011-11-03 11:01:12 -07001702 /* schedule work is required because at the time HPH PA DAPM
1703 * event callback is called by DAPM framework, CODEC dapm mutex
1704 * would have been locked while snd_soc_jack_report also
1705 * attempts to acquire same lock.
1706 */
Joonwoo Parka9444452011-12-08 18:48:27 -08001707 if (w->shift == 5) {
1708 clear_bit(TABLA_HPHL_PA_OFF_ACK,
1709 &tabla->hph_pa_dac_state);
1710 clear_bit(TABLA_HPHL_DAC_OFF_ACK,
1711 &tabla->hph_pa_dac_state);
1712 if (tabla->hph_status & SND_JACK_OC_HPHL)
1713 schedule_work(&tabla->hphlocp_work);
1714 } else if (w->shift == 4) {
1715 clear_bit(TABLA_HPHR_PA_OFF_ACK,
1716 &tabla->hph_pa_dac_state);
1717 clear_bit(TABLA_HPHR_DAC_OFF_ACK,
1718 &tabla->hph_pa_dac_state);
1719 if (tabla->hph_status & SND_JACK_OC_HPHR)
1720 schedule_work(&tabla->hphrocp_work);
1721 }
1722
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001723 if (tabla->mbhc_micbias_switched)
1724 tabla_codec_switch_micbias(codec, 0);
1725
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001726 pr_debug("%s: sleep 10 ms after %s PA disable.\n", __func__,
1727 w->name);
1728 usleep_range(10000, 10000);
1729
1730 break;
1731 }
1732 return 0;
1733}
1734
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001735static void tabla_get_mbhc_micbias_regs(struct snd_soc_codec *codec,
1736 struct mbhc_micbias_regs *micbias_regs)
1737{
1738 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1739 struct tabla_mbhc_calibration *calibration = tabla->calibration;
1740 unsigned int cfilt;
1741
1742 switch (calibration->bias) {
1743 case TABLA_MICBIAS1:
1744 cfilt = tabla->pdata->micbias.bias1_cfilt_sel;
1745 micbias_regs->mbhc_reg = TABLA_A_MICB_1_MBHC;
1746 micbias_regs->int_rbias = TABLA_A_MICB_1_INT_RBIAS;
1747 micbias_regs->ctl_reg = TABLA_A_MICB_1_CTL;
1748 break;
1749 case TABLA_MICBIAS2:
1750 cfilt = tabla->pdata->micbias.bias2_cfilt_sel;
1751 micbias_regs->mbhc_reg = TABLA_A_MICB_2_MBHC;
1752 micbias_regs->int_rbias = TABLA_A_MICB_2_INT_RBIAS;
1753 micbias_regs->ctl_reg = TABLA_A_MICB_2_CTL;
1754 break;
1755 case TABLA_MICBIAS3:
1756 cfilt = tabla->pdata->micbias.bias3_cfilt_sel;
1757 micbias_regs->mbhc_reg = TABLA_A_MICB_3_MBHC;
1758 micbias_regs->int_rbias = TABLA_A_MICB_3_INT_RBIAS;
1759 micbias_regs->ctl_reg = TABLA_A_MICB_3_CTL;
1760 break;
1761 case TABLA_MICBIAS4:
1762 cfilt = tabla->pdata->micbias.bias4_cfilt_sel;
1763 micbias_regs->mbhc_reg = TABLA_A_MICB_4_MBHC;
1764 micbias_regs->int_rbias = TABLA_A_MICB_4_INT_RBIAS;
1765 micbias_regs->ctl_reg = TABLA_A_MICB_4_CTL;
1766 break;
1767 default:
1768 /* Should never reach here */
1769 pr_err("%s: Invalid MIC BIAS for MBHC\n", __func__);
Jordan Crouse239d8412011-11-23 11:47:02 -07001770 return;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001771 }
1772
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08001773 micbias_regs->cfilt_sel = cfilt;
1774
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001775 switch (cfilt) {
1776 case TABLA_CFILT1_SEL:
1777 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_1_VAL;
1778 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_1_CTL;
1779 break;
1780 case TABLA_CFILT2_SEL:
1781 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_2_VAL;
1782 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_2_CTL;
1783 break;
1784 case TABLA_CFILT3_SEL:
1785 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_3_VAL;
1786 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_3_CTL;
1787 break;
1788 }
1789}
Santosh Mardie15e2302011-11-15 10:39:23 +05301790static const struct snd_soc_dapm_widget tabla_dapm_i2s_widgets[] = {
1791 SND_SOC_DAPM_SUPPLY("RX_I2S_CLK", TABLA_A_CDC_CLK_RX_I2S_CTL,
1792 4, 0, NULL, 0),
1793 SND_SOC_DAPM_SUPPLY("TX_I2S_CLK", TABLA_A_CDC_CLK_TX_I2S_CTL, 4,
1794 0, NULL, 0),
1795};
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001796
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001797static int tabla_lineout_dac_event(struct snd_soc_dapm_widget *w,
1798 struct snd_kcontrol *kcontrol, int event)
1799{
1800 struct snd_soc_codec *codec = w->codec;
1801
1802 pr_debug("%s %s %d\n", __func__, w->name, event);
1803
1804 switch (event) {
1805 case SND_SOC_DAPM_PRE_PMU:
1806 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
1807 break;
1808
1809 case SND_SOC_DAPM_POST_PMD:
1810 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
1811 break;
1812 }
1813 return 0;
1814}
1815
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001816static const struct snd_soc_dapm_widget tabla_dapm_widgets[] = {
1817 /*RX stuff */
1818 SND_SOC_DAPM_OUTPUT("EAR"),
1819
Kiran Kandid2d86b52011-09-09 17:44:28 -07001820 SND_SOC_DAPM_PGA("EAR PA", TABLA_A_RX_EAR_EN, 4, 0, NULL, 0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001821
Bradley Rubin229c6a52011-07-12 16:18:48 -07001822 SND_SOC_DAPM_MIXER("DAC1", TABLA_A_RX_EAR_EN, 6, 0, dac1_switch,
1823 ARRAY_SIZE(dac1_switch)),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001824
Bradley Rubin229c6a52011-07-12 16:18:48 -07001825 SND_SOC_DAPM_AIF_IN("SLIM RX1", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1826 SND_SOC_DAPM_AIF_IN("SLIM RX2", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
Santosh Mardie15e2302011-11-15 10:39:23 +05301827 SND_SOC_DAPM_AIF_IN("SLIM RX3", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1828 SND_SOC_DAPM_AIF_IN("SLIM RX4", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001829
1830 /* Headphone */
1831 SND_SOC_DAPM_OUTPUT("HEADPHONE"),
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001832 SND_SOC_DAPM_PGA_E("HPHL", TABLA_A_RX_HPH_CNP_EN, 5, 0, NULL, 0,
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001833 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
1834 SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07001835 SND_SOC_DAPM_MIXER("HPHL DAC", TABLA_A_RX_HPH_L_DAC_CTL, 7, 0,
1836 hphl_switch, ARRAY_SIZE(hphl_switch)),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001837
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001838 SND_SOC_DAPM_PGA_E("HPHR", TABLA_A_RX_HPH_CNP_EN, 4, 0, NULL, 0,
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001839 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
1840 SND_SOC_DAPM_POST_PMD),
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001841
1842 SND_SOC_DAPM_DAC_E("HPHR DAC", NULL, TABLA_A_RX_HPH_R_DAC_CTL, 7, 0,
1843 tabla_hphr_dac_event,
1844 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001845
1846 /* Speaker */
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001847 SND_SOC_DAPM_OUTPUT("LINEOUT1"),
1848 SND_SOC_DAPM_OUTPUT("LINEOUT2"),
1849 SND_SOC_DAPM_OUTPUT("LINEOUT3"),
1850 SND_SOC_DAPM_OUTPUT("LINEOUT4"),
1851 SND_SOC_DAPM_OUTPUT("LINEOUT5"),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001852
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001853 SND_SOC_DAPM_PGA_E("LINEOUT1 PA", TABLA_A_RX_LINE_CNP_EN, 0, 0, NULL,
1854 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
1855 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1856 SND_SOC_DAPM_PGA_E("LINEOUT2 PA", TABLA_A_RX_LINE_CNP_EN, 1, 0, NULL,
1857 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
1858 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1859 SND_SOC_DAPM_PGA_E("LINEOUT3 PA", TABLA_A_RX_LINE_CNP_EN, 2, 0, NULL,
1860 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
1861 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1862 SND_SOC_DAPM_PGA_E("LINEOUT4 PA", TABLA_A_RX_LINE_CNP_EN, 3, 0, NULL,
1863 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
1864 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1865 SND_SOC_DAPM_PGA_E("LINEOUT5 PA", TABLA_A_RX_LINE_CNP_EN, 4, 0, NULL, 0,
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001866 tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
1867 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001868
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001869 SND_SOC_DAPM_DAC_E("LINEOUT1 DAC", NULL, TABLA_A_RX_LINE_1_DAC_CTL, 7, 0
1870 , tabla_lineout_dac_event,
1871 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1872 SND_SOC_DAPM_DAC_E("LINEOUT2 DAC", NULL, TABLA_A_RX_LINE_2_DAC_CTL, 7, 0
1873 , tabla_lineout_dac_event,
1874 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1875 SND_SOC_DAPM_DAC_E("LINEOUT3 DAC", NULL, TABLA_A_RX_LINE_3_DAC_CTL, 7, 0
1876 , tabla_lineout_dac_event,
1877 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1878 SND_SOC_DAPM_SWITCH("LINEOUT3 DAC GROUND", SND_SOC_NOPM, 0, 0,
1879 &lineout3_ground_switch),
1880 SND_SOC_DAPM_DAC_E("LINEOUT4 DAC", NULL, TABLA_A_RX_LINE_4_DAC_CTL, 7, 0
1881 , tabla_lineout_dac_event,
1882 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1883 SND_SOC_DAPM_SWITCH("LINEOUT4 DAC GROUND", SND_SOC_NOPM, 0, 0,
1884 &lineout4_ground_switch),
1885 SND_SOC_DAPM_DAC_E("LINEOUT5 DAC", NULL, TABLA_A_RX_LINE_5_DAC_CTL, 7, 0
1886 , tabla_lineout_dac_event,
1887 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001888
Bradley Rubin229c6a52011-07-12 16:18:48 -07001889 SND_SOC_DAPM_MIXER_E("RX1 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 0, 0, NULL,
1890 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
1891 SND_SOC_DAPM_MIXER_E("RX2 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 1, 0, NULL,
1892 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
1893 SND_SOC_DAPM_MIXER_E("RX3 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 2, 0, NULL,
1894 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
1895 SND_SOC_DAPM_MIXER_E("RX4 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0, NULL,
1896 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
1897 SND_SOC_DAPM_MIXER_E("RX5 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 4, 0, NULL,
1898 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
1899 SND_SOC_DAPM_MIXER_E("RX6 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0, NULL,
1900 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001901 SND_SOC_DAPM_MIXER_E("RX7 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 6, 0, NULL,
1902 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001903
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001904
1905 SND_SOC_DAPM_MUX_E("RX4 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0,
1906 &rx4_dsm_mux, tabla_codec_reset_interpolator,
1907 SND_SOC_DAPM_PRE_PMU),
1908
1909 SND_SOC_DAPM_MUX_E("RX6 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0,
1910 &rx6_dsm_mux, tabla_codec_reset_interpolator,
1911 SND_SOC_DAPM_PRE_PMU),
1912
Bradley Rubin229c6a52011-07-12 16:18:48 -07001913 SND_SOC_DAPM_MIXER("RX1 CHAIN", TABLA_A_CDC_RX1_B6_CTL, 5, 0, NULL, 0),
1914 SND_SOC_DAPM_MIXER("RX2 CHAIN", TABLA_A_CDC_RX2_B6_CTL, 5, 0, NULL, 0),
1915
1916 SND_SOC_DAPM_MUX("RX1 MIX1 INP1", SND_SOC_NOPM, 0, 0,
1917 &rx_mix1_inp1_mux),
1918 SND_SOC_DAPM_MUX("RX1 MIX1 INP2", SND_SOC_NOPM, 0, 0,
1919 &rx_mix1_inp2_mux),
1920 SND_SOC_DAPM_MUX("RX2 MIX1 INP1", SND_SOC_NOPM, 0, 0,
1921 &rx2_mix1_inp1_mux),
1922 SND_SOC_DAPM_MUX("RX2 MIX1 INP2", SND_SOC_NOPM, 0, 0,
1923 &rx2_mix1_inp2_mux),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001924 SND_SOC_DAPM_MUX("RX3 MIX1 INP1", SND_SOC_NOPM, 0, 0,
1925 &rx3_mix1_inp1_mux),
1926 SND_SOC_DAPM_MUX("RX3 MIX1 INP2", SND_SOC_NOPM, 0, 0,
1927 &rx3_mix1_inp2_mux),
1928 SND_SOC_DAPM_MUX("RX4 MIX1 INP1", SND_SOC_NOPM, 0, 0,
1929 &rx4_mix1_inp1_mux),
1930 SND_SOC_DAPM_MUX("RX4 MIX1 INP2", SND_SOC_NOPM, 0, 0,
1931 &rx4_mix1_inp2_mux),
1932 SND_SOC_DAPM_MUX("RX5 MIX1 INP1", SND_SOC_NOPM, 0, 0,
1933 &rx5_mix1_inp1_mux),
1934 SND_SOC_DAPM_MUX("RX5 MIX1 INP2", SND_SOC_NOPM, 0, 0,
1935 &rx5_mix1_inp2_mux),
1936 SND_SOC_DAPM_MUX("RX6 MIX1 INP1", SND_SOC_NOPM, 0, 0,
1937 &rx6_mix1_inp1_mux),
1938 SND_SOC_DAPM_MUX("RX6 MIX1 INP2", SND_SOC_NOPM, 0, 0,
1939 &rx6_mix1_inp2_mux),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001940 SND_SOC_DAPM_MUX("RX7 MIX1 INP1", SND_SOC_NOPM, 0, 0,
1941 &rx7_mix1_inp1_mux),
1942 SND_SOC_DAPM_MUX("RX7 MIX1 INP2", SND_SOC_NOPM, 0, 0,
1943 &rx7_mix1_inp2_mux),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001944
Bradley Rubin229c6a52011-07-12 16:18:48 -07001945 SND_SOC_DAPM_SUPPLY("CP", TABLA_A_CP_EN, 0, 0,
1946 tabla_codec_enable_charge_pump, SND_SOC_DAPM_POST_PMU |
1947 SND_SOC_DAPM_PRE_PMD),
1948
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07001949 SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
1950 tabla_codec_enable_rx_bias, SND_SOC_DAPM_PRE_PMU |
1951 SND_SOC_DAPM_POST_PMD),
1952
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001953 /* TX */
Bradley Rubin229c6a52011-07-12 16:18:48 -07001954
Bradley Rubine1d08622011-07-20 18:01:35 -07001955 SND_SOC_DAPM_SUPPLY("CDC_CONN", TABLA_A_CDC_CLK_OTHR_CTL, 2, 0, NULL,
1956 0),
1957
Bradley Rubin229c6a52011-07-12 16:18:48 -07001958 SND_SOC_DAPM_SUPPLY("LDO_H", TABLA_A_LDO_H_MODE_1, 7, 0,
1959 tabla_codec_enable_ldo_h, SND_SOC_DAPM_POST_PMU),
1960
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001961 SND_SOC_DAPM_INPUT("AMIC1"),
1962 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", TABLA_A_MICB_1_CTL, 7, 0,
1963 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001964 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07001965 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal1", TABLA_A_MICB_1_CTL, 7, 0,
1966 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001967 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07001968 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal2", TABLA_A_MICB_1_CTL, 7, 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001969 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001970 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001971 SND_SOC_DAPM_ADC_E("ADC1", NULL, TABLA_A_TX_1_2_EN, 7, 0,
1972 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
1973 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1974
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001975 SND_SOC_DAPM_INPUT("AMIC3"),
1976 SND_SOC_DAPM_ADC_E("ADC3", NULL, TABLA_A_TX_3_4_EN, 7, 0,
1977 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
1978 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1979
1980 SND_SOC_DAPM_INPUT("AMIC4"),
1981 SND_SOC_DAPM_ADC_E("ADC4", NULL, TABLA_A_TX_3_4_EN, 3, 0,
1982 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
1983 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1984
1985 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_A_MICB_4_CTL, 7, 0,
1986 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001987 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001988
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001989 SND_SOC_DAPM_INPUT("AMIC5"),
1990 SND_SOC_DAPM_ADC_E("ADC5", NULL, TABLA_A_TX_5_6_EN, 7, 0,
1991 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
1992
1993 SND_SOC_DAPM_INPUT("AMIC6"),
1994 SND_SOC_DAPM_ADC_E("ADC6", NULL, TABLA_A_TX_5_6_EN, 3, 0,
1995 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
1996
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001997 SND_SOC_DAPM_MUX_E("DEC1 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 0, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07001998 &dec1_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001999
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002000 SND_SOC_DAPM_MUX_E("DEC2 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 1, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002001 &dec2_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002002
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002003 SND_SOC_DAPM_MUX_E("DEC3 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 2, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002004 &dec3_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002005
2006 SND_SOC_DAPM_MUX_E("DEC4 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 3, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002007 &dec4_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002008
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002009 SND_SOC_DAPM_MUX_E("DEC5 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 4, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002010 &dec5_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002011
2012 SND_SOC_DAPM_MUX_E("DEC6 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 5, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002013 &dec6_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002014
2015 SND_SOC_DAPM_MUX_E("DEC7 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 6, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002016 &dec7_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002017
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002018 SND_SOC_DAPM_MUX_E("DEC8 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 7, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002019 &dec8_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002020
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002021 SND_SOC_DAPM_MUX_E("DEC9 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 0, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002022 &dec9_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002023
2024 SND_SOC_DAPM_MUX_E("DEC10 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 1, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002025 &dec10_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002026
Bradley Rubin229c6a52011-07-12 16:18:48 -07002027 SND_SOC_DAPM_MUX("ANC1 MUX", SND_SOC_NOPM, 0, 0, &anc1_mux),
2028 SND_SOC_DAPM_MUX("ANC2 MUX", SND_SOC_NOPM, 0, 0, &anc2_mux),
2029
2030 SND_SOC_DAPM_MIXER_E("ANC", SND_SOC_NOPM, 0, 0, NULL, 0,
2031 tabla_codec_enable_anc, SND_SOC_DAPM_PRE_PMU |
2032 SND_SOC_DAPM_POST_PMD),
2033
2034 SND_SOC_DAPM_MUX("ANC1 FB MUX", SND_SOC_NOPM, 0, 0, &anc1_fb_mux),
2035
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002036 SND_SOC_DAPM_INPUT("AMIC2"),
2037 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", TABLA_A_MICB_2_CTL, 7, 0,
2038 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002039 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002040 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal1", TABLA_A_MICB_2_CTL, 7, 0,
2041 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002042 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002043 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal2", TABLA_A_MICB_2_CTL, 7, 0,
2044 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002045 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002046 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal3", TABLA_A_MICB_2_CTL, 7, 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002047 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002048 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002049 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 External", TABLA_A_MICB_3_CTL, 7, 0,
2050 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002051 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002052 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal1", TABLA_A_MICB_3_CTL, 7, 0,
2053 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002054 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002055 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal2", TABLA_A_MICB_3_CTL, 7, 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002056 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002057 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002058 SND_SOC_DAPM_ADC_E("ADC2", NULL, TABLA_A_TX_1_2_EN, 3, 0,
2059 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
2060 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
2061
2062 SND_SOC_DAPM_MUX("SLIM TX1 MUX", SND_SOC_NOPM, 0, 0, &sb_tx1_mux),
2063 SND_SOC_DAPM_AIF_OUT("SLIM TX1", "AIF1 Capture", NULL, SND_SOC_NOPM,
2064 0, 0),
2065
2066 SND_SOC_DAPM_MUX("SLIM TX5 MUX", SND_SOC_NOPM, 0, 0, &sb_tx5_mux),
2067 SND_SOC_DAPM_AIF_OUT("SLIM TX5", "AIF1 Capture", NULL, SND_SOC_NOPM,
2068 4, 0),
2069
2070 SND_SOC_DAPM_MUX("SLIM TX6 MUX", SND_SOC_NOPM, 0, 0, &sb_tx6_mux),
2071 SND_SOC_DAPM_AIF_OUT("SLIM TX6", "AIF1 Capture", NULL, SND_SOC_NOPM,
2072 5, 0),
2073
2074 SND_SOC_DAPM_MUX("SLIM TX7 MUX", SND_SOC_NOPM, 0, 0, &sb_tx7_mux),
2075 SND_SOC_DAPM_AIF_OUT("SLIM TX7", "AIF1 Capture", NULL, SND_SOC_NOPM,
2076 0, 0),
2077
2078 SND_SOC_DAPM_MUX("SLIM TX8 MUX", SND_SOC_NOPM, 0, 0, &sb_tx8_mux),
2079 SND_SOC_DAPM_AIF_OUT("SLIM TX8", "AIF1 Capture", NULL, SND_SOC_NOPM,
2080 0, 0),
2081
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002082 /* Digital Mic Inputs */
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002083 SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
2084 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2085 SND_SOC_DAPM_POST_PMD),
2086
2087 SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 0, 0,
2088 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2089 SND_SOC_DAPM_POST_PMD),
2090
2091 SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 0, 0,
2092 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2093 SND_SOC_DAPM_POST_PMD),
2094
2095 SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 0, 0,
2096 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2097 SND_SOC_DAPM_POST_PMD),
2098
2099 SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 0, 0,
2100 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2101 SND_SOC_DAPM_POST_PMD),
2102
2103 SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 0, 0,
2104 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2105 SND_SOC_DAPM_POST_PMD),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002106
2107 /* Sidetone */
2108 SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
2109 SND_SOC_DAPM_PGA("IIR1", TABLA_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
2110};
2111
Santosh Mardie15e2302011-11-15 10:39:23 +05302112static const struct snd_soc_dapm_route audio_i2s_map[] = {
2113 {"RX_I2S_CLK", NULL, "CDC_CONN"},
2114 {"SLIM RX1", NULL, "RX_I2S_CLK"},
2115 {"SLIM RX2", NULL, "RX_I2S_CLK"},
2116 {"SLIM RX3", NULL, "RX_I2S_CLK"},
2117 {"SLIM RX4", NULL, "RX_I2S_CLK"},
2118
2119 {"SLIM TX7", NULL, "TX_I2S_CLK"},
2120 {"SLIM TX8", NULL, "TX_I2S_CLK"},
2121 {"SLIM TX9", NULL, "TX_I2S_CLK"},
2122 {"SLIM TX10", NULL, "TX_I2S_CLK"},
2123};
2124
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002125static const struct snd_soc_dapm_route audio_map[] = {
2126 /* SLIMBUS Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002127
2128 {"SLIM TX1", NULL, "SLIM TX1 MUX"},
2129 {"SLIM TX1 MUX", "DEC1", "DEC1 MUX"},
2130
2131 {"SLIM TX5", NULL, "SLIM TX5 MUX"},
2132 {"SLIM TX5 MUX", "DEC5", "DEC5 MUX"},
2133
2134 {"SLIM TX6", NULL, "SLIM TX6 MUX"},
2135 {"SLIM TX6 MUX", "DEC6", "DEC6 MUX"},
2136
2137 {"SLIM TX7", NULL, "SLIM TX7 MUX"},
2138 {"SLIM TX7 MUX", "DEC1", "DEC1 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002139 {"SLIM TX7 MUX", "DEC2", "DEC2 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002140 {"SLIM TX7 MUX", "DEC3", "DEC3 MUX"},
2141 {"SLIM TX7 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002142 {"SLIM TX7 MUX", "DEC5", "DEC5 MUX"},
2143 {"SLIM TX7 MUX", "DEC6", "DEC6 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002144 {"SLIM TX7 MUX", "DEC7", "DEC7 MUX"},
2145 {"SLIM TX7 MUX", "DEC8", "DEC8 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002146 {"SLIM TX7 MUX", "DEC9", "DEC9 MUX"},
2147 {"SLIM TX7 MUX", "DEC10", "DEC10 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002148
2149 {"SLIM TX8", NULL, "SLIM TX8 MUX"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002150 {"SLIM TX8 MUX", "DEC1", "DEC1 MUX"},
2151 {"SLIM TX8 MUX", "DEC2", "DEC2 MUX"},
2152 {"SLIM TX8 MUX", "DEC3", "DEC3 MUX"},
Bhalchandra Gajare9ec83cd2011-09-23 17:25:07 -07002153 {"SLIM TX8 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002154 {"SLIM TX8 MUX", "DEC5", "DEC5 MUX"},
2155 {"SLIM TX8 MUX", "DEC6", "DEC6 MUX"},
2156
2157 /* Earpiece (RX MIX1) */
2158 {"EAR", NULL, "EAR PA"},
Kiran Kandiac034ac2011-07-29 16:39:08 -07002159 {"EAR PA", NULL, "DAC1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002160 {"DAC1", NULL, "CP"},
2161
2162 {"ANC1 FB MUX", "EAR_HPH_L", "RX1 MIX1"},
2163 {"ANC1 FB MUX", "EAR_LINE_1", "RX2 MIX1"},
2164 {"ANC", NULL, "ANC1 FB MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002165
2166 /* Headset (RX MIX1 and RX MIX2) */
2167 {"HEADPHONE", NULL, "HPHL"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002168 {"HEADPHONE", NULL, "HPHR"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002169
2170 {"HPHL", NULL, "HPHL DAC"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002171 {"HPHR", NULL, "HPHR DAC"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002172
2173 {"HPHL DAC", NULL, "CP"},
2174 {"HPHR DAC", NULL, "CP"},
2175
2176 {"ANC", NULL, "ANC1 MUX"},
2177 {"ANC", NULL, "ANC2 MUX"},
2178 {"ANC1 MUX", "ADC1", "ADC1"},
2179 {"ANC1 MUX", "ADC2", "ADC2"},
2180 {"ANC1 MUX", "ADC3", "ADC3"},
2181 {"ANC1 MUX", "ADC4", "ADC4"},
2182 {"ANC2 MUX", "ADC1", "ADC1"},
2183 {"ANC2 MUX", "ADC2", "ADC2"},
2184 {"ANC2 MUX", "ADC3", "ADC3"},
2185 {"ANC2 MUX", "ADC4", "ADC4"},
2186
Bradley Rubine1d08622011-07-20 18:01:35 -07002187 {"ANC", NULL, "CDC_CONN"},
2188
Bradley Rubin229c6a52011-07-12 16:18:48 -07002189 {"DAC1", "Switch", "RX1 CHAIN"},
2190 {"HPHL DAC", "Switch", "RX1 CHAIN"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002191 {"HPHR DAC", NULL, "RX2 CHAIN"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002192
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002193 {"LINEOUT1", NULL, "LINEOUT1 PA"},
2194 {"LINEOUT2", NULL, "LINEOUT2 PA"},
2195 {"LINEOUT3", NULL, "LINEOUT3 PA"},
2196 {"LINEOUT4", NULL, "LINEOUT4 PA"},
2197 {"LINEOUT5", NULL, "LINEOUT5 PA"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002198
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002199 {"LINEOUT1 PA", NULL, "LINEOUT1 DAC"},
2200 {"LINEOUT2 PA", NULL, "LINEOUT2 DAC"},
2201 {"LINEOUT3 PA", NULL, "LINEOUT3 DAC"},
2202 {"LINEOUT4 PA", NULL, "LINEOUT4 DAC"},
2203 {"LINEOUT5 PA", NULL, "LINEOUT5 DAC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002204
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002205 {"LINEOUT1 DAC", NULL, "RX3 MIX1"},
2206 {"LINEOUT5 DAC", NULL, "RX7 MIX1"},
2207
Bradley Rubin229c6a52011-07-12 16:18:48 -07002208 {"RX1 CHAIN", NULL, "RX1 MIX1"},
2209 {"RX2 CHAIN", NULL, "RX2 MIX1"},
2210 {"RX1 CHAIN", NULL, "ANC"},
2211 {"RX2 CHAIN", NULL, "ANC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002212
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002213 {"CP", NULL, "RX_BIAS"},
2214 {"LINEOUT1 DAC", NULL, "RX_BIAS"},
2215 {"LINEOUT2 DAC", NULL, "RX_BIAS"},
2216 {"LINEOUT3 DAC", NULL, "RX_BIAS"},
2217 {"LINEOUT4 DAC", NULL, "RX_BIAS"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002218 {"LINEOUT5 DAC", NULL, "RX_BIAS"},
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002219
Bradley Rubin229c6a52011-07-12 16:18:48 -07002220 {"RX1 MIX1", NULL, "RX1 MIX1 INP1"},
2221 {"RX1 MIX1", NULL, "RX1 MIX1 INP2"},
2222 {"RX2 MIX1", NULL, "RX2 MIX1 INP1"},
2223 {"RX2 MIX1", NULL, "RX2 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002224 {"RX3 MIX1", NULL, "RX3 MIX1 INP1"},
2225 {"RX3 MIX1", NULL, "RX3 MIX1 INP2"},
2226 {"RX4 MIX1", NULL, "RX4 MIX1 INP1"},
2227 {"RX4 MIX1", NULL, "RX4 MIX1 INP2"},
2228 {"RX5 MIX1", NULL, "RX5 MIX1 INP1"},
2229 {"RX5 MIX1", NULL, "RX5 MIX1 INP2"},
2230 {"RX6 MIX1", NULL, "RX6 MIX1 INP1"},
2231 {"RX6 MIX1", NULL, "RX6 MIX1 INP2"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002232 {"RX7 MIX1", NULL, "RX7 MIX1 INP1"},
2233 {"RX7 MIX1", NULL, "RX7 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002234
Bradley Rubin229c6a52011-07-12 16:18:48 -07002235 {"RX1 MIX1 INP1", "RX1", "SLIM RX1"},
2236 {"RX1 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302237 {"RX1 MIX1 INP1", "RX3", "SLIM RX3"},
2238 {"RX1 MIX1 INP1", "RX4", "SLIM RX4"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002239 {"RX1 MIX1 INP1", "IIR1", "IIR1"},
2240 {"RX1 MIX1 INP2", "RX1", "SLIM RX1"},
2241 {"RX1 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302242 {"RX1 MIX1 INP2", "RX3", "SLIM RX3"},
2243 {"RX1 MIX1 INP2", "RX4", "SLIM RX4"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002244 {"RX1 MIX1 INP2", "IIR1", "IIR1"},
2245 {"RX2 MIX1 INP1", "RX1", "SLIM RX1"},
2246 {"RX2 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302247 {"RX2 MIX1 INP1", "RX3", "SLIM RX3"},
2248 {"RX2 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002249 {"RX2 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002250 {"RX2 MIX1 INP2", "RX1", "SLIM RX1"},
2251 {"RX2 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302252 {"RX2 MIX1 INP2", "RX3", "SLIM RX3"},
2253 {"RX2 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002254 {"RX2 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002255 {"RX3 MIX1 INP1", "RX1", "SLIM RX1"},
2256 {"RX3 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302257 {"RX3 MIX1 INP1", "RX3", "SLIM RX3"},
2258 {"RX3 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002259 {"RX3 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002260 {"RX3 MIX1 INP2", "RX1", "SLIM RX1"},
2261 {"RX3 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302262 {"RX3 MIX1 INP2", "RX3", "SLIM RX3"},
2263 {"RX3 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002264 {"RX3 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002265 {"RX4 MIX1 INP1", "RX1", "SLIM RX1"},
2266 {"RX4 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302267 {"RX4 MIX1 INP1", "RX3", "SLIM RX3"},
2268 {"RX4 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002269 {"RX4 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002270 {"RX4 MIX1 INP2", "RX1", "SLIM RX1"},
2271 {"RX4 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302272 {"RX4 MIX1 INP2", "RX3", "SLIM RX3"},
2273 {"RX4 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002274 {"RX4 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002275 {"RX5 MIX1 INP1", "RX1", "SLIM RX1"},
2276 {"RX5 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302277 {"RX5 MIX1 INP1", "RX3", "SLIM RX3"},
2278 {"RX5 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002279 {"RX5 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002280 {"RX5 MIX1 INP2", "RX1", "SLIM RX1"},
2281 {"RX5 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302282 {"RX5 MIX1 INP2", "RX3", "SLIM RX3"},
2283 {"RX5 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002284 {"RX5 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002285 {"RX6 MIX1 INP1", "RX1", "SLIM RX1"},
2286 {"RX6 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302287 {"RX6 MIX1 INP1", "RX3", "SLIM RX3"},
2288 {"RX6 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002289 {"RX6 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002290 {"RX6 MIX1 INP2", "RX1", "SLIM RX1"},
2291 {"RX6 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302292 {"RX6 MIX1 INP2", "RX3", "SLIM RX3"},
2293 {"RX6 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002294 {"RX6 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002295 {"RX7 MIX1 INP1", "RX1", "SLIM RX1"},
2296 {"RX7 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302297 {"RX7 MIX1 INP1", "RX3", "SLIM RX3"},
2298 {"RX7 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002299 {"RX7 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002300 {"RX7 MIX1 INP2", "RX1", "SLIM RX1"},
2301 {"RX7 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302302 {"RX7 MIX1 INP2", "RX3", "SLIM RX3"},
2303 {"RX7 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002304 {"RX7 MIX1 INP2", "IIR1", "IIR1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002305
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002306 /* Decimator Inputs */
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002307 {"DEC1 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002308 {"DEC1 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002309 {"DEC1 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002310 {"DEC2 MUX", "DMIC2", "DMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002311 {"DEC2 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002312 {"DEC2 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002313 {"DEC3 MUX", "DMIC3", "DMIC3"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002314 {"DEC3 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002315 {"DEC3 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002316 {"DEC4 MUX", "DMIC4", "DMIC4"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002317 {"DEC4 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002318 {"DEC4 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002319 {"DEC5 MUX", "DMIC5", "DMIC5"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002320 {"DEC5 MUX", "ADC2", "ADC2"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002321 {"DEC5 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002322 {"DEC6 MUX", "DMIC6", "DMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002323 {"DEC6 MUX", "ADC1", "ADC1"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002324 {"DEC6 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002325 {"DEC7 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002326 {"DEC7 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002327 {"DEC7 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002328 {"DEC8 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002329 {"DEC8 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002330 {"DEC9 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002331 {"DEC9 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002332 {"DEC10 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002333 {"DEC10 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002334
2335 /* ADC Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002336 {"ADC1", NULL, "AMIC1"},
2337 {"ADC2", NULL, "AMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002338 {"ADC3", NULL, "AMIC3"},
2339 {"ADC4", NULL, "AMIC4"},
2340 {"ADC5", NULL, "AMIC5"},
2341 {"ADC6", NULL, "AMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002342
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002343 {"IIR1", NULL, "IIR1 INP1 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07002344 {"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
2345 {"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
2346 {"IIR1 INP1 MUX", "DEC3", "DEC3 MUX"},
2347 {"IIR1 INP1 MUX", "DEC4", "DEC4 MUX"},
2348 {"IIR1 INP1 MUX", "DEC5", "DEC5 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002349 {"IIR1 INP1 MUX", "DEC6", "DEC6 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07002350 {"IIR1 INP1 MUX", "DEC7", "DEC7 MUX"},
2351 {"IIR1 INP1 MUX", "DEC8", "DEC8 MUX"},
2352 {"IIR1 INP1 MUX", "DEC9", "DEC9 MUX"},
2353 {"IIR1 INP1 MUX", "DEC10", "DEC10 MUX"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002354
2355 {"MIC BIAS1 Internal1", NULL, "LDO_H"},
2356 {"MIC BIAS1 Internal2", NULL, "LDO_H"},
2357 {"MIC BIAS1 External", NULL, "LDO_H"},
2358 {"MIC BIAS2 Internal1", NULL, "LDO_H"},
2359 {"MIC BIAS2 Internal2", NULL, "LDO_H"},
2360 {"MIC BIAS2 Internal3", NULL, "LDO_H"},
2361 {"MIC BIAS2 External", NULL, "LDO_H"},
2362 {"MIC BIAS3 Internal1", NULL, "LDO_H"},
2363 {"MIC BIAS3 Internal2", NULL, "LDO_H"},
2364 {"MIC BIAS3 External", NULL, "LDO_H"},
2365 {"MIC BIAS4 External", NULL, "LDO_H"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002366};
2367
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002368static const struct snd_soc_dapm_route tabla_1_x_lineout_2_to_4_map[] = {
2369
2370 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX1"},
2371 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
2372
2373 {"LINEOUT2 DAC", NULL, "RX4 DSM MUX"},
2374
2375 {"LINEOUT3 DAC", NULL, "RX5 MIX1"},
2376 {"LINEOUT3 DAC GROUND", "Switch", "RX3 MIX1"},
2377 {"LINEOUT3 DAC", NULL, "LINEOUT3 DAC GROUND"},
2378
2379 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
2380 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
2381
2382 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
2383 {"LINEOUT4 DAC GROUND", "Switch", "RX4 DSM MUX"},
2384 {"LINEOUT4 DAC", NULL, "LINEOUT4 DAC GROUND"},
2385};
2386
Kiran Kandi7a9fd902011-11-14 13:51:45 -08002387
2388static const struct snd_soc_dapm_route tabla_2_x_lineout_2_to_4_map[] = {
2389
2390 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX1"},
2391 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
2392
2393 {"LINEOUT3 DAC", NULL, "RX4 DSM MUX"},
2394
2395 {"LINEOUT2 DAC", NULL, "RX5 MIX1"},
2396
2397 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
2398 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
2399
2400 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
2401};
2402
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002403static int tabla_readable(struct snd_soc_codec *ssc, unsigned int reg)
2404{
2405 return tabla_reg_readable[reg];
2406}
2407
2408static int tabla_volatile(struct snd_soc_codec *ssc, unsigned int reg)
2409{
2410 /* Registers lower than 0x100 are top level registers which can be
2411 * written by the Tabla core driver.
2412 */
2413
2414 if ((reg >= TABLA_A_CDC_MBHC_EN_CTL) || (reg < 0x100))
2415 return 1;
2416
Ben Romberger1f045a72011-11-04 10:14:57 -07002417 /* IIR Coeff registers are not cacheable */
2418 if ((reg >= TABLA_A_CDC_IIR1_COEF_B1_CTL) &&
2419 (reg <= TABLA_A_CDC_IIR2_COEF_B5_CTL))
2420 return 1;
2421
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002422 return 0;
2423}
2424
2425#define TABLA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
2426static int tabla_write(struct snd_soc_codec *codec, unsigned int reg,
2427 unsigned int value)
2428{
2429 int ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002430
2431 BUG_ON(reg > TABLA_MAX_REGISTER);
2432
2433 if (!tabla_volatile(codec, reg)) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002434 ret = snd_soc_cache_write(codec, reg, value);
2435 if (ret != 0)
2436 dev_err(codec->dev, "Cache write to %x failed: %d\n",
2437 reg, ret);
2438 }
2439
2440 return tabla_reg_write(codec->control_data, reg, value);
2441}
2442static unsigned int tabla_read(struct snd_soc_codec *codec,
2443 unsigned int reg)
2444{
2445 unsigned int val;
2446 int ret;
2447
2448 BUG_ON(reg > TABLA_MAX_REGISTER);
2449
2450 if (!tabla_volatile(codec, reg) && tabla_readable(codec, reg) &&
2451 reg < codec->driver->reg_cache_size) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002452 ret = snd_soc_cache_read(codec, reg, &val);
2453 if (ret >= 0) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002454 return val;
2455 } else
2456 dev_err(codec->dev, "Cache read from %x failed: %d\n",
2457 reg, ret);
2458 }
2459
2460 val = tabla_reg_read(codec->control_data, reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002461 return val;
2462}
2463
2464static void tabla_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
2465{
2466 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL, 0x1C);
2467 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2468 0x80);
2469 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x04,
2470 0x04);
2471 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
2472 0x01);
2473 usleep_range(1000, 1000);
2474 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2475 0x00);
2476}
2477
2478static void tabla_codec_enable_bandgap(struct snd_soc_codec *codec,
2479 enum tabla_bandgap_type choice)
2480{
2481 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2482
2483 /* TODO lock resources accessed by audio streams and threaded
2484 * interrupt handlers
2485 */
2486
2487 pr_debug("%s, choice is %d, current is %d\n", __func__, choice,
2488 tabla->bandgap_type);
2489
2490 if (tabla->bandgap_type == choice)
2491 return;
2492
2493 if ((tabla->bandgap_type == TABLA_BANDGAP_OFF) &&
2494 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
2495 tabla_codec_enable_audio_mode_bandgap(codec);
2496 } else if ((tabla->bandgap_type == TABLA_BANDGAP_AUDIO_MODE) &&
2497 (choice == TABLA_BANDGAP_MBHC_MODE)) {
2498 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x2,
2499 0x2);
2500 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2501 0x80);
2502 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x4,
2503 0x4);
2504 usleep_range(1000, 1000);
2505 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2506 0x00);
2507 } else if ((tabla->bandgap_type == TABLA_BANDGAP_MBHC_MODE) &&
2508 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
2509 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
2510 usleep_range(100, 100);
2511 tabla_codec_enable_audio_mode_bandgap(codec);
2512 } else if (choice == TABLA_BANDGAP_OFF) {
2513 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
2514 } else {
2515 pr_err("%s: Error, Invalid bandgap settings\n", __func__);
2516 }
2517 tabla->bandgap_type = choice;
2518}
2519
2520static int tabla_codec_enable_config_mode(struct snd_soc_codec *codec,
2521 int enable)
2522{
2523 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2524
2525 if (enable) {
2526 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x10, 0);
2527 snd_soc_write(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x17);
2528 usleep_range(5, 5);
2529 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80,
2530 0x80);
2531 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80,
2532 0x80);
2533 usleep_range(10, 10);
2534 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80, 0);
2535 usleep_range(20, 20);
2536 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x08);
2537 } else {
2538 snd_soc_update_bits(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x1,
2539 0);
2540 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80, 0);
2541 }
2542 tabla->config_mode_active = enable ? true : false;
2543
2544 return 0;
2545}
2546
2547static int tabla_codec_enable_clock_block(struct snd_soc_codec *codec,
2548 int config_mode)
2549{
2550 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2551
2552 pr_debug("%s\n", __func__);
2553
2554 if (config_mode) {
2555 tabla_codec_enable_config_mode(codec, 1);
2556 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x00);
2557 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
2558 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN1, 0x0D);
2559 usleep_range(1000, 1000);
2560 } else
2561 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
2562
2563 if (!config_mode && tabla->mbhc_polling_active) {
2564 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
2565 tabla_codec_enable_config_mode(codec, 0);
2566
2567 }
2568
2569 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x05);
2570 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x00);
2571 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x04);
2572 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_MCLK_CTL, 0x01, 0x01);
2573 usleep_range(50, 50);
2574 tabla->clock_active = true;
2575 return 0;
2576}
2577static void tabla_codec_disable_clock_block(struct snd_soc_codec *codec)
2578{
2579 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2580 pr_debug("%s\n", __func__);
2581 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x00);
2582 ndelay(160);
2583 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x02);
2584 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x00);
2585 tabla->clock_active = false;
2586}
2587
Bradley Rubincb1e2732011-06-23 16:49:20 -07002588static void tabla_codec_calibrate_hs_polling(struct snd_soc_codec *codec)
2589{
2590 /* TODO store register values in calibration */
Bhalchandra Gajare30cf4842011-10-17 18:12:52 -07002591 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL, 0x20);
2592 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL, 0xFF);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002593
2594 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B10_CTL, 0xFF);
Bhalchandra Gajare30cf4842011-10-17 18:12:52 -07002595 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B9_CTL, 0x20);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002596
Bhalchandra Gajarefabb8772011-11-10 19:52:01 -08002597 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL, 0xF8);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002598 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL, 0xEE);
2599 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL, 0xFC);
2600 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL, 0xCE);
2601
2602 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B1_CTL, 3);
2603 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B2_CTL, 9);
2604 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B3_CTL, 30);
2605 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL, 120);
2606 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B1_CTL, 0x78, 0x58);
2607 snd_soc_write(codec, TABLA_A_CDC_MBHC_B2_CTL, 11);
2608}
2609
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002610static int tabla_startup(struct snd_pcm_substream *substream,
2611 struct snd_soc_dai *dai)
2612{
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002613 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
2614 substream->name, substream->stream);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002615
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002616 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002617}
2618
2619static void tabla_shutdown(struct snd_pcm_substream *substream,
2620 struct snd_soc_dai *dai)
2621{
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002622 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
2623 substream->name, substream->stream);
2624}
2625
2626int tabla_mclk_enable(struct snd_soc_codec *codec, int mclk_enable)
2627{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002628 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2629
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002630 pr_debug("%s() mclk_enable = %u\n", __func__, mclk_enable);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002631
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002632 if (mclk_enable) {
2633 tabla->mclk_enabled = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002634
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002635 if (tabla->mbhc_polling_active && (tabla->mclk_enabled)) {
Bradley Rubincb1e2732011-06-23 16:49:20 -07002636 tabla_codec_pause_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002637 tabla_codec_enable_bandgap(codec,
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002638 TABLA_BANDGAP_AUDIO_MODE);
2639 tabla_codec_enable_clock_block(codec, 0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002640 tabla_codec_calibrate_hs_polling(codec);
2641 tabla_codec_start_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002642 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002643 } else {
2644
2645 if (!tabla->mclk_enabled) {
2646 pr_err("Error, MCLK already diabled\n");
2647 return -EINVAL;
2648 }
2649 tabla->mclk_enabled = false;
2650
2651 if (tabla->mbhc_polling_active) {
2652 if (!tabla->mclk_enabled) {
2653 tabla_codec_pause_hs_polling(codec);
2654 tabla_codec_enable_bandgap(codec,
2655 TABLA_BANDGAP_MBHC_MODE);
2656 tabla_enable_rx_bias(codec, 1);
2657 tabla_codec_enable_clock_block(codec, 1);
2658 tabla_codec_calibrate_hs_polling(codec);
2659 tabla_codec_start_hs_polling(codec);
2660 }
2661 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1,
2662 0x05, 0x01);
2663 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002664 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002665 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002666}
2667
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002668static int tabla_set_dai_sysclk(struct snd_soc_dai *dai,
2669 int clk_id, unsigned int freq, int dir)
2670{
2671 pr_debug("%s\n", __func__);
2672 return 0;
2673}
2674
2675static int tabla_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2676{
Santosh Mardie15e2302011-11-15 10:39:23 +05302677 u8 val = 0;
2678 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
2679
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002680 pr_debug("%s\n", __func__);
Santosh Mardie15e2302011-11-15 10:39:23 +05302681 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2682 case SND_SOC_DAIFMT_CBS_CFS:
2683 /* CPU is master */
2684 if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
2685 if (dai->id == TABLA_TX_DAI_ID)
2686 snd_soc_update_bits(dai->codec,
2687 TABLA_A_CDC_CLK_TX_I2S_CTL,
2688 TABLA_I2S_MASTER_MODE_MASK, 0);
2689 else if (dai->id == TABLA_RX_DAI_ID)
2690 snd_soc_update_bits(dai->codec,
2691 TABLA_A_CDC_CLK_RX_I2S_CTL,
2692 TABLA_I2S_MASTER_MODE_MASK, 0);
2693 }
2694 break;
2695 case SND_SOC_DAIFMT_CBM_CFM:
2696 /* CPU is slave */
2697 if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
2698 val = TABLA_I2S_MASTER_MODE_MASK;
2699 if (dai->id == TABLA_TX_DAI_ID)
2700 snd_soc_update_bits(dai->codec,
2701 TABLA_A_CDC_CLK_TX_I2S_CTL, val, val);
2702 else if (dai->id == TABLA_RX_DAI_ID)
2703 snd_soc_update_bits(dai->codec,
2704 TABLA_A_CDC_CLK_RX_I2S_CTL, val, val);
2705 }
2706 break;
2707 default:
2708 return -EINVAL;
2709 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002710 return 0;
2711}
2712
2713static int tabla_hw_params(struct snd_pcm_substream *substream,
2714 struct snd_pcm_hw_params *params,
2715 struct snd_soc_dai *dai)
2716{
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002717 struct snd_soc_codec *codec = dai->codec;
Santosh Mardie15e2302011-11-15 10:39:23 +05302718 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
Bhalchandra Gajare038bf3a2011-09-02 15:32:30 -07002719 u8 path, shift;
2720 u16 tx_fs_reg, rx_fs_reg;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002721 u8 tx_fs_rate, rx_fs_rate, rx_state, tx_state;
2722
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002723 pr_debug("%s: DAI-ID %x\n", __func__, dai->id);
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002724
2725 switch (params_rate(params)) {
2726 case 8000:
2727 tx_fs_rate = 0x00;
2728 rx_fs_rate = 0x00;
2729 break;
2730 case 16000:
2731 tx_fs_rate = 0x01;
2732 rx_fs_rate = 0x20;
2733 break;
2734 case 32000:
2735 tx_fs_rate = 0x02;
2736 rx_fs_rate = 0x40;
2737 break;
2738 case 48000:
2739 tx_fs_rate = 0x03;
2740 rx_fs_rate = 0x60;
2741 break;
2742 default:
2743 pr_err("%s: Invalid sampling rate %d\n", __func__,
2744 params_rate(params));
2745 return -EINVAL;
2746 }
2747
2748
2749 /**
2750 * If current dai is a tx dai, set sample rate to
2751 * all the txfe paths that are currently not active
2752 */
2753 if (dai->id == TABLA_TX_DAI_ID) {
2754
2755 tx_state = snd_soc_read(codec,
2756 TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL);
2757
2758 for (path = 1, shift = 0;
2759 path <= NUM_DECIMATORS; path++, shift++) {
2760
2761 if (path == BITS_PER_REG + 1) {
2762 shift = 0;
2763 tx_state = snd_soc_read(codec,
2764 TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL);
2765 }
2766
2767 if (!(tx_state & (1 << shift))) {
2768 tx_fs_reg = TABLA_A_CDC_TX1_CLK_FS_CTL
2769 + (BITS_PER_REG*(path-1));
2770 snd_soc_update_bits(codec, tx_fs_reg,
2771 0x03, tx_fs_rate);
2772 }
2773 }
Santosh Mardie15e2302011-11-15 10:39:23 +05302774 if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
2775 switch (params_format(params)) {
2776 case SNDRV_PCM_FORMAT_S16_LE:
2777 snd_soc_update_bits(codec,
2778 TABLA_A_CDC_CLK_TX_I2S_CTL,
2779 0x20, 0x20);
2780 break;
2781 case SNDRV_PCM_FORMAT_S32_LE:
2782 snd_soc_update_bits(codec,
2783 TABLA_A_CDC_CLK_TX_I2S_CTL,
2784 0x20, 0x00);
2785 break;
2786 default:
2787 pr_err("invalid format\n");
2788 break;
2789 }
2790 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_TX_I2S_CTL,
2791 0x03, tx_fs_rate);
2792 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002793 }
2794
2795 /**
2796 * TODO: Need to handle case where same RX chain takes 2 or more inputs
2797 * with varying sample rates
2798 */
2799
2800 /**
2801 * If current dai is a rx dai, set sample rate to
2802 * all the rx paths that are currently not active
2803 */
2804 if (dai->id == TABLA_RX_DAI_ID) {
2805
2806 rx_state = snd_soc_read(codec,
2807 TABLA_A_CDC_CLK_RX_B1_CTL);
2808
2809 for (path = 1, shift = 0;
2810 path <= NUM_INTERPOLATORS; path++, shift++) {
2811
2812 if (!(rx_state & (1 << shift))) {
2813 rx_fs_reg = TABLA_A_CDC_RX1_B5_CTL
2814 + (BITS_PER_REG*(path-1));
2815 snd_soc_update_bits(codec, rx_fs_reg,
2816 0xE0, rx_fs_rate);
2817 }
2818 }
Santosh Mardie15e2302011-11-15 10:39:23 +05302819 if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
2820 switch (params_format(params)) {
2821 case SNDRV_PCM_FORMAT_S16_LE:
2822 snd_soc_update_bits(codec,
2823 TABLA_A_CDC_CLK_RX_I2S_CTL,
2824 0x20, 0x20);
2825 break;
2826 case SNDRV_PCM_FORMAT_S32_LE:
2827 snd_soc_update_bits(codec,
2828 TABLA_A_CDC_CLK_RX_I2S_CTL,
2829 0x20, 0x00);
2830 break;
2831 default:
2832 pr_err("invalid format\n");
2833 break;
2834 }
2835 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_I2S_CTL,
2836 0x03, (rx_fs_rate >> 0x05));
2837 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002838 }
2839
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002840 return 0;
2841}
2842
2843static struct snd_soc_dai_ops tabla_dai_ops = {
2844 .startup = tabla_startup,
2845 .shutdown = tabla_shutdown,
2846 .hw_params = tabla_hw_params,
2847 .set_sysclk = tabla_set_dai_sysclk,
2848 .set_fmt = tabla_set_dai_fmt,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002849};
2850
2851static struct snd_soc_dai_driver tabla_dai[] = {
2852 {
2853 .name = "tabla_rx1",
2854 .id = 1,
2855 .playback = {
2856 .stream_name = "AIF1 Playback",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002857 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002858 .formats = TABLA_FORMATS,
2859 .rate_max = 48000,
2860 .rate_min = 8000,
2861 .channels_min = 1,
2862 .channels_max = 2,
2863 },
2864 .ops = &tabla_dai_ops,
2865 },
2866 {
2867 .name = "tabla_tx1",
2868 .id = 2,
2869 .capture = {
2870 .stream_name = "AIF1 Capture",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002871 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002872 .formats = TABLA_FORMATS,
2873 .rate_max = 48000,
2874 .rate_min = 8000,
2875 .channels_min = 1,
2876 .channels_max = 2,
2877 },
2878 .ops = &tabla_dai_ops,
2879 },
2880};
Santosh Mardie15e2302011-11-15 10:39:23 +05302881
2882static struct snd_soc_dai_driver tabla_i2s_dai[] = {
2883 {
2884 .name = "tabla_i2s_rx1",
2885 .id = 1,
2886 .playback = {
2887 .stream_name = "AIF1 Playback",
2888 .rates = WCD9310_RATES,
2889 .formats = TABLA_FORMATS,
2890 .rate_max = 48000,
2891 .rate_min = 8000,
2892 .channels_min = 1,
2893 .channels_max = 4,
2894 },
2895 .ops = &tabla_dai_ops,
2896 },
2897 {
2898 .name = "tabla_i2s_tx1",
2899 .id = 2,
2900 .capture = {
2901 .stream_name = "AIF1 Capture",
2902 .rates = WCD9310_RATES,
2903 .formats = TABLA_FORMATS,
2904 .rate_max = 48000,
2905 .rate_min = 8000,
2906 .channels_min = 1,
2907 .channels_max = 4,
2908 },
2909 .ops = &tabla_dai_ops,
2910 },
2911};
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07002912static short tabla_codec_read_sta_result(struct snd_soc_codec *codec)
Bradley Rubincb1e2732011-06-23 16:49:20 -07002913{
2914 u8 bias_msb, bias_lsb;
2915 short bias_value;
2916
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07002917 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B3_STATUS);
2918 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B2_STATUS);
2919 bias_value = (bias_msb << 8) | bias_lsb;
2920 return bias_value;
2921}
2922
2923static short tabla_codec_read_dce_result(struct snd_soc_codec *codec)
2924{
2925 u8 bias_msb, bias_lsb;
2926 short bias_value;
2927
2928 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B5_STATUS);
2929 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B4_STATUS);
2930 bias_value = (bias_msb << 8) | bias_lsb;
2931 return bias_value;
2932}
2933
2934static short tabla_codec_measure_micbias_voltage(struct snd_soc_codec *codec,
2935 int dce)
2936{
2937 short bias_value;
2938
Bradley Rubincb1e2732011-06-23 16:49:20 -07002939 if (dce) {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07002940 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
2941 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
2942 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
2943 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
2944 usleep_range(60000, 60000);
2945 bias_value = tabla_codec_read_dce_result(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002946 } else {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07002947 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002948 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
2949 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07002950 usleep_range(5000, 5000);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002951 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07002952 usleep_range(50, 50);
2953 bias_value = tabla_codec_read_sta_result(codec);
2954 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
2955 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002956 }
2957
Bradley Rubincb1e2732011-06-23 16:49:20 -07002958 pr_debug("read microphone bias value %x\n", bias_value);
2959 return bias_value;
2960}
2961
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07002962static short tabla_codec_setup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002963{
2964 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2965 struct tabla_mbhc_calibration *calibration = tabla->calibration;
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07002966 short bias_value;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002967 u8 cfilt_mode;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002968
2969 if (!calibration) {
2970 pr_err("Error, no tabla calibration\n");
Bradley Rubincb1e2732011-06-23 16:49:20 -07002971 return -ENODEV;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002972 }
2973
2974 tabla->mbhc_polling_active = true;
2975
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002976 if (!tabla->mclk_enabled) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002977 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_MBHC_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002978 tabla_enable_rx_bias(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002979 tabla_codec_enable_clock_block(codec, 1);
2980 }
2981
2982 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x01);
2983
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002984 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0xE0);
2985
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002986 /* Make sure CFILT is in fast mode, save current mode */
2987 cfilt_mode = snd_soc_read(codec,
2988 tabla->mbhc_bias_regs.cfilt_ctl);
2989 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl,
2990 0x70, 0x00);
Patrick Lai3043fba2011-08-01 14:15:57 -07002991
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002992 snd_soc_update_bits(codec,
2993 tabla->mbhc_bias_regs.ctl_reg, 0x1F, 0x16);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002994
2995 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002996 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002997
2998 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x80);
2999 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x1F, 0x1C);
3000 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x40, 0x40);
3001
3002 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003003 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3004 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003005
Bradley Rubincb1e2732011-06-23 16:49:20 -07003006 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x6, 0x6);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003007 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3008
Bradley Rubincb1e2732011-06-23 16:49:20 -07003009 tabla_codec_calibrate_hs_polling(codec);
3010
3011 bias_value = tabla_codec_measure_micbias_voltage(codec, 0);
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003012 snd_soc_update_bits(codec,
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003013 tabla->mbhc_bias_regs.cfilt_ctl, 0x40, cfilt_mode);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003014 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003015
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003016 return bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003017}
3018
3019static int tabla_codec_enable_hs_detect(struct snd_soc_codec *codec,
3020 int insertion)
3021{
3022 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
3023 struct tabla_mbhc_calibration *calibration = tabla->calibration;
3024 int central_bias_enabled = 0;
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003025 u8 wg_time;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003026
3027 if (!calibration) {
3028 pr_err("Error, no tabla calibration\n");
3029 return -EINVAL;
3030 }
3031
3032 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0);
3033
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003034 if (insertion) {
3035 /* Make sure mic bias and Mic line schmitt trigger
3036 * are turned OFF
3037 */
3038 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg,
3039 0x81, 0x01);
3040 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
3041 0x90, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003042 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
3043 wg_time += 1;
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003044
3045 /* Enable HPH Schmitt Trigger */
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003046 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x11, 0x11);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003047 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x0C,
3048 calibration->hph_current << 2);
3049
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003050 /* Turn off HPH PAs and DAC's during insertion detection to
3051 * avoid false insertion interrupts
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003052 */
3053 if (tabla->mbhc_micbias_switched)
3054 tabla_codec_switch_micbias(codec, 0);
3055 snd_soc_update_bits(codec, TABLA_A_RX_HPH_CNP_EN, 0x30, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003056 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_DAC_CTL,
3057 0xC0, 0x00);
3058 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_DAC_CTL,
3059 0xC0, 0x00);
3060 usleep_range(wg_time * 1000, wg_time * 1000);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003061
3062 /* setup for insetion detection */
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003063 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x02, 0x02);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003064 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003065 } else {
3066 /* Make sure the HPH schmitt trigger is OFF */
3067 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12, 0x00);
3068
3069 /* enable the mic line schmitt trigger */
3070 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x60,
3071 calibration->mic_current << 5);
3072 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
3073 0x80, 0x80);
3074 usleep_range(calibration->mic_pid, calibration->mic_pid);
3075 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
3076 0x10, 0x10);
3077
3078 /* Setup for low power removal detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003079 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0x2);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003080 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003081
3082 if (snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x4) {
3083 if (!(tabla->clock_active)) {
3084 tabla_codec_enable_config_mode(codec, 1);
3085 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07003086 0x06, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003087 usleep_range(calibration->shutdown_plug_removal,
3088 calibration->shutdown_plug_removal);
3089 tabla_codec_enable_config_mode(codec, 0);
3090 } else
3091 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07003092 0x06, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003093 }
3094
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003095 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.int_rbias, 0x80, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003096
3097 /* If central bandgap disabled */
3098 if (!(snd_soc_read(codec, TABLA_A_PIN_CTL_OE1) & 1)) {
3099 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x3, 0x3);
3100 usleep_range(calibration->bg_fast_settle,
3101 calibration->bg_fast_settle);
3102 central_bias_enabled = 1;
3103 }
3104
3105 /* If LDO_H disabled */
3106 if (snd_soc_read(codec, TABLA_A_PIN_CTL_OE0) & 0x80) {
3107 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x10, 0);
3108 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0x80);
3109 usleep_range(calibration->tldoh, calibration->tldoh);
3110 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0);
3111
3112 if (central_bias_enabled)
3113 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x1, 0);
3114 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003115
3116 snd_soc_update_bits(codec, TABLA_A_MICB_4_MBHC, 0x3, calibration->bias);
3117
3118 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
3119 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
3120 return 0;
3121}
3122
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003123static void tabla_lock_sleep(struct tabla_priv *tabla)
3124{
3125 int ret;
3126 while (!(ret = wait_event_timeout(tabla->pm_wq,
3127 atomic_inc_not_zero(&tabla->pm_cnt),
3128 2 * HZ))) {
3129 pr_err("%s: didn't wake up for 2000ms (%d), pm_cnt %d\n",
3130 __func__, ret, atomic_read(&tabla->pm_cnt));
3131 WARN_ON_ONCE(1);
3132 }
3133}
3134
3135static void tabla_unlock_sleep(struct tabla_priv *tabla)
3136{
3137 atomic_dec(&tabla->pm_cnt);
3138 wake_up(&tabla->pm_wq);
3139}
3140
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003141static void btn0_lpress_fn(struct work_struct *work)
3142{
3143 struct delayed_work *delayed_work;
3144 struct tabla_priv *tabla;
3145
3146 pr_debug("%s:\n", __func__);
3147
3148 delayed_work = to_delayed_work(work);
3149 tabla = container_of(delayed_work, struct tabla_priv, btn0_dwork);
3150
3151 if (tabla) {
3152 if (tabla->button_jack) {
3153 pr_debug("%s: Reporting long button press event\n",
3154 __func__);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003155 tabla_snd_soc_jack_report(tabla, tabla->button_jack,
3156 SND_JACK_BTN_0,
3157 SND_JACK_BTN_0);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003158 }
3159 } else {
3160 pr_err("%s: Bad tabla private data\n", __func__);
3161 }
3162
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003163 tabla_unlock_sleep(tabla);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003164}
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003165
Bradley Rubincb1e2732011-06-23 16:49:20 -07003166int tabla_hs_detect(struct snd_soc_codec *codec,
3167 struct snd_soc_jack *headset_jack, struct snd_soc_jack *button_jack,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003168 struct tabla_mbhc_calibration *calibration)
3169{
3170 struct tabla_priv *tabla;
Patrick Lai49efeac2011-11-03 11:01:12 -07003171 int rc;
3172
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003173 if (!codec || !calibration) {
3174 pr_err("Error: no codec or calibration\n");
3175 return -EINVAL;
3176 }
3177 tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003178 tabla->headset_jack = headset_jack;
3179 tabla->button_jack = button_jack;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003180 tabla->calibration = calibration;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003181 tabla_get_mbhc_micbias_regs(codec, &tabla->mbhc_bias_regs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003182
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003183 /* Put CFILT in fast mode by default */
3184 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl,
3185 0x40, TABLA_CFILT_FAST_MODE);
3186
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003187 INIT_DELAYED_WORK(&tabla->btn0_dwork, btn0_lpress_fn);
Patrick Lai49efeac2011-11-03 11:01:12 -07003188 INIT_WORK(&tabla->hphlocp_work, hphlocp_off_report);
3189 INIT_WORK(&tabla->hphrocp_work, hphrocp_off_report);
3190 rc = tabla_codec_enable_hs_detect(codec, 1);
3191
3192 if (!IS_ERR_VALUE(rc)) {
3193 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
3194 0x10);
3195 tabla_enable_irq(codec->control_data,
3196 TABLA_IRQ_HPH_PA_OCPL_FAULT);
3197 tabla_enable_irq(codec->control_data,
3198 TABLA_IRQ_HPH_PA_OCPR_FAULT);
3199 }
3200
3201 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003202}
3203EXPORT_SYMBOL_GPL(tabla_hs_detect);
3204
Bradley Rubincb1e2732011-06-23 16:49:20 -07003205static irqreturn_t tabla_dce_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003206{
3207 struct tabla_priv *priv = data;
3208 struct snd_soc_codec *codec = priv->codec;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003209 short bias_value;
Bradley Rubincb1e2732011-06-23 16:49:20 -07003210
3211 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
3212 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003213 tabla_lock_sleep(priv);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003214
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003215 bias_value = tabla_codec_read_dce_result(codec);
Bhalchandra Gajare30cf4842011-10-17 18:12:52 -07003216 pr_debug("%s: button press interrupt, bias value(DCE Read)=%d\n",
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003217 __func__, bias_value);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003218
Bhalchandra Gajare30cf4842011-10-17 18:12:52 -07003219 bias_value = tabla_codec_read_sta_result(codec);
3220 pr_debug("%s: button press interrupt, bias value(STA Read)=%d\n",
3221 __func__, bias_value);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003222 /*
3223 * TODO: If button pressed is not button 0,
3224 * report the button press event immediately.
3225 */
3226 priv->buttons_pressed |= SND_JACK_BTN_0;
Bradley Rubincb1e2732011-06-23 16:49:20 -07003227
Bradley Rubin688c66a2011-08-16 12:25:13 -07003228 msleep(100);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003229
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003230 if (schedule_delayed_work(&priv->btn0_dwork,
3231 msecs_to_jiffies(400)) == 0) {
3232 WARN(1, "Button pressed twice without release event\n");
3233 tabla_unlock_sleep(priv);
3234 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003235
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003236 return IRQ_HANDLED;
3237}
3238
Bradley Rubincb1e2732011-06-23 16:49:20 -07003239static irqreturn_t tabla_release_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003240{
3241 struct tabla_priv *priv = data;
3242 struct snd_soc_codec *codec = priv->codec;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003243 int ret, mic_voltage;
3244
Bradley Rubin4d09cf42011-08-17 17:59:16 -07003245 pr_debug("%s\n", __func__);
3246 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003247 tabla_lock_sleep(priv);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003248
Bhalchandra Gajare30cf4842011-10-17 18:12:52 -07003249 mic_voltage = tabla_codec_read_dce_result(codec);
3250 pr_debug("%s: Microphone Voltage on release(DCE Read) = %d\n",
3251 __func__, mic_voltage);
3252
Bradley Rubincb1e2732011-06-23 16:49:20 -07003253 if (priv->buttons_pressed & SND_JACK_BTN_0) {
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003254 ret = cancel_delayed_work(&priv->btn0_dwork);
3255
3256 if (ret == 0) {
3257
3258 pr_debug("%s: Reporting long button release event\n",
3259 __func__);
3260 if (priv->button_jack) {
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003261 tabla_snd_soc_jack_report(priv,
3262 priv->button_jack, 0,
3263 SND_JACK_BTN_0);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003264 }
3265
3266 } else {
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003267 /* if scheduled btn0_dwork is canceled from here,
3268 * we have to unlock from here instead btn0_work */
3269 tabla_unlock_sleep(priv);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003270 mic_voltage =
3271 tabla_codec_measure_micbias_voltage(codec, 0);
Bhalchandra Gajare30cf4842011-10-17 18:12:52 -07003272 pr_debug("%s: Mic Voltage on release(new STA) = %d\n",
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003273 __func__, mic_voltage);
3274
3275 if (mic_voltage < -2000 || mic_voltage > -670) {
3276 pr_debug("%s: Fake buttton press interrupt\n",
3277 __func__);
3278 } else {
3279
3280 if (priv->button_jack) {
3281 pr_debug("%s:reporting short button press and release\n",
3282 __func__);
3283
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003284 tabla_snd_soc_jack_report(priv,
3285 priv->button_jack,
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003286 SND_JACK_BTN_0, SND_JACK_BTN_0);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003287 tabla_snd_soc_jack_report(priv,
3288 priv->button_jack,
3289 0, SND_JACK_BTN_0);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003290 }
3291 }
3292 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003293
Bradley Rubincb1e2732011-06-23 16:49:20 -07003294 priv->buttons_pressed &= ~SND_JACK_BTN_0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003295 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003296
Bradley Rubin688c66a2011-08-16 12:25:13 -07003297 tabla_codec_start_hs_polling(codec);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003298 tabla_unlock_sleep(priv);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003299 return IRQ_HANDLED;
3300}
3301
Bradley Rubincb1e2732011-06-23 16:49:20 -07003302static void tabla_codec_shutdown_hs_removal_detect(struct snd_soc_codec *codec)
3303{
3304 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
3305 struct tabla_mbhc_calibration *calibration = tabla->calibration;
Bradley Rubincb1e2732011-06-23 16:49:20 -07003306
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003307 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07003308 tabla_codec_enable_config_mode(codec, 1);
3309
3310 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
3311 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x6, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003312
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003313 snd_soc_update_bits(codec,
3314 tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003315 usleep_range(calibration->shutdown_plug_removal,
3316 calibration->shutdown_plug_removal);
3317
3318 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0xA, 0x8);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003319 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07003320 tabla_codec_enable_config_mode(codec, 0);
3321
3322 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x00);
3323}
3324
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003325static void tabla_codec_shutdown_hs_polling(struct snd_soc_codec *codec)
3326{
3327 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003328
3329 tabla_codec_shutdown_hs_removal_detect(codec);
3330
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003331 if (!tabla->mclk_enabled) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003332 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0x00);
3333 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_AUDIO_MODE);
3334 tabla_codec_enable_clock_block(codec, 0);
3335 }
3336
3337 tabla->mbhc_polling_active = false;
3338}
3339
Patrick Lai49efeac2011-11-03 11:01:12 -07003340static irqreturn_t tabla_hphl_ocp_irq(int irq, void *data)
3341{
3342 struct tabla_priv *tabla = data;
3343 struct snd_soc_codec *codec;
3344
3345 pr_info("%s: received HPHL OCP irq\n", __func__);
3346
3347 if (tabla) {
3348 codec = tabla->codec;
3349 tabla_disable_irq(codec->control_data,
3350 TABLA_IRQ_HPH_PA_OCPL_FAULT);
3351 tabla->hph_status |= SND_JACK_OC_HPHL;
3352 if (tabla->headset_jack) {
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003353 tabla_snd_soc_jack_report(tabla, tabla->headset_jack,
3354 tabla->hph_status,
3355 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07003356 }
3357 } else {
3358 pr_err("%s: Bad tabla private data\n", __func__);
3359 }
3360
3361 return IRQ_HANDLED;
3362}
3363
3364static irqreturn_t tabla_hphr_ocp_irq(int irq, void *data)
3365{
3366 struct tabla_priv *tabla = data;
3367 struct snd_soc_codec *codec;
3368
3369 pr_info("%s: received HPHR OCP irq\n", __func__);
3370
3371 if (tabla) {
3372 codec = tabla->codec;
3373 tabla_disable_irq(codec->control_data,
3374 TABLA_IRQ_HPH_PA_OCPR_FAULT);
3375 tabla->hph_status |= SND_JACK_OC_HPHR;
3376 if (tabla->headset_jack) {
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003377 tabla_snd_soc_jack_report(tabla, tabla->headset_jack,
3378 tabla->hph_status,
3379 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07003380 }
3381 } else {
3382 pr_err("%s: Bad tabla private data\n", __func__);
3383 }
3384
3385 return IRQ_HANDLED;
3386}
3387
Joonwoo Parka9444452011-12-08 18:48:27 -08003388static void tabla_sync_hph_state(struct tabla_priv *tabla)
3389{
3390 if (test_and_clear_bit(TABLA_HPHR_PA_OFF_ACK,
3391 &tabla->hph_pa_dac_state)) {
3392 pr_debug("%s: HPHR clear flag and enable PA\n", __func__);
3393 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x10,
3394 1 << 4);
3395 }
3396 if (test_and_clear_bit(TABLA_HPHL_PA_OFF_ACK,
3397 &tabla->hph_pa_dac_state)) {
3398 pr_debug("%s: HPHL clear flag and enable PA\n", __func__);
3399 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x20,
3400 1 << 5);
3401 }
3402
3403 if (test_and_clear_bit(TABLA_HPHR_DAC_OFF_ACK,
3404 &tabla->hph_pa_dac_state)) {
3405 pr_debug("%s: HPHR clear flag and enable DAC\n", __func__);
3406 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_R_DAC_CTL,
3407 0xC0, 0xC0);
3408 }
3409 if (test_and_clear_bit(TABLA_HPHL_DAC_OFF_ACK,
3410 &tabla->hph_pa_dac_state)) {
3411 pr_debug("%s: HPHL clear flag and enable DAC\n", __func__);
3412 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_L_DAC_CTL,
3413 0xC0, 0xC0);
3414 }
3415}
3416
Bradley Rubincb1e2732011-06-23 16:49:20 -07003417static irqreturn_t tabla_hs_insert_irq(int irq, void *data)
3418{
3419 struct tabla_priv *priv = data;
3420 struct snd_soc_codec *codec = priv->codec;
Bradley Rubin355611a2011-08-24 14:01:18 -07003421 int ldo_h_on, micb_cfilt_on;
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003422 short mic_voltage;
3423 short threshold_no_mic = 0xF7F6;
3424 short threshold_fake_insert = 0xFD30;
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003425 u8 is_removal;
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003426
Bradley Rubin4d09cf42011-08-17 17:59:16 -07003427 pr_debug("%s\n", __func__);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003428 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003429 tabla_lock_sleep(priv);
3430
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003431 is_removal = snd_soc_read(codec, TABLA_A_CDC_MBHC_INT_CTL) & 0x02;
3432 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x03, 0x00);
3433
3434 /* Turn off both HPH and MIC line schmitt triggers */
3435 snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg,
3436 0x90, 0x00);
3437 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003438
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08003439 if (priv->fake_insert_context) {
3440 pr_debug("%s: fake context interrupt, reset insertion\n",
3441 __func__);
3442 priv->fake_insert_context = false;
3443 tabla_codec_shutdown_hs_polling(codec);
3444 tabla_codec_enable_hs_detect(codec, 1);
3445 return IRQ_HANDLED;
3446 }
3447
3448
Bradley Rubin355611a2011-08-24 14:01:18 -07003449 ldo_h_on = snd_soc_read(codec, TABLA_A_LDO_H_MODE_1) & 0x80;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003450 micb_cfilt_on = snd_soc_read(codec,
3451 priv->mbhc_bias_regs.cfilt_ctl) & 0x80;
Bradley Rubin355611a2011-08-24 14:01:18 -07003452
3453 if (!ldo_h_on)
3454 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x80, 0x80);
3455 if (!micb_cfilt_on)
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003456 snd_soc_update_bits(codec, priv->mbhc_bias_regs.cfilt_ctl,
3457 0x80, 0x80);
Bradley Rubin355611a2011-08-24 14:01:18 -07003458
Bradley Rubincb1e2732011-06-23 16:49:20 -07003459 usleep_range(priv->calibration->setup_plug_removal_delay,
3460 priv->calibration->setup_plug_removal_delay);
3461
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003462 if (!ldo_h_on)
3463 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x80, 0x0);
3464 if (!micb_cfilt_on)
3465 snd_soc_update_bits(codec, priv->mbhc_bias_regs.cfilt_ctl,
3466 0x80, 0x0);
3467
3468 if (is_removal) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003469 /*
3470 * If headphone is removed while playback is in progress,
3471 * it is possible that micbias will be switched to VDDIO.
3472 */
3473 if (priv->mbhc_micbias_switched)
3474 tabla_codec_switch_micbias(codec, 0);
Patrick Lai72aa4da2011-12-08 12:38:18 -08003475 priv->hph_status &= ~SND_JACK_HEADPHONE;
Joonwoo Parka9444452011-12-08 18:48:27 -08003476
3477 /* If headphone PA is on, check if userspace receives
3478 * removal event to sync-up PA's state */
3479 if (tabla_is_hph_pa_on(codec)) {
3480 set_bit(TABLA_HPHL_PA_OFF_ACK, &priv->hph_pa_dac_state);
3481 set_bit(TABLA_HPHR_PA_OFF_ACK, &priv->hph_pa_dac_state);
3482 }
3483
3484 if (tabla_is_hph_dac_on(codec, 1))
3485 set_bit(TABLA_HPHL_DAC_OFF_ACK,
3486 &priv->hph_pa_dac_state);
3487 if (tabla_is_hph_dac_on(codec, 0))
3488 set_bit(TABLA_HPHR_DAC_OFF_ACK,
3489 &priv->hph_pa_dac_state);
3490
Bradley Rubincb1e2732011-06-23 16:49:20 -07003491 if (priv->headset_jack) {
3492 pr_debug("%s: Reporting removal\n", __func__);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003493 tabla_snd_soc_jack_report(priv, priv->headset_jack,
3494 priv->hph_status,
3495 TABLA_JACK_MASK);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003496 }
3497 tabla_codec_shutdown_hs_removal_detect(codec);
3498 tabla_codec_enable_hs_detect(codec, 1);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003499 tabla_unlock_sleep(priv);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003500 return IRQ_HANDLED;
3501 }
3502
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003503 mic_voltage = tabla_codec_setup_hs_polling(codec);
Bradley Rubin355611a2011-08-24 14:01:18 -07003504
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003505 if (mic_voltage > threshold_fake_insert) {
3506 pr_debug("%s: Fake insertion interrupt, mic_voltage = %x\n",
3507 __func__, mic_voltage);
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08003508
3509 /* Disable HPH trigger and enable MIC line trigger */
3510 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12, 0x00);
3511
3512 snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg, 0x60,
3513 priv->calibration->mic_current << 5);
3514 snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg,
3515 0x80, 0x80);
3516 usleep_range(priv->calibration->mic_pid,
3517 priv->calibration->mic_pid);
3518 snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg,
3519 0x10, 0x10);
3520
3521 /* Setup for insertion detection */
3522 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
3523 priv->fake_insert_context = true;
3524 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
3525 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
3526
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003527 } else if (mic_voltage < threshold_no_mic) {
3528 pr_debug("%s: Headphone Detected, mic_voltage = %x\n",
3529 __func__, mic_voltage);
Patrick Lai49efeac2011-11-03 11:01:12 -07003530 priv->hph_status |= SND_JACK_HEADPHONE;
Bradley Rubincb1e2732011-06-23 16:49:20 -07003531 if (priv->headset_jack) {
3532 pr_debug("%s: Reporting insertion %d\n", __func__,
3533 SND_JACK_HEADPHONE);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003534 tabla_snd_soc_jack_report(priv, priv->headset_jack,
3535 priv->hph_status,
3536 TABLA_JACK_MASK);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003537 }
3538 tabla_codec_shutdown_hs_polling(codec);
3539 tabla_codec_enable_hs_detect(codec, 0);
Joonwoo Parka9444452011-12-08 18:48:27 -08003540 tabla_sync_hph_state(priv);
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003541 } else {
3542 pr_debug("%s: Headset detected, mic_voltage = %x\n",
3543 __func__, mic_voltage);
Patrick Lai49efeac2011-11-03 11:01:12 -07003544 priv->hph_status |= SND_JACK_HEADSET;
Bradley Rubincb1e2732011-06-23 16:49:20 -07003545 if (priv->headset_jack) {
3546 pr_debug("%s: Reporting insertion %d\n", __func__,
3547 SND_JACK_HEADSET);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003548 tabla_snd_soc_jack_report(priv, priv->headset_jack,
3549 priv->hph_status,
3550 TABLA_JACK_MASK);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003551 }
3552 tabla_codec_start_hs_polling(codec);
Joonwoo Parka9444452011-12-08 18:48:27 -08003553 tabla_sync_hph_state(priv);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003554 }
3555
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003556 tabla_unlock_sleep(priv);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003557 return IRQ_HANDLED;
3558}
3559
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003560static irqreturn_t tabla_hs_remove_irq(int irq, void *data)
3561{
3562 struct tabla_priv *priv = data;
3563 struct snd_soc_codec *codec = priv->codec;
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003564 short bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003565
3566 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
3567 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07003568 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003569 tabla_lock_sleep(priv);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003570
3571 usleep_range(priv->calibration->shutdown_plug_removal,
3572 priv->calibration->shutdown_plug_removal);
3573
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003574 bias_value = tabla_codec_measure_micbias_voltage(codec, 1);
3575 pr_debug("removal interrupt, bias value is %d\n", bias_value);
3576
3577 if (bias_value < -90) {
3578 pr_debug("False alarm, headset not actually removed\n");
3579 tabla_codec_start_hs_polling(codec);
3580 } else {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003581 /*
3582 * If this removal is not false, first check the micbias
3583 * switch status and switch it to LDOH if it is already
3584 * switched to VDDIO.
3585 */
3586 if (priv->mbhc_micbias_switched)
3587 tabla_codec_switch_micbias(codec, 0);
Patrick Lai49efeac2011-11-03 11:01:12 -07003588 priv->hph_status &= ~SND_JACK_HEADSET;
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003589 if (priv->headset_jack) {
3590 pr_debug("%s: Reporting removal\n", __func__);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003591 tabla_snd_soc_jack_report(priv, priv->headset_jack, 0,
3592 TABLA_JACK_MASK);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003593 }
3594 tabla_codec_shutdown_hs_polling(codec);
3595
3596 tabla_codec_enable_hs_detect(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003597 }
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003598
3599 tabla_unlock_sleep(priv);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003600 return IRQ_HANDLED;
3601}
3602
3603static unsigned long slimbus_value;
3604
3605static irqreturn_t tabla_slimbus_irq(int irq, void *data)
3606{
3607 struct tabla_priv *priv = data;
3608 struct snd_soc_codec *codec = priv->codec;
3609 int i, j;
3610 u8 val;
3611
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003612 tabla_lock_sleep(priv);
3613
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003614 for (i = 0; i < TABLA_SLIM_NUM_PORT_REG; i++) {
3615 slimbus_value = tabla_interface_reg_read(codec->control_data,
3616 TABLA_SLIM_PGD_PORT_INT_STATUS0 + i);
3617 for_each_set_bit(j, &slimbus_value, BITS_PER_BYTE) {
3618 val = tabla_interface_reg_read(codec->control_data,
3619 TABLA_SLIM_PGD_PORT_INT_SOURCE0 + i*8 + j);
3620 if (val & 0x1)
3621 pr_err_ratelimited("overflow error on port %x,"
3622 " value %x\n", i*8 + j, val);
3623 if (val & 0x2)
3624 pr_err_ratelimited("underflow error on port %x,"
3625 " value %x\n", i*8 + j, val);
3626 }
3627 tabla_interface_reg_write(codec->control_data,
3628 TABLA_SLIM_PGD_PORT_INT_CLR0 + i, 0xFF);
3629 }
3630
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003631 tabla_unlock_sleep(priv);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003632 return IRQ_HANDLED;
3633}
3634
Patrick Lai3043fba2011-08-01 14:15:57 -07003635
3636static int tabla_handle_pdata(struct tabla_priv *tabla)
3637{
3638 struct snd_soc_codec *codec = tabla->codec;
3639 struct tabla_pdata *pdata = tabla->pdata;
3640 int k1, k2, k3, rc = 0;
Santosh Mardi22920282011-10-26 02:38:40 +05303641 u8 leg_mode = pdata->amic_settings.legacy_mode;
3642 u8 txfe_bypass = pdata->amic_settings.txfe_enable;
3643 u8 txfe_buff = pdata->amic_settings.txfe_buff;
3644 u8 flag = pdata->amic_settings.use_pdata;
3645 u8 i = 0, j = 0;
3646 u8 val_txfe = 0, value = 0;
Patrick Lai3043fba2011-08-01 14:15:57 -07003647
3648 if (!pdata) {
3649 rc = -ENODEV;
3650 goto done;
3651 }
3652
3653 /* Make sure settings are correct */
3654 if ((pdata->micbias.ldoh_v > TABLA_LDOH_2P85_V) ||
3655 (pdata->micbias.bias1_cfilt_sel > TABLA_CFILT3_SEL) ||
3656 (pdata->micbias.bias2_cfilt_sel > TABLA_CFILT3_SEL) ||
3657 (pdata->micbias.bias3_cfilt_sel > TABLA_CFILT3_SEL) ||
3658 (pdata->micbias.bias4_cfilt_sel > TABLA_CFILT3_SEL)) {
3659 rc = -EINVAL;
3660 goto done;
3661 }
3662
3663 /* figure out k value */
3664 k1 = tabla_find_k_value(pdata->micbias.ldoh_v,
3665 pdata->micbias.cfilt1_mv);
3666 k2 = tabla_find_k_value(pdata->micbias.ldoh_v,
3667 pdata->micbias.cfilt2_mv);
3668 k3 = tabla_find_k_value(pdata->micbias.ldoh_v,
3669 pdata->micbias.cfilt3_mv);
3670
3671 if (IS_ERR_VALUE(k1) || IS_ERR_VALUE(k2) || IS_ERR_VALUE(k3)) {
3672 rc = -EINVAL;
3673 goto done;
3674 }
3675
3676 /* Set voltage level and always use LDO */
3677 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x0C,
3678 (pdata->micbias.ldoh_v << 2));
3679
3680 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_1_VAL, 0xFC,
3681 (k1 << 2));
3682 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_2_VAL, 0xFC,
3683 (k2 << 2));
3684 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_3_VAL, 0xFC,
3685 (k3 << 2));
3686
3687 snd_soc_update_bits(codec, TABLA_A_MICB_1_CTL, 0x60,
3688 (pdata->micbias.bias1_cfilt_sel << 5));
3689 snd_soc_update_bits(codec, TABLA_A_MICB_2_CTL, 0x60,
3690 (pdata->micbias.bias2_cfilt_sel << 5));
3691 snd_soc_update_bits(codec, TABLA_A_MICB_3_CTL, 0x60,
3692 (pdata->micbias.bias3_cfilt_sel << 5));
3693 snd_soc_update_bits(codec, TABLA_A_MICB_4_CTL, 0x60,
3694 (pdata->micbias.bias4_cfilt_sel << 5));
3695
Santosh Mardi22920282011-10-26 02:38:40 +05303696 for (i = 0; i < 6; j++, i += 2) {
3697 if (flag & (0x01 << i)) {
3698 value = (leg_mode & (0x01 << i)) ? 0x10 : 0x00;
3699 val_txfe = (txfe_bypass & (0x01 << i)) ? 0x20 : 0x00;
3700 val_txfe = val_txfe |
3701 ((txfe_buff & (0x01 << i)) ? 0x10 : 0x00);
3702 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
3703 0x10, value);
3704 snd_soc_update_bits(codec,
3705 TABLA_A_TX_1_2_TEST_EN + j * 10,
3706 0x30, val_txfe);
3707 }
3708 if (flag & (0x01 << (i + 1))) {
3709 value = (leg_mode & (0x01 << (i + 1))) ? 0x01 : 0x00;
3710 val_txfe = (txfe_bypass &
3711 (0x01 << (i + 1))) ? 0x02 : 0x00;
3712 val_txfe |= (txfe_buff &
3713 (0x01 << (i + 1))) ? 0x01 : 0x00;
3714 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
3715 0x01, value);
3716 snd_soc_update_bits(codec,
3717 TABLA_A_TX_1_2_TEST_EN + j * 10,
3718 0x03, val_txfe);
3719 }
3720 }
3721 if (flag & 0x40) {
3722 value = (leg_mode & 0x40) ? 0x10 : 0x00;
3723 value = value | ((txfe_bypass & 0x40) ? 0x02 : 0x00);
3724 value = value | ((txfe_buff & 0x40) ? 0x01 : 0x00);
3725 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN,
3726 0x13, value);
3727 }
Patrick Lai49efeac2011-11-03 11:01:12 -07003728
3729 if (pdata->ocp.use_pdata) {
3730 /* not defined in CODEC specification */
3731 if (pdata->ocp.hph_ocp_limit == 1 ||
3732 pdata->ocp.hph_ocp_limit == 5) {
3733 rc = -EINVAL;
3734 goto done;
3735 }
3736 snd_soc_update_bits(codec, TABLA_A_RX_COM_OCP_CTL,
3737 0x0F, pdata->ocp.num_attempts);
3738 snd_soc_write(codec, TABLA_A_RX_COM_OCP_COUNT,
3739 ((pdata->ocp.run_time << 4) | pdata->ocp.wait_time));
3740 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL,
3741 0xE0, (pdata->ocp.hph_ocp_limit << 5));
3742 }
Patrick Lai3043fba2011-08-01 14:15:57 -07003743done:
3744 return rc;
3745}
3746
Kiran Kandi1f6fd722011-08-11 10:36:11 -07003747static const struct tabla_reg_mask_val tabla_1_1_reg_defaults[] = {
3748
3749 /* Tabla 1.1 MICBIAS changes */
3750 TABLA_REG_VAL(TABLA_A_MICB_1_INT_RBIAS, 0x24),
3751 TABLA_REG_VAL(TABLA_A_MICB_2_INT_RBIAS, 0x24),
3752 TABLA_REG_VAL(TABLA_A_MICB_3_INT_RBIAS, 0x24),
3753 TABLA_REG_VAL(TABLA_A_MICB_4_INT_RBIAS, 0x24),
3754
3755 /* Tabla 1.1 HPH changes */
3756 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_PA, 0x57),
3757 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_LDO, 0x56),
3758
3759 /* Tabla 1.1 EAR PA changes */
3760 TABLA_REG_VAL(TABLA_A_RX_EAR_BIAS_PA, 0xA6),
3761 TABLA_REG_VAL(TABLA_A_RX_EAR_GAIN, 0x02),
3762 TABLA_REG_VAL(TABLA_A_RX_EAR_VCM, 0x03),
3763
3764 /* Tabla 1.1 Lineout_5 Changes */
3765 TABLA_REG_VAL(TABLA_A_RX_LINE_5_GAIN, 0x10),
3766
3767 /* Tabla 1.1 RX Changes */
3768 TABLA_REG_VAL(TABLA_A_CDC_RX1_B5_CTL, 0x78),
3769 TABLA_REG_VAL(TABLA_A_CDC_RX2_B5_CTL, 0x78),
3770 TABLA_REG_VAL(TABLA_A_CDC_RX3_B5_CTL, 0x78),
3771 TABLA_REG_VAL(TABLA_A_CDC_RX4_B5_CTL, 0x78),
3772 TABLA_REG_VAL(TABLA_A_CDC_RX5_B5_CTL, 0x78),
3773 TABLA_REG_VAL(TABLA_A_CDC_RX6_B5_CTL, 0x78),
3774 TABLA_REG_VAL(TABLA_A_CDC_RX7_B5_CTL, 0x78),
3775
3776 /* Tabla 1.1 RX1 and RX2 Changes */
3777 TABLA_REG_VAL(TABLA_A_CDC_RX1_B6_CTL, 0xA0),
3778 TABLA_REG_VAL(TABLA_A_CDC_RX2_B6_CTL, 0xA0),
3779
3780 /* Tabla 1.1 RX3 to RX7 Changes */
3781 TABLA_REG_VAL(TABLA_A_CDC_RX3_B6_CTL, 0x80),
3782 TABLA_REG_VAL(TABLA_A_CDC_RX4_B6_CTL, 0x80),
3783 TABLA_REG_VAL(TABLA_A_CDC_RX5_B6_CTL, 0x80),
3784 TABLA_REG_VAL(TABLA_A_CDC_RX6_B6_CTL, 0x80),
3785 TABLA_REG_VAL(TABLA_A_CDC_RX7_B6_CTL, 0x80),
3786
3787 /* Tabla 1.1 CLASSG Changes */
3788 TABLA_REG_VAL(TABLA_A_CDC_CLSG_FREQ_THRESH_B3_CTL, 0x1B),
3789};
3790
3791static const struct tabla_reg_mask_val tabla_2_0_reg_defaults[] = {
3792
3793 /* Tabla 2.0 MICBIAS changes */
3794 TABLA_REG_VAL(TABLA_A_MICB_2_MBHC, 0x02),
3795};
3796
3797static void tabla_update_reg_defaults(struct snd_soc_codec *codec)
3798{
3799 u32 i;
3800
3801 for (i = 0; i < ARRAY_SIZE(tabla_1_1_reg_defaults); i++)
3802 snd_soc_write(codec, tabla_1_1_reg_defaults[i].reg,
3803 tabla_1_1_reg_defaults[i].val);
3804
3805 for (i = 0; i < ARRAY_SIZE(tabla_2_0_reg_defaults); i++)
3806 snd_soc_write(codec, tabla_2_0_reg_defaults[i].reg,
3807 tabla_2_0_reg_defaults[i].val);
3808}
3809
3810static const struct tabla_reg_mask_val tabla_codec_reg_init_val[] = {
Patrick Lai49efeac2011-11-03 11:01:12 -07003811 /* Initialize current threshold to 350MA */
3812 {TABLA_A_RX_HPH_OCP_CTL, 0xE0, 0x60},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07003813
Santosh Mardi32171012011-10-28 23:32:06 +05303814 {TABLA_A_QFUSE_CTL, 0xFF, 0x03},
3815
Kiran Kandi1f6fd722011-08-11 10:36:11 -07003816 /* Initialize gain registers to use register gain */
3817 {TABLA_A_RX_HPH_L_GAIN, 0x10, 0x10},
3818 {TABLA_A_RX_HPH_R_GAIN, 0x10, 0x10},
3819 {TABLA_A_RX_LINE_1_GAIN, 0x10, 0x10},
3820 {TABLA_A_RX_LINE_2_GAIN, 0x10, 0x10},
3821 {TABLA_A_RX_LINE_3_GAIN, 0x10, 0x10},
3822 {TABLA_A_RX_LINE_4_GAIN, 0x10, 0x10},
3823
3824 /* Initialize mic biases to differential mode */
3825 {TABLA_A_MICB_1_INT_RBIAS, 0x24, 0x24},
3826 {TABLA_A_MICB_2_INT_RBIAS, 0x24, 0x24},
3827 {TABLA_A_MICB_3_INT_RBIAS, 0x24, 0x24},
3828 {TABLA_A_MICB_4_INT_RBIAS, 0x24, 0x24},
3829
3830 {TABLA_A_CDC_CONN_CLSG_CTL, 0x3C, 0x14},
3831
3832 /* Use 16 bit sample size for TX1 to TX6 */
3833 {TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0x30, 0x20},
3834 {TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0x30, 0x20},
3835 {TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0x30, 0x20},
3836 {TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0x30, 0x20},
3837 {TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0x30, 0x20},
3838 {TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0x30, 0x20},
3839
3840 /* Use 16 bit sample size for TX7 to TX10 */
3841 {TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0x60, 0x40},
3842 {TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0x60, 0x40},
3843 {TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0x60, 0x40},
3844 {TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0x60, 0x40},
3845
3846 /* Use 16 bit sample size for RX */
3847 {TABLA_A_CDC_CONN_RX_SB_B1_CTL, 0xFF, 0xAA},
3848 {TABLA_A_CDC_CONN_RX_SB_B2_CTL, 0xFF, 0xAA},
3849
3850 /*enable HPF filter for TX paths */
3851 {TABLA_A_CDC_TX1_MUX_CTL, 0x8, 0x0},
3852 {TABLA_A_CDC_TX2_MUX_CTL, 0x8, 0x0},
3853 {TABLA_A_CDC_TX3_MUX_CTL, 0x8, 0x0},
3854 {TABLA_A_CDC_TX4_MUX_CTL, 0x8, 0x0},
3855 {TABLA_A_CDC_TX5_MUX_CTL, 0x8, 0x0},
3856 {TABLA_A_CDC_TX6_MUX_CTL, 0x8, 0x0},
3857 {TABLA_A_CDC_TX7_MUX_CTL, 0x8, 0x0},
3858 {TABLA_A_CDC_TX8_MUX_CTL, 0x8, 0x0},
3859 {TABLA_A_CDC_TX9_MUX_CTL, 0x8, 0x0},
3860 {TABLA_A_CDC_TX10_MUX_CTL, 0x8, 0x0},
3861};
3862
3863static void tabla_codec_init_reg(struct snd_soc_codec *codec)
3864{
3865 u32 i;
3866
3867 for (i = 0; i < ARRAY_SIZE(tabla_codec_reg_init_val); i++)
3868 snd_soc_update_bits(codec, tabla_codec_reg_init_val[i].reg,
3869 tabla_codec_reg_init_val[i].mask,
3870 tabla_codec_reg_init_val[i].val);
3871}
3872
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003873static int tabla_codec_probe(struct snd_soc_codec *codec)
3874{
3875 struct tabla *control;
3876 struct tabla_priv *tabla;
3877 struct snd_soc_dapm_context *dapm = &codec->dapm;
3878 int ret = 0;
3879 int i;
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003880 u8 tabla_version;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003881
3882 codec->control_data = dev_get_drvdata(codec->dev->parent);
3883 control = codec->control_data;
3884
3885 tabla = kzalloc(sizeof(struct tabla_priv), GFP_KERNEL);
3886 if (!tabla) {
3887 dev_err(codec->dev, "Failed to allocate private data\n");
3888 return -ENOMEM;
3889 }
3890
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003891 /* Make sure mbhc micbias register addresses are zeroed out */
3892 memset(&tabla->mbhc_bias_regs, 0,
3893 sizeof(struct mbhc_micbias_regs));
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003894 tabla->cfilt_k_value = 0;
3895 tabla->mbhc_micbias_switched = false;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003896
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003897 snd_soc_codec_set_drvdata(codec, tabla);
3898
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003899 tabla->mclk_enabled = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003900 tabla->bandgap_type = TABLA_BANDGAP_OFF;
3901 tabla->clock_active = false;
3902 tabla->config_mode_active = false;
3903 tabla->mbhc_polling_active = false;
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08003904 tabla->fake_insert_context = false;
Bradley Rubincb3950a2011-08-18 13:07:26 -07003905 tabla->no_mic_headset_override = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003906 tabla->codec = codec;
Patrick Lai3043fba2011-08-01 14:15:57 -07003907 tabla->pdata = dev_get_platdata(codec->dev->parent);
Santosh Mardie15e2302011-11-15 10:39:23 +05303908 tabla->intf_type = tabla_get_intf_type();
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003909 atomic_set(&tabla->pm_cnt, 1);
3910 init_waitqueue_head(&tabla->pm_wq);
Patrick Lai3043fba2011-08-01 14:15:57 -07003911
Santosh Mardi22920282011-10-26 02:38:40 +05303912 tabla_update_reg_defaults(codec);
3913 tabla_codec_init_reg(codec);
Patrick Lai3043fba2011-08-01 14:15:57 -07003914
Santosh Mardi22920282011-10-26 02:38:40 +05303915 ret = tabla_handle_pdata(tabla);
Patrick Lai3043fba2011-08-01 14:15:57 -07003916 if (IS_ERR_VALUE(ret)) {
3917 pr_err("%s: bad pdata\n", __func__);
3918 goto err_pdata;
3919 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003920
3921 /* TODO only enable bandgap when necessary in order to save power */
3922 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_AUDIO_MODE);
3923 tabla_codec_enable_clock_block(codec, 0);
3924
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003925 snd_soc_add_controls(codec, tabla_snd_controls,
3926 ARRAY_SIZE(tabla_snd_controls));
3927 snd_soc_dapm_new_controls(dapm, tabla_dapm_widgets,
3928 ARRAY_SIZE(tabla_dapm_widgets));
Santosh Mardie15e2302011-11-15 10:39:23 +05303929 if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
3930 snd_soc_dapm_new_controls(dapm, tabla_dapm_i2s_widgets,
3931 ARRAY_SIZE(tabla_dapm_i2s_widgets));
3932 snd_soc_dapm_add_routes(dapm, audio_i2s_map,
3933 ARRAY_SIZE(audio_i2s_map));
3934 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003935 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003936
3937 tabla_version = snd_soc_read(codec, TABLA_A_CHIP_VERSION);
3938 pr_info("%s : Tabla version reg 0x%2x\n", __func__, (u32)tabla_version);
3939
3940 tabla_version &= 0x1F;
3941 pr_info("%s : Tabla version %u\n", __func__, (u32)tabla_version);
3942
Kiran Kandi7a9fd902011-11-14 13:51:45 -08003943 if ((tabla_version == TABLA_VERSION_1_0) ||
3944 (tabla_version == TABLA_VERSION_1_1)) {
3945 snd_soc_dapm_add_routes(dapm, tabla_1_x_lineout_2_to_4_map,
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003946 ARRAY_SIZE(tabla_1_x_lineout_2_to_4_map));
3947
Kiran Kandi7a9fd902011-11-14 13:51:45 -08003948 } else if (tabla_version == TABLA_VERSION_2_0) {
3949 snd_soc_dapm_add_routes(dapm, tabla_2_x_lineout_2_to_4_map,
3950 ARRAY_SIZE(tabla_2_x_lineout_2_to_4_map));
3951 } else {
3952 pr_err("%s : ERROR. Unsupported Tabla version 0x%2x\n",
3953 __func__, (u32)tabla_version);
3954 goto err_pdata;
3955 }
3956
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003957 snd_soc_dapm_sync(dapm);
3958
3959 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION,
3960 tabla_hs_insert_irq, "Headset insert detect", tabla);
3961 if (ret) {
3962 pr_err("%s: Failed to request irq %d\n", __func__,
3963 TABLA_IRQ_MBHC_INSERTION);
3964 goto err_insert_irq;
3965 }
3966 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
3967
3968 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL,
3969 tabla_hs_remove_irq, "Headset remove detect", tabla);
3970 if (ret) {
3971 pr_err("%s: Failed to request irq %d\n", __func__,
3972 TABLA_IRQ_MBHC_REMOVAL);
3973 goto err_remove_irq;
3974 }
3975 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
3976
3977 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07003978 tabla_dce_handler, "DC Estimation detect", tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003979 if (ret) {
3980 pr_err("%s: Failed to request irq %d\n", __func__,
3981 TABLA_IRQ_MBHC_POTENTIAL);
3982 goto err_potential_irq;
3983 }
3984 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
3985
Bradley Rubincb1e2732011-06-23 16:49:20 -07003986 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE,
3987 tabla_release_handler, "Button Release detect", tabla);
3988 if (ret) {
3989 pr_err("%s: Failed to request irq %d\n", __func__,
3990 TABLA_IRQ_MBHC_RELEASE);
3991 goto err_release_irq;
3992 }
Bradley Rubin4d09cf42011-08-17 17:59:16 -07003993 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003994
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003995 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_SLIMBUS,
3996 tabla_slimbus_irq, "SLIMBUS Slave", tabla);
3997 if (ret) {
3998 pr_err("%s: Failed to request irq %d\n", __func__,
3999 TABLA_IRQ_SLIMBUS);
4000 goto err_slimbus_irq;
4001 }
4002
4003 for (i = 0; i < TABLA_SLIM_NUM_PORT_REG; i++)
4004 tabla_interface_reg_write(codec->control_data,
4005 TABLA_SLIM_PGD_PORT_INT_EN0 + i, 0xFF);
4006
Patrick Lai49efeac2011-11-03 11:01:12 -07004007 ret = tabla_request_irq(codec->control_data,
4008 TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla_hphl_ocp_irq,
4009 "HPH_L OCP detect", tabla);
4010 if (ret) {
4011 pr_err("%s: Failed to request irq %d\n", __func__,
4012 TABLA_IRQ_HPH_PA_OCPL_FAULT);
4013 goto err_hphl_ocp_irq;
4014 }
Patrick Lai92032be2011-12-19 14:14:25 -08004015 tabla_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPL_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07004016
4017 ret = tabla_request_irq(codec->control_data,
4018 TABLA_IRQ_HPH_PA_OCPR_FAULT, tabla_hphr_ocp_irq,
4019 "HPH_R OCP detect", tabla);
4020 if (ret) {
4021 pr_err("%s: Failed to request irq %d\n", __func__,
4022 TABLA_IRQ_HPH_PA_OCPR_FAULT);
4023 goto err_hphr_ocp_irq;
4024 }
Patrick Lai92032be2011-12-19 14:14:25 -08004025 tabla_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPR_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07004026
Bradley Rubincb3950a2011-08-18 13:07:26 -07004027#ifdef CONFIG_DEBUG_FS
4028 debug_tabla_priv = tabla;
4029#endif
4030
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004031 return ret;
4032
Patrick Lai49efeac2011-11-03 11:01:12 -07004033err_hphr_ocp_irq:
4034 tabla_free_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla);
4035err_hphl_ocp_irq:
4036 tabla_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004037err_slimbus_irq:
Bradley Rubincb1e2732011-06-23 16:49:20 -07004038 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
4039err_release_irq:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004040 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
4041err_potential_irq:
4042 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
4043err_remove_irq:
4044 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
4045err_insert_irq:
Patrick Lai3043fba2011-08-01 14:15:57 -07004046err_pdata:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004047 kfree(tabla);
4048 return ret;
4049}
4050static int tabla_codec_remove(struct snd_soc_codec *codec)
4051{
4052 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
4053 tabla_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004054 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004055 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
4056 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
4057 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
4058 tabla_codec_disable_clock_block(codec);
4059 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
4060 kfree(tabla);
4061 return 0;
4062}
4063static struct snd_soc_codec_driver soc_codec_dev_tabla = {
4064 .probe = tabla_codec_probe,
4065 .remove = tabla_codec_remove,
4066 .read = tabla_read,
4067 .write = tabla_write,
4068
4069 .readable_register = tabla_readable,
4070 .volatile_register = tabla_volatile,
4071
4072 .reg_cache_size = TABLA_CACHE_SIZE,
4073 .reg_cache_default = tabla_reg_defaults,
4074 .reg_word_size = 1,
4075};
Bradley Rubincb3950a2011-08-18 13:07:26 -07004076
4077#ifdef CONFIG_DEBUG_FS
4078static struct dentry *debugfs_poke;
4079
4080static int codec_debug_open(struct inode *inode, struct file *file)
4081{
4082 file->private_data = inode->i_private;
4083 return 0;
4084}
4085
4086static ssize_t codec_debug_write(struct file *filp,
4087 const char __user *ubuf, size_t cnt, loff_t *ppos)
4088{
4089 char lbuf[32];
4090 char *buf;
4091 int rc;
4092
4093 if (cnt > sizeof(lbuf) - 1)
4094 return -EINVAL;
4095
4096 rc = copy_from_user(lbuf, ubuf, cnt);
4097 if (rc)
4098 return -EFAULT;
4099
4100 lbuf[cnt] = '\0';
4101 buf = (char *)lbuf;
4102 debug_tabla_priv->no_mic_headset_override = (*strsep(&buf, " ") == '0')
4103 ? false : true;
4104
4105 return rc;
4106}
4107
4108static const struct file_operations codec_debug_ops = {
4109 .open = codec_debug_open,
4110 .write = codec_debug_write,
4111};
4112#endif
4113
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004114#ifdef CONFIG_PM
4115static int tabla_suspend(struct device *dev)
4116{
4117 int ret = 0, cnt;
4118 struct platform_device *pdev = to_platform_device(dev);
4119 struct tabla_priv *tabla = platform_get_drvdata(pdev);
4120
4121 cnt = atomic_read(&tabla->pm_cnt);
4122 if (cnt > 0) {
4123 if (wait_event_timeout(tabla->pm_wq,
4124 (atomic_cmpxchg(&tabla->pm_cnt, 1, 0)
4125 == 1), 5 * HZ)) {
4126 dev_dbg(dev, "system suspend pm_cnt %d\n",
4127 atomic_read(&tabla->pm_cnt));
4128 } else {
4129 dev_err(dev, "%s timed out pm_cnt = %d\n",
4130 __func__, atomic_read(&tabla->pm_cnt));
4131 WARN_ON_ONCE(1);
4132 ret = -EBUSY;
4133 }
4134 } else if (cnt == 0)
4135 dev_warn(dev, "system is already in suspend, pm_cnt %d\n",
4136 atomic_read(&tabla->pm_cnt));
4137 else {
4138 WARN(1, "unexpected pm_cnt %d\n", cnt);
4139 ret = -EFAULT;
4140 }
4141
4142 return ret;
4143}
4144
4145static int tabla_resume(struct device *dev)
4146{
4147 int ret = 0, cnt;
4148 struct platform_device *pdev = to_platform_device(dev);
4149 struct tabla_priv *tabla = platform_get_drvdata(pdev);
4150
4151 cnt = atomic_cmpxchg(&tabla->pm_cnt, 0, 1);
4152 if (cnt == 0) {
4153 dev_dbg(dev, "system resume, pm_cnt %d\n",
4154 atomic_read(&tabla->pm_cnt));
4155 wake_up_all(&tabla->pm_wq);
4156 } else if (cnt > 0)
4157 dev_warn(dev, "system is already awake, pm_cnt %d\n", cnt);
4158 else {
4159 WARN(1, "unexpected pm_cnt %d\n", cnt);
4160 ret = -EFAULT;
4161 }
4162
4163 return ret;
4164}
4165
4166static const struct dev_pm_ops tabla_pm_ops = {
4167 .suspend = tabla_suspend,
4168 .resume = tabla_resume,
4169};
4170#endif
4171
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004172static int __devinit tabla_probe(struct platform_device *pdev)
4173{
Santosh Mardie15e2302011-11-15 10:39:23 +05304174 int ret = 0;
Bradley Rubincb3950a2011-08-18 13:07:26 -07004175#ifdef CONFIG_DEBUG_FS
4176 debugfs_poke = debugfs_create_file("TRRS",
4177 S_IFREG | S_IRUGO, NULL, (void *) "TRRS", &codec_debug_ops);
4178
4179#endif
Santosh Mardie15e2302011-11-15 10:39:23 +05304180 if (tabla_get_intf_type() == TABLA_INTERFACE_TYPE_SLIMBUS)
4181 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
4182 tabla_dai, ARRAY_SIZE(tabla_dai));
4183 else if (tabla_get_intf_type() == TABLA_INTERFACE_TYPE_I2C)
4184 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
4185 tabla_i2s_dai, ARRAY_SIZE(tabla_i2s_dai));
4186 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004187}
4188static int __devexit tabla_remove(struct platform_device *pdev)
4189{
4190 snd_soc_unregister_codec(&pdev->dev);
Bradley Rubincb3950a2011-08-18 13:07:26 -07004191
4192#ifdef CONFIG_DEBUG_FS
4193 debugfs_remove(debugfs_poke);
4194#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004195 return 0;
4196}
4197static struct platform_driver tabla_codec_driver = {
4198 .probe = tabla_probe,
4199 .remove = tabla_remove,
4200 .driver = {
4201 .name = "tabla_codec",
4202 .owner = THIS_MODULE,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004203#ifdef CONFIG_PM
4204 .pm = &tabla_pm_ops,
4205#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004206 },
4207};
4208
4209static int __init tabla_codec_init(void)
4210{
4211 return platform_driver_register(&tabla_codec_driver);
4212}
4213
4214static void __exit tabla_codec_exit(void)
4215{
4216 platform_driver_unregister(&tabla_codec_driver);
4217}
4218
4219module_init(tabla_codec_init);
4220module_exit(tabla_codec_exit);
4221
4222MODULE_DESCRIPTION("Tabla codec driver");
4223MODULE_VERSION("1.0");
4224MODULE_LICENSE("GPL v2");