| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 1 | /* | 
|  | 2 | *  Philips UCB1400 touchscreen driver | 
|  | 3 | * | 
|  | 4 | *  Author:	Nicolas Pitre | 
|  | 5 | *  Created:	September 25, 2006 | 
|  | 6 | *  Copyright:	MontaVista Software, Inc. | 
|  | 7 | * | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 8 | * Spliting done by: Marek Vasut <marek.vasut@gmail.com> | 
|  | 9 | * If something doesnt work and it worked before spliting, e-mail me, | 
|  | 10 | * dont bother Nicolas please ;-) | 
|  | 11 | * | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 12 | * This program is free software; you can redistribute it and/or modify | 
|  | 13 | * it under the terms of the GNU General Public License version 2 as | 
|  | 14 | * published by the Free Software Foundation. | 
|  | 15 | * | 
|  | 16 | * This code is heavily based on ucb1x00-*.c copyrighted by Russell King | 
|  | 17 | * covering the UCB1100, UCB1200 and UCB1300..  Support for the UCB1400 has | 
|  | 18 | * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request. | 
|  | 19 | */ | 
|  | 20 |  | 
|  | 21 | #include <linux/module.h> | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 22 | #include <linux/init.h> | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 23 | #include <linux/completion.h> | 
|  | 24 | #include <linux/delay.h> | 
|  | 25 | #include <linux/input.h> | 
|  | 26 | #include <linux/device.h> | 
|  | 27 | #include <linux/interrupt.h> | 
|  | 28 | #include <linux/suspend.h> | 
|  | 29 | #include <linux/slab.h> | 
|  | 30 | #include <linux/kthread.h> | 
| Dmitry Torokhov | bff19b1 | 2006-12-08 01:37:03 -0500 | [diff] [blame] | 31 | #include <linux/freezer.h> | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 32 | #include <linux/ucb1400.h> | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 33 |  | 
|  | 34 | static int adcsync; | 
| Cliff Brake | b5b16c5 | 2007-04-12 01:35:43 -0400 | [diff] [blame] | 35 | static int ts_delay = 55; /* us */ | 
|  | 36 | static int ts_delay_pressure;	/* us */ | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 37 |  | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 38 | /* Switch to interrupt mode. */ | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 39 | static inline void ucb1400_ts_mode_int(struct snd_ac97 *ac97) | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 40 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 41 | ucb1400_reg_write(ac97, UCB_TS_CR, | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 42 | UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | | 
|  | 43 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | | 
|  | 44 | UCB_TS_CR_MODE_INT); | 
|  | 45 | } | 
|  | 46 |  | 
|  | 47 | /* | 
|  | 48 | * Switch to pressure mode, and read pressure.  We don't need to wait | 
|  | 49 | * here, since both plates are being driven. | 
|  | 50 | */ | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 51 | static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400_ts *ucb) | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 52 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 53 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 54 | UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | | 
|  | 55 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | | 
|  | 56 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | 
| Cliff Brake | b5b16c5 | 2007-04-12 01:35:43 -0400 | [diff] [blame] | 57 | udelay(ts_delay_pressure); | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 58 | return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 59 | } | 
|  | 60 |  | 
|  | 61 | /* | 
|  | 62 | * Switch to X position mode and measure Y plate.  We switch the plate | 
|  | 63 | * configuration in pressure mode, then switch to position mode.  This | 
|  | 64 | * gives a faster response time.  Even so, we need to wait about 55us | 
|  | 65 | * for things to stabilise. | 
|  | 66 | */ | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 67 | static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400_ts *ucb) | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 68 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 69 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 70 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | | 
|  | 71 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 72 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 73 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | | 
|  | 74 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 75 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 76 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | | 
|  | 77 | UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); | 
|  | 78 |  | 
| Cliff Brake | b5b16c5 | 2007-04-12 01:35:43 -0400 | [diff] [blame] | 79 | udelay(ts_delay); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 80 |  | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 81 | return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 82 | } | 
|  | 83 |  | 
|  | 84 | /* | 
|  | 85 | * Switch to Y position mode and measure X plate.  We switch the plate | 
|  | 86 | * configuration in pressure mode, then switch to position mode.  This | 
|  | 87 | * gives a faster response time.  Even so, we need to wait about 55us | 
|  | 88 | * for things to stabilise. | 
|  | 89 | */ | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 90 | static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400_ts *ucb) | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 91 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 92 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 93 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | | 
|  | 94 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 95 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 96 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | | 
|  | 97 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 98 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 99 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | | 
|  | 100 | UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); | 
|  | 101 |  | 
| Cliff Brake | b5b16c5 | 2007-04-12 01:35:43 -0400 | [diff] [blame] | 102 | udelay(ts_delay); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 103 |  | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 104 | return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPX, adcsync); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 105 | } | 
|  | 106 |  | 
|  | 107 | /* | 
|  | 108 | * Switch to X plate resistance mode.  Set MX to ground, PX to | 
|  | 109 | * supply.  Measure current. | 
|  | 110 | */ | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 111 | static inline unsigned int ucb1400_ts_read_xres(struct ucb1400_ts *ucb) | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 112 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 113 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 114 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | | 
|  | 115 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 116 | return ucb1400_adc_read(ucb->ac97, 0, adcsync); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 117 | } | 
|  | 118 |  | 
|  | 119 | /* | 
|  | 120 | * Switch to Y plate resistance mode.  Set MY to ground, PY to | 
|  | 121 | * supply.  Measure current. | 
|  | 122 | */ | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 123 | static inline unsigned int ucb1400_ts_read_yres(struct ucb1400_ts *ucb) | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 124 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 125 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 126 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | | 
|  | 127 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 128 | return ucb1400_adc_read(ucb->ac97, 0, adcsync); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 129 | } | 
|  | 130 |  | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 131 | static inline int ucb1400_ts_pen_down(struct snd_ac97 *ac97) | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 132 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 133 | unsigned short val = ucb1400_reg_read(ac97, UCB_TS_CR); | 
|  | 134 | return val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 135 | } | 
|  | 136 |  | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 137 | static inline void ucb1400_ts_irq_enable(struct snd_ac97 *ac97) | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 138 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 139 | ucb1400_reg_write(ac97, UCB_IE_CLEAR, UCB_IE_TSPX); | 
|  | 140 | ucb1400_reg_write(ac97, UCB_IE_CLEAR, 0); | 
|  | 141 | ucb1400_reg_write(ac97, UCB_IE_FAL, UCB_IE_TSPX); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 142 | } | 
|  | 143 |  | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 144 | static inline void ucb1400_ts_irq_disable(struct snd_ac97 *ac97) | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 145 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 146 | ucb1400_reg_write(ac97, UCB_IE_FAL, 0); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 147 | } | 
|  | 148 |  | 
|  | 149 | static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y) | 
|  | 150 | { | 
|  | 151 | input_report_abs(idev, ABS_X, x); | 
|  | 152 | input_report_abs(idev, ABS_Y, y); | 
|  | 153 | input_report_abs(idev, ABS_PRESSURE, pressure); | 
|  | 154 | input_sync(idev); | 
|  | 155 | } | 
|  | 156 |  | 
|  | 157 | static void ucb1400_ts_event_release(struct input_dev *idev) | 
|  | 158 | { | 
|  | 159 | input_report_abs(idev, ABS_PRESSURE, 0); | 
|  | 160 | input_sync(idev); | 
|  | 161 | } | 
|  | 162 |  | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 163 | static void ucb1400_handle_pending_irq(struct ucb1400_ts *ucb) | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 164 | { | 
|  | 165 | unsigned int isr; | 
|  | 166 |  | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 167 | isr = ucb1400_reg_read(ucb->ac97, UCB_IE_STATUS); | 
|  | 168 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, isr); | 
|  | 169 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 170 |  | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 171 | if (isr & UCB_IE_TSPX) { | 
|  | 172 | ucb1400_ts_irq_disable(ucb->ac97); | 
|  | 173 | enable_irq(ucb->irq); | 
|  | 174 | } else | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 175 | printk(KERN_ERR "ucb1400: unexpected IE_STATUS = %#x\n", isr); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 176 | } | 
|  | 177 |  | 
|  | 178 | static int ucb1400_ts_thread(void *_ucb) | 
|  | 179 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 180 | struct ucb1400_ts *ucb = _ucb; | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 181 | struct task_struct *tsk = current; | 
|  | 182 | int valid = 0; | 
| Satoru Takeuchi | c130bdb | 2007-05-14 23:52:07 -0400 | [diff] [blame] | 183 | struct sched_param param = { .sched_priority = 1 }; | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 184 |  | 
| Satoru Takeuchi | c130bdb | 2007-05-14 23:52:07 -0400 | [diff] [blame] | 185 | sched_setscheduler(tsk, SCHED_FIFO, ¶m); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 186 |  | 
| Rafael J. Wysocki | 8314418 | 2007-07-17 04:03:35 -0700 | [diff] [blame] | 187 | set_freezable(); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 188 | while (!kthread_should_stop()) { | 
|  | 189 | unsigned int x, y, p; | 
|  | 190 | long timeout; | 
|  | 191 |  | 
|  | 192 | ucb->ts_restart = 0; | 
|  | 193 |  | 
|  | 194 | if (ucb->irq_pending) { | 
|  | 195 | ucb->irq_pending = 0; | 
|  | 196 | ucb1400_handle_pending_irq(ucb); | 
|  | 197 | } | 
|  | 198 |  | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 199 | ucb1400_adc_enable(ucb->ac97); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 200 | x = ucb1400_ts_read_xpos(ucb); | 
|  | 201 | y = ucb1400_ts_read_ypos(ucb); | 
|  | 202 | p = ucb1400_ts_read_pressure(ucb); | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 203 | ucb1400_adc_disable(ucb->ac97); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 204 |  | 
|  | 205 | /* Switch back to interrupt mode. */ | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 206 | ucb1400_ts_mode_int(ucb->ac97); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 207 |  | 
|  | 208 | msleep(10); | 
|  | 209 |  | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 210 | if (ucb1400_ts_pen_down(ucb->ac97)) { | 
|  | 211 | ucb1400_ts_irq_enable(ucb->ac97); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 212 |  | 
|  | 213 | /* | 
|  | 214 | * If we spat out a valid sample set last time, | 
|  | 215 | * spit out a "pen off" sample here. | 
|  | 216 | */ | 
|  | 217 | if (valid) { | 
|  | 218 | ucb1400_ts_event_release(ucb->ts_idev); | 
|  | 219 | valid = 0; | 
|  | 220 | } | 
|  | 221 |  | 
|  | 222 | timeout = MAX_SCHEDULE_TIMEOUT; | 
|  | 223 | } else { | 
|  | 224 | valid = 1; | 
|  | 225 | ucb1400_ts_evt_add(ucb->ts_idev, p, x, y); | 
|  | 226 | timeout = msecs_to_jiffies(10); | 
|  | 227 | } | 
|  | 228 |  | 
| Rafael J. Wysocki | e42837b | 2007-10-18 03:04:45 -0700 | [diff] [blame] | 229 | wait_event_freezable_timeout(ucb->ts_wait, | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 230 | ucb->irq_pending || ucb->ts_restart || | 
|  | 231 | kthread_should_stop(), timeout); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 232 | } | 
|  | 233 |  | 
|  | 234 | /* Send the "pen off" if we are stopping with the pen still active */ | 
|  | 235 | if (valid) | 
|  | 236 | ucb1400_ts_event_release(ucb->ts_idev); | 
|  | 237 |  | 
|  | 238 | ucb->ts_task = NULL; | 
|  | 239 | return 0; | 
|  | 240 | } | 
|  | 241 |  | 
|  | 242 | /* | 
|  | 243 | * A restriction with interrupts exists when using the ucb1400, as | 
|  | 244 | * the codec read/write routines may sleep while waiting for codec | 
|  | 245 | * access completion and uses semaphores for access control to the | 
|  | 246 | * AC97 bus.  A complete codec read cycle could take  anywhere from | 
|  | 247 | * 60 to 100uSec so we *definitely* don't want to spin inside the | 
|  | 248 | * interrupt handler waiting for codec access.  So, we handle the | 
|  | 249 | * interrupt by scheduling a RT kernel thread to run in process | 
|  | 250 | * context instead of interrupt context. | 
|  | 251 | */ | 
|  | 252 | static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid) | 
|  | 253 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 254 | struct ucb1400_ts *ucb = devid; | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 255 |  | 
|  | 256 | if (irqnr == ucb->irq) { | 
|  | 257 | disable_irq(ucb->irq); | 
|  | 258 | ucb->irq_pending = 1; | 
|  | 259 | wake_up(&ucb->ts_wait); | 
|  | 260 | return IRQ_HANDLED; | 
|  | 261 | } | 
|  | 262 | return IRQ_NONE; | 
|  | 263 | } | 
|  | 264 |  | 
|  | 265 | static int ucb1400_ts_open(struct input_dev *idev) | 
|  | 266 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 267 | struct ucb1400_ts *ucb = input_get_drvdata(idev); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 268 | int ret = 0; | 
|  | 269 |  | 
|  | 270 | BUG_ON(ucb->ts_task); | 
|  | 271 |  | 
|  | 272 | ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts"); | 
|  | 273 | if (IS_ERR(ucb->ts_task)) { | 
|  | 274 | ret = PTR_ERR(ucb->ts_task); | 
|  | 275 | ucb->ts_task = NULL; | 
|  | 276 | } | 
|  | 277 |  | 
|  | 278 | return ret; | 
|  | 279 | } | 
|  | 280 |  | 
|  | 281 | static void ucb1400_ts_close(struct input_dev *idev) | 
|  | 282 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 283 | struct ucb1400_ts *ucb = input_get_drvdata(idev); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 284 |  | 
|  | 285 | if (ucb->ts_task) | 
|  | 286 | kthread_stop(ucb->ts_task); | 
|  | 287 |  | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 288 | ucb1400_ts_irq_disable(ucb->ac97); | 
|  | 289 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, 0); | 
|  | 290 | } | 
|  | 291 |  | 
|  | 292 | #ifndef NO_IRQ | 
|  | 293 | #define NO_IRQ	0 | 
|  | 294 | #endif | 
|  | 295 |  | 
|  | 296 | /* | 
|  | 297 | * Try to probe our interrupt, rather than relying on lots of | 
|  | 298 | * hard-coded machine dependencies. | 
|  | 299 | */ | 
|  | 300 | static int ucb1400_ts_detect_irq(struct ucb1400_ts *ucb) | 
|  | 301 | { | 
|  | 302 | unsigned long mask, timeout; | 
|  | 303 |  | 
|  | 304 | mask = probe_irq_on(); | 
|  | 305 |  | 
|  | 306 | /* Enable the ADC interrupt. */ | 
|  | 307 | ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, UCB_IE_ADC); | 
|  | 308 | ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, UCB_IE_ADC); | 
|  | 309 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff); | 
|  | 310 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); | 
|  | 311 |  | 
|  | 312 | /* Cause an ADC interrupt. */ | 
|  | 313 | ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA); | 
|  | 314 | ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START); | 
|  | 315 |  | 
|  | 316 | /* Wait for the conversion to complete. */ | 
|  | 317 | timeout = jiffies + HZ/2; | 
|  | 318 | while (!(ucb1400_reg_read(ucb->ac97, UCB_ADC_DATA) & | 
|  | 319 | UCB_ADC_DAT_VALID)) { | 
|  | 320 | cpu_relax(); | 
|  | 321 | if (time_after(jiffies, timeout)) { | 
|  | 322 | printk(KERN_ERR "ucb1400: timed out in IRQ probe\n"); | 
|  | 323 | probe_irq_off(mask); | 
|  | 324 | return -ENODEV; | 
|  | 325 | } | 
|  | 326 | } | 
|  | 327 | ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, 0); | 
|  | 328 |  | 
|  | 329 | /* Disable and clear interrupt. */ | 
|  | 330 | ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, 0); | 
|  | 331 | ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, 0); | 
|  | 332 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff); | 
|  | 333 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); | 
|  | 334 |  | 
|  | 335 | /* Read triggered interrupt. */ | 
|  | 336 | ucb->irq = probe_irq_off(mask); | 
|  | 337 | if (ucb->irq < 0 || ucb->irq == NO_IRQ) | 
|  | 338 | return -ENODEV; | 
|  | 339 |  | 
|  | 340 | return 0; | 
|  | 341 | } | 
|  | 342 |  | 
|  | 343 | static int ucb1400_ts_probe(struct platform_device *dev) | 
|  | 344 | { | 
|  | 345 | int error, x_res, y_res; | 
|  | 346 | struct ucb1400_ts *ucb = dev->dev.platform_data; | 
|  | 347 |  | 
|  | 348 | ucb->ts_idev = input_allocate_device(); | 
|  | 349 | if (!ucb->ts_idev) { | 
|  | 350 | error = -ENOMEM; | 
|  | 351 | goto err; | 
|  | 352 | } | 
|  | 353 |  | 
|  | 354 | error = ucb1400_ts_detect_irq(ucb); | 
|  | 355 | if (error) { | 
|  | 356 | printk(KERN_ERR "UCB1400: IRQ probe failed\n"); | 
|  | 357 | goto err_free_devs; | 
|  | 358 | } | 
|  | 359 |  | 
|  | 360 | init_waitqueue_head(&ucb->ts_wait); | 
|  | 361 |  | 
|  | 362 | error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING, | 
|  | 363 | "UCB1400", ucb); | 
|  | 364 | if (error) { | 
|  | 365 | printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n", | 
|  | 366 | ucb->irq, error); | 
|  | 367 | goto err_free_devs; | 
|  | 368 | } | 
|  | 369 | printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq); | 
|  | 370 |  | 
|  | 371 | input_set_drvdata(ucb->ts_idev, ucb); | 
|  | 372 |  | 
|  | 373 | ucb->ts_idev->dev.parent	= &dev->dev; | 
|  | 374 | ucb->ts_idev->name		= "UCB1400 touchscreen interface"; | 
|  | 375 | ucb->ts_idev->id.vendor		= ucb1400_reg_read(ucb->ac97, | 
|  | 376 | AC97_VENDOR_ID1); | 
|  | 377 | ucb->ts_idev->id.product	= ucb->id; | 
|  | 378 | ucb->ts_idev->open		= ucb1400_ts_open; | 
|  | 379 | ucb->ts_idev->close		= ucb1400_ts_close; | 
|  | 380 | ucb->ts_idev->evbit[0]		= BIT_MASK(EV_ABS); | 
|  | 381 |  | 
|  | 382 | ucb1400_adc_enable(ucb->ac97); | 
|  | 383 | x_res = ucb1400_ts_read_xres(ucb); | 
|  | 384 | y_res = ucb1400_ts_read_yres(ucb); | 
|  | 385 | ucb1400_adc_disable(ucb->ac97); | 
|  | 386 | printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res); | 
|  | 387 |  | 
|  | 388 | input_set_abs_params(ucb->ts_idev, ABS_X, 0, x_res, 0, 0); | 
|  | 389 | input_set_abs_params(ucb->ts_idev, ABS_Y, 0, y_res, 0, 0); | 
|  | 390 | input_set_abs_params(ucb->ts_idev, ABS_PRESSURE, 0, 0, 0, 0); | 
|  | 391 |  | 
|  | 392 | error = input_register_device(ucb->ts_idev); | 
|  | 393 | if (error) | 
|  | 394 | goto err_free_irq; | 
|  | 395 |  | 
|  | 396 | return 0; | 
|  | 397 |  | 
|  | 398 | err_free_irq: | 
|  | 399 | free_irq(ucb->irq, ucb); | 
|  | 400 | err_free_devs: | 
|  | 401 | input_free_device(ucb->ts_idev); | 
|  | 402 | err: | 
|  | 403 | return error; | 
|  | 404 |  | 
|  | 405 | } | 
|  | 406 |  | 
|  | 407 | static int ucb1400_ts_remove(struct platform_device *dev) | 
|  | 408 | { | 
|  | 409 | struct ucb1400_ts *ucb = dev->dev.platform_data; | 
|  | 410 |  | 
|  | 411 | free_irq(ucb->irq, ucb); | 
|  | 412 | input_unregister_device(ucb->ts_idev); | 
|  | 413 | return 0; | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 414 | } | 
|  | 415 |  | 
|  | 416 | #ifdef CONFIG_PM | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 417 | static int ucb1400_ts_resume(struct platform_device *dev) | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 418 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 419 | struct ucb1400_ts *ucb = platform_get_drvdata(dev); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 420 |  | 
|  | 421 | if (ucb->ts_task) { | 
|  | 422 | /* | 
|  | 423 | * Restart the TS thread to ensure the | 
|  | 424 | * TS interrupt mode is set up again | 
|  | 425 | * after sleep. | 
|  | 426 | */ | 
|  | 427 | ucb->ts_restart = 1; | 
|  | 428 | wake_up(&ucb->ts_wait); | 
|  | 429 | } | 
|  | 430 | return 0; | 
|  | 431 | } | 
|  | 432 | #else | 
|  | 433 | #define ucb1400_ts_resume NULL | 
|  | 434 | #endif | 
|  | 435 |  | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 436 | static struct platform_driver ucb1400_ts_driver = { | 
|  | 437 | .probe	= ucb1400_ts_probe, | 
|  | 438 | .remove	= ucb1400_ts_remove, | 
|  | 439 | .resume	= ucb1400_ts_resume, | 
|  | 440 | .driver	= { | 
|  | 441 | .name	= "ucb1400_ts", | 
|  | 442 | }, | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 443 | }; | 
|  | 444 |  | 
|  | 445 | static int __init ucb1400_ts_init(void) | 
|  | 446 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 447 | return platform_driver_register(&ucb1400_ts_driver); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 448 | } | 
|  | 449 |  | 
|  | 450 | static void __exit ucb1400_ts_exit(void) | 
|  | 451 | { | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 452 | platform_driver_unregister(&ucb1400_ts_driver); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 453 | } | 
|  | 454 |  | 
| Cliff Brake | b5b16c5 | 2007-04-12 01:35:43 -0400 | [diff] [blame] | 455 | module_param(adcsync, bool, 0444); | 
|  | 456 | MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin."); | 
|  | 457 |  | 
|  | 458 | module_param(ts_delay, int, 0444); | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 459 | MODULE_PARM_DESC(ts_delay, "Delay between panel setup and" | 
|  | 460 | " position read. Default = 55us."); | 
| Cliff Brake | b5b16c5 | 2007-04-12 01:35:43 -0400 | [diff] [blame] | 461 |  | 
|  | 462 | module_param(ts_delay_pressure, int, 0444); | 
|  | 463 | MODULE_PARM_DESC(ts_delay_pressure, | 
| Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 464 | "delay between panel setup and pressure read." | 
|  | 465 | "  Default = 0us."); | 
| Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 466 |  | 
|  | 467 | module_init(ucb1400_ts_init); | 
|  | 468 | module_exit(ucb1400_ts_exit); | 
|  | 469 |  | 
|  | 470 | MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver"); | 
|  | 471 | MODULE_LICENSE("GPL"); |