blob: ecf33b214d25a8224c4e7988a417097cc95ba4b4 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/gpio_event.h>
15#include <asm/mach-types.h>
16#include <asm/mach/arch.h>
17#include <mach/board.h>
18#include <mach/msm_iomap.h>
19#include <mach/msm_hsusb.h>
20#include <mach/rpc_hsusb.h>
21#include <mach/rpc_pmapp.h>
22#include <mach/usbdiag.h>
23#include <mach/msm_memtypes.h>
24#include <mach/msm_serial_hs.h>
25#include <linux/usb/android.h>
26#include <linux/platform_device.h>
27#include <linux/io.h>
28#include <linux/gpio.h>
29#include <mach/vreg.h>
30#include <mach/pmic.h>
31#include <mach/socinfo.h>
32#include <linux/mtd/nand.h>
33#include <linux/mtd/partitions.h>
34#include <asm/mach/mmc.h>
35#include <linux/i2c.h>
36#include <linux/i2c/sx150x.h>
37#include <linux/gpio.h>
38#include <linux/android_pmem.h>
39#include <linux/bootmem.h>
40#include <linux/mfd/marimba.h>
41#include <mach/vreg.h>
42#include <linux/power_supply.h>
43#include <mach/rpc_pmapp.h>
44
45#include <mach/msm_battery.h>
46#include <linux/smsc911x.h>
47#include <linux/atmel_maxtouch.h>
48#include "devices.h"
49#include "timer.h"
Justin Pauporeb3a33b72011-08-23 15:30:32 -070050#include "board-msm7x27a-regulator.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070051#include "devices-msm7x2xa.h"
52#include "pm.h"
53#include <mach/rpc_server_handset.h>
54#include <mach/socinfo.h>
55
56#define PMEM_KERNEL_EBI1_SIZE 0x3A000
57#define MSM_PMEM_AUDIO_SIZE 0x5B000
58#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
59#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
Rahul Kashyap181d5552011-07-07 10:39:23 +053060#define BAHAMA_SLAVE_ID_FM_REG 0x02
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070061#define FM_GPIO 83
62
63enum {
64 GPIO_EXPANDER_IRQ_BASE = NR_MSM_IRQS + NR_GPIO_IRQS,
65 GPIO_EXPANDER_GPIO_BASE = NR_MSM_GPIOS,
66 /* SURF expander */
67 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
68 GPIO_BT_SYS_REST_EN = GPIO_CORE_EXPANDER_BASE,
69 GPIO_WLAN_EXT_POR_N,
70 GPIO_DISPLAY_PWR_EN,
71 GPIO_BACKLIGHT_EN,
72 GPIO_PRESSURE_XCLR,
73 GPIO_VREG_S3_EXP,
74 GPIO_UBM2M_PWRDWN,
75 GPIO_ETM_MODE_CS_N,
76 GPIO_HOST_VBUS_EN,
77 GPIO_SPI_MOSI,
78 GPIO_SPI_MISO,
79 GPIO_SPI_CLK,
80 GPIO_SPI_CS0_N,
81 GPIO_CORE_EXPANDER_IO13,
82 GPIO_CORE_EXPANDER_IO14,
83 GPIO_CORE_EXPANDER_IO15,
84 /* Camera expander */
85 GPIO_CAM_EXPANDER_BASE = GPIO_CORE_EXPANDER_BASE + 16,
86 GPIO_CAM_GP_STROBE_READY = GPIO_CAM_EXPANDER_BASE,
87 GPIO_CAM_GP_AFBUSY,
88 GPIO_CAM_GP_CAM_PWDN,
89 GPIO_CAM_GP_CAM1MP_XCLR,
90 GPIO_CAM_GP_CAMIF_RESET_N,
91 GPIO_CAM_GP_STROBE_CE,
92 GPIO_CAM_GP_LED_EN1,
93 GPIO_CAM_GP_LED_EN2,
94};
95
96#if defined(CONFIG_GPIO_SX150X)
97enum {
98 SX150X_CORE,
99 SX150X_CAM,
100};
101
102static struct sx150x_platform_data sx150x_data[] __initdata = {
103 [SX150X_CORE] = {
104 .gpio_base = GPIO_CORE_EXPANDER_BASE,
105 .oscio_is_gpo = false,
106 .io_pullup_ena = 0,
pankaj kumarc5c01392011-08-12 13:44:05 +0530107 .io_pulldn_ena = 0x02,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108 .io_open_drain_ena = 0xfef8,
109 .irq_summary = -1,
110 },
111 [SX150X_CAM] = {
112 .gpio_base = GPIO_CAM_EXPANDER_BASE,
113 .oscio_is_gpo = false,
114 .io_pullup_ena = 0,
115 .io_pulldn_ena = 0,
116 .io_open_drain_ena = 0x23,
117 .irq_summary = -1,
118 },
119};
120#endif
121
122#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
123
124 /* FM Platform power and shutdown routines */
125#define FPGA_MSM_CNTRL_REG2 0x90008010
Rahul Kashyap6e669462011-07-23 16:42:56 +0530126
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700127static void config_pcm_i2s_mode(int mode)
128{
129 void __iomem *cfg_ptr;
130 u8 reg2;
131
132 cfg_ptr = ioremap_nocache(FPGA_MSM_CNTRL_REG2, sizeof(char));
133
134 if (!cfg_ptr)
135 return;
136 if (mode) {
137 /*enable the pcm mode in FPGA*/
138 reg2 = readb_relaxed(cfg_ptr);
139 if (reg2 == 0) {
140 reg2 = 1;
141 writeb_relaxed(reg2, cfg_ptr);
142 }
143 } else {
144 /*enable i2s mode in FPGA*/
145 reg2 = readb_relaxed(cfg_ptr);
146 if (reg2 == 1) {
147 reg2 = 0;
148 writeb_relaxed(reg2, cfg_ptr);
149 }
150 }
151 iounmap(cfg_ptr);
152}
153
154static unsigned fm_i2s_config_power_on[] = {
155 /*FM_I2S_SD*/
156 GPIO_CFG(68, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
157 /*FM_I2S_WS*/
158 GPIO_CFG(70, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
159 /*FM_I2S_SCK*/
160 GPIO_CFG(71, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
161};
162
163static unsigned fm_i2s_config_power_off[] = {
164 /*FM_I2S_SD*/
165 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
166 /*FM_I2S_WS*/
167 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
168 /*FM_I2S_SCK*/
169 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
170};
171
172static unsigned bt_config_power_on[] = {
173 /*RFR*/
174 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
175 /*CTS*/
176 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
177 /*RX*/
178 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
179 /*TX*/
180 GPIO_CFG(46, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
181};
182static unsigned bt_config_pcm_on[] = {
183 /*PCM_DOUT*/
184 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
185 /*PCM_DIN*/
186 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
187 /*PCM_SYNC*/
188 GPIO_CFG(70, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
189 /*PCM_CLK*/
190 GPIO_CFG(71, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
191};
192static unsigned bt_config_power_off[] = {
193 /*RFR*/
194 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
195 /*CTS*/
196 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
197 /*RX*/
198 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
199 /*TX*/
200 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
201};
202static unsigned bt_config_pcm_off[] = {
203 /*PCM_DOUT*/
204 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
205 /*PCM_DIN*/
206 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
207 /*PCM_SYNC*/
208 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
209 /*PCM_CLK*/
210 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
211};
212
213static int config_i2s(int mode)
214{
215 int pin, rc = 0;
216
217 if (mode == FM_I2S_ON) {
218 if (machine_is_msm7x27a_surf())
219 config_pcm_i2s_mode(0);
220 pr_err("%s mode = FM_I2S_ON", __func__);
221 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_on);
222 pin++) {
223 rc = gpio_tlmm_config(
224 fm_i2s_config_power_on[pin],
225 GPIO_CFG_ENABLE
226 );
227 if (rc < 0)
228 return rc;
229 }
230 } else if (mode == FM_I2S_OFF) {
231 pr_err("%s mode = FM_I2S_OFF", __func__);
232 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_off);
233 pin++) {
234 rc = gpio_tlmm_config(
235 fm_i2s_config_power_off[pin],
236 GPIO_CFG_ENABLE
237 );
238 if (rc < 0)
239 return rc;
240 }
241 }
242 return rc;
243}
244static int config_pcm(int mode)
245{
246 int pin, rc = 0;
247
248 if (mode == BT_PCM_ON) {
249 if (machine_is_msm7x27a_surf())
250 config_pcm_i2s_mode(1);
251 pr_err("%s mode =BT_PCM_ON", __func__);
252 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_on);
253 pin++) {
254 rc = gpio_tlmm_config(bt_config_pcm_on[pin],
255 GPIO_CFG_ENABLE);
256 if (rc < 0)
257 return rc;
258 }
259 } else if (mode == BT_PCM_OFF) {
260 pr_err("%s mode =BT_PCM_OFF", __func__);
261 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_off);
262 pin++) {
263 rc = gpio_tlmm_config(bt_config_pcm_off[pin],
264 GPIO_CFG_ENABLE);
265 if (rc < 0)
266 return rc;
267 }
268
269 }
270
271 return rc;
272}
273
274static int msm_bahama_setup_pcm_i2s(int mode)
275{
276 int fm_state = 0, bt_state = 0;
277 int rc = 0;
278 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
279
280 fm_state = marimba_get_fm_status(&config);
281 bt_state = marimba_get_bt_status(&config);
282
283 switch (mode) {
284 case BT_PCM_ON:
285 case BT_PCM_OFF:
286 if (!fm_state)
287 rc = config_pcm(mode);
288 break;
289 case FM_I2S_ON:
290 rc = config_i2s(mode);
291 break;
292 case FM_I2S_OFF:
293 if (bt_state)
294 rc = config_pcm(BT_PCM_ON);
295 else
296 rc = config_i2s(mode);
297 break;
298 default:
299 rc = -EIO;
300 pr_err("%s:Unsupported mode", __func__);
301 }
302 return rc;
303}
304
Rahul Kashyap181d5552011-07-07 10:39:23 +0530305static int bt_set_gpio(int on)
306{
307 int rc = 0;
308 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
309
310 if (on) {
311 rc = gpio_direction_output(GPIO_BT_SYS_REST_EN, 1);
312 msleep(100);
313 } else {
314 if (!marimba_get_fm_status(&config) &&
315 !marimba_get_bt_status(&config)) {
316 gpio_set_value_cansleep(GPIO_BT_SYS_REST_EN, 0);
317 rc = gpio_direction_input(GPIO_BT_SYS_REST_EN);
318 msleep(100);
319 }
320 }
321 if (rc)
322 pr_err("%s: BT sys_reset_en GPIO : Error", __func__);
323
324 return rc;
325}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700326static struct vreg *fm_regulator;
327static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
328{
329 int rc = 0;
330 const char *id = "FMPW";
331 uint32_t irqcfg;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530332 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
333 u8 value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700334
335 /* Voting for 1.8V Regulator */
336 fm_regulator = vreg_get(NULL , "msme1");
337 if (IS_ERR(fm_regulator)) {
338 pr_err("%s: vreg get failed with : (%ld)\n",
339 __func__, PTR_ERR(fm_regulator));
340 return -EINVAL;
341 }
342
343 /* Set the voltage level to 1.8V */
344 rc = vreg_set_level(fm_regulator, 1800);
345 if (rc < 0) {
346 pr_err("%s: set regulator level failed with :(%d)\n",
347 __func__, rc);
348 goto fm_vreg_fail;
349 }
350
351 /* Enabling the 1.8V regulator */
352 rc = vreg_enable(fm_regulator);
353 if (rc) {
354 pr_err("%s: enable regulator failed with :(%d)\n",
355 __func__, rc);
356 goto fm_vreg_fail;
357 }
358
359 /* Voting for 19.2MHz clock */
360 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
361 PMAPP_CLOCK_VOTE_ON);
362 if (rc < 0) {
363 pr_err("%s: clock vote failed with :(%d)\n",
364 __func__, rc);
365 goto fm_clock_vote_fail;
366 }
367
Rahul Kashyap181d5552011-07-07 10:39:23 +0530368 rc = bt_set_gpio(1);
369 if (rc) {
370 pr_err("%s: bt_set_gpio = %d", __func__, rc);
371 goto fm_gpio_config_fail;
372 }
373 /*re-write FM Slave Id, after reset*/
374 value = BAHAMA_SLAVE_ID_FM_ADDR;
375 rc = marimba_write_bit_mask(&config,
376 BAHAMA_SLAVE_ID_FM_REG, &value, 1, 0xFF);
377 if (rc < 0) {
378 pr_err("%s: FM Slave ID rewrite Failed = %d", __func__, rc);
379 goto fm_gpio_config_fail;
380 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700381 /* Configuring the FM GPIO */
382 irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
383 GPIO_CFG_2MA);
384
385 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
386 if (rc) {
387 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
388 __func__, irqcfg, rc);
389 goto fm_gpio_config_fail;
390 }
391
392 return 0;
393
394fm_gpio_config_fail:
395 pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
396 PMAPP_CLOCK_VOTE_OFF);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530397 bt_set_gpio(0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700398fm_clock_vote_fail:
399 vreg_disable(fm_regulator);
400
401fm_vreg_fail:
402 vreg_put(fm_regulator);
403
404 return rc;
405};
406
407static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
408{
409 int rc;
410 const char *id = "FMPW";
411
412 /* Releasing the GPIO line used by FM */
413 uint32_t irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
414 GPIO_CFG_2MA);
415
416 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
417 if (rc)
418 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
419 __func__, irqcfg, rc);
420
421 /* Releasing the 1.8V Regulator */
422 if (fm_regulator != NULL) {
423 rc = vreg_disable(fm_regulator);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700424 if (rc)
425 pr_err("%s: disable regulator failed:(%d)\n",
426 __func__, rc);
427 fm_regulator = NULL;
428 }
429
430 /* Voting off the clock */
431 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
432 PMAPP_CLOCK_VOTE_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700433 if (rc < 0)
434 pr_err("%s: voting off failed with :(%d)\n",
435 __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530436 rc = bt_set_gpio(0);
437 if (rc)
438 pr_err("%s: bt_set_gpio = %d", __func__, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700439}
440
441static struct marimba_fm_platform_data marimba_fm_pdata = {
442 .fm_setup = fm_radio_setup,
443 .fm_shutdown = fm_radio_shutdown,
444 .irq = MSM_GPIO_TO_INT(FM_GPIO),
445 .vreg_s2 = NULL,
446 .vreg_xo_out = NULL,
447 /* Configuring the FM SoC as I2S Master */
448 .is_fm_soc_i2s_master = true,
449 .config_i2s_gpio = msm_bahama_setup_pcm_i2s,
450};
451
Santosh Sajjan6822c682011-07-26 10:49:36 +0530452static struct platform_device msm_wlan_ar6000_pm_device = {
453 .name = "wlan_ar6000_pm_dev",
454 .id = -1,
455};
456
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700457static struct platform_device msm_bt_power_device = {
458 .name = "bt_power",
459};
Rahul Kashyap6e669462011-07-23 16:42:56 +0530460struct bahama_config_register {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700461 u8 reg;
462 u8 value;
463 u8 mask;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700464};
Rahul Kashyap6e669462011-07-23 16:42:56 +0530465struct bt_vreg_info {
466 const char *name;
467 unsigned int pmapp_id;
468 unsigned int level;
469 unsigned int is_pin_controlled;
470 struct vreg *vregs;
471};
472static struct bt_vreg_info bt_vregs[] = {
473 {"msme1", 2, 1800, 0, NULL},
474 {"bt", 21, 2900, 1, NULL}
475};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700476
477static int bahama_bt(int on)
478{
479
480 int rc = 0;
481 int i;
482
483 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
484
485 struct bahama_variant_register {
486 const size_t size;
487 const struct bahama_config_register *set;
488 };
489
490 const struct bahama_config_register *p;
491
492 u8 version;
493
494 const struct bahama_config_register v10_bt_on[] = {
495 { 0xE9, 0x00, 0xFF },
496 { 0xF4, 0x80, 0xFF },
497 { 0xE4, 0x00, 0xFF },
498 { 0xE5, 0x00, 0x0F },
499#ifdef CONFIG_WLAN
500 { 0xE6, 0x38, 0x7F },
501 { 0xE7, 0x06, 0xFF },
502#endif
503 { 0xE9, 0x21, 0xFF },
504 { 0x01, 0x0C, 0x1F },
505 { 0x01, 0x08, 0x1F },
506 };
507
508 const struct bahama_config_register v20_bt_on_fm_off[] = {
509 { 0x11, 0x0C, 0xFF },
510 { 0x13, 0x01, 0xFF },
511 { 0xF4, 0x80, 0xFF },
512 { 0xF0, 0x00, 0xFF },
513 { 0xE9, 0x00, 0xFF },
514#ifdef CONFIG_WLAN
515 { 0x81, 0x00, 0x7F },
516 { 0x82, 0x00, 0xFF },
517 { 0xE6, 0x38, 0x7F },
518 { 0xE7, 0x06, 0xFF },
519#endif
520 { 0x8E, 0x15, 0xFF },
521 { 0x8F, 0x15, 0xFF },
522 { 0x90, 0x15, 0xFF },
523
524 { 0xE9, 0x21, 0xFF },
525 };
526
527 const struct bahama_config_register v20_bt_on_fm_on[] = {
528 { 0x11, 0x0C, 0xFF },
529 { 0x13, 0x01, 0xFF },
530 { 0xF4, 0x86, 0xFF },
531 { 0xF0, 0x06, 0xFF },
532 { 0xE9, 0x00, 0xFF },
533#ifdef CONFIG_WLAN
534 { 0x81, 0x00, 0x7F },
535 { 0x82, 0x00, 0xFF },
536 { 0xE6, 0x38, 0x7F },
537 { 0xE7, 0x06, 0xFF },
538#endif
539 { 0xE9, 0x21, 0xFF },
540 };
541
542 const struct bahama_config_register v10_bt_off[] = {
543 { 0xE9, 0x00, 0xFF },
544 };
545
546 const struct bahama_config_register v20_bt_off_fm_off[] = {
547 { 0xF4, 0x84, 0xFF },
548 { 0xF0, 0x04, 0xFF },
549 { 0xE9, 0x00, 0xFF }
550 };
551
552 const struct bahama_config_register v20_bt_off_fm_on[] = {
553 { 0xF4, 0x86, 0xFF },
554 { 0xF0, 0x06, 0xFF },
555 { 0xE9, 0x00, 0xFF }
556 };
557 const struct bahama_variant_register bt_bahama[2][3] = {
558 {
559 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
560 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
561 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
562 },
563 {
564 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
565 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
566 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
567 }
568 };
569
570 u8 offset = 0; /* index into bahama configs */
571 on = on ? 1 : 0;
572 version = marimba_read_bahama_ver(&config);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530573 if ((int)version < 0 || version == BAHAMA_VER_UNSUPPORTED) {
574 dev_err(&msm_bt_power_device.dev, "%s: Bahama \
575 version read Error, version = %d \n",
576 __func__, version);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700577 return -EIO;
578 }
579
580 if (version == BAHAMA_VER_2_0) {
581 if (marimba_get_fm_status(&config))
582 offset = 0x01;
583 }
584
585 p = bt_bahama[on][version + offset].set;
586
587 dev_info(&msm_bt_power_device.dev,
588 "%s: found version %d\n", __func__, version);
589
590 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
591 u8 value = (p+i)->value;
592 rc = marimba_write_bit_mask(&config,
593 (p+i)->reg,
594 &value,
595 sizeof((p+i)->value),
596 (p+i)->mask);
597 if (rc < 0) {
598 dev_err(&msm_bt_power_device.dev,
599 "%s: reg %x write failed: %d\n",
600 __func__, (p+i)->reg, rc);
601 return rc;
602 }
Rahul Kashyap92497af2011-07-07 12:13:52 +0530603 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700604 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
605 __func__, (p+i)->reg,
606 value, (p+i)->mask);
607 value = 0;
608 rc = marimba_read_bit_mask(&config,
609 (p+i)->reg, &value,
610 sizeof((p+i)->value), (p+i)->mask);
611 if (rc < 0)
612 dev_err(&msm_bt_power_device.dev, "%s marimba_read_bit_mask- error",
613 __func__);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530614 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700615 "%s: reg 0x%02x read value 0x%02x mask 0x%02x\n",
616 __func__, (p+i)->reg,
617 value, (p+i)->mask);
618 }
619 /* Update BT Status */
620 if (on)
621 marimba_set_bt_status(&config, true);
622 else
623 marimba_set_bt_status(&config, false);
624 return rc;
625}
626static int bluetooth_switch_regulators(int on)
627{
628 int i, rc = 0;
Rahul Kashyap6e669462011-07-23 16:42:56 +0530629 const char *id = "BTPW";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700630
Rahul Kashyap6e669462011-07-23 16:42:56 +0530631 for (i = 0; i < ARRAY_SIZE(bt_vregs); i++) {
632 if (!bt_vregs[i].vregs) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700633 pr_err("%s: vreg_get %s failed(%d)\n",
Rahul Kashyap6e669462011-07-23 16:42:56 +0530634 __func__, bt_vregs[i].name, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700635 goto vreg_fail;
636 }
Rahul Kashyap6e669462011-07-23 16:42:56 +0530637 rc = on ? vreg_set_level(bt_vregs[i].vregs,
638 bt_vregs[i].level) : 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700639
640 if (rc < 0) {
641 pr_err("%s: vreg set level failed (%d)\n",
642 __func__, rc);
643 goto vreg_set_level_fail;
644 }
Rahul Kashyap88124ba2011-08-29 23:30:23 +0530645 rc = on ? vreg_enable(bt_vregs[i].vregs) : 0;
646
647 if (rc < 0) {
648 pr_err("%s: vreg %s %s failed(%d)\n",
649 __func__, bt_vregs[i].name,
650 on ? "enable" : "disable", rc);
651 goto vreg_fail;
652 }
Rahul Kashyap6e669462011-07-23 16:42:56 +0530653 if (bt_vregs[i].is_pin_controlled == 1) {
Rahul Kashyap88124ba2011-08-29 23:30:23 +0530654 rc = pmapp_vreg_lpm_pincntrl_vote(id,
Rahul Kashyap6e669462011-07-23 16:42:56 +0530655 bt_vregs[i].pmapp_id,
656 PMAPP_CLOCK_ID_D1,
657 on ? PMAPP_CLOCK_VOTE_ON :
658 PMAPP_CLOCK_VOTE_OFF);
Rahul Kashyap88124ba2011-08-29 23:30:23 +0530659 if (rc < 0) {
660 pr_err("%s: vreg %s pin ctrl failed(%d)\n",
661 __func__, bt_vregs[i].name,
662 rc);
663 goto pincntrl_fail;
664 }
Rahul Kashyap6e669462011-07-23 16:42:56 +0530665 }
Rahul Kashyap88124ba2011-08-29 23:30:23 +0530666 rc = on ? 0 : vreg_disable(bt_vregs[i].vregs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700667 if (rc < 0) {
668 pr_err("%s: vreg %s %s failed(%d)\n",
Rahul Kashyap6e669462011-07-23 16:42:56 +0530669 __func__, bt_vregs[i].name,
670 on ? "enable" : "disable", rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700671 goto vreg_fail;
Rahul Kashyap6e669462011-07-23 16:42:56 +0530672 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700673 }
Rahul Kashyap6e669462011-07-23 16:42:56 +0530674
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700675 return rc;
Rahul Kashyap88124ba2011-08-29 23:30:23 +0530676pincntrl_fail:
677 if (on)
678 vreg_disable(bt_vregs[i].vregs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700679vreg_fail:
680 while (i) {
681 if (on)
Rahul Kashyap6e669462011-07-23 16:42:56 +0530682 vreg_disable(bt_vregs[--i].vregs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700683 }
684vreg_set_level_fail:
Rahul Kashyap6e669462011-07-23 16:42:56 +0530685 vreg_put(bt_vregs[0].vregs);
686 vreg_put(bt_vregs[1].vregs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700687 return rc;
688}
689
690static unsigned int msm_bahama_setup_power(void)
691{
692 int rc = 0;
693 struct vreg *vreg_s3 = NULL;
694
695 vreg_s3 = vreg_get(NULL, "msme1");
696 if (IS_ERR(vreg_s3)) {
697 pr_err("%s: vreg get failed (%ld)\n",
698 __func__, PTR_ERR(vreg_s3));
699 return PTR_ERR(vreg_s3);
700 }
701 rc = vreg_set_level(vreg_s3, 1800);
702 if (rc < 0) {
703 pr_err("%s: vreg set level failed (%d)\n",
704 __func__, rc);
705 goto vreg_fail;
706 }
707 rc = vreg_enable(vreg_s3);
708 if (rc < 0) {
709 pr_err("%s: vreg enable failed (%d)\n",
710 __func__, rc);
711 goto vreg_fail;
712 }
713
714 /*setup Bahama_sys_reset_n*/
715 rc = gpio_request(GPIO_BT_SYS_REST_EN, "bahama sys_rst_n");
716 if (rc < 0) {
717 pr_err("%s: gpio_request %d = %d\n", __func__,
718 GPIO_BT_SYS_REST_EN, rc);
719 goto vreg_fail;
720 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530721 rc = bt_set_gpio(1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700722 if (rc < 0) {
Rahul Kashyap181d5552011-07-07 10:39:23 +0530723 pr_err("%s: bt_set_gpio %d = %d\n", __func__,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700724 GPIO_BT_SYS_REST_EN, rc);
725 goto gpio_fail;
726 }
727 return rc;
728
729gpio_fail:
730 gpio_free(GPIO_BT_SYS_REST_EN);
731vreg_fail:
732 vreg_put(vreg_s3);
733 return rc;
734}
735
736static unsigned int msm_bahama_shutdown_power(int value)
737{
738 int rc = 0;
739 struct vreg *vreg_s3 = NULL;
740
741 vreg_s3 = vreg_get(NULL, "msme1");
742 if (IS_ERR(vreg_s3)) {
743 pr_err("%s: vreg get failed (%ld)\n",
744 __func__, PTR_ERR(vreg_s3));
745 return PTR_ERR(vreg_s3);
746 }
747 rc = vreg_disable(vreg_s3);
748 if (rc) {
749 pr_err("%s: vreg disable failed (%d)\n",
750 __func__, rc);
751 vreg_put(vreg_s3);
752 return rc;
753 }
Rahul Kashyape8698c62011-07-20 20:43:05 +0530754 if (value == BAHAMA_ID) {
755 rc = bt_set_gpio(0);
756 if (rc) {
757 pr_err("%s: bt_set_gpio = %d\n",
758 __func__, rc);
759 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530760 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700761 return rc;
762}
763
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700764static unsigned int msm_bahama_core_config(int type)
765{
766 int rc = 0;
767
768 if (type == BAHAMA_ID) {
769 int i;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530770 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700771 const struct bahama_config_register v20_init[] = {
772 /* reg, value, mask */
773 { 0xF4, 0x84, 0xFF }, /* AREG */
774 { 0xF0, 0x04, 0xFF } /* DREG */
775 };
776 if (marimba_read_bahama_ver(&config) == BAHAMA_VER_2_0) {
777 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
778 u8 value = v20_init[i].value;
779 rc = marimba_write_bit_mask(&config,
780 v20_init[i].reg,
781 &value,
782 sizeof(v20_init[i].value),
783 v20_init[i].mask);
784 if (rc < 0) {
785 pr_err("%s: reg %d write failed: %d\n",
786 __func__, v20_init[i].reg, rc);
787 return rc;
788 }
789 pr_debug("%s: reg 0x%02x value 0x%02x"
790 " mask 0x%02x\n",
791 __func__, v20_init[i].reg,
792 v20_init[i].value, v20_init[i].mask);
793 }
794 }
795 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530796 rc = bt_set_gpio(0);
797 if (rc) {
798 pr_err("%s: bt_set_gpio = %d\n",
799 __func__, rc);
800 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700801 pr_debug("core type: %d\n", type);
802 return rc;
803}
804
805static int bluetooth_power(int on)
806{
807 int pin, rc = 0;
808 const char *id = "BTPW";
809 int cid = 0;
810
811 cid = adie_get_detected_connectivity_type();
812 if (cid != BAHAMA_ID) {
813 pr_err("%s: unexpected adie connectivity type: %d\n",
814 __func__, cid);
815 return -ENODEV;
816 }
817 if (on) {
818 /*setup power for BT SOC*/
Rahul Kashyap181d5552011-07-07 10:39:23 +0530819 rc = bt_set_gpio(on);
820 if (rc) {
821 pr_err("%s: bt_set_gpio = %d\n",
822 __func__, rc);
823 goto exit;
824 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700825 rc = bluetooth_switch_regulators(on);
826 if (rc < 0) {
827 pr_err("%s: bluetooth_switch_regulators rc = %d",
828 __func__, rc);
829 goto exit;
830 }
831 /*setup BT GPIO lines*/
832 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on);
833 pin++) {
834 rc = gpio_tlmm_config(bt_config_power_on[pin],
835 GPIO_CFG_ENABLE);
836 if (rc < 0) {
837 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
838 __func__,
839 bt_config_power_on[pin],
840 rc);
841 goto fail_power;
842 }
843 }
844 /*Setup BT clocks*/
845 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
846 PMAPP_CLOCK_VOTE_ON);
847 if (rc < 0) {
848 pr_err("Failed to vote for TCXO_D1 ON\n");
849 goto fail_clock;
850 }
851 msleep(20);
852
853 /*I2C config for Bahama*/
854 rc = bahama_bt(1);
855 if (rc < 0) {
856 pr_err("%s: bahama_bt rc = %d", __func__, rc);
857 goto fail_i2c;
858 }
859 msleep(20);
860
861 /*setup BT PCM lines*/
862 rc = msm_bahama_setup_pcm_i2s(BT_PCM_ON);
863 if (rc < 0) {
864 pr_err("%s: msm_bahama_setup_pcm_i2s , rc =%d\n",
865 __func__, rc);
866 goto fail_power;
867 }
868 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
869 PMAPP_CLOCK_VOTE_PIN_CTRL);
870 if (rc < 0)
871 pr_err("%s:Pin Control Failed, rc = %d",
872 __func__, rc);
873
874 } else {
875 rc = bahama_bt(0);
876 if (rc < 0)
877 pr_err("%s: bahama_bt rc = %d", __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530878
879 rc = bt_set_gpio(on);
880 if (rc) {
881 pr_err("%s: bt_set_gpio = %d\n",
882 __func__, rc);
883 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700884fail_i2c:
885 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
886 PMAPP_CLOCK_VOTE_OFF);
887 if (rc < 0)
888 pr_err("%s: Failed to vote Off D1\n", __func__);
889fail_clock:
890 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off);
891 pin++) {
892 rc = gpio_tlmm_config(bt_config_power_off[pin],
893 GPIO_CFG_ENABLE);
894 if (rc < 0) {
895 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
896 __func__, bt_config_power_off[pin], rc);
897 }
898 }
899 rc = msm_bahama_setup_pcm_i2s(BT_PCM_OFF);
900 if (rc < 0) {
901 pr_err("%s: msm_bahama_setup_pcm_i2s, rc =%d\n",
902 __func__, rc);
903 }
904fail_power:
905 rc = bluetooth_switch_regulators(0);
906 if (rc < 0) {
907 pr_err("%s: switch_regulators : rc = %d",\
908 __func__, rc);
909 goto exit;
910 }
911 }
912 return rc;
913exit:
914 pr_err("%s: failed with rc = %d", __func__, rc);
915 return rc;
916}
917
918static int __init bt_power_init(void)
919{
920 int i, rc = 0;
Rahul Kashyap6e669462011-07-23 16:42:56 +0530921 for (i = 0; i < ARRAY_SIZE(bt_vregs); i++) {
922 bt_vregs[i].vregs = vreg_get(NULL,
923 bt_vregs[i].name);
924 if (IS_ERR(bt_vregs[i].vregs)) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700925 pr_err("%s: vreg get %s failed (%ld)\n",
Rahul Kashyap6e669462011-07-23 16:42:56 +0530926 __func__, bt_vregs[i].name,
927 PTR_ERR(bt_vregs[i].vregs));
928 rc = PTR_ERR(bt_vregs[i].vregs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700929 goto vreg_get_fail;
930 }
931 }
932
933 msm_bt_power_device.dev.platform_data = &bluetooth_power;
934
935 return rc;
936
937vreg_get_fail:
938 while (i)
Rahul Kashyap6e669462011-07-23 16:42:56 +0530939 vreg_put(bt_vregs[--i].vregs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700940 return rc;
941}
942
943static struct marimba_platform_data marimba_pdata = {
944 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
945 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
946 .bahama_setup = msm_bahama_setup_power,
947 .bahama_shutdown = msm_bahama_shutdown_power,
948 .bahama_core_config = msm_bahama_core_config,
949 .fm = &marimba_fm_pdata,
950};
951
952#endif
953
954#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
955static struct i2c_board_info core_exp_i2c_info[] __initdata = {
956 {
957 I2C_BOARD_INFO("sx1509q", 0x3e),
958 },
959};
960static struct i2c_board_info cam_exp_i2c_info[] __initdata = {
961 {
962 I2C_BOARD_INFO("sx1508q", 0x22),
963 .platform_data = &sx150x_data[SX150X_CAM],
964 },
965};
966#endif
967#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
968static struct i2c_board_info bahama_devices[] = {
969{
970 I2C_BOARD_INFO("marimba", 0xc),
971 .platform_data = &marimba_pdata,
972},
973};
974#endif
975
976#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
977static void __init register_i2c_devices(void)
978{
979
980 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
981 cam_exp_i2c_info,
982 ARRAY_SIZE(cam_exp_i2c_info));
983
984 if (machine_is_msm7x27a_surf())
985 sx150x_data[SX150X_CORE].io_open_drain_ena = 0xe0f0;
986
987 core_exp_i2c_info[0].platform_data =
988 &sx150x_data[SX150X_CORE];
989
990 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
991 core_exp_i2c_info,
992 ARRAY_SIZE(core_exp_i2c_info));
993#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
994 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
995 bahama_devices,
996 ARRAY_SIZE(bahama_devices));
997#endif
998}
999#endif
1000
1001static struct msm_gpio qup_i2c_gpios_io[] = {
1002 { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1003 "qup_scl" },
1004 { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1005 "qup_sda" },
1006 { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1007 "qup_scl" },
1008 { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1009 "qup_sda" },
1010};
1011
1012static struct msm_gpio qup_i2c_gpios_hw[] = {
1013 { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1014 "qup_scl" },
1015 { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1016 "qup_sda" },
1017 { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1018 "qup_scl" },
1019 { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1020 "qup_sda" },
1021};
1022
1023static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
1024{
1025 int rc;
1026
1027 if (adap_id < 0 || adap_id > 1)
1028 return;
1029
1030 /* Each adapter gets 2 lines from the table */
1031 if (config_type)
1032 rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2);
1033 else
1034 rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2);
1035 if (rc < 0)
1036 pr_err("QUP GPIO request/enable failed: %d\n", rc);
1037}
1038
1039static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = {
1040 .clk_freq = 100000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001041 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1042};
1043
1044static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = {
1045 .clk_freq = 100000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001046 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1047};
1048
1049#ifdef CONFIG_ARCH_MSM7X27A
Prabhanjan Kandula1d920742011-08-19 10:28:11 +05301050#define MSM_PMEM_MDP_SIZE 0x1900000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001051#define MSM_PMEM_ADSP_SIZE 0x1000000
1052
1053#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
1054#define MSM_FB_SIZE 0x260000
1055#else
1056#define MSM_FB_SIZE 0x195000
1057#endif
1058
1059#endif
1060
1061static struct android_usb_platform_data android_usb_pdata = {
1062 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1063};
1064
1065static struct platform_device android_usb_device = {
1066 .name = "android_usb",
1067 .id = -1,
1068 .dev = {
1069 .platform_data = &android_usb_pdata,
1070 },
1071};
1072
1073#ifdef CONFIG_USB_EHCI_MSM_72K
1074static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1075{
1076 int rc = 0;
1077 unsigned gpio;
1078
1079 gpio = GPIO_HOST_VBUS_EN;
1080
1081 rc = gpio_request(gpio, "i2c_host_vbus_en");
1082 if (rc < 0) {
1083 pr_err("failed to request %d GPIO\n", gpio);
1084 return;
1085 }
1086 gpio_direction_output(gpio, !!on);
1087 gpio_set_value_cansleep(gpio, !!on);
1088 gpio_free(gpio);
1089}
1090
1091static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1092 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1093};
1094
1095static void __init msm7x2x_init_host(void)
1096{
1097 msm_add_host(0, &msm_usb_host_pdata);
1098}
1099#endif
1100
1101#ifdef CONFIG_USB_MSM_OTG_72K
1102static int hsusb_rpc_connect(int connect)
1103{
1104 if (connect)
1105 return msm_hsusb_rpc_connect();
1106 else
1107 return msm_hsusb_rpc_close();
1108}
1109
1110static struct vreg *vreg_3p3;
1111static int msm_hsusb_ldo_init(int init)
1112{
1113 if (init) {
1114 vreg_3p3 = vreg_get(NULL, "usb");
1115 if (IS_ERR(vreg_3p3))
1116 return PTR_ERR(vreg_3p3);
1117 } else
1118 vreg_put(vreg_3p3);
1119
1120 return 0;
1121}
1122
1123static int msm_hsusb_ldo_enable(int enable)
1124{
1125 static int ldo_status;
1126
1127 if (!vreg_3p3 || IS_ERR(vreg_3p3))
1128 return -ENODEV;
1129
1130 if (ldo_status == enable)
1131 return 0;
1132
1133 ldo_status = enable;
1134
1135 if (enable)
1136 return vreg_enable(vreg_3p3);
1137
1138 return vreg_disable(vreg_3p3);
1139}
1140
1141#ifndef CONFIG_USB_EHCI_MSM_72K
1142static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
1143{
1144 int ret = 0;
1145
1146 if (init)
1147 ret = msm_pm_app_rpc_init(callback);
1148 else
1149 msm_pm_app_rpc_deinit(callback);
1150
1151 return ret;
1152}
1153#endif
1154
1155static struct msm_otg_platform_data msm_otg_pdata = {
1156#ifndef CONFIG_USB_EHCI_MSM_72K
1157 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
1158#else
1159 .vbus_power = msm_hsusb_vbus_power,
1160#endif
1161 .rpc_connect = hsusb_rpc_connect,
1162 .core_clk = 1,
1163 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1164 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1165 .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT,
1166 .se1_gating = SE1_GATING_DISABLE,
1167 .ldo_init = msm_hsusb_ldo_init,
1168 .ldo_enable = msm_hsusb_ldo_enable,
1169 .chg_init = hsusb_chg_init,
1170 .chg_connected = hsusb_chg_connected,
1171 .chg_vbus_draw = hsusb_chg_vbus_draw,
1172};
1173#endif
1174
1175static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1176 .is_phy_status_timer_on = 1,
1177};
1178
1179static struct resource smc91x_resources[] = {
1180 [0] = {
1181 .start = 0x90000300,
1182 .end = 0x900003ff,
1183 .flags = IORESOURCE_MEM,
1184 },
1185 [1] = {
1186 .start = MSM_GPIO_TO_INT(4),
1187 .end = MSM_GPIO_TO_INT(4),
1188 .flags = IORESOURCE_IRQ,
1189 },
1190};
1191
1192static struct platform_device smc91x_device = {
1193 .name = "smc91x",
1194 .id = 0,
1195 .num_resources = ARRAY_SIZE(smc91x_resources),
1196 .resource = smc91x_resources,
1197};
1198
1199#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1200 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1201 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1202 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1203
1204static unsigned long vreg_sts, gpio_sts;
1205static struct vreg *vreg_mmc;
1206static struct vreg *vreg_emmc;
1207
1208struct sdcc_vreg {
1209 struct vreg *vreg_data;
1210 unsigned level;
1211};
1212
1213static struct sdcc_vreg sdcc_vreg_data[4];
1214
1215struct sdcc_gpio {
1216 struct msm_gpio *cfg_data;
1217 uint32_t size;
1218 struct msm_gpio *sleep_cfg_data;
1219};
1220
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301221/**
1222 * Due to insufficient drive strengths for SDC GPIO lines some old versioned
1223 * SD/MMC cards may cause data CRC errors. Hence, set optimal values
1224 * for SDC slots based on timing closure and marginality. SDC1 slot
1225 * require higher value since it should handle bad signal quality due
1226 * to size of T-flash adapters.
1227 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001228static struct msm_gpio sdc1_cfg_data[] = {
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301229 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001230 "sdc1_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301231 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001232 "sdc1_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301233 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001234 "sdc1_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301235 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001236 "sdc1_dat_0"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301237 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001238 "sdc1_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301239 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001240 "sdc1_clk"},
1241};
1242
1243static struct msm_gpio sdc2_cfg_data[] = {
1244 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1245 "sdc2_clk"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301246 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001247 "sdc2_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301248 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001249 "sdc2_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301250 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001251 "sdc2_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301252 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001253 "sdc2_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301254 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001255 "sdc2_dat_0"},
1256};
1257
1258static struct msm_gpio sdc2_sleep_cfg_data[] = {
Sujith Reddy Thummaf3535672011-08-22 08:53:44 +05301259 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001260 "sdc2_clk"},
Sujith Reddy Thummaf3535672011-08-22 08:53:44 +05301261 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001262 "sdc2_cmd"},
Sujith Reddy Thummaf3535672011-08-22 08:53:44 +05301263 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001264 "sdc2_dat_3"},
Sujith Reddy Thummaf3535672011-08-22 08:53:44 +05301265 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001266 "sdc2_dat_2"},
Sujith Reddy Thummaf3535672011-08-22 08:53:44 +05301267 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001268 "sdc2_dat_1"},
Sujith Reddy Thummaf3535672011-08-22 08:53:44 +05301269 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001270 "sdc2_dat_0"},
1271};
1272static struct msm_gpio sdc3_cfg_data[] = {
1273 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1274 "sdc3_clk"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301275 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001276 "sdc3_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301277 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001278 "sdc3_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301279 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001280 "sdc3_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301281 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001282 "sdc3_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301283 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001284 "sdc3_dat_0"},
1285#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301286 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001287 "sdc3_dat_7"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301288 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001289 "sdc3_dat_6"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301290 {GPIO_CFG(21, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001291 "sdc3_dat_5"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301292 {GPIO_CFG(108, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001293 "sdc3_dat_4"},
1294#endif
1295};
1296
1297static struct msm_gpio sdc4_cfg_data[] = {
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301298 {GPIO_CFG(19, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001299 "sdc4_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301300 {GPIO_CFG(20, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001301 "sdc4_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301302 {GPIO_CFG(21, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001303 "sdc4_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301304 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001305 "sdc4_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301306 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001307 "sdc4_dat_0"},
1308 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1309 "sdc4_clk"},
1310};
1311
1312static struct sdcc_gpio sdcc_cfg_data[] = {
1313 {
1314 .cfg_data = sdc1_cfg_data,
1315 .size = ARRAY_SIZE(sdc1_cfg_data),
1316 },
1317 {
1318 .cfg_data = sdc2_cfg_data,
1319 .size = ARRAY_SIZE(sdc2_cfg_data),
1320 .sleep_cfg_data = sdc2_sleep_cfg_data,
1321 },
1322 {
1323 .cfg_data = sdc3_cfg_data,
1324 .size = ARRAY_SIZE(sdc3_cfg_data),
1325 },
1326 {
1327 .cfg_data = sdc4_cfg_data,
1328 .size = ARRAY_SIZE(sdc4_cfg_data),
1329 },
1330};
1331
1332static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1333{
1334 int rc = 0;
1335 struct sdcc_gpio *curr;
1336
1337 curr = &sdcc_cfg_data[dev_id - 1];
1338 if (!(test_bit(dev_id, &gpio_sts)^enable))
1339 return rc;
1340
1341 if (enable) {
1342 set_bit(dev_id, &gpio_sts);
1343 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1344 if (rc)
1345 pr_err("%s: Failed to turn on GPIOs for slot %d\n",
1346 __func__, dev_id);
1347 } else {
1348 clear_bit(dev_id, &gpio_sts);
1349 if (curr->sleep_cfg_data) {
1350 rc = msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1351 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1352 return rc;
1353 }
1354 msm_gpios_disable_free(curr->cfg_data, curr->size);
1355 }
1356 return rc;
1357}
1358
1359static int msm_sdcc_setup_vreg(int dev_id, unsigned int enable)
1360{
1361 int rc = 0;
1362 struct sdcc_vreg *curr;
1363
1364 curr = &sdcc_vreg_data[dev_id - 1];
1365
1366 if (!(test_bit(dev_id, &vreg_sts)^enable))
1367 return rc;
1368
1369 if (enable) {
1370 set_bit(dev_id, &vreg_sts);
1371 rc = vreg_set_level(curr->vreg_data, curr->level);
1372 if (rc)
1373 pr_err("%s: vreg_set_level() = %d\n", __func__, rc);
1374
1375 rc = vreg_enable(curr->vreg_data);
1376 if (rc)
1377 pr_err("%s: vreg_enable() = %d\n", __func__, rc);
1378 } else {
1379 clear_bit(dev_id, &vreg_sts);
1380 rc = vreg_disable(curr->vreg_data);
1381 if (rc)
1382 pr_err("%s: vreg_disable() = %d\n", __func__, rc);
1383 }
1384 return rc;
1385}
1386
1387static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1388{
1389 int rc = 0;
1390 struct platform_device *pdev;
1391
1392 pdev = container_of(dv, struct platform_device, dev);
1393
1394 rc = msm_sdcc_setup_gpio(pdev->id, !!vdd);
1395 if (rc)
1396 goto out;
1397
1398 rc = msm_sdcc_setup_vreg(pdev->id, !!vdd);
1399out:
1400 return rc;
1401}
1402
1403#define GPIO_SDC1_HW_DET 85
1404
1405#if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \
1406 && defined(CONFIG_MMC_MSM_CARD_HW_DETECTION)
1407static unsigned int msm7x2xa_sdcc_slot_status(struct device *dev)
1408{
1409 int status;
1410
1411 status = gpio_tlmm_config(GPIO_CFG(GPIO_SDC1_HW_DET, 2, GPIO_CFG_INPUT,
1412 GPIO_CFG_PULL_UP, GPIO_CFG_8MA), GPIO_CFG_ENABLE);
1413 if (status)
1414 pr_err("%s:Failed to configure tlmm for GPIO %d\n", __func__,
1415 GPIO_SDC1_HW_DET);
1416
1417 status = gpio_request(GPIO_SDC1_HW_DET, "SD_HW_Detect");
1418 if (status) {
1419 pr_err("%s:Failed to request GPIO %d\n", __func__,
1420 GPIO_SDC1_HW_DET);
1421 } else {
1422 status = gpio_direction_input(GPIO_SDC1_HW_DET);
1423 if (!status)
1424 status = gpio_get_value(GPIO_SDC1_HW_DET);
1425 gpio_free(GPIO_SDC1_HW_DET);
1426 }
1427 return status;
1428}
1429#endif
1430
1431#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1432static struct mmc_platform_data sdc1_plat_data = {
1433 .ocr_mask = MMC_VDD_28_29,
1434 .translate_vdd = msm_sdcc_setup_power,
1435 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1436 .msmsdcc_fmin = 144000,
1437 .msmsdcc_fmid = 24576000,
1438 .msmsdcc_fmax = 49152000,
1439#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
1440 .status = msm7x2xa_sdcc_slot_status,
1441 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
1442 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1443#endif
1444};
1445#endif
1446
1447#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1448static struct mmc_platform_data sdc2_plat_data = {
1449 /*
1450 * SDC2 supports only 1.8V, claim for 2.85V range is just
1451 * for allowing buggy cards who advertise 2.8V even though
1452 * they can operate at 1.8V supply.
1453 */
1454 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_165_195,
1455 .translate_vdd = msm_sdcc_setup_power,
1456 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1457#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1458 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1459#endif
1460 .msmsdcc_fmin = 144000,
1461 .msmsdcc_fmid = 24576000,
1462 .msmsdcc_fmax = 49152000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001463};
1464#endif
1465
1466#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1467static struct mmc_platform_data sdc3_plat_data = {
1468 .ocr_mask = MMC_VDD_28_29,
1469 .translate_vdd = msm_sdcc_setup_power,
1470#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1471 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
1472#else
1473 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1474#endif
1475 .msmsdcc_fmin = 144000,
1476 .msmsdcc_fmid = 24576000,
1477 .msmsdcc_fmax = 49152000,
1478 .nonremovable = 1,
1479};
1480#endif
1481
1482#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1483 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1484static struct mmc_platform_data sdc4_plat_data = {
1485 .ocr_mask = MMC_VDD_28_29,
1486 .translate_vdd = msm_sdcc_setup_power,
1487 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1488 .msmsdcc_fmin = 144000,
1489 .msmsdcc_fmid = 24576000,
1490 .msmsdcc_fmax = 49152000,
1491};
1492#endif
1493#endif
1494
1495#ifdef CONFIG_SERIAL_MSM_HS
1496static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
1497 .inject_rx_on_wakeup = 1,
1498 .rx_to_inject = 0xFD,
1499};
1500#endif
1501static struct msm_pm_platform_data msm7x27a_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1502 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1503 .idle_supported = 1,
1504 .suspend_supported = 1,
1505 .idle_enabled = 1,
1506 .suspend_enabled = 1,
1507 .latency = 16000,
1508 .residency = 20000,
1509 },
1510 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1511 .idle_supported = 1,
1512 .suspend_supported = 1,
1513 .idle_enabled = 1,
1514 .suspend_enabled = 1,
1515 .latency = 12000,
1516 .residency = 20000,
1517 },
1518 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1519 .idle_supported = 1,
1520 .suspend_supported = 1,
1521 .idle_enabled = 0,
1522 .suspend_enabled = 1,
1523 .latency = 2000,
1524 .residency = 0,
1525 },
1526 [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = {
1527 .idle_supported = 1,
1528 .suspend_supported = 1,
1529 .idle_enabled = 1,
1530 .suspend_enabled = 1,
1531 .latency = 2,
1532 .residency = 0,
1533 },
1534};
1535
1536static struct android_pmem_platform_data android_pmem_adsp_pdata = {
1537 .name = "pmem_adsp",
1538 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
Mahesh Lankac6af7eb2011-08-02 18:00:35 +05301539 .cached = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001540 .memory_type = MEMTYPE_EBI1,
1541};
1542
1543static struct platform_device android_pmem_adsp_device = {
1544 .name = "android_pmem",
1545 .id = 1,
1546 .dev = { .platform_data = &android_pmem_adsp_pdata },
1547};
1548
1549static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1550static int __init pmem_mdp_size_setup(char *p)
1551{
1552 pmem_mdp_size = memparse(p, NULL);
1553 return 0;
1554}
1555
1556early_param("pmem_mdp_size", pmem_mdp_size_setup);
1557
1558static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1559static int __init pmem_adsp_size_setup(char *p)
1560{
1561 pmem_adsp_size = memparse(p, NULL);
1562 return 0;
1563}
1564
1565early_param("pmem_adsp_size", pmem_adsp_size_setup);
1566
1567static unsigned fb_size = MSM_FB_SIZE;
1568static int __init fb_size_setup(char *p)
1569{
1570 fb_size = memparse(p, NULL);
1571 return 0;
1572}
1573
1574early_param("fb_size", fb_size_setup);
1575
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001576static const char * const msm_fb_lcdc_vreg[] = {
1577 "gp2",
1578 "msme1",
1579};
1580
1581static const int msm_fb_lcdc_vreg_mV[] = {
1582 2850,
1583 1800,
1584};
1585
1586struct vreg *lcdc_vreg[ARRAY_SIZE(msm_fb_lcdc_vreg)];
1587
1588static uint32_t lcdc_gpio_initialized;
1589
1590static void lcdc_toshiba_gpio_init(void)
1591{
1592 int i, rc = 0;
1593 if (!lcdc_gpio_initialized) {
1594 if (gpio_request(GPIO_SPI_CLK, "spi_clk")) {
1595 pr_err("failed to request gpio spi_clk\n");
1596 return;
1597 }
1598 if (gpio_request(GPIO_SPI_CS0_N, "spi_cs")) {
1599 pr_err("failed to request gpio spi_cs0_N\n");
1600 goto fail_gpio6;
1601 }
1602 if (gpio_request(GPIO_SPI_MOSI, "spi_mosi")) {
1603 pr_err("failed to request gpio spi_mosi\n");
1604 goto fail_gpio5;
1605 }
1606 if (gpio_request(GPIO_SPI_MISO, "spi_miso")) {
1607 pr_err("failed to request gpio spi_miso\n");
1608 goto fail_gpio4;
1609 }
1610 if (gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr")) {
1611 pr_err("failed to request gpio_disp_pwr\n");
1612 goto fail_gpio3;
1613 }
1614 if (gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en")) {
1615 pr_err("failed to request gpio_bkl_en\n");
1616 goto fail_gpio2;
1617 }
1618 pmapp_disp_backlight_init();
1619
1620 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1621 lcdc_vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
1622
1623 rc = vreg_set_level(lcdc_vreg[i],
1624 msm_fb_lcdc_vreg_mV[i]);
1625
1626 if (rc < 0) {
1627 pr_err("%s: set regulator level failed "
1628 "with :(%d)\n", __func__, rc);
1629 goto fail_gpio1;
1630 }
1631 }
1632 lcdc_gpio_initialized = 1;
1633 }
1634 return;
1635
1636fail_gpio1:
1637 for (; i > 0; i--)
1638 vreg_put(lcdc_vreg[i - 1]);
1639
1640 gpio_free(GPIO_BACKLIGHT_EN);
1641fail_gpio2:
1642 gpio_free(GPIO_DISPLAY_PWR_EN);
1643fail_gpio3:
1644 gpio_free(GPIO_SPI_MISO);
1645fail_gpio4:
1646 gpio_free(GPIO_SPI_MOSI);
1647fail_gpio5:
1648 gpio_free(GPIO_SPI_CS0_N);
1649fail_gpio6:
1650 gpio_free(GPIO_SPI_CLK);
1651 lcdc_gpio_initialized = 0;
1652}
1653
1654static uint32_t lcdc_gpio_table[] = {
1655 GPIO_SPI_CLK,
1656 GPIO_SPI_CS0_N,
1657 GPIO_SPI_MOSI,
1658 GPIO_DISPLAY_PWR_EN,
1659 GPIO_BACKLIGHT_EN,
1660 GPIO_SPI_MISO,
1661};
1662
1663static void config_lcdc_gpio_table(uint32_t *table, int len, unsigned enable)
1664{
1665 int n;
1666
1667 if (lcdc_gpio_initialized) {
1668 /* All are IO Expander GPIOs */
1669 for (n = 0; n < (len - 1); n++)
1670 gpio_direction_output(table[n], 1);
1671 }
1672}
1673
1674static void lcdc_toshiba_config_gpios(int enable)
1675{
1676 config_lcdc_gpio_table(lcdc_gpio_table,
1677 ARRAY_SIZE(lcdc_gpio_table), enable);
1678}
1679
1680static int msm_fb_lcdc_power_save(int on)
1681{
1682 int i, rc = 0;
1683 /* Doing the init of the LCDC GPIOs very late as they are from
1684 an I2C-controlled IO Expander */
1685 lcdc_toshiba_gpio_init();
1686
1687 if (lcdc_gpio_initialized) {
1688 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
1689 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
1690
1691 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1692 if (on) {
1693 rc = vreg_enable(lcdc_vreg[i]);
1694
1695 if (rc) {
1696 printk(KERN_ERR "vreg_enable: %s vreg"
1697 "operation failed\n",
1698 msm_fb_lcdc_vreg[i]);
1699 goto lcdc_vreg_fail;
1700 }
1701 } else {
1702 rc = vreg_disable(lcdc_vreg[i]);
1703
1704 if (rc) {
1705 printk(KERN_ERR "vreg_disable: %s vreg "
1706 "operation failed\n",
1707 msm_fb_lcdc_vreg[i]);
1708 goto lcdc_vreg_fail;
1709 }
1710 }
1711 }
1712 }
1713
1714 return rc;
1715
1716lcdc_vreg_fail:
1717 if (on) {
1718 for (; i > 0; i--)
1719 vreg_disable(lcdc_vreg[i - 1]);
1720 } else {
1721 for (; i > 0; i--)
1722 vreg_enable(lcdc_vreg[i - 1]);
1723 }
1724
1725return rc;
1726
1727}
1728
1729
1730static int lcdc_toshiba_set_bl(int level)
1731{
1732 int ret;
1733
1734 ret = pmapp_disp_backlight_set_brightness(level);
1735 if (ret)
1736 pr_err("%s: can't set lcd backlight!\n", __func__);
1737
1738 return ret;
1739}
1740
1741
1742static struct lcdc_platform_data lcdc_pdata = {
Jeevan Shriram15f2a5e2011-07-13 21:45:26 +05301743 .lcdc_gpio_config = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001744 .lcdc_power_save = msm_fb_lcdc_power_save,
1745};
1746
1747static int lcd_panel_spi_gpio_num[] = {
1748 GPIO_SPI_MOSI, /* spi_sdi */
1749 GPIO_SPI_MISO, /* spi_sdoi */
1750 GPIO_SPI_CLK, /* spi_clk */
1751 GPIO_SPI_CS0_N, /* spi_cs */
1752};
1753
1754static struct msm_panel_common_pdata lcdc_toshiba_panel_data = {
1755 .panel_config_gpio = lcdc_toshiba_config_gpios,
1756 .pmic_backlight = lcdc_toshiba_set_bl,
1757 .gpio_num = lcd_panel_spi_gpio_num,
1758};
1759
1760static struct platform_device lcdc_toshiba_panel_device = {
1761 .name = "lcdc_toshiba_fwvga_pt",
1762 .id = 0,
1763 .dev = {
1764 .platform_data = &lcdc_toshiba_panel_data,
1765 }
1766};
1767
1768static struct resource msm_fb_resources[] = {
1769 {
1770 .flags = IORESOURCE_DMA,
1771 }
1772};
1773
1774static int msm_fb_detect_panel(const char *name)
1775{
1776 int ret = -EPERM;
1777
1778 if (machine_is_msm7x27a_surf()) {
1779 if (!strncmp(name, "lcdc_toshiba_fwvga_pt", 21))
1780 ret = 0;
1781 } else {
1782 ret = -ENODEV;
1783 }
1784
1785 return ret;
1786}
1787
1788static struct msm_fb_platform_data msm_fb_pdata = {
1789 .detect_client = msm_fb_detect_panel,
1790};
1791
1792static struct platform_device msm_fb_device = {
1793 .name = "msm_fb",
1794 .id = 0,
1795 .num_resources = ARRAY_SIZE(msm_fb_resources),
1796 .resource = msm_fb_resources,
1797 .dev = {
1798 .platform_data = &msm_fb_pdata,
1799 }
1800};
1801
1802#ifdef CONFIG_FB_MSM_MIPI_DSI
1803static int mipi_renesas_set_bl(int level)
1804{
1805 int ret;
1806
1807 ret = pmapp_disp_backlight_set_brightness(level);
1808
1809 if (ret)
1810 pr_err("%s: can't set lcd backlight!\n", __func__);
1811
1812 return ret;
1813}
1814
1815static struct msm_panel_common_pdata mipi_renesas_pdata = {
1816 .pmic_backlight = mipi_renesas_set_bl,
1817};
1818
1819
1820static struct platform_device mipi_dsi_renesas_panel_device = {
1821 .name = "mipi_renesas",
1822 .id = 0,
1823 .dev = {
1824 .platform_data = &mipi_renesas_pdata,
1825 }
1826};
1827#endif
1828
1829static void __init msm7x27a_init_mmc(void)
1830{
1831 vreg_emmc = vreg_get(NULL, "emmc");
1832 if (IS_ERR(vreg_emmc)) {
1833 pr_err("%s: vreg get failed (%ld)\n",
1834 __func__, PTR_ERR(vreg_emmc));
1835 return;
1836 }
1837
1838 vreg_mmc = vreg_get(NULL, "mmc");
1839 if (IS_ERR(vreg_mmc)) {
1840 pr_err("%s: vreg get failed (%ld)\n",
1841 __func__, PTR_ERR(vreg_mmc));
1842 return;
1843 }
1844
1845 /* eMMC slot */
1846#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1847 sdcc_vreg_data[2].vreg_data = vreg_emmc;
1848 sdcc_vreg_data[2].level = 3000;
1849 msm_add_sdcc(3, &sdc3_plat_data);
1850#endif
1851 /* Micro-SD slot */
1852#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1853 sdcc_vreg_data[0].vreg_data = vreg_mmc;
1854 sdcc_vreg_data[0].level = 2850;
1855 msm_add_sdcc(1, &sdc1_plat_data);
1856#endif
1857 /* SDIO WLAN slot */
1858#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1859 sdcc_vreg_data[1].vreg_data = vreg_mmc;
1860 sdcc_vreg_data[1].level = 2850;
1861 msm_add_sdcc(2, &sdc2_plat_data);
1862#endif
1863 /* Not Used */
1864#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1865 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1866 sdcc_vreg_data[3].vreg_data = vreg_mmc;
1867 sdcc_vreg_data[3].level = 2850;
1868 msm_add_sdcc(4, &sdc4_plat_data);
1869#endif
1870}
1871#define SND(desc, num) { .name = #desc, .id = num }
1872static struct snd_endpoint snd_endpoints_list[] = {
1873 SND(HANDSET, 0),
1874 SND(MONO_HEADSET, 2),
1875 SND(HEADSET, 3),
1876 SND(SPEAKER, 6),
1877 SND(TTY_HEADSET, 8),
1878 SND(TTY_VCO, 9),
1879 SND(TTY_HCO, 10),
1880 SND(BT, 12),
1881 SND(IN_S_SADC_OUT_HANDSET, 16),
1882 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
1883 SND(FM_DIGITAL_STEREO_HEADSET, 26),
1884 SND(FM_DIGITAL_SPEAKER_PHONE, 27),
1885 SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
Sidipotu Ashokab34ca42011-07-22 16:34:20 +05301886 SND(CURRENT, 0x7FFFFFFE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001887 SND(FM_ANALOG_STEREO_HEADSET, 35),
1888 SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
1889};
1890#undef SND
1891
1892static struct msm_snd_endpoints msm_device_snd_endpoints = {
1893 .endpoints = snd_endpoints_list,
1894 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
1895};
1896
1897static struct platform_device msm_device_snd = {
1898 .name = "msm_snd",
1899 .id = -1,
1900 .dev = {
1901 .platform_data = &msm_device_snd_endpoints
1902 },
1903};
1904
1905#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1906 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1907 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1908 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1909 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1910 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1911#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1912 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1913 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1914 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1915 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1916 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1917#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1918 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1919 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1920 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1921 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1922 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1923#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1924 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1925 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1926 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1927 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1928 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1929#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
1930
1931static unsigned int dec_concurrency_table[] = {
1932 /* Audio LP */
1933 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
1934 0, 0, 0,
1935
1936 /* Concurrency 1 */
1937 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1938 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1939 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1940 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1941 (DEC4_FORMAT),
1942
1943 /* Concurrency 2 */
1944 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1945 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1946 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1947 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1948 (DEC4_FORMAT),
1949
1950 /* Concurrency 3 */
1951 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1952 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1953 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1954 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1955 (DEC4_FORMAT),
1956
1957 /* Concurrency 4 */
1958 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1959 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1960 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1961 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1962 (DEC4_FORMAT),
1963
1964 /* Concurrency 5 */
1965 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1966 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1967 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1968 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1969 (DEC4_FORMAT),
1970
1971 /* Concurrency 6 */
1972 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1973 0, 0, 0, 0,
1974
1975 /* Concurrency 7 */
1976 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1977 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1978 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1979 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1980 (DEC4_FORMAT),
1981};
1982
1983#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
1984 .module_queueid = queueid, .module_decid = decid, \
1985 .nr_codec_support = nr_codec}
1986
1987static struct msm_adspdec_info dec_info_list[] = {
1988 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
1989 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
1990 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
1991 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
1992 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
1993};
1994
1995static struct msm_adspdec_database msm_device_adspdec_database = {
1996 .num_dec = ARRAY_SIZE(dec_info_list),
1997 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
1998 ARRAY_SIZE(dec_info_list)),
1999 .dec_concurrency_table = dec_concurrency_table,
2000 .dec_info_list = dec_info_list,
2001};
2002
2003static struct platform_device msm_device_adspdec = {
2004 .name = "msm_adspdec",
2005 .id = -1,
2006 .dev = {
2007 .platform_data = &msm_device_adspdec_database
2008 },
2009};
2010
2011static struct android_pmem_platform_data android_pmem_audio_pdata = {
2012 .name = "pmem_audio",
2013 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2014 .cached = 0,
2015 .memory_type = MEMTYPE_EBI1,
2016};
2017
2018static struct platform_device android_pmem_audio_device = {
2019 .name = "android_pmem",
2020 .id = 2,
2021 .dev = { .platform_data = &android_pmem_audio_pdata },
2022};
2023
2024static struct android_pmem_platform_data android_pmem_pdata = {
2025 .name = "pmem",
2026 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2027 .cached = 1,
2028 .memory_type = MEMTYPE_EBI1,
2029};
2030static struct platform_device android_pmem_device = {
2031 .name = "android_pmem",
2032 .id = 0,
2033 .dev = { .platform_data = &android_pmem_pdata },
2034};
2035
2036static u32 msm_calculate_batt_capacity(u32 current_voltage);
2037
2038static struct msm_psy_batt_pdata msm_psy_batt_data = {
2039 .voltage_min_design = 2800,
2040 .voltage_max_design = 4300,
2041 .avail_chg_sources = AC_CHG | USB_CHG ,
2042 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
2043 .calculate_capacity = &msm_calculate_batt_capacity,
2044};
2045
2046static u32 msm_calculate_batt_capacity(u32 current_voltage)
2047{
2048 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
2049 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
2050
2051 return (current_voltage - low_voltage) * 100
2052 / (high_voltage - low_voltage);
2053}
2054
2055static struct platform_device msm_batt_device = {
2056 .name = "msm-battery",
2057 .id = -1,
2058 .dev.platform_data = &msm_psy_batt_data,
2059};
2060
2061static struct smsc911x_platform_config smsc911x_config = {
2062 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
2063 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
2064 .flags = SMSC911X_USE_16BIT,
2065};
2066
2067static struct resource smsc911x_resources[] = {
2068 [0] = {
2069 .start = 0x90000000,
2070 .end = 0x90007fff,
2071 .flags = IORESOURCE_MEM,
2072 },
2073 [1] = {
2074 .start = MSM_GPIO_TO_INT(48),
2075 .end = MSM_GPIO_TO_INT(48),
2076 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
2077 },
2078};
2079
2080static struct platform_device smsc911x_device = {
2081 .name = "smsc911x",
2082 .id = 0,
2083 .num_resources = ARRAY_SIZE(smsc911x_resources),
2084 .resource = smsc911x_resources,
2085 .dev = {
2086 .platform_data = &smsc911x_config,
2087 },
2088};
2089
2090static struct msm_gpio smsc911x_gpios[] = {
2091 { GPIO_CFG(48, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2092 "smsc911x_irq" },
2093 { GPIO_CFG(49, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2094 "eth_fifo_sel" },
2095};
2096
2097#define ETH_FIFO_SEL_GPIO 49
2098static void msm7x27a_cfg_smsc911x(void)
2099{
2100 int res;
2101
2102 res = msm_gpios_request_enable(smsc911x_gpios,
2103 ARRAY_SIZE(smsc911x_gpios));
2104 if (res) {
2105 pr_err("%s: unable to enable gpios for SMSC911x\n", __func__);
2106 return;
2107 }
2108
2109 /* ETH_FIFO_SEL */
2110 res = gpio_direction_output(ETH_FIFO_SEL_GPIO, 0);
2111 if (res) {
2112 pr_err("%s: unable to get direction for gpio %d\n", __func__,
2113 ETH_FIFO_SEL_GPIO);
2114 msm_gpios_disable_free(smsc911x_gpios,
2115 ARRAY_SIZE(smsc911x_gpios));
2116 return;
2117 }
2118 gpio_set_value(ETH_FIFO_SEL_GPIO, 0);
2119}
2120
2121#ifdef CONFIG_MSM_CAMERA
2122static uint32_t camera_off_gpio_table[] = {
2123 GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2124};
2125
2126static uint32_t camera_on_gpio_table[] = {
2127 GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2128};
2129
2130#ifdef CONFIG_MSM_CAMERA_FLASH
2131static struct msm_camera_sensor_flash_src msm_flash_src = {
Nishant Pandit474f2252011-07-23 23:17:56 +05302132 .flash_sr_type = MSM_CAMERA_FLASH_SRC_EXT,
2133 ._fsrc.ext_driver_src.led_en = GPIO_CAM_GP_LED_EN1,
2134 ._fsrc.ext_driver_src.led_flash_en = GPIO_CAM_GP_LED_EN2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002135};
2136#endif
2137
2138static struct vreg *vreg_gp1;
2139static struct vreg *vreg_gp2;
2140static struct vreg *vreg_gp3;
2141static void msm_camera_vreg_config(int vreg_en)
2142{
2143 int rc;
2144
2145 if (vreg_gp1 == NULL) {
2146 vreg_gp1 = vreg_get(NULL, "msme1");
2147 if (IS_ERR(vreg_gp1)) {
2148 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2149 __func__, "msme1", PTR_ERR(vreg_gp1));
2150 return;
2151 }
2152
2153 rc = vreg_set_level(vreg_gp1, 1800);
2154 if (rc) {
2155 pr_err("%s: GP1 set_level failed (%d)\n",
2156 __func__, rc);
2157 return;
2158 }
2159 }
2160
2161 if (vreg_gp2 == NULL) {
2162 vreg_gp2 = vreg_get(NULL, "gp2");
2163 if (IS_ERR(vreg_gp2)) {
2164 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2165 __func__, "gp2", PTR_ERR(vreg_gp2));
2166 return;
2167 }
2168
2169 rc = vreg_set_level(vreg_gp2, 2850);
2170 if (rc) {
2171 pr_err("%s: GP2 set_level failed (%d)\n",
2172 __func__, rc);
2173 }
2174 }
2175
2176 if (vreg_gp3 == NULL) {
2177 vreg_gp3 = vreg_get(NULL, "usb2");
2178 if (IS_ERR(vreg_gp3)) {
2179 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2180 __func__, "gp3", PTR_ERR(vreg_gp3));
2181 return;
2182 }
2183
2184 rc = vreg_set_level(vreg_gp3, 1800);
2185 if (rc) {
2186 pr_err("%s: GP3 set level failed (%d)\n",
2187 __func__, rc);
2188 }
2189 }
2190
2191 if (vreg_en) {
2192 rc = vreg_enable(vreg_gp1);
2193 if (rc) {
2194 pr_err("%s: GP1 enable failed (%d)\n",
2195 __func__, rc);
2196 return;
2197 }
2198
2199 rc = vreg_enable(vreg_gp2);
2200 if (rc) {
2201 pr_err("%s: GP2 enable failed (%d)\n",
2202 __func__, rc);
2203 }
2204
2205 rc = vreg_enable(vreg_gp3);
2206 if (rc) {
2207 pr_err("%s: GP3 enable failed (%d)\n",
2208 __func__, rc);
2209 }
2210 } else {
2211 rc = vreg_disable(vreg_gp1);
2212 if (rc)
2213 pr_err("%s: GP1 disable failed (%d)\n",
2214 __func__, rc);
2215
2216 rc = vreg_disable(vreg_gp2);
2217 if (rc) {
2218 pr_err("%s: GP2 disable failed (%d)\n",
2219 __func__, rc);
2220 }
2221
2222 rc = vreg_disable(vreg_gp3);
2223 if (rc) {
2224 pr_err("%s: GP3 disable failed (%d)\n",
2225 __func__, rc);
2226 }
2227 }
2228}
2229
2230static int config_gpio_table(uint32_t *table, int len)
2231{
2232 int rc = 0, i = 0;
2233
2234 for (i = 0; i < len; i++) {
2235 rc = gpio_tlmm_config(table[i], GPIO_CFG_ENABLE);
2236 if (rc) {
2237 pr_err("%s not able to get gpio\n", __func__);
2238 for (i--; i >= 0; i--)
2239 gpio_tlmm_config(camera_off_gpio_table[i],
2240 GPIO_CFG_ENABLE);
2241 break;
2242 }
2243 }
2244 return rc;
2245}
2246
2247static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data;
2248static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data;
2249static int config_camera_on_gpios_rear(void)
2250{
2251 int rc = 0;
2252
2253 if (machine_is_msm7x27a_ffa())
2254 msm_camera_vreg_config(1);
2255
2256 rc = config_gpio_table(camera_on_gpio_table,
2257 ARRAY_SIZE(camera_on_gpio_table));
2258 if (rc < 0) {
2259 pr_err("%s: CAMSENSOR gpio table request"
2260 "failed\n", __func__);
2261 return rc;
2262 }
2263
2264 return rc;
2265}
2266
2267static void config_camera_off_gpios_rear(void)
2268{
2269 if (machine_is_msm7x27a_ffa())
2270 msm_camera_vreg_config(0);
2271
2272 config_gpio_table(camera_off_gpio_table,
2273 ARRAY_SIZE(camera_off_gpio_table));
2274}
2275
2276static int config_camera_on_gpios_front(void)
2277{
2278 int rc = 0;
2279
2280 if (machine_is_msm7x27a_ffa())
2281 msm_camera_vreg_config(1);
2282
2283 rc = config_gpio_table(camera_on_gpio_table,
2284 ARRAY_SIZE(camera_on_gpio_table));
2285 if (rc < 0) {
2286 pr_err("%s: CAMSENSOR gpio table request"
2287 "failed\n", __func__);
2288 return rc;
2289 }
2290
2291 return rc;
2292}
2293
2294static void config_camera_off_gpios_front(void)
2295{
2296 if (machine_is_msm7x27a_ffa())
2297 msm_camera_vreg_config(0);
2298
2299 config_gpio_table(camera_off_gpio_table,
2300 ARRAY_SIZE(camera_off_gpio_table));
2301}
2302
2303struct msm_camera_device_platform_data msm_camera_device_data_rear = {
2304 .camera_gpio_on = config_camera_on_gpios_rear,
2305 .camera_gpio_off = config_camera_off_gpios_rear,
2306 .ioext.csiphy = 0xA1000000,
2307 .ioext.csisz = 0x00100000,
2308 .ioext.csiirq = INT_CSI_IRQ_1,
2309 .ioclk.mclk_clk_rate = 24000000,
2310 .ioclk.vfe_clk_rate = 192000000,
2311 .ioext.appphy = MSM_CLK_CTL_PHYS,
2312 .ioext.appsz = MSM_CLK_CTL_SIZE,
2313};
2314
2315struct msm_camera_device_platform_data msm_camera_device_data_front = {
2316 .camera_gpio_on = config_camera_on_gpios_front,
2317 .camera_gpio_off = config_camera_off_gpios_front,
2318 .ioext.csiphy = 0xA0F00000,
2319 .ioext.csisz = 0x00100000,
2320 .ioext.csiirq = INT_CSI_IRQ_0,
2321 .ioclk.mclk_clk_rate = 24000000,
2322 .ioclk.vfe_clk_rate = 192000000,
2323 .ioext.appphy = MSM_CLK_CTL_PHYS,
2324 .ioext.appsz = MSM_CLK_CTL_SIZE,
2325};
2326
2327#ifdef CONFIG_S5K4E1
2328static struct msm_camera_sensor_platform_info s5k4e1_sensor_7627a_info = {
2329 .mount_angle = 90
2330};
2331
2332static struct msm_camera_sensor_flash_data flash_s5k4e1 = {
2333 .flash_type = MSM_CAMERA_FLASH_LED,
2334 .flash_src = &msm_flash_src
2335};
2336
2337static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data = {
2338 .sensor_name = "s5k4e1",
2339 .sensor_reset_enable = 1,
2340 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N,
2341 .sensor_pwd = 85,
2342 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2343 .vcm_enable = 1,
2344 .pdata = &msm_camera_device_data_rear,
2345 .flash_data = &flash_s5k4e1,
2346 .sensor_platform_info = &s5k4e1_sensor_7627a_info,
2347 .csi_if = 1
2348};
2349
2350static struct platform_device msm_camera_sensor_s5k4e1 = {
2351 .name = "msm_camera_s5k4e1",
2352 .dev = {
2353 .platform_data = &msm_camera_sensor_s5k4e1_data,
2354 },
2355};
2356#endif
2357
2358#ifdef CONFIG_IMX072
2359static struct msm_camera_sensor_platform_info imx072_sensor_7627a_info = {
2360 .mount_angle = 90
2361};
2362
2363static struct msm_camera_sensor_flash_data flash_imx072 = {
2364 .flash_type = MSM_CAMERA_FLASH_LED,
2365 .flash_src = &msm_flash_src
2366};
2367
2368static struct msm_camera_sensor_info msm_camera_sensor_imx072_data = {
2369 .sensor_name = "imx072",
2370 .sensor_reset_enable = 1,
2371 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N, /* TODO 106,*/
2372 .sensor_pwd = 85,
2373 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2374 .vcm_enable = 1,
2375 .pdata = &msm_camera_device_data_rear,
2376 .flash_data = &flash_imx072,
2377 .sensor_platform_info = &imx072_sensor_7627a_info,
2378 .csi_if = 1
2379};
2380
2381static struct platform_device msm_camera_sensor_imx072 = {
2382 .name = "msm_camera_imx072",
2383 .dev = {
2384 .platform_data = &msm_camera_sensor_imx072_data,
2385 },
2386};
2387#endif
2388
2389#ifdef CONFIG_WEBCAM_OV9726
2390static struct msm_camera_sensor_platform_info ov9726_sensor_7627a_info = {
2391 .mount_angle = 90
2392};
2393
2394static struct msm_camera_sensor_flash_data flash_ov9726 = {
2395 .flash_type = MSM_CAMERA_FLASH_NONE,
2396 .flash_src = &msm_flash_src
2397};
2398
2399static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2400 .sensor_name = "ov9726",
2401 .sensor_reset_enable = 0,
2402 .sensor_reset = GPIO_CAM_GP_CAM1MP_XCLR,
2403 .sensor_pwd = 85,
2404 .vcm_pwd = 1,
2405 .vcm_enable = 0,
2406 .pdata = &msm_camera_device_data_front,
2407 .flash_data = &flash_ov9726,
2408 .sensor_platform_info = &ov9726_sensor_7627a_info,
2409 .csi_if = 1
2410};
2411
2412static struct platform_device msm_camera_sensor_ov9726 = {
2413 .name = "msm_camera_ov9726",
2414 .dev = {
2415 .platform_data = &msm_camera_sensor_ov9726_data,
2416 },
2417};
2418#endif
2419
2420#ifdef CONFIG_MT9E013
2421static struct msm_camera_sensor_platform_info mt9e013_sensor_7627a_info = {
2422 .mount_angle = 90
2423};
2424
2425static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2426 .flash_type = MSM_CAMERA_FLASH_LED,
2427 .flash_src = &msm_flash_src
2428};
2429
2430static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2431 .sensor_name = "mt9e013",
2432 .sensor_reset = 0,
2433 .sensor_reset_enable = 1,
2434 .sensor_pwd = 85,
2435 .vcm_pwd = 1,
2436 .vcm_enable = 0,
2437 .pdata = &msm_camera_device_data_rear,
2438 .flash_data = &flash_mt9e013,
2439 .sensor_platform_info = &mt9e013_sensor_7627a_info,
2440 .csi_if = 1
2441};
2442
2443static struct platform_device msm_camera_sensor_mt9e013 = {
2444 .name = "msm_camera_mt9e013",
2445 .dev = {
2446 .platform_data = &msm_camera_sensor_mt9e013_data,
2447 },
2448};
2449#endif
2450
2451static struct i2c_board_info i2c_camera_devices[] = {
2452 #ifdef CONFIG_S5K4E1
2453 {
2454 I2C_BOARD_INFO("s5k4e1", 0x36),
2455 },
2456 {
2457 I2C_BOARD_INFO("s5k4e1_af", 0x8c >> 1),
2458 },
2459 #endif
2460 #ifdef CONFIG_WEBCAM_OV9726
2461 {
2462 I2C_BOARD_INFO("ov9726", 0x10),
2463 },
2464 #endif
2465 #ifdef CONFIG_IMX072
2466 {
2467 I2C_BOARD_INFO("imx072", 0x34),
2468 },
2469 #endif
2470 #ifdef CONFIG_MT9E013
2471 {
2472 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2473 },
2474 #endif
2475 {
Nishant Pandit474f2252011-07-23 23:17:56 +05302476 I2C_BOARD_INFO("sc628a", 0x6E),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002477 },
2478};
2479#endif
2480#if defined(CONFIG_SERIAL_MSM_HSL_CONSOLE) \
2481 && defined(CONFIG_MSM_SHARED_GPIO_FOR_UART2DM)
2482static struct msm_gpio uart2dm_gpios[] = {
2483 {GPIO_CFG(19, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2484 "uart2dm_rfr_n" },
2485 {GPIO_CFG(20, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2486 "uart2dm_cts_n" },
2487 {GPIO_CFG(21, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2488 "uart2dm_rx" },
2489 {GPIO_CFG(108, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2490 "uart2dm_tx" },
2491};
2492
2493static void msm7x27a_cfg_uart2dm_serial(void)
2494{
2495 int ret;
2496 ret = msm_gpios_request_enable(uart2dm_gpios,
2497 ARRAY_SIZE(uart2dm_gpios));
2498 if (ret)
2499 pr_err("%s: unable to enable gpios for uart2dm\n", __func__);
2500}
2501#else
2502static void msm7x27a_cfg_uart2dm_serial(void) { }
2503#endif
2504
2505static struct platform_device *rumi_sim_devices[] __initdata = {
2506 &msm_device_dmov,
2507 &msm_device_smd,
2508 &smc91x_device,
2509 &msm_device_uart1,
2510 &msm_device_nand,
2511 &msm_device_uart_dm1,
2512 &msm_gsbi0_qup_i2c_device,
2513 &msm_gsbi1_qup_i2c_device,
2514};
2515
2516static struct platform_device *surf_ffa_devices[] __initdata = {
2517 &msm_device_dmov,
2518 &msm_device_smd,
2519 &msm_device_uart1,
2520 &msm_device_uart_dm1,
2521 &msm_device_uart_dm2,
2522 &msm_device_nand,
2523 &msm_gsbi0_qup_i2c_device,
2524 &msm_gsbi1_qup_i2c_device,
2525 &msm_device_otg,
2526 &msm_device_gadget_peripheral,
2527 &android_usb_device,
2528 &android_pmem_device,
2529 &android_pmem_adsp_device,
2530 &android_pmem_audio_device,
2531 &msm_device_snd,
2532 &msm_device_adspdec,
2533 &msm_fb_device,
2534 &lcdc_toshiba_panel_device,
2535 &msm_batt_device,
2536 &smsc911x_device,
2537#ifdef CONFIG_S5K4E1
2538 &msm_camera_sensor_s5k4e1,
2539#endif
2540#ifdef CONFIG_IMX072
2541 &msm_camera_sensor_imx072,
2542#endif
2543#ifdef CONFIG_WEBCAM_OV9726
2544 &msm_camera_sensor_ov9726,
2545#endif
2546#ifdef CONFIG_MT9E013
2547 &msm_camera_sensor_mt9e013,
2548#endif
2549#ifdef CONFIG_FB_MSM_MIPI_DSI
2550 &mipi_dsi_renesas_panel_device,
2551#endif
2552 &msm_kgsl_3d0,
2553#ifdef CONFIG_BT
2554 &msm_bt_power_device,
2555#endif
Manish Dewangan3a260992011-06-24 18:01:34 +05302556 &asoc_msm_pcm,
2557 &asoc_msm_dai0,
2558 &asoc_msm_dai1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002559};
2560
2561static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
2562static int __init pmem_kernel_ebi1_size_setup(char *p)
2563{
2564 pmem_kernel_ebi1_size = memparse(p, NULL);
2565 return 0;
2566}
2567early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2568
2569static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2570static int __init pmem_audio_size_setup(char *p)
2571{
2572 pmem_audio_size = memparse(p, NULL);
2573 return 0;
2574}
2575early_param("pmem_audio_size", pmem_audio_size_setup);
2576
2577static void __init msm_msm7x2x_allocate_memory_regions(void)
2578{
2579 void *addr;
2580 unsigned long size;
2581
2582 size = fb_size ? : MSM_FB_SIZE;
2583 addr = alloc_bootmem_align(size, 0x1000);
2584 msm_fb_resources[0].start = __pa(addr);
2585 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
2586 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
2587 size, addr, __pa(addr));
2588}
2589
2590static struct memtype_reserve msm7x27a_reserve_table[] __initdata = {
2591 [MEMTYPE_SMI] = {
2592 },
2593 [MEMTYPE_EBI0] = {
2594 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2595 },
2596 [MEMTYPE_EBI1] = {
2597 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2598 },
2599};
2600
2601static void __init size_pmem_devices(void)
2602{
2603#ifdef CONFIG_ANDROID_PMEM
2604 android_pmem_adsp_pdata.size = pmem_adsp_size;
2605 android_pmem_pdata.size = pmem_mdp_size;
2606 android_pmem_audio_pdata.size = pmem_audio_size;
2607#endif
2608}
2609
2610static void __init reserve_memory_for(struct android_pmem_platform_data *p)
2611{
2612 msm7x27a_reserve_table[p->memory_type].size += p->size;
2613}
2614
2615static void __init reserve_pmem_memory(void)
2616{
2617#ifdef CONFIG_ANDROID_PMEM
2618 reserve_memory_for(&android_pmem_adsp_pdata);
2619 reserve_memory_for(&android_pmem_pdata);
2620 reserve_memory_for(&android_pmem_audio_pdata);
2621 msm7x27a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
2622#endif
2623}
2624
2625static void __init msm7x27a_calculate_reserve_sizes(void)
2626{
2627 size_pmem_devices();
2628 reserve_pmem_memory();
2629}
2630
2631static int msm7x27a_paddr_to_memtype(unsigned int paddr)
2632{
2633 return MEMTYPE_EBI1;
2634}
2635
2636static struct reserve_info msm7x27a_reserve_info __initdata = {
2637 .memtype_reserve_table = msm7x27a_reserve_table,
2638 .calculate_reserve_sizes = msm7x27a_calculate_reserve_sizes,
2639 .paddr_to_memtype = msm7x27a_paddr_to_memtype,
2640};
2641
2642static void __init msm7x27a_reserve(void)
2643{
2644 reserve_info = &msm7x27a_reserve_info;
2645 msm_reserve();
2646}
2647
2648static void __init msm_device_i2c_init(void)
2649{
2650 msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
2651 msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
2652}
2653
2654static struct msm_panel_common_pdata mdp_pdata = {
2655 .gpio = 97,
2656 .mdp_rev = MDP_REV_303,
2657};
2658
2659#define GPIO_LCDC_BRDG_PD 128
2660#define GPIO_LCDC_BRDG_RESET_N 129
2661
2662#define LCDC_RESET_PHYS 0x90008014
2663static void __iomem *lcdc_reset_ptr;
2664
2665static unsigned mipi_dsi_gpio[] = {
2666 GPIO_CFG(GPIO_LCDC_BRDG_RESET_N, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2667 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2668 GPIO_CFG(GPIO_LCDC_BRDG_PD, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2669 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2670};
2671
2672enum {
2673 DSI_SINGLE_LANE = 1,
2674 DSI_TWO_LANES,
2675};
2676
2677static int msm_fb_get_lane_config(void)
2678{
2679 int rc = DSI_TWO_LANES;
2680
2681 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
2682 rc = DSI_SINGLE_LANE;
2683 pr_info("DSI Single Lane\n");
2684 } else {
2685 pr_info("DSI Two Lanes\n");
2686 }
2687 return rc;
2688}
2689
2690static int msm_fb_dsi_client_reset(void)
2691{
2692 int rc = 0;
2693
2694 rc = gpio_request(GPIO_LCDC_BRDG_RESET_N, "lcdc_brdg_reset_n");
2695 if (rc < 0) {
2696 pr_err("failed to request lcd brdg reset_n\n");
2697 return rc;
2698 }
2699
2700 rc = gpio_request(GPIO_LCDC_BRDG_PD, "lcdc_brdg_pd");
2701 if (rc < 0) {
2702 pr_err("failed to request lcd brdg pd\n");
2703 return rc;
2704 }
2705
2706 rc = gpio_tlmm_config(mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
2707 if (rc) {
2708 pr_err("Failed to enable LCDC Bridge reset enable\n");
2709 goto gpio_error;
2710 }
2711
2712 rc = gpio_tlmm_config(mipi_dsi_gpio[1], GPIO_CFG_ENABLE);
2713 if (rc) {
2714 pr_err("Failed to enable LCDC Bridge pd enable\n");
2715 goto gpio_error2;
2716 }
2717
2718 rc = gpio_direction_output(GPIO_LCDC_BRDG_RESET_N, 1);
2719 rc |= gpio_direction_output(GPIO_LCDC_BRDG_PD, 1);
2720 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2721
2722 if (!rc) {
2723 if (machine_is_msm7x27a_surf()) {
2724 lcdc_reset_ptr = ioremap_nocache(LCDC_RESET_PHYS,
2725 sizeof(uint32_t));
2726
2727 if (!lcdc_reset_ptr)
2728 return 0;
2729 }
2730 return rc;
2731 } else {
2732 goto gpio_error;
2733 }
2734
2735gpio_error2:
2736 pr_err("Failed GPIO bridge pd\n");
2737 gpio_free(GPIO_LCDC_BRDG_PD);
2738
2739gpio_error:
2740 pr_err("Failed GPIO bridge reset\n");
2741 gpio_free(GPIO_LCDC_BRDG_RESET_N);
2742 return rc;
2743}
2744
2745static const char * const msm_fb_dsi_vreg[] = {
2746 "gp2",
2747 "msme1",
2748};
2749
2750static const int msm_fb_dsi_vreg_mV[] = {
2751 2850,
2752 1800,
2753};
2754
2755static struct vreg *dsi_vreg[ARRAY_SIZE(msm_fb_dsi_vreg)];
2756static int dsi_gpio_initialized;
2757
2758static int mipi_dsi_panel_power(int on)
2759{
2760 int i, rc = 0;
2761 uint32_t lcdc_reset_cfg;
2762
2763 /* I2C-controlled GPIO Expander -init of the GPIOs very late */
2764 if (!dsi_gpio_initialized) {
2765 pmapp_disp_backlight_init();
2766
2767 rc = gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr");
2768 if (rc < 0) {
2769 pr_err("failed to request gpio_disp_pwr\n");
2770 return rc;
2771 }
2772
2773 if (machine_is_msm7x27a_surf()) {
2774 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN, 1);
2775 if (rc < 0) {
2776 pr_err("failed to enable display pwr\n");
2777 goto fail_gpio1;
2778 }
2779
2780 rc = gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en");
2781 if (rc < 0) {
2782 pr_err("failed to request gpio_bkl_en\n");
2783 goto fail_gpio1;
2784 }
2785
2786 rc = gpio_direction_output(GPIO_BACKLIGHT_EN, 1);
2787 if (rc < 0) {
2788 pr_err("failed to enable backlight\n");
2789 goto fail_gpio2;
2790 }
2791 }
2792
2793 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2794 dsi_vreg[i] = vreg_get(0, msm_fb_dsi_vreg[i]);
2795
2796 if (IS_ERR(dsi_vreg[i])) {
2797 pr_err("%s: vreg get failed with : (%ld)\n",
2798 __func__, PTR_ERR(dsi_vreg[i]));
2799 goto fail_gpio2;
2800 }
2801
2802 rc = vreg_set_level(dsi_vreg[i],
2803 msm_fb_dsi_vreg_mV[i]);
2804
2805 if (rc < 0) {
2806 pr_err("%s: set regulator level failed "
2807 "with :(%d)\n", __func__, rc);
2808 goto vreg_fail1;
2809 }
2810 }
2811 dsi_gpio_initialized = 1;
2812 }
2813
2814 if (machine_is_msm7x27a_surf()) {
2815 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
2816 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
2817 } else if (machine_is_msm7x27a_ffa()) {
2818 if (on) {
2819 /* This line drives an active low pin on FFA */
2820 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN,
2821 !on);
2822 if (rc < 0)
2823 pr_err("failed to set direction for "
2824 "display pwr\n");
2825 } else {
2826 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN,
2827 !on);
2828 rc = gpio_direction_input(GPIO_DISPLAY_PWR_EN);
2829 if (rc < 0)
2830 pr_err("failed to set direction for "
2831 "display pwr\n");
2832 }
2833 }
2834
2835 if (on) {
2836 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2837
2838 if (machine_is_msm7x27a_surf()) {
2839 lcdc_reset_cfg = readl_relaxed(lcdc_reset_ptr);
2840 rmb();
2841 lcdc_reset_cfg &= ~1;
2842
2843 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2844 msleep(20);
2845 wmb();
2846 lcdc_reset_cfg |= 1;
2847 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2848 } else {
2849 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2850 0);
2851 msleep(20);
2852 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2853 1);
2854 }
2855
2856 if (pmapp_disp_backlight_set_brightness(100))
2857 pr_err("backlight set brightness failed\n");
2858 } else {
2859 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 1);
2860
2861 if (pmapp_disp_backlight_set_brightness(0))
2862 pr_err("backlight set brightness failed\n");
2863 }
2864
2865 /*Configure vreg lines */
2866 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2867 if (on) {
2868 rc = vreg_enable(dsi_vreg[i]);
2869
2870 if (rc) {
2871 printk(KERN_ERR "vreg_enable: %s vreg"
2872 "operation failed\n",
2873 msm_fb_dsi_vreg[i]);
2874
2875 goto vreg_fail2;
2876 }
2877 } else {
2878 rc = vreg_disable(dsi_vreg[i]);
2879
2880 if (rc) {
2881 printk(KERN_ERR "vreg_disable: %s vreg "
2882 "operation failed\n",
2883 msm_fb_dsi_vreg[i]);
2884 goto vreg_fail2;
2885 }
2886 }
2887 }
2888
2889 return rc;
2890
2891vreg_fail2:
2892 if (on) {
2893 for (; i > 0; i--)
2894 vreg_disable(dsi_vreg[i - 1]);
2895 } else {
2896 for (; i > 0; i--)
2897 vreg_enable(dsi_vreg[i - 1]);
2898 }
2899
2900 return rc;
2901
2902vreg_fail1:
2903 for (; i > 0; i--)
2904 vreg_put(dsi_vreg[i - 1]);
2905
2906fail_gpio2:
2907 gpio_free(GPIO_BACKLIGHT_EN);
2908fail_gpio1:
2909 gpio_free(GPIO_DISPLAY_PWR_EN);
2910 dsi_gpio_initialized = 0;
2911 return rc;
2912}
2913
2914#define MDP_303_VSYNC_GPIO 97
2915
2916#ifdef CONFIG_FB_MSM_MDP303
2917static struct mipi_dsi_platform_data mipi_dsi_pdata = {
2918 .vsync_gpio = MDP_303_VSYNC_GPIO,
2919 .dsi_power_save = mipi_dsi_panel_power,
2920 .dsi_client_reset = msm_fb_dsi_client_reset,
2921 .get_lane_config = msm_fb_get_lane_config,
2922};
2923#endif
2924
2925static void __init msm_fb_add_devices(void)
2926{
2927 msm_fb_register_device("mdp", &mdp_pdata);
2928 msm_fb_register_device("lcdc", &lcdc_pdata);
2929 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
2930}
2931
2932#define MSM_EBI2_PHYS 0xa0d00000
2933#define MSM_EBI2_XMEM_CS2_CFG1 0xa0d10030
2934
2935static void __init msm7x27a_init_ebi2(void)
2936{
2937 uint32_t ebi2_cfg;
2938 void __iomem *ebi2_cfg_ptr;
2939
2940 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_PHYS, sizeof(uint32_t));
2941 if (!ebi2_cfg_ptr)
2942 return;
2943
2944 ebi2_cfg = readl(ebi2_cfg_ptr);
2945 if (machine_is_msm7x27a_rumi3() || machine_is_msm7x27a_surf())
2946 ebi2_cfg |= (1 << 4); /* CS2 */
2947
2948 writel(ebi2_cfg, ebi2_cfg_ptr);
2949 iounmap(ebi2_cfg_ptr);
2950
2951 /* Enable A/D MUX[bit 31] from EBI2_XMEM_CS2_CFG1 */
2952 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_XMEM_CS2_CFG1,
2953 sizeof(uint32_t));
2954 if (!ebi2_cfg_ptr)
2955 return;
2956
2957 ebi2_cfg = readl(ebi2_cfg_ptr);
2958 if (machine_is_msm7x27a_surf())
2959 ebi2_cfg |= (1 << 31);
2960
2961 writel(ebi2_cfg, ebi2_cfg_ptr);
2962 iounmap(ebi2_cfg_ptr);
2963}
2964
2965#define ATMEL_TS_I2C_NAME "maXTouch"
2966static struct vreg *vreg_l12;
2967static struct vreg *vreg_s3;
2968
2969#define ATMEL_TS_GPIO_IRQ 82
2970
2971static int atmel_ts_power_on(bool on)
2972{
2973 int rc;
2974
2975 rc = on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2976 if (rc) {
2977 pr_err("%s: vreg %sable failed (%d)\n",
2978 __func__, on ? "en" : "dis", rc);
2979 return rc;
2980 }
2981
2982 rc = on ? vreg_enable(vreg_s3) : vreg_disable(vreg_s3);
2983 if (rc) {
2984 pr_err("%s: vreg %sable failed (%d) for S3\n",
2985 __func__, on ? "en" : "dis", rc);
2986 !on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2987 return rc;
2988 }
2989 /* vreg stabilization delay */
2990 msleep(50);
2991 return 0;
2992}
2993
2994static int atmel_ts_platform_init(struct i2c_client *client)
2995{
2996 int rc;
2997
2998 vreg_l12 = vreg_get(NULL, "gp2");
2999 if (IS_ERR(vreg_l12)) {
3000 pr_err("%s: vreg_get for L2 failed\n", __func__);
3001 return PTR_ERR(vreg_l12);
3002 }
3003
3004 rc = vreg_set_level(vreg_l12, 2850);
3005 if (rc) {
3006 pr_err("%s: vreg set level failed (%d) for l2\n",
3007 __func__, rc);
3008 goto vreg_put_l2;
3009 }
3010
3011 vreg_s3 = vreg_get(NULL, "msme1");
3012 if (IS_ERR(vreg_s3)) {
3013 pr_err("%s: vreg_get for S3 failed\n", __func__);
3014 rc = PTR_ERR(vreg_s3);
3015 goto vreg_put_l2;
3016 }
3017
3018 rc = vreg_set_level(vreg_s3, 1800);
3019 if (rc) {
3020 pr_err("%s: vreg set level failed (%d) for S3\n",
3021 __func__, rc);
3022 goto vreg_put_s3;
3023 }
3024
3025 rc = gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3026 GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
3027 GPIO_CFG_8MA), GPIO_CFG_ENABLE);
3028 if (rc) {
3029 pr_err("%s: gpio_tlmm_config for %d failed\n",
3030 __func__, ATMEL_TS_GPIO_IRQ);
3031 goto vreg_put_s3;
3032 }
3033
3034 /* configure touchscreen interrupt gpio */
3035 rc = gpio_request(ATMEL_TS_GPIO_IRQ, "atmel_maxtouch_gpio");
3036 if (rc) {
3037 pr_err("%s: unable to request gpio %d\n",
3038 __func__, ATMEL_TS_GPIO_IRQ);
3039 goto ts_gpio_tlmm_unconfig;
3040 }
3041
3042 rc = gpio_direction_input(ATMEL_TS_GPIO_IRQ);
3043 if (rc < 0) {
3044 pr_err("%s: unable to set the direction of gpio %d\n",
3045 __func__, ATMEL_TS_GPIO_IRQ);
3046 goto free_ts_gpio;
3047 }
3048 return 0;
3049
3050free_ts_gpio:
3051 gpio_free(ATMEL_TS_GPIO_IRQ);
3052ts_gpio_tlmm_unconfig:
3053 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3054 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3055 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3056vreg_put_s3:
3057 vreg_put(vreg_s3);
3058vreg_put_l2:
3059 vreg_put(vreg_l12);
3060 return rc;
3061}
3062
3063static int atmel_ts_platform_exit(struct i2c_client *client)
3064{
3065 gpio_free(ATMEL_TS_GPIO_IRQ);
3066 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3067 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3068 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3069 vreg_disable(vreg_s3);
3070 vreg_put(vreg_s3);
3071 vreg_disable(vreg_l12);
3072 vreg_put(vreg_l12);
3073 return 0;
3074}
3075
3076static u8 atmel_ts_read_chg(void)
3077{
3078 return gpio_get_value(ATMEL_TS_GPIO_IRQ);
3079}
3080
3081static u8 atmel_ts_valid_interrupt(void)
3082{
3083 return !atmel_ts_read_chg();
3084}
3085
3086#define ATMEL_X_OFFSET 13
3087#define ATMEL_Y_OFFSET 0
3088
3089static struct mxt_platform_data atmel_ts_pdata = {
3090 .numtouch = 4,
3091 .init_platform_hw = atmel_ts_platform_init,
3092 .exit_platform_hw = atmel_ts_platform_exit,
3093 .power_on = atmel_ts_power_on,
3094 .display_res_x = 480,
3095 .display_res_y = 864,
3096 .min_x = ATMEL_X_OFFSET,
3097 .max_x = (505 - ATMEL_X_OFFSET),
3098 .min_y = ATMEL_Y_OFFSET,
3099 .max_y = (863 - ATMEL_Y_OFFSET),
3100 .valid_interrupt = atmel_ts_valid_interrupt,
3101 .read_chg = atmel_ts_read_chg,
3102};
3103
3104static struct i2c_board_info atmel_ts_i2c_info[] __initdata = {
3105 {
3106 I2C_BOARD_INFO(ATMEL_TS_I2C_NAME, 0x4a),
3107 .platform_data = &atmel_ts_pdata,
3108 .irq = MSM_GPIO_TO_INT(ATMEL_TS_GPIO_IRQ),
3109 },
3110};
3111
3112#define KP_INDEX(row, col) ((row)*ARRAY_SIZE(kp_col_gpios) + (col))
3113
3114static unsigned int kp_row_gpios[] = {31, 32, 33, 34, 35};
3115static unsigned int kp_col_gpios[] = {36, 37, 38, 39, 40};
3116
3117static const unsigned short keymap[ARRAY_SIZE(kp_col_gpios) *
3118 ARRAY_SIZE(kp_row_gpios)] = {
3119 [KP_INDEX(0, 0)] = KEY_7,
3120 [KP_INDEX(0, 1)] = KEY_DOWN,
3121 [KP_INDEX(0, 2)] = KEY_UP,
3122 [KP_INDEX(0, 3)] = KEY_RIGHT,
3123 [KP_INDEX(0, 4)] = KEY_ENTER,
3124
3125 [KP_INDEX(1, 0)] = KEY_LEFT,
3126 [KP_INDEX(1, 1)] = KEY_SEND,
3127 [KP_INDEX(1, 2)] = KEY_1,
3128 [KP_INDEX(1, 3)] = KEY_4,
3129 [KP_INDEX(1, 4)] = KEY_CLEAR,
3130
3131 [KP_INDEX(2, 0)] = KEY_6,
3132 [KP_INDEX(2, 1)] = KEY_5,
3133 [KP_INDEX(2, 2)] = KEY_8,
3134 [KP_INDEX(2, 3)] = KEY_3,
3135 [KP_INDEX(2, 4)] = KEY_NUMERIC_STAR,
3136
3137 [KP_INDEX(3, 0)] = KEY_9,
3138 [KP_INDEX(3, 1)] = KEY_NUMERIC_POUND,
3139 [KP_INDEX(3, 2)] = KEY_0,
3140 [KP_INDEX(3, 3)] = KEY_2,
3141 [KP_INDEX(3, 4)] = KEY_SLEEP,
3142
3143 [KP_INDEX(4, 0)] = KEY_BACK,
3144 [KP_INDEX(4, 1)] = KEY_HOME,
3145 [KP_INDEX(4, 2)] = KEY_MENU,
3146 [KP_INDEX(4, 3)] = KEY_VOLUMEUP,
3147 [KP_INDEX(4, 4)] = KEY_VOLUMEDOWN,
3148};
3149
3150/* SURF keypad platform device information */
3151static struct gpio_event_matrix_info kp_matrix_info = {
3152 .info.func = gpio_event_matrix_func,
3153 .keymap = keymap,
3154 .output_gpios = kp_row_gpios,
3155 .input_gpios = kp_col_gpios,
3156 .noutputs = ARRAY_SIZE(kp_row_gpios),
3157 .ninputs = ARRAY_SIZE(kp_col_gpios),
3158 .settle_time.tv_nsec = 40 * NSEC_PER_USEC,
3159 .poll_time.tv_nsec = 20 * NSEC_PER_MSEC,
3160 .flags = GPIOKPF_LEVEL_TRIGGERED_IRQ | GPIOKPF_DRIVE_INACTIVE |
3161 GPIOKPF_PRINT_UNMAPPED_KEYS,
3162};
3163
3164static struct gpio_event_info *kp_info[] = {
3165 &kp_matrix_info.info
3166};
3167
3168static struct gpio_event_platform_data kp_pdata = {
3169 .name = "7x27a_kp",
3170 .info = kp_info,
3171 .info_count = ARRAY_SIZE(kp_info)
3172};
3173
3174static struct platform_device kp_pdev = {
3175 .name = GPIO_EVENT_DEV_NAME,
3176 .id = -1,
3177 .dev = {
3178 .platform_data = &kp_pdata,
3179 },
3180};
3181
3182static struct msm_handset_platform_data hs_platform_data = {
3183 .hs_name = "7k_handset",
3184 .pwr_key_delay_ms = 500, /* 0 will disable end key */
3185};
3186
3187static struct platform_device hs_pdev = {
3188 .name = "msm-handset",
3189 .id = -1,
3190 .dev = {
3191 .platform_data = &hs_platform_data,
3192 },
3193};
3194
Justin Pauporeb3a33b72011-08-23 15:30:32 -07003195static struct platform_device msm_proccomm_regulator_dev = {
3196 .name = PROCCOMM_REGULATOR_DEV_NAME,
3197 .id = -1,
3198 .dev = {
3199 .platform_data = &msm7x27a_proccomm_regulator_data
3200 }
3201};
3202
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003203#define LED_GPIO_PDM 96
3204#define UART1DM_RX_GPIO 45
Santosh Sajjanb479f0f2011-08-18 21:00:44 +05303205
3206#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
3207static int __init msm7x27a_init_ar6000pm(void)
3208{
3209 return platform_device_register(&msm_wlan_ar6000_pm_device);
3210}
3211#else
3212static int __init msm7x27a_init_ar6000pm(void) { return 0; }
3213#endif
3214
Justin Pauporeb3a33b72011-08-23 15:30:32 -07003215static void __init msm7x27a_init_regulators(void)
3216{
3217 int rc = platform_device_register(&msm_proccomm_regulator_dev);
3218 if (rc)
3219 pr_err("%s: could not register regulator device: %d\n",
3220 __func__, rc);
3221}
3222
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003223static void __init msm7x2x_init(void)
3224{
Trilok Sonia416c492011-07-22 20:20:23 +05303225 msm7x2x_misc_init();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003226
Justin Pauporeb3a33b72011-08-23 15:30:32 -07003227 /* Initialize regulators first so that other devices can use them */
3228 msm7x27a_init_regulators();
3229
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003230 /* Common functions for SURF/FFA/RUMI3 */
3231 msm_device_i2c_init();
Santosh Sajjanb479f0f2011-08-18 21:00:44 +05303232 /* Ensure ar6000pm device is registered before MMC/SDC */
3233 msm7x27a_init_ar6000pm();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003234 msm7x27a_init_mmc();
3235 msm7x27a_init_ebi2();
3236 msm7x27a_cfg_uart2dm_serial();
3237#ifdef CONFIG_SERIAL_MSM_HS
3238 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
3239 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
3240#endif
3241
3242 if (machine_is_msm7x27a_rumi3()) {
3243 platform_add_devices(rumi_sim_devices,
3244 ARRAY_SIZE(rumi_sim_devices));
3245 }
3246 if (machine_is_msm7x27a_surf() || machine_is_msm7x27a_ffa()) {
3247#ifdef CONFIG_USB_MSM_OTG_72K
3248 msm_otg_pdata.swfi_latency =
3249 msm7x27a_pm_data
3250 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
3251 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3252#endif
3253 msm_device_gadget_peripheral.dev.platform_data =
3254 &msm_gadget_pdata;
3255 msm7x27a_cfg_smsc911x();
3256 platform_add_devices(msm_footswitch_devices,
3257 msm_num_footswitch_devices);
3258 platform_add_devices(surf_ffa_devices,
3259 ARRAY_SIZE(surf_ffa_devices));
3260 msm_fb_add_devices();
3261#ifdef CONFIG_USB_EHCI_MSM_72K
3262 msm7x2x_init_host();
3263#endif
3264 }
3265
3266 msm_pm_set_platform_data(msm7x27a_pm_data,
3267 ARRAY_SIZE(msm7x27a_pm_data));
3268
3269#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
3270 register_i2c_devices();
3271#endif
3272#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
3273 bt_power_init();
3274#endif
3275 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
3276 atmel_ts_pdata.min_x = 0;
3277 atmel_ts_pdata.max_x = 480;
3278 atmel_ts_pdata.min_y = 0;
3279 atmel_ts_pdata.max_y = 320;
3280 }
3281
3282 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
3283 atmel_ts_i2c_info,
3284 ARRAY_SIZE(atmel_ts_i2c_info));
3285
3286 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
3287 i2c_camera_devices,
3288 ARRAY_SIZE(i2c_camera_devices));
3289 platform_device_register(&kp_pdev);
3290 platform_device_register(&hs_pdev);
3291
3292 /* configure it as a pdm function*/
3293 if (gpio_tlmm_config(GPIO_CFG(LED_GPIO_PDM, 3,
3294 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
3295 GPIO_CFG_8MA), GPIO_CFG_ENABLE))
3296 pr_err("%s: gpio_tlmm_config for %d failed\n",
3297 __func__, LED_GPIO_PDM);
3298 else
3299 platform_device_register(&led_pdev);
3300
3301#ifdef CONFIG_MSM_RPC_VIBRATOR
3302 if (machine_is_msm7x27a_ffa())
3303 msm_init_pmic_vibrator();
3304#endif
3305 /*7x25a kgsl initializations*/
3306 msm7x25a_kgsl_3d0_init();
3307}
3308
3309static void __init msm7x2x_init_early(void)
3310{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003311 msm_msm7x2x_allocate_memory_regions();
3312}
3313
3314MACHINE_START(MSM7X27A_RUMI3, "QCT MSM7x27a RUMI3")
3315 .boot_params = PHYS_OFFSET + 0x100,
3316 .map_io = msm_common_io_init,
3317 .reserve = msm7x27a_reserve,
3318 .init_irq = msm_init_irq,
3319 .init_machine = msm7x2x_init,
3320 .timer = &msm_timer,
3321 .init_early = msm7x2x_init_early,
3322MACHINE_END
3323MACHINE_START(MSM7X27A_SURF, "QCT MSM7x27a SURF")
3324 .boot_params = PHYS_OFFSET + 0x100,
3325 .map_io = msm_common_io_init,
3326 .reserve = msm7x27a_reserve,
3327 .init_irq = msm_init_irq,
3328 .init_machine = msm7x2x_init,
3329 .timer = &msm_timer,
3330 .init_early = msm7x2x_init_early,
3331MACHINE_END
3332MACHINE_START(MSM7X27A_FFA, "QCT MSM7x27a FFA")
3333 .boot_params = PHYS_OFFSET + 0x100,
3334 .map_io = msm_common_io_init,
3335 .reserve = msm7x27a_reserve,
3336 .init_irq = msm_init_irq,
3337 .init_machine = msm7x2x_init,
3338 .timer = &msm_timer,
3339 .init_early = msm7x2x_init_early,
3340MACHINE_END