Gitiles
Code Review Sign In
review.evervolv.com / android_kernel_htc_msm8960 / ab783ab6d011361db32ff6ce0d990b6c29ed88db / . / arch / arm / boot / dts / msmcopper.dts
blob: 327cce52e88d88b29c98f8ceaea30efe8817d8a6 [file] [log] [blame]
Sathish Ambley4df614c2011-10-07 16:30:46 -0700[diff] [blame]1/dts-v1/;
2
3/include/ "skeleton.dtsi"
4
5/ {
6 model = "Qualcomm MSM Copper";
7 compatible = "qcom,msmcopper-sim", "qcom,msmcopper";
8 interrupt-parent = <&intc>;
9
10 intc: interrupt-controller@F9000000 {
11 compatible = "qcom,msm-qgic2";
12 interrupt-controller;
13 #interrupt-cells = <1>;
14 reg = <0xF9000000 0x1000>,
15 <0xF9002000 0x1000>;
16 };
Sathish Ambley3d50c762011-10-25 15:26:00 -0700[diff] [blame]17
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame^]18 serial@F991F000 {
Sathish Ambley3d50c762011-10-25 15:26:00 -0700[diff] [blame]19 compatible = "qcom,msm-lsuart-v14";
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame^]20 reg = <0xF991F000 0x1000>;
Sathish Ambley3d50c762011-10-25 15:26:00 -0700[diff] [blame]21 interrupts = <109>;
22 };
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +0530[diff] [blame]23
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame^]24 usb@F9A55000 {
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +0530[diff] [blame]25 compatible = "qcom,hsusb-otg";
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame^]26 reg = <0xF9A55000 0x400>;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +0530[diff] [blame]27 interrupts = <134>;
28
29 qcom,hsusb-otg-phy-type = <2>;
30 qcom,hsusb-otg-mode = <1>;
31 qcom,hsusb-otg-otg-control = <1>;
32 };
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530[diff] [blame]33
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame^]34 qcom,sdcc@F980B000 {
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530[diff] [blame]35 cell-index = <1>;
36 compatible = "qcom,msm-sdcc";
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame^]37 reg = <0xF980B000 0x1000>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530[diff] [blame]38 interrupts = <123>;
39
40 qcom,sdcc-clk-rates = <400000 24000000 48000000>;
41 qcom,sdcc-sup-voltages = <3300 3300>;
42 qcom,sdcc-bus-width = <8>;
43 qcom,sdcc-nonremovable;
44 qcom,sdcc-disable_cmd23;
45 };
46
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame^]47 qcom,sdcc@F984B000 {
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530[diff] [blame]48 cell-index = <3>;
49 compatible = "qcom,msm-sdcc";
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame^]50 reg = <0xF984B000 0x1000>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530[diff] [blame]51 interrupts = <127>;
52
53 qcom,sdcc-clk-rates = <400000 24000000 48000000>;
54 qcom,sdcc-sup-voltages = <3300 3300>;
55 qcom,sdcc-bus-width = <4>;
56 qcom,sdcc-disable_cmd23;
57 };
Sathish Ambley4df614c2011-10-07 16:30:46 -0700[diff] [blame]58};