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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* arch/arm/mach-msm/qdsp5/adsp.c
2 *
3 * Register/Interrupt access for userspace aDSP library.
4 *
5 * Copyright (C) 2008 Google, Inc.
Manish Dewangan8e87bc12012-02-09 20:25:15 +05306 * Copyright (c) 2008-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007 * Author: Iliyan Malchev <ibm@android.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20/* TODO:
21 * - move shareable rpc code outside of adsp.c
22 * - general solution for virt->phys patchup
23 * - queue IDs should be relative to modules
24 * - disallow access to non-associated queues
25 */
26
27#include <linux/clk.h>
28#include <linux/delay.h>
29#include <linux/interrupt.h>
30#include <linux/kernel.h>
31#include <linux/kthread.h>
32#include <linux/module.h>
33#include <linux/uaccess.h>
34#include <linux/wait.h>
35#include <linux/wakelock.h>
36#include <linux/slab.h>
Chaithanya Krishna Bacharajua3931822012-05-09 13:44:07 +053037#include <linux/workqueue.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070038#include <mach/debug_mm.h>
39#include <linux/debugfs.h>
40
41#ifdef CONFIG_DEBUG_FS
42static struct dentry *dentry_adsp;
43static struct dentry *dentry_wdata;
44static struct dentry *dentry_rdata;
45static int wdump, rdump;
46#endif /* CONFIG_DEBUG_FS */
47static struct wake_lock adsp_wake_lock;
48static inline void prevent_suspend(void)
49{
50 wake_lock(&adsp_wake_lock);
51}
52static inline void allow_suspend(void)
53{
54 wake_unlock(&adsp_wake_lock);
55}
56
57#include <linux/io.h>
58#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070059#include <mach/msm_adsp.h>
60#include "adsp.h"
61
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070062static struct adsp_info adsp_info;
63static struct msm_rpc_endpoint *rpc_cb_server_client;
64static struct msm_adsp_module *adsp_modules;
65static int adsp_open_count;
66
67static uint32_t rpc_adsp_rtos_atom_prog;
68static uint32_t rpc_adsp_rtos_atom_vers;
69static uint32_t rpc_adsp_rtos_atom_vers_comp;
70static uint32_t rpc_adsp_rtos_mtoa_prog;
71static uint32_t rpc_adsp_rtos_mtoa_vers;
72static uint32_t rpc_adsp_rtos_mtoa_vers_comp;
73static DEFINE_MUTEX(adsp_open_lock);
74
Chaithanya Krishna Bacharajua3931822012-05-09 13:44:07 +053075static struct workqueue_struct *msm_adsp_probe_work_queue;
76static void adsp_probe_work(struct work_struct *work);
77static DECLARE_WORK(msm_adsp_probe_work, adsp_probe_work);
78
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070079/* protect interactions with the ADSP command/message queue */
80static spinlock_t adsp_cmd_lock;
81static spinlock_t adsp_write_lock;
82
83static uint32_t current_image = -1;
84
85void adsp_set_image(struct adsp_info *info, uint32_t image)
86{
87 current_image = image;
88}
89
90/*
91 * Checks whether the module_id is available in the
92 * module_entries table.If module_id is available returns `0`.
93 * If module_id is not available returns `-ENXIO`.
94 */
95static int32_t adsp_validate_module(uint32_t module_id)
96{
97 uint32_t *ptr;
98 uint32_t module_index;
99 uint32_t num_mod_entries;
100
101 ptr = adsp_info.init_info_ptr->module_entries;
102 num_mod_entries = adsp_info.init_info_ptr->module_table_size;
103
104 for (module_index = 0; module_index < num_mod_entries; module_index++)
105 if (module_id == ptr[module_index])
106 return 0;
107
108 return -ENXIO;
109}
110
111static int32_t adsp_validate_queue(uint32_t mod_id, unsigned q_idx,
112 uint32_t size)
113{
114 int32_t i;
115 struct adsp_rtos_mp_mtoa_init_info_type *sptr;
116
117 sptr = adsp_info.init_info_ptr;
118 for (i = 0; i < sptr->mod_to_q_entries; i++)
119 if (mod_id == sptr->mod_to_q_tbl[i].module)
120 if (q_idx == sptr->mod_to_q_tbl[i].q_type) {
121 if (size <= sptr->mod_to_q_tbl[i].q_max_len)
122 return 0;
123 MM_ERR("q_idx: %d is not a valid queue \
124 for module %x\n", q_idx, mod_id);
125 return -EINVAL;
126 }
127 MM_ERR("cmd_buf size is more than allowed size\n");
128 return -EINVAL;
129}
130
131uint32_t adsp_get_module(struct adsp_info *info, uint32_t task)
132{
133 return info->task_to_module[current_image][task];
134}
135
136uint32_t adsp_get_queue_offset(struct adsp_info *info, uint32_t queue_id)
137{
138 return info->queue_offset[current_image][queue_id];
139}
140
141static int rpc_adsp_rtos_app_to_modem(uint32_t cmd, uint32_t module,
142 struct msm_adsp_module *adsp_module)
143{
144 int rc;
145 struct rpc_adsp_rtos_app_to_modem_args_t rpc_req;
146 struct rpc_reply_hdr rpc_rsp;
147
148 rpc_req.gotit = cpu_to_be32(1);
149 rpc_req.cmd = cpu_to_be32(cmd);
150 rpc_req.proc_id = cpu_to_be32(RPC_ADSP_RTOS_PROC_APPS);
151 rpc_req.module = cpu_to_be32(module);
152 rc = msm_rpc_call_reply(adsp_module->rpc_client,
153 RPC_ADSP_RTOS_APP_TO_MODEM_PROC,
154 &rpc_req, sizeof(rpc_req),
155 &rpc_rsp, sizeof(rpc_rsp),
156 5 * HZ);
157
158 if (rc < 0) {
159 MM_ERR("error receiving RPC reply: %d (%d)\n",
160 rc, -ERESTARTSYS);
161 return rc;
162 }
163
164 if (be32_to_cpu(rpc_rsp.reply_stat) != RPCMSG_REPLYSTAT_ACCEPTED) {
165 MM_ERR("RPC call was denied!\n");
166 return -EPERM;
167 }
168
169 if (be32_to_cpu(rpc_rsp.data.acc_hdr.accept_stat) !=
170 RPC_ACCEPTSTAT_SUCCESS) {
171 MM_ERR("RPC call was not successful (%d)\n",
172 be32_to_cpu(rpc_rsp.data.acc_hdr.accept_stat));
173 return -EINVAL;
174 }
175
176 return 0;
177}
178
179static int get_module_index(uint32_t id)
180{
181 int mod_idx;
182 for (mod_idx = 0; mod_idx < adsp_info.module_count; mod_idx++)
183 if (adsp_info.module[mod_idx].id == id)
184 return mod_idx;
185
186 return -ENXIO;
187}
188
189static struct msm_adsp_module *find_adsp_module_by_id(
190 struct adsp_info *info, uint32_t id)
191{
192 int mod_idx;
193
194 if (id > info->max_module_id) {
195 return NULL;
196 } else {
197 mod_idx = get_module_index(id);
198 if (mod_idx < 0)
199 return NULL;
200 return info->id_to_module[mod_idx];
201 }
202}
203
204static struct msm_adsp_module *find_adsp_module_by_name(
205 struct adsp_info *info, const char *name)
206{
207 unsigned n;
208 for (n = 0; n < info->module_count; n++)
209 if (!strcmp(name, adsp_modules[n].name))
210 return adsp_modules + n;
211 return NULL;
212}
213
214static int adsp_rpc_init(struct msm_adsp_module *adsp_module)
215{
216 /* remove the original connect once compatible support is complete */
217 adsp_module->rpc_client = msm_rpc_connect(
218 rpc_adsp_rtos_atom_prog,
219 rpc_adsp_rtos_atom_vers,
220 MSM_RPC_UNINTERRUPTIBLE);
221 if (IS_ERR(adsp_module->rpc_client))
222 adsp_module->rpc_client = msm_rpc_connect_compatible(
223 rpc_adsp_rtos_atom_prog,
224 rpc_adsp_rtos_atom_vers_comp,
225 MSM_RPC_UNINTERRUPTIBLE);
226
227 if (IS_ERR(adsp_module->rpc_client)) {
228 int rc = PTR_ERR(adsp_module->rpc_client);
229 adsp_module->rpc_client = 0;
230 MM_ERR("could not open rpc client: %d\n", rc);
231 return rc;
232 }
233
234 return 0;
235}
236
237/*
238 * Send RPC_ADSP_RTOS_CMD_GET_INIT_INFO cmd to ARM9 and get
239 * queue offsets and module entries (init info) as part of the event.
240 */
241static void msm_get_init_info(void)
242{
243 int rc;
244 struct rpc_adsp_rtos_app_to_modem_args_t rpc_req;
245 struct rpc_reply_hdr rpc_rsp;
246
247 adsp_info.init_info_rpc_client = msm_rpc_connect(
248 rpc_adsp_rtos_atom_prog,
249 rpc_adsp_rtos_atom_vers,
250 MSM_RPC_UNINTERRUPTIBLE);
251 if (IS_ERR(adsp_info.init_info_rpc_client)) {
252 adsp_info.init_info_rpc_client = msm_rpc_connect_compatible(
253 rpc_adsp_rtos_atom_prog,
254 rpc_adsp_rtos_atom_vers_comp,
255 MSM_RPC_UNINTERRUPTIBLE);
256 if (IS_ERR(adsp_info.init_info_rpc_client)) {
257 rc = PTR_ERR(adsp_info.init_info_rpc_client);
258 adsp_info.init_info_rpc_client = 0;
259 MM_ERR("could not open rpc client: %d\n", rc);
260 return;
261 }
262 }
263
264 rpc_req.gotit = cpu_to_be32(1);
265 rpc_req.cmd = cpu_to_be32(RPC_ADSP_RTOS_CMD_GET_INIT_INFO);
266 rpc_req.proc_id = cpu_to_be32(RPC_ADSP_RTOS_PROC_APPS);
267 rpc_req.module = 0;
268
269 rc = msm_rpc_call_reply(adsp_info.init_info_rpc_client,
270 RPC_ADSP_RTOS_APP_TO_MODEM_PROC,
271 &rpc_req, sizeof(rpc_req),
272 &rpc_rsp, sizeof(rpc_rsp),
273 5 * HZ);
274
275 if (rc < 0)
276 MM_ERR("could not send RPC request: %d\n", rc);
277}
278
279int msm_adsp_get(const char *name, struct msm_adsp_module **out,
280 struct msm_adsp_ops *ops, void *driver_data)
281{
282 struct msm_adsp_module *module;
283 int rc = 0;
284 static uint32_t init_info_cmd_sent;
285
Manish Dewangan691f1c42012-02-10 12:50:14 +0530286 mutex_lock(&adsp_info.lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700287 if (!init_info_cmd_sent) {
288 init_waitqueue_head(&adsp_info.init_info_wait);
289 msm_get_init_info();
290 rc = wait_event_timeout(adsp_info.init_info_wait,
291 adsp_info.init_info_state == ADSP_STATE_INIT_INFO,
292 5 * HZ);
293 if (!rc) {
294 MM_ERR("INIT_INFO failed\n");
Manish Dewangan691f1c42012-02-10 12:50:14 +0530295 mutex_unlock(&adsp_info.lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700296 return -ETIMEDOUT;
Manish Dewangan691f1c42012-02-10 12:50:14 +0530297
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700298 }
299 init_info_cmd_sent++;
300 }
Manish Dewangan691f1c42012-02-10 12:50:14 +0530301 mutex_unlock(&adsp_info.lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700302
303 module = find_adsp_module_by_name(&adsp_info, name);
304 if (!module)
305 return -ENODEV;
306
307 mutex_lock(&module->lock);
308 MM_INFO("opening module %s\n", module->name);
309
310 if (module->ops) {
311 rc = -EBUSY;
312 goto done;
313 }
314
315 rc = adsp_rpc_init(module);
316 if (rc)
317 goto done;
318
319 module->ops = ops;
320 module->driver_data = driver_data;
321 *out = module;
322 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_REGISTER_APP,
323 module->id, module);
324 if (rc) {
325 module->ops = NULL;
326 module->driver_data = NULL;
327 *out = NULL;
328 MM_ERR("REGISTER_APP failed\n");
329 goto done;
330 }
331
332 MM_DBG("module %s has been registered\n", module->name);
333
334done:
335 mutex_unlock(&module->lock);
336 return rc;
337}
338EXPORT_SYMBOL(msm_adsp_get);
339
340static int msm_adsp_disable_locked(struct msm_adsp_module *module);
341
342void msm_adsp_put(struct msm_adsp_module *module)
343{
344 unsigned long flags;
345
346 mutex_lock(&module->lock);
347 if (module->ops) {
348 MM_INFO("closing module %s\n", module->name);
349
350 /* lock to ensure a dsp event cannot be delivered
351 * during or after removal of the ops and driver_data
352 */
353 spin_lock_irqsave(&adsp_cmd_lock, flags);
354 module->ops = NULL;
355 module->driver_data = NULL;
356 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
357
358 if (module->state != ADSP_STATE_DISABLED) {
359 MM_INFO("disabling module %s\n", module->name);
360 msm_adsp_disable_locked(module);
361 }
362
363 msm_rpc_close(module->rpc_client);
364 module->rpc_client = 0;
365 } else {
366 MM_INFO("module %s is already closed\n", module->name);
367 }
368 mutex_unlock(&module->lock);
369}
370EXPORT_SYMBOL(msm_adsp_put);
371
372/* this should be common code with rpc_servers.c */
373static int rpc_send_accepted_void_reply(struct msm_rpc_endpoint *client,
374 uint32_t xid, uint32_t accept_status)
375{
376 int rc = 0;
377 uint8_t reply_buf[sizeof(struct rpc_reply_hdr)];
378 struct rpc_reply_hdr *reply = (struct rpc_reply_hdr *)reply_buf;
379
380 reply->xid = cpu_to_be32(xid);
381 reply->type = cpu_to_be32(1); /* reply */
382 reply->reply_stat = cpu_to_be32(RPCMSG_REPLYSTAT_ACCEPTED);
383
384 reply->data.acc_hdr.accept_stat = cpu_to_be32(accept_status);
385 reply->data.acc_hdr.verf_flavor = 0;
386 reply->data.acc_hdr.verf_length = 0;
387
388 rc = msm_rpc_write(rpc_cb_server_client, reply_buf, sizeof(reply_buf));
389 if (rc < 0)
390 MM_ERR("could not write RPC response: %d\n", rc);
391 return rc;
392}
393
394int __msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr,
395 void *cmd_buf, size_t cmd_size)
396{
397 uint32_t ctrl_word;
398 uint32_t dsp_q_addr;
399 uint32_t dsp_addr;
400 uint32_t cmd_id = 0;
401 int cnt = 0;
402 int ret_status = 0;
403 unsigned long flags;
404 struct adsp_info *info;
405
406 if (!module || !cmd_buf) {
407 MM_ERR("Called with NULL parameters\n");
408 return -EINVAL;
409 }
410 info = module->info;
411 spin_lock_irqsave(&adsp_write_lock, flags);
412
413 if (module->state != ADSP_STATE_ENABLED) {
414 spin_unlock_irqrestore(&adsp_write_lock, flags);
415 MM_ERR("module %s not enabled before write\n", module->name);
416 return -ENODEV;
417 }
418 if (adsp_validate_module(module->id)) {
419 spin_unlock_irqrestore(&adsp_write_lock, flags);
420 MM_ERR("module id validation failed %s %d\n",
421 module->name, module->id);
422 return -ENXIO;
423 }
424 if (dsp_queue_addr >= QDSP_MAX_NUM_QUEUES) {
425 spin_unlock_irqrestore(&adsp_write_lock, flags);
426 MM_ERR("Invalid Queue Index: %d\n", dsp_queue_addr);
427 return -ENXIO;
428 }
429 if (adsp_validate_queue(module->id, dsp_queue_addr, cmd_size)) {
430 spin_unlock_irqrestore(&adsp_write_lock, flags);
431 return -EINVAL;
432 }
433 dsp_q_addr = adsp_get_queue_offset(info, dsp_queue_addr);
434 dsp_q_addr &= ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M;
435
436 /* Poll until the ADSP is ready to accept a command.
437 * Wait for 100us, return error if it's not responding.
438 * If this returns an error, we need to disable ALL modules and
439 * then retry.
440 */
441 while (((ctrl_word = readl(info->write_ctrl)) &
442 ADSP_RTOS_WRITE_CTRL_WORD_READY_M) !=
443 ADSP_RTOS_WRITE_CTRL_WORD_READY_V) {
444 if (cnt > 50) {
445 MM_ERR("timeout waiting for DSP write ready\n");
446 ret_status = -EIO;
447 goto fail;
448 }
449 MM_DBG("waiting for DSP write ready\n");
450 udelay(2);
451 cnt++;
452 }
453
454 /* Set the mutex bits */
455 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M);
456 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V;
457
458 /* Clear the command bits */
459 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M);
460
461 /* Set the queue address bits */
462 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M);
463 ctrl_word |= dsp_q_addr;
464
465 writel(ctrl_word, info->write_ctrl);
466
467 /* Generate an interrupt to the DSP. This notifies the DSP that
468 * we are about to send a command on this particular queue. The
469 * DSP will in response change its state.
470 */
471 writel(1, info->send_irq);
472
473 /* Poll until the adsp responds to the interrupt; this does not
474 * generate an interrupt from the adsp. This should happen within
475 * 5ms.
476 */
477 cnt = 0;
478 while ((readl(info->write_ctrl) &
479 ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M) ==
480 ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V) {
481 if (cnt > 2500) {
482 MM_ERR("timeout waiting for adsp ack\n");
483 ret_status = -EIO;
484 goto fail;
485 }
486 udelay(2);
487 cnt++;
488 }
489
490 /* Read the ctrl word */
491 ctrl_word = readl(info->write_ctrl);
492
493 if ((ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_STATUS_M) !=
494 ADSP_RTOS_WRITE_CTRL_WORD_NO_ERR_V) {
495 ret_status = -EAGAIN;
496 goto fail;
497 } else {
498 /* No error */
499 /* Get the DSP buffer address */
500 dsp_addr = (ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M) +
501 (uint32_t)MSM_AD5_BASE;
502
503 if (dsp_addr < (uint32_t)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) {
504 uint16_t *buf_ptr = (uint16_t *) cmd_buf;
505 uint16_t *dsp_addr16 = (uint16_t *)dsp_addr;
506 cmd_size /= sizeof(uint16_t);
507
508 /* Save the command ID */
509 cmd_id = (uint32_t) buf_ptr[0];
510
511 /* Copy the command to DSP memory */
512 cmd_size++;
513 while (--cmd_size)
514 *dsp_addr16++ = *buf_ptr++;
515 } else {
516 uint32_t *buf_ptr = (uint32_t *) cmd_buf;
517 uint32_t *dsp_addr32 = (uint32_t *)dsp_addr;
518 cmd_size /= sizeof(uint32_t);
519
520 /* Save the command ID */
521 cmd_id = buf_ptr[0];
522
523 cmd_size++;
524 while (--cmd_size)
525 *dsp_addr32++ = *buf_ptr++;
526 }
527
528 /* Set the mutex bits */
529 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M);
530 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V;
531
532 /* Set the command bits to write done */
533 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M);
534 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_CMD_WRITE_DONE_V;
535
536 /* Set the queue address bits */
537 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M);
538 ctrl_word |= dsp_q_addr;
539
540 writel(ctrl_word, info->write_ctrl);
541
542 /* Generate an interrupt to the DSP. It does not respond with
543 * an interrupt, and we do not need to wait for it to
544 * acknowledge, because it will hold the mutex lock until it's
545 * ready to receive more commands again.
546 */
547 writel(1, info->send_irq);
548
549 module->num_commands++;
550 } /* Ctrl word status bits were 00, no error in the ctrl word */
551
552fail:
553 spin_unlock_irqrestore(&adsp_write_lock, flags);
554 return ret_status;
555}
556EXPORT_SYMBOL(msm_adsp_write);
557
558int msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr,
559 void *cmd_buf, size_t cmd_size)
560{
561 int rc, retries = 0;
562#ifdef CONFIG_DEBUG_FS
563 uint16_t *ptr;
564 int ii;
565
566 if (wdump > 0) {
567 ptr = cmd_buf;
568 pr_info("A->D:%x\n", module->id);
569 pr_info("adsp: %x %d\n", dsp_queue_addr, cmd_size);
570 for (ii = 0; ii < cmd_size/2; ii++)
571 pr_info("%x ", ptr[ii]);
572 pr_info("\n");
573 }
574#endif /* CONFIG_DEBUG_FS */
575 do {
576 rc = __msm_adsp_write(module, dsp_queue_addr, cmd_buf,
577 cmd_size);
578 if (rc == -EAGAIN)
579 udelay(10);
580 } while (rc == -EAGAIN && retries++ < 300);
581 if (retries > 50)
582 MM_ERR("adsp: %s command took %d attempts: rc %d\n",
583 module->name, retries, rc);
584 return rc;
585}
586
587static void *event_addr;
588static void read_event(void *buf, size_t len)
589{
590 uint32_t dptr[3];
591 struct rpc_adsp_rtos_modem_to_app_args_t *sptr;
592 struct adsp_rtos_mp_mtoa_type *pkt_ptr;
593
594 sptr = event_addr;
595 pkt_ptr = &sptr->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_packet;
596
597 dptr[0] = be32_to_cpu(sptr->mtoa_pkt.mp_mtoa_header.event);
598 dptr[1] = be32_to_cpu(pkt_ptr->module);
599 dptr[2] = be32_to_cpu(pkt_ptr->image);
600
601 if (len > EVENT_LEN)
602 len = EVENT_LEN;
603
604 memcpy(buf, dptr, len);
605}
606
607static void handle_adsp_rtos_mtoa_app(struct rpc_request_hdr *req)
608{
609 struct rpc_adsp_rtos_modem_to_app_args_t *args =
610 (struct rpc_adsp_rtos_modem_to_app_args_t *)req;
611 uint32_t event;
612 uint32_t proc_id;
613 uint32_t module_id;
614 uint32_t image;
615 struct msm_adsp_module *module;
616 struct adsp_rtos_mp_mtoa_type *pkt_ptr;
617 struct queue_to_offset_type *qptr;
618 struct queue_to_offset_type *qtbl;
619 struct mod_to_queue_offsets *mqptr;
620 struct mod_to_queue_offsets *mqtbl;
621 uint32_t *mptr;
622 uint32_t *mtbl;
623 uint32_t q_idx;
624 uint32_t num_entries;
625 uint32_t entries_per_image;
626 struct adsp_rtos_mp_mtoa_init_info_type *iptr;
627 struct adsp_rtos_mp_mtoa_init_info_type *sptr;
628 int32_t i_no, e_idx;
629
630 event = be32_to_cpu(args->mtoa_pkt.mp_mtoa_header.event);
631 proc_id = be32_to_cpu(args->mtoa_pkt.mp_mtoa_header.proc_id);
632
633 if (event == RPC_ADSP_RTOS_INIT_INFO) {
634 MM_INFO("INIT_INFO Event\n");
635 sptr = &args->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_init_packet;
636
637 iptr = adsp_info.init_info_ptr;
638 iptr->image_count = be32_to_cpu(sptr->image_count);
639 if (iptr->image_count > IMG_MAX)
640 iptr->image_count = IMG_MAX;
641 iptr->num_queue_offsets = be32_to_cpu(sptr->num_queue_offsets);
642 num_entries = iptr->num_queue_offsets;
643 if (num_entries > ENTRIES_MAX) {
644 num_entries = ENTRIES_MAX;
645 iptr->num_queue_offsets = ENTRIES_MAX;
646 }
647 qptr = &sptr->queue_offsets_tbl[0][0];
648 for (i_no = 0; i_no < iptr->image_count; i_no++) {
649 qtbl = &iptr->queue_offsets_tbl[i_no][0];
650 for (e_idx = 0; e_idx < num_entries; e_idx++) {
651 qtbl[e_idx].offset = be32_to_cpu(qptr->offset);
652 qtbl[e_idx].queue = be32_to_cpu(qptr->queue);
653 q_idx = be32_to_cpu(qptr->queue);
654 iptr->queue_offsets[i_no][q_idx] = qtbl[e_idx].offset;
655 qptr++;
656 }
657 }
658
659 num_entries = be32_to_cpu(sptr->num_task_module_entries);
660 if (num_entries > ENTRIES_MAX)
661 num_entries = ENTRIES_MAX;
662 iptr->num_task_module_entries = num_entries;
663 entries_per_image = num_entries / iptr->image_count;
664 mptr = &sptr->task_to_module_tbl[0][0];
665 for (i_no = 0; i_no < iptr->image_count; i_no++) {
666 mtbl = &iptr->task_to_module_tbl[i_no][0];
667 for (e_idx = 0; e_idx < entries_per_image; e_idx++) {
668 mtbl[e_idx] = be32_to_cpu(*mptr);
669 mptr++;
670 }
671 }
672
673 iptr->module_table_size = be32_to_cpu(sptr->module_table_size);
674#if CONFIG_ADSP_RPC_VER > 0x30001
675 if (iptr->module_table_size > MODULES_MAX)
676 iptr->module_table_size = MODULES_MAX;
677#else
678 if (iptr->module_table_size > ENTRIES_MAX)
679 iptr->module_table_size = ENTRIES_MAX;
680#endif
681 mptr = &sptr->module_entries[0];
682 for (i_no = 0; i_no < iptr->module_table_size; i_no++)
683 iptr->module_entries[i_no] = be32_to_cpu(mptr[i_no]);
684
685 mqptr = &sptr->mod_to_q_tbl[0];
686 mqtbl = &iptr->mod_to_q_tbl[0];
687 iptr->mod_to_q_entries = be32_to_cpu(sptr->mod_to_q_entries);
688 if (iptr->mod_to_q_entries > ENTRIES_MAX)
689 iptr->mod_to_q_entries = ENTRIES_MAX;
690 for (e_idx = 0; e_idx < iptr->mod_to_q_entries; e_idx++) {
691 mqtbl[e_idx].module = be32_to_cpu(mqptr->module);
692 mqtbl[e_idx].q_type = be32_to_cpu(mqptr->q_type);
693 mqtbl[e_idx].q_max_len = be32_to_cpu(mqptr->q_max_len);
694 mqptr++;
695 }
696
697 adsp_info.init_info_state = ADSP_STATE_INIT_INFO;
698 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
699 RPC_ACCEPTSTAT_SUCCESS);
700 wake_up(&adsp_info.init_info_wait);
701
702 return;
703 }
704
705 pkt_ptr = &args->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_packet;
706 module_id = be32_to_cpu(pkt_ptr->module);
707 image = be32_to_cpu(pkt_ptr->image);
708
709 MM_DBG("rpc event=%d, proc_id=%d, module=%d, image=%d\n",
710 event, proc_id, module_id, image);
711
712 module = find_adsp_module_by_id(&adsp_info, module_id);
713 if (!module) {
714 MM_ERR("module %d is not supported!\n", module_id);
715 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
716 RPC_ACCEPTSTAT_GARBAGE_ARGS);
717 return;
718 }
719
720 mutex_lock(&module->lock);
721 switch (event) {
722 case RPC_ADSP_RTOS_MOD_READY:
723 MM_INFO("module %s: READY\n", module->name);
724 module->state = ADSP_STATE_ENABLED;
725 wake_up(&module->state_wait);
726 adsp_set_image(module->info, image);
727 break;
728 case RPC_ADSP_RTOS_MOD_DISABLE:
729 MM_INFO("module %s: DISABLED\n", module->name);
730 module->state = ADSP_STATE_DISABLED;
731 wake_up(&module->state_wait);
732 break;
733 case RPC_ADSP_RTOS_SERVICE_RESET:
734 MM_INFO("module %s: SERVICE_RESET\n", module->name);
735 module->state = ADSP_STATE_DISABLED;
736 wake_up(&module->state_wait);
737 break;
738 case RPC_ADSP_RTOS_CMD_SUCCESS:
739 MM_INFO("module %s: CMD_SUCCESS\n", module->name);
740 break;
741 case RPC_ADSP_RTOS_CMD_FAIL:
742 MM_INFO("module %s: CMD_FAIL\n", module->name);
743 break;
744 case RPC_ADSP_RTOS_DISABLE_FAIL:
745 MM_INFO("module %s: DISABLE_FAIL\n", module->name);
746 break;
747 default:
748 MM_ERR("unknown event %d\n", event);
749 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
750 RPC_ACCEPTSTAT_GARBAGE_ARGS);
751 mutex_unlock(&module->lock);
752 return;
753 }
754 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
755 RPC_ACCEPTSTAT_SUCCESS);
756#ifdef CONFIG_MSM_ADSP_REPORT_EVENTS
757 event_addr = (uint32_t *)req;
758 module->ops->event(module->driver_data,
759 EVENT_MSG_ID,
760 EVENT_LEN,
761 read_event);
762#endif
763 mutex_unlock(&module->lock);
764}
765
766static int handle_adsp_rtos_mtoa(struct rpc_request_hdr *req)
767{
768 switch (req->procedure) {
769 case RPC_ADSP_RTOS_MTOA_NULL_PROC:
770 rpc_send_accepted_void_reply(rpc_cb_server_client,
771 req->xid,
772 RPC_ACCEPTSTAT_SUCCESS);
773 break;
774#if CONFIG_ADSP_RPC_VER > 0x30001
775 case RPC_ADSP_RTOS_MTOA_INIT_INFO_PROC:
776 case RPC_ADSP_RTOS_MTOA_EVENT_INFO_PROC:
777#else
778 case RPC_ADSP_RTOS_MODEM_TO_APP_PROC:
779#endif
780 handle_adsp_rtos_mtoa_app(req);
781 break;
782 default:
783 MM_ERR("unknowned proc %d\n", req->procedure);
784 rpc_send_accepted_void_reply(
785 rpc_cb_server_client, req->xid,
786 RPC_ACCEPTSTAT_PROC_UNAVAIL);
787 break;
788 }
789 return 0;
790}
791
792/* this should be common code with rpc_servers.c */
793static int adsp_rpc_thread(void *data)
794{
795 void *buffer;
796 struct rpc_request_hdr *req;
797 int rc, exit = 0;
798
799 do {
800 rc = msm_rpc_read(rpc_cb_server_client, &buffer, -1, -1);
801 if (rc < 0) {
802 MM_ERR("could not read rpc: %d\n", rc);
803 break;
804 }
805 req = (struct rpc_request_hdr *)buffer;
806
807 req->type = be32_to_cpu(req->type);
808 req->xid = be32_to_cpu(req->xid);
809 req->rpc_vers = be32_to_cpu(req->rpc_vers);
810 req->prog = be32_to_cpu(req->prog);
811 req->vers = be32_to_cpu(req->vers);
812 req->procedure = be32_to_cpu(req->procedure);
813
814 if (req->type != 0)
815 goto bad_rpc;
816 if (req->rpc_vers != 2)
817 goto bad_rpc;
818 if (req->prog != rpc_adsp_rtos_mtoa_prog)
819 goto bad_rpc;
820 if (!msm_rpc_is_compatible_version(rpc_adsp_rtos_mtoa_vers,
821 req->vers))
822 goto bad_rpc;
823
824 handle_adsp_rtos_mtoa(req);
825 kfree(buffer);
826 continue;
827
828bad_rpc:
829 MM_ERR("bogus rpc from modem\n");
830 kfree(buffer);
831 } while (!exit);
832 do_exit(0);
833}
834
835static size_t read_event_size;
836static void *read_event_addr;
837
838static void read_event_16(void *buf, size_t len)
839{
840 uint16_t *dst = buf;
841 uint16_t *src = read_event_addr;
842 len /= 2;
843 if (len > read_event_size)
844 len = read_event_size;
845 while (len--)
846 *dst++ = *src++;
847}
848
849static void read_event_32(void *buf, size_t len)
850{
851 uint32_t *dst = buf;
852 uint32_t *src = read_event_addr;
853 len /= 2;
854 if (len > read_event_size)
855 len = read_event_size;
856 while (len--)
857 *dst++ = *src++;
858}
859
860static int adsp_rtos_read_ctrl_word_cmd_tast_to_h_v(
861 struct adsp_info *info, void *dsp_addr)
862{
863 struct msm_adsp_module *module;
864 unsigned rtos_task_id;
865 unsigned msg_id;
866 unsigned msg_length;
867#ifdef CONFIG_DEBUG_FS
868 uint16_t *ptr;
869 int ii;
870#endif /* CONFIG_DEBUG_FS */
871 void (*func)(void *, size_t);
872
873 if (dsp_addr >= (void *)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) {
874 uint32_t *dsp_addr32 = dsp_addr;
875 uint32_t tmp = *dsp_addr32++;
876 rtos_task_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_TASK_ID_M) >> 8;
877 msg_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_MSG_ID_M);
878 read_event_size = tmp >> 16;
879 read_event_addr = dsp_addr32;
880 msg_length = read_event_size * sizeof(uint32_t);
881 func = read_event_32;
882 } else {
883 uint16_t *dsp_addr16 = dsp_addr;
884 uint16_t tmp = *dsp_addr16++;
885 rtos_task_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_TASK_ID_M) >> 8;
886 msg_id = tmp & ADSP_RTOS_READ_CTRL_WORD_MSG_ID_M;
887 read_event_size = *dsp_addr16++;
888 read_event_addr = dsp_addr16;
889 msg_length = read_event_size * sizeof(uint16_t);
890 func = read_event_16;
891 }
892
893 if (rtos_task_id > info->max_task_id) {
894 MM_ERR("bogus task id %d\n", rtos_task_id);
895 return 0;
896 }
897 module = find_adsp_module_by_id(info,
898 adsp_get_module(info, rtos_task_id));
899
900 if (!module) {
901 MM_ERR("no module for task id %d\n", rtos_task_id);
902 return 0;
903 }
904
905 module->num_events++;
906
907 if (!module->ops) {
908 MM_ERR("module %s is not open\n", module->name);
909 return 0;
910 }
911#ifdef CONFIG_DEBUG_FS
912 if (rdump > 0) {
913 ptr = read_event_addr;
914 pr_info("D->A\n");
915 pr_info("m_id = %x id = %x\n", module->id, msg_id);
916 for (ii = 0; ii < msg_length/2; ii++)
917 pr_info("%x ", ptr[ii]);
918 pr_info("\n");
919 }
920#endif /* CONFIG_DEBUG_FS */
921
922 module->ops->event(module->driver_data, msg_id, msg_length, func);
923 return 0;
924}
925
926static int adsp_get_event(struct adsp_info *info)
927{
928 uint32_t ctrl_word;
929 uint32_t ready;
930 void *dsp_addr;
931 uint32_t cmd_type;
932 int cnt;
933 unsigned long flags;
934 int rc = 0;
935
936 spin_lock_irqsave(&adsp_cmd_lock, flags);
937
938 /* Whenever the DSP has a message, it updates this control word
939 * and generates an interrupt. When we receive the interrupt, we
940 * read this register to find out what ADSP task the command is
941 * comming from.
942 *
943 * The ADSP should *always* be ready on the first call, but the
944 * irq handler calls us in a loop (to handle back-to-back command
945 * processing), so we give the DSP some time to return to the
946 * ready state. The DSP will not issue another IRQ for events
947 * pending between the first IRQ and the event queue being drained,
948 * unfortunately.
949 */
950
951 for (cnt = 0; cnt < 50; cnt++) {
952 ctrl_word = readl(info->read_ctrl);
953
954 if ((ctrl_word & ADSP_RTOS_READ_CTRL_WORD_FLAG_M) ==
955 ADSP_RTOS_READ_CTRL_WORD_FLAG_UP_CONT_V)
956 goto ready;
957
958 udelay(2);
959 }
960 MM_ERR("not ready after 100uS\n");
961 rc = -EBUSY;
962 goto done;
963
964ready:
965 /* Here we check to see if there are pending messages. If there are
966 * none, we siply return -EAGAIN to indicate that there are no more
967 * messages pending.
968 */
969 ready = ctrl_word & ADSP_RTOS_READ_CTRL_WORD_READY_M;
970 if ((ready != ADSP_RTOS_READ_CTRL_WORD_READY_V) &&
971 (ready != ADSP_RTOS_READ_CTRL_WORD_CONT_V)) {
972 rc = -EAGAIN;
973 goto done;
974 }
975
976 /* DSP says that there are messages waiting for the host to read */
977
978 /* Get the Command Type */
979 cmd_type = ctrl_word & ADSP_RTOS_READ_CTRL_WORD_CMD_TYPE_M;
980
981 /* Get the DSP buffer address */
982 dsp_addr = (void *)((ctrl_word &
983 ADSP_RTOS_READ_CTRL_WORD_DSP_ADDR_M) +
984 (uint32_t)MSM_AD5_BASE);
985
986 /* We can only handle Task-to-Host messages */
987 if (cmd_type != ADSP_RTOS_READ_CTRL_WORD_CMD_TASK_TO_H_V) {
988 MM_ERR("unknown dsp cmd_type %d\n", cmd_type);
989 rc = -EIO;
990 goto done;
991 }
992
993 adsp_rtos_read_ctrl_word_cmd_tast_to_h_v(info, dsp_addr);
994
995 ctrl_word = readl(info->read_ctrl);
996 ctrl_word &= ~ADSP_RTOS_READ_CTRL_WORD_READY_M;
997
998 /* Write ctrl word to the DSP */
999 writel(ctrl_word, info->read_ctrl);
1000
1001 /* Generate an interrupt to the DSP */
1002 writel(1, info->send_irq);
1003
1004done:
1005 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
1006 return rc;
1007}
1008
1009static irqreturn_t adsp_irq_handler(int irq, void *data)
1010{
1011 struct adsp_info *info = &adsp_info;
1012 int cnt = 0;
1013 for (cnt = 0; cnt < 15; cnt++)
1014 if (adsp_get_event(info) < 0)
1015 break;
1016 if (cnt > info->event_backlog_max)
1017 info->event_backlog_max = cnt;
1018 info->events_received += cnt;
1019 if (cnt == 15)
1020 MM_ERR("too many (%d) events for single irq!\n", cnt);
1021 return IRQ_HANDLED;
1022}
1023
1024int adsp_set_clkrate(struct msm_adsp_module *module, unsigned long clk_rate)
1025{
Manish Dewangan49037122012-02-10 18:25:25 +05301026 if (!module)
1027 return -EINVAL;
1028
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001029 if (module->clk && clk_rate)
Matt Wagantallf13bee62011-11-08 15:36:32 -08001030 return clk_set_rate(module->clk, clk_rate);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001031
1032 return -EINVAL;
1033}
1034
Manish Dewangan8e87bc12012-02-09 20:25:15 +05301035int msm_adsp_generate_event(void *data,
1036 struct msm_adsp_module *mod,
1037 unsigned event_id,
1038 unsigned event_length,
1039 unsigned event_size,
1040 void *msg)
1041{
1042 unsigned long flags;
1043 void (*func)(void *, size_t);
1044
Manish Dewangan49037122012-02-10 18:25:25 +05301045 if (!mod)
1046 return -EINVAL;
1047
Manish Dewangan8e87bc12012-02-09 20:25:15 +05301048 if (event_size == sizeof(uint32_t))
1049 func = read_event_32;
1050 else if (event_size == sizeof(uint16_t))
1051 func = read_event_16;
1052 else
1053 return -EINVAL;
1054
1055 spin_lock_irqsave(&adsp_cmd_lock, flags);
1056 read_event_addr = msg;
Manish Dewangan68532ec2012-03-12 10:31:31 +05301057 read_event_size = event_length;
Manish Dewangan8e87bc12012-02-09 20:25:15 +05301058 mod->ops->event(data, event_id, event_length, func);
1059 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
1060 return 0;
1061}
1062
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001063int msm_adsp_enable(struct msm_adsp_module *module)
1064{
1065 int rc = 0;
1066
Manish Dewangan49037122012-02-10 18:25:25 +05301067 if (!module)
1068 return -EINVAL;
1069
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001070 MM_INFO("enable '%s'state[%d] id[%d]\n",
1071 module->name, module->state, module->id);
1072
1073 mutex_lock(&module->lock);
1074 switch (module->state) {
1075 case ADSP_STATE_DISABLED:
1076 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_ENABLE,
1077 module->id, module);
1078 if (rc)
1079 break;
1080 module->state = ADSP_STATE_ENABLING;
1081 mutex_unlock(&module->lock);
1082 rc = wait_event_timeout(module->state_wait,
1083 module->state != ADSP_STATE_ENABLING,
1084 1 * HZ);
1085 mutex_lock(&module->lock);
1086 if (module->state == ADSP_STATE_ENABLED) {
1087 rc = 0;
1088 } else {
1089 MM_ERR("module '%s' enable timed out\n", module->name);
1090 rc = -ETIMEDOUT;
1091 }
1092 if (module->open_count++ == 0 && module->clk)
Laxminath Kasame448b242012-03-21 13:50:19 +05301093 clk_prepare_enable(module->clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001094
1095 mutex_lock(&adsp_open_lock);
1096 if (adsp_open_count++ == 0) {
Laxminath Kasam34aea162012-02-15 12:21:49 +05301097 enable_irq(adsp_info.int_adsp);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001098 prevent_suspend();
1099 }
1100 mutex_unlock(&adsp_open_lock);
1101 break;
1102 case ADSP_STATE_ENABLING:
1103 MM_DBG("module '%s' enable in progress\n", module->name);
1104 break;
1105 case ADSP_STATE_ENABLED:
1106 MM_DBG("module '%s' already enabled\n", module->name);
1107 break;
1108 case ADSP_STATE_DISABLING:
1109 MM_ERR("module '%s' disable in progress\n", module->name);
1110 rc = -EBUSY;
1111 break;
1112 }
1113 mutex_unlock(&module->lock);
1114 return rc;
1115}
1116EXPORT_SYMBOL(msm_adsp_enable);
1117
1118int msm_adsp_disable_event_rsp(struct msm_adsp_module *module)
1119{
1120 int rc = 0;
1121
Manish Dewangan49037122012-02-10 18:25:25 +05301122 if (!module)
1123 return -EINVAL;
1124
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001125 mutex_lock(&module->lock);
1126
1127 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_DISABLE_EVENT_RSP,
1128 module->id, module);
1129 mutex_unlock(&module->lock);
1130
1131 return rc;
1132}
1133EXPORT_SYMBOL(msm_adsp_disable_event_rsp);
1134
1135static int msm_adsp_disable_locked(struct msm_adsp_module *module)
1136{
1137 int rc = 0;
1138
Manish Dewangan49037122012-02-10 18:25:25 +05301139 if (!module)
1140 return -EINVAL;
1141
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001142 switch (module->state) {
1143 case ADSP_STATE_DISABLED:
1144 MM_DBG("module '%s' already disabled\n", module->name);
1145 break;
1146 case ADSP_STATE_ENABLING:
1147 case ADSP_STATE_ENABLED:
1148 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_DISABLE,
1149 module->id, module);
1150 module->state = ADSP_STATE_DISABLED;
1151 if (--module->open_count == 0 && module->clk)
Laxminath Kasame448b242012-03-21 13:50:19 +05301152 clk_disable_unprepare(module->clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001153 mutex_lock(&adsp_open_lock);
1154 if (--adsp_open_count == 0) {
Laxminath Kasam34aea162012-02-15 12:21:49 +05301155 disable_irq(adsp_info.int_adsp);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001156 allow_suspend();
1157 MM_DBG("disable interrupt\n");
1158 }
1159 mutex_unlock(&adsp_open_lock);
1160 }
1161 return rc;
1162}
1163
1164int msm_adsp_disable(struct msm_adsp_module *module)
1165{
1166 int rc;
Manish Dewangan49037122012-02-10 18:25:25 +05301167
1168 if (!module)
1169 return -EINVAL;
1170
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001171 MM_INFO("disable '%s'\n", module->name);
1172 mutex_lock(&module->lock);
1173 rc = msm_adsp_disable_locked(module);
1174 mutex_unlock(&module->lock);
1175 return rc;
1176}
1177EXPORT_SYMBOL(msm_adsp_disable);
1178
1179static int msm_adsp_probe(struct platform_device *pdev)
1180{
1181 unsigned count;
1182 int rc, i;
1183
Laxminath Kasam34aea162012-02-15 12:21:49 +05301184 adsp_info.int_adsp = platform_get_irq(pdev, 0);
1185 if (adsp_info.int_adsp < 0) {
1186 MM_ERR("no irq resource?\n");
1187 return -ENODEV;
1188 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001189
1190 wake_lock_init(&adsp_wake_lock, WAKE_LOCK_SUSPEND, "adsp");
1191 adsp_info.init_info_ptr = kzalloc(
1192 (sizeof(struct adsp_rtos_mp_mtoa_init_info_type)), GFP_KERNEL);
1193 if (!adsp_info.init_info_ptr)
1194 return -ENOMEM;
1195
1196 rc = adsp_init_info(&adsp_info);
1197 if (rc)
1198 return rc;
1199 adsp_info.send_irq += (uint32_t) MSM_AD5_BASE;
1200 adsp_info.read_ctrl += (uint32_t) MSM_AD5_BASE;
1201 adsp_info.write_ctrl += (uint32_t) MSM_AD5_BASE;
1202 count = adsp_info.module_count;
1203
1204 adsp_modules = kzalloc(
1205 (sizeof(struct msm_adsp_module) + sizeof(void *)) *
1206 count, GFP_KERNEL);
1207 if (!adsp_modules)
1208 return -ENOMEM;
1209
1210 adsp_info.id_to_module = (void *) (adsp_modules + count);
1211
1212 spin_lock_init(&adsp_cmd_lock);
1213 spin_lock_init(&adsp_write_lock);
Manish Dewangan691f1c42012-02-10 12:50:14 +05301214 mutex_init(&adsp_info.lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001215
Laxminath Kasam34aea162012-02-15 12:21:49 +05301216 rc = request_irq(adsp_info.int_adsp, adsp_irq_handler,
1217 IRQF_TRIGGER_RISING, "adsp", 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001218 if (rc < 0)
1219 goto fail_request_irq;
Laxminath Kasam34aea162012-02-15 12:21:49 +05301220 disable_irq(adsp_info.int_adsp);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001221
1222 rpc_cb_server_client = msm_rpc_open();
1223 if (IS_ERR(rpc_cb_server_client)) {
1224 rpc_cb_server_client = NULL;
1225 rc = PTR_ERR(rpc_cb_server_client);
1226 MM_ERR("could not create rpc server (%d)\n", rc);
1227 goto fail_rpc_open;
1228 }
1229
1230 rc = msm_rpc_register_server(rpc_cb_server_client,
1231 rpc_adsp_rtos_mtoa_prog,
1232 rpc_adsp_rtos_mtoa_vers);
1233 if (rc) {
1234 MM_ERR("could not register callback server (%d)\n", rc);
1235 goto fail_rpc_register;
1236 }
1237
Chaithanya Krishna Bacharajua3931822012-05-09 13:44:07 +05301238 /* schedule start of kernel thread later using work queue */
1239 queue_work(msm_adsp_probe_work_queue, &msm_adsp_probe_work);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001240
1241 for (i = 0; i < count; i++) {
1242 struct msm_adsp_module *mod = adsp_modules + i;
1243 mutex_init(&mod->lock);
1244 init_waitqueue_head(&mod->state_wait);
1245 mod->info = &adsp_info;
1246 mod->name = adsp_info.module[i].name;
1247 mod->id = adsp_info.module[i].id;
1248 if (adsp_info.module[i].clk_name)
1249 mod->clk = clk_get(NULL, adsp_info.module[i].clk_name);
1250 else
1251 mod->clk = NULL;
1252 if (mod->clk && adsp_info.module[i].clk_rate)
Matt Wagantallf13bee62011-11-08 15:36:32 -08001253 clk_set_rate(mod->clk, adsp_info.module[i].clk_rate);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001254 mod->verify_cmd = adsp_info.module[i].verify_cmd;
1255 mod->patch_event = adsp_info.module[i].patch_event;
1256 INIT_HLIST_HEAD(&mod->pmem_regions);
1257 mod->pdev.name = adsp_info.module[i].pdev_name;
1258 mod->pdev.id = -1;
1259 adsp_info.id_to_module[i] = mod;
1260 platform_device_register(&mod->pdev);
1261 }
1262
1263 msm_adsp_publish_cdevs(adsp_modules, count);
1264 rmtask_init();
1265
1266 return 0;
1267
1268fail_rpc_register:
1269 msm_rpc_close(rpc_cb_server_client);
1270 rpc_cb_server_client = NULL;
1271fail_rpc_open:
Laxminath Kasam34aea162012-02-15 12:21:49 +05301272 enable_irq(adsp_info.int_adsp);
1273 free_irq(adsp_info.int_adsp, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001274fail_request_irq:
1275 kfree(adsp_modules);
1276 kfree(adsp_info.init_info_ptr);
1277 return rc;
1278}
Chaithanya Krishna Bacharajua3931822012-05-09 13:44:07 +05301279
1280static void adsp_probe_work(struct work_struct *work)
1281{
1282 /* start the kernel thread to process the callbacks */
1283 kthread_run(adsp_rpc_thread, NULL, "kadspd");
1284}
1285
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001286#ifdef CONFIG_DEBUG_FS
1287static int get_parameters(char *buf, long int *param1, int num_of_par)
1288{
1289 char *token;
1290 int base, cnt;
1291
1292 token = strsep(&buf, " ");
1293
1294 for (cnt = 0; cnt < num_of_par; cnt++) {
1295 if (token != NULL) {
1296 if ((token[1] == 'x') || (token[1] == 'X'))
1297 base = 16;
1298 else
1299 base = 10;
1300
1301 if (strict_strtoul(token, base, &param1[cnt]) != 0)
1302 return -EINVAL;
1303
1304 token = strsep(&buf, " ");
1305 }
1306 else
1307 return -EINVAL;
1308 }
1309 return 0;
1310}
1311
1312
1313static ssize_t adsp_debug_open(struct inode *inode, struct file *file)
1314{
1315 file->private_data = inode->i_private;
1316 pr_debug("adsp debugfs opened\n");
1317 return 0;
1318}
1319static ssize_t adsp_debug_write(struct file *file, const char __user *buf,
1320 size_t cnt, loff_t *ppos)
1321{
1322 char *access_str = file->private_data;
1323 char lbuf[32];
1324 int rc;
1325 long int param[5];
1326
1327 if (cnt > sizeof(lbuf) - 1)
1328 return -EINVAL;
1329 rc = copy_from_user(lbuf, buf, cnt);
1330 if (rc) {
1331 pr_info("Unable to copy data from user space\n");
1332 return -EFAULT;
1333 }
1334 lbuf[cnt] = '\0';
1335
1336 if (!strcmp(access_str, "write_log")) {
1337 if (get_parameters(lbuf, param, 1) == 0) {
1338 switch (param[0]) {
1339 case 1:
1340 if (wdump <= 0)
1341 wdump = 1;
1342 pr_debug("write cmd to DSP(A->D) dump \
1343 started:%d\n", wdump);
1344 break;
1345 case 0:
1346 if (wdump > 0)
1347 wdump = 0;
1348 pr_debug("Stop write cmd to \
1349 DSP(A->D):%d\n", wdump);
1350 break;
1351 default:
1352 rc = -EINVAL;
1353 break;
1354 }
1355 } else
1356 rc = -EINVAL;
1357 } else if (!strcmp(access_str, "read_log")) {
1358 if (get_parameters(lbuf, param, 1) == 0) {
1359 switch (param[0]) {
1360 case 1:
1361 if (rdump <= 0)
1362 rdump = 1;
1363 pr_debug("write cmd from DSP(D->A) dump \
1364 started:%d\n", wdump);
1365 break;
1366 case 0:
1367 if (rdump > 0)
1368 rdump = 0;
1369 pr_debug("Stop write cmd from \
1370 DSP(D->A):%d\n", wdump);
1371 break;
1372 default:
1373 rc = -EINVAL;
1374 break;
1375 }
1376 } else
1377 rc = -EINVAL;
1378 } else {
1379 rc = -EINVAL;
1380 }
1381 if (rc == 0)
1382 rc = cnt;
1383 else {
1384 pr_err("%s: rc = %d\n", __func__, rc);
1385 pr_info("\nWrong command: Use =>\n");
1386 pr_info("-------------------------\n");
1387 pr_info("To Start A->D:: echo \"1\">/sys/kernel/debug/ \
1388 adsp_cmd/write_log\n");
1389 pr_info("To Start D->A:: echo \"1\">/sys/kernel/debug/ \
1390 adsp_cmd/read_log\n");
1391 pr_info("To Stop A->D:: echo \"0\">/sys/kernel/debug/ \
1392 adsp_cmd/write_log\n");
1393 pr_info("To Stop D->A:: echo \"0\">/sys/kernel/debug/ \
1394 adsp_cmd/read_log\n");
1395 pr_info("------------------------\n");
1396 }
1397
1398 return rc;
1399}
1400#endif
1401
1402static struct platform_driver msm_adsp_driver = {
1403 .probe = msm_adsp_probe,
1404 .driver = {
1405 .owner = THIS_MODULE,
1406 },
1407};
1408
Laxminath Kasam34aea162012-02-15 12:21:49 +05301409static const char msm_adsp_driver_name[] = "msm_adsp";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001410
1411#ifdef CONFIG_DEBUG_FS
1412static const struct file_operations adsp_debug_fops = {
1413 .write = adsp_debug_write,
1414 .open = adsp_debug_open,
1415};
1416#endif
1417
1418static int __init adsp_init(void)
1419{
1420 int rc;
1421
1422#ifdef CONFIG_DEBUG_FS
1423 dentry_adsp = debugfs_create_dir("adsp_cmd", 0);
1424 if (!IS_ERR(dentry_adsp)) {
1425 dentry_wdata = debugfs_create_file("write_log", \
1426 S_IFREG | S_IRUGO, dentry_adsp,
1427 (void *) "write_log" , &adsp_debug_fops);
1428 dentry_rdata = debugfs_create_file("read_log", \
1429 S_IFREG | S_IRUGO, dentry_adsp,
1430 (void *) "read_log", &adsp_debug_fops);
1431 }
1432 rdump = 0;
1433 wdump = 0;
1434#endif /* CONFIG_DEBUG_FS */
1435
1436 rpc_adsp_rtos_atom_prog = 0x3000000a;
1437 rpc_adsp_rtos_atom_vers = 0x10001;
1438 rpc_adsp_rtos_atom_vers_comp = 0x00010001;
1439 rpc_adsp_rtos_mtoa_prog = 0x3000000b;
1440#if CONFIG_ADSP_RPC_VER > 0x30001
1441 rpc_adsp_rtos_mtoa_vers = 0x30002;
1442 rpc_adsp_rtos_mtoa_vers_comp = 0x00030002;
1443#else
1444 rpc_adsp_rtos_mtoa_vers = 0x30001;
1445 rpc_adsp_rtos_mtoa_vers_comp = 0x00030001;
1446#endif
1447
Chaithanya Krishna Bacharajua3931822012-05-09 13:44:07 +05301448 msm_adsp_probe_work_queue = create_workqueue("msm_adsp_probe");
1449 if (msm_adsp_probe_work_queue == NULL)
1450 return -ENOMEM;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001451 msm_adsp_driver.driver.name = msm_adsp_driver_name;
1452 rc = platform_driver_register(&msm_adsp_driver);
1453 MM_INFO("%s -- %d\n", msm_adsp_driver_name, rc);
1454 return rc;
1455}
1456
1457device_initcall(adsp_init);