blob: 7f603dd735726049b0ab9c687706261d26e9c694 [file] [log] [blame]
Kiran Kandi94f25dc2012-01-31 00:18:33 -08001/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#include <linux/types.h>
15#include <linux/bitops.h>
16#include <linux/mutex.h>
17
Manoj Rao668d6d52011-08-16 19:12:31 -070018/* #define DEBUG */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070019#define DEV_DBG_PREFIX "EXT_COMMON: "
20
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -070021/* The start of the data block collection within the CEA Extension Version 3 */
22#define DBC_START_OFFSET 4
23
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#include "msm_fb.h"
Manoj Raoa2c27672011-08-30 17:19:39 -070025#include "hdmi_msm.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include "external_common.h"
Eugene Yasmand0de5f92011-12-20 13:57:28 +020027#include "mhl_api.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028
29struct external_common_state_type *external_common_state;
30EXPORT_SYMBOL(external_common_state);
31DEFINE_MUTEX(external_common_state_hpd_mutex);
32EXPORT_SYMBOL(external_common_state_hpd_mutex);
33
Manoj Raoa2c27672011-08-30 17:19:39 -070034
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070035static int atoi(const char *name)
36{
37 int val = 0;
38
39 for (;; name++) {
40 switch (*name) {
41 case '0' ... '9':
42 val = 10*val+(*name-'0');
43 break;
44 default:
45 return val;
46 }
47 }
48}
49
Manoj Rao668d6d52011-08-16 19:12:31 -070050#ifdef DEBUG_EDID
51/*
52 * Block 0 - 1920x1080p, 1360x768p
53 * Block 1 - 1280x720p, 1920x540i, 720x480p
54 */
55const char edid_blk0[0x100] = {
560x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x4C, 0x2D, 0x03, 0x05, 0x00,
570x00, 0x00, 0x00, 0x30, 0x12, 0x01, 0x03, 0x80, 0x10, 0x09, 0x78, 0x0A, 0xEE,
580x91, 0xA3, 0x54, 0x4C, 0x99, 0x26, 0x0F, 0x50, 0x54, 0xBD, 0xEF, 0x80, 0x71,
590x4F, 0x81, 0x00, 0x81, 0x40, 0x81, 0x80, 0x95, 0x00, 0x95, 0x0F, 0xB3, 0x00,
600xA9, 0x40, 0x02, 0x3A, 0x80, 0x18, 0x71, 0x38, 0x2D, 0x40, 0x58, 0x2C, 0x45,
610x00, 0xA0, 0x5A, 0x00, 0x00, 0x00, 0x1E, 0x66, 0x21, 0x50, 0xB0, 0x51, 0x00,
620x1B, 0x30, 0x40, 0x70, 0x36, 0x00, 0xA0, 0x5A, 0x00, 0x00, 0x00, 0x1E, 0x00,
630x00, 0x00, 0xFD, 0x00, 0x18, 0x4B, 0x1A, 0x51, 0x17, 0x00, 0x0A, 0x20, 0x20,
640x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x53, 0x41, 0x4D, 0x53,
650x55, 0x4E, 0x47, 0x0A, 0x20, 0x20, 0x20, 0x20, 0x20, 0x01, 0x8F};
66
67const char edid_blk1[0x100] = {
680x02, 0x03, 0x1E, 0xF1, 0x46, 0x90, 0x04, 0x05, 0x03, 0x20, 0x22, 0x23, 0x09,
690x07, 0x07, 0x83, 0x01, 0x00, 0x00, 0xE2, 0x00, 0x0F, 0x67, 0x03, 0x0C, 0x00,
700x10, 0x00, 0xB8, 0x2D, 0x01, 0x1D, 0x00, 0x72, 0x51, 0xD0, 0x1E, 0x20, 0x6E,
710x28, 0x55, 0x00, 0xA0, 0x5A, 0x00, 0x00, 0x00, 0x1E, 0x01, 0x1D, 0x80, 0x18,
720x71, 0x1C, 0x16, 0x20, 0x58, 0x2C, 0x25, 0x00, 0xA0, 0x5A, 0x00, 0x00, 0x00,
730x9E, 0x8C, 0x0A, 0xD0, 0x8A, 0x20, 0xE0, 0x2D, 0x10, 0x10, 0x3E, 0x96, 0x00,
740xA0, 0x5A, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
750x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
760x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
770x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xDF};
78#endif /* DEBUG_EDID */
79
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070080const char *video_format_2string(uint32 format)
81{
82 switch (format) {
83 default:
84#ifdef CONFIG_FB_MSM_HDMI_COMMON
85 case HDMI_VFRMT_640x480p60_4_3: return " 640x 480 p60 4/3";
86 case HDMI_VFRMT_720x480p60_4_3: return " 720x 480 p60 4/3";
87 case HDMI_VFRMT_720x480p60_16_9: return " 720x 480 p60 16/9";
88 case HDMI_VFRMT_1280x720p60_16_9: return "1280x 720 p60 16/9";
89 case HDMI_VFRMT_1920x1080i60_16_9: return "1920x1080 i60 16/9";
90 case HDMI_VFRMT_1440x480i60_4_3: return "1440x 480 i60 4/3";
91 case HDMI_VFRMT_1440x480i60_16_9: return "1440x 480 i60 16/9";
92 case HDMI_VFRMT_1440x240p60_4_3: return "1440x 240 p60 4/3";
93 case HDMI_VFRMT_1440x240p60_16_9: return "1440x 240 p60 16/9";
94 case HDMI_VFRMT_2880x480i60_4_3: return "2880x 480 i60 4/3";
95 case HDMI_VFRMT_2880x480i60_16_9: return "2880x 480 i60 16/9";
96 case HDMI_VFRMT_2880x240p60_4_3: return "2880x 240 p60 4/3";
97 case HDMI_VFRMT_2880x240p60_16_9: return "2880x 240 p60 16/9";
98 case HDMI_VFRMT_1440x480p60_4_3: return "1440x 480 p60 4/3";
99 case HDMI_VFRMT_1440x480p60_16_9: return "1440x 480 p60 16/9";
100 case HDMI_VFRMT_1920x1080p60_16_9: return "1920x1080 p60 16/9";
101 case HDMI_VFRMT_720x576p50_4_3: return " 720x 576 p50 4/3";
102 case HDMI_VFRMT_720x576p50_16_9: return " 720x 576 p50 16/9";
103 case HDMI_VFRMT_1280x720p50_16_9: return "1280x 720 p50 16/9";
104 case HDMI_VFRMT_1920x1080i50_16_9: return "1920x1080 i50 16/9";
105 case HDMI_VFRMT_1440x576i50_4_3: return "1440x 576 i50 4/3";
106 case HDMI_VFRMT_1440x576i50_16_9: return "1440x 576 i50 16/9";
107 case HDMI_VFRMT_1440x288p50_4_3: return "1440x 288 p50 4/3";
108 case HDMI_VFRMT_1440x288p50_16_9: return "1440x 288 p50 16/9";
109 case HDMI_VFRMT_2880x576i50_4_3: return "2880x 576 i50 4/3";
110 case HDMI_VFRMT_2880x576i50_16_9: return "2880x 576 i50 16/9";
111 case HDMI_VFRMT_2880x288p50_4_3: return "2880x 288 p50 4/3";
112 case HDMI_VFRMT_2880x288p50_16_9: return "2880x 288 p50 16/9";
113 case HDMI_VFRMT_1440x576p50_4_3: return "1440x 576 p50 4/3";
114 case HDMI_VFRMT_1440x576p50_16_9: return "1440x 576 p50 16/9";
115 case HDMI_VFRMT_1920x1080p50_16_9: return "1920x1080 p50 16/9";
116 case HDMI_VFRMT_1920x1080p24_16_9: return "1920x1080 p24 16/9";
117 case HDMI_VFRMT_1920x1080p25_16_9: return "1920x1080 p25 16/9";
118 case HDMI_VFRMT_1920x1080p30_16_9: return "1920x1080 p30 16/9";
119 case HDMI_VFRMT_2880x480p60_4_3: return "2880x 480 p60 4/3";
120 case HDMI_VFRMT_2880x480p60_16_9: return "2880x 480 p60 16/9";
121 case HDMI_VFRMT_2880x576p50_4_3: return "2880x 576 p50 4/3";
122 case HDMI_VFRMT_2880x576p50_16_9: return "2880x 576 p50 16/9";
123 case HDMI_VFRMT_1920x1250i50_16_9: return "1920x1250 i50 16/9";
124 case HDMI_VFRMT_1920x1080i100_16_9:return "1920x1080 i100 16/9";
125 case HDMI_VFRMT_1280x720p100_16_9: return "1280x 720 p100 16/9";
126 case HDMI_VFRMT_720x576p100_4_3: return " 720x 576 p100 4/3";
127 case HDMI_VFRMT_720x576p100_16_9: return " 720x 576 p100 16/9";
128 case HDMI_VFRMT_1440x576i100_4_3: return "1440x 576 i100 4/3";
129 case HDMI_VFRMT_1440x576i100_16_9: return "1440x 576 i100 16/9";
130 case HDMI_VFRMT_1920x1080i120_16_9:return "1920x1080 i120 16/9";
131 case HDMI_VFRMT_1280x720p120_16_9: return "1280x 720 p120 16/9";
132 case HDMI_VFRMT_720x480p120_4_3: return " 720x 480 p120 4/3";
133 case HDMI_VFRMT_720x480p120_16_9: return " 720x 480 p120 16/9";
134 case HDMI_VFRMT_1440x480i120_4_3: return "1440x 480 i120 4/3";
135 case HDMI_VFRMT_1440x480i120_16_9: return "1440x 480 i120 16/9";
136 case HDMI_VFRMT_720x576p200_4_3: return " 720x 576 p200 4/3";
137 case HDMI_VFRMT_720x576p200_16_9: return " 720x 576 p200 16/9";
138 case HDMI_VFRMT_1440x576i200_4_3: return "1440x 576 i200 4/3";
139 case HDMI_VFRMT_1440x576i200_16_9: return "1440x 576 i200 16/9";
140 case HDMI_VFRMT_720x480p240_4_3: return " 720x 480 p240 4/3";
141 case HDMI_VFRMT_720x480p240_16_9: return " 720x 480 p240 16/9";
142 case HDMI_VFRMT_1440x480i240_4_3: return "1440x 480 i240 4/3";
143 case HDMI_VFRMT_1440x480i240_16_9: return "1440x 480 i240 16/9";
144#elif defined(CONFIG_FB_MSM_TVOUT)
145 case TVOUT_VFRMT_NTSC_M_720x480i: return "NTSC_M_720x480i";
146 case TVOUT_VFRMT_NTSC_J_720x480i: return "NTSC_J_720x480i";
147 case TVOUT_VFRMT_PAL_BDGHIN_720x576i: return "PAL_BDGHIN_720x576i";
148 case TVOUT_VFRMT_PAL_M_720x480i: return "PAL_M_720x480i";
149 case TVOUT_VFRMT_PAL_N_720x480i: return "PAL_N_720x480i";
150#endif
151
152 }
153}
154EXPORT_SYMBOL(video_format_2string);
155
156static ssize_t external_common_rda_video_mode_str(struct device *dev,
157 struct device_attribute *attr, char *buf)
158{
159 ssize_t ret = snprintf(buf, PAGE_SIZE, "%s\n",
160 video_format_2string(external_common_state->video_resolution));
161 DEV_DBG("%s: '%s'\n", __func__,
162 video_format_2string(external_common_state->video_resolution));
163 return ret;
164}
165
166#ifdef CONFIG_FB_MSM_HDMI_COMMON
167struct hdmi_disp_mode_timing_type
168 hdmi_common_supported_video_mode_lut[HDMI_VFRMT_MAX] = {
169 HDMI_SETTINGS_640x480p60_4_3,
170 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x480p60_4_3),
171 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x480p60_16_9),
172 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1280x720p60_16_9),
173 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1080i60_16_9),
174 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480i60_4_3),
175 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480i60_16_9),
176 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x240p60_4_3),
177 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x240p60_16_9),
178 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x480i60_4_3),
179 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x480i60_16_9),
180 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x240p60_4_3),
181 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x240p60_16_9),
182 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480p60_4_3),
183 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480p60_16_9),
184 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1080p60_16_9),
185 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x576p50_4_3),
186 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x576p50_16_9),
187 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1280x720p50_16_9),
188 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1080i50_16_9),
189 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576i50_4_3),
190 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576i50_16_9),
191 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x288p50_4_3),
192 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x288p50_16_9),
193 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x576i50_4_3),
194 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x576i50_16_9),
195 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x288p50_4_3),
196 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x288p50_16_9),
197 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576p50_4_3),
198 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576p50_16_9),
199 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1080p50_16_9),
200 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1080p24_16_9),
201 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1080p25_16_9),
202 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1080p30_16_9),
203 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x480p60_4_3),
204 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x480p60_16_9),
205 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x576p50_4_3),
206 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x576p50_16_9),
207 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1250i50_16_9),
208 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1080i100_16_9),
209 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1280x720p100_16_9),
210 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x576p100_4_3),
211 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x576p100_16_9),
212 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576i100_4_3),
213 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576i100_16_9),
214 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1080i120_16_9),
215 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1280x720p120_16_9),
216 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x480p120_4_3),
217 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x480p120_16_9),
218 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480i120_4_3),
219 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480i120_16_9),
220 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x576p200_4_3),
221 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x576p200_16_9),
222 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576i200_4_3),
223 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576i200_16_9),
224 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x480p240_4_3),
225 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x480p240_16_9),
226 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480i240_4_3),
227 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480i240_16_9),
228};
229EXPORT_SYMBOL(hdmi_common_supported_video_mode_lut);
230
Eugene Yasmand0de5f92011-12-20 13:57:28 +0200231struct hdmi_disp_mode_timing_type
232 hdmi_mhl_supported_video_mode_lut[HDMI_VFRMT_MAX] = {
233 HDMI_SETTINGS_640x480p60_4_3,
234 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x480p60_4_3),
235 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x480p60_16_9),
236 HDMI_SETTINGS_1280x720p60_16_9,
237 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1080i60_16_9),
238 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480i60_4_3),
239 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480i60_16_9),
240 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x240p60_4_3),
241 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x240p60_16_9),
242 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x480i60_4_3),
243 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x480i60_16_9),
244 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x240p60_4_3),
245 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x240p60_16_9),
246 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480p60_4_3),
247 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480p60_16_9),
248 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1080p60_16_9),
249 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x576p50_4_3),
250 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x576p50_16_9),
251 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1280x720p50_16_9),
252 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1080i50_16_9),
253 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576i50_4_3),
254 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576i50_16_9),
255 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x288p50_4_3),
256 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x288p50_16_9),
257 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x576i50_4_3),
258 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x576i50_16_9),
259 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x288p50_4_3),
260 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x288p50_16_9),
261 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576p50_4_3),
262 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576p50_16_9),
263 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1080p50_16_9),
264 HDMI_SETTINGS_1920x1080p24_16_9,
265 HDMI_SETTINGS_1920x1080p25_16_9,
266 HDMI_SETTINGS_1920x1080p30_16_9,
267 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x480p60_4_3),
268 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x480p60_16_9),
269 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x576p50_4_3),
270 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_2880x576p50_16_9),
271 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1250i50_16_9),
272 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1080i100_16_9),
273 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1280x720p100_16_9),
274 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x576p100_4_3),
275 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x576p100_16_9),
276 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576i100_4_3),
277 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576i100_16_9),
278 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1920x1080i120_16_9),
279 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1280x720p120_16_9),
280 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x480p120_4_3),
281 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x480p120_16_9),
282 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480i120_4_3),
283 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480i120_16_9),
284 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x576p200_4_3),
285 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x576p200_16_9),
286 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576i200_4_3),
287 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x576i200_16_9),
288 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x480p240_4_3),
289 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_720x480p240_16_9),
290 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480i240_4_3),
291 VFRMT_NOT_SUPPORTED(HDMI_VFRMT_1440x480i240_16_9),
292};
293EXPORT_SYMBOL(hdmi_mhl_supported_video_mode_lut);
294
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700295static ssize_t hdmi_common_rda_edid_modes(struct device *dev,
296 struct device_attribute *attr, char *buf)
297{
298 ssize_t ret = 0;
299 int i;
300
301 buf[0] = 0;
302 if (external_common_state->disp_mode_list.num_of_elements) {
303 uint32 *video_mode = external_common_state->disp_mode_list
304 .disp_mode_list;
305 for (i = 0; i < external_common_state->disp_mode_list
306 .num_of_elements; ++i) {
307 if (ret > 0)
308 ret += snprintf(buf+ret, PAGE_SIZE-ret, ",%d",
309 *video_mode++ + 1);
310 else
311 ret += snprintf(buf+ret, PAGE_SIZE-ret, "%d",
312 *video_mode++ + 1);
313 }
314 } else
315 ret += snprintf(buf+ret, PAGE_SIZE-ret, "%d",
316 external_common_state->video_resolution+1);
317
318 DEV_DBG("%s: '%s'\n", __func__, buf);
319 ret += snprintf(buf+ret, PAGE_SIZE-ret, "\n");
320 return ret;
321}
322
Aravind Venkateswaran226b4292012-03-16 15:35:31 -0700323static ssize_t hdmi_common_rda_edid_physical_address(struct device *dev,
324 struct device_attribute *attr, char *buf)
325{
326 ssize_t ret = snprintf(buf, PAGE_SIZE, "%d\n",
327 external_common_state->physical_address);
328
329 DEV_DBG("%s: '%d'\n", __func__,
330 external_common_state->physical_address);
331 return ret;
332}
333
334
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -0700335static ssize_t hdmi_common_rda_edid_scan_info(struct device *dev,
336 struct device_attribute *attr, char *buf)
337{
338 ssize_t ret = snprintf(buf, PAGE_SIZE, "%d, %d, %d\n",
339 external_common_state->pt_scan_info,
340 external_common_state->it_scan_info,
341 external_common_state->ce_scan_info);
342 DEV_DBG("%s: '%s'\n", __func__, buf);
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -0700343 return ret;
344}
345
Aravind Venkateswaranfff7a7d2012-03-16 15:27:19 -0700346static ssize_t hdmi_common_wta_vendor_name(struct device *dev,
347 struct device_attribute *attr, const char *buf, size_t count)
348{
349 uint8 *s = (uint8 *) buf;
350 uint8 *d = external_common_state->spd_vendor_name;
351 ssize_t ret = strnlen(buf, PAGE_SIZE);
352 ret = (ret > 8) ? 8 : ret;
353
354 memset(external_common_state->spd_vendor_name, 0, 8);
355 while (*s) {
356 if (*s & 0x60 && *s ^ 0x7f) {
357 *d = *s;
358 } else {
359 /* stop copying if control character found */
360 break;
361 }
362
363 if (++s > (uint8 *) (buf + ret))
364 break;
365
366 d++;
367 }
368
369 DEV_DBG("%s: '%s'\n", __func__,
370 external_common_state->spd_vendor_name);
371
372 return ret;
373}
374
375static ssize_t hdmi_common_rda_vendor_name(struct device *dev,
376 struct device_attribute *attr, char *buf)
377{
378 ssize_t ret = snprintf(buf, PAGE_SIZE, "%s\n",
379 external_common_state->spd_vendor_name);
380 DEV_DBG("%s: '%s'\n", __func__,
381 external_common_state->spd_vendor_name);
382
383 return ret;
384}
385
386static ssize_t hdmi_common_wta_product_description(struct device *dev,
387 struct device_attribute *attr, const char *buf, size_t count)
388{
389 uint8 *s = (uint8 *) buf;
390 uint8 *d = external_common_state->spd_product_description;
391 ssize_t ret = strnlen(buf, PAGE_SIZE);
392 ret = (ret > 16) ? 16 : ret;
393
394 memset(external_common_state->spd_product_description, 0, 16);
395 while (*s) {
396 if (*s & 0x60 && *s ^ 0x7f) {
397 *d = *s;
398 } else {
399 /* stop copying if control character found */
400 break;
401 }
402
403 if (++s > (uint8 *) (buf + ret))
404 break;
405
406 d++;
407 }
408
409 DEV_DBG("%s: '%s'\n", __func__,
410 external_common_state->spd_product_description);
411
412 return ret;
413}
414
415static ssize_t hdmi_common_rda_product_description(struct device *dev,
416 struct device_attribute *attr, char *buf)
417{
418 ssize_t ret = snprintf(buf, PAGE_SIZE, "%s\n",
419 external_common_state->spd_product_description);
420 DEV_DBG("%s: '%s'\n", __func__,
421 external_common_state->spd_product_description);
422
423 return ret;
424}
425
Aravind Venkateswaran5479cc12012-03-16 15:40:40 -0700426static ssize_t hdmi_common_rda_edid_3d_modes(struct device *dev,
427 struct device_attribute *attr, char *buf)
428{
429 ssize_t ret = 0;
430 int i;
431 char buff_3d[128];
432
433 buf[0] = 0;
434 if (external_common_state->disp_mode_list.num_of_elements) {
435 uint32 *video_mode = external_common_state->disp_mode_list
436 .disp_mode_list;
437 uint32 *video_3d_mode = external_common_state->disp_mode_list
438 .disp_3d_mode_list;
439 for (i = 0; i < external_common_state->disp_mode_list
440 .num_of_elements; ++i) {
441 video_3d_format_2string(*video_3d_mode++, buff_3d);
442 if (ret > 0)
443 ret += snprintf(buf+ret, PAGE_SIZE-ret,
444 ",%d=%s",
445 *video_mode++ + 1, buff_3d);
446 else
447 ret += snprintf(buf+ret, PAGE_SIZE-ret,
448 "%d=%s",
449 *video_mode++ + 1, buff_3d);
450 }
451 } else
452 ret += snprintf(buf+ret, PAGE_SIZE-ret, "%d",
453 external_common_state->video_resolution+1);
454
455 DEV_DBG("%s: '%s'\n", __func__, buf);
456 ret += snprintf(buf+ret, PAGE_SIZE-ret, "\n");
457 return ret;
458}
459
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700460static ssize_t hdmi_common_rda_hdcp(struct device *dev,
461 struct device_attribute *attr, char *buf)
462{
463 ssize_t ret = snprintf(buf, PAGE_SIZE, "%d\n",
464 external_common_state->hdcp_active);
465 DEV_DBG("%s: '%d'\n", __func__,
466 external_common_state->hdcp_active);
467 return ret;
468}
469
470static ssize_t hdmi_common_rda_hpd(struct device *dev,
471 struct device_attribute *attr, char *buf)
472{
473 ssize_t ret;
474 if (external_common_state->hpd_feature) {
475 ret = snprintf(buf, PAGE_SIZE, "%d\n",
476 external_common_state->hpd_feature_on);
477 DEV_DBG("%s: '%d'\n", __func__,
478 external_common_state->hpd_feature_on);
479 } else {
480 ret = snprintf(buf, PAGE_SIZE, "-1\n");
481 DEV_DBG("%s: 'not supported'\n", __func__);
482 }
483 return ret;
484}
485
486static ssize_t hdmi_common_wta_hpd(struct device *dev,
487 struct device_attribute *attr, const char *buf, size_t count)
488{
489 ssize_t ret = strnlen(buf, PAGE_SIZE);
Ravishangar Kalyanam0bb7fe92011-10-27 16:06:30 -0700490 int hpd;
491 if (hdmi_prim_display)
492 hpd = 1;
493 else
494 hpd = atoi(buf);
495
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700496 if (external_common_state->hpd_feature) {
497 if (hpd == 0 && external_common_state->hpd_feature_on) {
498 external_common_state->hpd_feature(0);
499 external_common_state->hpd_feature_on = 0;
500 DEV_DBG("%s: '%d'\n", __func__,
501 external_common_state->hpd_feature_on);
502 } else if (hpd == 1 && !external_common_state->hpd_feature_on) {
503 external_common_state->hpd_feature(1);
504 external_common_state->hpd_feature_on = 1;
505 DEV_DBG("%s: '%d'\n", __func__,
506 external_common_state->hpd_feature_on);
507 } else {
508 DEV_DBG("%s: '%d' (unchanged)\n", __func__,
509 external_common_state->hpd_feature_on);
510 }
511 } else {
512 DEV_DBG("%s: 'not supported'\n", __func__);
513 }
514
515 return ret;
516}
517
Manoj Raoa2c27672011-08-30 17:19:39 -0700518#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT
519/*
520 * This interface for CEC feature is defined to suit
521 * the current requirements. However, the actual functionality is
522 * added to accommodate different interfaces
523 */
524static ssize_t hdmi_msm_rda_cec(struct device *dev,
525 struct device_attribute *attr, char *buf)
526{
527 /* 0x028C CEC_CTRL */
528 ssize_t ret = snprintf(buf, PAGE_SIZE, "%d\n",
529 (HDMI_INP(0x028C) & BIT(0)));
530 return ret;
531}
532
533static ssize_t hdmi_msm_wta_cec(struct device *dev,
534 struct device_attribute *attr, const char *buf, size_t count)
535{
536 ssize_t ret = strnlen(buf, PAGE_SIZE);
537 int cec = atoi(buf);
538
539 if (cec != 0) {
540 mutex_lock(&hdmi_msm_state_mutex);
541 hdmi_msm_state->cec_enabled = true;
542 hdmi_msm_state->cec_logical_addr = 4;
Ajay Singh Parmar60b26062012-03-15 14:40:11 +0530543
544 /* flush CEC queue */
545 hdmi_msm_state->cec_queue_wr = hdmi_msm_state->cec_queue_start;
546 hdmi_msm_state->cec_queue_rd = hdmi_msm_state->cec_queue_start;
547 hdmi_msm_state->cec_queue_full = false;
548 memset(hdmi_msm_state->cec_queue_rd, 0,
549 sizeof(struct hdmi_msm_cec_msg)*CEC_QUEUE_SIZE);
550
Manoj Raoa2c27672011-08-30 17:19:39 -0700551 mutex_unlock(&hdmi_msm_state_mutex);
552 hdmi_msm_cec_init();
553 hdmi_msm_cec_write_logical_addr(
554 hdmi_msm_state->cec_logical_addr);
555 DEV_DBG("CEC enabled\n");
556 } else {
557 mutex_lock(&hdmi_msm_state_mutex);
558 hdmi_msm_state->cec_enabled = false;
559 hdmi_msm_state->cec_logical_addr = 15;
560 mutex_unlock(&hdmi_msm_state_mutex);
561 hdmi_msm_cec_write_logical_addr(
562 hdmi_msm_state->cec_logical_addr);
563 /* 0x028C CEC_CTRL */
564 HDMI_OUTP(0x028C, 0);
565 DEV_DBG("CEC disabled\n");
566 }
567 return ret;
568}
569
570static ssize_t hdmi_msm_rda_cec_logical_addr(struct device *dev,
571 struct device_attribute *attr, char *buf)
572{
573 ssize_t ret;
574
575 mutex_lock(&hdmi_msm_state_mutex);
576 ret = snprintf(buf, PAGE_SIZE, "%d\n",
577 hdmi_msm_state->cec_logical_addr);
578 mutex_unlock(&hdmi_msm_state_mutex);
579 return ret;
580}
581
582static ssize_t hdmi_msm_wta_cec_logical_addr(struct device *dev,
583 struct device_attribute *attr, const char *buf, size_t count)
584{
585
Manoj Rao0f0ab642011-11-01 12:28:24 -0700586#ifdef DRVR_ONLY_CECT_NO_DAEMON
Manoj Raoa2c27672011-08-30 17:19:39 -0700587 /*
588 * Only for testing
589 */
590 hdmi_msm_cec_one_touch_play();
591 return 0;
592#else
593 ssize_t ret = strnlen(buf, PAGE_SIZE);
594 int logical_addr = atoi(buf);
595
596 if (logical_addr < 0 || logical_addr > 15)
597 return -EINVAL;
598
599 mutex_lock(&hdmi_msm_state_mutex);
600 hdmi_msm_state->cec_logical_addr = logical_addr;
601 mutex_unlock(&hdmi_msm_state_mutex);
602
603 hdmi_msm_cec_write_logical_addr(logical_addr);
604
605 return ret;
606#endif
607}
608
609static ssize_t hdmi_msm_rda_cec_frame(struct device *dev,
610 struct device_attribute *attr, char *buf)
611{
612 mutex_lock(&hdmi_msm_state_mutex);
613 if (hdmi_msm_state->cec_queue_rd == hdmi_msm_state->cec_queue_wr
614 && !hdmi_msm_state->cec_queue_full) {
615 mutex_unlock(&hdmi_msm_state_mutex);
616 DEV_ERR("CEC message queue is empty\n");
617 return -EBUSY;
618 }
619 memcpy(buf, hdmi_msm_state->cec_queue_rd++,
620 sizeof(struct hdmi_msm_cec_msg));
621 hdmi_msm_state->cec_queue_full = false;
622 if (hdmi_msm_state->cec_queue_rd == CEC_QUEUE_END)
623 hdmi_msm_state->cec_queue_rd = hdmi_msm_state->cec_queue_start;
624 mutex_unlock(&hdmi_msm_state_mutex);
625
626 return sizeof(struct hdmi_msm_cec_msg);
627}
628
629static ssize_t hdmi_msm_wta_cec_frame(struct device *dev,
630 struct device_attribute *attr, const char *buf, size_t count)
631{
Manoj Rao15735992012-01-26 17:15:09 -0800632 int i;
Manoj Raoa2c27672011-08-30 17:19:39 -0700633 int retry = ((struct hdmi_msm_cec_msg *) buf)->retransmit;
634
Manoj Rao15735992012-01-26 17:15:09 -0800635 for (i = 0; i < RETRANSMIT_MAX_NUM; i++) {
Manoj Raoa2c27672011-08-30 17:19:39 -0700636 hdmi_msm_cec_msg_send((struct hdmi_msm_cec_msg *) buf);
637 if (hdmi_msm_state->cec_frame_wr_status
Manoj Rao15735992012-01-26 17:15:09 -0800638 & CEC_STATUS_WR_ERROR && retry--) {
639 mutex_lock(&hdmi_msm_state_mutex);
640 if (hdmi_msm_state->fsm_reset_done)
641 retry++;
642 mutex_unlock(&hdmi_msm_state_mutex);
Ajay Singh Parmaraabbf2b2012-03-07 10:50:19 +0530643 msleep(20);
Manoj Rao15735992012-01-26 17:15:09 -0800644 } else
Manoj Raoa2c27672011-08-30 17:19:39 -0700645 break;
646 }
647
648 if (hdmi_msm_state->cec_frame_wr_status & CEC_STATUS_WR_DONE)
649 return sizeof(struct hdmi_msm_cec_msg);
650 else
651 return -EINVAL;
652}
653#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT */
654
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700655static ssize_t hdmi_common_rda_3d_present(struct device *dev,
656 struct device_attribute *attr, char *buf)
657{
658 ssize_t ret = snprintf(buf, PAGE_SIZE, "%d\n",
659 external_common_state->present_3d);
660 DEV_DBG("%s: '%d'\n", __func__,
661 external_common_state->present_3d);
662 return ret;
663}
664
665static ssize_t hdmi_common_rda_hdcp_present(struct device *dev,
666 struct device_attribute *attr, char *buf)
667{
668 ssize_t ret = snprintf(buf, PAGE_SIZE, "%d\n",
669 external_common_state->present_hdcp);
670 DEV_DBG("%s: '%d'\n", __func__,
671 external_common_state->present_hdcp);
672 return ret;
673}
674#endif
675
676#ifdef CONFIG_FB_MSM_HDMI_3D
677static ssize_t hdmi_3d_rda_format_3d(struct device *dev,
678 struct device_attribute *attr, char *buf)
679{
680 ssize_t ret = snprintf(buf, PAGE_SIZE, "%d\n",
681 external_common_state->format_3d);
682 DEV_DBG("%s: '%d'\n", __func__,
683 external_common_state->format_3d);
684 return ret;
685}
686
687static ssize_t hdmi_3d_wta_format_3d(struct device *dev,
688 struct device_attribute *attr, const char *buf, size_t count)
689{
690 ssize_t ret = strnlen(buf, PAGE_SIZE);
691 int format_3d = atoi(buf);
692
693 if (format_3d >= 0 && format_3d <= 2) {
694 if (format_3d != external_common_state->format_3d) {
695 external_common_state->format_3d = format_3d;
696 if (external_common_state->switch_3d)
697 external_common_state->switch_3d(format_3d);
698 DEV_DBG("%s: '%d'\n", __func__,
699 external_common_state->format_3d);
700 } else {
701 DEV_DBG("%s: '%d' (unchanged)\n", __func__,
702 external_common_state->format_3d);
703 }
704 } else {
705 DEV_DBG("%s: '%d' (unknown)\n", __func__, format_3d);
706 }
707
708 return ret;
709}
710#endif
711
Manoj Raoa2c27672011-08-30 17:19:39 -0700712#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT
713static DEVICE_ATTR(cec, S_IRUGO | S_IWUSR,
714 hdmi_msm_rda_cec,
715 hdmi_msm_wta_cec);
716
717static DEVICE_ATTR(cec_logical_addr, S_IRUGO | S_IWUSR,
718 hdmi_msm_rda_cec_logical_addr,
719 hdmi_msm_wta_cec_logical_addr);
720
721static DEVICE_ATTR(cec_rd_frame, S_IRUGO,
722 hdmi_msm_rda_cec_frame, NULL);
723
724static DEVICE_ATTR(cec_wr_frame, S_IWUSR,
725 NULL, hdmi_msm_wta_cec_frame);
726#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT */
727
728
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700729static ssize_t external_common_rda_video_mode(struct device *dev,
730 struct device_attribute *attr, char *buf)
731{
732 ssize_t ret = snprintf(buf, PAGE_SIZE, "%d\n",
733 external_common_state->video_resolution+1);
734 DEV_DBG("%s: '%d'\n", __func__,
735 external_common_state->video_resolution+1);
736 return ret;
737}
738
739static ssize_t external_common_wta_video_mode(struct device *dev,
740 struct device_attribute *attr, const char *buf, size_t count)
741{
742 ssize_t ret = strnlen(buf, PAGE_SIZE);
743 uint32 video_mode;
744#ifdef CONFIG_FB_MSM_HDMI_COMMON
745 const struct hdmi_disp_mode_timing_type *disp_mode;
746#endif
747 mutex_lock(&external_common_state_hpd_mutex);
748 if (!external_common_state->hpd_state) {
749 mutex_unlock(&external_common_state_hpd_mutex);
750 DEV_INFO("%s: FAILED: display off or cable disconnected\n",
751 __func__);
752 return ret;
753 }
754 mutex_unlock(&external_common_state_hpd_mutex);
755
756 video_mode = atoi(buf)-1;
Eugene Yasmand0de5f92011-12-20 13:57:28 +0200757 DEV_INFO("%s: video_mode is %d\n", __func__, video_mode);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700758 kobject_uevent(external_common_state->uevent_kobj, KOBJ_OFFLINE);
759#ifdef CONFIG_FB_MSM_HDMI_COMMON
760 disp_mode = hdmi_common_get_supported_mode(video_mode);
761 if (!disp_mode) {
762 DEV_INFO("%s: FAILED: mode not supported (%d)\n",
763 __func__, video_mode);
764 return ret;
765 }
766 external_common_state->disp_mode_list.num_of_elements = 1;
767 external_common_state->disp_mode_list.disp_mode_list[0] = video_mode;
768#elif defined(CONFIG_FB_MSM_TVOUT)
769 external_common_state->video_resolution = video_mode;
770#endif
771 DEV_DBG("%s: 'mode=%d %s' successful (sending OFF/ONLINE)\n", __func__,
772 video_mode, video_format_2string(video_mode));
773 kobject_uevent(external_common_state->uevent_kobj, KOBJ_ONLINE);
774 return ret;
775}
776
777static ssize_t external_common_rda_connected(struct device *dev,
778 struct device_attribute *attr, char *buf)
779{
780 ssize_t ret;
781 mutex_lock(&external_common_state_hpd_mutex);
782 ret = snprintf(buf, PAGE_SIZE, "%d\n",
783 external_common_state->hpd_state);
784 DEV_DBG("%s: '%d'\n", __func__,
785 external_common_state->hpd_state);
786 mutex_unlock(&external_common_state_hpd_mutex);
787 return ret;
788}
789
Ajay Singh Parmardb7007f2011-12-14 02:17:58 +0530790static ssize_t external_common_rda_hdmi_mode(struct device *dev,
791 struct device_attribute *attr, char *buf)
792{
793 ssize_t ret;
794
795 ret = snprintf(buf, PAGE_SIZE, "%d\n",
796 external_common_state->hdmi_sink);
797
798 DEV_DBG("%s: '%d'\n", __func__,
799 external_common_state->hdmi_sink);
800
801 return ret;
802}
803
Ravishangar Kalyanam0bb7fe92011-10-27 16:06:30 -0700804static ssize_t hdmi_common_rda_hdmi_primary(struct device *dev,
805 struct device_attribute *attr, char *buf)
806{
807 ssize_t ret = snprintf(buf, PAGE_SIZE, "%d\n",
808 hdmi_prim_display);
809 DEV_DBG("%s: '%d'\n", __func__, hdmi_prim_display);
810 return ret;
811}
Ajay Singh Parmardb7007f2011-12-14 02:17:58 +0530812
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700813static DEVICE_ATTR(video_mode, S_IRUGO | S_IWUGO,
814 external_common_rda_video_mode, external_common_wta_video_mode);
815static DEVICE_ATTR(video_mode_str, S_IRUGO, external_common_rda_video_mode_str,
816 NULL);
817static DEVICE_ATTR(connected, S_IRUGO, external_common_rda_connected, NULL);
Ajay Singh Parmardb7007f2011-12-14 02:17:58 +0530818static DEVICE_ATTR(hdmi_mode, S_IRUGO, external_common_rda_hdmi_mode, NULL);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700819#ifdef CONFIG_FB_MSM_HDMI_COMMON
820static DEVICE_ATTR(edid_modes, S_IRUGO, hdmi_common_rda_edid_modes, NULL);
821static DEVICE_ATTR(hpd, S_IRUGO | S_IWUGO, hdmi_common_rda_hpd,
822 hdmi_common_wta_hpd);
823static DEVICE_ATTR(hdcp, S_IRUGO, hdmi_common_rda_hdcp, NULL);
Aravind Venkateswaran226b4292012-03-16 15:35:31 -0700824static DEVICE_ATTR(pa, S_IRUGO,
825 hdmi_common_rda_edid_physical_address, NULL);
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -0700826static DEVICE_ATTR(scan_info, S_IRUGO,
827 hdmi_common_rda_edid_scan_info, NULL);
Aravind Venkateswaranfff7a7d2012-03-16 15:27:19 -0700828static DEVICE_ATTR(vendor_name, S_IRUGO | S_IWUSR, hdmi_common_rda_vendor_name,
829 hdmi_common_wta_vendor_name);
830static DEVICE_ATTR(product_description, S_IRUGO | S_IWUSR,
831 hdmi_common_rda_product_description,
832 hdmi_common_wta_product_description);
Aravind Venkateswaran5479cc12012-03-16 15:40:40 -0700833static DEVICE_ATTR(edid_3d_modes, S_IRUGO,
834 hdmi_common_rda_edid_3d_modes, NULL);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700835static DEVICE_ATTR(3d_present, S_IRUGO, hdmi_common_rda_3d_present, NULL);
836static DEVICE_ATTR(hdcp_present, S_IRUGO, hdmi_common_rda_hdcp_present, NULL);
837#endif
838#ifdef CONFIG_FB_MSM_HDMI_3D
839static DEVICE_ATTR(format_3d, S_IRUGO | S_IWUGO, hdmi_3d_rda_format_3d,
840 hdmi_3d_wta_format_3d);
841#endif
Ravishangar Kalyanam0bb7fe92011-10-27 16:06:30 -0700842static DEVICE_ATTR(hdmi_primary, S_IRUGO, hdmi_common_rda_hdmi_primary, NULL);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700843
844static struct attribute *external_common_fs_attrs[] = {
845 &dev_attr_video_mode.attr,
846 &dev_attr_video_mode_str.attr,
847 &dev_attr_connected.attr,
Ajay Singh Parmardb7007f2011-12-14 02:17:58 +0530848 &dev_attr_hdmi_mode.attr,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700849#ifdef CONFIG_FB_MSM_HDMI_COMMON
850 &dev_attr_edid_modes.attr,
851 &dev_attr_hdcp.attr,
852 &dev_attr_hpd.attr,
Aravind Venkateswaran226b4292012-03-16 15:35:31 -0700853 &dev_attr_pa.attr,
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -0700854 &dev_attr_scan_info.attr,
Aravind Venkateswaranfff7a7d2012-03-16 15:27:19 -0700855 &dev_attr_vendor_name.attr,
856 &dev_attr_product_description.attr,
Aravind Venkateswaran5479cc12012-03-16 15:40:40 -0700857 &dev_attr_edid_3d_modes.attr,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700858 &dev_attr_3d_present.attr,
859 &dev_attr_hdcp_present.attr,
860#endif
861#ifdef CONFIG_FB_MSM_HDMI_3D
862 &dev_attr_format_3d.attr,
863#endif
Manoj Raoa2c27672011-08-30 17:19:39 -0700864#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT
865 &dev_attr_cec.attr,
866 &dev_attr_cec_logical_addr.attr,
867 &dev_attr_cec_rd_frame.attr,
868 &dev_attr_cec_wr_frame.attr,
869#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT */
Ravishangar Kalyanam0bb7fe92011-10-27 16:06:30 -0700870 &dev_attr_hdmi_primary.attr,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700871 NULL,
872};
873static struct attribute_group external_common_fs_attr_group = {
874 .attrs = external_common_fs_attrs,
875};
876
877/* create external interface kobject and initialize */
878int external_common_state_create(struct platform_device *pdev)
879{
880 int rc;
881 struct msm_fb_data_type *mfd = platform_get_drvdata(pdev);
882 if (!mfd) {
883 DEV_ERR("%s: mfd not found\n", __func__);
884 return -ENODEV;
885 }
886 if (!mfd->fbi) {
887 DEV_ERR("%s: mfd->fbi not found\n", __func__);
888 return -ENODEV;
889 }
890 if (!mfd->fbi->dev) {
891 DEV_ERR("%s: mfd->fbi->dev not found\n", __func__);
892 return -ENODEV;
893 }
894 rc = sysfs_create_group(&mfd->fbi->dev->kobj,
895 &external_common_fs_attr_group);
896 if (rc) {
897 DEV_ERR("%s: sysfs group creation failed, rc=%d\n", __func__,
898 rc);
899 return rc;
900 }
901 external_common_state->uevent_kobj = &mfd->fbi->dev->kobj;
902 DEV_ERR("%s: sysfs group %p\n", __func__,
903 external_common_state->uevent_kobj);
904
905 kobject_uevent(external_common_state->uevent_kobj, KOBJ_ADD);
906 DEV_DBG("%s: kobject_uevent(KOBJ_ADD)\n", __func__);
907 return 0;
908}
909EXPORT_SYMBOL(external_common_state_create);
910
911void external_common_state_remove(void)
912{
913 if (external_common_state->uevent_kobj)
914 sysfs_remove_group(external_common_state->uevent_kobj,
915 &external_common_fs_attr_group);
916 external_common_state->uevent_kobj = NULL;
917}
918EXPORT_SYMBOL(external_common_state_remove);
919
920#ifdef CONFIG_FB_MSM_HDMI_COMMON
921/* The Logic ID for HDMI TX Core. Currently only support 1 HDMI TX Core. */
922struct hdmi_edid_video_mode_property_type {
923 uint32 video_code;
924 uint32 active_h;
925 uint32 active_v;
926 boolean interlaced;
927 uint32 total_h;
928 uint32 total_blank_h;
929 uint32 total_v;
930 uint32 total_blank_v;
931 /* Must divide by 1000 to get the frequency */
932 uint32 freq_h;
933 /* Must divide by 1000 to get the frequency */
934 uint32 freq_v;
935 /* Must divide by 1000 to get the frequency */
936 uint32 pixel_freq;
937 /* Must divide by 1000 to get the frequency */
938 uint32 refresh_rate;
939 boolean aspect_ratio_4_3;
940};
941
942/* LUT is sorted from lowest Active H to highest Active H - ease searching */
943static struct hdmi_edid_video_mode_property_type
944 hdmi_edid_disp_mode_lut[] = {
945
946 /* All 640 H Active */
947 {HDMI_VFRMT_640x480p60_4_3, 640, 480, FALSE, 800, 160, 525, 45,
948 31465, 59940, 25175, 59940, TRUE},
949 {HDMI_VFRMT_640x480p60_4_3, 640, 480, FALSE, 800, 160, 525, 45,
950 31500, 60000, 25200, 60000, TRUE},
951
952 /* All 720 H Active */
953 {HDMI_VFRMT_720x576p50_4_3, 720, 576, FALSE, 864, 144, 625, 49,
954 31250, 50000, 27000, 50000, TRUE},
955 {HDMI_VFRMT_720x480p60_4_3, 720, 480, FALSE, 858, 138, 525, 45,
956 31465, 59940, 27000, 59940, TRUE},
957 {HDMI_VFRMT_720x480p60_4_3, 720, 480, FALSE, 858, 138, 525, 45,
958 31500, 60000, 27030, 60000, TRUE},
959 {HDMI_VFRMT_720x576p100_4_3, 720, 576, FALSE, 864, 144, 625, 49,
960 62500, 100000, 54000, 100000, TRUE},
961 {HDMI_VFRMT_720x480p120_4_3, 720, 480, FALSE, 858, 138, 525, 45,
962 62937, 119880, 54000, 119880, TRUE},
963 {HDMI_VFRMT_720x480p120_4_3, 720, 480, FALSE, 858, 138, 525, 45,
964 63000, 120000, 54054, 120000, TRUE},
965 {HDMI_VFRMT_720x576p200_4_3, 720, 576, FALSE, 864, 144, 625, 49,
966 125000, 200000, 108000, 200000, TRUE},
967 {HDMI_VFRMT_720x480p240_4_3, 720, 480, FALSE, 858, 138, 525, 45,
968 125874, 239760, 108000, 239000, TRUE},
969 {HDMI_VFRMT_720x480p240_4_3, 720, 480, FALSE, 858, 138, 525, 45,
970 126000, 240000, 108108, 240000, TRUE},
971
972 /* All 1280 H Active */
973 {HDMI_VFRMT_1280x720p50_16_9, 1280, 720, FALSE, 1980, 700, 750, 30,
974 37500, 50000, 74250, 50000, FALSE},
975 {HDMI_VFRMT_1280x720p60_16_9, 1280, 720, FALSE, 1650, 370, 750, 30,
976 44955, 59940, 74176, 59940, FALSE},
977 {HDMI_VFRMT_1280x720p60_16_9, 1280, 720, FALSE, 1650, 370, 750, 30,
978 45000, 60000, 74250, 60000, FALSE},
979 {HDMI_VFRMT_1280x720p100_16_9, 1280, 720, FALSE, 1980, 700, 750, 30,
980 75000, 100000, 148500, 100000, FALSE},
981 {HDMI_VFRMT_1280x720p120_16_9, 1280, 720, FALSE, 1650, 370, 750, 30,
982 89909, 119880, 148352, 119880, FALSE},
983 {HDMI_VFRMT_1280x720p120_16_9, 1280, 720, FALSE, 1650, 370, 750, 30,
984 90000, 120000, 148500, 120000, FALSE},
985
986 /* All 1440 H Active */
987 {HDMI_VFRMT_1440x576i50_4_3, 1440, 576, TRUE, 1728, 288, 625, 24,
988 15625, 50000, 27000, 50000, TRUE},
989 {HDMI_VFRMT_720x288p50_4_3, 1440, 288, FALSE, 1728, 288, 312, 24,
990 15625, 50080, 27000, 50000, TRUE},
991 {HDMI_VFRMT_720x288p50_4_3, 1440, 288, FALSE, 1728, 288, 313, 25,
992 15625, 49920, 27000, 50000, TRUE},
993 {HDMI_VFRMT_720x288p50_4_3, 1440, 288, FALSE, 1728, 288, 314, 26,
994 15625, 49761, 27000, 50000, TRUE},
995 {HDMI_VFRMT_1440x576p50_4_3, 1440, 576, FALSE, 1728, 288, 625, 49,
996 31250, 50000, 54000, 50000, TRUE},
997 {HDMI_VFRMT_1440x480i60_4_3, 1440, 480, TRUE, 1716, 276, 525, 22,
998 15734, 59940, 27000, 59940, TRUE},
999 {HDMI_VFRMT_1440x240p60_4_3, 1440, 240, FALSE, 1716, 276, 262, 22,
1000 15734, 60054, 27000, 59940, TRUE},
1001 {HDMI_VFRMT_1440x240p60_4_3, 1440, 240, FALSE, 1716, 276, 263, 23,
1002 15734, 59826, 27000, 59940, TRUE},
1003 {HDMI_VFRMT_1440x480p60_4_3, 1440, 480, FALSE, 1716, 276, 525, 45,
1004 31469, 59940, 54000, 59940, TRUE},
1005 {HDMI_VFRMT_1440x480i60_4_3, 1440, 480, TRUE, 1716, 276, 525, 22,
1006 15750, 60000, 27027, 60000, TRUE},
1007 {HDMI_VFRMT_1440x240p60_4_3, 1440, 240, FALSE, 1716, 276, 262, 22,
1008 15750, 60115, 27027, 60000, TRUE},
1009 {HDMI_VFRMT_1440x240p60_4_3, 1440, 240, FALSE, 1716, 276, 263, 23,
1010 15750, 59886, 27027, 60000, TRUE},
1011 {HDMI_VFRMT_1440x480p60_4_3, 1440, 480, FALSE, 1716, 276, 525, 45,
1012 31500, 60000, 54054, 60000, TRUE},
1013 {HDMI_VFRMT_1440x576i100_4_3, 1440, 576, TRUE, 1728, 288, 625, 24,
1014 31250, 100000, 54000, 100000, TRUE},
1015 {HDMI_VFRMT_1440x480i120_4_3, 1440, 480, TRUE, 1716, 276, 525, 22,
1016 31469, 119880, 54000, 119880, TRUE},
1017 {HDMI_VFRMT_1440x480i120_4_3, 1440, 480, TRUE, 1716, 276, 525, 22,
1018 31500, 120000, 54054, 120000, TRUE},
1019 {HDMI_VFRMT_1440x576i200_4_3, 1440, 576, TRUE, 1728, 288, 625, 24,
1020 62500, 200000, 108000, 200000, TRUE},
1021 {HDMI_VFRMT_1440x480i240_4_3, 1440, 480, TRUE, 1716, 276, 525, 22,
1022 62937, 239760, 108000, 239000, TRUE},
1023 {HDMI_VFRMT_1440x480i240_4_3, 1440, 480, TRUE, 1716, 276, 525, 22,
1024 63000, 240000, 108108, 240000, TRUE},
1025
1026 /* All 1920 H Active */
1027 {HDMI_VFRMT_1920x1080p60_16_9, 1920, 1080, FALSE, 2200, 280, 1125,
1028 45, 67433, 59940, 148352, 59940, FALSE},
1029 {HDMI_VFRMT_1920x1080p60_16_9, 1920, 1080, TRUE, 2200, 280, 1125,
1030 45, 67500, 60000, 148500, 60000, FALSE},
1031 {HDMI_VFRMT_1920x1080p50_16_9, 1920, 1080, FALSE, 2640, 720, 1125,
1032 45, 56250, 50000, 148500, 50000, FALSE},
1033 {HDMI_VFRMT_1920x1080p24_16_9, 1920, 1080, FALSE, 2750, 830, 1125,
1034 45, 26973, 23976, 74176, 24000, FALSE},
1035 {HDMI_VFRMT_1920x1080p24_16_9, 1920, 1080, FALSE, 2750, 830, 1125,
1036 45, 27000, 24000, 74250, 24000, FALSE},
1037 {HDMI_VFRMT_1920x1080p25_16_9, 1920, 1080, FALSE, 2640, 720, 1125,
1038 45, 28125, 25000, 74250, 25000, FALSE},
1039 {HDMI_VFRMT_1920x1080p30_16_9, 1920, 1080, FALSE, 2200, 280, 1125,
1040 45, 33716, 29970, 74176, 30000, FALSE},
1041 {HDMI_VFRMT_1920x1080p30_16_9, 1920, 1080, FALSE, 2200, 280, 1125,
1042 45, 33750, 30000, 74250, 30000, FALSE},
1043 {HDMI_VFRMT_1920x1080i50_16_9, 1920, 1080, TRUE, 2304, 384, 1250,
1044 85, 31250, 50000, 72000, 50000, FALSE},
1045 {HDMI_VFRMT_1920x1080i60_16_9, 1920, 1080, TRUE, 2200, 280, 1125,
1046 22, 33716, 59940, 74176, 59940, FALSE},
1047 {HDMI_VFRMT_1920x1080i60_16_9, 1920, 1080, TRUE, 2200, 280, 1125,
1048 22, 33750, 60000, 74250, 60000, FALSE},
1049 {HDMI_VFRMT_1920x1080i100_16_9, 1920, 1080, TRUE, 2640, 720, 1125,
1050 22, 56250, 100000, 148500, 100000, FALSE},
1051 {HDMI_VFRMT_1920x1080i120_16_9, 1920, 1080, TRUE, 2200, 280, 1125,
1052 22, 67432, 119880, 148352, 119980, FALSE},
1053 {HDMI_VFRMT_1920x1080i120_16_9, 1920, 1080, TRUE, 2200, 280, 1125,
1054 22, 67500, 120000, 148500, 120000, FALSE},
1055
1056 /* All 2880 H Active */
1057 {HDMI_VFRMT_2880x576i50_4_3, 2880, 576, TRUE, 3456, 576, 625, 24,
1058 15625, 50000, 54000, 50000, TRUE},
1059 {HDMI_VFRMT_2880x288p50_4_3, 2880, 576, FALSE, 3456, 576, 312, 24,
1060 15625, 50080, 54000, 50000, TRUE},
1061 {HDMI_VFRMT_2880x288p50_4_3, 2880, 576, FALSE, 3456, 576, 313, 25,
1062 15625, 49920, 54000, 50000, TRUE},
1063 {HDMI_VFRMT_2880x288p50_4_3, 2880, 576, FALSE, 3456, 576, 314, 26,
1064 15625, 49761, 54000, 50000, TRUE},
1065 {HDMI_VFRMT_2880x576p50_4_3, 2880, 576, FALSE, 3456, 576, 625, 49,
1066 31250, 50000, 108000, 50000, TRUE},
1067 {HDMI_VFRMT_2880x480i60_4_3, 2880, 480, TRUE, 3432, 552, 525, 22,
1068 15734, 59940, 54000, 59940, TRUE},
1069 {HDMI_VFRMT_2880x240p60_4_3, 2880, 480, FALSE, 3432, 552, 262, 22,
1070 15734, 60054, 54000, 59940, TRUE},
1071 {HDMI_VFRMT_2880x240p60_4_3, 2880, 480, FALSE, 3432, 552, 263, 23,
1072 15734, 59940, 54000, 59940, TRUE},
1073 {HDMI_VFRMT_2880x480p60_4_3, 2880, 480, FALSE, 3432, 552, 525, 45,
1074 31469, 59940, 108000, 59940, TRUE},
1075 {HDMI_VFRMT_2880x480i60_4_3, 2880, 480, TRUE, 3432, 552, 525, 22,
1076 15750, 60000, 54054, 60000, TRUE},
1077 {HDMI_VFRMT_2880x240p60_4_3, 2880, 240, FALSE, 3432, 552, 262, 22,
1078 15750, 60115, 54054, 60000, TRUE},
1079 {HDMI_VFRMT_2880x240p60_4_3, 2880, 240, FALSE, 3432, 552, 262, 23,
1080 15750, 59886, 54054, 60000, TRUE},
1081 {HDMI_VFRMT_2880x480p60_4_3, 2880, 480, FALSE, 3432, 552, 525, 45,
1082 31500, 60000, 108108, 60000, TRUE},
1083};
1084
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001085static const uint8 *hdmi_edid_find_block(const uint8 *in_buf,
1086 uint32 start_offset, uint8 type, uint8 *len)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001087{
1088 /* the start of data block collection, start of Video Data Block */
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001089 uint32 offset = start_offset;
1090 uint32 end_dbc_offset = in_buf[2];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001091
1092 *len = 0;
Ajay Singh Parmar3b9595f2012-02-08 16:36:03 +05301093
1094 /*edid buffer 1, byte 2 being 4 means no non-DTD/Data block collection
1095 present.
1096 edid buffer 1, byte 2 being 0 menas no non-DTD/DATA block collection
1097 present and no DTD data present.*/
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001098 if ((end_dbc_offset == 0) || (end_dbc_offset == 4)) {
Ajay Singh Parmar3b9595f2012-02-08 16:36:03 +05301099 DEV_WARN("EDID: no DTD or non-DTD data present\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001100 return NULL;
1101 }
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001102 while (offset < end_dbc_offset) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001103 uint8 block_len = in_buf[offset] & 0x1F;
1104 if ((in_buf[offset] >> 5) == type) {
1105 *len = block_len;
1106 DEV_DBG("EDID: block=%d found @ %d with length=%d\n",
1107 type, offset, block_len);
1108 return in_buf+offset;
1109 }
1110 offset += 1 + block_len;
1111 }
Manoj Rao668d6d52011-08-16 19:12:31 -07001112 DEV_WARN("EDID: type=%d block not found in EDID block\n", type);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001113 return NULL;
1114}
1115
1116static void hdmi_edid_extract_vendor_id(const uint8 *in_buf,
1117 char *vendor_id)
1118{
1119 uint32 id_codes = ((uint32)in_buf[8] << 8) + in_buf[9];
1120
1121 vendor_id[0] = 'A' - 1 + ((id_codes >> 10) & 0x1F);
1122 vendor_id[1] = 'A' - 1 + ((id_codes >> 5) & 0x1F);
1123 vendor_id[2] = 'A' - 1 + (id_codes & 0x1F);
1124 vendor_id[3] = 0;
1125}
1126
1127static uint32 hdmi_edid_extract_ieee_reg_id(const uint8 *in_buf)
1128{
1129 uint8 len;
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001130 const uint8 *vsd = hdmi_edid_find_block(in_buf, DBC_START_OFFSET, 3,
1131 &len);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001132
1133 if (vsd == NULL)
1134 return 0;
1135
1136 DEV_DBG("EDID: VSD PhyAddr=%04x, MaxTMDS=%dMHz\n",
Aravind Venkateswaran226b4292012-03-16 15:35:31 -07001137 ((uint32)vsd[4] << 8) + (uint32)vsd[5], (uint32)vsd[7] * 5);
1138 external_common_state->physical_address =
1139 ((uint16)vsd[4] << 8) + (uint16)vsd[5];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001140 return ((uint32)vsd[3] << 16) + ((uint32)vsd[2] << 8) + (uint32)vsd[1];
1141}
1142
Aravind Venkateswaran5479cc12012-03-16 15:40:40 -07001143#define HDMI_VSDB_3D_DATA_OFFSET(vsd) \
1144 (!((vsd)[8] & BIT(7)) ? 9 : (!((vsd)[8] & BIT(6)) ? 11 : 13))
1145
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001146static void hdmi_edid_extract_3d_present(const uint8 *in_buf)
1147{
1148 uint8 len, offset;
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001149 const uint8 *vsd = hdmi_edid_find_block(in_buf, DBC_START_OFFSET, 3,
1150 &len);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001151
1152 external_common_state->present_3d = 0;
1153 if (vsd == NULL || len < 9) {
1154 DEV_DBG("EDID[3D]: block-id 3 not found or not long enough\n");
1155 return;
1156 }
1157
Aravind Venkateswaran5479cc12012-03-16 15:40:40 -07001158 offset = HDMI_VSDB_3D_DATA_OFFSET(vsd);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001159 DEV_DBG("EDID: 3D present @ %d = %02x\n", offset, vsd[offset]);
1160 if (vsd[offset] >> 7) { /* 3D format indication present */
1161 DEV_INFO("EDID: 3D present, 3D-len=%d\n", vsd[offset+1] & 0x1F);
1162 external_common_state->present_3d = 1;
1163 }
1164}
1165
1166
1167static void hdmi_edid_extract_latency_fields(const uint8 *in_buf)
1168{
1169 uint8 len;
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001170 const uint8 *vsd = hdmi_edid_find_block(in_buf, DBC_START_OFFSET, 3,
1171 &len);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001172
1173 if (vsd == NULL || len < 12 || !(vsd[8] & BIT(7))) {
1174 external_common_state->video_latency = (uint16)-1;
1175 external_common_state->audio_latency = (uint16)-1;
1176 DEV_DBG("EDID: No audio/video latency present\n");
1177 } else {
1178 external_common_state->video_latency = vsd[9];
1179 external_common_state->audio_latency = vsd[10];
1180 DEV_DBG("EDID: video-latency=%04x, audio-latency=%04x\n",
1181 external_common_state->video_latency,
1182 external_common_state->audio_latency);
1183 }
1184}
1185
1186static void hdmi_edid_extract_speaker_allocation_data(const uint8 *in_buf)
1187{
1188 uint8 len;
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001189 const uint8 *sad = hdmi_edid_find_block(in_buf, DBC_START_OFFSET, 4,
1190 &len);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001191
1192 if (sad == NULL)
1193 return;
1194
1195 external_common_state->speaker_allocation_block = sad[1];
Kiran Kandi94f25dc2012-01-31 00:18:33 -08001196 DEV_DBG("EDID: speaker allocation data SP byte = %08x %s%s%s%s%s%s%s\n",
1197 sad[1],
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001198 (sad[1] & BIT(0)) ? "FL/FR," : "",
1199 (sad[1] & BIT(1)) ? "LFE," : "",
1200 (sad[1] & BIT(2)) ? "FC," : "",
1201 (sad[1] & BIT(3)) ? "RL/RR," : "",
1202 (sad[1] & BIT(4)) ? "RC," : "",
1203 (sad[1] & BIT(5)) ? "FLC/FRC," : "",
Kiran Kandi94f25dc2012-01-31 00:18:33 -08001204 (sad[1] & BIT(6)) ? "RLC/RRC," : "");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001205}
1206
1207static void hdmi_edid_extract_audio_data_blocks(const uint8 *in_buf)
1208{
1209 uint8 len;
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001210 const uint8 *sad = hdmi_edid_find_block(in_buf, DBC_START_OFFSET, 1,
1211 &len);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001212 uint32 *adb = external_common_state->audio_data_blocks;
1213
1214 if (sad == NULL)
1215 return;
1216
1217 external_common_state->audio_data_block_cnt = 0;
1218 while (len >= 3 && external_common_state->audio_data_block_cnt < 16) {
1219 DEV_DBG("EDID: Audio Data Block=<ch=%d, format=%d "
1220 "sampling=0x%02x bit-depth=0x%02x>\n",
1221 (sad[1] & 0x7)+1, sad[1] >> 3, sad[2], sad[3]);
1222 *adb++ = (uint32)sad[1] + ((uint32)sad[2] << 8)
1223 + ((uint32)sad[2] << 16);
1224 ++external_common_state->audio_data_block_cnt;
1225 len -= 3;
1226 sad += 3;
1227 }
1228}
1229
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001230static void hdmi_edid_extract_extended_data_blocks(const uint8 *in_buf)
1231{
1232 uint8 len = 0;
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001233 uint32 start_offset = DBC_START_OFFSET;
1234
1235 /* A Tage code of 7 identifies extended data blocks */
1236 uint8 const *etag = hdmi_edid_find_block(in_buf, start_offset, 7, &len);
1237
1238 while (etag != NULL) {
1239 /* The extended data block should at least be 2 bytes long */
1240 if (len < 2) {
1241 DEV_DBG("EDID: Found an extended data block of length"
1242 "less than 2 bytes. Ignoring ...\n");
1243 } else {
1244 /*
1245 * The second byte of the extended data block has the
1246 * extended tag code
1247 */
1248 switch (etag[1]) {
1249 case 0:
1250 /* Video Capability Data Block */
1251 DEV_DBG("EDID: VCDB=%02X %02X\n", etag[1],
1252 etag[2]);
1253
1254 /*
1255 * Check if the sink specifies underscan
1256 * support for:
1257 * BIT 5: preferred video format
1258 * BIT 3: IT video format
1259 * BIT 1: CE video format
1260 */
1261 external_common_state->pt_scan_info = (etag[2] &
1262 (BIT(4) | BIT(5))) >> 4;
1263 external_common_state->it_scan_info = (etag[2] &
1264 (BIT(3) | BIT(2))) >> 2;
1265 external_common_state->ce_scan_info = etag[2] &
1266 (BIT(1) | BIT(0));
1267 DEV_DBG("EDID: Scan Information (pt|it|ce): "
1268 "(%d|%d|%d)",
1269 external_common_state->pt_scan_info,
1270 external_common_state->it_scan_info,
1271 external_common_state->ce_scan_info);
1272 break;
1273 default:
1274 DEV_DBG("EDID: Extend Tag Code %d not"
1275 "supported\n", etag[1]);
1276 break;
1277 }
1278 }
1279
1280 /* There could be more that one extended data block */
Aravind Venkateswaran8b25b2a2012-04-12 14:19:12 -07001281 start_offset = etag - in_buf + len + 1;
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001282 etag = hdmi_edid_find_block(in_buf, start_offset, 7, &len);
1283 }
1284}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001285
1286static void hdmi_edid_detail_desc(const uint8 *data_buf, uint32 *disp_mode)
1287{
1288 boolean aspect_ratio_4_3 = FALSE;
1289 boolean interlaced = FALSE;
1290 uint32 active_h = 0;
1291 uint32 active_v = 0;
1292 uint32 blank_h = 0;
1293 uint32 blank_v = 0;
1294 uint32 ndx = 0;
1295 uint32 max_num_of_elements = 0;
1296 uint32 img_size_h = 0;
1297 uint32 img_size_v = 0;
1298
1299 /* See VESA Spec */
1300 /* EDID_TIMING_DESC_UPPER_H_NIBBLE[0x4]: Relative Offset to the EDID
1301 * detailed timing descriptors - Upper 4 bit for each H active/blank
1302 * field */
1303 /* EDID_TIMING_DESC_H_ACTIVE[0x2]: Relative Offset to the EDID detailed
1304 * timing descriptors - H active */
1305 active_h = ((((uint32)data_buf[0x4] >> 0x4) & 0xF) << 8)
1306 | data_buf[0x2];
1307
1308 /* EDID_TIMING_DESC_H_BLANK[0x3]: Relative Offset to the EDID detailed
1309 * timing descriptors - H blank */
1310 blank_h = (((uint32)data_buf[0x4] & 0xF) << 8)
1311 | data_buf[0x3];
1312
1313 /* EDID_TIMING_DESC_UPPER_V_NIBBLE[0x7]: Relative Offset to the EDID
1314 * detailed timing descriptors - Upper 4 bit for each V active/blank
1315 * field */
1316 /* EDID_TIMING_DESC_V_ACTIVE[0x5]: Relative Offset to the EDID detailed
1317 * timing descriptors - V active */
1318 active_v = ((((uint32)data_buf[0x7] >> 0x4) & 0xF) << 8)
1319 | data_buf[0x5];
1320
1321 /* EDID_TIMING_DESC_V_BLANK[0x6]: Relative Offset to the EDID detailed
1322 * timing descriptors - V blank */
1323 blank_v = (((uint32)data_buf[0x7] & 0xF) << 8)
1324 | data_buf[0x6];
1325
1326 /* EDID_TIMING_DESC_IMAGE_SIZE_UPPER_NIBBLE[0xE]: Relative Offset to the
1327 * EDID detailed timing descriptors - Image Size upper nibble
1328 * V and H */
1329 /* EDID_TIMING_DESC_H_IMAGE_SIZE[0xC]: Relative Offset to the EDID
1330 * detailed timing descriptors - H image size */
1331 /* EDID_TIMING_DESC_V_IMAGE_SIZE[0xD]: Relative Offset to the EDID
1332 * detailed timing descriptors - V image size */
1333 img_size_h = ((((uint32)data_buf[0xE] >> 0x4) & 0xF) << 8)
1334 | data_buf[0xC];
1335 img_size_v = (((uint32)data_buf[0xE] & 0xF) << 8)
1336 | data_buf[0xD];
1337
Abhishek Kharbanda402adc62011-12-15 12:21:29 -08001338 /*
1339 * aspect ratio as 4:3 if within specificed range , rathaer than being
1340 * absolute value
1341 */
1342 aspect_ratio_4_3 = (abs(img_size_h * 3 - img_size_v * 4) < 5) ? 1 : 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001343
1344 max_num_of_elements = sizeof(hdmi_edid_disp_mode_lut)
1345 / sizeof(*hdmi_edid_disp_mode_lut);
1346
Manoj Rao668d6d52011-08-16 19:12:31 -07001347 /* EDID_TIMING_DESC_INTERLACE[0x11:7]: Relative Offset to the EDID
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001348 * detailed timing descriptors - Interlace flag */
Manoj Rao668d6d52011-08-16 19:12:31 -07001349 DEV_DBG("Interlaced mode byte data_buf[0x11]=[%x]\n", data_buf[0x11]);
1350 /*
1351 * CEA 861-D: interlaced bit is bit[7] of byte[0x11]
1352 */
1353 interlaced = (data_buf[0x11] & 0x80) >> 7;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001354
1355 DEV_DBG("%s: A[%ux%u] B[%ux%u] V[%ux%u] %s\n", __func__,
1356 active_h, active_v, blank_h, blank_v, img_size_h, img_size_v,
1357 interlaced ? "i" : "p");
1358
1359 *disp_mode = HDMI_VFRMT_FORCE_32BIT;
1360 while (ndx < max_num_of_elements) {
1361 const struct hdmi_edid_video_mode_property_type *edid =
1362 hdmi_edid_disp_mode_lut+ndx;
1363
1364 if ((interlaced == edid->interlaced) &&
1365 (active_h == edid->active_h) &&
1366 (blank_h == edid->total_blank_h) &&
1367 (blank_v == edid->total_blank_v) &&
1368 ((active_v == edid->active_v) ||
1369 (active_v == (edid->active_v + 1)))
1370 ) {
1371 if (edid->aspect_ratio_4_3 && !aspect_ratio_4_3)
1372 /* Aspect ratio 16:9 */
1373 *disp_mode = edid->video_code + 1;
1374 else
1375 /* Aspect ratio 4:3 */
1376 *disp_mode = edid->video_code;
1377
1378 DEV_DBG("%s: mode found:%d\n", __func__, *disp_mode);
1379 break;
1380 }
1381 ++ndx;
1382 }
1383 if (ndx == max_num_of_elements)
1384 DEV_INFO("%s: *no mode* found\n", __func__);
1385}
1386
1387static void add_supported_video_format(
1388 struct hdmi_disp_mode_list_type *disp_mode_list,
1389 uint32 video_format)
1390{
1391 const struct hdmi_disp_mode_timing_type *timing =
1392 hdmi_common_get_supported_mode(video_format);
1393 boolean supported = timing != NULL;
1394
1395 if (video_format >= HDMI_VFRMT_MAX)
1396 return;
1397
1398 DEV_DBG("EDID: format: %d [%s], %s\n",
1399 video_format, video_format_2string(video_format),
1400 supported ? "Supported" : "Not-Supported");
Eugene Yasmand0de5f92011-12-20 13:57:28 +02001401 if (supported) {
1402 if (mhl_is_connected()) {
1403 const struct hdmi_disp_mode_timing_type *mhl_timing =
1404 hdmi_mhl_get_supported_mode(video_format);
1405 boolean mhl_supported = mhl_timing != NULL;
1406 DEV_DBG("EDID: format: %d [%s], %s by MHL\n",
1407 video_format, video_format_2string(video_format),
1408 mhl_supported ? "Supported" : "Not-Supported");
1409 if (mhl_supported)
1410 disp_mode_list->disp_mode_list[
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001411 disp_mode_list->num_of_elements++] = video_format;
Eugene Yasmand0de5f92011-12-20 13:57:28 +02001412 } else
1413 disp_mode_list->disp_mode_list[
1414 disp_mode_list->num_of_elements++] = video_format;
1415 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001416}
1417
Aravind Venkateswaran5479cc12012-03-16 15:40:40 -07001418const char *single_video_3d_format_2string(uint32 format)
1419{
1420 switch (format) {
1421 case TOP_AND_BOTTOM: return "TAB";
1422 case FRAME_PACKING: return "FP";
1423 case SIDE_BY_SIDE_HALF: return "SSH";
1424 }
1425 return "";
1426}
1427
1428ssize_t video_3d_format_2string(uint32 format, char *buf)
1429{
1430 ssize_t ret, len = 0;
1431 ret = snprintf(buf, PAGE_SIZE, "%s",
1432 single_video_3d_format_2string(format & FRAME_PACKING));
1433 len += ret;
1434
1435 if (len && (format & TOP_AND_BOTTOM))
1436 ret = snprintf(buf + len, PAGE_SIZE, ":%s",
1437 single_video_3d_format_2string(
1438 format & TOP_AND_BOTTOM));
1439 else
1440 ret = snprintf(buf + len, PAGE_SIZE, "%s",
1441 single_video_3d_format_2string(
1442 format & TOP_AND_BOTTOM));
1443 len += ret;
1444
1445 if (len && (format & SIDE_BY_SIDE_HALF))
1446 ret = snprintf(buf + len, PAGE_SIZE, ":%s",
1447 single_video_3d_format_2string(
1448 format & SIDE_BY_SIDE_HALF));
1449 else
1450 ret = snprintf(buf + len, PAGE_SIZE, "%s",
1451 single_video_3d_format_2string(
1452 format & SIDE_BY_SIDE_HALF));
1453 len += ret;
1454
1455 return len;
1456}
1457
1458static void add_supported_3d_format(
1459 struct hdmi_disp_mode_list_type *disp_mode_list,
1460 uint32 video_format,
1461 uint32 video_3d_format)
1462{
1463 char string[128];
1464 boolean added = FALSE;
1465 int i;
1466 for (i = 0; i < disp_mode_list->num_of_elements; ++i) {
1467 if (disp_mode_list->disp_mode_list[i] == video_format) {
1468 disp_mode_list->disp_3d_mode_list[i] |=
1469 video_3d_format;
1470 added = TRUE;
1471 break;
1472 }
1473 }
1474 video_3d_format_2string(video_3d_format, string);
1475 DEV_DBG("EDID[3D]: format: %d [%s], %s %s\n",
1476 video_format, video_format_2string(video_format),
1477 string, added ? "added" : "NOT added");
1478}
1479
1480static void hdmi_edid_get_display_vsd_3d_mode(const uint8 *data_buf,
1481 struct hdmi_disp_mode_list_type *disp_mode_list,
1482 uint32 num_og_cea_blocks)
1483{
1484 uint8 len, offset, present_multi_3d, hdmi_vic_len, hdmi_3d_len;
1485 uint16 structure_all, structure_mask;
1486 const uint8 *vsd = num_og_cea_blocks ?
1487 hdmi_edid_find_block(data_buf+0x80, DBC_START_OFFSET,
1488 3, &len) : NULL;
1489 int i;
1490
1491 offset = HDMI_VSDB_3D_DATA_OFFSET(vsd);
1492 present_multi_3d = (vsd[offset] & 0x60) >> 5;
1493
1494 offset += 1;
1495 hdmi_vic_len = (vsd[offset] >> 5) & 0x7;
1496 hdmi_3d_len = vsd[offset] & 0x1F;
1497 DEV_DBG("EDID[3D]: HDMI_VIC_LEN = %d, HDMI_3D_LEN = %d\n",
1498 hdmi_vic_len, hdmi_3d_len);
1499
1500 offset += (hdmi_vic_len + 1);
1501 if (present_multi_3d == 1 || present_multi_3d == 2) {
1502 DEV_DBG("EDID[3D]: multi 3D present (%d)\n", present_multi_3d);
1503 /* 3d_structure_all */
1504 structure_all = (vsd[offset] << 8) | vsd[offset + 1];
1505 offset += 2;
1506 hdmi_3d_len -= 2;
1507 if (present_multi_3d == 2) {
1508 /* 3d_structure_mask */
1509 structure_mask = (vsd[offset] << 8) | vsd[offset + 1];
1510 offset += 2;
1511 hdmi_3d_len -= 2;
1512 } else
1513 structure_mask = 0xffff;
1514
1515 i = 0;
1516 while (i < 16) {
1517 if (i >= disp_mode_list->disp_multi_3d_mode_list_cnt)
1518 break;
1519
1520 if (!(structure_mask & BIT(i))) {
1521 ++i;
1522 continue;
1523 }
1524
1525 /* BIT0: FRAME PACKING */
1526 if (structure_all & BIT(0))
1527 add_supported_3d_format(disp_mode_list,
1528 disp_mode_list->
1529 disp_multi_3d_mode_list[i],
1530 FRAME_PACKING);
1531
1532 /* BIT6: TOP AND BOTTOM */
1533 if (structure_all & BIT(6))
1534 add_supported_3d_format(disp_mode_list,
1535 disp_mode_list->
1536 disp_multi_3d_mode_list[i],
1537 TOP_AND_BOTTOM);
1538
1539 /* BIT8: SIDE BY SIDE HALF */
1540 if (structure_all & BIT(8))
1541 add_supported_3d_format(disp_mode_list,
1542 disp_mode_list->
1543 disp_multi_3d_mode_list[i],
1544 SIDE_BY_SIDE_HALF);
1545
1546 ++i;
1547 }
1548 }
1549
1550 i = 0;
1551 while (hdmi_3d_len > 0) {
1552 DEV_DBG("EDID[3D]: 3D_Structure_%d @ %d: %02x\n",
1553 i + 1, offset, vsd[offset]);
1554
1555 if ((vsd[offset] >> 4) >=
1556 disp_mode_list->disp_multi_3d_mode_list_cnt) {
1557 if ((vsd[offset] & 0x0F) >= 8) {
1558 offset += 1;
1559 hdmi_3d_len -= 1;
1560 DEV_DBG("EDID[3D]: 3D_Detail_%d @ %d: %02x\n",
1561 i + 1, offset, vsd[offset]);
1562 }
1563 i += 1;
1564 offset += 1;
1565 hdmi_3d_len -= 1;
1566 continue;
1567 }
1568
1569 switch (vsd[offset] & 0x0F) {
1570 case 0:
1571 /* 0000b: FRAME PACKING */
1572 add_supported_3d_format(disp_mode_list,
1573 disp_mode_list->disp_multi_3d_mode_list
1574 [vsd[offset] >> 4],
1575 FRAME_PACKING);
1576 break;
1577 case 6:
1578 /* 0110b: TOP AND BOTTOM */
1579 add_supported_3d_format(disp_mode_list,
1580 disp_mode_list->disp_multi_3d_mode_list
1581 [vsd[offset] >> 4],
1582 TOP_AND_BOTTOM);
1583 break;
1584 case 8:
1585 /* 1000b: SIDE BY SIDE HALF */
1586 add_supported_3d_format(disp_mode_list,
1587 disp_mode_list->disp_multi_3d_mode_list
1588 [vsd[offset] >> 4],
1589 SIDE_BY_SIDE_HALF);
1590 break;
1591 }
1592 if ((vsd[offset] & 0x0F) >= 8) {
1593 offset += 1;
1594 hdmi_3d_len -= 1;
1595 DEV_DBG("EDID[3D]: 3D_Detail_%d @ %d: %02x\n",
1596 i + 1, offset, vsd[offset]);
1597 }
1598 i += 1;
1599 offset += 1;
1600 hdmi_3d_len -= 1;
1601 }
1602}
1603
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001604static void hdmi_edid_get_display_mode(const uint8 *data_buf,
1605 struct hdmi_disp_mode_list_type *disp_mode_list,
1606 uint32 num_og_cea_blocks)
1607{
1608 uint8 i = 0;
1609 uint32 video_format = HDMI_VFRMT_640x480p60_4_3;
1610 boolean has480p = FALSE;
1611 uint8 len;
Manoj Rao668d6d52011-08-16 19:12:31 -07001612 const uint8 *edid_blk0 = &data_buf[0x0];
1613 const uint8 *edid_blk1 = &data_buf[0x80];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001614 const uint8 *svd = num_og_cea_blocks ?
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001615 hdmi_edid_find_block(data_buf+0x80, DBC_START_OFFSET,
1616 2, &len) : NULL;
Aravind Venkateswaran5479cc12012-03-16 15:40:40 -07001617 boolean has60hz_mode = FALSE;
1618 boolean has50hz_mode = FALSE;
1619
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001620
1621 disp_mode_list->num_of_elements = 0;
Aravind Venkateswaran5479cc12012-03-16 15:40:40 -07001622 disp_mode_list->disp_multi_3d_mode_list_cnt = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001623 if (svd != NULL) {
1624 ++svd;
1625 for (i = 0; i < len; ++i, ++svd) {
1626 /* Subtract 1 because it is zero based in the driver,
1627 * while the Video identification code is 1 based in the
1628 * CEA_861D spec */
1629 video_format = (*svd & 0x7F) - 1;
1630 add_supported_video_format(disp_mode_list,
1631 video_format);
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001632 /* Make a note of the preferred video format */
1633 if (i == 0) {
1634 external_common_state->preferred_video_format =
1635 video_format;
1636 }
Aravind Venkateswaran5479cc12012-03-16 15:40:40 -07001637 if (i < 16) {
1638 disp_mode_list->disp_multi_3d_mode_list[i]
1639 = video_format;
1640 disp_mode_list->disp_multi_3d_mode_list_cnt++;
1641 }
1642
1643 if (video_format <= HDMI_VFRMT_1920x1080p60_16_9 ||
1644 video_format == HDMI_VFRMT_2880x480p60_4_3 ||
1645 video_format == HDMI_VFRMT_2880x480p60_16_9)
1646 has60hz_mode = TRUE;
1647
1648 if ((video_format >= HDMI_VFRMT_720x576p50_4_3 &&
1649 video_format <= HDMI_VFRMT_1920x1080p50_16_9) ||
1650 video_format == HDMI_VFRMT_2880x576p50_4_3 ||
1651 video_format == HDMI_VFRMT_2880x576p50_16_9 ||
1652 video_format == HDMI_VFRMT_1920x1250i50_16_9)
1653 has50hz_mode = TRUE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001654 if (video_format == HDMI_VFRMT_640x480p60_4_3)
1655 has480p = TRUE;
1656 }
1657 } else if (!num_og_cea_blocks) {
1658 /* Detailed timing descriptors */
1659 uint32 desc_offset = 0;
1660 /* Maximum 4 timing descriptor in block 0 - No CEA
1661 * extension in this case */
1662 /* EDID_FIRST_TIMING_DESC[0x36] - 1st detailed timing
1663 * descriptor */
1664 /* EDID_DETAIL_TIMING_DESC_BLCK_SZ[0x12] - Each detailed timing
1665 * descriptor has block size of 18 */
Manoj Rao668d6d52011-08-16 19:12:31 -07001666 while (4 > i && 0 != edid_blk0[0x36+desc_offset]) {
1667 hdmi_edid_detail_desc(edid_blk0+0x36+desc_offset,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001668 &video_format);
Manoj Rao668d6d52011-08-16 19:12:31 -07001669 DEV_DBG("[%s:%d] Block-0 Adding vid fmt = [%s]\n",
1670 __func__, __LINE__,
1671 video_format_2string(video_format));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001672 add_supported_video_format(disp_mode_list,
1673 video_format);
1674 if (video_format == HDMI_VFRMT_640x480p60_4_3)
1675 has480p = TRUE;
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001676 /* Make a note of the preferred video format */
1677 if (i == 0) {
1678 external_common_state->preferred_video_format =
1679 video_format;
1680 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001681 desc_offset += 0x12;
1682 ++i;
1683 }
1684 } else if (1 == num_og_cea_blocks) {
1685 uint32 desc_offset = 0;
Manoj Rao668d6d52011-08-16 19:12:31 -07001686
1687 /*
1688 * Read from both block 0 and block 1
1689 * Read EDID block[0] as above
1690 */
1691 while (4 > i && 0 != edid_blk0[0x36+desc_offset]) {
1692 hdmi_edid_detail_desc(edid_blk0+0x36+desc_offset,
1693 &video_format);
1694 DEV_DBG("[%s:%d] Block-0 Adding vid fmt = [%s]\n",
1695 __func__, __LINE__,
1696 video_format_2string(video_format));
1697 add_supported_video_format(disp_mode_list,
1698 video_format);
1699 if (video_format == HDMI_VFRMT_640x480p60_4_3)
1700 has480p = TRUE;
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001701 /* Make a note of the preferred video format */
1702 if (i == 0) {
1703 external_common_state->preferred_video_format =
1704 video_format;
1705 }
Manoj Rao668d6d52011-08-16 19:12:31 -07001706 desc_offset += 0x12;
1707 ++i;
1708 }
1709
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001710 /* Parse block 1 - CEA extension byte offset of first
1711 * detailed timing generation - offset is relevant to
1712 * the offset of block 1 */
1713
1714 /* EDID_CEA_EXTENSION_FIRST_DESC[0x82]: Offset to CEA
1715 * extension first timing desc - indicate the offset of
1716 * the first detailed timing descriptor */
1717 /* EDID_BLOCK_SIZE = 0x80 Each page size in the EDID ROM */
Manoj Rao668d6d52011-08-16 19:12:31 -07001718 desc_offset = edid_blk1[0x02];
1719 while (0 != edid_blk1[desc_offset]) {
1720 hdmi_edid_detail_desc(edid_blk1+desc_offset,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001721 &video_format);
Manoj Rao668d6d52011-08-16 19:12:31 -07001722 DEV_DBG("[%s:%d] Block-1 Adding vid fmt = [%s]\n",
1723 __func__, __LINE__,
1724 video_format_2string(video_format));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001725 add_supported_video_format(disp_mode_list,
1726 video_format);
1727 if (video_format == HDMI_VFRMT_640x480p60_4_3)
1728 has480p = TRUE;
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001729 /* Make a note of the preferred video format */
1730 if (i == 0) {
1731 external_common_state->preferred_video_format =
1732 video_format;
1733 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001734 desc_offset += 0x12;
1735 ++i;
1736 }
1737 }
1738
Aravind Venkateswaran5479cc12012-03-16 15:40:40 -07001739 /* mandaroty 3d format */
1740 if (external_common_state->present_3d) {
1741 if (has60hz_mode) {
1742 add_supported_3d_format(disp_mode_list,
1743 HDMI_VFRMT_1920x1080p24_16_9,
1744 FRAME_PACKING | TOP_AND_BOTTOM);
1745 add_supported_3d_format(disp_mode_list,
1746 HDMI_VFRMT_1280x720p60_16_9,
1747 FRAME_PACKING | TOP_AND_BOTTOM);
1748 add_supported_3d_format(disp_mode_list,
1749 HDMI_VFRMT_1920x1080i60_16_9,
1750 SIDE_BY_SIDE_HALF);
1751 }
1752 if (has50hz_mode) {
1753 add_supported_3d_format(disp_mode_list,
1754 HDMI_VFRMT_1920x1080p24_16_9,
1755 FRAME_PACKING | TOP_AND_BOTTOM);
1756 add_supported_3d_format(disp_mode_list,
1757 HDMI_VFRMT_1280x720p50_16_9,
1758 FRAME_PACKING | TOP_AND_BOTTOM);
1759 add_supported_3d_format(disp_mode_list,
1760 HDMI_VFRMT_1920x1080i50_16_9,
1761 SIDE_BY_SIDE_HALF);
1762 }
1763
1764 /* 3d format described in Vendor Specific Data */
1765 hdmi_edid_get_display_vsd_3d_mode(data_buf, disp_mode_list,
1766 num_og_cea_blocks);
1767 }
1768
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001769 if (!has480p)
1770 /* Need to add default 640 by 480 timings, in case not described
1771 * in the EDID structure.
1772 * All DTV sink devices should support this mode */
1773 add_supported_video_format(disp_mode_list,
1774 HDMI_VFRMT_640x480p60_4_3);
1775}
1776
1777static int hdmi_common_read_edid_block(int block, uint8 *edid_buf)
1778{
Manoj Rao668d6d52011-08-16 19:12:31 -07001779 uint32 ndx, check_sum, print_len;
1780#ifdef DEBUG
1781 const u8 *b = edid_buf;
1782#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001783 int status = external_common_state->read_edid_block(block, edid_buf);
Manoj Rao668d6d52011-08-16 19:12:31 -07001784 if (status)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001785 goto error;
1786
1787 /* Calculate checksum */
1788 check_sum = 0;
1789 for (ndx = 0; ndx < 0x80; ++ndx)
1790 check_sum += edid_buf[ndx];
1791
1792 if (check_sum & 0xFF) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001793 DEV_ERR("%s: failed CHECKSUM (read:%x, expected:%x)\n",
1794 __func__, (uint8)edid_buf[0x7F], (uint8)check_sum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001795#ifdef DEBUG
1796 for (ndx = 0; ndx < 0x100; ndx += 16)
1797 DEV_DBG("EDID[%02x-%02x] %02x %02x %02x %02x "
1798 "%02x %02x %02x %02x %02x %02x %02x %02x "
1799 "%02x %02x %02x %02x\n", ndx, ndx+15,
1800 b[ndx+0], b[ndx+1], b[ndx+2], b[ndx+3],
1801 b[ndx+4], b[ndx+5], b[ndx+6], b[ndx+7],
1802 b[ndx+8], b[ndx+9], b[ndx+10], b[ndx+11],
1803 b[ndx+12], b[ndx+13], b[ndx+14], b[ndx+15]);
1804#endif
1805 status = -EPROTO;
1806 goto error;
1807 }
Manoj Rao668d6d52011-08-16 19:12:31 -07001808 print_len = 0x80;
1809 for (ndx = 0; ndx < print_len; ndx += 16)
1810 DEV_DBG("EDID[%02x-%02x] %02x %02x %02x %02x "
1811 "%02x %02x %02x %02x %02x %02x %02x %02x "
1812 "%02x %02x %02x %02x\n", ndx, ndx+15,
1813 b[ndx+0], b[ndx+1], b[ndx+2], b[ndx+3],
1814 b[ndx+4], b[ndx+5], b[ndx+6], b[ndx+7],
1815 b[ndx+8], b[ndx+9], b[ndx+10], b[ndx+11],
1816 b[ndx+12], b[ndx+13], b[ndx+14], b[ndx+15]);
1817
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001818
1819error:
1820 return status;
1821}
1822
1823static boolean check_edid_header(const uint8 *edid_buf)
1824{
1825 return (edid_buf[0] == 0x00) && (edid_buf[1] == 0xff)
1826 && (edid_buf[2] == 0xff) && (edid_buf[3] == 0xff)
1827 && (edid_buf[4] == 0xff) && (edid_buf[5] == 0xff)
1828 && (edid_buf[6] == 0xff) && (edid_buf[7] == 0x00);
1829}
1830
1831int hdmi_common_read_edid(void)
1832{
1833 int status = 0;
1834 uint32 cea_extension_ver = 0;
1835 uint32 num_og_cea_blocks = 0;
1836 uint32 ieee_reg_id = 0;
1837 uint32 i = 1;
1838 char vendor_id[5];
1839 /* EDID_BLOCK_SIZE[0x80] Each page size in the EDID ROM */
1840 uint8 edid_buf[0x80 * 4];
1841
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001842 external_common_state->preferred_video_format = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001843 external_common_state->present_3d = 0;
1844 memset(&external_common_state->disp_mode_list, 0,
1845 sizeof(external_common_state->disp_mode_list));
1846 memset(edid_buf, 0, sizeof(edid_buf));
1847
1848 status = hdmi_common_read_edid_block(0, edid_buf);
1849 if (status || !check_edid_header(edid_buf)) {
1850 if (!status)
1851 status = -EPROTO;
1852 DEV_ERR("%s: edid read block(0) failed: %d "
1853 "[%02x%02x%02x%02x%02x%02x%02x%02x]\n", __func__,
1854 status,
1855 edid_buf[0], edid_buf[1], edid_buf[2], edid_buf[3],
1856 edid_buf[4], edid_buf[5], edid_buf[6], edid_buf[7]);
1857 goto error;
1858 }
1859 hdmi_edid_extract_vendor_id(edid_buf, vendor_id);
1860
1861 /* EDID_CEA_EXTENSION_FLAG[0x7E] - CEC extension byte */
1862 num_og_cea_blocks = edid_buf[0x7E];
1863
1864 DEV_DBG("[JSR] (%s): No. of CEA blocks is [%u]\n", __func__,
1865 num_og_cea_blocks);
1866 /* Find out any CEA extension blocks following block 0 */
1867 switch (num_og_cea_blocks) {
1868 case 0: /* No CEA extension */
1869 external_common_state->hdmi_sink = false;
1870 DEV_DBG("HDMI DVI mode: %s\n",
1871 external_common_state->hdmi_sink ? "no" : "yes");
1872 break;
1873 case 1: /* Read block 1 */
Manoj Rao668d6d52011-08-16 19:12:31 -07001874 status = hdmi_common_read_edid_block(1, &edid_buf[0x80]);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001875 if (status) {
1876 DEV_ERR("%s: ddc read block(1) failed: %d\n", __func__,
1877 status);
1878 goto error;
1879 }
1880 if (edid_buf[0x80] != 2)
1881 num_og_cea_blocks = 0;
1882 if (num_og_cea_blocks) {
1883 ieee_reg_id =
1884 hdmi_edid_extract_ieee_reg_id(edid_buf+0x80);
1885 if (ieee_reg_id == 0x0c03)
1886 external_common_state->hdmi_sink = TRUE ;
1887 else
1888 external_common_state->hdmi_sink = FALSE ;
1889 hdmi_edid_extract_latency_fields(edid_buf+0x80);
1890 hdmi_edid_extract_speaker_allocation_data(
1891 edid_buf+0x80);
1892 hdmi_edid_extract_audio_data_blocks(edid_buf+0x80);
1893 hdmi_edid_extract_3d_present(edid_buf+0x80);
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -07001894 hdmi_edid_extract_extended_data_blocks(edid_buf+0x80);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001895 }
1896 break;
1897 case 2:
1898 case 3:
1899 case 4:
1900 for (i = 1; i <= num_og_cea_blocks; i++) {
1901 if (!(i % 2)) {
1902 status = hdmi_common_read_edid_block(i,
1903 edid_buf+0x00);
1904 if (status) {
1905 DEV_ERR("%s: ddc read block(%d)"
1906 "failed: %d\n", __func__, i,
1907 status);
1908 goto error;
1909 }
1910 } else {
1911 status = hdmi_common_read_edid_block(i,
1912 edid_buf+0x80);
1913 if (status) {
1914 DEV_ERR("%s: ddc read block(%d)"
1915 "failed:%d\n", __func__, i,
1916 status);
1917 goto error;
1918 }
1919 }
1920 }
1921 break;
1922 default:
1923 DEV_ERR("%s: ddc read failed, not supported multi-blocks: %d\n",
1924 __func__, num_og_cea_blocks);
1925 status = -EPROTO;
1926 goto error;
1927 }
1928
1929 if (num_og_cea_blocks) {
1930 /* EDID_CEA_EXTENSION_VERSION[0x81]: Offset to CEA extension
1931 * version number - v1,v2,v3 (v1 is seldom, v2 is obsolete,
1932 * v3 most common) */
1933 cea_extension_ver = edid_buf[0x81];
1934 }
1935
1936 /* EDID_VERSION[0x12] - EDID Version */
1937 /* EDID_REVISION[0x13] - EDID Revision */
1938 DEV_INFO("EDID (V=%d.%d, #CEABlocks=%d[V%d], ID=%s, IEEE=%04x, "
1939 "EDID-Ext=0x%02x)\n", edid_buf[0x12], edid_buf[0x13],
1940 num_og_cea_blocks, cea_extension_ver, vendor_id, ieee_reg_id,
1941 edid_buf[0x80]);
1942
1943 hdmi_edid_get_display_mode(edid_buf,
1944 &external_common_state->disp_mode_list, num_og_cea_blocks);
1945
1946 return 0;
1947
1948error:
1949 external_common_state->disp_mode_list.num_of_elements = 1;
1950 external_common_state->disp_mode_list.disp_mode_list[0] =
1951 external_common_state->video_resolution;
1952 return status;
1953}
1954EXPORT_SYMBOL(hdmi_common_read_edid);
1955
1956bool hdmi_common_get_video_format_from_drv_data(struct msm_fb_data_type *mfd)
1957{
1958 uint32 format;
1959 struct fb_var_screeninfo *var = &mfd->fbi->var;
1960 bool changed = TRUE;
1961
1962 if (var->reserved[3]) {
1963 format = var->reserved[3]-1;
Eugene Yasmand0de5f92011-12-20 13:57:28 +02001964 DEV_DBG("reserved format is %d\n", format);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001965 } else {
1966 DEV_DBG("detecting resolution from %dx%d use var->reserved[3]"
1967 " to specify mode", mfd->var_xres, mfd->var_yres);
1968 switch (mfd->var_xres) {
1969 default:
1970 case 640:
1971 format = HDMI_VFRMT_640x480p60_4_3;
1972 break;
1973 case 720:
1974 format = (mfd->var_yres == 480)
1975 ? HDMI_VFRMT_720x480p60_16_9
1976 : HDMI_VFRMT_720x576p50_16_9;
1977 break;
1978 case 1280:
1979 format = HDMI_VFRMT_1280x720p60_16_9;
1980 break;
1981 case 1440:
1982 format = (mfd->var_yres == 480)
1983 ? HDMI_VFRMT_1440x480i60_16_9
1984 : HDMI_VFRMT_1440x576i50_16_9;
1985 break;
1986 case 1920:
1987 format = HDMI_VFRMT_1920x1080p60_16_9;
1988 break;
1989 }
1990 }
1991
1992 changed = external_common_state->video_resolution != format;
1993 if (external_common_state->video_resolution != format)
1994 DEV_DBG("switching %s => %s", video_format_2string(
1995 external_common_state->video_resolution),
1996 video_format_2string(format));
1997 else
1998 DEV_DBG("resolution %s", video_format_2string(
1999 external_common_state->video_resolution));
2000 external_common_state->video_resolution = format;
2001 return changed;
2002}
2003EXPORT_SYMBOL(hdmi_common_get_video_format_from_drv_data);
2004
2005const struct hdmi_disp_mode_timing_type *hdmi_common_get_mode(uint32 mode)
2006{
2007 if (mode >= HDMI_VFRMT_MAX)
2008 return NULL;
2009
2010 return &hdmi_common_supported_video_mode_lut[mode];
2011}
2012EXPORT_SYMBOL(hdmi_common_get_mode);
2013
2014const struct hdmi_disp_mode_timing_type *hdmi_common_get_supported_mode(
2015 uint32 mode)
2016{
2017 const struct hdmi_disp_mode_timing_type *ret
2018 = hdmi_common_get_mode(mode);
2019
2020 if (ret == NULL || !ret->supported)
2021 return NULL;
2022 return ret;
2023}
2024EXPORT_SYMBOL(hdmi_common_get_supported_mode);
2025
Eugene Yasmand0de5f92011-12-20 13:57:28 +02002026const struct hdmi_disp_mode_timing_type *hdmi_mhl_get_mode(uint32 mode)
2027{
2028 if (mode >= HDMI_VFRMT_MAX)
2029 return NULL;
2030
2031 return &hdmi_mhl_supported_video_mode_lut[mode];
2032}
2033EXPORT_SYMBOL(hdmi_mhl_get_mode);
2034
2035const struct hdmi_disp_mode_timing_type *hdmi_mhl_get_supported_mode(
2036 uint32 mode)
2037{
2038 const struct hdmi_disp_mode_timing_type *ret
2039 = hdmi_mhl_get_mode(mode);
2040
2041 if (ret == NULL || !ret->supported)
2042 return NULL;
2043 return ret;
2044}
2045EXPORT_SYMBOL(hdmi_mhl_get_supported_mode);
2046
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002047void hdmi_common_init_panel_info(struct msm_panel_info *pinfo)
2048{
2049 const struct hdmi_disp_mode_timing_type *timing =
2050 hdmi_common_get_supported_mode(
2051 external_common_state->video_resolution);
2052
2053 if (timing == NULL)
2054 return;
2055
2056 pinfo->xres = timing->active_h;
2057 pinfo->yres = timing->active_v;
2058 pinfo->clk_rate = timing->pixel_freq*1000;
Siddhartha1b92af62012-05-07 18:58:56 -07002059 pinfo->frame_rate = 60;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002060
2061 pinfo->lcdc.h_back_porch = timing->back_porch_h;
2062 pinfo->lcdc.h_front_porch = timing->front_porch_h;
2063 pinfo->lcdc.h_pulse_width = timing->pulse_width_h;
2064 pinfo->lcdc.v_back_porch = timing->back_porch_v;
2065 pinfo->lcdc.v_front_porch = timing->front_porch_v;
2066 pinfo->lcdc.v_pulse_width = timing->pulse_width_v;
2067
2068 pinfo->type = DTV_PANEL;
2069 pinfo->pdest = DISPLAY_2;
2070 pinfo->wait_cycle = 0;
2071 pinfo->bpp = 24;
Ravishangar Kalyanam0bb7fe92011-10-27 16:06:30 -07002072 if (hdmi_prim_display)
2073 pinfo->fb_num = 2;
2074 else
2075 pinfo->fb_num = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002076
2077 /* blk */
2078 pinfo->lcdc.border_clr = 0;
2079 /* blue */
2080 pinfo->lcdc.underflow_clr = 0xff;
2081 pinfo->lcdc.hsync_skew = 0;
2082}
2083EXPORT_SYMBOL(hdmi_common_init_panel_info);
2084#endif