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David Collins1d4061b2011-12-06 15:36:40 -08001/*
David Collinsb4558422012-01-05 10:50:49 -08002 * Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
David Collins1d4061b2011-12-06 15:36:40 -08003 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/regulator/pm8xxx-regulator.h>
15
16#include "board-8930.h"
17
18#define VREG_CONSUMERS(_id) \
19 static struct regulator_consumer_supply vreg_consumers_##_id[]
20
21/*
22 * Consumer specific regulator names:
23 * regulator name consumer dev_name
24 */
25VREG_CONSUMERS(L1) = {
26 REGULATOR_SUPPLY("8038_l1", NULL),
Subramanian Srinivasanc698a442012-01-11 13:41:57 -080027 REGULATOR_SUPPLY("iris_vddrfa", "wcnss_wlan.0"),
David Collins1d4061b2011-12-06 15:36:40 -080028};
29VREG_CONSUMERS(L2) = {
30 REGULATOR_SUPPLY("8038_l2", NULL),
Subramanian Srinivasanc698a442012-01-11 13:41:57 -080031 REGULATOR_SUPPLY("iris_vdddig", "wcnss_wlan.0"),
Chandan Uddaraju59894ca2011-12-05 17:07:02 -080032 REGULATOR_SUPPLY("dsi_vdda", "mipi_dsi.1"),
Kevin Chan330e4d52012-02-18 23:11:24 -080033 REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.0"),
34 REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.1"),
35 REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.2"),
David Collins1d4061b2011-12-06 15:36:40 -080036};
37VREG_CONSUMERS(L3) = {
38 REGULATOR_SUPPLY("8038_l3", NULL),
Mayank Ranabf5084a2011-12-12 17:06:54 +053039 REGULATOR_SUPPLY("HSUSB_3p3", "msm_otg"),
David Collins1d4061b2011-12-06 15:36:40 -080040};
41VREG_CONSUMERS(L4) = {
42 REGULATOR_SUPPLY("8038_l4", NULL),
Mayank Ranabf5084a2011-12-12 17:06:54 +053043 REGULATOR_SUPPLY("HSUSB_1p8", "msm_otg"),
Subramanian Srinivasanc698a442012-01-11 13:41:57 -080044 REGULATOR_SUPPLY("iris_vddxo", "wcnss_wlan.0"),
David Collins1d4061b2011-12-06 15:36:40 -080045};
46VREG_CONSUMERS(L5) = {
47 REGULATOR_SUPPLY("8038_l5", NULL),
Krishna Konda40ec7e92011-12-20 19:28:25 -080048 REGULATOR_SUPPLY("sdc_vdd", "msm_sdcc.1"),
David Collins1d4061b2011-12-06 15:36:40 -080049};
50VREG_CONSUMERS(L6) = {
51 REGULATOR_SUPPLY("8038_l6", NULL),
Krishna Konda40ec7e92011-12-20 19:28:25 -080052 REGULATOR_SUPPLY("sdc_vdd", "msm_sdcc.3"),
David Collins1d4061b2011-12-06 15:36:40 -080053};
54VREG_CONSUMERS(L7) = {
55 REGULATOR_SUPPLY("8038_l7", NULL),
56};
57VREG_CONSUMERS(L8) = {
58 REGULATOR_SUPPLY("8038_l8", NULL),
Chandan Uddaraju59894ca2011-12-05 17:07:02 -080059 REGULATOR_SUPPLY("dsi_vdc", "mipi_dsi.1"),
David Collins1d4061b2011-12-06 15:36:40 -080060};
61VREG_CONSUMERS(L9) = {
62 REGULATOR_SUPPLY("8038_l9", NULL),
Anirudh Ghayald7ad84c2012-01-09 09:17:53 +053063 REGULATOR_SUPPLY("vdd_ana", "3-004a"),
Amy Maloche32a36c32012-01-11 10:39:11 -080064 REGULATOR_SUPPLY("vdd", "3-0024"),
Kevin Chan6776a372012-01-12 14:18:53 -080065 REGULATOR_SUPPLY("cam_vana", "4-001a"),
66 REGULATOR_SUPPLY("cam_vana", "4-006c"),
67 REGULATOR_SUPPLY("cam_vana", "4-0048"),
68 REGULATOR_SUPPLY("cam_vaf", "4-001a"),
69 REGULATOR_SUPPLY("cam_vaf", "4-006c"),
70 REGULATOR_SUPPLY("cam_vaf", "4-0048"),
Sreesudhan Ramakrish Ramkumar8f11b8b2012-01-04 17:09:05 -080071 REGULATOR_SUPPLY("cam_vana", "4-0020"),
72 REGULATOR_SUPPLY("cam_vaf", "4-0020"),
David Collins1d4061b2011-12-06 15:36:40 -080073};
74VREG_CONSUMERS(L10) = {
75 REGULATOR_SUPPLY("8038_l10", NULL),
Subramanian Srinivasanc698a442012-01-11 13:41:57 -080076 REGULATOR_SUPPLY("iris_vddpa", "wcnss_wlan.0"),
David Collins1d4061b2011-12-06 15:36:40 -080077};
78VREG_CONSUMERS(L11) = {
79 REGULATOR_SUPPLY("8038_l11", NULL),
Anirudh Ghayald7ad84c2012-01-09 09:17:53 +053080 REGULATOR_SUPPLY("vdd_dig", "3-004a"),
Subramanian Srinivasanc698a442012-01-11 13:41:57 -080081 REGULATOR_SUPPLY("iris_vddio", "wcnss_wlan.0"),
82 REGULATOR_SUPPLY("riva_vddpx", "wcnss_wlan.0"),
Krishna Konda40ec7e92011-12-20 19:28:25 -080083 REGULATOR_SUPPLY("sdc_vccq", "msm_sdcc.1"),
Asish Bhattacharyacdaa99d2012-01-10 06:05:00 +053084 REGULATOR_SUPPLY("VDDIO_CDC", "sitar-slim"),
85 REGULATOR_SUPPLY("CDC_VDDA_TX", "sitar-slim"),
86 REGULATOR_SUPPLY("CDC_VDDA_RX", "sitar-slim"),
David Collins1d4061b2011-12-06 15:36:40 -080087};
88VREG_CONSUMERS(L12) = {
89 REGULATOR_SUPPLY("8038_l12", NULL),
Kevin Chan6776a372012-01-12 14:18:53 -080090 REGULATOR_SUPPLY("cam_vdig", "4-001a"),
91 REGULATOR_SUPPLY("cam_vdig", "4-006c"),
92 REGULATOR_SUPPLY("cam_vdig", "4-0048"),
Sreesudhan Ramakrish Ramkumar8f11b8b2012-01-04 17:09:05 -080093 REGULATOR_SUPPLY("cam_vdig", "4-0020"),
David Collins1d4061b2011-12-06 15:36:40 -080094};
95VREG_CONSUMERS(L14) = {
96 REGULATOR_SUPPLY("8038_l14", NULL),
Siddartha Mohanadoss6a392d32012-01-12 11:30:58 -080097 REGULATOR_SUPPLY("pa_therm", "pm8xxx-adc"),
David Collins1d4061b2011-12-06 15:36:40 -080098};
99VREG_CONSUMERS(L15) = {
100 REGULATOR_SUPPLY("8038_l15", NULL),
101};
102VREG_CONSUMERS(L16) = {
103 REGULATOR_SUPPLY("8038_l16", NULL),
Stephen Boyd868d8992012-01-06 14:11:02 -0800104 REGULATOR_SUPPLY("core_vdd", "pil_qdsp6v4.2"),
David Collins1d4061b2011-12-06 15:36:40 -0800105};
106VREG_CONSUMERS(L17) = {
107 REGULATOR_SUPPLY("8038_l17", NULL),
108};
109VREG_CONSUMERS(L18) = {
110 REGULATOR_SUPPLY("8038_l18", NULL),
Kevin Chan6776a372012-01-12 14:18:53 -0800111 REGULATOR_SUPPLY("cam_vio", "4-001a"),
112 REGULATOR_SUPPLY("cam_vio", "4-006c"),
113 REGULATOR_SUPPLY("cam_vio", "4-0048"),
Sreesudhan Ramakrish Ramkumar8f11b8b2012-01-04 17:09:05 -0800114 REGULATOR_SUPPLY("cam_vio", "4-0020"),
David Collins1d4061b2011-12-06 15:36:40 -0800115};
116VREG_CONSUMERS(L19) = {
117 REGULATOR_SUPPLY("8038_l19", NULL),
Stephen Boyd868d8992012-01-06 14:11:02 -0800118 REGULATOR_SUPPLY("core_vdd", "pil_qdsp6v4.1"),
David Collins1d4061b2011-12-06 15:36:40 -0800119};
120VREG_CONSUMERS(L20) = {
121 REGULATOR_SUPPLY("8038_l20", NULL),
Asish Bhattacharyacdaa99d2012-01-10 06:05:00 +0530122 REGULATOR_SUPPLY("VDDD_CDC_D", "sitar-slim"),
123 REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "sitar-slim"),
David Collins1d4061b2011-12-06 15:36:40 -0800124};
125VREG_CONSUMERS(L21) = {
126 REGULATOR_SUPPLY("8038_l21", NULL),
127};
128VREG_CONSUMERS(L22) = {
129 REGULATOR_SUPPLY("8038_l22", NULL),
Krishna Konda40ec7e92011-12-20 19:28:25 -0800130 REGULATOR_SUPPLY("sdc_vddp", "msm_sdcc.3"),
David Collins1d4061b2011-12-06 15:36:40 -0800131};
132VREG_CONSUMERS(L23) = {
133 REGULATOR_SUPPLY("8038_l23", NULL),
Chandan Uddaraju59894ca2011-12-05 17:07:02 -0800134 REGULATOR_SUPPLY("dsi_vddio", "mipi_dsi.1"),
135 REGULATOR_SUPPLY("hdmi_avdd", "hdmi_msm.0"),
136 REGULATOR_SUPPLY("hdmi_vcc", "hdmi_msm.0"),
Stephen Boyd3bbdf6c2011-12-21 16:02:26 -0800137 REGULATOR_SUPPLY("pll_vdd", "pil_riva"),
Stephen Boydcc0f5342011-12-29 17:28:57 -0800138 REGULATOR_SUPPLY("pll_vdd", "pil_qdsp6v4.1"),
139 REGULATOR_SUPPLY("pll_vdd", "pil_qdsp6v4.2"),
David Collins1d4061b2011-12-06 15:36:40 -0800140};
141VREG_CONSUMERS(L24) = {
142 REGULATOR_SUPPLY("8038_l24", NULL),
Subramanian Srinivasanc698a442012-01-11 13:41:57 -0800143 REGULATOR_SUPPLY("riva_vddmx", "wcnss_wlan.0"),
David Collins1d4061b2011-12-06 15:36:40 -0800144};
145VREG_CONSUMERS(L26) = {
146 REGULATOR_SUPPLY("8038_l26", NULL),
147};
148VREG_CONSUMERS(L27) = {
149 REGULATOR_SUPPLY("8038_l27", NULL),
Stephen Boyd868d8992012-01-06 14:11:02 -0800150 REGULATOR_SUPPLY("core_vdd", "pil_qdsp6v4.0"),
David Collins1d4061b2011-12-06 15:36:40 -0800151};
152VREG_CONSUMERS(S1) = {
153 REGULATOR_SUPPLY("8038_s1", NULL),
Mayank Ranabf5084a2011-12-12 17:06:54 +0530154 REGULATOR_SUPPLY("HSUSB_VDDCX", "msm_otg"),
Subramanian Srinivasanc698a442012-01-11 13:41:57 -0800155 REGULATOR_SUPPLY("riva_vddcx", "wcnss_wlan.0"),
David Collins1d4061b2011-12-06 15:36:40 -0800156};
157VREG_CONSUMERS(S2) = {
158 REGULATOR_SUPPLY("8038_s2", NULL),
159};
160VREG_CONSUMERS(S3) = {
161 REGULATOR_SUPPLY("8038_s3", NULL),
162};
163VREG_CONSUMERS(S4) = {
164 REGULATOR_SUPPLY("8038_s4", NULL),
Asish Bhattacharyacdaa99d2012-01-10 06:05:00 +0530165 REGULATOR_SUPPLY("CDC_VDD_CP", "sitar-slim"),
David Collins1d4061b2011-12-06 15:36:40 -0800166};
167VREG_CONSUMERS(S5) = {
168 REGULATOR_SUPPLY("8038_s5", NULL),
David Collinsb4558422012-01-05 10:50:49 -0800169 REGULATOR_SUPPLY("krait0", NULL),
David Collins1d4061b2011-12-06 15:36:40 -0800170};
171VREG_CONSUMERS(S6) = {
172 REGULATOR_SUPPLY("8038_s6", NULL),
David Collinsb4558422012-01-05 10:50:49 -0800173 REGULATOR_SUPPLY("krait1", NULL),
David Collins1d4061b2011-12-06 15:36:40 -0800174};
175VREG_CONSUMERS(LVS1) = {
176 REGULATOR_SUPPLY("8038_lvs1", NULL),
177};
178VREG_CONSUMERS(LVS2) = {
179 REGULATOR_SUPPLY("8038_lvs2", NULL),
Anirudh Ghayald7ad84c2012-01-09 09:17:53 +0530180 REGULATOR_SUPPLY("vcc_i2c", "3-004a"),
Amy Maloche32a36c32012-01-11 10:39:11 -0800181 REGULATOR_SUPPLY("vcc_i2c", "3-0024"),
Anirudh Ghayal8c15f7f2012-01-09 14:04:02 +0530182 REGULATOR_SUPPLY("vddp", "12-0048"),
David Collins1d4061b2011-12-06 15:36:40 -0800183};
184VREG_CONSUMERS(EXT_5V) = {
185 REGULATOR_SUPPLY("ext_5v", NULL),
Chandan Uddaraju59894ca2011-12-05 17:07:02 -0800186 REGULATOR_SUPPLY("hdmi_mvs", "hdmi_msm.0"),
David Collins1d4061b2011-12-06 15:36:40 -0800187};
188VREG_CONSUMERS(EXT_OTG_SW) = {
189 REGULATOR_SUPPLY("ext_otg_sw", NULL),
Anirudh Ghayal8c15f7f2012-01-09 14:04:02 +0530190 REGULATOR_SUPPLY("vbus_otg", "msm_otg"),
David Collins1d4061b2011-12-06 15:36:40 -0800191};
192
193#define PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, _modes, _ops, \
194 _apply_uV, _pull_down, _always_on, _supply_regulator, \
195 _system_uA, _enable_time, _reg_id) \
196 { \
197 .init_data = { \
198 .constraints = { \
199 .valid_modes_mask = _modes, \
200 .valid_ops_mask = _ops, \
201 .min_uV = _min_uV, \
202 .max_uV = _max_uV, \
203 .input_uV = _max_uV, \
204 .apply_uV = _apply_uV, \
205 .always_on = _always_on, \
206 .name = _name, \
207 }, \
208 .num_consumer_supplies = \
209 ARRAY_SIZE(vreg_consumers_##_id), \
210 .consumer_supplies = vreg_consumers_##_id, \
211 .supply_regulator = _supply_regulator, \
212 }, \
213 .id = _reg_id, \
214 .pull_down_enable = _pull_down, \
215 .system_uA = _system_uA, \
216 .enable_time = _enable_time, \
217 }
218
219#define PM8XXX_LDO(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \
220 _enable_time, _supply_regulator, _system_uA, _reg_id) \
221 PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
222 | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
223 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
224 REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
225 _supply_regulator, _system_uA, _enable_time, _reg_id)
226
227#define PM8XXX_NLDO1200(_id, _name, _always_on, _pull_down, _min_uV, \
228 _max_uV, _enable_time, _supply_regulator, _system_uA, _reg_id) \
229 PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
230 | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
231 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
232 REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
233 _supply_regulator, _system_uA, _enable_time, _reg_id)
234
235#define PM8XXX_SMPS(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \
236 _enable_time, _supply_regulator, _system_uA, _reg_id) \
237 PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
238 | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
239 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
240 REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
241 _supply_regulator, _system_uA, _enable_time, _reg_id)
242
243#define PM8XXX_FTSMPS(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \
244 _enable_time, _supply_regulator, _system_uA, _reg_id) \
245 PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
246 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS \
247 | REGULATOR_CHANGE_MODE, 0, _pull_down, _always_on, \
248 _supply_regulator, _system_uA, _enable_time, _reg_id)
249
250#define PM8XXX_VS(_id, _name, _always_on, _pull_down, _enable_time, \
251 _supply_regulator, _reg_id) \
252 PM8XXX_VREG_INIT(_id, _name, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, \
253 _pull_down, _always_on, _supply_regulator, 0, _enable_time, \
254 _reg_id)
255
256#define PM8XXX_VS300(_id, _name, _always_on, _pull_down, _enable_time, \
257 _supply_regulator, _reg_id) \
258 PM8XXX_VREG_INIT(_id, _name, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, \
259 _pull_down, _always_on, _supply_regulator, 0, _enable_time, \
260 _reg_id)
261
262#define PM8XXX_NCP(_id, _name, _always_on, _min_uV, _max_uV, _enable_time, \
263 _supply_regulator, _reg_id) \
264 PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, 0, \
265 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, 0, \
266 _always_on, _supply_regulator, 0, _enable_time, _reg_id)
267
268/* Pin control initialization */
269#define PM8XXX_PC(_id, _name, _always_on, _pin_fn, _pin_ctrl, \
270 _supply_regulator, _reg_id) \
271 { \
272 .init_data = { \
273 .constraints = { \
274 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
275 .always_on = _always_on, \
276 .name = _name, \
277 }, \
278 .num_consumer_supplies = \
279 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
280 .consumer_supplies = vreg_consumers_##_id##_PC, \
281 .supply_regulator = _supply_regulator, \
282 }, \
283 .id = _reg_id, \
284 .pin_fn = PM8XXX_VREG_PIN_FN_##_pin_fn, \
285 .pin_ctrl = _pin_ctrl, \
286 }
287
David Collins8af872e2012-01-06 11:31:56 -0800288#define RPM_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, _default_uV, \
289 _peak_uA, _avg_uA, _pull_down, _pin_ctrl, _freq, _pin_fn, \
290 _force_mode, _power_mode, _state, _sleep_selectable, \
291 _always_on, _supply_regulator, _system_uA) \
292 { \
293 .init_data = { \
294 .constraints = { \
295 .valid_modes_mask = _modes, \
296 .valid_ops_mask = _ops, \
297 .min_uV = _min_uV, \
298 .max_uV = _max_uV, \
299 .input_uV = _min_uV, \
300 .apply_uV = _apply_uV, \
301 .always_on = _always_on, \
302 }, \
303 .num_consumer_supplies = \
304 ARRAY_SIZE(vreg_consumers_##_id), \
305 .consumer_supplies = vreg_consumers_##_id, \
306 .supply_regulator = _supply_regulator, \
307 }, \
308 .id = RPM_VREG_ID_PM8038_##_id, \
309 .default_uV = _default_uV, \
310 .peak_uA = _peak_uA, \
311 .avg_uA = _avg_uA, \
312 .pull_down_enable = _pull_down, \
313 .pin_ctrl = _pin_ctrl, \
314 .freq = RPM_VREG_FREQ_##_freq, \
315 .pin_fn = _pin_fn, \
316 .force_mode = _force_mode, \
317 .power_mode = _power_mode, \
318 .state = _state, \
319 .sleep_selectable = _sleep_selectable, \
320 .system_uA = _system_uA, \
321 }
322
323#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
324 _supply_regulator, _system_uA, _init_peak_uA) \
325 RPM_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
326 | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE \
327 | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE \
328 | REGULATOR_CHANGE_DRMS, 0, _max_uV, _init_peak_uA, 0, _pd, \
329 RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8930_NONE, \
330 RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
331 RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
332 _supply_regulator, _system_uA)
333
334#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
335 _supply_regulator, _system_uA, _freq) \
336 RPM_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
337 | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE \
338 | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE \
339 | REGULATOR_CHANGE_DRMS, 0, _max_uV, _system_uA, 0, _pd, \
340 RPM_VREG_PIN_CTRL_NONE, _freq, RPM_VREG_PIN_FN_8930_NONE, \
341 RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
342 RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
343 _supply_regulator, _system_uA)
344
345#define RPM_VS(_id, _always_on, _pd, _sleep_selectable, _supply_regulator) \
346 RPM_INIT(_id, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, 0, 1000, 1000, _pd, \
347 RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8930_NONE, \
348 RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
349 RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
350 _supply_regulator, 0)
351
352#define RPM_NCP(_id, _always_on, _sleep_selectable, _min_uV, _max_uV, \
353 _supply_regulator, _freq) \
354 RPM_INIT(_id, _min_uV, _max_uV, 0, REGULATOR_CHANGE_VOLTAGE \
355 | REGULATOR_CHANGE_STATUS, 0, _max_uV, 1000, 1000, 0, \
356 RPM_VREG_PIN_CTRL_NONE, _freq, RPM_VREG_PIN_FN_8930_NONE, \
357 RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
358 RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
359 _supply_regulator, 0)
360
361/* Pin control initialization */
362#define RPM_PC_INIT(_id, _always_on, _pin_fn, _pin_ctrl, _supply_regulator) \
363 { \
364 .init_data = { \
365 .constraints = { \
366 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
367 .always_on = _always_on, \
368 }, \
369 .num_consumer_supplies = \
370 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
371 .consumer_supplies = vreg_consumers_##_id##_PC, \
372 .supply_regulator = _supply_regulator, \
373 }, \
374 .id = RPM_VREG_ID_PM8038_##_id##_PC, \
375 .pin_fn = RPM_VREG_PIN_FN_8930_##_pin_fn, \
376 .pin_ctrl = _pin_ctrl, \
377 }
378
David Collins1d4061b2011-12-06 15:36:40 -0800379#define GPIO_VREG(_id, _reg_name, _gpio_label, _gpio, _supply_regulator) \
380 [MSM8930_GPIO_VREG_ID_##_id] = { \
381 .init_data = { \
382 .constraints = { \
383 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
384 }, \
385 .num_consumer_supplies = \
386 ARRAY_SIZE(vreg_consumers_##_id), \
387 .consumer_supplies = vreg_consumers_##_id, \
388 .supply_regulator = _supply_regulator, \
389 }, \
390 .regulator_name = _reg_name, \
391 .gpio_label = _gpio_label, \
392 .gpio = _gpio, \
393 }
394
David Collinsb4558422012-01-05 10:50:49 -0800395#define SAW_VREG_INIT(_id, _name, _min_uV, _max_uV) \
396 { \
397 .constraints = { \
398 .name = _name, \
399 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, \
400 .min_uV = _min_uV, \
401 .max_uV = _max_uV, \
402 }, \
403 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_##_id), \
404 .consumer_supplies = vreg_consumers_##_id, \
405 }
406
David Collins1d4061b2011-12-06 15:36:40 -0800407/* GPIO regulator constraints */
408struct gpio_regulator_platform_data
409msm8930_gpio_regulator_pdata[] __devinitdata = {
410 /* ID vreg_name gpio_label gpio supply */
411 GPIO_VREG(EXT_5V, "ext_5v", "ext_5v_en", 63, NULL),
412 GPIO_VREG(EXT_OTG_SW, "ext_otg_sw", "ext_otg_sw_en", 97, "ext_5v"),
413};
414
David Collinsb4558422012-01-05 10:50:49 -0800415/* SAW regulator constraints */
416struct regulator_init_data msm8930_saw_regulator_core0_pdata =
417 /* ID vreg_name min_uV max_uV */
418 SAW_VREG_INIT(S5, "8038_s5", 850000, 1300000);
419struct regulator_init_data msm8930_saw_regulator_core1_pdata =
420 SAW_VREG_INIT(S6, "8038_s6", 850000, 1300000);
421
David Collins1d4061b2011-12-06 15:36:40 -0800422/* PM8038 regulator constraints */
423struct pm8xxx_regulator_platform_data
424msm8930_pm8038_regulator_pdata[] __devinitdata = {
425 /*
426 * ID name always_on pd min_uV max_uV en_t supply
427 * system_uA reg_ID
428 */
David Collins1d4061b2011-12-06 15:36:40 -0800429 PM8XXX_NLDO1200(L16, "8038_l16", 0, 1, 1050000, 1050000, 200, "8038_s3",
David Collins8af872e2012-01-06 11:31:56 -0800430 0, 0),
David Collins1d4061b2011-12-06 15:36:40 -0800431 PM8XXX_NLDO1200(L19, "8038_l19", 0, 1, 1050000, 1050000, 200, "8038_s3",
David Collins8af872e2012-01-06 11:31:56 -0800432 0, 1),
David Collins1d4061b2011-12-06 15:36:40 -0800433 PM8XXX_NLDO1200(L27, "8038_l27", 0, 1, 1050000, 1050000, 200, "8038_s3",
David Collins8af872e2012-01-06 11:31:56 -0800434 0, 2),
435};
David Collins1d4061b2011-12-06 15:36:40 -0800436
David Collins8af872e2012-01-06 11:31:56 -0800437static struct rpm_regulator_init_data
438msm8930_rpm_regulator_init_data[] __devinitdata = {
439 /* ID a_on pd ss min_uV max_uV supply sys_uA freq */
David Collinsad96fa32012-03-02 08:41:38 -0800440 RPM_SMPS(S1, 0, 1, 1, 500000, 1150000, NULL, 100000, 4p80),
David Collins8af872e2012-01-06 11:31:56 -0800441 RPM_SMPS(S2, 1, 1, 0, 1400000, 1400000, NULL, 100000, 1p60),
442 RPM_SMPS(S3, 0, 1, 0, 1150000, 1150000, NULL, 100000, 3p20),
443 RPM_SMPS(S4, 1, 1, 0, 2200000, 2200000, NULL, 100000, 1p60),
David Collins1d4061b2011-12-06 15:36:40 -0800444
David Collins8af872e2012-01-06 11:31:56 -0800445 /* ID a_on pd ss min_uV max_uV supply sys_uA init_ip */
446 RPM_LDO(L1, 0, 1, 0, 1300000, 1300000, "8038_s2", 0, 0),
447 RPM_LDO(L2, 0, 1, 0, 1200000, 1200000, "8038_s2", 0, 0),
448 RPM_LDO(L3, 0, 1, 0, 3075000, 3075000, NULL, 0, 0),
449 RPM_LDO(L4, 1, 1, 0, 1800000, 1800000, NULL, 10000, 10000),
450 RPM_LDO(L5, 0, 1, 0, 2950000, 2950000, NULL, 0, 0),
451 RPM_LDO(L6, 0, 1, 0, 2950000, 2950000, NULL, 0, 0),
452 RPM_LDO(L7, 0, 1, 0, 2050000, 2050000, "8038_s4", 0, 0),
453 RPM_LDO(L8, 0, 1, 0, 2800000, 2800000, NULL, 0, 0),
454 RPM_LDO(L9, 0, 1, 0, 2850000, 2850000, NULL, 0, 0),
455 RPM_LDO(L10, 0, 1, 0, 2900000, 2900000, NULL, 0, 0),
456 RPM_LDO(L11, 1, 1, 0, 1800000, 1800000, "8038_s4", 10000, 10000),
457 RPM_LDO(L12, 0, 1, 0, 1200000, 1200000, "8038_s2", 0, 0),
458 RPM_LDO(L14, 0, 1, 0, 1800000, 1800000, NULL, 0, 0),
459 RPM_LDO(L15, 0, 1, 0, 1800000, 2950000, NULL, 0, 0),
460 RPM_LDO(L17, 0, 1, 0, 1800000, 2950000, NULL, 0, 0),
461 RPM_LDO(L18, 0, 1, 0, 1800000, 1800000, NULL, 0, 0),
462 RPM_LDO(L20, 1, 1, 0, 1200000, 1200000, "8038_s2", 10000, 10000),
463 RPM_LDO(L21, 0, 1, 0, 1900000, 1900000, "8038_s4", 0, 0),
464 RPM_LDO(L22, 1, 1, 0, 1850000, 2950000, NULL, 10000, 10000),
465 RPM_LDO(L23, 1, 1, 1, 1800000, 1800000, "8038_s4", 0, 0),
David Collinsad96fa32012-03-02 08:41:38 -0800466 RPM_LDO(L24, 0, 1, 1, 500000, 1150000, "8038_s2", 10000, 10000),
David Collins8af872e2012-01-06 11:31:56 -0800467 RPM_LDO(L26, 1, 1, 0, 1050000, 1050000, "8038_s2", 10000, 10000),
468
469 /* ID a_on pd ss supply */
470 RPM_VS(LVS1, 0, 1, 0, "8038_l11"),
471 RPM_VS(LVS2, 0, 1, 0, "8038_l11"),
David Collins1d4061b2011-12-06 15:36:40 -0800472};
473
474int msm8930_pm8038_regulator_pdata_len __devinitdata =
475 ARRAY_SIZE(msm8930_pm8038_regulator_pdata);
David Collins8af872e2012-01-06 11:31:56 -0800476
477struct rpm_regulator_platform_data msm8930_rpm_regulator_pdata __devinitdata = {
478 .init_data = msm8930_rpm_regulator_init_data,
479 .num_regulators = ARRAY_SIZE(msm8930_rpm_regulator_init_data),
480 .version = RPM_VREG_VERSION_8930,
481 .vreg_id_vdd_mem = RPM_VREG_ID_PM8038_L24,
482 .vreg_id_vdd_dig = RPM_VREG_ID_PM8038_S1,
483};