| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | *  linux/arch/arm26/lib/io-readsb.S | 
|  | 3 | * | 
|  | 4 | *  Copyright (C) 1995-2000 Russell King | 
|  | 5 | * | 
|  | 6 | * This program is free software; you can redistribute it and/or modify | 
|  | 7 | * it under the terms of the GNU General Public License version 2 as | 
|  | 8 | * published by the Free Software Foundation. | 
|  | 9 | */ | 
|  | 10 | #include <linux/linkage.h> | 
|  | 11 | #include <asm/assembler.h> | 
|  | 12 | #include <asm/hardware.h> | 
|  | 13 |  | 
|  | 14 | .insb_align:	rsb	ip, ip, #4 | 
|  | 15 | cmp	ip, r2 | 
|  | 16 | movgt	ip, r2 | 
|  | 17 | cmp	ip, #2 | 
|  | 18 | ldrb	r3, [r0] | 
|  | 19 | strb	r3, [r1], #1 | 
|  | 20 | ldrgeb	r3, [r0] | 
|  | 21 | strgeb	r3, [r1], #1 | 
|  | 22 | ldrgtb	r3, [r0] | 
|  | 23 | strgtb	r3, [r1], #1 | 
|  | 24 | subs	r2, r2, ip | 
|  | 25 | bne	.insb_aligned | 
|  | 26 |  | 
|  | 27 | ENTRY(__raw_readsb) | 
|  | 28 | teq	r2, #0		@ do we have to check for the zero len? | 
|  | 29 | moveq	pc, lr | 
|  | 30 | ands	ip, r1, #3 | 
|  | 31 | bne	.insb_align | 
|  | 32 |  | 
|  | 33 | .insb_aligned:	stmfd	sp!, {r4 - r6, lr} | 
|  | 34 |  | 
|  | 35 | subs	r2, r2, #16 | 
|  | 36 | bmi	.insb_no_16 | 
|  | 37 |  | 
|  | 38 | .insb_16_lp:	ldrb	r3, [r0] | 
|  | 39 | ldrb	r4, [r0] | 
|  | 40 | orr	r3, r3, r4, lsl #8 | 
|  | 41 | ldrb	r4, [r0] | 
|  | 42 | orr	r3, r3, r4, lsl #16 | 
|  | 43 | ldrb	r4, [r0] | 
|  | 44 | orr	r3, r3, r4, lsl #24 | 
|  | 45 | ldrb	r4, [r0] | 
|  | 46 | ldrb	r5, [r0] | 
|  | 47 | orr	r4, r4, r5, lsl #8 | 
|  | 48 | ldrb	r5, [r0] | 
|  | 49 | orr	r4, r4, r5, lsl #16 | 
|  | 50 | ldrb	r5, [r0] | 
|  | 51 | orr	r4, r4, r5, lsl #24 | 
|  | 52 | ldrb	r5, [r0] | 
|  | 53 | ldrb	r6, [r0] | 
|  | 54 | orr	r5, r5, r6, lsl #8 | 
|  | 55 | ldrb	r6, [r0] | 
|  | 56 | orr	r5, r5, r6, lsl #16 | 
|  | 57 | ldrb	r6, [r0] | 
|  | 58 | orr	r5, r5, r6, lsl #24 | 
|  | 59 | ldrb	r6, [r0] | 
|  | 60 | ldrb	ip, [r0] | 
|  | 61 | orr	r6, r6, ip, lsl #8 | 
|  | 62 | ldrb	ip, [r0] | 
|  | 63 | orr	r6, r6, ip, lsl #16 | 
|  | 64 | ldrb	ip, [r0] | 
|  | 65 | orr	r6, r6, ip, lsl #24 | 
|  | 66 | stmia	r1!, {r3 - r6} | 
|  | 67 |  | 
|  | 68 | subs	r2, r2, #16 | 
|  | 69 | bpl	.insb_16_lp | 
|  | 70 |  | 
|  | 71 | tst	r2, #15 | 
|  | 72 | LOADREGS(eqfd, sp!, {r4 - r6, pc}) | 
|  | 73 |  | 
|  | 74 | .insb_no_16:	tst	r2, #8 | 
|  | 75 | beq	.insb_no_8 | 
|  | 76 |  | 
|  | 77 | ldrb	r3, [r0] | 
|  | 78 | ldrb	r4, [r0] | 
|  | 79 | orr	r3, r3, r4, lsl #8 | 
|  | 80 | ldrb	r4, [r0] | 
|  | 81 | orr	r3, r3, r4, lsl #16 | 
|  | 82 | ldrb	r4, [r0] | 
|  | 83 | orr	r3, r3, r4, lsl #24 | 
|  | 84 | ldrb	r4, [r0] | 
|  | 85 | ldrb	r5, [r0] | 
|  | 86 | orr	r4, r4, r5, lsl #8 | 
|  | 87 | ldrb	r5, [r0] | 
|  | 88 | orr	r4, r4, r5, lsl #16 | 
|  | 89 | ldrb	r5, [r0] | 
|  | 90 | orr	r4, r4, r5, lsl #24 | 
|  | 91 | stmia	r1!, {r3, r4} | 
|  | 92 |  | 
|  | 93 | .insb_no_8:	tst	r2, #4 | 
|  | 94 | beq	.insb_no_4 | 
|  | 95 |  | 
|  | 96 | ldrb	r3, [r0] | 
|  | 97 | ldrb	r4, [r0] | 
|  | 98 | orr	r3, r3, r4, lsl #8 | 
|  | 99 | ldrb	r4, [r0] | 
|  | 100 | orr	r3, r3, r4, lsl #16 | 
|  | 101 | ldrb	r4, [r0] | 
|  | 102 | orr	r3, r3, r4, lsl #24 | 
|  | 103 | str	r3, [r1], #4 | 
|  | 104 |  | 
|  | 105 | .insb_no_4:	ands	r2, r2, #3 | 
|  | 106 | LOADREGS(eqfd, sp!, {r4 - r6, pc}) | 
|  | 107 |  | 
|  | 108 | cmp	r2, #2 | 
|  | 109 | ldrb	r3, [r0] | 
|  | 110 | strb	r3, [r1], #1 | 
|  | 111 | ldrgeb	r3, [r0] | 
|  | 112 | strgeb	r3, [r1], #1 | 
|  | 113 | ldrgtb	r3, [r0] | 
|  | 114 | strgtb	r3, [r1] | 
|  | 115 |  | 
|  | 116 | LOADREGS(fd, sp!, {r4 - r6, pc}) |