| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Low-Level PCI Support for SGI Visual Workstation |
| 3 | * |
| 4 | * (c) 1999--2000 Martin Mares <mj@ucw.cz> |
| 5 | */ |
| 6 | |
| 7 | #include <linux/config.h> |
| 8 | #include <linux/kernel.h> |
| 9 | #include <linux/pci.h> |
| 10 | #include <linux/init.h> |
| 11 | |
| 12 | #include "cobalt.h" |
| 13 | #include "lithium.h" |
| 14 | |
| 15 | #include "pci.h" |
| 16 | |
| 17 | |
| 18 | extern struct pci_raw_ops pci_direct_conf1; |
| 19 | |
| 20 | static int pci_visws_enable_irq(struct pci_dev *dev) { return 0; } |
| 21 | |
| 22 | int (*pcibios_enable_irq)(struct pci_dev *dev) = &pci_visws_enable_irq; |
| 23 | |
| 24 | void __init pcibios_penalize_isa_irq(int irq) {} |
| 25 | |
| 26 | |
| 27 | unsigned int pci_bus0, pci_bus1; |
| 28 | |
| 29 | static inline u8 bridge_swizzle(u8 pin, u8 slot) |
| 30 | { |
| 31 | return (((pin - 1) + slot) % 4) + 1; |
| 32 | } |
| 33 | |
| 34 | static u8 __init visws_swizzle(struct pci_dev *dev, u8 *pinp) |
| 35 | { |
| 36 | u8 pin = *pinp; |
| 37 | |
| 38 | while (dev->bus->self) { /* Move up the chain of bridges. */ |
| 39 | pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn)); |
| 40 | dev = dev->bus->self; |
| 41 | } |
| 42 | *pinp = pin; |
| 43 | |
| 44 | return PCI_SLOT(dev->devfn); |
| 45 | } |
| 46 | |
| 47 | static int __init visws_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| 48 | { |
| 49 | int irq, bus = dev->bus->number; |
| 50 | |
| 51 | pin--; |
| 52 | |
| 53 | /* Nothing useful at PIIX4 pin 1 */ |
| 54 | if (bus == pci_bus0 && slot == 4 && pin == 0) |
| 55 | return -1; |
| 56 | |
| 57 | /* PIIX4 USB is on Bus 0, Slot 4, Line 3 */ |
| 58 | if (bus == pci_bus0 && slot == 4 && pin == 3) { |
| 59 | irq = CO_IRQ(CO_APIC_PIIX4_USB); |
| 60 | goto out; |
| 61 | } |
| 62 | |
| 63 | /* First pin spread down 1 APIC entry per slot */ |
| 64 | if (pin == 0) { |
| 65 | irq = CO_IRQ((bus == pci_bus0 ? CO_APIC_PCIB_BASE0 : |
| 66 | CO_APIC_PCIA_BASE0) + slot); |
| 67 | goto out; |
| 68 | } |
| 69 | |
| 70 | /* lines 1,2,3 from any slot is shared in this twirly pattern */ |
| 71 | if (bus == pci_bus1) { |
| 72 | /* lines 1-3 from devices 0 1 rotate over 2 apic entries */ |
| 73 | irq = CO_IRQ(CO_APIC_PCIA_BASE123 + ((slot + (pin - 1)) % 2)); |
| 74 | } else { /* bus == pci_bus0 */ |
| 75 | /* lines 1-3 from devices 0-3 rotate over 3 apic entries */ |
| 76 | if (slot == 0) |
| 77 | slot = 3; /* same pattern */ |
| 78 | irq = CO_IRQ(CO_APIC_PCIA_BASE123 + ((3 - slot) + (pin - 1) % 3)); |
| 79 | } |
| 80 | out: |
| 81 | printk(KERN_DEBUG "PCI: Bus %d Slot %d Line %d -> IRQ %d\n", bus, slot, pin, irq); |
| 82 | return irq; |
| 83 | } |
| 84 | |
| 85 | void __init pcibios_update_irq(struct pci_dev *dev, int irq) |
| 86 | { |
| 87 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); |
| 88 | } |
| 89 | |
| 90 | static int __init pcibios_init(void) |
| 91 | { |
| 92 | /* The VISWS supports configuration access type 1 only */ |
| 93 | pci_probe = (pci_probe | PCI_PROBE_CONF1) & |
| 94 | ~(PCI_PROBE_BIOS | PCI_PROBE_CONF2); |
| 95 | |
| 96 | pci_bus0 = li_pcib_read16(LI_PCI_BUSNUM) & 0xff; |
| 97 | pci_bus1 = li_pcia_read16(LI_PCI_BUSNUM) & 0xff; |
| 98 | |
| 99 | printk(KERN_INFO "PCI: Lithium bridge A bus: %u, " |
| 100 | "bridge B (PIIX4) bus: %u\n", pci_bus1, pci_bus0); |
| 101 | |
| 102 | raw_pci_ops = &pci_direct_conf1; |
| 103 | pci_scan_bus(pci_bus0, &pci_root_ops, NULL); |
| 104 | pci_scan_bus(pci_bus1, &pci_root_ops, NULL); |
| 105 | pci_fixup_irqs(visws_swizzle, visws_map_irq); |
| 106 | pcibios_resource_survey(); |
| 107 | return 0; |
| 108 | } |
| 109 | |
| 110 | subsys_initcall(pcibios_init); |