| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  * | 
 | 3 |  * BRIEF MODULE DESCRIPTION | 
 | 4 |  *	ITE Semi IT8712 Super I/O functions. | 
 | 5 |  * | 
 | 6 |  * Copyright 2001 MontaVista Software Inc. | 
 | 7 |  * Author: MontaVista Software, Inc. | 
 | 8 |  *         	ppopov@mvista.com or source@mvista.com | 
 | 9 |  * | 
 | 10 |  *  This program is free software; you can redistribute  it and/or modify it | 
 | 11 |  *  under  the terms of  the GNU General  Public License as published by the | 
 | 12 |  *  Free Software Foundation;  either version 2 of the  License, or (at your | 
 | 13 |  *  option) any later version. | 
 | 14 |  * | 
 | 15 |  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED | 
 | 16 |  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF | 
 | 17 |  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN | 
 | 18 |  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT, | 
 | 19 |  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | 
 | 20 |  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF | 
 | 21 |  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | 
 | 22 |  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT | 
 | 23 |  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | 
 | 24 |  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 
 | 25 |  * | 
 | 26 |  *  You should have received a copy of the  GNU General Public License along | 
 | 27 |  *  with this program; if not, write  to the Free Software Foundation, Inc., | 
 | 28 |  *  675 Mass Ave, Cambridge, MA 02139, USA. | 
 | 29 |  */ | 
 | 30 |  | 
 | 31 | #include <asm/io.h> | 
 | 32 | #include <asm/types.h> | 
 | 33 | #include <asm/it8712.h> | 
 | 34 | #include <asm/it8172/it8172.h> | 
 | 35 |  | 
 | 36 | #ifndef TRUE | 
 | 37 | #define TRUE 1 | 
 | 38 | #endif | 
 | 39 |  | 
 | 40 | #ifndef FALSE | 
 | 41 | #define FALSE 0 | 
 | 42 | #endif | 
 | 43 |  | 
 | 44 | void LPCEnterMBPnP(void) | 
 | 45 | { | 
 | 46 | 	int i; | 
 | 47 | 	unsigned char key[4] = {0x87, 0x01, 0x55, 0x55}; | 
 | 48 |  | 
 | 49 | 	for (i = 0; i<4; i++) | 
 | 50 | 		outb(key[i], LPC_KEY_ADDR); | 
 | 51 |  | 
 | 52 | } | 
 | 53 |  | 
 | 54 | void LPCExitMBPnP(void) | 
 | 55 | { | 
 | 56 | 	outb(0x02, LPC_KEY_ADDR); | 
 | 57 | 	outb(0x02, LPC_DATA_ADDR); | 
 | 58 | } | 
 | 59 |  | 
 | 60 | void LPCSetConfig(char LdnNumber, char Index, char data) | 
 | 61 | { | 
 | 62 | 	LPCEnterMBPnP();				// Enter IT8712 MB PnP mode | 
 | 63 | 	outb(0x07, LPC_KEY_ADDR); | 
 | 64 | 	outb(LdnNumber, LPC_DATA_ADDR); | 
 | 65 | 	outb(Index, LPC_KEY_ADDR); | 
 | 66 | 	outb(data, LPC_DATA_ADDR); | 
 | 67 | 	LPCExitMBPnP(); | 
 | 68 | } | 
 | 69 |  | 
 | 70 | char LPCGetConfig(char LdnNumber, char Index) | 
 | 71 | { | 
 | 72 | 	char rtn; | 
 | 73 |  | 
 | 74 | 	LPCEnterMBPnP();				// Enter IT8712 MB PnP mode | 
 | 75 | 	outb(0x07, LPC_KEY_ADDR); | 
 | 76 | 	outb(LdnNumber, LPC_DATA_ADDR); | 
 | 77 | 	outb(Index, LPC_KEY_ADDR); | 
 | 78 | 	rtn = inb(LPC_DATA_ADDR); | 
 | 79 | 	LPCExitMBPnP(); | 
 | 80 | 	return rtn; | 
 | 81 | } | 
 | 82 |  | 
 | 83 | int SearchIT8712(void) | 
 | 84 | { | 
 | 85 | 	unsigned char Id1, Id2; | 
 | 86 | 	unsigned short Id; | 
 | 87 |  | 
 | 88 | 	LPCEnterMBPnP(); | 
 | 89 | 	outb(0x20, LPC_KEY_ADDR); /* chip id byte 1 */ | 
 | 90 | 	Id1 = inb(LPC_DATA_ADDR); | 
 | 91 | 	outb(0x21, LPC_KEY_ADDR); /* chip id byte 2 */ | 
 | 92 | 	Id2 = inb(LPC_DATA_ADDR); | 
 | 93 | 	Id = (Id1 << 8) | Id2; | 
 | 94 | 	LPCExitMBPnP(); | 
 | 95 | 	if (Id == 0x8712) | 
 | 96 | 		return TRUE; | 
 | 97 | 	else | 
 | 98 | 		return FALSE; | 
 | 99 | } | 
 | 100 |  | 
 | 101 | void InitLPCInterface(void) | 
 | 102 | { | 
 | 103 | 	unsigned char bus, dev_fn; | 
 | 104 | 	unsigned long data; | 
 | 105 |  | 
 | 106 | 	bus = 0; | 
 | 107 | 	dev_fn = 1<<3 | 4; | 
 | 108 |  | 
 | 109 |  | 
 | 110 | 	/* pci cmd, SERR# Enable */ | 
 | 111 | 	IT_WRITE(IT_CONFADDR, | 
 | 112 | 		 (bus         << IT_BUSNUM_SHF)   | | 
 | 113 | 		 (dev_fn      << IT_FUNCNUM_SHF) | | 
 | 114 | 		 ((0x4 / 4) << IT_REGNUM_SHF)); | 
 | 115 | 	IT_READ(IT_CONFDATA, data); | 
 | 116 | 	data |= 0x0100; | 
 | 117 | 	IT_WRITE(IT_CONFADDR, | 
 | 118 | 		 (bus         << IT_BUSNUM_SHF)   | | 
 | 119 | 		 (dev_fn      << IT_FUNCNUM_SHF) | | 
 | 120 | 		 ((0x4 / 4) << IT_REGNUM_SHF)); | 
 | 121 | 	IT_WRITE(IT_CONFDATA, data); | 
 | 122 |  | 
 | 123 | 	/* setup serial irq control register */ | 
 | 124 | 	IT_WRITE(IT_CONFADDR, | 
 | 125 | 		 (bus         << IT_BUSNUM_SHF)   | | 
 | 126 | 		 (dev_fn      << IT_FUNCNUM_SHF) | | 
 | 127 | 		 ((0x48 / 4) << IT_REGNUM_SHF)); | 
 | 128 | 	IT_READ(IT_CONFDATA, data); | 
 | 129 | 	data  = (data & 0xffff00ff) | 0xc400; | 
 | 130 | 	IT_WRITE(IT_CONFADDR, | 
 | 131 | 		 (bus         << IT_BUSNUM_SHF)   | | 
 | 132 | 		 (dev_fn      << IT_FUNCNUM_SHF) | | 
 | 133 | 		 ((0x48 / 4) << IT_REGNUM_SHF)); | 
 | 134 | 	IT_WRITE(IT_CONFDATA, data); | 
 | 135 |  | 
 | 136 |  | 
 | 137 | 	/* Enable I/O Space Subtractive Decode */ | 
 | 138 | 	/* default 0x4C is 0x3f220000 */ | 
 | 139 | 	IT_WRITE(IT_CONFADDR, | 
 | 140 | 		 (bus         << IT_BUSNUM_SHF)   | | 
 | 141 | 		 (dev_fn      << IT_FUNCNUM_SHF) | | 
 | 142 | 		 ((0x4C / 4) << IT_REGNUM_SHF)); | 
 | 143 | 	IT_WRITE(IT_CONFDATA, 0x3f2200f3); | 
 | 144 | } |