| Huang Shijie | 4e82786 | 2011-12-13 23:48:05 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along |
| 15 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. |
| 17 | */ |
| 18 | |
| 19 | #ifndef __MACH_MXS_GPMI_NAND_H__ |
| 20 | #define __MACH_MXS_GPMI_NAND_H__ |
| 21 | |
| 22 | /* The size of the resources is fixed. */ |
| 23 | #define GPMI_NAND_RES_SIZE 6 |
| 24 | |
| 25 | /* Resource names for the GPMI NAND driver. */ |
| 26 | #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "GPMI NAND GPMI Registers" |
| 27 | #define GPMI_NAND_GPMI_INTERRUPT_RES_NAME "GPMI NAND GPMI Interrupt" |
| 28 | #define GPMI_NAND_BCH_REGS_ADDR_RES_NAME "GPMI NAND BCH Registers" |
| 29 | #define GPMI_NAND_BCH_INTERRUPT_RES_NAME "GPMI NAND BCH Interrupt" |
| 30 | #define GPMI_NAND_DMA_CHANNELS_RES_NAME "GPMI NAND DMA Channels" |
| 31 | #define GPMI_NAND_DMA_INTERRUPT_RES_NAME "GPMI NAND DMA Interrupt" |
| 32 | |
| 33 | /** |
| 34 | * struct gpmi_nand_platform_data - GPMI NAND driver platform data. |
| 35 | * |
| 36 | * This structure communicates platform-specific information to the GPMI NAND |
| 37 | * driver that can't be expressed as resources. |
| 38 | * |
| 39 | * @platform_init: A pointer to a function the driver will call to |
| 40 | * initialize the platform (e.g., set up the pin mux). |
| 41 | * @min_prop_delay_in_ns: Minimum propagation delay of GPMI signals to and |
| 42 | * from the NAND Flash device, in nanoseconds. |
| 43 | * @max_prop_delay_in_ns: Maximum propagation delay of GPMI signals to and |
| 44 | * from the NAND Flash device, in nanoseconds. |
| 45 | * @max_chip_count: The maximum number of chips for which the driver |
| 46 | * should configure the hardware. This value most |
| 47 | * likely reflects the number of pins that are |
| 48 | * connected to a NAND Flash device. If this is |
| 49 | * greater than the SoC hardware can support, the |
| 50 | * driver will print a message and fail to initialize. |
| 51 | * @partitions: An optional pointer to an array of partition |
| 52 | * descriptions. |
| 53 | * @partition_count: The number of elements in the partitions array. |
| 54 | */ |
| 55 | struct gpmi_nand_platform_data { |
| 56 | /* SoC hardware information. */ |
| 57 | int (*platform_init)(void); |
| 58 | |
| 59 | /* NAND Flash information. */ |
| 60 | unsigned int min_prop_delay_in_ns; |
| 61 | unsigned int max_prop_delay_in_ns; |
| 62 | unsigned int max_chip_count; |
| 63 | |
| 64 | /* Medium information. */ |
| 65 | struct mtd_partition *partitions; |
| 66 | unsigned partition_count; |
| 67 | }; |
| 68 | #endif |