| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 |  | 
|  | 2 | #define CSTART       0x400L | 
|  | 3 | #define CMAX         0x800L | 
|  | 4 | #define ISTART       0x800L | 
|  | 5 | #define IMAX         0xC00L | 
|  | 6 | #define CIN          0xD10L | 
|  | 7 | #define GLOBAL       0xD10L | 
|  | 8 | #define EIN          0xD18L | 
|  | 9 | #define FEPSTAT      0xD20L | 
|  | 10 | #define CHANSTRUCT   0x1000L | 
|  | 11 | #define RXTXBUF      0x4000L | 
|  | 12 |  | 
|  | 13 |  | 
|  | 14 | struct global_data | 
|  | 15 | { | 
| Alan Cox | f2cf8e2 | 2005-09-06 15:16:44 -0700 | [diff] [blame] | 16 | u16 cin; | 
|  | 17 | u16 cout; | 
|  | 18 | u16 cstart; | 
|  | 19 | u16 cmax; | 
|  | 20 | u16 ein; | 
|  | 21 | u16 eout; | 
|  | 22 | u16 istart; | 
|  | 23 | u16 imax; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | }; | 
|  | 25 |  | 
|  | 26 |  | 
|  | 27 | struct board_chan | 
|  | 28 | { | 
| Alan Cox | f2cf8e2 | 2005-09-06 15:16:44 -0700 | [diff] [blame] | 29 | u32 filler1; | 
|  | 30 | u32 filler2; | 
|  | 31 | u16 tseg; | 
|  | 32 | u16 tin; | 
|  | 33 | u16 tout; | 
|  | 34 | u16 tmax; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 |  | 
| Alan Cox | f2cf8e2 | 2005-09-06 15:16:44 -0700 | [diff] [blame] | 36 | u16 rseg; | 
|  | 37 | u16 rin; | 
|  | 38 | u16 rout; | 
|  | 39 | u16 rmax; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 |  | 
| Alan Cox | f2cf8e2 | 2005-09-06 15:16:44 -0700 | [diff] [blame] | 41 | u16 tlow; | 
|  | 42 | u16 rlow; | 
|  | 43 | u16 rhigh; | 
|  | 44 | u16 incr; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 |  | 
| Alan Cox | f2cf8e2 | 2005-09-06 15:16:44 -0700 | [diff] [blame] | 46 | u16 etime; | 
|  | 47 | u16 edelay; | 
|  | 48 | unchar *dev; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 |  | 
| Alan Cox | f2cf8e2 | 2005-09-06 15:16:44 -0700 | [diff] [blame] | 50 | u16 iflag; | 
|  | 51 | u16 oflag; | 
|  | 52 | u16 cflag; | 
|  | 53 | u16 gmask; | 
|  | 54 |  | 
|  | 55 | u16 col; | 
|  | 56 | u16 delay; | 
|  | 57 | u16 imask; | 
|  | 58 | u16 tflush; | 
|  | 59 |  | 
|  | 60 | u32 filler3; | 
|  | 61 | u32 filler4; | 
|  | 62 | u32 filler5; | 
|  | 63 | u32 filler6; | 
|  | 64 |  | 
|  | 65 | u8 num; | 
|  | 66 | u8 ract; | 
|  | 67 | u8 bstat; | 
|  | 68 | u8 tbusy; | 
|  | 69 | u8 iempty; | 
|  | 70 | u8 ilow; | 
|  | 71 | u8 idata; | 
|  | 72 | u8 eflag; | 
|  | 73 |  | 
|  | 74 | u8 tflag; | 
|  | 75 | u8 rflag; | 
|  | 76 | u8 xmask; | 
|  | 77 | u8 xval; | 
|  | 78 | u8 mstat; | 
|  | 79 | u8 mchange; | 
|  | 80 | u8 mint; | 
|  | 81 | u8 lstat; | 
|  | 82 |  | 
|  | 83 | u8 mtran; | 
|  | 84 | u8 orun; | 
|  | 85 | u8 startca; | 
|  | 86 | u8 stopca; | 
|  | 87 | u8 startc; | 
|  | 88 | u8 stopc; | 
|  | 89 | u8 vnext; | 
|  | 90 | u8 hflow; | 
|  | 91 |  | 
|  | 92 | u8 fillc; | 
|  | 93 | u8 ochar; | 
|  | 94 | u8 omask; | 
|  | 95 |  | 
|  | 96 | u8 filler7; | 
|  | 97 | u8 filler8[28]; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 98 | }; | 
|  | 99 |  | 
|  | 100 |  | 
|  | 101 | #define SRXLWATER      0xE0 | 
|  | 102 | #define SRXHWATER      0xE1 | 
|  | 103 | #define STOUT          0xE2 | 
|  | 104 | #define PAUSETX        0xE3 | 
|  | 105 | #define RESUMETX       0xE4 | 
|  | 106 | #define SAUXONOFFC     0xE6 | 
|  | 107 | #define SENDBREAK      0xE8 | 
|  | 108 | #define SETMODEM       0xE9 | 
|  | 109 | #define SETIFLAGS      0xEA | 
|  | 110 | #define SONOFFC        0xEB | 
|  | 111 | #define STXLWATER      0xEC | 
|  | 112 | #define PAUSERX        0xEE | 
|  | 113 | #define RESUMERX       0xEF | 
|  | 114 | #define SETBUFFER      0xF2 | 
|  | 115 | #define SETCOOKED      0xF3 | 
|  | 116 | #define SETHFLOW       0xF4 | 
|  | 117 | #define SETCTRLFLAGS   0xF5 | 
|  | 118 | #define SETVNEXT       0xF6 | 
|  | 119 |  | 
|  | 120 |  | 
|  | 121 |  | 
|  | 122 | #define BREAK_IND        0x01 | 
|  | 123 | #define LOWTX_IND        0x02 | 
|  | 124 | #define EMPTYTX_IND      0x04 | 
|  | 125 | #define DATA_IND         0x08 | 
|  | 126 | #define MODEMCHG_IND     0x20 | 
|  | 127 |  | 
|  | 128 | #define FEP_HUPCL  0002000 | 
|  | 129 | #if 0 | 
|  | 130 | #define RTS   0x02 | 
|  | 131 | #define CD    0x08 | 
|  | 132 | #define DSR   0x10 | 
|  | 133 | #define CTS   0x20 | 
|  | 134 | #define RI    0x40 | 
|  | 135 | #define DTR   0x80 | 
|  | 136 | #endif |