blob: 6be0a249a8df1e3b0e4bf6e3319c00497dc00eda [file] [log] [blame]
Albert Herranz7657c3a2009-12-17 15:27:20 -08001/*
2 * Freescale eSDHC controller driver.
3 *
4 * Copyright (c) 2007 Freescale Semiconductor, Inc.
5 * Copyright (c) 2009 MontaVista Software, Inc.
6 *
7 * Authors: Xiaobo Xie <X.Xie@freescale.com>
8 * Anton Vorontsov <avorontsov@ru.mvista.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 */
15
16#include <linux/io.h>
17#include <linux/delay.h>
Paul Gortmakera4df3ae2011-07-03 15:15:51 -040018#include <linux/module.h>
Albert Herranz7657c3a2009-12-17 15:27:20 -080019#include <linux/mmc/host.h>
20#include "sdhci-of.h"
21#include "sdhci.h"
Wolfram Sang80872e22010-10-15 12:21:03 +020022#include "sdhci-esdhc.h"
Albert Herranz7657c3a2009-12-17 15:27:20 -080023
24static u16 esdhc_readw(struct sdhci_host *host, int reg)
25{
26 u16 ret;
27
28 if (unlikely(reg == SDHCI_HOST_VERSION))
29 ret = in_be16(host->ioaddr + reg);
30 else
31 ret = sdhci_be32bs_readw(host, reg);
32 return ret;
33}
34
35static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
36{
37 if (reg == SDHCI_BLOCK_SIZE) {
38 /*
39 * Two last DMA bits are reserved, and first one is used for
40 * non-standard blksz of 4096 bytes that we don't support
41 * yet. So clear the DMA boundary bits.
42 */
43 val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
44 }
45 sdhci_be32bs_writew(host, val, reg);
46}
47
48static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
49{
50 /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
51 if (reg == SDHCI_HOST_CONTROL)
52 val &= ~ESDHC_HOST_CONTROL_RES;
53 sdhci_be32bs_writeb(host, val, reg);
54}
55
Wolfram Sang80872e22010-10-15 12:21:03 +020056static int esdhc_of_enable_dma(struct sdhci_host *host)
Albert Herranz7657c3a2009-12-17 15:27:20 -080057{
58 setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP);
59 return 0;
60}
61
Wolfram Sang80872e22010-10-15 12:21:03 +020062static unsigned int esdhc_of_get_max_clock(struct sdhci_host *host)
Albert Herranz7657c3a2009-12-17 15:27:20 -080063{
64 struct sdhci_of_host *of_host = sdhci_priv(host);
65
66 return of_host->clock;
67}
68
Wolfram Sang80872e22010-10-15 12:21:03 +020069static unsigned int esdhc_of_get_min_clock(struct sdhci_host *host)
Albert Herranz7657c3a2009-12-17 15:27:20 -080070{
71 struct sdhci_of_host *of_host = sdhci_priv(host);
72
73 return of_host->clock / 256 / 16;
74}
75
76struct sdhci_of_data sdhci_esdhc = {
Wolfram Sang3bb2a9f2011-02-26 14:44:40 +010077 /* card detection could be handled via GPIO */
Richard Zhue481e452011-03-21 13:22:13 +080078 .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION
79 | SDHCI_QUIRK_NO_CARD_NO_RESET,
Albert Herranz7657c3a2009-12-17 15:27:20 -080080 .ops = {
Matt Flemingdc297c92010-05-26 14:42:03 -070081 .read_l = sdhci_be32bs_readl,
82 .read_w = esdhc_readw,
83 .read_b = sdhci_be32bs_readb,
84 .write_l = sdhci_be32bs_writel,
85 .write_w = esdhc_writew,
86 .write_b = esdhc_writeb,
Albert Herranz7657c3a2009-12-17 15:27:20 -080087 .set_clock = esdhc_set_clock,
Wolfram Sang80872e22010-10-15 12:21:03 +020088 .enable_dma = esdhc_of_enable_dma,
89 .get_max_clock = esdhc_of_get_max_clock,
90 .get_min_clock = esdhc_of_get_min_clock,
Albert Herranz7657c3a2009-12-17 15:27:20 -080091 },
92};