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Mauro Carvalho Chehab7dfba002009-06-29 05:41:26 -03001/*
2 * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
3 *
4 * Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com)
5 * This code is placed under the terms of the GNU General Public License v2
6 */
7
8#include <linux/i2c.h>
9#include <linux/videodev2.h>
10#include <linux/delay.h>
11#include <media/v4l2-device.h>
12#include "mt9v011.h"
13#include <media/v4l2-i2c-drv.h>
14#include <media/v4l2-chip-ident.h>
15
16MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
17MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
18MODULE_LICENSE("GPL");
19
20
21static int debug;
22module_param(debug, int, 0);
23MODULE_PARM_DESC(debug, "Debug level (0-2)");
24
25/* supported controls */
26static struct v4l2_queryctrl mt9v011_qctrl[] = {
27 {
28 .id = V4L2_CID_GAIN,
29 .type = V4L2_CTRL_TYPE_INTEGER,
30 .name = "Gain",
31 .minimum = 0,
32 .maximum = (1 << 10) - 1,
33 .step = 1,
34 .default_value = 0x0020,
35 .flags = 0,
36 }, {
37 .id = V4L2_CID_RED_BALANCE,
38 .type = V4L2_CTRL_TYPE_INTEGER,
39 .name = "Red Balance",
40 .minimum = -1 << 9,
41 .maximum = (1 << 9) - 1,
42 .step = 1,
43 .default_value = 0,
44 .flags = 0,
45 }, {
46 .id = V4L2_CID_BLUE_BALANCE,
47 .type = V4L2_CTRL_TYPE_INTEGER,
48 .name = "Blue Balance",
49 .minimum = -1 << 9,
50 .maximum = (1 << 9) - 1,
51 .step = 1,
52 .default_value = 0,
53 .flags = 0,
54 },
55};
56
57struct mt9v011 {
58 struct v4l2_subdev sd;
59
60 u16 global_gain, red_bal, blue_bal;
61};
62
63static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
64{
65 return container_of(sd, struct mt9v011, sd);
66}
67
68static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
69{
70 struct i2c_client *c = v4l2_get_subdevdata(sd);
71 __be16 buffer;
72 int rc, val;
73
74 if (1 != (rc = i2c_master_send(c, &addr, 1)))
75 v4l2_dbg(0, debug, sd,
76 "i2c i/o error: rc == %d (should be 1)\n", rc);
77
78 msleep(10);
79
80 if (2 != (rc = i2c_master_recv(c, (char *)&buffer, 2)))
81 v4l2_dbg(0, debug, sd,
82 "i2c i/o error: rc == %d (should be 1)\n", rc);
83
84 val = be16_to_cpu(buffer);
85
86 v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
87
88 return val;
89}
90
91static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
92 u16 value)
93{
94 struct i2c_client *c = v4l2_get_subdevdata(sd);
95 unsigned char buffer[3];
96 int rc;
97
98 buffer[0] = addr;
99 buffer[1] = value >> 8;
100 buffer[2] = value & 0xff;
101
102 v4l2_dbg(2, debug, sd,
103 "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
104 if (3 != (rc = i2c_master_send(c, buffer, 3)))
105 v4l2_dbg(0, debug, sd,
106 "i2c i/o error: rc == %d (should be 3)\n", rc);
107}
108
109
110struct i2c_reg_value {
111 unsigned char reg;
112 u16 value;
113};
114
115/*
116 * Values used at the original driver
117 * Some values are marked as Reserved at the datasheet
118 */
119static const struct i2c_reg_value mt9v011_init_default[] = {
Mauro Carvalho Chehab7dfba002009-06-29 05:41:26 -0300120 { R0D_MT9V011_RESET, 0x0001 },
121 { R0D_MT9V011_RESET, 0x0000 },
Mauro Carvalho Chehabafe09f82009-06-29 11:03:22 -0300122
Mauro Carvalho Chehab7dfba002009-06-29 05:41:26 -0300123 { R01_MT9V011_ROWSTART, 0x0008 },
124 { R02_MT9V011_COLSTART, 0x0014 },
125 { R03_MT9V011_HEIGHT, 0x01e0 },
126 { R04_MT9V011_WIDTH, 0x0280 },
Mauro Carvalho Chehabafe09f82009-06-29 11:03:22 -0300127 { R05_MT9V011_HBLANK, 0x007b },
128 { R06_MT9V011_VBLANK, 0x001c },
129 { R09_MT9V011_SHUTTER_WIDTH, 0x0418 },
Mauro Carvalho Chehab7dfba002009-06-29 05:41:26 -0300130 { R0A_MT9V011_CLK_SPEED, 0x0000 },
Mauro Carvalho Chehabafe09f82009-06-29 11:03:22 -0300131 { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
132 { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
133 { R20_MT9V011_READ_MODE, 0x1100 },
134
135 /*
136 * Those registers are not docummented at the datasheet.
137 * However, the original driver initializes them
138 */
Mauro Carvalho Chehab7dfba002009-06-29 05:41:26 -0300139 { 0x30, 0x0005 },
140 { 0x34, 0x0100 },
141 { 0x3d, 0x068f },
142 { 0x40, 0x01e0 },
143 { 0x52, 0x0100 },
144 { 0x58, 0x0038 }, /* Datasheet default 0x0078 */
145 { 0x59, 0x0723 }, /* Datasheet default 0x0703 */
146 { 0x62, 0x041a }, /* Datasheet default 0x0418 */
Mauro Carvalho Chehabafe09f82009-06-29 11:03:22 -0300147
148 { R07_MT9V011_OUT_CTRL, 0x000a }, /* chip enable */
Mauro Carvalho Chehab7dfba002009-06-29 05:41:26 -0300149};
150
151static void set_balance(struct v4l2_subdev *sd)
152{
153 struct mt9v011 *core = to_mt9v011(sd);
154 u16 green1_gain, green2_gain, blue_gain, red_gain;
155
156 green1_gain = core->global_gain;
157 green2_gain = core->global_gain;
158
159 blue_gain = core->global_gain +
160 core->global_gain * core->blue_bal / (1 << 9);
161
162 red_gain = core->global_gain +
163 core->global_gain * core->blue_bal / (1 << 9);
164
165 mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green1_gain);
166 mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green1_gain);
167 mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
168 mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
169}
170
171static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
172{
173 u16 version;
174 int i;
175
176 version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
177
178 if (version != MT9V011_VERSION) {
179 v4l2_info(sd, "*** unknown micron chip detected (0x%04x.\n",
180 version);
181 return -EINVAL;
182
183 }
184
185 for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
186 mt9v011_write(sd, mt9v011_init_default[i].reg,
187 mt9v011_init_default[i].value);
188
189 set_balance(sd);
190
191 return 0;
192};
193
194static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
195{
196 struct mt9v011 *core = to_mt9v011(sd);
197
198 v4l2_dbg(1, debug, sd, "g_ctrl called\n");
199
200 switch (ctrl->id) {
201 case V4L2_CID_GAIN:
202 ctrl->value = core->global_gain;
203 return 0;
204 case V4L2_CID_RED_BALANCE:
205 ctrl->value = core->red_bal;
206 return 0;
207 case V4L2_CID_BLUE_BALANCE:
208 ctrl->value = core->blue_bal;
209 return 0;
210 }
211 return -EINVAL;
212}
213
214static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
215{
216 struct mt9v011 *core = to_mt9v011(sd);
217 u8 i, n;
218 n = ARRAY_SIZE(mt9v011_qctrl);
219
220 for (i = 0; i < n; i++) {
221 if (ctrl->id != mt9v011_qctrl[i].id)
222 continue;
223 if (ctrl->value < mt9v011_qctrl[i].minimum ||
224 ctrl->value > mt9v011_qctrl[i].maximum)
225 return -ERANGE;
226 v4l2_dbg(1, debug, sd, "s_ctrl: id=%d, value=%d\n",
227 ctrl->id, ctrl->value);
228 break;
229 }
230
231 switch (ctrl->id) {
232 case V4L2_CID_GAIN:
233 core->global_gain = ctrl->value;
234 break;
235 case V4L2_CID_RED_BALANCE:
236 core->red_bal = ctrl->value;
237 break;
238 case V4L2_CID_BLUE_BALANCE:
239 core->blue_bal = ctrl->value;
240 break;
241 default:
242 return -EINVAL;
243 }
244
245 set_balance(sd);
246
247 return 0;
248}
249
250#ifdef CONFIG_VIDEO_ADV_DEBUG
251static int mt9v011_g_register(struct v4l2_subdev *sd,
252 struct v4l2_dbg_register *reg)
253{
254 struct i2c_client *client = v4l2_get_subdevdata(sd);
255
256 if (!v4l2_chip_match_i2c_client(client, &reg->match))
257 return -EINVAL;
258 if (!capable(CAP_SYS_ADMIN))
259 return -EPERM;
260
261 reg->val = mt9v011_read(sd, reg->reg & 0xff);
262 reg->size = 2;
263
264 return 0;
265}
266
267static int mt9v011_s_register(struct v4l2_subdev *sd,
268 struct v4l2_dbg_register *reg)
269{
270 struct i2c_client *client = v4l2_get_subdevdata(sd);
271
272 if (!v4l2_chip_match_i2c_client(client, &reg->match))
273 return -EINVAL;
274 if (!capable(CAP_SYS_ADMIN))
275 return -EPERM;
276
277 mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
278
279 return 0;
280}
281#endif
282
283static int mt9v011_g_chip_ident(struct v4l2_subdev *sd,
284 struct v4l2_dbg_chip_ident *chip)
285{
286 struct i2c_client *client = v4l2_get_subdevdata(sd);
287
288 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_MT9V011,
289 MT9V011_VERSION);
290}
291
292static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
293 .g_ctrl = mt9v011_g_ctrl,
294 .s_ctrl = mt9v011_s_ctrl,
295 .reset = mt9v011_reset,
296 .g_chip_ident = mt9v011_g_chip_ident,
297#ifdef CONFIG_VIDEO_ADV_DEBUG
298 .g_register = mt9v011_g_register,
299 .s_register = mt9v011_s_register,
300#endif
301};
302
303static const struct v4l2_subdev_ops mt9v011_ops = {
304 .core = &mt9v011_core_ops,
305};
306
307
308/****************************************************************************
309 I2C Client & Driver
310 ****************************************************************************/
311
312static int mt9v011_probe(struct i2c_client *c,
313 const struct i2c_device_id *id)
314{
315 struct mt9v011 *core;
316 struct v4l2_subdev *sd;
317
318 /* Check if the adapter supports the needed features */
319 if (!i2c_check_functionality(c->adapter,
320 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
321 return -EIO;
322
323 core = kzalloc(sizeof(struct mt9v011), GFP_KERNEL);
324 if (!core)
325 return -ENOMEM;
326
327 core->global_gain = 0x0024;
328
329 sd = &core->sd;
330 v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
331 v4l_info(c, "chip found @ 0x%02x (%s)\n",
332 c->addr << 1, c->adapter->name);
333
334 return 0;
335}
336
337static int mt9v011_remove(struct i2c_client *c)
338{
339 struct v4l2_subdev *sd = i2c_get_clientdata(c);
340
341 v4l2_dbg(1, debug, sd,
342 "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
343 c->addr << 1);
344
345 v4l2_device_unregister_subdev(sd);
346 kfree(to_mt9v011(sd));
347 return 0;
348}
349
350/* ----------------------------------------------------------------------- */
351
352static const struct i2c_device_id mt9v011_id[] = {
353 { "mt9v011", 0 },
354 { }
355};
356MODULE_DEVICE_TABLE(i2c, mt9v011_id);
357
358static struct v4l2_i2c_driver_data v4l2_i2c_data = {
359 .name = "mt9v011",
360 .probe = mt9v011_probe,
361 .remove = mt9v011_remove,
362 .id_table = mt9v011_id,
363};