blob: 3870afd8bcb2366b3cf7c2458d383c18139e5cd8 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/sched.h>
17#include <linux/time.h>
18#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/spinlock.h>
21#include <linux/hrtimer.h>
22#include <linux/clk.h>
23#include <mach/hardware.h>
24#include <linux/io.h>
25#include <linux/debugfs.h>
26#include <linux/fb.h>
27#include <linux/msm_mdp.h>
28#include <linux/file.h>
29#include <linux/android_pmem.h>
30#include <linux/major.h>
31#include <asm/system.h>
32#include <asm/mach-types.h>
33#include <linux/semaphore.h>
34#include <linux/uaccess.h>
35#include <linux/mutex.h>
36#include <linux/msm_kgsl.h>
37#include "mdp.h"
38#include "msm_fb.h"
39#include "mdp4.h"
40
41#define VERSION_KEY_MASK 0xFFFFFF00
42
43struct mdp4_overlay_ctrl {
44 struct mdp4_pipe_desc ov_pipe[OVERLAY_PIPE_MAX];/* 4 */
45 struct mdp4_overlay_pipe plist[MDP4_MAX_PIPE]; /* 4 + 2 */
kuogee hsieh405dc302011-07-21 15:06:59 -070046 struct mdp4_overlay_pipe *stage[MDP4_MAX_MIXER][MDP4_MIXER_STAGE_MAX];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070047 uint32 panel_3d;
48 uint32 panel_mode;
49 uint32 mixer0_played;
50 uint32 mixer1_played;
51} mdp4_overlay_db = {
52 .ov_pipe = {
53 {
54 .share = 0, /* RGB 1 */
55 },
56 {
57 .share = 0, /* RGB 2 */
58 },
59 {
60 .share = 1, /* VG 1 */
61 },
62 {
63 .share = 1, /* VG 2 */
64 },
65 },
66 .plist = {
67 {
68 .pipe_type = OVERLAY_TYPE_RGB,
69 .pipe_num = OVERLAY_PIPE_RGB1,
70 .pipe_ndx = 1,
71 },
72 {
73 .pipe_type = OVERLAY_TYPE_RGB,
74 .pipe_num = OVERLAY_PIPE_RGB2,
75 .pipe_ndx = 2,
76 },
77 {
78 .pipe_type = OVERLAY_TYPE_RGB, /* shared */
79 .pipe_num = OVERLAY_PIPE_VG1,
80 .pipe_ndx = 3,
81 },
82 {
83 .pipe_type = OVERLAY_TYPE_RGB, /* shared */
84 .pipe_num = OVERLAY_PIPE_VG2,
85 .pipe_ndx = 4,
86 },
87 {
88 .pipe_type = OVERLAY_TYPE_VIDEO, /* shared */
89 .pipe_num = OVERLAY_PIPE_VG1,
90 .pipe_ndx = 5,
91 },
92 {
93 .pipe_type = OVERLAY_TYPE_VIDEO, /* shared */
94 .pipe_num = OVERLAY_PIPE_VG2,
95 .pipe_ndx = 6,
96 },
97 },
98};
99
100static struct mdp4_overlay_ctrl *ctrl = &mdp4_overlay_db;
kuogee hsieh9452ecb2011-08-01 18:26:23 -0700101static int new_perf_level;
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -0700102
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700103/* static array with index 0 for unset status and 1 for set status */
104static bool overlay_status[MDP4_OVERLAY_TYPE_MAX];
105
106void mdp4_overlay_status_write(enum mdp4_overlay_status type, bool val)
107{
108 overlay_status[type] = val;
109}
110
111bool mdp4_overlay_status_read(enum mdp4_overlay_status type)
112{
113 return overlay_status[type];
114}
115
116int mdp4_overlay_mixer_play(int mixer_num)
117{
118 if (mixer_num == MDP4_MIXER1)
119 return ctrl->mixer1_played;
120 else
121 return ctrl->mixer0_played;
122}
123
124void mdp4_overlay_panel_3d(int mixer_num, uint32 panel_3d)
125{
126 ctrl->panel_3d = panel_3d;
127}
128
129void mdp4_overlay_panel_mode(int mixer_num, uint32 mode)
130{
131 ctrl->panel_mode |= mode;
132}
133
134uint32 mdp4_overlay_panel_list(void)
135{
136 return ctrl->panel_mode;
137}
138
139void mdp4_overlay_dmae_cfg(struct msm_fb_data_type *mfd, int atv)
140{
141 uint32 dmae_cfg_reg;
142
143 if (atv)
144 dmae_cfg_reg = DMA_DEFLKR_EN;
145 else
146 dmae_cfg_reg = 0;
147
148 if (mfd->fb_imgType == MDP_BGR_565)
149 dmae_cfg_reg |= DMA_PACK_PATTERN_BGR;
150 else
151 dmae_cfg_reg |= DMA_PACK_PATTERN_RGB;
152
153
154 if (mfd->panel_info.bpp == 18) {
155 dmae_cfg_reg |= DMA_DSTC0G_6BITS | /* 666 18BPP */
156 DMA_DSTC1B_6BITS | DMA_DSTC2R_6BITS;
157 } else if (mfd->panel_info.bpp == 16) {
158 dmae_cfg_reg |= DMA_DSTC0G_6BITS | /* 565 16BPP */
159 DMA_DSTC1B_5BITS | DMA_DSTC2R_5BITS;
160 } else {
161 dmae_cfg_reg |= DMA_DSTC0G_8BITS | /* 888 16BPP */
162 DMA_DSTC1B_8BITS | DMA_DSTC2R_8BITS;
163 }
164
165 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
166
167 /* dma2 config register */
168 MDP_OUTP(MDP_BASE + 0xb0000, dmae_cfg_reg);
169 if (atv) {
170 MDP_OUTP(MDP_BASE + 0xb0070, 0xeb0010);
171 MDP_OUTP(MDP_BASE + 0xb0074, 0xf00010);
172 MDP_OUTP(MDP_BASE + 0xb0078, 0xf00010);
173 MDP_OUTP(MDP_BASE + 0xb3000, 0x80);
174 MDP_OUTP(MDP_BASE + 0xb3010, 0x1800040);
175 MDP_OUTP(MDP_BASE + 0xb3014, 0x1000080);
176 MDP_OUTP(MDP_BASE + 0xb4004, 0x67686970);
177 } else {
178 MDP_OUTP(MDP_BASE + 0xb0070, 0xff0000);
179 MDP_OUTP(MDP_BASE + 0xb0074, 0xff0000);
180 MDP_OUTP(MDP_BASE + 0xb0078, 0xff0000);
181 }
182
183 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
184}
185
Manoj Raob91fa712011-06-29 09:07:55 -0700186#ifdef CONFIG_FB_MSM_HDMI_3D
187void unfill_black_screen(void) { return; }
188#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700189void unfill_black_screen(void)
190{
191 uint32 temp_src_format;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700192 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
193 /*
194 * VG2 Constant Color
195 */
196 temp_src_format = inpdw(MDP_BASE + 0x30050);
197 MDP_OUTP(MDP_BASE + 0x30050, temp_src_format&(~BIT(22)));
198 /*
199 * MDP_OVERLAY_REG_FLUSH
200 */
201 MDP_OUTP(MDP_BASE + 0x18000, BIT(3));
202 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
Manoj Raob91fa712011-06-29 09:07:55 -0700203 return;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700204}
Manoj Raob91fa712011-06-29 09:07:55 -0700205#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700206
Manoj Raob91fa712011-06-29 09:07:55 -0700207#ifdef CONFIG_FB_MSM_HDMI_3D
208void fill_black_screen(void) { return; }
209#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700210void fill_black_screen(void)
211{
212 /*Black color*/
213 uint32 color = 0x00000000;
214 uint32 temp_src_format;
215 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
216 /*
217 * VG2 Constant Color
218 */
219 MDP_OUTP(MDP_BASE + 0x31008, color);
220 /*
221 * MDP_VG2_SRC_FORMAT
222 */
223 temp_src_format = inpdw(MDP_BASE + 0x30050);
224 MDP_OUTP(MDP_BASE + 0x30050, temp_src_format | BIT(22));
225 /*
226 * MDP_OVERLAY_REG_FLUSH
227 */
228 MDP_OUTP(MDP_BASE + 0x18000, BIT(3));
229 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
Manoj Raob91fa712011-06-29 09:07:55 -0700230 return;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700231}
Manoj Raob91fa712011-06-29 09:07:55 -0700232#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700233
234void mdp4_overlay_dmae_xy(struct mdp4_overlay_pipe *pipe)
235{
236
237 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
238
239 /* dma_p source */
240 MDP_OUTP(MDP_BASE + 0xb0004,
241 (pipe->src_height << 16 | pipe->src_width));
242 MDP_OUTP(MDP_BASE + 0xb0008, pipe->srcp0_addr);
243 MDP_OUTP(MDP_BASE + 0xb000c, pipe->srcp0_ystride);
244
245 /* dma_p dest */
246 MDP_OUTP(MDP_BASE + 0xb0010, (pipe->dst_y << 16 | pipe->dst_x));
247
248 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
249}
250
251void mdp4_overlay_dmap_cfg(struct msm_fb_data_type *mfd, int lcdc)
252{
253 uint32 dma2_cfg_reg;
254
255 dma2_cfg_reg = DMA_DITHER_EN;
256#ifdef BLT_RGB565
257 /* RGB888 is 0 */
258 dma2_cfg_reg |= DMA_BUF_FORMAT_RGB565; /* blt only */
259#endif
260
261 if (mfd->fb_imgType == MDP_BGR_565)
262 dma2_cfg_reg |= DMA_PACK_PATTERN_BGR;
263 else
264 dma2_cfg_reg |= DMA_PACK_PATTERN_RGB;
265
266
267 if (mfd->panel_info.bpp == 18) {
268 dma2_cfg_reg |= DMA_DSTC0G_6BITS | /* 666 18BPP */
269 DMA_DSTC1B_6BITS | DMA_DSTC2R_6BITS;
270 } else if (mfd->panel_info.bpp == 16) {
271 dma2_cfg_reg |= DMA_DSTC0G_6BITS | /* 565 16BPP */
272 DMA_DSTC1B_5BITS | DMA_DSTC2R_5BITS;
273 } else {
274 dma2_cfg_reg |= DMA_DSTC0G_8BITS | /* 888 16BPP */
275 DMA_DSTC1B_8BITS | DMA_DSTC2R_8BITS;
276 }
277
278 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
279
280#ifndef CONFIG_FB_MSM_LCDC_CHIMEI_WXGA_PANEL
281 if (lcdc)
282 dma2_cfg_reg |= DMA_PACK_ALIGN_MSB;
283#endif
284
285 /* dma2 config register */
286 MDP_OUTP(MDP_BASE + 0x90000, dma2_cfg_reg);
287
288 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
289}
290
291/*
292 * mdp4_overlay_dmap_xy: called form baselayer only
293 */
294void mdp4_overlay_dmap_xy(struct mdp4_overlay_pipe *pipe)
295{
296 uint32 off, bpp;
297
298 if (mdp_is_in_isr == FALSE)
299 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
300
301 /* dma_p source */
302 MDP_OUTP(MDP_BASE + 0x90004,
303 (pipe->src_height << 16 | pipe->src_width));
304 if (pipe->blt_addr) {
305#ifdef BLT_RGB565
306 bpp = 2; /* overlay ouput is RGB565 */
307#else
308 bpp = 3; /* overlay ouput is RGB888 */
309#endif
310 off = 0;
311 if (pipe->dmap_cnt & 0x01)
312 off = pipe->src_height * pipe->src_width * bpp;
313 MDP_OUTP(MDP_BASE + 0x90008, pipe->blt_addr + off);
314 /* RGB888, output of overlay blending */
315 MDP_OUTP(MDP_BASE + 0x9000c, pipe->src_width * bpp);
316 } else {
317 MDP_OUTP(MDP_BASE + 0x90008, pipe->srcp0_addr);
318 MDP_OUTP(MDP_BASE + 0x9000c, pipe->srcp0_ystride);
319 }
320
321 /* dma_p dest */
322 MDP_OUTP(MDP_BASE + 0x90010, (pipe->dst_y << 16 | pipe->dst_x));
323
324 if (mdp_is_in_isr == FALSE)
325 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
326}
327
328#define MDP4_VG_PHASE_STEP_DEFAULT 0x20000000
329#define MDP4_VG_PHASE_STEP_SHIFT 29
330
331static int mdp4_leading_0(uint32 num)
332{
333 uint32 bit = 0x80000000;
334 int i;
335
336 for (i = 0; i < 32; i++) {
337 if (bit & num)
338 return i;
339 bit >>= 1;
340 }
341
342 return i;
343}
344
345static uint32 mdp4_scale_phase_step(int f_num, uint32 src, uint32 dst)
346{
347 uint32 val;
348 int n;
349
350 n = mdp4_leading_0(src);
351 if (n > f_num)
352 n = f_num;
353 val = src << n; /* maximum to reduce lose of resolution */
354 val /= dst;
355 if (n < f_num) {
356 n = f_num - n;
357 val <<= n;
358 }
359
360 return val;
361}
362
363static void mdp4_scale_setup(struct mdp4_overlay_pipe *pipe)
364{
365 int ptype;
366
367 pipe->phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
368 pipe->phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
369 ptype = mdp4_overlay_format2type(pipe->src_format);
370
371 if (pipe->dst_h && pipe->src_h != pipe->dst_h) {
372 if (pipe->dst_h > pipe->src_h * 8) /* too much */
373 return;
374 pipe->op_mode |= MDP4_OP_SCALEY_EN;
375
376 if (pipe->pipe_num >= OVERLAY_PIPE_VG1) {
377 if (pipe->dst_h <= (pipe->src_h / 4))
378 pipe->op_mode |= MDP4_OP_SCALEY_MN_PHASE;
379 else
380 pipe->op_mode |= MDP4_OP_SCALEY_FIR;
381 }
382
383 pipe->phasey_step = mdp4_scale_phase_step(29,
384 pipe->src_h, pipe->dst_h);
385 }
386
387 if (pipe->dst_w && pipe->src_w != pipe->dst_w) {
388 if (pipe->dst_w > pipe->src_w * 8) /* too much */
389 return;
390 pipe->op_mode |= MDP4_OP_SCALEX_EN;
391
392 if (pipe->pipe_num >= OVERLAY_PIPE_VG1) {
393 if (pipe->dst_w <= (pipe->src_w / 4))
394 pipe->op_mode |= MDP4_OP_SCALEX_MN_PHASE;
395 else
396 pipe->op_mode |= MDP4_OP_SCALEX_FIR;
397 }
398
399 pipe->phasex_step = mdp4_scale_phase_step(29,
400 pipe->src_w, pipe->dst_w);
401 }
402}
403
404void mdp4_overlay_rgb_setup(struct mdp4_overlay_pipe *pipe)
405{
406 char *rgb_base;
407 uint32 src_size, src_xy, dst_size, dst_xy;
408 uint32 format, pattern;
409
410 rgb_base = MDP_BASE + MDP4_RGB_BASE;
411 rgb_base += (MDP4_RGB_OFF * pipe->pipe_num);
412
413 src_size = ((pipe->src_h << 16) | pipe->src_w);
414 src_xy = ((pipe->src_y << 16) | pipe->src_x);
415 dst_size = ((pipe->dst_h << 16) | pipe->dst_w);
416 dst_xy = ((pipe->dst_y << 16) | pipe->dst_x);
417
418 format = mdp4_overlay_format(pipe);
419 pattern = mdp4_overlay_unpack_pattern(pipe);
420
421#ifdef MDP4_IGC_LUT_ENABLE
422 pipe->op_mode |= MDP4_OP_IGC_LUT_EN;
423#endif
424
425 mdp4_scale_setup(pipe);
426
427 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
428
429 outpdw(rgb_base + 0x0000, src_size); /* MDP_RGB_SRC_SIZE */
430 outpdw(rgb_base + 0x0004, src_xy); /* MDP_RGB_SRC_XY */
431 outpdw(rgb_base + 0x0008, dst_size); /* MDP_RGB_DST_SIZE */
432 outpdw(rgb_base + 0x000c, dst_xy); /* MDP_RGB_DST_XY */
433
434 outpdw(rgb_base + 0x0010, pipe->srcp0_addr);
435 outpdw(rgb_base + 0x0040, pipe->srcp0_ystride);
436
437 outpdw(rgb_base + 0x0050, format);/* MDP_RGB_SRC_FORMAT */
438 outpdw(rgb_base + 0x0054, pattern);/* MDP_RGB_SRC_UNPACK_PATTERN */
439 outpdw(rgb_base + 0x0058, pipe->op_mode);/* MDP_RGB_OP_MODE */
440 outpdw(rgb_base + 0x005c, pipe->phasex_step);
441 outpdw(rgb_base + 0x0060, pipe->phasey_step);
442
443 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
444
445 mdp4_stat.pipe[pipe->pipe_num]++;
446}
447
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700448
449static void mdp4_overlay_vg_get_src_offset(struct mdp4_overlay_pipe *pipe,
450 char *vg_base, uint32 *luma_off, uint32 *chroma_off)
451{
452 uint32 src_xy;
453 *luma_off = 0;
454 *chroma_off = 0;
455
456 if (pipe->src_x) {
457 src_xy = (pipe->src_y << 16) | pipe->src_x;
458 src_xy &= 0xffff0000;
459 outpdw(vg_base + 0x0004, src_xy); /* MDP_RGB_SRC_XY */
460
461 switch (pipe->src_format) {
462 case MDP_Y_CR_CB_H2V2:
463 case MDP_Y_CB_CR_H2V2:
464 *luma_off = pipe->src_x;
465 *chroma_off = pipe->src_x/2;
466 break;
467
468 case MDP_Y_CBCR_H2V2_TILE:
469 case MDP_Y_CRCB_H2V2_TILE:
470 case MDP_Y_CBCR_H2V2:
471 case MDP_Y_CRCB_H2V2:
472 case MDP_Y_CRCB_H1V1:
473 case MDP_Y_CBCR_H1V1:
474 case MDP_Y_CRCB_H2V1:
475 case MDP_Y_CBCR_H2V1:
476 *luma_off = pipe->src_x;
477 *chroma_off = pipe->src_x;
478 break;
479
480 case MDP_YCRYCB_H2V1:
481 if (pipe->src_x & 0x1)
482 pipe->src_x += 1;
483 *luma_off += pipe->src_x * 2;
484 break;
485
486 case MDP_ARGB_8888:
487 case MDP_RGBA_8888:
488 case MDP_BGRA_8888:
489 case MDP_RGBX_8888:
490 case MDP_RGB_565:
491 case MDP_BGR_565:
492 case MDP_XRGB_8888:
493 case MDP_RGB_888:
494 *luma_off = pipe->src_x * pipe->bpp;
495 break;
496
497 default:
498 pr_err("Source format %u not supported for x offset adjustment\n",
499 pipe->src_format);
500 break;
501 }
502 }
503}
504
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700505void mdp4_overlay_vg_setup(struct mdp4_overlay_pipe *pipe)
506{
507 char *vg_base;
508 uint32 frame_size, src_size, src_xy, dst_size, dst_xy;
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700509 uint32 format, pattern, luma_offset, chroma_offset;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700510 int pnum;
511
512 pnum = pipe->pipe_num - OVERLAY_PIPE_VG1; /* start from 0 */
513 vg_base = MDP_BASE + MDP4_VIDEO_BASE;
514 vg_base += (MDP4_VIDEO_OFF * pnum);
515
516 frame_size = ((pipe->src_height << 16) | pipe->src_width);
517 src_size = ((pipe->src_h << 16) | pipe->src_w);
518 src_xy = ((pipe->src_y << 16) | pipe->src_x);
519 dst_size = ((pipe->dst_h << 16) | pipe->dst_w);
520 dst_xy = ((pipe->dst_y << 16) | pipe->dst_x);
521
522 format = mdp4_overlay_format(pipe);
523 pattern = mdp4_overlay_unpack_pattern(pipe);
524
525 /* not RGB use VG pipe, pure VG pipe */
526 if (pipe->pipe_type != OVERLAY_TYPE_RGB)
527#ifdef MDP4_IGC_LUT_ENABLE
528 pipe->op_mode |= (MDP4_OP_CSC_EN | MDP4_OP_SRC_DATA_YCBCR |
529 MDP4_OP_IGC_LUT_EN);
530#else
531 pipe->op_mode |= (MDP4_OP_CSC_EN | MDP4_OP_SRC_DATA_YCBCR);
532#endif
533
534 mdp4_scale_setup(pipe);
535
536 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
537
538 outpdw(vg_base + 0x0000, src_size); /* MDP_RGB_SRC_SIZE */
539 outpdw(vg_base + 0x0004, src_xy); /* MDP_RGB_SRC_XY */
540 outpdw(vg_base + 0x0008, dst_size); /* MDP_RGB_DST_SIZE */
541 outpdw(vg_base + 0x000c, dst_xy); /* MDP_RGB_DST_XY */
Nagamalleswararao Ganjic6ecb832011-09-14 10:00:18 -0700542
543 if (pipe->frame_format)
544 outpdw(vg_base + 0x0048, frame_size); /* TILE frame size */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700545
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700546 /*
547 * Adjust src X offset to avoid MDP from overfetching pixels
548 * present before the offset. This is required for video
549 * frames coming with unused green pixels along the left margin
550 */
551 mdp4_overlay_vg_get_src_offset(pipe, vg_base, &luma_offset,
552 &chroma_offset);
553
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700554 /* luma component plane */
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700555 outpdw(vg_base + 0x0010, pipe->srcp0_addr + luma_offset);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700556
557 /* chroma component plane or planar color 1 */
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700558 outpdw(vg_base + 0x0014, pipe->srcp1_addr + chroma_offset);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700559
560 /* planar color 2 */
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700561 outpdw(vg_base + 0x0018, pipe->srcp2_addr + chroma_offset);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700562
563 outpdw(vg_base + 0x0040,
564 pipe->srcp1_ystride << 16 | pipe->srcp0_ystride);
565
566 outpdw(vg_base + 0x0044,
567 pipe->srcp3_ystride << 16 | pipe->srcp2_ystride);
568
569 outpdw(vg_base + 0x0050, format); /* MDP_RGB_SRC_FORMAT */
570 outpdw(vg_base + 0x0054, pattern); /* MDP_RGB_SRC_UNPACK_PATTERN */
571 outpdw(vg_base + 0x0058, pipe->op_mode);/* MDP_RGB_OP_MODE */
572 outpdw(vg_base + 0x005c, pipe->phasex_step);
573 outpdw(vg_base + 0x0060, pipe->phasey_step);
574
575 if (pipe->op_mode & MDP4_OP_DITHER_EN) {
576 outpdw(vg_base + 0x0068,
577 pipe->r_bit << 4 | pipe->b_bit << 2 | pipe->g_bit);
578 }
579
580 if (pipe->flags & MDP_SHARPENING) {
581 outpdw(vg_base + 0x8200,
582 mdp4_ss_table_value(pipe->req_data.dpp.sharp_strength,
583 0));
584 outpdw(vg_base + 0x8204,
585 mdp4_ss_table_value(pipe->req_data.dpp.sharp_strength,
586 1));
587 }
588
589 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
590
591 mdp4_stat.pipe[pipe->pipe_num]++;
592}
593
594int mdp4_overlay_format2type(uint32 format)
595{
596 switch (format) {
597 case MDP_RGB_565:
598 case MDP_RGB_888:
599 case MDP_BGR_565:
600 case MDP_XRGB_8888:
601 case MDP_ARGB_8888:
602 case MDP_RGBA_8888:
603 case MDP_BGRA_8888:
604 case MDP_RGBX_8888:
605 return OVERLAY_TYPE_RGB;
606 case MDP_YCRYCB_H2V1:
607 case MDP_Y_CRCB_H2V1:
608 case MDP_Y_CBCR_H2V1:
609 case MDP_Y_CRCB_H2V2:
610 case MDP_Y_CBCR_H2V2:
611 case MDP_Y_CBCR_H2V2_TILE:
612 case MDP_Y_CRCB_H2V2_TILE:
613 case MDP_Y_CR_CB_H2V2:
614 case MDP_Y_CB_CR_H2V2:
615 case MDP_Y_CRCB_H1V1:
616 case MDP_Y_CBCR_H1V1:
617 return OVERLAY_TYPE_VIDEO;
618 default:
619 mdp4_stat.err_format++;
620 return -ERANGE;
621 }
622
623}
624
625#define C3_ALPHA 3 /* alpha */
626#define C2_R_Cr 2 /* R/Cr */
627#define C1_B_Cb 1 /* B/Cb */
628#define C0_G_Y 0 /* G/luma */
629#define YUV_444_MAX_WIDTH 1280 /* Max width for YUV 444*/
630
631int mdp4_overlay_format2pipe(struct mdp4_overlay_pipe *pipe)
632{
633 switch (pipe->src_format) {
634 case MDP_RGB_565:
635 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
636 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
637 pipe->a_bit = 0;
638 pipe->r_bit = 1; /* R, 5 bits */
639 pipe->b_bit = 1; /* B, 5 bits */
640 pipe->g_bit = 2; /* G, 6 bits */
641 pipe->alpha_enable = 0;
642 pipe->unpack_tight = 1;
643 pipe->unpack_align_msb = 0;
644 pipe->unpack_count = 2;
645 pipe->element2 = C2_R_Cr; /* R */
646 pipe->element1 = C0_G_Y; /* G */
647 pipe->element0 = C1_B_Cb; /* B */
648 pipe->bpp = 2; /* 2 bpp */
649 break;
650 case MDP_RGB_888:
651 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
652 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
653 pipe->a_bit = 0;
654 pipe->r_bit = 3; /* R, 8 bits */
655 pipe->b_bit = 3; /* B, 8 bits */
656 pipe->g_bit = 3; /* G, 8 bits */
657 pipe->alpha_enable = 0;
658 pipe->unpack_tight = 1;
659 pipe->unpack_align_msb = 0;
660 pipe->unpack_count = 2;
661 pipe->element2 = C2_R_Cr; /* R */
662 pipe->element1 = C0_G_Y; /* G */
663 pipe->element0 = C1_B_Cb; /* B */
664 pipe->bpp = 3; /* 3 bpp */
665 break;
666 case MDP_BGR_565:
667 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
668 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
669 pipe->a_bit = 0;
670 pipe->r_bit = 1; /* R, 5 bits */
671 pipe->b_bit = 1; /* B, 5 bits */
672 pipe->g_bit = 2; /* G, 6 bits */
673 pipe->alpha_enable = 0;
674 pipe->unpack_tight = 1;
675 pipe->unpack_align_msb = 0;
676 pipe->unpack_count = 2;
677 pipe->element2 = C1_B_Cb; /* B */
678 pipe->element1 = C0_G_Y; /* G */
679 pipe->element0 = C2_R_Cr; /* R */
680 pipe->bpp = 2; /* 2 bpp */
681 break;
682 case MDP_XRGB_8888:
683 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
684 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
685 pipe->a_bit = 3; /* alpha, 4 bits */
686 pipe->r_bit = 3; /* R, 8 bits */
687 pipe->b_bit = 3; /* B, 8 bits */
688 pipe->g_bit = 3; /* G, 8 bits */
689 pipe->alpha_enable = 0;
690 pipe->unpack_tight = 1;
691 pipe->unpack_align_msb = 0;
692 pipe->unpack_count = 3;
693 pipe->element3 = C3_ALPHA; /* alpha */
694 pipe->element2 = C2_R_Cr; /* R */
695 pipe->element1 = C0_G_Y; /* G */
696 pipe->element0 = C1_B_Cb; /* B */
697 pipe->bpp = 4; /* 4 bpp */
698 break;
699 case MDP_ARGB_8888:
700 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
701 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
702 pipe->a_bit = 3; /* alpha, 4 bits */
703 pipe->r_bit = 3; /* R, 8 bits */
704 pipe->b_bit = 3; /* B, 8 bits */
705 pipe->g_bit = 3; /* G, 8 bits */
706 pipe->alpha_enable = 1;
707 pipe->unpack_tight = 1;
708 pipe->unpack_align_msb = 0;
709 pipe->unpack_count = 3;
710 pipe->element3 = C3_ALPHA; /* alpha */
711 pipe->element2 = C2_R_Cr; /* R */
712 pipe->element1 = C0_G_Y; /* G */
713 pipe->element0 = C1_B_Cb; /* B */
714 pipe->bpp = 4; /* 4 bpp */
715 break;
716 case MDP_RGBA_8888:
717 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
718 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
719 pipe->a_bit = 3; /* alpha, 4 bits */
720 pipe->r_bit = 3; /* R, 8 bits */
721 pipe->b_bit = 3; /* B, 8 bits */
722 pipe->g_bit = 3; /* G, 8 bits */
723 pipe->alpha_enable = 1;
724 pipe->unpack_tight = 1;
725 pipe->unpack_align_msb = 0;
726 pipe->unpack_count = 3;
727 pipe->element3 = C3_ALPHA; /* alpha */
728 pipe->element2 = C1_B_Cb; /* B */
729 pipe->element1 = C0_G_Y; /* G */
730 pipe->element0 = C2_R_Cr; /* R */
731 pipe->bpp = 4; /* 4 bpp */
732 break;
733 case MDP_RGBX_8888:
734 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
735 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
736 pipe->a_bit = 3;
737 pipe->r_bit = 3; /* R, 8 bits */
738 pipe->b_bit = 3; /* B, 8 bits */
739 pipe->g_bit = 3; /* G, 8 bits */
740 pipe->alpha_enable = 0;
741 pipe->unpack_tight = 1;
742 pipe->unpack_align_msb = 0;
743 pipe->unpack_count = 3;
744 pipe->element3 = C3_ALPHA; /* alpha */
745 pipe->element2 = C1_B_Cb; /* B */
746 pipe->element1 = C0_G_Y; /* G */
747 pipe->element0 = C2_R_Cr; /* R */
748 pipe->bpp = 4; /* 4 bpp */
749 break;
750 case MDP_BGRA_8888:
751 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
752 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
753 pipe->a_bit = 3; /* alpha, 4 bits */
754 pipe->r_bit = 3; /* R, 8 bits */
755 pipe->b_bit = 3; /* B, 8 bits */
756 pipe->g_bit = 3; /* G, 8 bits */
757 pipe->alpha_enable = 1;
758 pipe->unpack_tight = 1;
759 pipe->unpack_align_msb = 0;
760 pipe->unpack_count = 3;
761 pipe->element3 = C3_ALPHA; /* alpha */
762 pipe->element2 = C2_R_Cr; /* R */
763 pipe->element1 = C0_G_Y; /* G */
764 pipe->element0 = C1_B_Cb; /* B */
765 pipe->bpp = 4; /* 4 bpp */
766 break;
767 case MDP_YCRYCB_H2V1:
768 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
769 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
770 pipe->a_bit = 0; /* alpha, 4 bits */
771 pipe->r_bit = 3; /* R, 8 bits */
772 pipe->b_bit = 3; /* B, 8 bits */
773 pipe->g_bit = 3; /* G, 8 bits */
774 pipe->alpha_enable = 0;
775 pipe->unpack_tight = 1;
776 pipe->unpack_align_msb = 0;
777 pipe->unpack_count = 3;
778 pipe->element3 = C0_G_Y; /* G */
779 pipe->element2 = C2_R_Cr; /* R */
780 pipe->element1 = C0_G_Y; /* G */
781 pipe->element0 = C1_B_Cb; /* B */
782 pipe->bpp = 2; /* 2 bpp */
783 pipe->chroma_sample = MDP4_CHROMA_H2V1;
784 break;
785 case MDP_Y_CRCB_H2V1:
786 case MDP_Y_CBCR_H2V1:
787 case MDP_Y_CRCB_H2V2:
788 case MDP_Y_CBCR_H2V2:
789 case MDP_Y_CRCB_H1V1:
790 case MDP_Y_CBCR_H1V1:
791 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
792 pipe->fetch_plane = OVERLAY_PLANE_PSEUDO_PLANAR;
793 pipe->a_bit = 0;
794 pipe->r_bit = 3; /* R, 8 bits */
795 pipe->b_bit = 3; /* B, 8 bits */
796 pipe->g_bit = 3; /* G, 8 bits */
797 pipe->alpha_enable = 0;
798 pipe->unpack_tight = 1;
799 pipe->unpack_align_msb = 0;
800 pipe->unpack_count = 1; /* 2 */
801 pipe->element3 = C0_G_Y; /* not used */
802 pipe->element2 = C0_G_Y; /* not used */
803 if (pipe->src_format == MDP_Y_CRCB_H2V1) {
804 pipe->element1 = C2_R_Cr; /* R */
805 pipe->element0 = C1_B_Cb; /* B */
806 pipe->chroma_sample = MDP4_CHROMA_H2V1;
807 } else if (pipe->src_format == MDP_Y_CRCB_H1V1) {
808 pipe->element1 = C2_R_Cr; /* R */
809 pipe->element0 = C1_B_Cb; /* B */
810 if (pipe->src_width > YUV_444_MAX_WIDTH)
811 pipe->chroma_sample = MDP4_CHROMA_H1V2;
812 else
813 pipe->chroma_sample = MDP4_CHROMA_RGB;
814 } else if (pipe->src_format == MDP_Y_CBCR_H2V1) {
815 pipe->element1 = C1_B_Cb; /* B */
816 pipe->element0 = C2_R_Cr; /* R */
817 pipe->chroma_sample = MDP4_CHROMA_H2V1;
818 } else if (pipe->src_format == MDP_Y_CBCR_H1V1) {
819 pipe->element1 = C1_B_Cb; /* B */
820 pipe->element0 = C2_R_Cr; /* R */
821 if (pipe->src_width > YUV_444_MAX_WIDTH)
822 pipe->chroma_sample = MDP4_CHROMA_H1V2;
823 else
824 pipe->chroma_sample = MDP4_CHROMA_RGB;
825 } else if (pipe->src_format == MDP_Y_CRCB_H2V2) {
826 pipe->element1 = C2_R_Cr; /* R */
827 pipe->element0 = C1_B_Cb; /* B */
828 pipe->chroma_sample = MDP4_CHROMA_420;
829 } else if (pipe->src_format == MDP_Y_CBCR_H2V2) {
830 pipe->element1 = C1_B_Cb; /* B */
831 pipe->element0 = C2_R_Cr; /* R */
832 pipe->chroma_sample = MDP4_CHROMA_420;
833 }
834 pipe->bpp = 2; /* 2 bpp */
835 break;
836 case MDP_Y_CBCR_H2V2_TILE:
837 case MDP_Y_CRCB_H2V2_TILE:
838 pipe->frame_format = MDP4_FRAME_FORMAT_VIDEO_SUPERTILE;
839 pipe->fetch_plane = OVERLAY_PLANE_PSEUDO_PLANAR;
840 pipe->a_bit = 0;
841 pipe->r_bit = 3; /* R, 8 bits */
842 pipe->b_bit = 3; /* B, 8 bits */
843 pipe->g_bit = 3; /* G, 8 bits */
844 pipe->alpha_enable = 0;
845 pipe->unpack_tight = 1;
846 pipe->unpack_align_msb = 0;
847 pipe->unpack_count = 1; /* 2 */
848 pipe->element3 = C0_G_Y; /* not used */
849 pipe->element2 = C0_G_Y; /* not used */
850 if (pipe->src_format == MDP_Y_CRCB_H2V2_TILE) {
851 pipe->element1 = C2_R_Cr; /* R */
852 pipe->element0 = C1_B_Cb; /* B */
853 pipe->chroma_sample = MDP4_CHROMA_420;
854 } else if (pipe->src_format == MDP_Y_CBCR_H2V2_TILE) {
855 pipe->element1 = C1_B_Cb; /* B */
856 pipe->element0 = C2_R_Cr; /* R */
857 pipe->chroma_sample = MDP4_CHROMA_420;
858 }
859 pipe->bpp = 2; /* 2 bpp */
860 break;
861 case MDP_Y_CR_CB_H2V2:
862 case MDP_Y_CB_CR_H2V2:
863 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
864 pipe->fetch_plane = OVERLAY_PLANE_PLANAR;
865 pipe->a_bit = 0;
866 pipe->r_bit = 3; /* R, 8 bits */
867 pipe->b_bit = 3; /* B, 8 bits */
868 pipe->g_bit = 3; /* G, 8 bits */
869 pipe->alpha_enable = 0;
Adrian Salido-Moreno33dc7b92011-08-18 16:16:12 -0700870 pipe->chroma_sample = MDP4_CHROMA_420;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700871 pipe->bpp = 2; /* 2 bpp */
872 break;
873 default:
874 /* not likely */
875 mdp4_stat.err_format++;
876 return -ERANGE;
877 }
878
879 return 0;
880}
881
882/*
883 * color_key_convert: output with 12 bits color key
884 */
885static uint32 color_key_convert(int start, int num, uint32 color)
886{
887 uint32 data;
888
889 data = (color >> start) & ((1 << num) - 1);
890
891 /* convert to 8 bits */
892 if (num == 5)
893 data = ((data << 3) | (data >> 2));
894 else if (num == 6)
895 data = ((data << 2) | (data >> 4));
896
897 /* convert 8 bits to 12 bits */
898 data = (data << 4) | (data >> 4);
899
900 return data;
901}
902
903void transp_color_key(int format, uint32 transp,
904 uint32 *c0, uint32 *c1, uint32 *c2)
905{
906 int b_start, g_start, r_start;
907 int b_num, g_num, r_num;
908
909 switch (format) {
910 case MDP_RGB_565:
911 b_start = 0;
912 g_start = 5;
913 r_start = 11;
914 r_num = 5;
915 g_num = 6;
916 b_num = 5;
917 break;
918 case MDP_RGB_888:
919 case MDP_XRGB_8888:
920 case MDP_ARGB_8888:
921 case MDP_BGRA_8888:
922 b_start = 0;
923 g_start = 8;
924 r_start = 16;
925 r_num = 8;
926 g_num = 8;
927 b_num = 8;
928 break;
929 case MDP_RGBA_8888:
930 case MDP_RGBX_8888:
931 b_start = 16;
932 g_start = 8;
933 r_start = 0;
934 r_num = 8;
935 g_num = 8;
936 b_num = 8;
937 break;
938 case MDP_BGR_565:
939 b_start = 11;
940 g_start = 5;
941 r_start = 0;
942 r_num = 5;
943 g_num = 6;
944 b_num = 5;
945 break;
946 case MDP_Y_CB_CR_H2V2:
947 case MDP_Y_CBCR_H2V2:
948 case MDP_Y_CBCR_H2V1:
949 b_start = 8;
950 g_start = 16;
951 r_start = 0;
952 r_num = 8;
953 g_num = 8;
954 b_num = 8;
955 break;
956 case MDP_Y_CR_CB_H2V2:
957 case MDP_Y_CRCB_H2V2:
958 case MDP_Y_CRCB_H2V1:
959 case MDP_Y_CRCB_H1V1:
960 case MDP_Y_CBCR_H1V1:
961 b_start = 0;
962 g_start = 16;
963 r_start = 8;
964 r_num = 8;
965 g_num = 8;
966 b_num = 8;
967 break;
968 default:
969 b_start = 0;
970 g_start = 8;
971 r_start = 16;
972 r_num = 8;
973 g_num = 8;
974 b_num = 8;
975 break;
976 }
977
978 *c0 = color_key_convert(g_start, g_num, transp);
979 *c1 = color_key_convert(b_start, b_num, transp);
980 *c2 = color_key_convert(r_start, r_num, transp);
981}
982
983uint32 mdp4_overlay_format(struct mdp4_overlay_pipe *pipe)
984{
985 uint32 format;
986
987 format = 0;
988
989 if (pipe->solid_fill)
990 format |= MDP4_FORMAT_SOLID_FILL;
991
992 if (pipe->unpack_align_msb)
993 format |= MDP4_FORMAT_UNPACK_ALIGN_MSB;
994
995 if (pipe->unpack_tight)
996 format |= MDP4_FORMAT_UNPACK_TIGHT;
997
998 if (pipe->alpha_enable)
999 format |= MDP4_FORMAT_ALPHA_ENABLE;
1000
1001 if (pipe->flags & MDP_SOURCE_ROTATED_90)
1002 format |= MDP4_FORMAT_90_ROTATED;
1003 format |= (pipe->unpack_count << 13);
1004 format |= ((pipe->bpp - 1) << 9);
1005 format |= (pipe->a_bit << 6);
1006 format |= (pipe->r_bit << 4);
1007 format |= (pipe->b_bit << 2);
1008 format |= pipe->g_bit;
1009
1010 format |= (pipe->frame_format << 29);
1011
1012 if (pipe->fetch_plane == OVERLAY_PLANE_PSEUDO_PLANAR ||
1013 pipe->fetch_plane == OVERLAY_PLANE_PLANAR) {
1014 /* video/graphic */
1015 format |= (pipe->fetch_plane << 19);
1016 format |= (pipe->chroma_site << 28);
1017 format |= (pipe->chroma_sample << 26);
1018 }
1019
1020 return format;
1021}
1022
1023uint32 mdp4_overlay_unpack_pattern(struct mdp4_overlay_pipe *pipe)
1024{
1025 return (pipe->element3 << 24) | (pipe->element2 << 16) |
1026 (pipe->element1 << 8) | pipe->element0;
1027}
1028
1029/*
1030 * mdp4_overlayproc_cfg: only be called from base layer
1031 */
1032void mdp4_overlayproc_cfg(struct mdp4_overlay_pipe *pipe)
1033{
1034 uint32 data, intf;
1035 char *overlay_base;
1036
1037 intf = 0;
1038 if (pipe->mixer_num == MDP4_MIXER1) {
1039 overlay_base = MDP_BASE + MDP4_OVERLAYPROC1_BASE;/* 0x18000 */
1040 intf = inpdw(MDP_BASE + 0x0038); /* MDP_DISP_INTF_SEL */
1041 intf >>= 4;
1042 intf &= 0x03;
1043 } else
1044 overlay_base = MDP_BASE + MDP4_OVERLAYPROC0_BASE;/* 0x10000 */
1045
1046 if (mdp_is_in_isr == FALSE)
1047 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1048
1049 /*
1050 * BLT only siupport at primary display
1051 */
1052 if (pipe->mixer_num == MDP4_MIXER0 && pipe->blt_addr) {
1053 int off, bpp;
1054#ifdef BLT_RGB565
1055 bpp = 2; /* overlay ouput is RGB565 */
1056#else
1057 bpp = 3; /* overlay ouput is RGB888 */
1058#endif
1059 data = pipe->src_height;
1060 data <<= 16;
1061 data |= pipe->src_width;
1062 outpdw(overlay_base + 0x0008, data); /* ROI, height + width */
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07001063 off = 0;
1064 if (pipe->ov_cnt & 0x01)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001065 off = pipe->src_height * pipe->src_width * bpp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001066
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07001067 outpdw(overlay_base + 0x000c, pipe->blt_addr + off);
1068 /* overlay ouput is RGB888 */
1069 outpdw(overlay_base + 0x0010, pipe->src_width * bpp);
1070 outpdw(overlay_base + 0x001c, pipe->blt_addr + off);
1071 /* MDDI - BLT + on demand */
1072 outpdw(overlay_base + 0x0004, 0x08);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001073#ifdef BLT_RGB565
1074 outpdw(overlay_base + 0x0014, 0x1); /* RGB565 */
1075#else
1076 outpdw(overlay_base + 0x0014, 0x0); /* RGB888 */
1077#endif
1078 } else {
1079 data = pipe->src_height;
1080 data <<= 16;
1081 data |= pipe->src_width;
1082 outpdw(overlay_base + 0x0008, data); /* ROI, height + width */
1083 outpdw(overlay_base + 0x000c, pipe->srcp0_addr);
1084 outpdw(overlay_base + 0x0010, pipe->srcp0_ystride);
1085 outpdw(overlay_base + 0x0004, 0x01); /* directout */
1086 }
1087
1088 if (pipe->mixer_num == MDP4_MIXER1) {
1089 if (intf == TV_INTF) {
1090 outpdw(overlay_base + 0x0014, 0x02); /* yuv422 */
1091 /* overlay1 CSC config */
1092 outpdw(overlay_base + 0x0200, 0x05); /* rgb->yuv */
1093 }
1094 }
1095
1096#ifdef MDP4_IGC_LUT_ENABLE
1097 outpdw(overlay_base + 0x0014, 0x4); /* GC_LUT_EN, 888 */
1098#endif
1099
1100 if (mdp_is_in_isr == FALSE)
1101 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1102}
1103
1104int mdp4_overlay_pipe_staged(int mixer)
1105{
1106 uint32 data, mask, i;
1107 int p1, p2;
1108
1109 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1110 data = inpdw(MDP_BASE + 0x10100);
1111 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1112 p1 = 0;
1113 p2 = 0;
1114 for (i = 0; i < 8; i++) {
1115 mask = data & 0x0f;
1116 if (mask) {
1117 if (mask <= 4)
1118 p1++;
1119 else
1120 p2++;
1121 }
1122 data >>= 4;
1123 }
1124
1125 if (mixer)
1126 return p2;
1127 else
1128 return p1;
1129}
1130
kuogee hsieh405dc302011-07-21 15:06:59 -07001131int mdp4_mixer_info(int mixer_num, struct mdp_mixer_info *info)
1132{
1133
1134 int ndx, cnt;
1135 struct mdp4_overlay_pipe *pipe;
1136
1137 if (mixer_num > MDP4_MIXER_MAX)
1138 return -ENODEV;
1139
1140 cnt = 0;
1141 ndx = 1; /* ndx 0 if not used */
1142
1143 for ( ; ndx < MDP4_MIXER_STAGE_MAX; ndx++) {
1144 pipe = ctrl->stage[mixer_num][ndx];
1145 if (pipe == NULL)
1146 continue;
1147 info->z_order = pipe->mixer_stage - MDP4_MIXER_STAGE0;
1148 info->ptype = pipe->pipe_type;
1149 info->pnum = pipe->pipe_num;
1150 info->pndx = pipe->pipe_ndx;
1151 info->mixer_num = pipe->mixer_num;
1152 info++;
1153 cnt++;
1154 }
1155 return cnt;
1156}
1157
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001158void mdp4_mixer_stage_up(struct mdp4_overlay_pipe *pipe)
1159{
1160 uint32 data, mask, snum, stage, mixer, pnum;
1161
1162 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1163
1164 stage = pipe->mixer_stage;
1165 mixer = pipe->mixer_num;
1166 pnum = pipe->pipe_num;
1167
1168 /* MDP_LAYERMIXER_IN_CFG, shard by both mixer 0 and 1 */
1169 data = inpdw(MDP_BASE + 0x10100);
1170
1171 if (mixer == MDP4_MIXER1)
1172 stage += 8;
1173
1174 if (pipe->pipe_num >= OVERLAY_PIPE_VG1) {/* VG1 and VG2 */
1175 pnum -= OVERLAY_PIPE_VG1; /* start from 0 */
1176 snum = 0;
1177 snum += (4 * pnum);
1178 } else {
1179 snum = 8;
1180 snum += (4 * pnum); /* RGB1 and RGB2 */
1181 }
1182
1183 mask = 0x0f;
1184 mask <<= snum;
1185 stage <<= snum;
1186 data &= ~mask; /* clear old bits */
1187
1188 data |= stage;
1189
1190 outpdw(MDP_BASE + 0x10100, data); /* MDP_LAYERMIXER_IN_CFG */
1191
1192 data = inpdw(MDP_BASE + 0x10100);
1193
1194 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1195
1196 ctrl->stage[pipe->mixer_num][pipe->mixer_stage] = pipe; /* keep it */
1197}
1198
1199void mdp4_mixer_stage_down(struct mdp4_overlay_pipe *pipe)
1200{
1201 uint32 data, mask, snum, stage, mixer, pnum;
1202
1203 stage = pipe->mixer_stage;
1204 mixer = pipe->mixer_num;
1205 pnum = pipe->pipe_num;
1206
1207 if (pipe != ctrl->stage[mixer][stage]) /* not runing */
1208 return;
1209
1210 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1211
1212 /* MDP_LAYERMIXER_IN_CFG, shard by both mixer 0 and 1 */
1213 data = inpdw(MDP_BASE + 0x10100);
1214
1215 if (mixer == MDP4_MIXER1)
1216 stage += 8;
1217
1218 if (pipe->pipe_num >= OVERLAY_PIPE_VG1) {/* VG1 and VG2 */
1219 pnum -= OVERLAY_PIPE_VG1; /* start from 0 */
1220 snum = 0;
1221 snum += (4 * pnum);
1222 } else {
1223 snum = 8;
1224 snum += (4 * pnum); /* RGB1 and RGB2 */
1225 }
1226
1227 mask = 0x0f;
1228 mask <<= snum;
1229 data &= ~mask; /* clear old bits */
1230
1231 outpdw(MDP_BASE + 0x10100, data); /* MDP_LAYERMIXER_IN_CFG */
1232
1233 data = inpdw(MDP_BASE + 0x10100);
1234
1235 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1236
1237 ctrl->stage[pipe->mixer_num][pipe->mixer_stage] = NULL; /* clear it */
1238}
1239
1240void mdp4_mixer_blend_setup(struct mdp4_overlay_pipe *pipe)
1241{
1242 struct mdp4_overlay_pipe *bg_pipe;
1243 unsigned char *overlay_base, *rgb_base;
1244 uint32 c0, c1, c2, blend_op, constant_color = 0, rgb_src_format;
1245 int off;
1246
1247 if (pipe->mixer_num) /* mixer number, /dev/fb0, /dev/fb1 */
1248 overlay_base = MDP_BASE + MDP4_OVERLAYPROC1_BASE;/* 0x18000 */
1249 else
1250 overlay_base = MDP_BASE + MDP4_OVERLAYPROC0_BASE;/* 0x10000 */
1251
1252 /* stage 0 to stage 2 */
1253 off = 0x20 * (pipe->mixer_stage - MDP4_MIXER_STAGE0);
1254
1255 bg_pipe = mdp4_overlay_stage_pipe(pipe->mixer_num,
1256 MDP4_MIXER_STAGE_BASE);
1257 if (bg_pipe == NULL) {
1258 pr_err("%s: Error: no bg_pipe\n", __func__);
1259 return;
1260 }
1261
1262 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1263
1264 blend_op = 0;
1265
1266 if (pipe->is_fg) {
1267 blend_op |= (MDP4_BLEND_FG_ALPHA_FG_CONST |
1268 MDP4_BLEND_BG_ALPHA_BG_CONST);
1269 outpdw(overlay_base + off + 0x108, pipe->alpha);
1270 outpdw(overlay_base + off + 0x10c, 0xff - pipe->alpha);
1271 if (pipe->alpha == 0xff) {
1272 rgb_base = MDP_BASE + MDP4_RGB_BASE;
1273 rgb_base += MDP4_RGB_OFF * bg_pipe->pipe_num;
1274 rgb_src_format = inpdw(rgb_base + 0x50);
1275 rgb_src_format |= MDP4_FORMAT_SOLID_FILL;
1276 outpdw(rgb_base + 0x50, rgb_src_format);
1277 outpdw(rgb_base + 0x1008, constant_color);
1278 }
1279 } else {
1280 if (bg_pipe->alpha_enable && pipe->alpha_enable) {
1281 /* both pipe have alpha */
1282 blend_op |= (MDP4_BLEND_FG_ALPHA_BG_PIXEL |
1283 MDP4_BLEND_FG_INV_ALPHA |
1284 MDP4_BLEND_BG_ALPHA_BG_PIXEL);
1285 } else if (bg_pipe->alpha_enable && pipe->alpha_enable == 0) {
1286 /* no alpha on both pipe */
1287 blend_op = (MDP4_BLEND_BG_ALPHA_BG_PIXEL |
1288 MDP4_BLEND_FG_ALPHA_BG_PIXEL |
1289 MDP4_BLEND_FG_INV_ALPHA);
1290 }
1291 }
1292
1293
1294 if (pipe->transp != MDP_TRANSP_NOP) {
1295 if (pipe->is_fg) {
1296 transp_color_key(pipe->src_format, pipe->transp,
1297 &c0, &c1, &c2);
1298 /* Fg blocked */
1299 blend_op |= MDP4_BLEND_FG_TRANSP_EN;
1300 /* lower limit */
1301 outpdw(overlay_base + off + 0x110,
1302 (c1 << 16 | c0));/* low */
1303 outpdw(overlay_base + off + 0x114, c2);/* low */
1304 /* upper limit */
1305 outpdw(overlay_base + off + 0x118,
1306 (c1 << 16 | c0));
1307 outpdw(overlay_base + off + 0x11c, c2);
1308 } else {
1309 transp_color_key(bg_pipe->src_format,
1310 pipe->transp, &c0, &c1, &c2);
1311 /* bg blocked */
1312 blend_op |= MDP4_BLEND_BG_TRANSP_EN;
1313 /* lower limit */
1314 outpdw(overlay_base + 0x180,
1315 (c1 << 16 | c0));/* low */
1316 outpdw(overlay_base + 0x184, c2);/* low */
1317 /* upper limit */
1318 outpdw(overlay_base + 0x188,
1319 (c1 << 16 | c0));/* high */
1320 outpdw(overlay_base + 0x18c, c2);/* high */
1321 }
1322 }
1323
1324 outpdw(overlay_base + off + 0x104, blend_op);
1325
1326 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1327}
1328
1329void mdp4_overlay_reg_flush(struct mdp4_overlay_pipe *pipe, int all)
1330{
1331 struct mdp4_overlay_pipe *bg_pipe;
1332 uint32 bits = 0;
1333
1334 if (pipe->mixer_num == MDP4_MIXER1)
1335 bits |= 0x02;
1336 else
1337 bits |= 0x01;
1338
1339 if (all) {
1340 if (pipe->pipe_num <= OVERLAY_PIPE_RGB2) {
1341 if (pipe->pipe_num == OVERLAY_PIPE_RGB2)
1342 bits |= 0x20;
1343 else
1344 bits |= 0x10;
1345 } else {
1346 if (pipe->is_fg && pipe->alpha == 0xFF) {
1347 bg_pipe = mdp4_overlay_stage_pipe(
1348 pipe->mixer_num,
1349 MDP4_MIXER_STAGE_BASE);
1350 if (bg_pipe->pipe_num <= OVERLAY_PIPE_RGB2) {
1351 if (bg_pipe->pipe_num ==
1352 OVERLAY_PIPE_RGB2)
1353 bits |= 0x20;
1354 else
1355 bits |= 0x10;
1356 }
1357 }
1358 if (pipe->pipe_num == OVERLAY_PIPE_VG2)
1359 bits |= 0x08;
1360 else
1361 bits |= 0x04;
1362 }
1363 }
1364
1365 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1366 outpdw(MDP_BASE + 0x18000, bits); /* MDP_OVERLAY_REG_FLUSH */
1367 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1368}
1369
1370struct mdp4_overlay_pipe *mdp4_overlay_stage_pipe(int mixer, int stage)
1371{
1372 return ctrl->stage[mixer][stage];
1373}
1374
1375struct mdp4_overlay_pipe *mdp4_overlay_ndx2pipe(int ndx)
1376{
1377 struct mdp4_overlay_pipe *pipe;
1378
1379 if (ndx <= 0 || ndx > MDP4_MAX_PIPE)
1380 return NULL;
1381
1382 pipe = &ctrl->plist[ndx - 1]; /* ndx start from 1 */
1383
1384 if (pipe->pipe_used == 0)
1385 return NULL;
1386
1387 return pipe;
1388}
1389
1390struct mdp4_overlay_pipe *mdp4_overlay_pipe_alloc(
1391 int ptype, int mixer, int req_share)
1392{
1393 int i, j, ndx, found;
1394 struct mdp4_overlay_pipe *pipe, *opipe;
1395 struct mdp4_pipe_desc *pd;
1396
1397 found = 0;
1398 pipe = &ctrl->plist[0];
1399
1400 for (i = 0; i < MDP4_MAX_PIPE; i++) {
1401 if (pipe->pipe_type == ptype && pipe->pipe_used == 0) {
1402 pd = &ctrl->ov_pipe[pipe->pipe_num];
1403 if (pd->share) { /* pipe can be shared */
1404 if (pd->ref_cnt == 0) {
1405 /* not yet been used */
1406 found++;
1407 break;
1408 }
1409 /* pipe occupied already */
1410 if (req_share && pd->ref_cnt < MDP4_MAX_SHARE) {
1411 for (j = 0; j < MDP4_MAX_SHARE; j++) {
1412 ndx = pd->ndx_list[j];
1413 if (ndx != 0)
1414 break;
1415 }
1416 /* ndx satrt from 1 */
1417 opipe = &ctrl->plist[ndx - 1];
1418 /*
1419 * occupied pipe willing to share and
1420 * same mixer
1421 */
1422 if (opipe->pipe_share &&
1423 opipe->mixer_num == mixer) {
1424 found++;
1425 break;
1426 }
1427 }
1428 } else { /* not a shared pipe */
1429 if (req_share == 0 && pd->ref_cnt == 0) {
1430 found++;
1431 break;
1432 }
1433 }
1434 }
1435 pipe++;
1436 }
1437
1438 if (found) {
1439 init_completion(&pipe->comp);
1440 init_completion(&pipe->dmas_comp);
1441 pr_info("%s: pipe=%x ndx=%d num=%d share=%d cnt=%d\n",
1442 __func__, (int)pipe, pipe->pipe_ndx, pipe->pipe_num,
1443 pd->share, pd->ref_cnt);
1444 return pipe;
1445 }
1446
1447 pr_debug("%s: ptype=%d mixer=%d req_share=%d FAILED\n",
1448 __func__, ptype, mixer, req_share);
1449
1450 return NULL;
1451}
1452
1453
1454void mdp4_overlay_pipe_free(struct mdp4_overlay_pipe *pipe)
1455{
1456 int i;
1457 uint32 ptype, num, ndx;
1458 struct mdp4_pipe_desc *pd;
1459
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07001460 pr_info("%s: pipe=%x ndx=%d\n", __func__,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001461 (int)pipe, pipe->pipe_ndx);
1462 pd = &ctrl->ov_pipe[pipe->pipe_num];
1463 if (pd->ref_cnt) {
1464 pd->ref_cnt--;
1465 for (i = 0; i < MDP4_MAX_SHARE; i++) {
1466 if (pd->ndx_list[i] == pipe->pipe_ndx) {
1467 pd->ndx_list[i] = 0;
1468 break;
1469 }
1470 }
1471 }
1472
1473 pd->player = NULL;
1474
1475 ptype = pipe->pipe_type;
1476 num = pipe->pipe_num;
1477 ndx = pipe->pipe_ndx;
1478
1479 memset(pipe, 0, sizeof(*pipe));
1480
1481 pipe->pipe_type = ptype;
1482 pipe->pipe_num = num;
1483 pipe->pipe_ndx = ndx;
1484}
1485
1486int mdp4_overlay_req_check(uint32 id, uint32 z_order, uint32 mixer)
1487{
1488 struct mdp4_overlay_pipe *pipe;
1489
1490 pipe = ctrl->stage[mixer][z_order];
1491
1492 if (pipe == NULL)
1493 return 0;
1494
1495 if (pipe->pipe_ndx == id) /* same req, recycle */
1496 return 0;
1497
1498 if (id == MSMFB_NEW_REQUEST) { /* new request */
1499 if (pipe->pipe_num >= OVERLAY_PIPE_VG1) /* share pipe */
1500 return 0;
1501 }
1502
1503 return -EPERM;
1504}
1505
1506static int mdp4_overlay_validate_downscale(struct mdp_overlay *req,
1507 struct msm_fb_data_type *mfd, uint32 perf_level, uint32 pclk_rate)
1508{
1509 __u32 panel_clk_khz, mdp_clk_khz;
1510 __u32 num_hsync_pix_clks, mdp_clks_per_hsync, src_wh;
1511 __u32 hsync_period_ps, mdp_period_ps, total_hsync_period_ps;
1512 unsigned long fill_rate_y_dir, fill_rate_x_dir;
1513 unsigned long fillratex100, mdp_pixels_produced;
1514 unsigned long mdp_clk_hz;
1515
1516 pr_debug("%s: LCDC Mode Downscale validation with MDP Core"
1517 " Clk rate\n", __func__);
1518 pr_debug("src_w %u, src_h %u, dst_w %u, dst_h %u\n",
1519 req->src_rect.w, req->src_rect.h, req->dst_rect.w,
1520 req->dst_rect.h);
1521
1522
1523 panel_clk_khz = pclk_rate/1000;
1524 mdp_clk_hz = mdp_perf_level2clk_rate(perf_level);
1525
Ravishangar Kalyanamc42862a2011-09-14 11:42:34 -07001526 if (!mdp_clk_hz || !req->dst_rect.w || !req->dst_rect.h) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001527 pr_debug("mdp_perf_level2clk_rate returned 0,"
Ravishangar Kalyanamc42862a2011-09-14 11:42:34 -07001528 "or dst_rect height/width is 0,"
1529 "Downscale Validation incomplete\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001530 return 0;
1531 }
1532
1533 mdp_clk_khz = mdp_clk_hz/1000;
1534
1535 num_hsync_pix_clks = mfd->panel_info.lcdc.h_back_porch +
1536 mfd->panel_info.lcdc.h_front_porch +
1537 mfd->panel_info.lcdc.h_pulse_width +
1538 mfd->panel_info.xres;
1539
1540 hsync_period_ps = 1000000000/panel_clk_khz;
1541 mdp_period_ps = 1000000000/mdp_clk_khz;
1542
1543 total_hsync_period_ps = num_hsync_pix_clks * hsync_period_ps;
1544 mdp_clks_per_hsync = total_hsync_period_ps/mdp_period_ps;
1545
1546 pr_debug("hsync_period_ps %u, mdp_period_ps %u,"
1547 "total_hsync_period_ps %u\n", hsync_period_ps,
1548 mdp_period_ps, total_hsync_period_ps);
1549
1550 src_wh = req->src_rect.w * req->src_rect.h;
1551 if (src_wh % req->dst_rect.h)
1552 fill_rate_y_dir = (src_wh / req->dst_rect.h) + 1;
1553 else
1554 fill_rate_y_dir = (src_wh / req->dst_rect.h);
1555
1556 fill_rate_x_dir = (mfd->panel_info.xres - req->dst_rect.w)
1557 + req->src_rect.w;
1558
1559 if (fill_rate_y_dir >= fill_rate_x_dir)
1560 fillratex100 = 100 * fill_rate_y_dir / mfd->panel_info.xres;
1561 else
1562 fillratex100 = 100 * fill_rate_x_dir / mfd->panel_info.xres;
1563
1564 pr_debug("mdp_clks_per_hsync %u, fill_rate_y_dir %lu,"
1565 "fill_rate_x_dir %lu\n", mdp_clks_per_hsync,
1566 fill_rate_y_dir, fill_rate_x_dir);
1567
1568 mdp_pixels_produced = 100 * mdp_clks_per_hsync/fillratex100;
1569 pr_debug("fillratex100 %lu, mdp_pixels_produced %lu\n",
1570 fillratex100, mdp_pixels_produced);
1571 if (mdp_pixels_produced <= mfd->panel_info.xres) {
1572 pr_err("%s(): LCDC underflow detected during downscale\n",
1573 __func__);
1574 return -ERANGE;
1575 }
1576
1577 return 0;
1578}
1579
1580static int mdp4_overlay_req2pipe(struct mdp_overlay *req, int mixer,
1581 struct mdp4_overlay_pipe **ppipe,
1582 struct msm_fb_data_type *mfd)
1583{
1584 struct mdp4_overlay_pipe *pipe;
1585 struct mdp4_pipe_desc *pd;
1586 int ret, ptype, req_share;
1587 int j;
1588
1589 if (mfd == NULL) {
1590 pr_err("%s: mfd == NULL, -ENODEV\n", __func__);
1591 return -ENODEV;
1592 }
1593
1594 if (mixer >= MDP4_MAX_MIXER) {
1595 pr_err("%s: mixer out of range!\n", __func__);
1596 mdp4_stat.err_mixer++;
1597 return -ERANGE;
1598 }
1599
1600 if (req->z_order < 0 || req->z_order > 2) {
1601 pr_err("%s: z_order=%d out of range!\n", __func__,
1602 req->z_order);
1603 mdp4_stat.err_zorder++;
1604 return -ERANGE;
1605 }
1606
1607 if (req->src_rect.h == 0 || req->src_rect.w == 0) {
1608 pr_err("%s: src img of zero size!\n", __func__);
1609 mdp4_stat.err_size++;
1610 return -EINVAL;
1611 }
1612
1613
1614 if (req->dst_rect.h > (req->src_rect.h * 8)) { /* too much */
1615 mdp4_stat.err_scale++;
1616 pr_err("%s: scale up, too much (h)!\n", __func__);
1617 return -ERANGE;
1618 }
1619
1620 if (req->src_rect.h > (req->dst_rect.h * 8)) { /* too little */
1621 mdp4_stat.err_scale++;
1622 pr_err("%s: scale down, too little (h)!\n", __func__);
1623 return -ERANGE;
1624 }
1625
1626 if (req->dst_rect.w > (req->src_rect.w * 8)) { /* too much */
1627 mdp4_stat.err_scale++;
1628 pr_err("%s: scale up, too much (w)!\n", __func__);
1629 return -ERANGE;
1630 }
1631
1632 if (req->src_rect.w > (req->dst_rect.w * 8)) { /* too little */
1633 mdp4_stat.err_scale++;
1634 pr_err("%s: scale down, too little (w)!\n", __func__);
1635 return -ERANGE;
1636 }
1637
1638 if (mdp_hw_revision == MDP4_REVISION_V1) {
1639 /* non integer down saceling ratio smaller than 1/4
1640 * is not supportted
1641 */
1642 if (req->src_rect.h > (req->dst_rect.h * 4)) {
1643 if (req->src_rect.h % req->dst_rect.h) {
1644 mdp4_stat.err_scale++;
1645 pr_err("%s: need integer (h)!\n", __func__);
1646 return -ERANGE;
1647 }
1648 }
1649
1650 if (req->src_rect.w > (req->dst_rect.w * 4)) {
1651 if (req->src_rect.w % req->dst_rect.w) {
1652 mdp4_stat.err_scale++;
1653 pr_err("%s: need integer (w)!\n", __func__);
1654 return -ERANGE;
1655 }
1656 }
1657 }
1658
1659 if (((req->src_rect.x + req->src_rect.w) > req->src.width) ||
1660 ((req->src_rect.y + req->src_rect.h) > req->src.height)) {
1661 mdp4_stat.err_size++;
1662 pr_err("%s invalid src rectangle\n", __func__);
1663 return -ERANGE;
1664 }
1665
1666 if (ctrl->panel_3d != MDP4_3D_SIDE_BY_SIDE) {
1667 int xres;
1668 int yres;
1669
1670 xres = mfd->panel_info.xres;
1671 yres = mfd->panel_info.yres;
1672
1673 if (((req->dst_rect.x + req->dst_rect.w) > xres) ||
1674 ((req->dst_rect.y + req->dst_rect.h) > yres)) {
1675 mdp4_stat.err_size++;
1676 pr_err("%s invalid dst rectangle\n", __func__);
1677 return -ERANGE;
1678 }
1679 }
1680
1681 ptype = mdp4_overlay_format2type(req->src.format);
1682 if (ptype < 0) {
1683 pr_err("%s: mdp4_overlay_format2type!\n", __func__);
1684 return ptype;
1685 }
1686
1687 req_share = (req->flags & MDP_OV_PIPE_SHARE);
1688
1689 if (req->id == MSMFB_NEW_REQUEST) /* new request */
1690 pipe = mdp4_overlay_pipe_alloc(ptype, mixer, req_share);
1691 else
1692 pipe = mdp4_overlay_ndx2pipe(req->id);
1693
1694 if (pipe == NULL) {
1695 pr_err("%s: pipe == NULL!\n", __func__);
1696 return -ENOMEM;
1697 }
1698
1699 /* no down scale at rgb pipe */
1700 if (pipe->pipe_num <= OVERLAY_PIPE_RGB2) {
1701 if ((req->src_rect.h > req->dst_rect.h) ||
1702 (req->src_rect.w > req->dst_rect.w)) {
1703 pr_err("%s: h>h || w>w!\n", __func__);
1704 return -ERANGE;
1705 }
1706 }
1707
1708 pipe->src_format = req->src.format;
1709 ret = mdp4_overlay_format2pipe(pipe);
1710 if (ret < 0) {
1711 pr_err("%s: mdp4_overlay_format2pipe!\n", __func__);
1712 return ret;
1713 }
1714
1715 /*
1716 * base layer == 1, reserved for frame buffer
1717 * zorder 0 == stage 0 == 2
1718 * zorder 1 == stage 1 == 3
1719 * zorder 2 == stage 2 == 4
1720 */
1721 if (req->id == MSMFB_NEW_REQUEST) { /* new request */
1722 pd = &ctrl->ov_pipe[pipe->pipe_num];
1723 for (j = 0; j < MDP4_MAX_SHARE; j++) {
1724 if (pd->ndx_list[j] == 0) {
1725 pd->ndx_list[j] = pipe->pipe_ndx;
1726 break;
1727 }
1728 }
1729 pipe->pipe_share = req_share;
1730 pd->ref_cnt++;
1731 pipe->pipe_used++;
1732 pipe->mixer_num = mixer;
1733 pipe->mixer_stage = req->z_order + MDP4_MIXER_STAGE0;
1734 pr_debug("%s: zorder=%d pipe ndx=%d num=%d\n", __func__,
1735 req->z_order, pipe->pipe_ndx, pipe->pipe_num);
1736
1737 }
1738
1739 pipe->src_width = req->src.width & 0x07ff; /* source img width */
1740 pipe->src_height = req->src.height & 0x07ff; /* source img height */
1741 pipe->src_h = req->src_rect.h & 0x07ff;
1742 pipe->src_w = req->src_rect.w & 0x07ff;
1743 pipe->src_y = req->src_rect.y & 0x07ff;
1744 pipe->src_x = req->src_rect.x & 0x07ff;
1745 pipe->dst_h = req->dst_rect.h & 0x07ff;
1746 pipe->dst_w = req->dst_rect.w & 0x07ff;
1747 pipe->dst_y = req->dst_rect.y & 0x07ff;
1748 pipe->dst_x = req->dst_rect.x & 0x07ff;
1749
1750 pipe->op_mode = 0;
1751
1752 if (req->flags & MDP_FLIP_LR)
1753 pipe->op_mode |= MDP4_OP_FLIP_LR;
1754
1755 if (req->flags & MDP_FLIP_UD)
1756 pipe->op_mode |= MDP4_OP_FLIP_UD;
1757
1758 if (req->flags & MDP_DITHER)
1759 pipe->op_mode |= MDP4_OP_DITHER_EN;
1760
1761 if (req->flags & MDP_DEINTERLACE)
1762 pipe->op_mode |= MDP4_OP_DEINT_EN;
1763
1764 if (req->flags & MDP_DEINTERLACE_ODD)
1765 pipe->op_mode |= MDP4_OP_DEINT_ODD_REF;
1766
1767 pipe->is_fg = req->is_fg;/* control alpha and color key */
1768
1769 pipe->alpha = req->alpha & 0x0ff;
1770
1771 pipe->transp = req->transp_mask;
1772
1773 *ppipe = pipe;
1774
1775 return 0;
1776}
1777
1778static int get_img(struct msmfb_data *img, struct fb_info *info,
1779 unsigned long *start, unsigned long *len, struct file **pp_file)
1780{
1781 int put_needed, ret = 0, fb_num;
1782 struct file *file;
1783#ifdef CONFIG_ANDROID_PMEM
1784 unsigned long vstart;
1785#endif
1786
1787 if (img->flags & MDP_BLIT_SRC_GEM) {
1788 *pp_file = NULL;
1789 return kgsl_gem_obj_addr(img->memory_id, (int) img->priv,
1790 start, len);
1791 }
1792
1793#ifdef CONFIG_ANDROID_PMEM
1794 if (!get_pmem_file(img->memory_id, start, &vstart, len, pp_file))
1795 return 0;
1796#endif
1797 file = fget_light(img->memory_id, &put_needed);
1798 if (file == NULL)
1799 return -1;
1800
1801 if (MAJOR(file->f_dentry->d_inode->i_rdev) == FB_MAJOR) {
1802 fb_num = MINOR(file->f_dentry->d_inode->i_rdev);
1803 if (get_fb_phys_info(start, len, fb_num))
1804 ret = -1;
1805 else
1806 *pp_file = file;
1807 } else
1808 ret = -1;
1809 if (ret)
1810 fput_light(file, put_needed);
1811 return ret;
1812}
1813
kuogee hsieh4aea2742011-07-06 11:05:05 -07001814#ifdef CONFIG_FB_MSM_MIPI_DSI
1815int mdp4_overlay_3d_sbys(struct fb_info *info, struct msmfb_overlay_3d *req)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001816{
1817 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
1818 int ret = -EPERM;
1819
1820 if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
1821 return -EINTR;
1822
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001823 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
kuogee hsieh4aea2742011-07-06 11:05:05 -07001824 mdp4_dsi_cmd_3d_sbys(mfd, req);
1825 ret = 0;
1826 } else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
1827 mdp4_dsi_video_3d_sbys(mfd, req);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001828 ret = 0;
1829 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001830 mutex_unlock(&mfd->dma->ov_mutex);
1831
1832 return ret;
1833}
kuogee hsieh4aea2742011-07-06 11:05:05 -07001834#else
1835int mdp4_overlay_3d_sbys(struct fb_info *info, struct msmfb_overlay_3d *req)
1836{
1837 /* do nothing */
1838 return -EPERM;
1839}
1840#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001841
1842#ifdef CONFIG_FB_MSM_OVERLAY_WRITEBACK
1843int mdp4_overlay_blt(struct fb_info *info, struct msmfb_overlay_blt *req)
1844{
1845 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
1846
1847 if (mfd == NULL)
1848 return -ENODEV;
1849
1850 if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
1851 return -EINTR;
1852
1853 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD)
1854 mdp4_dsi_overlay_blt(mfd, req);
1855 else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO)
1856 mdp4_dsi_video_overlay_blt(mfd, req);
1857 else if (ctrl->panel_mode & MDP4_PANEL_LCDC)
1858 mdp4_lcdc_overlay_blt(mfd, req);
1859
1860 mutex_unlock(&mfd->dma->ov_mutex);
1861
1862 return 0;
1863}
1864
1865int mdp4_overlay_blt_offset(struct fb_info *info, struct msmfb_overlay_blt *req)
1866{
1867 int ret = 0;
1868
1869 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
1870
1871 if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
1872 return -EINTR;
1873
1874 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD)
1875 ret = mdp4_dsi_overlay_blt_offset(mfd, req);
1876 else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO)
1877 ret = mdp4_dsi_video_overlay_blt_offset(mfd, req);
1878 else if (ctrl->panel_mode & MDP4_PANEL_LCDC)
1879 ret = mdp4_lcdc_overlay_blt_offset(mfd, req);
1880
1881 mutex_unlock(&mfd->dma->ov_mutex);
1882
1883 return ret;
1884}
1885#endif
1886
1887int mdp4_overlay_get(struct fb_info *info, struct mdp_overlay *req)
1888{
1889 struct mdp4_overlay_pipe *pipe;
1890
1891 pipe = mdp4_overlay_ndx2pipe(req->id);
1892 if (pipe == NULL)
1893 return -ENODEV;
1894
1895 *req = pipe->req_data;
1896
1897 return 0;
1898}
1899
1900#define OVERLAY_VGA_SIZE 0x04B000
1901#define OVERLAY_720P_TILE_SIZE 0x0E6000
1902#define OVERLAY_WSVGA_SIZE 0x98000 /* 1024x608, align 600 to 32bit */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001903
1904#ifdef CONFIG_MSM_BUS_SCALING
1905#define OVERLAY_BUS_SCALE_TABLE_BASE 6
1906#endif
1907
1908static int mdp4_overlay_is_rgb_type(int format)
1909{
1910 switch (format) {
1911 case MDP_RGB_565:
1912 case MDP_RGB_888:
1913 case MDP_BGR_565:
1914 case MDP_XRGB_8888:
1915 case MDP_ARGB_8888:
1916 case MDP_RGBA_8888:
1917 case MDP_BGRA_8888:
1918 case MDP_RGBX_8888:
1919 return 1;
1920 default:
1921 return 0;
1922 }
1923}
1924
1925static uint32 mdp4_overlay_get_perf_level(struct mdp_overlay *req)
1926{
1927 int is_fg;
1928
1929 if (req->is_fg && ((req->alpha & 0x0ff) == 0xff))
1930 is_fg = 1;
1931
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07001932 if (mdp4_extn_disp)
1933 return OVERLAY_PERF_LEVEL1;
1934
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001935 if (req->flags & MDP_DEINTERLACE)
1936 return OVERLAY_PERF_LEVEL1;
1937
1938 if (mdp4_overlay_is_rgb_type(req->src.format) && is_fg &&
1939 ((req->src.width * req->src.height) <= OVERLAY_WSVGA_SIZE))
1940 return OVERLAY_PERF_LEVEL4;
1941 else if (mdp4_overlay_is_rgb_type(req->src.format))
1942 return OVERLAY_PERF_LEVEL1;
1943
1944 if (ctrl->ov_pipe[OVERLAY_PIPE_VG1].ref_cnt &&
1945 ctrl->ov_pipe[OVERLAY_PIPE_VG2].ref_cnt)
1946 return OVERLAY_PERF_LEVEL1;
1947
1948 if (req->src.width*req->src.height <= OVERLAY_VGA_SIZE)
1949 return OVERLAY_PERF_LEVEL3;
1950 else if (req->src.width*req->src.height <= OVERLAY_720P_TILE_SIZE)
1951 return OVERLAY_PERF_LEVEL2;
1952 else
1953 return OVERLAY_PERF_LEVEL1;
1954}
1955
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07001956void mdp4_update_perf_level(u32 perf_level)
1957{
1958 new_perf_level = perf_level;
1959}
1960
kuogee hsiehc4b8b2f2011-07-12 13:32:14 -07001961void mdp4_set_perf_level(void)
1962{
1963 static int old_perf_level;
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07001964 int cur_perf_level;
kuogee hsiehc4b8b2f2011-07-12 13:32:14 -07001965
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07001966 if (mdp4_extn_disp)
1967 cur_perf_level = OVERLAY_PERF_LEVEL1;
1968 else
1969 cur_perf_level = new_perf_level;
1970
1971 if (old_perf_level != cur_perf_level) {
1972 mdp_set_core_clk(cur_perf_level);
1973 old_perf_level = cur_perf_level;
kuogee hsiehc4b8b2f2011-07-12 13:32:14 -07001974 }
1975}
1976
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001977int mdp4_overlay_set(struct fb_info *info, struct mdp_overlay *req)
1978{
1979 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
kuogee hsiehc4b8b2f2011-07-12 13:32:14 -07001980 int ret, mixer, perf_level;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001981 struct mdp4_overlay_pipe *pipe;
1982
1983 if (mfd == NULL) {
1984 pr_err("%s: mfd == NULL, -ENODEV\n", __func__);
1985 return -ENODEV;
1986 }
1987
1988 if (!mfd->panel_power_on) /* suspended */
1989 return -EPERM;
1990
1991 if (req->src.format == MDP_FB_FORMAT)
1992 req->src.format = mfd->fb_imgType;
1993
1994 if (mutex_lock_interruptible(&mfd->dma->ov_mutex)) {
1995 pr_err("%s: mutex_lock_interruptible, -EINTR\n", __func__);
1996 return -EINTR;
1997 }
1998
1999 perf_level = mdp4_overlay_get_perf_level(req);
2000
2001 if ((mfd->panel_info.type == LCDC_PANEL) &&
2002 (req->src_rect.h >
2003 req->dst_rect.h || req->src_rect.w > req->dst_rect.w)) {
2004 if (mdp4_overlay_validate_downscale(req, mfd,
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07002005 perf_level, mfd->panel_info.clk_rate))
2006 mdp4_lcdc_overlay_blt_start(mfd);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002007 }
kuogee hsieh4d3c7792011-07-25 11:02:24 -07002008
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002009 if ((mfd->panel_info.type == MIPI_VIDEO_PANEL) &&
2010 (req->src_rect.h >
2011 req->dst_rect.h || req->src_rect.w > req->dst_rect.w)) {
2012 if (mdp4_overlay_validate_downscale(req, mfd,
kuogee hsieh4d3c7792011-07-25 11:02:24 -07002013 perf_level, (&mfd->panel_info.mipi)->dsi_pclk_rate))
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07002014 mdp4_dsi_video_blt_start(mfd);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002015 }
kuogee hsieh4d3c7792011-07-25 11:02:24 -07002016
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002017 mixer = mfd->panel_info.pdest; /* DISPLAY_1 or DISPLAY_2 */
2018
2019 ret = mdp4_overlay_req2pipe(req, mixer, &pipe, mfd);
2020 if (ret < 0) {
2021 mutex_unlock(&mfd->dma->ov_mutex);
2022 pr_err("%s: mdp4_overlay_req2pipe, ret=%d\n", __func__, ret);
2023 return ret;
2024 }
2025
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002026 /*
2027 * writeback (blt) mode to provide work around for
2028 * dsi cmd mode interface hardware bug.
2029 */
2030 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
2031 if (mixer == MDP4_MIXER0 && req->dst_rect.x != 0) {
2032 mdp4_dsi_blt_dmap_busy_wait(mfd);
2033 mdp4_dsi_overlay_blt_start(mfd);
2034 }
2035 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002036
2037 /* return id back to user */
2038 req->id = pipe->pipe_ndx; /* pipe_ndx start from 1 */
2039 pipe->req_data = *req; /* keep original req */
2040
2041 pipe->flags = req->flags;
2042
2043 if (pipe->flags & MDP_SHARPENING) {
2044 bool test = ((pipe->req_data.dpp.sharp_strength > 0) &&
2045 ((req->src_rect.w > req->dst_rect.w) &&
2046 (req->src_rect.h > req->dst_rect.h)));
2047 if (test) {
2048 pr_warn("%s: No sharpening while downscaling.\n",
2049 __func__);
2050 pipe->flags &= ~MDP_SHARPENING;
2051 }
2052 }
2053
2054 mdp4_stat.overlay_set[pipe->mixer_num]++;
2055
2056 if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
2057 if (mdp_hw_revision == MDP4_REVISION_V2_1 &&
2058 pipe->mixer_num == MDP4_MIXER0)
2059 mdp4_overlay_status_write(MDP4_OVERLAY_TYPE_SET, true);
2060 }
2061
Adrian Salido-Moreno5e912032011-08-29 11:15:47 -07002062 if (new_perf_level != perf_level) {
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07002063 mdp4_update_perf_level(perf_level);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002064
Adrian Salido-Moreno5e912032011-08-29 11:15:47 -07002065 /* change clck base on perf level */
Adrian Salido-Moreno5e912032011-08-29 11:15:47 -07002066 if (pipe->mixer_num == MDP4_MIXER0) {
2067 if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
kuogee hsiehaff429a2011-09-22 17:50:05 -07002068 mdp4_overlay_dsi_video_set_perf(mfd);
Adrian Salido-Moreno5e912032011-08-29 11:15:47 -07002069 } else if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
2070 mdp4_dsi_cmd_dma_busy_wait(mfd);
2071 mdp4_dsi_blt_dmap_busy_wait(mfd);
2072 mdp4_set_perf_level();
2073 } else if (ctrl->panel_mode & MDP4_PANEL_LCDC) {
kuogee hsiehaff429a2011-09-22 17:50:05 -07002074 mdp4_overlay_lcdc_set_perf(mfd);
Adrian Salido-Moreno5e912032011-08-29 11:15:47 -07002075 } else if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
2076 mdp4_mddi_dma_busy_wait(mfd);
2077 mdp4_set_perf_level();
2078 }
2079 } else {
2080 if (ctrl->panel_mode & MDP4_PANEL_DTV)
2081 mdp4_overlay_dtv_vsync_push(mfd, pipe);
kuogee hsieh9452ecb2011-08-01 18:26:23 -07002082 }
kuogee hsieh9452ecb2011-08-01 18:26:23 -07002083 }
kuogee hsieh9452ecb2011-08-01 18:26:23 -07002084
2085 mutex_unlock(&mfd->dma->ov_mutex);
2086
2087
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002088#ifdef CONFIG_MSM_BUS_SCALING
2089 if (pipe->mixer_num == MDP4_MIXER0) {
2090 mdp_bus_scale_update_request(OVERLAY_BUS_SCALE_TABLE_BASE
2091 - perf_level);
2092 }
2093#endif
2094
2095 return 0;
2096}
2097
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002098int mdp4_overlay_unset(struct fb_info *info, int ndx)
2099{
2100 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
2101 struct mdp4_overlay_pipe *pipe;
2102 uint32 flags;
2103
2104 if (mfd == NULL)
2105 return -ENODEV;
2106
2107 if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
2108 return -EINTR;
2109
2110 pipe = mdp4_overlay_ndx2pipe(ndx);
2111
2112 if (pipe == NULL) {
2113 mutex_unlock(&mfd->dma->ov_mutex);
2114 return -ENODEV;
2115 }
2116
2117 if (pipe->mixer_num == MDP4_MIXER1)
2118 ctrl->mixer1_played = 0;
2119 else {
2120 /* mixer 0 */
2121 ctrl->mixer0_played = 0;
2122#ifdef CONFIG_FB_MSM_MIPI_DSI
2123 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
2124 if (mfd->panel_power_on) {
2125 mdp4_dsi_blt_dmap_busy_wait(mfd);
2126 }
2127 }
2128#else
2129 if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
2130 if (mfd->panel_power_on)
2131 mdp4_mddi_dma_busy_wait(mfd);
2132 }
2133#endif
2134 }
2135
2136 mdp4_mixer_stage_down(pipe);
2137
2138 if (pipe->mixer_num == MDP4_MIXER0) {
2139#ifdef CONFIG_FB_MSM_MIPI_DSI
2140 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
2141 if (mfd->panel_power_on)
2142 if (mdp4_dsi_overlay_blt_stop(mfd) == 0)
2143 mdp4_dsi_cmd_overlay_restore();
2144 } else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
kuogee hsiehebca0c72011-07-14 13:30:33 -07002145 mdp4_overlay_reg_flush(pipe, 1);
kuogee hsieh5c6cfbf2011-09-06 19:01:31 -07002146 if (mfd->panel_power_on) {
2147 flags = pipe->flags;
2148 pipe->flags &= ~MDP_OV_PLAY_NOWAIT;
2149 mdp4_overlay_dsi_video_vsync_push(mfd, pipe);
2150 pipe->flags = flags;
2151 }
kuogee hsieh4d3c7792011-07-25 11:02:24 -07002152 mdp4_dsi_video_blt_stop(mfd);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002153 }
2154#else
2155 if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
2156 if (mdp_hw_revision == MDP4_REVISION_V2_1)
2157 mdp4_overlay_status_write(
2158 MDP4_OVERLAY_TYPE_UNSET, true);
2159 if (mfd->panel_power_on)
2160 mdp4_mddi_overlay_restore();
2161 }
2162#endif
2163 else if (ctrl->panel_mode & MDP4_PANEL_LCDC) {
kuogee hsiehebca0c72011-07-14 13:30:33 -07002164 mdp4_overlay_reg_flush(pipe, 1);
kuogee hsieh5c6cfbf2011-09-06 19:01:31 -07002165 if (mfd->panel_power_on) {
2166 flags = pipe->flags;
2167 pipe->flags &= ~MDP_OV_PLAY_NOWAIT;
2168 mdp4_overlay_lcdc_vsync_push(mfd, pipe);
2169 pipe->flags = flags;
2170 }
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07002171 mdp4_lcdc_overlay_blt_stop(mfd);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002172 }
2173 }
2174#ifdef CONFIG_FB_MSM_DTV
2175 else { /* mixer1, DTV, ATV */
kuogee hsieh9452ecb2011-08-01 18:26:23 -07002176 if (ctrl->panel_mode & MDP4_PANEL_DTV) {
kuogee hsieh5c6cfbf2011-09-06 19:01:31 -07002177 if (mfd->panel_power_on) {
2178 flags = pipe->flags;
2179 pipe->flags &= ~MDP_OV_PLAY_NOWAIT;
2180 mdp4_overlay_dtv_vsync_push(mfd, pipe);
2181 pipe->flags = flags;
2182 }
kuogee hsieh9452ecb2011-08-01 18:26:23 -07002183 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002184 }
2185#endif
2186
2187 mdp4_stat.overlay_unset[pipe->mixer_num]++;
2188
2189 mdp4_overlay_pipe_free(pipe);
2190
2191 if (!(ctrl->ov_pipe[OVERLAY_PIPE_VG1].ref_cnt +
2192 ctrl->ov_pipe[OVERLAY_PIPE_VG2].ref_cnt))
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07002193 mdp4_update_perf_level(OVERLAY_PERF_LEVEL4);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002194
2195 mutex_unlock(&mfd->dma->ov_mutex);
2196
2197#ifdef CONFIG_MSM_BUS_SCALING
2198 if (pipe->mixer_num == MDP4_MIXER0)
2199 if (mfd->panel_power_on)
2200 mdp_bus_scale_update_request(2);
2201#endif
2202 return 0;
2203}
2204
2205struct tile_desc {
2206 uint32 width; /* tile's width */
2207 uint32 height; /* tile's height */
2208 uint32 row_tile_w; /* tiles per row's width */
2209 uint32 row_tile_h; /* tiles per row's height */
2210};
2211
2212void tile_samsung(struct tile_desc *tp)
2213{
2214 /*
2215 * each row of samsung tile consists of two tiles in height
2216 * and two tiles in width which means width should align to
2217 * 64 x 2 bytes and height should align to 32 x 2 bytes.
2218 * video decoder generate two tiles in width and one tile
2219 * in height which ends up height align to 32 X 1 bytes.
2220 */
2221 tp->width = 64; /* 64 bytes */
2222 tp->row_tile_w = 2; /* 2 tiles per row's width */
2223 tp->height = 32; /* 32 bytes */
2224 tp->row_tile_h = 1; /* 1 tiles per row's height */
2225}
2226
2227uint32 tile_mem_size(struct mdp4_overlay_pipe *pipe, struct tile_desc *tp)
2228{
2229 uint32 tile_w, tile_h;
2230 uint32 row_num_w, row_num_h;
2231
2232
2233 tile_w = tp->width * tp->row_tile_w;
2234 tile_h = tp->height * tp->row_tile_h;
2235
2236 row_num_w = (pipe->src_width + tile_w - 1) / tile_w;
2237 row_num_h = (pipe->src_height + tile_h - 1) / tile_h;
2238 return ((row_num_w * row_num_h * tile_w * tile_h) + 8191) & ~8191;
2239}
2240
2241int mdp4_overlay_play(struct fb_info *info, struct msmfb_overlay_data *req,
2242 struct file **pp_src_file, struct file **pp_src_plane1_file,
2243 struct file **pp_src_plane2_file)
2244{
2245 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
2246 struct msmfb_data *img;
2247 struct mdp4_overlay_pipe *pipe;
2248 struct mdp4_pipe_desc *pd;
2249 ulong start, addr;
2250 ulong len = 0;
2251 struct file *p_src_file = 0;
2252 struct file *p_src_plane1_file = 0, *p_src_plane2_file = 0;
2253 uint32_t overlay_version = 0;
2254
2255 if (mfd == NULL)
2256 return -ENODEV;
2257
2258 if (!mfd->panel_power_on) /* suspended */
2259 return -EPERM;
2260
2261 pipe = mdp4_overlay_ndx2pipe(req->id);
2262 if (pipe == NULL) {
2263 pr_err("%s: req_id=%d Error\n", __func__, req->id);
2264 return -ENODEV;
2265 }
2266
2267 if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
2268 return -EINTR;
2269
2270 pd = &ctrl->ov_pipe[pipe->pipe_num];
2271 if (pd->player && pipe != pd->player) {
2272 if (pipe->pipe_type == OVERLAY_TYPE_RGB) {
2273 mutex_unlock(&mfd->dma->ov_mutex);
2274 return 0; /* ignore it, kicked out already */
2275 }
2276 }
2277
2278 pd->player = pipe; /* keep */
2279
2280 img = &req->data;
2281 get_img(img, info, &start, &len, &p_src_file);
2282 if (len == 0) {
2283 mutex_unlock(&mfd->dma->ov_mutex);
2284 pr_err("%s: pmem Error\n", __func__);
2285 return -1;
2286 }
2287 *pp_src_file = p_src_file;
2288
2289 addr = start + img->offset;
2290 pipe->srcp0_addr = addr;
2291 pipe->srcp0_ystride = pipe->src_width * pipe->bpp;
2292
2293 if ((req->version_key & VERSION_KEY_MASK) == 0xF9E8D700)
2294 overlay_version = (req->version_key & ~VERSION_KEY_MASK);
2295
2296 if (pipe->fetch_plane == OVERLAY_PLANE_PSEUDO_PLANAR) {
2297 if (overlay_version > 0) {
2298 img = &req->plane1_data;
2299 get_img(img, info, &start, &len, &p_src_plane1_file);
2300 if (len == 0) {
2301 mutex_unlock(&mfd->dma->ov_mutex);
2302 pr_err("%s: Error to get plane1\n", __func__);
2303 return -EINVAL;
2304 }
2305 pipe->srcp1_addr = start + img->offset;
2306 *pp_src_plane1_file = p_src_plane1_file;
2307 } else if (pipe->frame_format ==
2308 MDP4_FRAME_FORMAT_VIDEO_SUPERTILE) {
2309 struct tile_desc tile;
2310
2311 tile_samsung(&tile);
2312 pipe->srcp1_addr = addr + tile_mem_size(pipe, &tile);
2313 } else {
2314 pipe->srcp1_addr = addr + (pipe->src_width *
2315 pipe->src_height);
2316 }
2317 pipe->srcp0_ystride = pipe->src_width;
2318 if ((pipe->src_format == MDP_Y_CRCB_H1V1) ||
2319 (pipe->src_format == MDP_Y_CBCR_H1V1)) {
2320 if (pipe->src_width > YUV_444_MAX_WIDTH)
2321 pipe->srcp1_ystride = pipe->src_width << 2;
2322 else
2323 pipe->srcp1_ystride = pipe->src_width << 1;
2324 } else
2325 pipe->srcp1_ystride = pipe->src_width;
2326
2327 } else if (pipe->fetch_plane == OVERLAY_PLANE_PLANAR) {
2328 if (overlay_version > 0) {
2329 img = &req->plane1_data;
2330 get_img(img, info, &start, &len, &p_src_plane1_file);
2331 if (len == 0) {
2332 mutex_unlock(&mfd->dma->ov_mutex);
2333 pr_err("%s: Error to get plane1\n", __func__);
2334 return -EINVAL;
2335 }
2336 pipe->srcp1_addr = start + img->offset;
2337 *pp_src_plane1_file = p_src_plane1_file;
2338
2339 img = &req->plane2_data;
2340 get_img(img, info, &start, &len, &p_src_plane2_file);
2341 if (len == 0) {
2342 mutex_unlock(&mfd->dma->ov_mutex);
2343 pr_err("%s: Error to get plane2\n", __func__);
2344 return -EINVAL;
2345 }
2346 pipe->srcp2_addr = start + img->offset;
2347 *pp_src_plane2_file = p_src_plane2_file;
2348 } else {
2349 addr += (pipe->src_width * pipe->src_height);
2350 pipe->srcp1_addr = addr;
2351 addr += ((pipe->src_width / 2) *
2352 (pipe->src_height / 2));
2353 pipe->srcp2_addr = addr;
2354 }
Adrian Salido-Moreno33dc7b92011-08-18 16:16:12 -07002355 /* mdp planar format expects Cb in srcp1 and Cr in p2 */
2356 if (pipe->src_format == MDP_Y_CR_CB_H2V2)
2357 swap(pipe->srcp1_addr, pipe->srcp2_addr);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002358 pipe->srcp0_ystride = pipe->src_width;
2359 pipe->srcp1_ystride = pipe->src_width / 2;
2360 pipe->srcp2_ystride = pipe->src_width / 2;
2361 }
2362
2363 if (pipe->pipe_num >= OVERLAY_PIPE_VG1)
2364 mdp4_overlay_vg_setup(pipe); /* video/graphic pipe */
2365 else {
2366 if (pipe->flags & MDP_SHARPENING) {
2367 pr_warn(
2368 "%s: Sharpening/Smoothing not supported on RGB pipe\n",
2369 __func__);
2370 pipe->flags &= ~MDP_SHARPENING;
2371 }
2372 mdp4_overlay_rgb_setup(pipe); /* rgb pipe */
2373 }
2374
2375 mdp4_mixer_blend_setup(pipe);
2376 mdp4_mixer_stage_up(pipe);
2377
2378 if (pipe->mixer_num == MDP4_MIXER1) {
2379 ctrl->mixer1_played++;
2380 /* enternal interface */
2381 if (ctrl->panel_mode & MDP4_PANEL_DTV)
2382#ifdef CONFIG_FB_MSM_DTV
2383 mdp4_overlay_dtv_ov_done_push(mfd, pipe);
2384#else
2385 mdp4_overlay_reg_flush(pipe, 1);
2386#endif
2387 else if (ctrl->panel_mode & MDP4_PANEL_ATV)
2388 mdp4_overlay_reg_flush(pipe, 1);
2389 } else {
2390 /* primary interface */
2391 ctrl->mixer0_played++;
kuogee hsieh3de11f32011-07-08 14:09:11 -07002392 if (ctrl->panel_mode & MDP4_PANEL_LCDC) {
2393 mdp4_overlay_reg_flush(pipe, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002394 mdp4_overlay_lcdc_vsync_push(mfd, pipe);
kuogee hsieh3de11f32011-07-08 14:09:11 -07002395 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002396#ifdef CONFIG_FB_MSM_MIPI_DSI
kuogee hsieh3de11f32011-07-08 14:09:11 -07002397 else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
2398 mdp4_overlay_reg_flush(pipe, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002399 mdp4_overlay_dsi_video_vsync_push(mfd, pipe);
kuogee hsieh3de11f32011-07-08 14:09:11 -07002400 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002401#endif
2402 else {
2403 /* mddi & mipi dsi cmd mode */
2404 if (pipe->flags & MDP_OV_PLAY_NOWAIT) {
2405 mdp4_stat.overlay_play[pipe->mixer_num]++;
2406 mutex_unlock(&mfd->dma->ov_mutex);
2407 return 0;
2408 }
2409#ifdef CONFIG_FB_MSM_MIPI_DSI
2410 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
2411 mdp4_dsi_cmd_dma_busy_wait(mfd);
2412 mdp4_dsi_cmd_kickoff_video(mfd, pipe);
2413 }
2414#else
2415 if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
2416 mdp4_mddi_dma_busy_wait(mfd);
2417 mdp4_mddi_kickoff_video(mfd, pipe);
2418 }
2419#endif
2420 }
2421 }
2422
2423 mdp4_stat.overlay_play[pipe->mixer_num]++;
2424
2425 mutex_unlock(&mfd->dma->ov_mutex);
2426
2427 return 0;
2428}