Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2012, Code Aurora Forum. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 13 | #include <linux/kernel.h> |
Steve Muckle | f132c6c | 2012-06-06 18:30:57 -0700 | [diff] [blame] | 14 | #include <linux/module.h> |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 15 | #include <linux/init.h> |
Siddartha Mohanadoss | eb90c92 | 2012-03-27 22:58:06 -0700 | [diff] [blame] | 16 | #include <linux/fs.h> |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 17 | #include <linux/mutex.h> |
| 18 | #include <linux/err.h> |
| 19 | #include <linux/slab.h> |
| 20 | #include <linux/gpio.h> |
| 21 | #include <linux/hwmon.h> |
| 22 | #include <linux/delay.h> |
| 23 | #include <linux/epm_adc.h> |
Siddartha Mohanadoss | eb90c92 | 2012-03-27 22:58:06 -0700 | [diff] [blame] | 24 | #include <linux/uaccess.h> |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 25 | #include <linux/spi/spi.h> |
| 26 | #include <linux/hwmon-sysfs.h> |
Siddartha Mohanadoss | eb90c92 | 2012-03-27 22:58:06 -0700 | [diff] [blame] | 27 | #include <linux/miscdevice.h> |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 28 | #include <linux/platform_device.h> |
| 29 | |
| 30 | #define EPM_ADC_DRIVER_NAME "epm_adc" |
| 31 | #define EPM_ADC_MAX_FNAME 20 |
| 32 | #define EPM_ADC_CONVERSION_DELAY 100 /* milliseconds */ |
| 33 | /* Command Bits */ |
| 34 | #define EPM_ADC_ADS_SPI_BITS_PER_WORD 8 |
| 35 | #define EPM_ADC_ADS_DATA_READ_CMD (0x1 << 5) |
| 36 | #define EPM_ADC_ADS_REG_READ_CMD (0x2 << 5) |
| 37 | #define EPM_ADC_ADS_REG_WRITE_CMD (0x3 << 5) |
| 38 | #define EPM_ADC_ADS_PULSE_CONVERT_CMD (0x4 << 5) |
| 39 | #define EPM_ADC_ADS_MULTIPLE_REG_ACCESS (0x1 << 4) |
| 40 | /* Register map */ |
| 41 | #define EPM_ADC_ADS_CONFIG0_REG_ADDR 0x0 |
| 42 | #define EPM_ADC_ADS_CONFIG1_REG_ADDR 0x1 |
| 43 | #define EPM_ADC_ADS_MUXSG0_REG_ADDR 0x4 |
| 44 | #define EPM_ADC_ADS_MUXSG1_REG_ADDR 0x5 |
| 45 | /* Register map default data */ |
| 46 | #define EPM_ADC_ADS_REG0_DEFAULT 0x2 |
| 47 | #define EPM_ADC_ADS_REG1_DEFAULT 0x52 |
| 48 | #define EPM_ADC_ADS_CHANNEL_DATA_CHID 0x1f |
| 49 | /* Channel ID */ |
| 50 | #define EPM_ADC_ADS_CHANNEL_OFFSET 0x18 |
| 51 | #define EPM_ADC_ADS_CHANNEL_VCC 0x1a |
| 52 | #define EPM_ADC_ADS_CHANNEL_TEMP 0x1b |
| 53 | #define EPM_ADC_ADS_CHANNEL_GAIN 0x1c |
| 54 | #define EPM_ADC_ADS_CHANNEL_REF 0x1d |
| 55 | /* Scaling data co-efficients */ |
| 56 | #define EPM_ADC_SCALE_MILLI 1000 |
| 57 | #define EPM_ADC_SCALE_CODE_VOLTS 3072 |
| 58 | #define EPM_ADC_SCALE_CODE_GAIN 30720 |
| 59 | #define EPM_ADC_TEMP_SENSOR_COEFF 394 |
| 60 | #define EPM_ADC_TEMP_TO_DEGC_COEFF 168000 |
| 61 | #define EPM_ADC_CHANNEL_AIN_OFFSET 8 |
| 62 | #define EPM_ADC_MAX_NEGATIVE_SCALE_CODE 0x8000 |
| 63 | #define EPM_ADC_NEG_LSB_CODE 0xffff |
| 64 | #define EPM_ADC_VREF_CODE 0x7800 |
| 65 | #define EPM_ADC_MILLI_VOLTS_SOURCE 4750 |
| 66 | #define EPM_ADC_SCALE_FACTOR 64 |
| 67 | #define GPIO_EPM_GLOBAL_ENABLE 86 |
| 68 | #define EPM_ADC_CONVERSION_TIME_MIN 50000 |
| 69 | #define EPM_ADC_CONVERSION_TIME_MAX 51000 |
Siddartha Mohanadoss | b0b8a6e | 2012-09-04 08:23:43 -0700 | [diff] [blame^] | 70 | /* PSoc Commands */ |
| 71 | #define EPM_PSOC_INIT_CMD 0x1 |
| 72 | #define EPM_PSOC_INIT_RESPONSE_CMD 0x2 |
| 73 | #define EPM_PSOC_CHANNEL_ENABLE_DISABLE_CMD 0x5 |
| 74 | #define EPM_PSOC_CHANNEL_ENABLE_DISABLE_RESPONSE_CMD 0x6 |
| 75 | #define EPM_PSOC_SET_AVERAGING_CMD 0x7 |
| 76 | #define EPM_PSOC_SET_AVERAGING_RESPONSE_CMD 0x8 |
| 77 | #define EPM_PSOC_GET_LAST_MEASUREMENT_CMD 0x9 |
| 78 | #define EPM_PSOC_GET_LAST_MEASUREMENT_RESPONSE_CMD 0xa |
| 79 | #define EPM_PSOC_GET_BUFFERED_DATA_CMD 0xb |
| 80 | #define EPM_PSOC_GET_BUFFERED_RESPONSE_CMD 0xc |
| 81 | #define EPM_PSOC_GET_SYSTEM_TIMESTAMP_CMD 0x11 |
| 82 | #define EPM_PSOC_GET_SYSTEM_TIMESTAMP_RESPONSE_CMD 0x12 |
| 83 | #define EPM_PSOC_SET_SYSTEM_TIMESTAMP_CMD 0x13 |
| 84 | #define EPM_PSOC_SET_SYSTEM_TIMESTAMP_RESPONSE_CMD 0x14 |
| 85 | #define EPM_PSOC_SET_CHANNEL_TYPE_CMD 0x15 |
| 86 | #define EPM_PSOC_SET_CHANNEL_TYPE_RESPONSE_CMD 0x16 |
| 87 | #define EPM_PSOC_GET_AVERAGED_DATA_CMD 0x19 |
| 88 | #define EPM_PSOC_GET_AVERAGED_DATA_RESPONSE_CMD 0x1a |
| 89 | #define EPM_PSOC_SET_CHANNEL_SWITCH_DELAY_CMD 0x1b |
| 90 | #define EPM_PSOC_SET_CHANNEL_SWITCH_DELAY_RESPONSE_CMD 0x1c |
| 91 | #define EPM_PSOC_CLEAR_BUFFER_CMD 0x1d |
| 92 | #define EPM_PSOC_CLEAR_BUFFER_RESPONSE_CMD 0x1e |
| 93 | #define EPM_PSOC_SET_VADC_REFERENCE_CMD 0x1f |
| 94 | #define EPM_PSOC_SET_VADC_REFERENCE_RESPONSE_CMD 0x20 |
| 95 | |
| 96 | #define EPM_PSOC_GLOBAL_ENABLE 81 |
| 97 | #define EPM_PSOC_VREF_VOLTAGE 2048 |
| 98 | #define EPM_PSOC_MAX_ADC_CODE_16_BIT 32767 |
| 99 | #define EPM_GLOBAL_ENABLE_MIN_DELAY 5000 |
| 100 | #define EPM_GLOBAL_ENABLE_MAX_DELAY 5100 |
| 101 | |
| 102 | #define EPM_PSOC_BUFFERED_DATA_LENGTH 48 |
| 103 | #define EPM_PSOC_BUFFERED_DATA_LENGTH2 54 |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 104 | |
Yan He | 2af37f1 | 2012-08-31 11:09:36 -0700 | [diff] [blame] | 105 | #define EPM_SPI_NOR_CS_N_GPIO 53 |
| 106 | |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 107 | struct epm_adc_drv { |
| 108 | struct platform_device *pdev; |
| 109 | struct device *hwmon; |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 110 | struct spi_device *epm_spi_client; |
| 111 | struct mutex conv_lock; |
| 112 | uint32_t bus_id; |
Siddartha Mohanadoss | eb90c92 | 2012-03-27 22:58:06 -0700 | [diff] [blame] | 113 | struct miscdevice misc; |
Siddartha Mohanadoss | b0b8a6e | 2012-09-04 08:23:43 -0700 | [diff] [blame^] | 114 | struct epm_chan_properties epm_psoc_ch_prop[0]; |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 115 | }; |
| 116 | |
| 117 | static struct epm_adc_drv *epm_adc_drv; |
| 118 | static struct i2c_board_info *epm_i2c_info; |
| 119 | static bool epm_adc_first_request; |
| 120 | static int epm_gpio_expander_base_addr; |
Siddartha Mohanadoss | eb90c92 | 2012-03-27 22:58:06 -0700 | [diff] [blame] | 121 | static bool epm_adc_expander_register; |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 122 | |
| 123 | #define GPIO_EPM_EXPANDER_IO0 epm_gpio_expander_base_addr |
| 124 | #define GPIO_PWR_MON_ENABLE (GPIO_EPM_EXPANDER_IO0 + 1) |
| 125 | #define GPIO_ADC1_PWDN_N (GPIO_PWR_MON_ENABLE + 1) |
| 126 | #define GPIO_PWR_MON_RESET_N (GPIO_ADC1_PWDN_N + 1) |
| 127 | #define GPIO_EPM_SPI_ADC1_CS_N (GPIO_PWR_MON_RESET_N + 1) |
| 128 | #define GPIO_PWR_MON_START (GPIO_EPM_SPI_ADC1_CS_N + 1) |
| 129 | #define GPIO_ADC1_DRDY_N (GPIO_PWR_MON_START + 1) |
| 130 | #define GPIO_ADC2_PWDN_N (GPIO_ADC1_DRDY_N + 1) |
| 131 | #define GPIO_EPM_SPI_ADC2_CS_N (GPIO_ADC2_PWDN_N + 1) |
| 132 | #define GPIO_ADC2_DRDY_N (GPIO_EPM_SPI_ADC2_CS_N + 1) |
| 133 | |
| 134 | static int epm_adc_i2c_expander_register(void) |
| 135 | { |
| 136 | int rc = 0; |
| 137 | static struct i2c_adapter *i2c_adap; |
| 138 | static struct i2c_client *epm_i2c_client; |
| 139 | |
| 140 | rc = gpio_request(GPIO_EPM_GLOBAL_ENABLE, "EPM_GLOBAL_EN"); |
| 141 | if (!rc) { |
| 142 | gpio_direction_output(GPIO_EPM_GLOBAL_ENABLE, 1); |
| 143 | } else { |
| 144 | pr_err("%s: Configure EPM_GLOBAL_EN Failed\n", __func__); |
| 145 | return rc; |
| 146 | } |
| 147 | |
| 148 | usleep_range(EPM_ADC_CONVERSION_TIME_MIN, |
| 149 | EPM_ADC_CONVERSION_TIME_MAX); |
| 150 | |
| 151 | i2c_adap = i2c_get_adapter(epm_adc_drv->bus_id); |
| 152 | if (i2c_adap == NULL) { |
| 153 | pr_err("%s: i2c_get_adapter() failed\n", __func__); |
| 154 | return -EINVAL; |
| 155 | } |
| 156 | |
| 157 | usleep_range(EPM_ADC_CONVERSION_TIME_MIN, |
| 158 | EPM_ADC_CONVERSION_TIME_MAX); |
| 159 | |
| 160 | epm_i2c_client = i2c_new_device(i2c_adap, epm_i2c_info); |
| 161 | if (IS_ERR(epm_i2c_client)) { |
| 162 | pr_err("Error with i2c epm device register\n"); |
| 163 | return -ENODEV; |
| 164 | } |
| 165 | |
| 166 | epm_adc_first_request = false; |
| 167 | |
| 168 | return 0; |
| 169 | } |
| 170 | |
| 171 | static int epm_adc_gpio_configure_expander_enable(void) |
| 172 | { |
| 173 | int rc = 0; |
| 174 | |
Yan He | 2af37f1 | 2012-08-31 11:09:36 -0700 | [diff] [blame] | 175 | rc = gpio_request(EPM_SPI_NOR_CS_N_GPIO, "SPI_NOR_CS_N"); |
| 176 | if (!rc) |
| 177 | gpio_direction_output(EPM_SPI_NOR_CS_N_GPIO, 1); |
| 178 | else { |
| 179 | pr_err("Configure spi nor Failed\n"); |
| 180 | return -EINVAL; |
| 181 | } |
| 182 | |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 183 | if (epm_adc_first_request) { |
| 184 | rc = gpio_request(GPIO_EPM_GLOBAL_ENABLE, "EPM_GLOBAL_EN"); |
| 185 | if (!rc) { |
| 186 | gpio_direction_output(GPIO_EPM_GLOBAL_ENABLE, 1); |
| 187 | } else { |
| 188 | pr_err("%s: Configure EPM_GLOBAL_EN Failed\n", |
| 189 | __func__); |
| 190 | return rc; |
| 191 | } |
| 192 | } else { |
| 193 | epm_adc_first_request = true; |
| 194 | } |
| 195 | |
| 196 | usleep_range(EPM_ADC_CONVERSION_TIME_MIN, |
| 197 | EPM_ADC_CONVERSION_TIME_MAX); |
| 198 | |
| 199 | rc = gpio_request(GPIO_PWR_MON_ENABLE, "GPIO_PWR_MON_ENABLE"); |
| 200 | if (!rc) { |
| 201 | rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1); |
| 202 | if (rc) { |
| 203 | pr_err("%s: Set GPIO_PWR_MON_ENABLE failed\n", |
| 204 | __func__); |
| 205 | return rc; |
| 206 | } |
| 207 | } else { |
| 208 | pr_err("%s: gpio_request GPIO_PWR_MON_ENABLE failed\n", |
| 209 | __func__); |
| 210 | return rc; |
| 211 | } |
| 212 | |
| 213 | rc = gpio_request(GPIO_ADC1_PWDN_N, "GPIO_ADC1_PWDN_N"); |
| 214 | if (!rc) { |
| 215 | rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1); |
| 216 | if (rc) { |
| 217 | pr_err("%s: Set GPIO_ADC1_PWDN_N failed\n", __func__); |
| 218 | return rc; |
| 219 | } |
| 220 | } else { |
| 221 | pr_err("%s: gpio_request GPIO_ADC1_PWDN_N failed\n", __func__); |
| 222 | return rc; |
| 223 | } |
| 224 | |
| 225 | rc = gpio_request(GPIO_ADC2_PWDN_N, "GPIO_ADC2_PWDN_N"); |
| 226 | if (!rc) { |
| 227 | rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1); |
| 228 | if (rc) { |
| 229 | pr_err("%s: Set GPIO_ADC2_PWDN_N failed\n", |
| 230 | __func__); |
| 231 | return rc; |
| 232 | } |
| 233 | } else { |
| 234 | pr_err("%s: gpio_request GPIO_ADC2_PWDN_N failed\n", |
| 235 | __func__); |
| 236 | return rc; |
| 237 | } |
| 238 | |
| 239 | rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "GPIO_EPM_SPI_ADC1_CS_N"); |
| 240 | if (!rc) { |
| 241 | rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 1); |
| 242 | if (rc) { |
| 243 | pr_err("%s:Set GPIO_EPM_SPI_ADC1_CS_N failed\n", |
| 244 | __func__); |
| 245 | return rc; |
| 246 | } |
| 247 | } else { |
| 248 | pr_err("%s: gpio_request GPIO_EPM_SPI_ADC1_CS_N failed\n", |
| 249 | __func__); |
| 250 | return rc; |
| 251 | } |
| 252 | |
| 253 | rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, |
| 254 | "GPIO_EPM_SPI_ADC2_CS_N"); |
| 255 | if (!rc) { |
| 256 | rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 1); |
| 257 | if (rc) { |
Siddartha Mohanadoss | b0b8a6e | 2012-09-04 08:23:43 -0700 | [diff] [blame^] | 258 | pr_err("Set GPIO_EPM_SPI_ADC2_CS_N failed\n"); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 259 | return rc; |
| 260 | } |
| 261 | } else { |
Siddartha Mohanadoss | b0b8a6e | 2012-09-04 08:23:43 -0700 | [diff] [blame^] | 262 | pr_err("gpio_request GPIO_EPM_SPI_ADC2_CS_N failed\n"); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 263 | return rc; |
| 264 | } |
| 265 | |
| 266 | rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0); |
| 267 | if (rc) { |
| 268 | pr_err("%s:Reset GPIO_EPM_SPI_ADC1_CS_N failed\n", __func__); |
| 269 | return rc; |
| 270 | } |
| 271 | |
| 272 | rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 1); |
| 273 | if (rc) { |
| 274 | pr_err("%s: Set GPIO_EPM_SPI_ADC1_CS_N failed\n", __func__); |
| 275 | return rc; |
| 276 | } |
| 277 | |
| 278 | rc = gpio_request(GPIO_PWR_MON_START, "GPIO_PWR_MON_START"); |
| 279 | if (!rc) { |
| 280 | rc = gpio_direction_output(GPIO_PWR_MON_START, 0); |
| 281 | if (rc) { |
| 282 | pr_err("%s: Reset GPIO_PWR_MON_START failed\n", |
| 283 | __func__); |
| 284 | return rc; |
| 285 | } |
| 286 | } else { |
| 287 | pr_err("%s: gpio_request GPIO_PWR_MON_START failed\n", |
| 288 | __func__); |
| 289 | return rc; |
| 290 | } |
| 291 | |
| 292 | rc = gpio_request(GPIO_PWR_MON_RESET_N, "GPIO_PWR_MON_RESET_N"); |
| 293 | if (!rc) { |
| 294 | rc = gpio_direction_output(GPIO_PWR_MON_RESET_N, 0); |
| 295 | if (rc) { |
| 296 | pr_err("%s: Reset GPIO_PWR_MON_RESET_N failed\n", |
| 297 | __func__); |
| 298 | return rc; |
| 299 | } |
| 300 | } else { |
| 301 | pr_err("%s: gpio_request GPIO_PWR_MON_RESET_N failed\n", |
| 302 | __func__); |
| 303 | return rc; |
| 304 | } |
| 305 | |
| 306 | rc = gpio_direction_output(GPIO_PWR_MON_RESET_N, 1); |
| 307 | if (rc) { |
| 308 | pr_err("%s: Set GPIO_PWR_MON_RESET_N failed\n", __func__); |
| 309 | return rc; |
| 310 | } |
| 311 | |
| 312 | rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0); |
| 313 | if (rc) { |
| 314 | pr_err("%s:Reset GPIO_EPM_SPI_ADC1_CS_N failed\n", __func__); |
| 315 | return rc; |
| 316 | } |
| 317 | return rc; |
| 318 | } |
| 319 | |
| 320 | static int epm_adc_gpio_configure_expander_disable(void) |
| 321 | { |
| 322 | int rc = 0; |
| 323 | gpio_free(GPIO_PWR_MON_ENABLE); |
| 324 | gpio_free(GPIO_ADC1_PWDN_N); |
| 325 | gpio_free(GPIO_ADC2_PWDN_N); |
| 326 | gpio_free(GPIO_EPM_SPI_ADC1_CS_N); |
| 327 | gpio_free(GPIO_EPM_SPI_ADC2_CS_N); |
| 328 | gpio_free(GPIO_PWR_MON_START); |
| 329 | gpio_free(GPIO_PWR_MON_RESET_N); |
| 330 | rc = gpio_direction_output(GPIO_EPM_GLOBAL_ENABLE, 0); |
| 331 | if (rc) |
| 332 | pr_debug("%s: Disable EPM_GLOBAL_EN Failed\n", __func__); |
| 333 | gpio_free(GPIO_EPM_GLOBAL_ENABLE); |
| 334 | return rc; |
| 335 | } |
| 336 | |
| 337 | static int epm_adc_spi_chip_select(int32_t id) |
| 338 | { |
| 339 | int rc = 0; |
| 340 | if (id == 0) { |
| 341 | rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 1); |
| 342 | if (rc) { |
| 343 | pr_err("%s:Disable SPI_ADC2_CS failed", |
| 344 | __func__); |
| 345 | return rc; |
| 346 | } |
| 347 | |
| 348 | rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0); |
| 349 | if (rc) { |
| 350 | pr_err("%s:Enable SPI_ADC1_CS failed", __func__); |
| 351 | return rc; |
| 352 | } |
| 353 | } else if (id == 1) { |
| 354 | rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 1); |
| 355 | if (rc) { |
| 356 | pr_err("%s:Disable SPI_ADC1_CS failed", __func__); |
| 357 | return rc; |
| 358 | } |
| 359 | rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0); |
| 360 | if (rc) { |
| 361 | pr_err("%s:Enable SPI_ADC2_CS failed", __func__); |
| 362 | return rc; |
| 363 | } |
| 364 | } else { |
| 365 | rc = -EFAULT; |
| 366 | } |
| 367 | return rc; |
| 368 | } |
| 369 | |
| 370 | static int epm_adc_ads_spi_write(struct epm_adc_drv *epm_adc, |
| 371 | uint8_t addr, uint8_t val) |
| 372 | { |
| 373 | struct spi_message m; |
| 374 | struct spi_transfer t; |
| 375 | char tx_buf[2]; |
| 376 | int rc = 0; |
| 377 | |
| 378 | spi_setup(epm_adc->epm_spi_client); |
| 379 | |
| 380 | memset(&t, 0, sizeof t); |
| 381 | memset(tx_buf, 0, sizeof tx_buf); |
| 382 | t.tx_buf = tx_buf; |
| 383 | spi_message_init(&m); |
| 384 | spi_message_add_tail(&t, &m); |
| 385 | |
| 386 | tx_buf[0] = EPM_ADC_ADS_REG_WRITE_CMD | addr; |
| 387 | tx_buf[1] = val; |
| 388 | |
| 389 | t.len = sizeof(tx_buf); |
| 390 | t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD; |
| 391 | |
| 392 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 393 | |
| 394 | return rc; |
| 395 | } |
| 396 | |
| 397 | static int epm_adc_init_ads(struct epm_adc_drv *epm_adc) |
| 398 | { |
| 399 | int rc = 0; |
| 400 | |
| 401 | rc = epm_adc_ads_spi_write(epm_adc, EPM_ADC_ADS_CONFIG0_REG_ADDR, |
| 402 | EPM_ADC_ADS_REG0_DEFAULT); |
| 403 | if (rc) |
| 404 | return rc; |
| 405 | |
| 406 | rc = epm_adc_ads_spi_write(epm_adc, EPM_ADC_ADS_CONFIG1_REG_ADDR, |
| 407 | EPM_ADC_ADS_REG1_DEFAULT); |
| 408 | if (rc) |
| 409 | return rc; |
| 410 | return rc; |
| 411 | } |
| 412 | |
| 413 | static int epm_adc_ads_pulse_convert(struct epm_adc_drv *epm_adc) |
| 414 | { |
| 415 | struct spi_message m; |
| 416 | struct spi_transfer t; |
| 417 | char tx_buf[1]; |
| 418 | int rc = 0; |
| 419 | |
| 420 | spi_setup(epm_adc->epm_spi_client); |
| 421 | |
| 422 | memset(&t, 0, sizeof t); |
| 423 | memset(tx_buf, 0, sizeof tx_buf); |
| 424 | t.tx_buf = tx_buf; |
| 425 | spi_message_init(&m); |
| 426 | spi_message_add_tail(&t, &m); |
| 427 | |
| 428 | tx_buf[0] = EPM_ADC_ADS_PULSE_CONVERT_CMD; |
| 429 | t.len = sizeof(tx_buf); |
| 430 | t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD; |
| 431 | |
| 432 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 433 | |
| 434 | return rc; |
| 435 | } |
| 436 | |
| 437 | static int epm_adc_ads_read_data(struct epm_adc_drv *epm_adc, char *adc_data) |
| 438 | { |
| 439 | struct spi_message m; |
| 440 | struct spi_transfer t; |
| 441 | char tx_buf[4], rx_buf[4]; |
| 442 | int rc = 0; |
| 443 | |
| 444 | spi_setup(epm_adc->epm_spi_client); |
| 445 | |
| 446 | memset(&t, 0, sizeof t); |
| 447 | memset(tx_buf, 0, sizeof tx_buf); |
| 448 | memset(rx_buf, 0, sizeof tx_buf); |
| 449 | t.tx_buf = tx_buf; |
| 450 | t.rx_buf = rx_buf; |
| 451 | spi_message_init(&m); |
| 452 | spi_message_add_tail(&t, &m); |
| 453 | |
| 454 | tx_buf[0] = EPM_ADC_ADS_DATA_READ_CMD | |
| 455 | EPM_ADC_ADS_MULTIPLE_REG_ACCESS; |
| 456 | |
| 457 | t.len = sizeof(tx_buf); |
| 458 | t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD; |
| 459 | |
| 460 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 461 | if (rc) |
| 462 | return rc; |
| 463 | |
| 464 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 465 | if (rc) |
| 466 | return rc; |
| 467 | |
| 468 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 469 | if (rc) |
| 470 | return rc; |
| 471 | |
| 472 | adc_data[0] = rx_buf[1]; |
| 473 | adc_data[1] = rx_buf[2]; |
| 474 | adc_data[2] = rx_buf[3]; |
| 475 | |
| 476 | return rc; |
| 477 | } |
| 478 | |
| 479 | static int epm_adc_hw_init(struct epm_adc_drv *epm_adc) |
| 480 | { |
| 481 | int rc = 0; |
| 482 | |
| 483 | mutex_lock(&epm_adc->conv_lock); |
| 484 | rc = epm_adc_gpio_configure_expander_enable(); |
| 485 | if (rc != 0) { |
| 486 | pr_err("epm gpio configure expander failed, rc = %d\n", rc); |
| 487 | goto epm_adc_hw_init_err; |
| 488 | } |
| 489 | rc = epm_adc_init_ads(epm_adc); |
| 490 | if (rc) { |
| 491 | pr_err("epm_adc_init_ads failed, rc=%d\n", rc); |
| 492 | goto epm_adc_hw_init_err; |
| 493 | } |
| 494 | |
| 495 | epm_adc_hw_init_err: |
| 496 | mutex_unlock(&epm_adc->conv_lock); |
| 497 | return rc; |
| 498 | } |
| 499 | |
| 500 | static int epm_adc_hw_deinit(struct epm_adc_drv *epm_adc) |
| 501 | { |
| 502 | int rc = 0; |
| 503 | |
| 504 | mutex_lock(&epm_adc->conv_lock); |
| 505 | rc = epm_adc_gpio_configure_expander_disable(); |
| 506 | if (rc != 0) { |
Siddartha Mohanadoss | b0b8a6e | 2012-09-04 08:23:43 -0700 | [diff] [blame^] | 507 | pr_err("gpio expander disable failed with %d\n", rc); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 508 | goto epm_adc_hw_deinit_err; |
| 509 | } |
| 510 | |
| 511 | epm_adc_hw_deinit_err: |
| 512 | mutex_unlock(&epm_adc->conv_lock); |
| 513 | return rc; |
| 514 | } |
| 515 | |
| 516 | static int epm_adc_ads_scale_result(struct epm_adc_drv *epm_adc, |
| 517 | uint8_t *adc_raw_data, struct epm_chan_request *conv) |
| 518 | { |
| 519 | uint32_t channel_num; |
| 520 | int16_t sign_bit; |
| 521 | struct epm_adc_platform_data *pdata = epm_adc->pdev->dev.platform_data; |
| 522 | uint32_t chan_idx = (conv->device_idx * pdata->chan_per_adc) + |
| 523 | conv->channel_idx; |
Yan He | 2af37f1 | 2012-08-31 11:09:36 -0700 | [diff] [blame] | 524 | int64_t *adc_scaled_data = 0; |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 525 | |
| 526 | /* Get the channel number */ |
| 527 | channel_num = (adc_raw_data[0] & EPM_ADC_ADS_CHANNEL_DATA_CHID); |
| 528 | sign_bit = 1; |
| 529 | /* This is the 16-bit raw data */ |
| 530 | *adc_scaled_data = ((adc_raw_data[1] << 8) | adc_raw_data[2]); |
| 531 | /* Obtain the internal system reading */ |
| 532 | if (channel_num == EPM_ADC_ADS_CHANNEL_VCC) { |
| 533 | *adc_scaled_data *= EPM_ADC_SCALE_MILLI; |
Yan He | 2af37f1 | 2012-08-31 11:09:36 -0700 | [diff] [blame] | 534 | do_div(*adc_scaled_data, EPM_ADC_SCALE_CODE_VOLTS); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 535 | } else if (channel_num == EPM_ADC_ADS_CHANNEL_GAIN) { |
Yan He | 2af37f1 | 2012-08-31 11:09:36 -0700 | [diff] [blame] | 536 | do_div(*adc_scaled_data, EPM_ADC_SCALE_CODE_GAIN); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 537 | } else if (channel_num == EPM_ADC_ADS_CHANNEL_REF) { |
| 538 | *adc_scaled_data *= EPM_ADC_SCALE_MILLI; |
Yan He | 2af37f1 | 2012-08-31 11:09:36 -0700 | [diff] [blame] | 539 | do_div(*adc_scaled_data, EPM_ADC_SCALE_CODE_VOLTS); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 540 | } else if (channel_num == EPM_ADC_ADS_CHANNEL_TEMP) { |
| 541 | /* Convert Code to micro-volts */ |
| 542 | /* Use this formula to get the temperature reading */ |
| 543 | *adc_scaled_data -= EPM_ADC_TEMP_TO_DEGC_COEFF; |
Yan He | 2af37f1 | 2012-08-31 11:09:36 -0700 | [diff] [blame] | 544 | do_div(*adc_scaled_data, EPM_ADC_TEMP_SENSOR_COEFF); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 545 | } else if (channel_num == EPM_ADC_ADS_CHANNEL_OFFSET) { |
| 546 | /* The offset should be zero */ |
| 547 | pr_debug("%s: ADC Channel Offset\n", __func__); |
| 548 | return -EFAULT; |
| 549 | } else { |
| 550 | channel_num -= EPM_ADC_CHANNEL_AIN_OFFSET; |
| 551 | /* |
| 552 | * Conversion for the adc channels. |
Siddartha Mohanadoss | b0b8a6e | 2012-09-04 08:23:43 -0700 | [diff] [blame^] | 553 | * mvVRef is in milli-volts and resistorvalue is in micro-ohms. |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 554 | * Hence, I = V/R gives us current in kilo-amps. |
| 555 | */ |
| 556 | if (*adc_scaled_data & EPM_ADC_MAX_NEGATIVE_SCALE_CODE) { |
| 557 | sign_bit = -1; |
| 558 | *adc_scaled_data = (~*adc_scaled_data |
| 559 | & EPM_ADC_NEG_LSB_CODE); |
| 560 | } |
| 561 | if (*adc_scaled_data != 0) { |
| 562 | *adc_scaled_data *= EPM_ADC_SCALE_FACTOR; |
| 563 | /* Device is calibrated for 1LSB = VREF/7800h.*/ |
| 564 | *adc_scaled_data *= EPM_ADC_MILLI_VOLTS_SOURCE; |
Yan He | 2af37f1 | 2012-08-31 11:09:36 -0700 | [diff] [blame] | 565 | do_div(*adc_scaled_data, EPM_ADC_VREF_CODE); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 566 | /* Data will now be in micro-volts.*/ |
| 567 | *adc_scaled_data *= EPM_ADC_SCALE_MILLI; |
| 568 | /* Divide by amplifier gain value.*/ |
Yan He | 2af37f1 | 2012-08-31 11:09:36 -0700 | [diff] [blame] | 569 | do_div(*adc_scaled_data, pdata->channel[chan_idx].gain); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 570 | /* Data will now be in nano-volts.*/ |
Yan He | 2af37f1 | 2012-08-31 11:09:36 -0700 | [diff] [blame] | 571 | do_div(*adc_scaled_data, EPM_ADC_SCALE_FACTOR); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 572 | *adc_scaled_data *= EPM_ADC_SCALE_MILLI; |
| 573 | /* Data is now in micro-amps.*/ |
Yan He | 2af37f1 | 2012-08-31 11:09:36 -0700 | [diff] [blame] | 574 | do_div(*adc_scaled_data, |
Siddartha Mohanadoss | b0b8a6e | 2012-09-04 08:23:43 -0700 | [diff] [blame^] | 575 | pdata->channel[chan_idx].resistorvalue); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 576 | /* Set the sign bit for lekage current. */ |
| 577 | *adc_scaled_data *= sign_bit; |
| 578 | } |
| 579 | } |
Yan He | 2af37f1 | 2012-08-31 11:09:36 -0700 | [diff] [blame] | 580 | conv->physical = (int32_t) *adc_scaled_data; |
| 581 | |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 582 | return 0; |
| 583 | } |
| 584 | |
Siddartha Mohanadoss | b0b8a6e | 2012-09-04 08:23:43 -0700 | [diff] [blame^] | 585 | static int epm_psoc_scale_result(uint16_t *adc_raw_data, uint32_t index) |
| 586 | { |
| 587 | struct epm_adc_drv *epm_adc = epm_adc_drv; |
| 588 | /* result = 2.048V/(32767 * gain * rsense) */ |
| 589 | *adc_raw_data = (EPM_PSOC_VREF_VOLTAGE/EPM_PSOC_MAX_ADC_CODE_16_BIT) |
| 590 | * (*adc_raw_data); |
| 591 | *adc_raw_data = *adc_raw_data/ |
| 592 | (epm_adc->epm_psoc_ch_prop[index].gain * |
| 593 | epm_adc->epm_psoc_ch_prop[index].resistorvalue); |
| 594 | return 0; |
| 595 | } |
| 596 | |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 597 | static int epm_adc_blocking_conversion(struct epm_adc_drv *epm_adc, |
| 598 | struct epm_chan_request *conv) |
| 599 | { |
| 600 | struct epm_adc_platform_data *pdata = epm_adc->pdev->dev.platform_data; |
| 601 | int32_t channel_num = 0, mux_chan_idx = 0; |
| 602 | char adc_data[3]; |
| 603 | int rc = 0; |
| 604 | |
| 605 | mutex_lock(&epm_adc->conv_lock); |
| 606 | |
| 607 | rc = epm_adc_spi_chip_select(conv->device_idx); |
| 608 | if (rc) { |
| 609 | pr_err("epm_adc_chip_select failed, rc=%d\n", rc); |
| 610 | goto conv_err; |
| 611 | } |
| 612 | |
| 613 | if (conv->channel_idx < pdata->chan_per_mux) { |
| 614 | /* Reset MUXSG1_REGISTER */ |
| 615 | rc = epm_adc_ads_spi_write(epm_adc, EPM_ADC_ADS_MUXSG1_REG_ADDR, |
| 616 | 0x0); |
| 617 | if (rc) |
| 618 | goto conv_err; |
| 619 | |
| 620 | mux_chan_idx = 1 << conv->channel_idx; |
| 621 | /* Select Channel index in MUXSG0_REGISTER */ |
| 622 | rc = epm_adc_ads_spi_write(epm_adc, EPM_ADC_ADS_MUXSG0_REG_ADDR, |
| 623 | mux_chan_idx); |
| 624 | if (rc) |
| 625 | goto conv_err; |
| 626 | } else { |
| 627 | /* Reset MUXSG0_REGISTER */ |
| 628 | rc = epm_adc_ads_spi_write(epm_adc, EPM_ADC_ADS_MUXSG0_REG_ADDR, |
| 629 | 0x0); |
| 630 | if (rc) |
| 631 | goto conv_err; |
| 632 | |
| 633 | mux_chan_idx = 1 << (conv->channel_idx - pdata->chan_per_mux); |
| 634 | /* Select Channel index in MUXSG1_REGISTER */ |
| 635 | rc = epm_adc_ads_spi_write(epm_adc, EPM_ADC_ADS_MUXSG1_REG_ADDR, |
| 636 | mux_chan_idx); |
| 637 | if (rc) |
| 638 | goto conv_err; |
| 639 | } |
| 640 | |
| 641 | rc = epm_adc_ads_pulse_convert(epm_adc); |
| 642 | if (rc) { |
| 643 | pr_err("epm_adc_ads_pulse_convert failed, rc=%d\n", rc); |
| 644 | goto conv_err; |
| 645 | } |
| 646 | |
| 647 | rc = epm_adc_ads_read_data(epm_adc, adc_data); |
| 648 | if (rc) { |
| 649 | pr_err("epm_adc_ads_read_data failed, rc=%d\n", rc); |
| 650 | goto conv_err; |
| 651 | } |
| 652 | |
| 653 | channel_num = (adc_data[0] & EPM_ADC_ADS_CHANNEL_DATA_CHID); |
| 654 | pr_debug("ADC data Read: adc_data =%d, %d, %d\n", |
| 655 | adc_data[0], adc_data[1], adc_data[2]); |
| 656 | |
| 657 | epm_adc_ads_scale_result(epm_adc, (uint8_t *)adc_data, conv); |
| 658 | |
| 659 | pr_debug("channel_num(0x) = %x, scaled_data = %d\n", |
| 660 | (channel_num - EPM_ADC_ADS_SPI_BITS_PER_WORD), |
| 661 | conv->physical); |
| 662 | conv_err: |
| 663 | mutex_unlock(&epm_adc->conv_lock); |
| 664 | return rc; |
| 665 | } |
| 666 | |
Siddartha Mohanadoss | b0b8a6e | 2012-09-04 08:23:43 -0700 | [diff] [blame^] | 667 | static int epm_adc_psoc_gpio_init(bool enable) |
| 668 | { |
| 669 | int rc = 0; |
| 670 | |
| 671 | if (enable) { |
| 672 | rc = gpio_request(EPM_PSOC_GLOBAL_ENABLE, "EPM_PSOC_GLOBAL_EN"); |
| 673 | if (!rc) { |
| 674 | gpio_direction_output(EPM_PSOC_GLOBAL_ENABLE, 1); |
| 675 | } else { |
| 676 | pr_err("%s: Configure EPM_GLOBAL_EN Failed\n", |
| 677 | __func__); |
| 678 | return rc; |
| 679 | } |
| 680 | } else { |
| 681 | gpio_direction_output(EPM_PSOC_GLOBAL_ENABLE, 0); |
| 682 | gpio_free(EPM_PSOC_GLOBAL_ENABLE); |
| 683 | } |
| 684 | |
| 685 | return 0; |
| 686 | } |
| 687 | |
| 688 | static int epm_psoc_init(struct epm_adc_drv *epm_adc, |
| 689 | struct epm_psoc_init_resp *init_resp) |
| 690 | { |
| 691 | struct spi_message m; |
| 692 | struct spi_transfer t; |
| 693 | char tx_buf[17], rx_buf[17]; |
| 694 | int rc = 0; |
| 695 | |
| 696 | spi_setup(epm_adc->epm_spi_client); |
| 697 | |
| 698 | memset(&t, 0, sizeof t); |
| 699 | memset(tx_buf, 0, sizeof tx_buf); |
| 700 | memset(rx_buf, 0, sizeof tx_buf); |
| 701 | t.tx_buf = tx_buf; |
| 702 | t.rx_buf = rx_buf; |
| 703 | spi_message_init(&m); |
| 704 | spi_message_add_tail(&t, &m); |
| 705 | |
| 706 | tx_buf[0] = init_resp->cmd; |
| 707 | |
| 708 | t.len = sizeof(tx_buf); |
| 709 | t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD; |
| 710 | |
| 711 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 712 | if (rc) |
| 713 | return rc; |
| 714 | |
| 715 | init_resp->cmd = rx_buf[0]; |
| 716 | init_resp->version = rx_buf[1]; |
| 717 | init_resp->compatible_ver = rx_buf[2]; |
| 718 | init_resp->firm_ver[0] = rx_buf[3]; |
| 719 | init_resp->firm_ver[1] = rx_buf[4]; |
| 720 | init_resp->firm_ver[2] = rx_buf[5]; |
| 721 | init_resp->num_dev = rx_buf[6]; |
| 722 | init_resp->num_channel = rx_buf[7]; |
| 723 | |
| 724 | return rc; |
| 725 | } |
| 726 | |
| 727 | static int epm_psoc_channel_configure(struct epm_adc_drv *epm_adc, |
| 728 | struct epm_psoc_channel_configure *psoc_chan_configure) |
| 729 | { |
| 730 | struct spi_message m; |
| 731 | struct spi_transfer t; |
| 732 | char tx_buf[9], rx_buf[9]; |
| 733 | int32_t rc = 0, chan_num; |
| 734 | |
| 735 | spi_setup(epm_adc->epm_spi_client); |
| 736 | |
| 737 | memset(&t, 0, sizeof t); |
| 738 | memset(tx_buf, 0, sizeof tx_buf); |
| 739 | memset(rx_buf, 0, sizeof tx_buf); |
| 740 | t.tx_buf = tx_buf; |
| 741 | t.rx_buf = rx_buf; |
| 742 | spi_message_init(&m); |
| 743 | spi_message_add_tail(&t, &m); |
| 744 | |
| 745 | chan_num = psoc_chan_configure->channel_num; |
| 746 | |
| 747 | tx_buf[0] = psoc_chan_configure->cmd; |
| 748 | tx_buf[1] = 0; |
| 749 | tx_buf[2] = (chan_num & 0xff000000) >> 24; |
| 750 | tx_buf[3] = (chan_num & 0xff0000) >> 16; |
| 751 | tx_buf[4] = (chan_num & 0xff00) >> 8; |
| 752 | tx_buf[5] = (chan_num & 0xff); |
| 753 | |
| 754 | t.len = sizeof(tx_buf); |
| 755 | t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD; |
| 756 | |
| 757 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 758 | if (rc) |
| 759 | return rc; |
| 760 | |
| 761 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 762 | if (rc) |
| 763 | return rc; |
| 764 | |
| 765 | psoc_chan_configure->cmd = rx_buf[0]; |
| 766 | psoc_chan_configure->device_num = rx_buf[1]; |
| 767 | chan_num = rx_buf[2] << 24 | (rx_buf[3] << 16) | (rx_buf[4] << 8) | |
| 768 | rx_buf[5]; |
| 769 | psoc_chan_configure->channel_num = chan_num; |
| 770 | pr_debug("dev_num:%d, chan_num:%d\n", rx_buf[1], chan_num); |
| 771 | |
| 772 | return rc; |
| 773 | } |
| 774 | |
| 775 | static int epm_psoc_set_averaging(struct epm_adc_drv *epm_adc, |
| 776 | struct epm_psoc_set_avg *psoc_set_avg) |
| 777 | { |
| 778 | struct spi_message m; |
| 779 | struct spi_transfer t; |
| 780 | char tx_buf[4], rx_buf[4]; |
| 781 | int rc = 0; |
| 782 | |
| 783 | spi_setup(epm_adc->epm_spi_client); |
| 784 | |
| 785 | memset(&t, 0, sizeof t); |
| 786 | memset(tx_buf, 0, sizeof tx_buf); |
| 787 | memset(rx_buf, 0, sizeof tx_buf); |
| 788 | t.tx_buf = tx_buf; |
| 789 | t.rx_buf = rx_buf; |
| 790 | spi_message_init(&m); |
| 791 | spi_message_add_tail(&t, &m); |
| 792 | |
| 793 | tx_buf[0] = psoc_set_avg->cmd; |
| 794 | tx_buf[1] = psoc_set_avg->avg_period; |
| 795 | |
| 796 | t.len = sizeof(tx_buf); |
| 797 | t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD; |
| 798 | |
| 799 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 800 | if (rc) |
| 801 | return rc; |
| 802 | |
| 803 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 804 | if (rc) |
| 805 | return rc; |
| 806 | |
| 807 | psoc_set_avg->cmd = rx_buf[0]; |
| 808 | psoc_set_avg->return_code = rx_buf[1]; |
| 809 | |
| 810 | return rc; |
| 811 | } |
| 812 | |
| 813 | static int epm_psoc_get_data(struct epm_adc_drv *epm_adc, |
| 814 | struct epm_psoc_get_data *psoc_get_meas) |
| 815 | { |
| 816 | struct spi_message m; |
| 817 | struct spi_transfer t; |
| 818 | char tx_buf[10], rx_buf[10]; |
| 819 | int rc = 0; |
| 820 | |
| 821 | spi_setup(epm_adc->epm_spi_client); |
| 822 | |
| 823 | memset(&t, 0, sizeof t); |
| 824 | memset(tx_buf, 0, sizeof tx_buf); |
| 825 | memset(rx_buf, 0, sizeof tx_buf); |
| 826 | t.tx_buf = tx_buf; |
| 827 | t.rx_buf = rx_buf; |
| 828 | spi_message_init(&m); |
| 829 | spi_message_add_tail(&t, &m); |
| 830 | |
| 831 | tx_buf[0] = psoc_get_meas->cmd; |
| 832 | tx_buf[1] = psoc_get_meas->dev_num; |
| 833 | tx_buf[2] = psoc_get_meas->chan_num; |
| 834 | |
| 835 | t.len = sizeof(tx_buf); |
| 836 | t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD; |
| 837 | |
| 838 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 839 | if (rc) |
| 840 | return rc; |
| 841 | |
| 842 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 843 | if (rc) |
| 844 | return rc; |
| 845 | |
| 846 | psoc_get_meas->cmd = rx_buf[0]; |
| 847 | psoc_get_meas->dev_num = rx_buf[1]; |
| 848 | psoc_get_meas->chan_num = rx_buf[2]; |
| 849 | psoc_get_meas->timestamp_resp_value = (rx_buf[3] << 24) | |
| 850 | (rx_buf[4] << 16) | (rx_buf[5] << 8) | |
| 851 | rx_buf[6]; |
| 852 | psoc_get_meas->reading_value = (rx_buf[7] << 8) | rx_buf[8]; |
| 853 | |
| 854 | pr_debug("dev_num:%d, chan_num:%d\n", rx_buf[1], rx_buf[2]); |
| 855 | pr_debug("data %d\n", psoc_get_meas->reading_value); |
| 856 | return rc; |
| 857 | } |
| 858 | |
| 859 | static int epm_psoc_get_buffered_data(struct epm_adc_drv *epm_adc, |
| 860 | struct epm_psoc_get_buffered_data *psoc_get_meas) |
| 861 | { |
| 862 | struct spi_message m; |
| 863 | struct spi_transfer t; |
| 864 | char tx_buf[64], rx_buf[64]; |
| 865 | int rc = 0, i; |
| 866 | |
| 867 | spi_setup(epm_adc->epm_spi_client); |
| 868 | |
| 869 | memset(&t, 0, sizeof t); |
| 870 | memset(tx_buf, 0, sizeof tx_buf); |
| 871 | memset(rx_buf, 0, sizeof tx_buf); |
| 872 | t.tx_buf = tx_buf; |
| 873 | t.rx_buf = rx_buf; |
| 874 | spi_message_init(&m); |
| 875 | spi_message_add_tail(&t, &m); |
| 876 | |
| 877 | tx_buf[0] = psoc_get_meas->cmd; |
| 878 | |
| 879 | t.len = sizeof(tx_buf); |
| 880 | t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD; |
| 881 | |
| 882 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 883 | if (rc) |
| 884 | return rc; |
| 885 | |
| 886 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 887 | if (rc) |
| 888 | return rc; |
| 889 | |
| 890 | psoc_get_meas->cmd = rx_buf[0]; |
| 891 | psoc_get_meas->dev_num = rx_buf[1]; |
| 892 | psoc_get_meas->status_mask = rx_buf[2]; |
| 893 | psoc_get_meas->chan_idx = rx_buf[3]; |
| 894 | psoc_get_meas->chan_mask = (rx_buf[4] << 24 | |
| 895 | rx_buf[5] << 16 | rx_buf[6] << 8 |
| 896 | | rx_buf[7]); |
| 897 | psoc_get_meas->timestamp_start = (rx_buf[8] << 24 | |
| 898 | rx_buf[9] << 16 | rx_buf[10] << 8 |
| 899 | | rx_buf[11]); |
| 900 | psoc_get_meas->timestamp_end = (rx_buf[12] << 24 | |
| 901 | rx_buf[13] << 16 | rx_buf[14] << 8 |
| 902 | | rx_buf[15]); |
| 903 | |
| 904 | for (i = 0; i < EPM_PSOC_BUFFERED_DATA_LENGTH; i++) |
| 905 | psoc_get_meas->buff_data[i] = rx_buf[16 + i]; |
| 906 | |
| 907 | return rc; |
| 908 | } |
| 909 | |
| 910 | static int epm_psoc_timestamp(struct epm_adc_drv *epm_adc, |
| 911 | struct epm_psoc_system_time_stamp *psoc_timestamp) |
| 912 | { |
| 913 | struct spi_message m; |
| 914 | struct spi_transfer t; |
| 915 | char tx_buf[10], rx_buf[10]; |
| 916 | int rc = 0; |
| 917 | |
| 918 | spi_setup(epm_adc->epm_spi_client); |
| 919 | |
| 920 | memset(&t, 0, sizeof t); |
| 921 | memset(tx_buf, 0, sizeof tx_buf); |
| 922 | memset(rx_buf, 0, sizeof tx_buf); |
| 923 | t.tx_buf = tx_buf; |
| 924 | t.rx_buf = rx_buf; |
| 925 | spi_message_init(&m); |
| 926 | spi_message_add_tail(&t, &m); |
| 927 | |
| 928 | if (psoc_timestamp->cmd == EPM_PSOC_SET_SYSTEM_TIMESTAMP_CMD) { |
| 929 | tx_buf[0] = psoc_timestamp->cmd; |
| 930 | tx_buf[1] = (psoc_timestamp->timestamp & 0xff000000) >> 24; |
| 931 | tx_buf[2] = (psoc_timestamp->timestamp & 0xff0000) >> 16; |
| 932 | tx_buf[3] = (psoc_timestamp->timestamp & 0xff00) >> 8; |
| 933 | tx_buf[4] = (psoc_timestamp->timestamp & 0xff); |
| 934 | } else if (psoc_timestamp->cmd == EPM_PSOC_GET_SYSTEM_TIMESTAMP_CMD) { |
| 935 | tx_buf[0] = psoc_timestamp->cmd; |
| 936 | } |
| 937 | |
| 938 | t.len = sizeof(tx_buf); |
| 939 | t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD; |
| 940 | |
| 941 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 942 | if (rc) |
| 943 | return rc; |
| 944 | |
| 945 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 946 | if (rc) |
| 947 | return rc; |
| 948 | |
| 949 | psoc_timestamp->cmd = rx_buf[0]; |
| 950 | psoc_timestamp->timestamp = rx_buf[1] << 24 | rx_buf[2] << 16 | |
| 951 | rx_buf[3] << 8 | rx_buf[4]; |
| 952 | |
| 953 | return rc; |
| 954 | } |
| 955 | |
| 956 | static int epm_psoc_get_avg_buffered_switch_data(struct epm_adc_drv *epm_adc, |
| 957 | struct epm_psoc_get_avg_buffered_switch_data *psoc_get_meas) |
| 958 | { |
| 959 | struct spi_message m; |
| 960 | struct spi_transfer t; |
| 961 | char tx_buf[64], rx_buf[64]; |
| 962 | int rc = 0, i; |
| 963 | |
| 964 | spi_setup(epm_adc->epm_spi_client); |
| 965 | |
| 966 | memset(&t, 0, sizeof t); |
| 967 | memset(tx_buf, 0, sizeof tx_buf); |
| 968 | memset(rx_buf, 0, sizeof tx_buf); |
| 969 | t.tx_buf = tx_buf; |
| 970 | t.rx_buf = rx_buf; |
| 971 | spi_message_init(&m); |
| 972 | spi_message_add_tail(&t, &m); |
| 973 | |
| 974 | tx_buf[0] = psoc_get_meas->cmd; |
| 975 | |
| 976 | t.len = sizeof(tx_buf); |
| 977 | t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD; |
| 978 | |
| 979 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 980 | if (rc) |
| 981 | return rc; |
| 982 | |
| 983 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 984 | if (rc) |
| 985 | return rc; |
| 986 | |
| 987 | psoc_get_meas->cmd = rx_buf[0]; |
| 988 | psoc_get_meas->status = rx_buf[1]; |
| 989 | psoc_get_meas->timestamp_start = (rx_buf[2] << 24 | |
| 990 | rx_buf[3] << 16 | rx_buf[4] << 8 |
| 991 | | rx_buf[5]); |
| 992 | psoc_get_meas->channel_mask = (rx_buf[6] << 24 | |
| 993 | rx_buf[7] << 16 | rx_buf[8] << 8 |
| 994 | | rx_buf[9]); |
| 995 | |
| 996 | for (i = 0; i < EPM_PSOC_BUFFERED_DATA_LENGTH2; i++) |
| 997 | psoc_get_meas->avg_data[i] = rx_buf[10 + i]; |
| 998 | |
| 999 | return rc; |
| 1000 | } |
| 1001 | |
| 1002 | static int epm_psoc_set_vadc(struct epm_adc_drv *epm_adc, |
| 1003 | struct epm_psoc_set_vadc *psoc_set_vadc) |
| 1004 | { |
| 1005 | struct spi_message m; |
| 1006 | struct spi_transfer t; |
| 1007 | char tx_buf[10], rx_buf[10]; |
| 1008 | int rc = 0; |
| 1009 | |
| 1010 | spi_setup(epm_adc->epm_spi_client); |
| 1011 | |
| 1012 | memset(&t, 0, sizeof t); |
| 1013 | memset(tx_buf, 0, sizeof tx_buf); |
| 1014 | memset(rx_buf, 0, sizeof tx_buf); |
| 1015 | t.tx_buf = tx_buf; |
| 1016 | t.rx_buf = rx_buf; |
| 1017 | spi_message_init(&m); |
| 1018 | spi_message_add_tail(&t, &m); |
| 1019 | |
| 1020 | tx_buf[0] = psoc_set_vadc->cmd; |
| 1021 | tx_buf[1] = psoc_set_vadc->vadc_dev; |
| 1022 | tx_buf[2] = (psoc_set_vadc->vadc_voltage & 0xff000000) >> 24; |
| 1023 | tx_buf[3] = (psoc_set_vadc->vadc_voltage & 0xff0000) >> 16; |
| 1024 | tx_buf[4] = (psoc_set_vadc->vadc_voltage & 0xff00) >> 8; |
| 1025 | tx_buf[5] = psoc_set_vadc->vadc_voltage & 0xff; |
| 1026 | |
| 1027 | t.len = sizeof(tx_buf); |
| 1028 | t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD; |
| 1029 | |
| 1030 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 1031 | if (rc) |
| 1032 | return rc; |
| 1033 | |
| 1034 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 1035 | if (rc) |
| 1036 | return rc; |
| 1037 | |
| 1038 | psoc_set_vadc->cmd = rx_buf[0]; |
| 1039 | psoc_set_vadc->vadc_dev = rx_buf[1]; |
| 1040 | psoc_set_vadc->vadc_voltage = (rx_buf[2] << 24) | (rx_buf[3] << 16) | |
| 1041 | (rx_buf[4] << 8) | (rx_buf[5]); |
| 1042 | |
| 1043 | return rc; |
| 1044 | } |
| 1045 | |
| 1046 | static int epm_psoc_set_channel_switch(struct epm_adc_drv *epm_adc, |
| 1047 | struct epm_psoc_set_channel_switch *psoc_channel_switch) |
| 1048 | { |
| 1049 | struct spi_message m; |
| 1050 | struct spi_transfer t; |
| 1051 | char tx_buf[10], rx_buf[10]; |
| 1052 | int rc = 0; |
| 1053 | |
| 1054 | spi_setup(epm_adc->epm_spi_client); |
| 1055 | |
| 1056 | memset(&t, 0, sizeof t); |
| 1057 | memset(tx_buf, 0, sizeof tx_buf); |
| 1058 | memset(rx_buf, 0, sizeof tx_buf); |
| 1059 | t.tx_buf = tx_buf; |
| 1060 | t.rx_buf = rx_buf; |
| 1061 | spi_message_init(&m); |
| 1062 | spi_message_add_tail(&t, &m); |
| 1063 | |
| 1064 | tx_buf[0] = psoc_channel_switch->cmd; |
| 1065 | tx_buf[1] = psoc_channel_switch->dev; |
| 1066 | tx_buf[2] = (psoc_channel_switch->delay & 0xff000000) >> 24; |
| 1067 | tx_buf[3] = (psoc_channel_switch->delay & 0xff0000) >> 16; |
| 1068 | tx_buf[4] = (psoc_channel_switch->delay & 0xff00) >> 8; |
| 1069 | tx_buf[5] = psoc_channel_switch->delay & 0xff; |
| 1070 | |
| 1071 | t.len = sizeof(tx_buf); |
| 1072 | t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD; |
| 1073 | |
| 1074 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 1075 | if (rc) |
| 1076 | return rc; |
| 1077 | |
| 1078 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 1079 | if (rc) |
| 1080 | return rc; |
| 1081 | |
| 1082 | psoc_channel_switch->cmd = rx_buf[0]; |
| 1083 | psoc_channel_switch->dev = rx_buf[1]; |
| 1084 | psoc_channel_switch->delay = rx_buf[2] << 24 | |
| 1085 | rx_buf[3] << 16 | |
| 1086 | rx_buf[4] << 8 | rx_buf[5]; |
| 1087 | |
| 1088 | return rc; |
| 1089 | } |
| 1090 | |
| 1091 | static int epm_psoc_clear_buffer(struct epm_adc_drv *epm_adc) |
| 1092 | { |
| 1093 | struct spi_message m; |
| 1094 | struct spi_transfer t; |
| 1095 | char tx_buf[3], rx_buf[3]; |
| 1096 | int rc = 0; |
| 1097 | |
| 1098 | spi_setup(epm_adc->epm_spi_client); |
| 1099 | |
| 1100 | memset(&t, 0, sizeof t); |
| 1101 | memset(tx_buf, 0, sizeof tx_buf); |
| 1102 | memset(rx_buf, 0, sizeof tx_buf); |
| 1103 | t.tx_buf = tx_buf; |
| 1104 | t.rx_buf = rx_buf; |
| 1105 | spi_message_init(&m); |
| 1106 | spi_message_add_tail(&t, &m); |
| 1107 | |
| 1108 | tx_buf[0] = EPM_PSOC_CLEAR_BUFFER_CMD; |
| 1109 | |
| 1110 | t.len = sizeof(tx_buf); |
| 1111 | t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD; |
| 1112 | |
| 1113 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 1114 | if (rc) |
| 1115 | return rc; |
| 1116 | |
| 1117 | rc = spi_sync(epm_adc->epm_spi_client, &m); |
| 1118 | if (rc) |
| 1119 | return rc; |
| 1120 | |
| 1121 | rc = rx_buf[2]; |
| 1122 | |
| 1123 | return rc; |
| 1124 | } |
| 1125 | |
Siddartha Mohanadoss | eb90c92 | 2012-03-27 22:58:06 -0700 | [diff] [blame] | 1126 | static long epm_adc_ioctl(struct file *file, unsigned int cmd, |
| 1127 | unsigned long arg) |
| 1128 | { |
| 1129 | struct epm_adc_drv *epm_adc = epm_adc_drv; |
| 1130 | |
| 1131 | switch (cmd) { |
| 1132 | case EPM_ADC_REQUEST: |
| 1133 | { |
| 1134 | struct epm_chan_request conv; |
| 1135 | int rc; |
| 1136 | |
| 1137 | if (copy_from_user(&conv, (void __user *)arg, |
| 1138 | sizeof(struct epm_chan_request))) |
| 1139 | return -EFAULT; |
| 1140 | |
| 1141 | rc = epm_adc_blocking_conversion(epm_adc, &conv); |
| 1142 | if (rc) { |
| 1143 | pr_err("Failed EPM conversion:%d\n", rc); |
| 1144 | return rc; |
| 1145 | } |
| 1146 | |
| 1147 | if (copy_to_user((void __user *)arg, &conv, |
| 1148 | sizeof(struct epm_chan_request))) |
| 1149 | return -EFAULT; |
| 1150 | break; |
| 1151 | } |
| 1152 | case EPM_ADC_INIT: |
| 1153 | { |
| 1154 | uint32_t result; |
| 1155 | if (!epm_adc_expander_register) { |
| 1156 | result = epm_adc_i2c_expander_register(); |
| 1157 | if (result) { |
| 1158 | pr_err("Failed i2c register:%d\n", |
| 1159 | result); |
| 1160 | return result; |
| 1161 | } |
| 1162 | epm_adc_expander_register = true; |
| 1163 | } |
| 1164 | |
Siddartha Mohanadoss | b0b8a6e | 2012-09-04 08:23:43 -0700 | [diff] [blame^] | 1165 | result = epm_adc_hw_init(epm_adc); |
Siddartha Mohanadoss | eb90c92 | 2012-03-27 22:58:06 -0700 | [diff] [blame] | 1166 | |
| 1167 | if (copy_to_user((void __user *)arg, &result, |
| 1168 | sizeof(uint32_t))) |
| 1169 | return -EFAULT; |
| 1170 | break; |
| 1171 | } |
| 1172 | case EPM_ADC_DEINIT: |
| 1173 | { |
| 1174 | uint32_t result; |
Siddartha Mohanadoss | b0b8a6e | 2012-09-04 08:23:43 -0700 | [diff] [blame^] | 1175 | result = epm_adc_hw_deinit(epm_adc); |
Siddartha Mohanadoss | eb90c92 | 2012-03-27 22:58:06 -0700 | [diff] [blame] | 1176 | |
| 1177 | if (copy_to_user((void __user *)arg, &result, |
| 1178 | sizeof(uint32_t))) |
| 1179 | return -EFAULT; |
| 1180 | break; |
| 1181 | } |
Siddartha Mohanadoss | b0b8a6e | 2012-09-04 08:23:43 -0700 | [diff] [blame^] | 1182 | case EPM_PSOC_ADC_INIT: |
| 1183 | { |
| 1184 | struct epm_psoc_init_resp psoc_init; |
| 1185 | int rc; |
| 1186 | |
| 1187 | if (copy_from_user(&psoc_init, (void __user *)arg, |
| 1188 | sizeof(struct epm_psoc_init_resp))) |
| 1189 | return -EFAULT; |
| 1190 | |
| 1191 | psoc_init.cmd = EPM_PSOC_INIT_CMD; |
| 1192 | rc = epm_psoc_init(epm_adc, &psoc_init); |
| 1193 | if (rc) { |
| 1194 | pr_err("PSOC initialization failed\n"); |
| 1195 | return -EINVAL; |
| 1196 | } |
| 1197 | |
| 1198 | if (copy_to_user((void __user *)arg, &psoc_init, |
| 1199 | sizeof(struct epm_psoc_init_resp))) |
| 1200 | return -EFAULT; |
| 1201 | break; |
| 1202 | } |
| 1203 | case EPM_PSOC_ADC_CHANNEL_ENABLE: |
| 1204 | case EPM_PSOC_ADC_CHANNEL_DISABLE: |
| 1205 | { |
| 1206 | struct epm_psoc_channel_configure psoc_chan_configure; |
| 1207 | int rc; |
| 1208 | |
| 1209 | if (copy_from_user(&psoc_chan_configure, |
| 1210 | (void __user *)arg, |
| 1211 | sizeof(struct epm_psoc_channel_configure))) |
| 1212 | return -EFAULT; |
| 1213 | |
| 1214 | psoc_chan_configure.cmd = |
| 1215 | EPM_PSOC_CHANNEL_ENABLE_DISABLE_CMD; |
| 1216 | rc = epm_psoc_channel_configure(epm_adc, |
| 1217 | &psoc_chan_configure); |
| 1218 | if (rc) { |
| 1219 | pr_err("PSOC channel configure failed\n"); |
| 1220 | return -EINVAL; |
| 1221 | } |
| 1222 | |
| 1223 | if (copy_to_user((void __user *)arg, |
| 1224 | &psoc_chan_configure, |
| 1225 | sizeof(struct epm_psoc_channel_configure))) |
| 1226 | return -EFAULT; |
| 1227 | break; |
| 1228 | } |
| 1229 | case EPM_PSOC_ADC_SET_AVERAGING: |
| 1230 | { |
| 1231 | struct epm_psoc_set_avg psoc_set_avg; |
| 1232 | int rc; |
| 1233 | |
| 1234 | if (copy_from_user(&psoc_set_avg, (void __user *)arg, |
| 1235 | sizeof(struct epm_psoc_set_avg))) |
| 1236 | return -EFAULT; |
| 1237 | |
| 1238 | psoc_set_avg.cmd = EPM_PSOC_SET_AVERAGING_CMD; |
| 1239 | rc = epm_psoc_set_averaging(epm_adc, &psoc_set_avg); |
| 1240 | if (rc) { |
| 1241 | pr_err("PSOC averaging failed\n"); |
| 1242 | return -EINVAL; |
| 1243 | } |
| 1244 | |
| 1245 | if (copy_to_user((void __user *)arg, &psoc_set_avg, |
| 1246 | sizeof(struct epm_psoc_set_avg))) |
| 1247 | return -EFAULT; |
| 1248 | break; |
| 1249 | } |
| 1250 | case EPM_PSOC_ADC_GET_LAST_MEASUREMENT: |
| 1251 | { |
| 1252 | struct epm_psoc_get_data psoc_get_data; |
| 1253 | int rc; |
| 1254 | |
| 1255 | if (copy_from_user(&psoc_get_data, |
| 1256 | (void __user *)arg, |
| 1257 | sizeof(struct epm_psoc_get_data))) |
| 1258 | return -EFAULT; |
| 1259 | |
| 1260 | psoc_get_data.cmd = EPM_PSOC_GET_LAST_MEASUREMENT_CMD; |
| 1261 | rc = epm_psoc_get_data(epm_adc, &psoc_get_data); |
| 1262 | if (rc) { |
| 1263 | pr_err("PSOC last measured data failed\n"); |
| 1264 | return -EINVAL; |
| 1265 | } |
| 1266 | |
| 1267 | if (copy_to_user((void __user *)arg, &psoc_get_data, |
| 1268 | sizeof(struct epm_psoc_get_data))) |
| 1269 | return -EFAULT; |
| 1270 | break; |
| 1271 | } |
| 1272 | case EPM_PSOC_ADC_GET_BUFFERED_DATA: |
| 1273 | { |
| 1274 | struct epm_psoc_get_buffered_data psoc_get_data; |
| 1275 | int rc; |
| 1276 | |
| 1277 | if (copy_from_user(&psoc_get_data, |
| 1278 | (void __user *)arg, |
| 1279 | sizeof(struct epm_psoc_get_buffered_data))) |
| 1280 | return -EFAULT; |
| 1281 | |
| 1282 | psoc_get_data.cmd = EPM_PSOC_GET_BUFFERED_DATA_CMD; |
| 1283 | rc = epm_psoc_get_buffered_data(epm_adc, |
| 1284 | &psoc_get_data); |
| 1285 | if (rc) { |
| 1286 | pr_err("PSOC buffered measurement failed\n"); |
| 1287 | return -EINVAL; |
| 1288 | } |
| 1289 | |
| 1290 | if (copy_to_user((void __user *)arg, &psoc_get_data, |
| 1291 | sizeof(struct epm_psoc_get_buffered_data))) |
| 1292 | return -EFAULT; |
| 1293 | break; |
| 1294 | } |
| 1295 | case EPM_PSOC_ADC_GET_SYSTEM_TIMESTAMP: |
| 1296 | case EPM_PSOC_ADC_SET_SYSTEM_TIMESTAMP: |
| 1297 | { |
| 1298 | struct epm_psoc_system_time_stamp psoc_timestamp; |
| 1299 | int rc; |
| 1300 | |
| 1301 | if (copy_from_user(&psoc_timestamp, |
| 1302 | (void __user *)arg, |
| 1303 | sizeof(struct epm_psoc_system_time_stamp))) |
| 1304 | return -EFAULT; |
| 1305 | |
| 1306 | rc = epm_psoc_timestamp(epm_adc, &psoc_timestamp); |
| 1307 | if (rc) { |
| 1308 | pr_err("PSOC buffered measurement failed\n"); |
| 1309 | return -EINVAL; |
| 1310 | } |
| 1311 | |
| 1312 | if (copy_to_user((void __user *)arg, &psoc_timestamp, |
| 1313 | sizeof(struct epm_psoc_system_time_stamp))) |
| 1314 | return -EFAULT; |
| 1315 | break; |
| 1316 | } |
| 1317 | case EPM_PSOC_ADC_GET_AVERAGE_DATA: |
| 1318 | { |
| 1319 | struct epm_psoc_get_avg_buffered_switch_data |
| 1320 | psoc_get_data; |
| 1321 | int rc; |
| 1322 | |
| 1323 | if (copy_from_user(&psoc_get_data, |
| 1324 | (void __user *)arg, |
| 1325 | sizeof(struct |
| 1326 | epm_psoc_get_avg_buffered_switch_data))) |
| 1327 | return -EFAULT; |
| 1328 | |
| 1329 | psoc_get_data.cmd = EPM_PSOC_GET_AVERAGED_DATA_CMD; |
| 1330 | rc = epm_psoc_get_avg_buffered_switch_data(epm_adc, |
| 1331 | &psoc_get_data); |
| 1332 | if (rc) { |
| 1333 | pr_err("Get averaged buffered data failed\n"); |
| 1334 | return -EINVAL; |
| 1335 | } |
| 1336 | |
| 1337 | if (copy_to_user((void __user *)arg, &psoc_get_data, |
| 1338 | sizeof(struct |
| 1339 | epm_psoc_get_avg_buffered_switch_data))) |
| 1340 | return -EFAULT; |
| 1341 | break; |
| 1342 | } |
| 1343 | case EPM_PSOC_SET_CHANNEL_SWITCH: |
| 1344 | { |
| 1345 | struct epm_psoc_set_channel_switch psoc_channel_switch; |
| 1346 | int rc; |
| 1347 | |
| 1348 | if (copy_from_user(&psoc_channel_switch, |
| 1349 | (void __user *)arg, |
| 1350 | sizeof(struct epm_psoc_set_channel_switch))) |
| 1351 | return -EFAULT; |
| 1352 | |
| 1353 | rc = epm_psoc_set_channel_switch(epm_adc, |
| 1354 | &psoc_channel_switch); |
| 1355 | if (rc) { |
| 1356 | pr_err("PSOC channel switch failed\n"); |
| 1357 | return -EINVAL; |
| 1358 | } |
| 1359 | |
| 1360 | if (copy_to_user((void __user *)arg, |
| 1361 | &psoc_channel_switch, |
| 1362 | sizeof(struct epm_psoc_set_channel_switch))) |
| 1363 | return -EFAULT; |
| 1364 | break; |
| 1365 | } |
| 1366 | case EPM_PSOC_CLEAR_BUFFER: |
| 1367 | { |
| 1368 | int rc; |
| 1369 | rc = epm_psoc_clear_buffer(epm_adc); |
| 1370 | if (rc) { |
| 1371 | pr_err("PSOC clear buffer failed\n"); |
| 1372 | return -EINVAL; |
| 1373 | } |
| 1374 | |
| 1375 | if (copy_to_user((void __user *)arg, &rc, |
| 1376 | sizeof(uint32_t))) |
| 1377 | return -EFAULT; |
| 1378 | break; |
| 1379 | } |
| 1380 | case EPM_PSOC_ADC_SET_VADC_REFERENCE: |
| 1381 | { |
| 1382 | struct epm_psoc_set_vadc psoc_set_vadc; |
| 1383 | int rc; |
| 1384 | |
| 1385 | if (copy_from_user(&psoc_set_vadc, |
| 1386 | (void __user *)arg, |
| 1387 | sizeof(struct epm_psoc_set_vadc))) |
| 1388 | return -EFAULT; |
| 1389 | |
| 1390 | rc = epm_psoc_set_vadc(epm_adc, &psoc_set_vadc); |
| 1391 | if (rc) { |
| 1392 | pr_err("PSOC set VADC failed\n"); |
| 1393 | return -EINVAL; |
| 1394 | } |
| 1395 | |
| 1396 | if (copy_to_user((void __user *)arg, &psoc_set_vadc, |
| 1397 | sizeof(struct epm_psoc_set_vadc))) |
| 1398 | return -EFAULT; |
| 1399 | break; |
| 1400 | } |
Siddartha Mohanadoss | eb90c92 | 2012-03-27 22:58:06 -0700 | [diff] [blame] | 1401 | default: |
| 1402 | return -EINVAL; |
| 1403 | } |
| 1404 | |
| 1405 | return 0; |
| 1406 | } |
| 1407 | |
| 1408 | const struct file_operations epm_adc_fops = { |
| 1409 | .unlocked_ioctl = epm_adc_ioctl, |
| 1410 | }; |
| 1411 | |
Siddartha Mohanadoss | b0b8a6e | 2012-09-04 08:23:43 -0700 | [diff] [blame^] | 1412 | static ssize_t epm_adc_psoc_show_in(struct device *dev, |
| 1413 | struct device_attribute *devattr, char *buf) |
| 1414 | { |
| 1415 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
| 1416 | struct epm_adc_drv *epm_adc = epm_adc_drv; |
| 1417 | struct epm_psoc_init_resp init_resp; |
| 1418 | struct epm_psoc_channel_configure psoc_chan_configure; |
| 1419 | struct epm_psoc_get_data psoc_get_meas; |
| 1420 | int16_t *adc_code = 0; |
| 1421 | int rc = 0; |
| 1422 | |
| 1423 | rc = epm_adc_psoc_gpio_init(true); |
| 1424 | if (rc) { |
| 1425 | pr_err("GPIO init failed\n"); |
| 1426 | return 0; |
| 1427 | } |
| 1428 | usleep_range(EPM_GLOBAL_ENABLE_MIN_DELAY, |
| 1429 | EPM_GLOBAL_ENABLE_MAX_DELAY); |
| 1430 | |
| 1431 | init_resp.cmd = EPM_PSOC_INIT_CMD; |
| 1432 | rc = epm_psoc_init(epm_adc, &init_resp); |
| 1433 | if (rc) { |
| 1434 | pr_info("PSOC init failed %d\n", rc); |
| 1435 | return 0; |
| 1436 | } |
| 1437 | |
| 1438 | psoc_chan_configure.channel_num = (1 << attr->index); |
| 1439 | psoc_chan_configure.cmd = EPM_PSOC_CHANNEL_ENABLE_DISABLE_CMD; |
| 1440 | rc = epm_psoc_channel_configure(epm_adc, &psoc_chan_configure); |
| 1441 | if (rc) { |
| 1442 | pr_info("PSOC channel configure failed\n"); |
| 1443 | return 0; |
| 1444 | } |
| 1445 | |
| 1446 | usleep_range(EPM_GLOBAL_ENABLE_MIN_DELAY, |
| 1447 | EPM_GLOBAL_ENABLE_MAX_DELAY); |
| 1448 | |
| 1449 | psoc_get_meas.cmd = EPM_PSOC_GET_LAST_MEASUREMENT_CMD; |
| 1450 | psoc_get_meas.dev_num = 0; |
| 1451 | psoc_get_meas.chan_num = attr->index; |
| 1452 | rc = epm_psoc_get_data(epm_adc, &psoc_get_meas); |
| 1453 | if (rc) { |
| 1454 | pr_info("PSOC get data failed\n"); |
| 1455 | return 0; |
| 1456 | } |
| 1457 | |
| 1458 | *adc_code = psoc_get_meas.reading_value; |
| 1459 | |
| 1460 | rc = epm_psoc_scale_result(adc_code, |
| 1461 | psoc_chan_configure.channel_num); |
| 1462 | if (rc) { |
| 1463 | pr_info("Scale result failed\n"); |
| 1464 | return 0; |
| 1465 | } |
| 1466 | |
| 1467 | psoc_get_meas.reading_value = *adc_code; |
| 1468 | |
| 1469 | rc = epm_adc_psoc_gpio_init(false); |
| 1470 | if (rc) { |
| 1471 | pr_err("GPIO de-init failed\n"); |
| 1472 | return 0; |
| 1473 | } |
| 1474 | |
| 1475 | return snprintf(buf, 16, "Result: %d\n", psoc_get_meas.reading_value); |
| 1476 | } |
| 1477 | |
| 1478 | static struct sensor_device_attribute epm_adc_psoc_in_attrs[] = { |
| 1479 | SENSOR_ATTR(ads0_chan0, S_IRUGO, epm_adc_psoc_show_in, NULL, 0), |
| 1480 | SENSOR_ATTR(ads0_chan1, S_IRUGO, epm_adc_psoc_show_in, NULL, 1), |
| 1481 | SENSOR_ATTR(ads0_chan2, S_IRUGO, epm_adc_psoc_show_in, NULL, 2), |
| 1482 | SENSOR_ATTR(ads0_chan3, S_IRUGO, epm_adc_psoc_show_in, NULL, 3), |
| 1483 | SENSOR_ATTR(ads0_chan4, S_IRUGO, epm_adc_psoc_show_in, NULL, 4), |
| 1484 | SENSOR_ATTR(ads0_chan5, S_IRUGO, epm_adc_psoc_show_in, NULL, 5), |
| 1485 | SENSOR_ATTR(ads0_chan6, S_IRUGO, epm_adc_psoc_show_in, NULL, 6), |
| 1486 | SENSOR_ATTR(ads0_chan7, S_IRUGO, epm_adc_psoc_show_in, NULL, 7), |
| 1487 | SENSOR_ATTR(ads0_chan8, S_IRUGO, epm_adc_psoc_show_in, NULL, 8), |
| 1488 | SENSOR_ATTR(ads0_chan9, S_IRUGO, epm_adc_psoc_show_in, NULL, 9), |
| 1489 | SENSOR_ATTR(ads0_chan10, S_IRUGO, epm_adc_psoc_show_in, NULL, 10), |
| 1490 | SENSOR_ATTR(ads0_chan11, S_IRUGO, epm_adc_psoc_show_in, NULL, 11), |
| 1491 | SENSOR_ATTR(ads0_chan12, S_IRUGO, epm_adc_psoc_show_in, NULL, 12), |
| 1492 | SENSOR_ATTR(ads0_chan13, S_IRUGO, epm_adc_psoc_show_in, NULL, 13), |
| 1493 | SENSOR_ATTR(ads0_chan14, S_IRUGO, epm_adc_psoc_show_in, NULL, 14), |
| 1494 | SENSOR_ATTR(ads0_chan15, S_IRUGO, epm_adc_psoc_show_in, NULL, 15), |
| 1495 | SENSOR_ATTR(ads1_chan0, S_IRUGO, epm_adc_psoc_show_in, NULL, 16), |
| 1496 | SENSOR_ATTR(ads1_chan1, S_IRUGO, epm_adc_psoc_show_in, NULL, 17), |
| 1497 | SENSOR_ATTR(ads1_chan2, S_IRUGO, epm_adc_psoc_show_in, NULL, 18), |
| 1498 | SENSOR_ATTR(ads1_chan3, S_IRUGO, epm_adc_psoc_show_in, NULL, 19), |
| 1499 | SENSOR_ATTR(ads1_chan4, S_IRUGO, epm_adc_psoc_show_in, NULL, 20), |
| 1500 | SENSOR_ATTR(ads1_chan5, S_IRUGO, epm_adc_psoc_show_in, NULL, 21), |
| 1501 | SENSOR_ATTR(ads1_chan6, S_IRUGO, epm_adc_psoc_show_in, NULL, 22), |
| 1502 | SENSOR_ATTR(ads1_chan7, S_IRUGO, epm_adc_psoc_show_in, NULL, 23), |
| 1503 | SENSOR_ATTR(ads1_chan8, S_IRUGO, epm_adc_psoc_show_in, NULL, 24), |
| 1504 | SENSOR_ATTR(ads1_chan9, S_IRUGO, epm_adc_psoc_show_in, NULL, 25), |
| 1505 | SENSOR_ATTR(ads1_chan10, S_IRUGO, epm_adc_psoc_show_in, NULL, 26), |
| 1506 | SENSOR_ATTR(ads1_chan11, S_IRUGO, epm_adc_psoc_show_in, NULL, 27), |
| 1507 | SENSOR_ATTR(ads1_chan12, S_IRUGO, epm_adc_psoc_show_in, NULL, 28), |
| 1508 | SENSOR_ATTR(ads1_chan13, S_IRUGO, epm_adc_psoc_show_in, NULL, 29), |
| 1509 | SENSOR_ATTR(ads1_chan14, S_IRUGO, epm_adc_psoc_show_in, NULL, 30), |
| 1510 | SENSOR_ATTR(ads1_chan15, S_IRUGO, epm_adc_psoc_show_in, NULL, 31), |
| 1511 | }; |
| 1512 | |
| 1513 | static int __devinit epm_adc_psoc_init_hwmon(struct spi_device *spi, |
| 1514 | struct epm_adc_drv *epm_adc) |
| 1515 | { |
| 1516 | int i, rc, num_chans = 15; |
| 1517 | |
| 1518 | for (i = 0; i < num_chans; i++) { |
| 1519 | rc = device_create_file(&spi->dev, |
| 1520 | &epm_adc_psoc_in_attrs[i].dev_attr); |
| 1521 | if (rc) { |
| 1522 | dev_err(&spi->dev, "device_create_file failed\n"); |
| 1523 | return rc; |
| 1524 | } |
| 1525 | } |
| 1526 | |
| 1527 | return 0; |
| 1528 | } |
| 1529 | |
| 1530 | static int get_device_tree_data(struct spi_device *spi) |
| 1531 | { |
| 1532 | const struct device_node *node = spi->dev.of_node; |
| 1533 | struct epm_adc_drv *epm_adc; |
| 1534 | int32_t *epm_ch_gain, *epm_ch_rsense; |
| 1535 | u32 rc = 0, epm_num_channels, i; |
| 1536 | |
| 1537 | if (!node) |
| 1538 | return -EINVAL; |
| 1539 | |
| 1540 | rc = of_property_read_u32(node, |
| 1541 | "qcom,channels", &epm_num_channels); |
| 1542 | if (rc) { |
| 1543 | dev_err(&spi->dev, "missing channel numbers\n"); |
| 1544 | return -ENODEV; |
| 1545 | } |
| 1546 | |
| 1547 | epm_ch_gain = devm_kzalloc(&spi->dev, |
| 1548 | epm_num_channels, GFP_KERNEL); |
| 1549 | if (!epm_ch_gain) { |
| 1550 | dev_err(&spi->dev, "cannot allocate gain\n"); |
| 1551 | return -ENOMEM; |
| 1552 | } |
| 1553 | |
| 1554 | epm_ch_rsense = devm_kzalloc(&spi->dev, |
| 1555 | epm_num_channels, GFP_KERNEL); |
| 1556 | if (!epm_ch_rsense) { |
| 1557 | dev_err(&spi->dev, "cannot allocate rsense\n"); |
| 1558 | return -ENOMEM; |
| 1559 | } |
| 1560 | |
| 1561 | rc = of_property_read_u32_array(node, |
| 1562 | "qcom,gain", epm_ch_gain, epm_num_channels); |
| 1563 | if (rc) { |
| 1564 | dev_err(&spi->dev, "invalid gain property:%d\n", rc); |
| 1565 | return rc; |
| 1566 | } |
| 1567 | |
| 1568 | rc = of_property_read_u32_array(node, |
| 1569 | "qcom,rsense", epm_ch_rsense, epm_num_channels); |
| 1570 | if (rc) { |
| 1571 | dev_err(&spi->dev, "invalid rsense property:%d\n", rc); |
| 1572 | return rc; |
| 1573 | } |
| 1574 | |
| 1575 | epm_adc = devm_kzalloc(&spi->dev, |
| 1576 | sizeof(struct epm_adc_drv) + |
| 1577 | (epm_num_channels * |
| 1578 | sizeof(struct epm_chan_properties)), |
| 1579 | GFP_KERNEL); |
| 1580 | if (!epm_adc) { |
| 1581 | dev_err(&spi->dev, "Unable to allocate memory\n"); |
| 1582 | return -ENOMEM; |
| 1583 | } |
| 1584 | |
| 1585 | for (i = 0; i < epm_num_channels; i++) { |
| 1586 | epm_adc->epm_psoc_ch_prop[i].resistorvalue = |
| 1587 | epm_ch_rsense[i]; |
| 1588 | epm_adc->epm_psoc_ch_prop[i].gain = |
| 1589 | epm_ch_gain[i]; |
| 1590 | } |
| 1591 | |
| 1592 | epm_adc_drv = epm_adc; |
| 1593 | |
| 1594 | return 0; |
| 1595 | } |
| 1596 | |
| 1597 | static int __devinit epm_adc_psoc_spi_probe(struct spi_device *spi) |
| 1598 | { |
| 1599 | struct epm_adc_drv *epm_adc; |
| 1600 | struct device_node *node = spi->dev.of_node; |
| 1601 | int rc = 0; |
| 1602 | |
| 1603 | if (!node) { |
| 1604 | dev_err(&spi->dev, "no platform data?\n"); |
| 1605 | pr_info("Error in the probe\n"); |
| 1606 | return -EINVAL; |
| 1607 | } |
| 1608 | |
| 1609 | if (node) |
| 1610 | rc = get_device_tree_data(spi); |
| 1611 | else |
| 1612 | return -ENODEV; |
| 1613 | |
| 1614 | epm_adc = epm_adc_drv; |
| 1615 | epm_adc->misc.name = EPM_ADC_DRIVER_NAME; |
| 1616 | epm_adc->misc.minor = MISC_DYNAMIC_MINOR; |
| 1617 | epm_adc_drv->epm_spi_client = spi; |
| 1618 | epm_adc_drv->epm_spi_client->bits_per_word = |
| 1619 | EPM_ADC_ADS_SPI_BITS_PER_WORD; |
| 1620 | rc = epm_adc_psoc_init_hwmon(spi, epm_adc); |
| 1621 | if (rc) { |
| 1622 | dev_err(&spi->dev, "msm_adc_dev_init failed\n"); |
| 1623 | return rc; |
| 1624 | } |
| 1625 | |
| 1626 | epm_adc->hwmon = hwmon_device_register(&spi->dev); |
| 1627 | if (IS_ERR(epm_adc->hwmon)) { |
| 1628 | dev_err(&spi->dev, "hwmon_device_register failed\n"); |
| 1629 | return rc; |
| 1630 | } |
| 1631 | |
| 1632 | mutex_init(&epm_adc->conv_lock); |
| 1633 | |
| 1634 | return rc; |
| 1635 | } |
| 1636 | |
| 1637 | static int __devexit epm_adc_psoc_spi_remove(struct spi_device *spi) |
| 1638 | { |
| 1639 | epm_adc_drv->epm_spi_client = NULL; |
| 1640 | return 0; |
| 1641 | } |
| 1642 | |
| 1643 | static const struct of_device_id epm_adc_psoc_match_table[] = { |
| 1644 | { .compatible = "qcom,epm-adc", |
| 1645 | }, |
| 1646 | {} |
| 1647 | }; |
| 1648 | |
| 1649 | static struct spi_driver epm_spi_driver = { |
| 1650 | .probe = epm_adc_psoc_spi_probe, |
| 1651 | .remove = __devexit_p(epm_adc_psoc_spi_remove), |
| 1652 | .driver = { |
| 1653 | .name = EPM_ADC_DRIVER_NAME, |
| 1654 | .of_match_table = epm_adc_psoc_match_table, |
| 1655 | }, |
| 1656 | }; |
| 1657 | |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 1658 | static ssize_t epm_adc_show_in(struct device *dev, |
| 1659 | struct device_attribute *devattr, char *buf) |
| 1660 | { |
| 1661 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
| 1662 | struct epm_adc_drv *epm_adc = dev_get_drvdata(dev); |
| 1663 | struct epm_adc_platform_data *pdata = epm_adc->pdev->dev.platform_data; |
| 1664 | struct epm_chan_request conv; |
| 1665 | int rc = 0; |
| 1666 | |
| 1667 | conv.device_idx = attr->index / pdata->chan_per_adc; |
| 1668 | conv.channel_idx = attr->index % pdata->chan_per_adc; |
| 1669 | conv.physical = 0; |
| 1670 | pr_debug("%s: device_idx=%d channel_idx=%d", __func__, conv.device_idx, |
| 1671 | conv.channel_idx); |
Siddartha Mohanadoss | eb90c92 | 2012-03-27 22:58:06 -0700 | [diff] [blame] | 1672 | if (!epm_adc_expander_register) { |
| 1673 | rc = epm_adc_i2c_expander_register(); |
| 1674 | if (rc) { |
| 1675 | pr_err("I2C expander register failed:%d\n", rc); |
| 1676 | return rc; |
| 1677 | } |
| 1678 | epm_adc_expander_register = true; |
| 1679 | } |
| 1680 | |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 1681 | rc = epm_adc_hw_init(epm_adc); |
| 1682 | if (rc) { |
| 1683 | pr_err("%s: epm_adc_hw_init() failed, rc = %d", |
| 1684 | __func__, rc); |
| 1685 | return 0; |
| 1686 | } |
| 1687 | |
| 1688 | rc = epm_adc_blocking_conversion(epm_adc, &conv); |
| 1689 | if (rc) { |
| 1690 | pr_err("%s: epm_adc_blocking_conversion() failed, rc = %d\n", |
| 1691 | __func__, rc); |
| 1692 | return 0; |
| 1693 | } |
| 1694 | rc = epm_adc_hw_deinit(epm_adc); |
| 1695 | if (rc) { |
| 1696 | pr_err("%s: epm_adc_hw_deinit() failed, rc = %d", |
| 1697 | __func__, rc); |
| 1698 | return 0; |
| 1699 | } |
| 1700 | |
| 1701 | return snprintf(buf, 16, "Result: %d\n", conv.physical); |
| 1702 | } |
| 1703 | |
Stephen Boyd | aeaf2ad | 2012-07-03 14:33:25 -0700 | [diff] [blame] | 1704 | static struct sensor_device_attribute epm_adc_in_attrs[] = { |
| 1705 | SENSOR_ATTR(ads0_chan0, S_IRUGO, epm_adc_show_in, NULL, 0), |
| 1706 | SENSOR_ATTR(ads0_chan1, S_IRUGO, epm_adc_show_in, NULL, 1), |
| 1707 | SENSOR_ATTR(ads0_chan2, S_IRUGO, epm_adc_show_in, NULL, 2), |
| 1708 | SENSOR_ATTR(ads0_chan3, S_IRUGO, epm_adc_show_in, NULL, 3), |
| 1709 | SENSOR_ATTR(ads0_chan4, S_IRUGO, epm_adc_show_in, NULL, 4), |
| 1710 | SENSOR_ATTR(ads0_chan5, S_IRUGO, epm_adc_show_in, NULL, 5), |
| 1711 | SENSOR_ATTR(ads0_chan6, S_IRUGO, epm_adc_show_in, NULL, 6), |
| 1712 | SENSOR_ATTR(ads0_chan7, S_IRUGO, epm_adc_show_in, NULL, 7), |
| 1713 | SENSOR_ATTR(ads0_chan8, S_IRUGO, epm_adc_show_in, NULL, 8), |
| 1714 | SENSOR_ATTR(ads0_chan9, S_IRUGO, epm_adc_show_in, NULL, 9), |
| 1715 | SENSOR_ATTR(ads0_chan10, S_IRUGO, epm_adc_show_in, NULL, 10), |
| 1716 | SENSOR_ATTR(ads0_chan11, S_IRUGO, epm_adc_show_in, NULL, 11), |
| 1717 | SENSOR_ATTR(ads0_chan12, S_IRUGO, epm_adc_show_in, NULL, 12), |
| 1718 | SENSOR_ATTR(ads0_chan13, S_IRUGO, epm_adc_show_in, NULL, 13), |
| 1719 | SENSOR_ATTR(ads0_chan14, S_IRUGO, epm_adc_show_in, NULL, 14), |
| 1720 | SENSOR_ATTR(ads0_chan15, S_IRUGO, epm_adc_show_in, NULL, 15), |
| 1721 | SENSOR_ATTR(ads1_chan0, S_IRUGO, epm_adc_show_in, NULL, 16), |
| 1722 | SENSOR_ATTR(ads1_chan1, S_IRUGO, epm_adc_show_in, NULL, 17), |
| 1723 | SENSOR_ATTR(ads1_chan2, S_IRUGO, epm_adc_show_in, NULL, 18), |
| 1724 | SENSOR_ATTR(ads1_chan3, S_IRUGO, epm_adc_show_in, NULL, 19), |
| 1725 | SENSOR_ATTR(ads1_chan4, S_IRUGO, epm_adc_show_in, NULL, 20), |
| 1726 | SENSOR_ATTR(ads1_chan5, S_IRUGO, epm_adc_show_in, NULL, 21), |
| 1727 | SENSOR_ATTR(ads1_chan6, S_IRUGO, epm_adc_show_in, NULL, 22), |
| 1728 | SENSOR_ATTR(ads1_chan7, S_IRUGO, epm_adc_show_in, NULL, 23), |
| 1729 | SENSOR_ATTR(ads1_chan8, S_IRUGO, epm_adc_show_in, NULL, 24), |
| 1730 | SENSOR_ATTR(ads1_chan9, S_IRUGO, epm_adc_show_in, NULL, 25), |
| 1731 | SENSOR_ATTR(ads1_chan10, S_IRUGO, epm_adc_show_in, NULL, 26), |
| 1732 | SENSOR_ATTR(ads1_chan11, S_IRUGO, epm_adc_show_in, NULL, 27), |
| 1733 | SENSOR_ATTR(ads1_chan12, S_IRUGO, epm_adc_show_in, NULL, 28), |
| 1734 | SENSOR_ATTR(ads1_chan13, S_IRUGO, epm_adc_show_in, NULL, 29), |
| 1735 | SENSOR_ATTR(ads1_chan14, S_IRUGO, epm_adc_show_in, NULL, 30), |
| 1736 | SENSOR_ATTR(ads1_chan15, S_IRUGO, epm_adc_show_in, NULL, 31), |
| 1737 | }; |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 1738 | |
| 1739 | static int __devinit epm_adc_init_hwmon(struct platform_device *pdev, |
| 1740 | struct epm_adc_drv *epm_adc) |
| 1741 | { |
| 1742 | struct epm_adc_platform_data *pdata = pdev->dev.platform_data; |
Stephen Boyd | aeaf2ad | 2012-07-03 14:33:25 -0700 | [diff] [blame] | 1743 | int i, rc, num_chans = pdata->num_channels; |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 1744 | |
Stephen Boyd | aeaf2ad | 2012-07-03 14:33:25 -0700 | [diff] [blame] | 1745 | for (i = 0; i < num_chans; i++) { |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 1746 | rc = device_create_file(&pdev->dev, |
Stephen Boyd | aeaf2ad | 2012-07-03 14:33:25 -0700 | [diff] [blame] | 1747 | &epm_adc_in_attrs[i].dev_attr); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 1748 | if (rc) { |
| 1749 | dev_err(&pdev->dev, "device_create_file failed\n"); |
| 1750 | return rc; |
| 1751 | } |
| 1752 | } |
| 1753 | |
Stephen Boyd | aeaf2ad | 2012-07-03 14:33:25 -0700 | [diff] [blame] | 1754 | return 0; |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 1755 | } |
| 1756 | |
Stephen Boyd | 58701e8 | 2012-04-25 11:48:28 -0700 | [diff] [blame] | 1757 | static int __devinit epm_adc_probe(struct platform_device *pdev) |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 1758 | { |
| 1759 | struct epm_adc_drv *epm_adc; |
| 1760 | struct epm_adc_platform_data *pdata = pdev->dev.platform_data; |
| 1761 | int rc = 0; |
| 1762 | |
| 1763 | if (!pdata) { |
| 1764 | dev_err(&pdev->dev, "no platform data?\n"); |
| 1765 | return -EINVAL; |
| 1766 | } |
| 1767 | |
| 1768 | epm_adc = kzalloc(sizeof(struct epm_adc_drv), GFP_KERNEL); |
| 1769 | if (!epm_adc) { |
| 1770 | dev_err(&pdev->dev, "Unable to allocate memory\n"); |
| 1771 | return -ENOMEM; |
| 1772 | } |
| 1773 | |
| 1774 | platform_set_drvdata(pdev, epm_adc); |
| 1775 | epm_adc_drv = epm_adc; |
| 1776 | epm_adc->pdev = pdev; |
| 1777 | |
Siddartha Mohanadoss | eb90c92 | 2012-03-27 22:58:06 -0700 | [diff] [blame] | 1778 | epm_adc->misc.name = EPM_ADC_DRIVER_NAME; |
| 1779 | epm_adc->misc.minor = MISC_DYNAMIC_MINOR; |
| 1780 | epm_adc->misc.fops = &epm_adc_fops; |
| 1781 | |
| 1782 | if (misc_register(&epm_adc->misc)) { |
| 1783 | dev_err(&pdev->dev, "Unable to register misc device!\n"); |
| 1784 | return -EFAULT; |
| 1785 | } |
| 1786 | |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 1787 | rc = epm_adc_init_hwmon(pdev, epm_adc); |
| 1788 | if (rc) { |
| 1789 | dev_err(&pdev->dev, "msm_adc_dev_init failed\n"); |
Siddartha Mohanadoss | eb90c92 | 2012-03-27 22:58:06 -0700 | [diff] [blame] | 1790 | misc_deregister(&epm_adc->misc); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 1791 | return rc; |
| 1792 | } |
| 1793 | |
| 1794 | epm_adc->hwmon = hwmon_device_register(&pdev->dev); |
| 1795 | if (IS_ERR(epm_adc->hwmon)) { |
| 1796 | dev_err(&pdev->dev, "hwmon_device_register failed\n"); |
Siddartha Mohanadoss | eb90c92 | 2012-03-27 22:58:06 -0700 | [diff] [blame] | 1797 | misc_deregister(&epm_adc->misc); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 1798 | rc = PTR_ERR(epm_adc->hwmon); |
| 1799 | return rc; |
| 1800 | } |
| 1801 | |
| 1802 | mutex_init(&epm_adc->conv_lock); |
| 1803 | epm_i2c_info = &pdata->epm_i2c_board_info; |
| 1804 | epm_adc->bus_id = pdata->bus_id; |
| 1805 | epm_gpio_expander_base_addr = pdata->gpio_expander_base_addr; |
Siddartha Mohanadoss | eb90c92 | 2012-03-27 22:58:06 -0700 | [diff] [blame] | 1806 | epm_adc_expander_register = false; |
Siddartha Mohanadoss | b0b8a6e | 2012-09-04 08:23:43 -0700 | [diff] [blame^] | 1807 | |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 1808 | return rc; |
| 1809 | } |
| 1810 | |
| 1811 | static int __devexit epm_adc_remove(struct platform_device *pdev) |
| 1812 | { |
| 1813 | struct epm_adc_drv *epm_adc = platform_get_drvdata(pdev); |
| 1814 | struct epm_adc_platform_data *pdata = pdev->dev.platform_data; |
| 1815 | int num_chans = pdata->num_channels; |
| 1816 | int i = 0; |
| 1817 | |
Stephen Boyd | aeaf2ad | 2012-07-03 14:33:25 -0700 | [diff] [blame] | 1818 | for (i = 0; i < num_chans; i++) |
| 1819 | device_remove_file(&pdev->dev, &epm_adc_in_attrs[i].dev_attr); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 1820 | hwmon_device_unregister(epm_adc->hwmon); |
Siddartha Mohanadoss | eb90c92 | 2012-03-27 22:58:06 -0700 | [diff] [blame] | 1821 | misc_deregister(&epm_adc->misc); |
Siddartha Mohanadoss | 53c16f9 | 2011-10-17 15:57:15 -0700 | [diff] [blame] | 1822 | epm_adc = NULL; |
| 1823 | |
| 1824 | return 0; |
| 1825 | } |
| 1826 | |
| 1827 | static struct platform_driver epm_adc_driver = { |
| 1828 | .probe = epm_adc_probe, |
| 1829 | .remove = __devexit_p(epm_adc_remove), |
| 1830 | .driver = { |
| 1831 | .name = EPM_ADC_DRIVER_NAME, |
| 1832 | .owner = THIS_MODULE, |
| 1833 | }, |
| 1834 | }; |
| 1835 | |
| 1836 | static int __init epm_adc_init(void) |
| 1837 | { |
| 1838 | int ret = 0; |
| 1839 | |
| 1840 | ret = platform_driver_register(&epm_adc_driver); |
| 1841 | if (ret) { |
| 1842 | pr_err("%s: driver register failed, rc=%d\n", __func__, ret); |
| 1843 | return ret; |
| 1844 | } |
| 1845 | |
| 1846 | ret = spi_register_driver(&epm_spi_driver); |
| 1847 | if (ret) |
| 1848 | pr_err("%s: spi register failed: rc=%d\n", __func__, ret); |
| 1849 | |
| 1850 | return ret; |
| 1851 | } |
| 1852 | |
| 1853 | static void __exit epm_adc_exit(void) |
| 1854 | { |
| 1855 | spi_unregister_driver(&epm_spi_driver); |
| 1856 | platform_driver_unregister(&epm_adc_driver); |
| 1857 | } |
| 1858 | |
| 1859 | module_init(epm_adc_init); |
| 1860 | module_exit(epm_adc_exit); |
| 1861 | |
| 1862 | MODULE_DESCRIPTION("EPM ADC Driver"); |
| 1863 | MODULE_ALIAS("platform:epm_adc"); |
| 1864 | MODULE_LICENSE("GPL v2"); |