blob: 6d3eb984640b4baca7d2d7aa5e349cc61829ac0c [file] [log] [blame]
Kiran Kandi3426e512011-09-13 22:50:10 -07001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/module.h>
13#include <linux/init.h>
Bradley Rubin229c6a52011-07-12 16:18:48 -070014#include <linux/firmware.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070015#include <linux/slab.h>
16#include <linux/platform_device.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053017#include <linux/device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/printk.h>
19#include <linux/ratelimit.h>
Bradley Rubincb3950a2011-08-18 13:07:26 -070020#include <linux/debugfs.h>
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -070021#include <linux/wait.h>
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +053022#include <linux/mfd/wcd9xxx/core.h>
23#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
24#include <linux/mfd/wcd9xxx/wcd9310_registers.h>
25#include <linux/mfd/wcd9xxx/pdata.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053026#include <sound/pcm.h>
27#include <sound/pcm_params.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <sound/soc.h>
29#include <sound/soc-dapm.h>
30#include <sound/tlv.h>
31#include <linux/bitops.h>
32#include <linux/delay.h>
Kuirong Wanga545e722012-02-06 19:12:54 -080033#include <linux/pm_runtime.h>
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070034#include <linux/kernel.h>
35#include <linux/gpio.h>
Joonwoo Parkb16c0bd2012-10-04 16:57:52 -070036#include <linux/irq.h>
37#include <linux/wakelock.h>
38#include <linux/suspend.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070039#include "wcd9310.h"
40
Joonwoo Parkc1c67a92012-08-07 16:05:36 -070041static int cfilt_adjust_ms = 10;
42module_param(cfilt_adjust_ms, int, 0644);
43MODULE_PARM_DESC(cfilt_adjust_ms, "delay after adjusting cfilt voltage in ms");
44
Kiran Kandi1e6371d2012-03-29 11:48:57 -070045#define WCD9310_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
46 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
47 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
48
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070049
50#define NUM_DECIMATORS 10
51#define NUM_INTERPOLATORS 7
52#define BITS_PER_REG 8
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080053#define TABLA_CFILT_FAST_MODE 0x00
54#define TABLA_CFILT_SLOW_MODE 0x40
Patrick Lai64b43262011-12-06 17:29:15 -080055#define MBHC_FW_READ_ATTEMPTS 15
56#define MBHC_FW_READ_TIMEOUT 2000000
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070057
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -070058#define SLIM_CLOSE_TIMEOUT 1000
59
Joonwoo Park03324832012-03-19 19:36:16 -070060enum {
61 MBHC_USE_HPHL_TRIGGER = 1,
62 MBHC_USE_MB_TRIGGER = 2
63};
64
65#define MBHC_NUM_DCE_PLUG_DETECT 3
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070066#define NUM_ATTEMPTS_INSERT_DETECT 25
67#define NUM_ATTEMPTS_TO_REPORT 5
Joonwoo Park03324832012-03-19 19:36:16 -070068
Joonwoo Park2cc13f02012-05-09 12:44:25 -070069#define TABLA_JACK_MASK (SND_JACK_HEADSET | SND_JACK_OC_HPHL | \
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -070070 SND_JACK_OC_HPHR | SND_JACK_LINEOUT | \
71 SND_JACK_UNSUPPORTED)
Patrick Lai49efeac2011-11-03 11:01:12 -070072
Santosh Mardie15e2302011-11-15 10:39:23 +053073#define TABLA_I2S_MASTER_MODE_MASK 0x08
74
Patrick Laic7cae882011-11-18 11:52:49 -080075#define TABLA_OCP_ATTEMPT 1
76
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080077#define AIF1_PB 1
78#define AIF1_CAP 2
Neema Shettyd3a89262012-02-16 10:23:50 -080079#define AIF2_PB 3
Kiran Kandi1e6371d2012-03-29 11:48:57 -070080#define AIF2_CAP 4
Neema Shetty3fb1b802012-04-27 13:53:24 -070081#define AIF3_CAP 5
Kiran Kandia9fffe92012-05-20 23:42:30 -070082#define AIF3_PB 6
Kiran Kandi1e6371d2012-03-29 11:48:57 -070083
Kiran Kandia9fffe92012-05-20 23:42:30 -070084#define NUM_CODEC_DAIS 6
Kuirong Wang0f8ade32012-02-27 16:29:45 -080085#define TABLA_COMP_DIGITAL_GAIN_OFFSET 3
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080086
87struct tabla_codec_dai_data {
88 u32 rate;
89 u32 *ch_num;
90 u32 ch_act;
91 u32 ch_tot;
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -070092 u32 ch_mask;
93 wait_queue_head_t dai_wait;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080094};
95
Joonwoo Park0976d012011-12-22 11:48:18 -080096#define TABLA_MCLK_RATE_12288KHZ 12288000
97#define TABLA_MCLK_RATE_9600KHZ 9600000
98
Joonwoo Parkf4267c22012-01-10 13:25:24 -080099#define TABLA_FAKE_INS_THRESHOLD_MS 2500
Joonwoo Park6b9b03f2012-01-23 18:48:54 -0800100#define TABLA_FAKE_REMOVAL_MIN_PERIOD_MS 50
Joonwoo Parkf4267c22012-01-10 13:25:24 -0800101
Joonwoo Park03324832012-03-19 19:36:16 -0700102#define TABLA_MBHC_BUTTON_MIN 0x8000
103
Joonwoo Park03324832012-03-19 19:36:16 -0700104#define TABLA_MBHC_FAKE_INSERT_LOW 10
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700105#define TABLA_MBHC_FAKE_INSERT_HIGH 80
106#define TABLA_MBHC_FAKE_INS_HIGH_NO_GPIO 150
Joonwoo Park03324832012-03-19 19:36:16 -0700107
108#define TABLA_MBHC_STATUS_REL_DETECTION 0x0C
109
Joonwoo Parka3a4f322012-08-11 13:46:30 -0700110#define TABLA_MBHC_GPIO_REL_DEBOUNCE_TIME_MS 50
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700111
Joonwoo Parkcf473b42012-03-29 19:48:16 -0700112#define TABLA_MBHC_FAKE_INS_DELTA_MV 200
113#define TABLA_MBHC_FAKE_INS_DELTA_SCALED_MV 300
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700114
115#define TABLA_HS_DETECT_PLUG_TIME_MS (5 * 1000)
116#define TABLA_HS_DETECT_PLUG_INERVAL_MS 100
117
118#define TABLA_GPIO_IRQ_DEBOUNCE_TIME_US 5000
119
Joonwoo Park2cc13f02012-05-09 12:44:25 -0700120#define TABLA_MBHC_GND_MIC_SWAP_THRESHOLD 2
121
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700122#define TABLA_ACQUIRE_LOCK(x) do { mutex_lock(&x); } while (0)
123#define TABLA_RELEASE_LOCK(x) do { mutex_unlock(&x); } while (0)
124
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700125static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
126static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
127static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -0800128static struct snd_soc_dai_driver tabla_dai[];
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -0800129static const DECLARE_TLV_DB_SCALE(aux_pga_gain, 0, 2, 0);
Kiran Kandi93923902012-06-20 17:00:25 -0700130static int tabla_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
131 struct snd_kcontrol *kcontrol, int event);
132static int tabla_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
133 struct snd_kcontrol *kcontrol, int event);
134
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700135
136enum tabla_bandgap_type {
137 TABLA_BANDGAP_OFF = 0,
138 TABLA_BANDGAP_AUDIO_MODE,
139 TABLA_BANDGAP_MBHC_MODE,
140};
141
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700142struct mbhc_micbias_regs {
143 u16 cfilt_val;
144 u16 cfilt_ctl;
145 u16 mbhc_reg;
146 u16 int_rbias;
147 u16 ctl_reg;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -0800148 u8 cfilt_sel;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700149};
150
Ben Romberger1f045a72011-11-04 10:14:57 -0700151/* Codec supports 2 IIR filters */
152enum {
153 IIR1 = 0,
154 IIR2,
155 IIR_MAX,
156};
157/* Codec supports 5 bands */
158enum {
159 BAND1 = 0,
160 BAND2,
161 BAND3,
162 BAND4,
163 BAND5,
164 BAND_MAX,
165};
166
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800167enum {
168 COMPANDER_1 = 0,
169 COMPANDER_2,
170 COMPANDER_MAX,
171};
172
173enum {
174 COMPANDER_FS_8KHZ = 0,
175 COMPANDER_FS_16KHZ,
176 COMPANDER_FS_32KHZ,
177 COMPANDER_FS_48KHZ,
Kiran Kandi1e6371d2012-03-29 11:48:57 -0700178 COMPANDER_FS_96KHZ,
179 COMPANDER_FS_192KHZ,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800180 COMPANDER_FS_MAX,
181};
182
Joonwoo Parka9444452011-12-08 18:48:27 -0800183/* Flags to track of PA and DAC state.
184 * PA and DAC should be tracked separately as AUXPGA loopback requires
185 * only PA to be turned on without DAC being on. */
186enum tabla_priv_ack_flags {
187 TABLA_HPHL_PA_OFF_ACK = 0,
188 TABLA_HPHR_PA_OFF_ACK,
189 TABLA_HPHL_DAC_OFF_ACK,
190 TABLA_HPHR_DAC_OFF_ACK
191};
192
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800193
194struct comp_sample_dependent_params {
195 u32 peak_det_timeout;
196 u32 rms_meter_div_fact;
197 u32 rms_meter_resamp_fact;
198};
199
Joonwoo Park0976d012011-12-22 11:48:18 -0800200/* Data used by MBHC */
201struct mbhc_internal_cal_data {
202 u16 dce_z;
203 u16 dce_mb;
204 u16 sta_z;
205 u16 sta_mb;
Joonwoo Park433149a2012-01-11 09:53:54 -0800206 u32 t_sta_dce;
Joonwoo Park0976d012011-12-22 11:48:18 -0800207 u32 t_dce;
208 u32 t_sta;
209 u32 micb_mv;
210 u16 v_ins_hu;
211 u16 v_ins_h;
212 u16 v_b1_hu;
213 u16 v_b1_h;
214 u16 v_b1_huc;
215 u16 v_brh;
216 u16 v_brl;
217 u16 v_no_mic;
Joonwoo Park0976d012011-12-22 11:48:18 -0800218 u8 npoll;
219 u8 nbounce_wait;
Joonwoo Parkcf473b42012-03-29 19:48:16 -0700220 s16 adj_v_hs_max;
221 u16 adj_v_ins_hu;
222 u16 adj_v_ins_h;
223 s16 v_inval_ins_low;
224 s16 v_inval_ins_high;
Joonwoo Park0976d012011-12-22 11:48:18 -0800225};
226
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800227struct tabla_reg_address {
228 u16 micb_4_ctl;
229 u16 micb_4_int_rbias;
230 u16 micb_4_mbhc;
231};
232
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700233enum tabla_mbhc_plug_type {
Joonwoo Park41956722012-04-18 13:13:07 -0700234 PLUG_TYPE_INVALID = -1,
235 PLUG_TYPE_NONE,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700236 PLUG_TYPE_HEADSET,
237 PLUG_TYPE_HEADPHONE,
238 PLUG_TYPE_HIGH_HPH,
Joonwoo Park2cc13f02012-05-09 12:44:25 -0700239 PLUG_TYPE_GND_MIC_SWAP,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700240};
241
242enum tabla_mbhc_state {
243 MBHC_STATE_NONE = -1,
244 MBHC_STATE_POTENTIAL,
245 MBHC_STATE_POTENTIAL_RECOVERY,
246 MBHC_STATE_RELEASE,
247};
248
Kiran Kandid8cf5212012-03-02 15:34:53 -0800249struct hpf_work {
250 struct tabla_priv *tabla;
251 u32 decimator;
252 u8 tx_hpf_cut_of_freq;
253 struct delayed_work dwork;
254};
255
256static struct hpf_work tx_hpf_work[NUM_DECIMATORS];
257
Bradley Rubin229c6a52011-07-12 16:18:48 -0700258struct tabla_priv {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700259 struct snd_soc_codec *codec;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800260 struct tabla_reg_address reg_addr;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700261 u32 adc_count;
Patrick Lai3043fba2011-08-01 14:15:57 -0700262 u32 cfilt1_cnt;
263 u32 cfilt2_cnt;
264 u32 cfilt3_cnt;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700265 u32 rx_bias_count;
Kiran Kandi0ba468f2012-05-08 11:45:05 -0700266 s32 dmic_1_2_clk_cnt;
267 s32 dmic_3_4_clk_cnt;
268 s32 dmic_5_6_clk_cnt;
269
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700270 enum tabla_bandgap_type bandgap_type;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700271 bool mclk_enabled;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700272 bool clock_active;
273 bool config_mode_active;
274 bool mbhc_polling_active;
Joonwoo Parkf4267c22012-01-10 13:25:24 -0800275 unsigned long mbhc_fake_ins_start;
Bradley Rubincb1e2732011-06-23 16:49:20 -0700276 int buttons_pressed;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700277 enum tabla_mbhc_state mbhc_state;
278 struct tabla_mbhc_config mbhc_cfg;
Joonwoo Park0976d012011-12-22 11:48:18 -0800279 struct mbhc_internal_cal_data mbhc_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700280
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +0530281 struct wcd9xxx_pdata *pdata;
Bradley Rubina7096d02011-08-03 18:29:02 -0700282 u32 anc_slot;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700283
284 bool no_mic_headset_override;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -0700285 /* Delayed work to report long button press */
Joonwoo Park03324832012-03-19 19:36:16 -0700286 struct delayed_work mbhc_btn_dwork;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700287
288 struct mbhc_micbias_regs mbhc_bias_regs;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -0700289 bool mbhc_micbias_switched;
Patrick Lai49efeac2011-11-03 11:01:12 -0700290
Joonwoo Parka9444452011-12-08 18:48:27 -0800291 /* track PA/DAC state */
292 unsigned long hph_pa_dac_state;
293
Santosh Mardie15e2302011-11-15 10:39:23 +0530294 /*track tabla interface type*/
295 u8 intf_type;
296
Patrick Lai49efeac2011-11-03 11:01:12 -0700297 u32 hph_status; /* track headhpone status */
298 /* define separate work for left and right headphone OCP to avoid
299 * additional checking on which OCP event to report so no locking
300 * to ensure synchronization is required
301 */
302 struct work_struct hphlocp_work; /* reporting left hph ocp off */
303 struct work_struct hphrocp_work; /* reporting right hph ocp off */
Joonwoo Park8b1f0982011-12-08 17:12:45 -0800304
Patrick Laic7cae882011-11-18 11:52:49 -0800305 u8 hphlocp_cnt; /* headphone left ocp retry */
306 u8 hphrocp_cnt; /* headphone right ocp retry */
Joonwoo Park0976d012011-12-22 11:48:18 -0800307
Patrick Lai64b43262011-12-06 17:29:15 -0800308 /* Work to perform MBHC Firmware Read */
309 struct delayed_work mbhc_firmware_dwork;
310 const struct firmware *mbhc_fw;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -0800311
312 /* num of slim ports required */
313 struct tabla_codec_dai_data dai[NUM_CODEC_DAIS];
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800314
315 /*compander*/
316 int comp_enabled[COMPANDER_MAX];
317 u32 comp_fs[COMPANDER_MAX];
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -0800318
319 /* Maintain the status of AUX PGA */
320 int aux_pga_cnt;
321 u8 aux_l_gain;
322 u8 aux_r_gain;
Joonwoo Park03324832012-03-19 19:36:16 -0700323
Joonwoo Park03324832012-03-19 19:36:16 -0700324 struct delayed_work mbhc_insert_dwork;
325 unsigned long mbhc_last_resume; /* in jiffies */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700326
327 u8 current_plug;
328 struct work_struct hs_correct_plug_work;
329 bool hs_detect_work_stop;
330 bool hs_polling_irq_prepared;
331 bool lpi_enabled; /* low power insertion detection */
332 bool in_gpio_handler;
333 /* Currently, only used for mbhc purpose, to protect
334 * concurrent execution of mbhc threaded irq handlers and
335 * kill race between DAPM and MBHC.But can serve as a
336 * general lock to protect codec resource
337 */
338 struct mutex codec_resource_lock;
339
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -0700340 /* Work to perform polling on microphone voltage
341 * in order to correct plug type once plug type
342 * is detected as headphone
343 */
344 struct work_struct hs_correct_plug_work_nogpio;
345
Joonwoo Parkb16c0bd2012-10-04 16:57:52 -0700346 bool gpio_irq_resend;
347 struct wake_lock irq_resend_wlock;
348
Bradley Rubincb3950a2011-08-18 13:07:26 -0700349#ifdef CONFIG_DEBUG_FS
Joonwoo Park179b9ec2012-03-26 10:56:20 -0700350 struct dentry *debugfs_poke;
351 struct dentry *debugfs_mbhc;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700352#endif
Joonwoo Park179b9ec2012-03-26 10:56:20 -0700353};
354
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800355static const u32 comp_shift[] = {
356 0,
357 2,
358};
359
360static const int comp_rx_path[] = {
361 COMPANDER_1,
362 COMPANDER_1,
363 COMPANDER_2,
364 COMPANDER_2,
365 COMPANDER_2,
366 COMPANDER_2,
367 COMPANDER_MAX,
368};
369
370static const struct comp_sample_dependent_params comp_samp_params[] = {
371 {
372 .peak_det_timeout = 0x2,
373 .rms_meter_div_fact = 0x8 << 4,
374 .rms_meter_resamp_fact = 0x21,
375 },
376 {
377 .peak_det_timeout = 0x3,
378 .rms_meter_div_fact = 0x9 << 4,
379 .rms_meter_resamp_fact = 0x28,
380 },
381
382 {
383 .peak_det_timeout = 0x5,
384 .rms_meter_div_fact = 0xB << 4,
385 .rms_meter_resamp_fact = 0x28,
386 },
387
388 {
389 .peak_det_timeout = 0x5,
390 .rms_meter_div_fact = 0xB << 4,
391 .rms_meter_resamp_fact = 0x28,
392 },
393};
394
Kuirong Wange9c8a222012-03-28 16:24:09 -0700395static unsigned short rx_digital_gain_reg[] = {
396 TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
397 TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
398 TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
399 TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
400 TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
401 TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
402 TABLA_A_CDC_RX7_VOL_CTL_B2_CTL,
403};
404
405
406static unsigned short tx_digital_gain_reg[] = {
407 TABLA_A_CDC_TX1_VOL_CTL_GAIN,
408 TABLA_A_CDC_TX2_VOL_CTL_GAIN,
409 TABLA_A_CDC_TX3_VOL_CTL_GAIN,
410 TABLA_A_CDC_TX4_VOL_CTL_GAIN,
411 TABLA_A_CDC_TX5_VOL_CTL_GAIN,
412 TABLA_A_CDC_TX6_VOL_CTL_GAIN,
413 TABLA_A_CDC_TX7_VOL_CTL_GAIN,
414 TABLA_A_CDC_TX8_VOL_CTL_GAIN,
415 TABLA_A_CDC_TX9_VOL_CTL_GAIN,
416 TABLA_A_CDC_TX10_VOL_CTL_GAIN,
417};
418
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700419static int tabla_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
420 struct snd_kcontrol *kcontrol, int event)
421{
422 struct snd_soc_codec *codec = w->codec;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700423
424 pr_debug("%s %d\n", __func__, event);
425 switch (event) {
426 case SND_SOC_DAPM_POST_PMU:
ty.leecd34e122012-08-23 21:33:19 +0900427 msleep(15);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700428 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
429 0x01);
430 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x08);
431 usleep_range(200, 200);
432 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x00);
433 break;
434 case SND_SOC_DAPM_PRE_PMD:
435 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_RESET_CTL, 0x10,
436 0x10);
437 usleep_range(20, 20);
438 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x08);
439 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x10);
440 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x00);
441 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
442 0x00);
443 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700444 break;
445 }
446 return 0;
447}
448
Bradley Rubina7096d02011-08-03 18:29:02 -0700449static int tabla_get_anc_slot(struct snd_kcontrol *kcontrol,
450 struct snd_ctl_elem_value *ucontrol)
451{
452 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
453 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
454 ucontrol->value.integer.value[0] = tabla->anc_slot;
455 return 0;
456}
457
458static int tabla_put_anc_slot(struct snd_kcontrol *kcontrol,
459 struct snd_ctl_elem_value *ucontrol)
460{
461 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
462 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
463 tabla->anc_slot = ucontrol->value.integer.value[0];
464 return 0;
465}
466
Kiran Kandid2d86b52011-09-09 17:44:28 -0700467static int tabla_pa_gain_get(struct snd_kcontrol *kcontrol,
468 struct snd_ctl_elem_value *ucontrol)
469{
470 u8 ear_pa_gain;
471 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
472
473 ear_pa_gain = snd_soc_read(codec, TABLA_A_RX_EAR_GAIN);
474
475 ear_pa_gain = ear_pa_gain >> 5;
476
477 if (ear_pa_gain == 0x00) {
478 ucontrol->value.integer.value[0] = 0;
479 } else if (ear_pa_gain == 0x04) {
480 ucontrol->value.integer.value[0] = 1;
481 } else {
482 pr_err("%s: ERROR: Unsupported Ear Gain = 0x%x\n",
483 __func__, ear_pa_gain);
484 return -EINVAL;
485 }
486
487 pr_debug("%s: ear_pa_gain = 0x%x\n", __func__, ear_pa_gain);
488
489 return 0;
490}
491
492static int tabla_pa_gain_put(struct snd_kcontrol *kcontrol,
493 struct snd_ctl_elem_value *ucontrol)
494{
495 u8 ear_pa_gain;
496 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
497
498 pr_debug("%s: ucontrol->value.integer.value[0] = %ld\n", __func__,
499 ucontrol->value.integer.value[0]);
500
501 switch (ucontrol->value.integer.value[0]) {
502 case 0:
503 ear_pa_gain = 0x00;
504 break;
505 case 1:
506 ear_pa_gain = 0x80;
507 break;
508 default:
509 return -EINVAL;
510 }
511
512 snd_soc_update_bits(codec, TABLA_A_RX_EAR_GAIN, 0xE0, ear_pa_gain);
513 return 0;
514}
515
Ben Romberger1f045a72011-11-04 10:14:57 -0700516static int tabla_get_iir_enable_audio_mixer(
517 struct snd_kcontrol *kcontrol,
518 struct snd_ctl_elem_value *ucontrol)
519{
520 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
521 int iir_idx = ((struct soc_multi_mixer_control *)
522 kcontrol->private_value)->reg;
523 int band_idx = ((struct soc_multi_mixer_control *)
524 kcontrol->private_value)->shift;
525
526 ucontrol->value.integer.value[0] =
527 snd_soc_read(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx)) &
528 (1 << band_idx);
529
530 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
531 iir_idx, band_idx,
532 (uint32_t)ucontrol->value.integer.value[0]);
533 return 0;
534}
535
536static int tabla_put_iir_enable_audio_mixer(
537 struct snd_kcontrol *kcontrol,
538 struct snd_ctl_elem_value *ucontrol)
539{
540 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
541 int iir_idx = ((struct soc_multi_mixer_control *)
542 kcontrol->private_value)->reg;
543 int band_idx = ((struct soc_multi_mixer_control *)
544 kcontrol->private_value)->shift;
545 int value = ucontrol->value.integer.value[0];
546
547 /* Mask first 5 bits, 6-8 are reserved */
548 snd_soc_update_bits(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx),
549 (1 << band_idx), (value << band_idx));
550
551 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
552 iir_idx, band_idx, value);
553 return 0;
554}
555static uint32_t get_iir_band_coeff(struct snd_soc_codec *codec,
556 int iir_idx, int band_idx,
557 int coeff_idx)
558{
559 /* Address does not automatically update if reading */
Ben Romberger0915aae2012-02-06 23:32:43 -0800560 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700561 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800562 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700563
564 /* Mask bits top 2 bits since they are reserved */
565 return ((snd_soc_read(codec,
566 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx)) << 24) |
567 (snd_soc_read(codec,
568 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx)) << 16) |
569 (snd_soc_read(codec,
570 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx)) << 8) |
571 (snd_soc_read(codec,
572 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx)))) &
573 0x3FFFFFFF;
574}
575
576static int tabla_get_iir_band_audio_mixer(
577 struct snd_kcontrol *kcontrol,
578 struct snd_ctl_elem_value *ucontrol)
579{
580 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
581 int iir_idx = ((struct soc_multi_mixer_control *)
582 kcontrol->private_value)->reg;
583 int band_idx = ((struct soc_multi_mixer_control *)
584 kcontrol->private_value)->shift;
585
586 ucontrol->value.integer.value[0] =
587 get_iir_band_coeff(codec, iir_idx, band_idx, 0);
588 ucontrol->value.integer.value[1] =
589 get_iir_band_coeff(codec, iir_idx, band_idx, 1);
590 ucontrol->value.integer.value[2] =
591 get_iir_band_coeff(codec, iir_idx, band_idx, 2);
592 ucontrol->value.integer.value[3] =
593 get_iir_band_coeff(codec, iir_idx, band_idx, 3);
594 ucontrol->value.integer.value[4] =
595 get_iir_band_coeff(codec, iir_idx, band_idx, 4);
596
597 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
598 "%s: IIR #%d band #%d b1 = 0x%x\n"
599 "%s: IIR #%d band #%d b2 = 0x%x\n"
600 "%s: IIR #%d band #%d a1 = 0x%x\n"
601 "%s: IIR #%d band #%d a2 = 0x%x\n",
602 __func__, iir_idx, band_idx,
603 (uint32_t)ucontrol->value.integer.value[0],
604 __func__, iir_idx, band_idx,
605 (uint32_t)ucontrol->value.integer.value[1],
606 __func__, iir_idx, band_idx,
607 (uint32_t)ucontrol->value.integer.value[2],
608 __func__, iir_idx, band_idx,
609 (uint32_t)ucontrol->value.integer.value[3],
610 __func__, iir_idx, band_idx,
611 (uint32_t)ucontrol->value.integer.value[4]);
612 return 0;
613}
614
615static void set_iir_band_coeff(struct snd_soc_codec *codec,
616 int iir_idx, int band_idx,
617 int coeff_idx, uint32_t value)
618{
619 /* Mask top 3 bits, 6-8 are reserved */
620 /* Update address manually each time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800621 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700622 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800623 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700624
625 /* Mask top 2 bits, 7-8 are reserved */
Ben Romberger0915aae2012-02-06 23:32:43 -0800626 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700627 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800628 (value >> 24) & 0x3F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700629
630 /* Isolate 8bits at a time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800631 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700632 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800633 (value >> 16) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700634
Ben Romberger0915aae2012-02-06 23:32:43 -0800635 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700636 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800637 (value >> 8) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700638
Ben Romberger0915aae2012-02-06 23:32:43 -0800639 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700640 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800641 value & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700642}
643
644static int tabla_put_iir_band_audio_mixer(
645 struct snd_kcontrol *kcontrol,
646 struct snd_ctl_elem_value *ucontrol)
647{
648 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
649 int iir_idx = ((struct soc_multi_mixer_control *)
650 kcontrol->private_value)->reg;
651 int band_idx = ((struct soc_multi_mixer_control *)
652 kcontrol->private_value)->shift;
653
654 set_iir_band_coeff(codec, iir_idx, band_idx, 0,
655 ucontrol->value.integer.value[0]);
656 set_iir_band_coeff(codec, iir_idx, band_idx, 1,
657 ucontrol->value.integer.value[1]);
658 set_iir_band_coeff(codec, iir_idx, band_idx, 2,
659 ucontrol->value.integer.value[2]);
660 set_iir_band_coeff(codec, iir_idx, band_idx, 3,
661 ucontrol->value.integer.value[3]);
662 set_iir_band_coeff(codec, iir_idx, band_idx, 4,
663 ucontrol->value.integer.value[4]);
664
665 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
666 "%s: IIR #%d band #%d b1 = 0x%x\n"
667 "%s: IIR #%d band #%d b2 = 0x%x\n"
668 "%s: IIR #%d band #%d a1 = 0x%x\n"
669 "%s: IIR #%d band #%d a2 = 0x%x\n",
670 __func__, iir_idx, band_idx,
671 get_iir_band_coeff(codec, iir_idx, band_idx, 0),
672 __func__, iir_idx, band_idx,
673 get_iir_band_coeff(codec, iir_idx, band_idx, 1),
674 __func__, iir_idx, band_idx,
675 get_iir_band_coeff(codec, iir_idx, band_idx, 2),
676 __func__, iir_idx, band_idx,
677 get_iir_band_coeff(codec, iir_idx, band_idx, 3),
678 __func__, iir_idx, band_idx,
679 get_iir_band_coeff(codec, iir_idx, band_idx, 4));
680 return 0;
681}
682
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800683static int tabla_compander_gain_offset(
684 struct snd_soc_codec *codec, u32 enable,
685 unsigned int reg, int mask, int event)
686{
687 int pa_mode = snd_soc_read(codec, reg) & mask;
688 int gain_offset = 0;
689 /* if PMU && enable is 1-> offset is 3
690 * if PMU && enable is 0-> offset is 0
691 * if PMD && pa_mode is PA -> offset is 0: PMU compander is off
692 * if PMD && pa_mode is comp -> offset is -3: PMU compander is on.
693 */
694
695 if (SND_SOC_DAPM_EVENT_ON(event) && (enable != 0))
696 gain_offset = TABLA_COMP_DIGITAL_GAIN_OFFSET;
697 if (SND_SOC_DAPM_EVENT_OFF(event) && (pa_mode == 0))
698 gain_offset = -TABLA_COMP_DIGITAL_GAIN_OFFSET;
699 return gain_offset;
700}
701
702
703static int tabla_config_gain_compander(
704 struct snd_soc_codec *codec,
705 u32 compander, u32 enable, int event)
706{
707 int value = 0;
708 int mask = 1 << 4;
709 int gain = 0;
710 int gain_offset;
711 if (compander >= COMPANDER_MAX) {
712 pr_err("%s: Error, invalid compander channel\n", __func__);
713 return -EINVAL;
714 }
715
716 if ((enable == 0) || SND_SOC_DAPM_EVENT_OFF(event))
717 value = 1 << 4;
718
719 if (compander == COMPANDER_1) {
720 gain_offset = tabla_compander_gain_offset(codec, enable,
721 TABLA_A_RX_HPH_L_GAIN, mask, event);
722 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_GAIN, mask, value);
723 gain = snd_soc_read(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL);
724 snd_soc_update_bits(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
725 0xFF, gain - gain_offset);
726 gain_offset = tabla_compander_gain_offset(codec, enable,
727 TABLA_A_RX_HPH_R_GAIN, mask, event);
728 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_GAIN, mask, value);
729 gain = snd_soc_read(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL);
730 snd_soc_update_bits(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
731 0xFF, gain - gain_offset);
732 } else if (compander == COMPANDER_2) {
733 gain_offset = tabla_compander_gain_offset(codec, enable,
734 TABLA_A_RX_LINE_1_GAIN, mask, event);
735 snd_soc_update_bits(codec, TABLA_A_RX_LINE_1_GAIN, mask, value);
736 gain = snd_soc_read(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL);
737 snd_soc_update_bits(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
738 0xFF, gain - gain_offset);
739 gain_offset = tabla_compander_gain_offset(codec, enable,
740 TABLA_A_RX_LINE_3_GAIN, mask, event);
741 snd_soc_update_bits(codec, TABLA_A_RX_LINE_3_GAIN, mask, value);
742 gain = snd_soc_read(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL);
743 snd_soc_update_bits(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
744 0xFF, gain - gain_offset);
745 gain_offset = tabla_compander_gain_offset(codec, enable,
746 TABLA_A_RX_LINE_2_GAIN, mask, event);
747 snd_soc_update_bits(codec, TABLA_A_RX_LINE_2_GAIN, mask, value);
748 gain = snd_soc_read(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL);
749 snd_soc_update_bits(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
750 0xFF, gain - gain_offset);
751 gain_offset = tabla_compander_gain_offset(codec, enable,
752 TABLA_A_RX_LINE_4_GAIN, mask, event);
753 snd_soc_update_bits(codec, TABLA_A_RX_LINE_4_GAIN, mask, value);
754 gain = snd_soc_read(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL);
755 snd_soc_update_bits(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
756 0xFF, gain - gain_offset);
757 }
758 return 0;
759}
760static int tabla_get_compander(struct snd_kcontrol *kcontrol,
761 struct snd_ctl_elem_value *ucontrol)
762{
763
764 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
765 int comp = ((struct soc_multi_mixer_control *)
766 kcontrol->private_value)->max;
767 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
768
769 ucontrol->value.integer.value[0] = tabla->comp_enabled[comp];
770
771 return 0;
772}
773
774static int tabla_set_compander(struct snd_kcontrol *kcontrol,
775 struct snd_ctl_elem_value *ucontrol)
776{
777 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
778 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
779 int comp = ((struct soc_multi_mixer_control *)
780 kcontrol->private_value)->max;
781 int value = ucontrol->value.integer.value[0];
782
783 if (value == tabla->comp_enabled[comp]) {
784 pr_debug("%s: compander #%d enable %d no change\n",
785 __func__, comp, value);
786 return 0;
787 }
788 tabla->comp_enabled[comp] = value;
789 return 0;
790}
791
792
793static int tabla_config_compander(struct snd_soc_dapm_widget *w,
794 struct snd_kcontrol *kcontrol,
795 int event)
796{
797 struct snd_soc_codec *codec = w->codec;
798 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
799 u32 rate = tabla->comp_fs[w->shift];
800
801 switch (event) {
802 case SND_SOC_DAPM_PRE_PMU:
803 if (tabla->comp_enabled[w->shift] != 0) {
804 /* Enable both L/R compander clocks */
805 snd_soc_update_bits(codec,
806 TABLA_A_CDC_CLK_RX_B2_CTL,
807 0x03 << comp_shift[w->shift],
808 0x03 << comp_shift[w->shift]);
809 /* Clar the HALT for the compander*/
810 snd_soc_update_bits(codec,
811 TABLA_A_CDC_COMP1_B1_CTL +
812 w->shift * 8, 1 << 2, 0);
813 /* Toggle compander reset bits*/
814 snd_soc_update_bits(codec,
815 TABLA_A_CDC_CLK_OTHR_RESET_CTL,
816 0x03 << comp_shift[w->shift],
817 0x03 << comp_shift[w->shift]);
818 snd_soc_update_bits(codec,
819 TABLA_A_CDC_CLK_OTHR_RESET_CTL,
820 0x03 << comp_shift[w->shift], 0);
821 tabla_config_gain_compander(codec, w->shift, 1, event);
822 /* Update the RMS meter resampling*/
823 snd_soc_update_bits(codec,
824 TABLA_A_CDC_COMP1_B3_CTL +
825 w->shift * 8, 0xFF, 0x01);
826 /* Wait for 1ms*/
827 usleep_range(1000, 1000);
828 }
829 break;
830 case SND_SOC_DAPM_POST_PMU:
831 /* Set sample rate dependent paramater*/
832 if (tabla->comp_enabled[w->shift] != 0) {
833 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_FS_CFG +
834 w->shift * 8, 0x03, rate);
835 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
836 w->shift * 8, 0x0F,
837 comp_samp_params[rate].peak_det_timeout);
838 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
839 w->shift * 8, 0xF0,
840 comp_samp_params[rate].rms_meter_div_fact);
841 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B3_CTL +
842 w->shift * 8, 0xFF,
843 comp_samp_params[rate].rms_meter_resamp_fact);
844 /* Compander enable -> 0x370/0x378*/
845 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
846 w->shift * 8, 0x03, 0x03);
847 }
848 break;
849 case SND_SOC_DAPM_PRE_PMD:
850 /* Halt the compander*/
851 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
852 w->shift * 8, 1 << 2, 1 << 2);
853 break;
854 case SND_SOC_DAPM_POST_PMD:
855 /* Restore the gain */
856 tabla_config_gain_compander(codec, w->shift,
857 tabla->comp_enabled[w->shift], event);
858 /* Disable the compander*/
859 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
860 w->shift * 8, 0x03, 0x00);
861 /* Turn off the clock for compander in pair*/
862 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_B2_CTL,
863 0x03 << comp_shift[w->shift], 0);
864 break;
865 }
866 return 0;
867}
868
Kiran Kandid2d86b52011-09-09 17:44:28 -0700869static const char *tabla_ear_pa_gain_text[] = {"POS_6_DB", "POS_2_DB"};
870static const struct soc_enum tabla_ear_pa_gain_enum[] = {
871 SOC_ENUM_SINGLE_EXT(2, tabla_ear_pa_gain_text),
872};
873
Santosh Mardi024010f2011-10-18 06:27:21 +0530874/*cut of frequency for high pass filter*/
875static const char *cf_text[] = {
876 "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
877};
878
879static const struct soc_enum cf_dec1_enum =
880 SOC_ENUM_SINGLE(TABLA_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
881
882static const struct soc_enum cf_dec2_enum =
883 SOC_ENUM_SINGLE(TABLA_A_CDC_TX2_MUX_CTL, 4, 3, cf_text);
884
885static const struct soc_enum cf_dec3_enum =
886 SOC_ENUM_SINGLE(TABLA_A_CDC_TX3_MUX_CTL, 4, 3, cf_text);
887
888static const struct soc_enum cf_dec4_enum =
889 SOC_ENUM_SINGLE(TABLA_A_CDC_TX4_MUX_CTL, 4, 3, cf_text);
890
891static const struct soc_enum cf_dec5_enum =
892 SOC_ENUM_SINGLE(TABLA_A_CDC_TX5_MUX_CTL, 4, 3, cf_text);
893
894static const struct soc_enum cf_dec6_enum =
895 SOC_ENUM_SINGLE(TABLA_A_CDC_TX6_MUX_CTL, 4, 3, cf_text);
896
897static const struct soc_enum cf_dec7_enum =
898 SOC_ENUM_SINGLE(TABLA_A_CDC_TX7_MUX_CTL, 4, 3, cf_text);
899
900static const struct soc_enum cf_dec8_enum =
901 SOC_ENUM_SINGLE(TABLA_A_CDC_TX8_MUX_CTL, 4, 3, cf_text);
902
903static const struct soc_enum cf_dec9_enum =
904 SOC_ENUM_SINGLE(TABLA_A_CDC_TX9_MUX_CTL, 4, 3, cf_text);
905
906static const struct soc_enum cf_dec10_enum =
907 SOC_ENUM_SINGLE(TABLA_A_CDC_TX10_MUX_CTL, 4, 3, cf_text);
908
909static const struct soc_enum cf_rxmix1_enum =
910 SOC_ENUM_SINGLE(TABLA_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
911
912static const struct soc_enum cf_rxmix2_enum =
913 SOC_ENUM_SINGLE(TABLA_A_CDC_RX2_B4_CTL, 1, 3, cf_text);
914
915static const struct soc_enum cf_rxmix3_enum =
916 SOC_ENUM_SINGLE(TABLA_A_CDC_RX3_B4_CTL, 1, 3, cf_text);
917
918static const struct soc_enum cf_rxmix4_enum =
919 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B4_CTL, 1, 3, cf_text);
920
921static const struct soc_enum cf_rxmix5_enum =
922 SOC_ENUM_SINGLE(TABLA_A_CDC_RX5_B4_CTL, 1, 3, cf_text)
923;
924static const struct soc_enum cf_rxmix6_enum =
925 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B4_CTL, 1, 3, cf_text);
926
927static const struct soc_enum cf_rxmix7_enum =
928 SOC_ENUM_SINGLE(TABLA_A_CDC_RX7_B4_CTL, 1, 3, cf_text);
929
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700930static const struct snd_kcontrol_new tabla_snd_controls[] = {
Kiran Kandid2d86b52011-09-09 17:44:28 -0700931
932 SOC_ENUM_EXT("EAR PA Gain", tabla_ear_pa_gain_enum[0],
933 tabla_pa_gain_get, tabla_pa_gain_put),
934
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700935 SOC_SINGLE_TLV("LINEOUT1 Volume", TABLA_A_RX_LINE_1_GAIN, 0, 12, 1,
936 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700937 SOC_SINGLE_TLV("LINEOUT2 Volume", TABLA_A_RX_LINE_2_GAIN, 0, 12, 1,
938 line_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700939 SOC_SINGLE_TLV("LINEOUT3 Volume", TABLA_A_RX_LINE_3_GAIN, 0, 12, 1,
940 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700941 SOC_SINGLE_TLV("LINEOUT4 Volume", TABLA_A_RX_LINE_4_GAIN, 0, 12, 1,
942 line_gain),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700943 SOC_SINGLE_TLV("LINEOUT5 Volume", TABLA_A_RX_LINE_5_GAIN, 0, 12, 1,
944 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700945
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700946 SOC_SINGLE_TLV("HPHL Volume", TABLA_A_RX_HPH_L_GAIN, 0, 12, 1,
947 line_gain),
948 SOC_SINGLE_TLV("HPHR Volume", TABLA_A_RX_HPH_R_GAIN, 0, 12, 1,
949 line_gain),
950
Bradley Rubin410383f2011-07-22 13:44:23 -0700951 SOC_SINGLE_S8_TLV("RX1 Digital Volume", TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
952 -84, 40, digital_gain),
953 SOC_SINGLE_S8_TLV("RX2 Digital Volume", TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
954 -84, 40, digital_gain),
955 SOC_SINGLE_S8_TLV("RX3 Digital Volume", TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
956 -84, 40, digital_gain),
957 SOC_SINGLE_S8_TLV("RX4 Digital Volume", TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
958 -84, 40, digital_gain),
959 SOC_SINGLE_S8_TLV("RX5 Digital Volume", TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
960 -84, 40, digital_gain),
961 SOC_SINGLE_S8_TLV("RX6 Digital Volume", TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
962 -84, 40, digital_gain),
Neema Shettyd3a89262012-02-16 10:23:50 -0800963 SOC_SINGLE_S8_TLV("RX7 Digital Volume", TABLA_A_CDC_RX7_VOL_CTL_B2_CTL,
964 -84, 40, digital_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700965
Bradley Rubin410383f2011-07-22 13:44:23 -0700966 SOC_SINGLE_S8_TLV("DEC1 Volume", TABLA_A_CDC_TX1_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700967 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700968 SOC_SINGLE_S8_TLV("DEC2 Volume", TABLA_A_CDC_TX2_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700969 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700970 SOC_SINGLE_S8_TLV("DEC3 Volume", TABLA_A_CDC_TX3_VOL_CTL_GAIN, -84, 40,
971 digital_gain),
972 SOC_SINGLE_S8_TLV("DEC4 Volume", TABLA_A_CDC_TX4_VOL_CTL_GAIN, -84, 40,
973 digital_gain),
974 SOC_SINGLE_S8_TLV("DEC5 Volume", TABLA_A_CDC_TX5_VOL_CTL_GAIN, -84, 40,
975 digital_gain),
976 SOC_SINGLE_S8_TLV("DEC6 Volume", TABLA_A_CDC_TX6_VOL_CTL_GAIN, -84, 40,
977 digital_gain),
978 SOC_SINGLE_S8_TLV("DEC7 Volume", TABLA_A_CDC_TX7_VOL_CTL_GAIN, -84, 40,
979 digital_gain),
980 SOC_SINGLE_S8_TLV("DEC8 Volume", TABLA_A_CDC_TX8_VOL_CTL_GAIN, -84, 40,
981 digital_gain),
982 SOC_SINGLE_S8_TLV("DEC9 Volume", TABLA_A_CDC_TX9_VOL_CTL_GAIN, -84, 40,
983 digital_gain),
984 SOC_SINGLE_S8_TLV("DEC10 Volume", TABLA_A_CDC_TX10_VOL_CTL_GAIN, -84,
985 40, digital_gain),
Patrick Lai29006372011-09-28 17:57:42 -0700986 SOC_SINGLE_S8_TLV("IIR1 INP1 Volume", TABLA_A_CDC_IIR1_GAIN_B1_CTL, -84,
987 40, digital_gain),
988 SOC_SINGLE_S8_TLV("IIR1 INP2 Volume", TABLA_A_CDC_IIR1_GAIN_B2_CTL, -84,
989 40, digital_gain),
990 SOC_SINGLE_S8_TLV("IIR1 INP3 Volume", TABLA_A_CDC_IIR1_GAIN_B3_CTL, -84,
991 40, digital_gain),
992 SOC_SINGLE_S8_TLV("IIR1 INP4 Volume", TABLA_A_CDC_IIR1_GAIN_B4_CTL, -84,
993 40, digital_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700994 SOC_SINGLE_TLV("ADC1 Volume", TABLA_A_TX_1_2_EN, 5, 3, 0, analog_gain),
995 SOC_SINGLE_TLV("ADC2 Volume", TABLA_A_TX_1_2_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700996 SOC_SINGLE_TLV("ADC3 Volume", TABLA_A_TX_3_4_EN, 5, 3, 0, analog_gain),
997 SOC_SINGLE_TLV("ADC4 Volume", TABLA_A_TX_3_4_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700998 SOC_SINGLE_TLV("ADC5 Volume", TABLA_A_TX_5_6_EN, 5, 3, 0, analog_gain),
999 SOC_SINGLE_TLV("ADC6 Volume", TABLA_A_TX_5_6_EN, 1, 3, 0, analog_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001000
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001001 SOC_SINGLE_TLV("AUX_PGA_LEFT Volume", TABLA_A_AUX_L_GAIN, 0, 39, 0,
1002 aux_pga_gain),
1003 SOC_SINGLE_TLV("AUX_PGA_RIGHT Volume", TABLA_A_AUX_R_GAIN, 0, 39, 0,
1004 aux_pga_gain),
1005
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001006 SOC_SINGLE("MICBIAS1 CAPLESS Switch", TABLA_A_MICB_1_CTL, 4, 1, 1),
Santosh Mardi680b41e2011-11-22 16:51:16 -08001007 SOC_SINGLE("MICBIAS2 CAPLESS Switch", TABLA_A_MICB_2_CTL, 4, 1, 1),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001008 SOC_SINGLE("MICBIAS3 CAPLESS Switch", TABLA_A_MICB_3_CTL, 4, 1, 1),
Bradley Rubina7096d02011-08-03 18:29:02 -07001009
1010 SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 0, 100, tabla_get_anc_slot,
1011 tabla_put_anc_slot),
Santosh Mardi024010f2011-10-18 06:27:21 +05301012 SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
1013 SOC_ENUM("TX2 HPF cut off", cf_dec2_enum),
1014 SOC_ENUM("TX3 HPF cut off", cf_dec3_enum),
1015 SOC_ENUM("TX4 HPF cut off", cf_dec4_enum),
1016 SOC_ENUM("TX5 HPF cut off", cf_dec5_enum),
1017 SOC_ENUM("TX6 HPF cut off", cf_dec6_enum),
1018 SOC_ENUM("TX7 HPF cut off", cf_dec7_enum),
1019 SOC_ENUM("TX8 HPF cut off", cf_dec8_enum),
1020 SOC_ENUM("TX9 HPF cut off", cf_dec9_enum),
1021 SOC_ENUM("TX10 HPF cut off", cf_dec10_enum),
1022
1023 SOC_SINGLE("TX1 HPF Switch", TABLA_A_CDC_TX1_MUX_CTL, 3, 1, 0),
1024 SOC_SINGLE("TX2 HPF Switch", TABLA_A_CDC_TX2_MUX_CTL, 3, 1, 0),
1025 SOC_SINGLE("TX3 HPF Switch", TABLA_A_CDC_TX3_MUX_CTL, 3, 1, 0),
1026 SOC_SINGLE("TX4 HPF Switch", TABLA_A_CDC_TX4_MUX_CTL, 3, 1, 0),
1027 SOC_SINGLE("TX5 HPF Switch", TABLA_A_CDC_TX5_MUX_CTL, 3, 1, 0),
1028 SOC_SINGLE("TX6 HPF Switch", TABLA_A_CDC_TX6_MUX_CTL, 3, 1, 0),
1029 SOC_SINGLE("TX7 HPF Switch", TABLA_A_CDC_TX7_MUX_CTL, 3, 1, 0),
1030 SOC_SINGLE("TX8 HPF Switch", TABLA_A_CDC_TX8_MUX_CTL, 3, 1, 0),
1031 SOC_SINGLE("TX9 HPF Switch", TABLA_A_CDC_TX9_MUX_CTL, 3, 1, 0),
1032 SOC_SINGLE("TX10 HPF Switch", TABLA_A_CDC_TX10_MUX_CTL, 3, 1, 0),
1033
1034 SOC_SINGLE("RX1 HPF Switch", TABLA_A_CDC_RX1_B5_CTL, 2, 1, 0),
1035 SOC_SINGLE("RX2 HPF Switch", TABLA_A_CDC_RX2_B5_CTL, 2, 1, 0),
1036 SOC_SINGLE("RX3 HPF Switch", TABLA_A_CDC_RX3_B5_CTL, 2, 1, 0),
1037 SOC_SINGLE("RX4 HPF Switch", TABLA_A_CDC_RX4_B5_CTL, 2, 1, 0),
1038 SOC_SINGLE("RX5 HPF Switch", TABLA_A_CDC_RX5_B5_CTL, 2, 1, 0),
1039 SOC_SINGLE("RX6 HPF Switch", TABLA_A_CDC_RX6_B5_CTL, 2, 1, 0),
1040 SOC_SINGLE("RX7 HPF Switch", TABLA_A_CDC_RX7_B5_CTL, 2, 1, 0),
1041
1042 SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
1043 SOC_ENUM("RX2 HPF cut off", cf_rxmix2_enum),
1044 SOC_ENUM("RX3 HPF cut off", cf_rxmix3_enum),
1045 SOC_ENUM("RX4 HPF cut off", cf_rxmix4_enum),
1046 SOC_ENUM("RX5 HPF cut off", cf_rxmix5_enum),
1047 SOC_ENUM("RX6 HPF cut off", cf_rxmix6_enum),
1048 SOC_ENUM("RX7 HPF cut off", cf_rxmix7_enum),
Ben Romberger1f045a72011-11-04 10:14:57 -07001049
1050 SOC_SINGLE_EXT("IIR1 Enable Band1", IIR1, BAND1, 1, 0,
1051 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1052 SOC_SINGLE_EXT("IIR1 Enable Band2", IIR1, BAND2, 1, 0,
1053 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1054 SOC_SINGLE_EXT("IIR1 Enable Band3", IIR1, BAND3, 1, 0,
1055 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1056 SOC_SINGLE_EXT("IIR1 Enable Band4", IIR1, BAND4, 1, 0,
1057 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1058 SOC_SINGLE_EXT("IIR1 Enable Band5", IIR1, BAND5, 1, 0,
1059 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1060 SOC_SINGLE_EXT("IIR2 Enable Band1", IIR2, BAND1, 1, 0,
1061 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1062 SOC_SINGLE_EXT("IIR2 Enable Band2", IIR2, BAND2, 1, 0,
1063 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1064 SOC_SINGLE_EXT("IIR2 Enable Band3", IIR2, BAND3, 1, 0,
1065 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1066 SOC_SINGLE_EXT("IIR2 Enable Band4", IIR2, BAND4, 1, 0,
1067 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1068 SOC_SINGLE_EXT("IIR2 Enable Band5", IIR2, BAND5, 1, 0,
1069 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1070
1071 SOC_SINGLE_MULTI_EXT("IIR1 Band1", IIR1, BAND1, 255, 0, 5,
1072 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1073 SOC_SINGLE_MULTI_EXT("IIR1 Band2", IIR1, BAND2, 255, 0, 5,
1074 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1075 SOC_SINGLE_MULTI_EXT("IIR1 Band3", IIR1, BAND3, 255, 0, 5,
1076 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1077 SOC_SINGLE_MULTI_EXT("IIR1 Band4", IIR1, BAND4, 255, 0, 5,
1078 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1079 SOC_SINGLE_MULTI_EXT("IIR1 Band5", IIR1, BAND5, 255, 0, 5,
1080 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1081 SOC_SINGLE_MULTI_EXT("IIR2 Band1", IIR2, BAND1, 255, 0, 5,
1082 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1083 SOC_SINGLE_MULTI_EXT("IIR2 Band2", IIR2, BAND2, 255, 0, 5,
1084 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1085 SOC_SINGLE_MULTI_EXT("IIR2 Band3", IIR2, BAND3, 255, 0, 5,
1086 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1087 SOC_SINGLE_MULTI_EXT("IIR2 Band4", IIR2, BAND4, 255, 0, 5,
1088 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1089 SOC_SINGLE_MULTI_EXT("IIR2 Band5", IIR2, BAND5, 255, 0, 5,
1090 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
Kuirong Wang0f8ade32012-02-27 16:29:45 -08001091 SOC_SINGLE_EXT("COMP1 Switch", SND_SOC_NOPM, 1, COMPANDER_1, 0,
1092 tabla_get_compander, tabla_set_compander),
1093 SOC_SINGLE_EXT("COMP2 Switch", SND_SOC_NOPM, 0, COMPANDER_2, 0,
1094 tabla_get_compander, tabla_set_compander),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001095};
1096
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001097static const struct snd_kcontrol_new tabla_1_x_snd_controls[] = {
1098 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_1_A_MICB_4_CTL, 4, 1, 1),
1099};
1100
1101static const struct snd_kcontrol_new tabla_2_higher_snd_controls[] = {
1102 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_2_A_MICB_4_CTL, 4, 1, 1),
1103};
1104
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001105static const char *rx_mix1_text[] = {
1106 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2", "RX1", "RX2", "RX3", "RX4",
1107 "RX5", "RX6", "RX7"
1108};
1109
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001110static const char *rx_mix2_text[] = {
1111 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2"
1112};
1113
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001114static const char *rx_dsm_text[] = {
1115 "CIC_OUT", "DSM_INV"
1116};
1117
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001118static const char *sb_tx1_mux_text[] = {
1119 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1120 "DEC1"
1121};
1122
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001123static const char *sb_tx2_mux_text[] = {
1124 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1125 "DEC2"
1126};
1127
1128static const char *sb_tx3_mux_text[] = {
1129 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1130 "DEC3"
1131};
1132
1133static const char *sb_tx4_mux_text[] = {
1134 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1135 "DEC4"
1136};
1137
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001138static const char *sb_tx5_mux_text[] = {
1139 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1140 "DEC5"
1141};
1142
1143static const char *sb_tx6_mux_text[] = {
1144 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1145 "DEC6"
1146};
1147
1148static const char const *sb_tx7_to_tx10_mux_text[] = {
1149 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1150 "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
1151 "DEC9", "DEC10"
1152};
1153
1154static const char *dec1_mux_text[] = {
1155 "ZERO", "DMIC1", "ADC6",
1156};
1157
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001158static const char *dec2_mux_text[] = {
1159 "ZERO", "DMIC2", "ADC5",
1160};
1161
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001162static const char *dec3_mux_text[] = {
1163 "ZERO", "DMIC3", "ADC4",
1164};
1165
1166static const char *dec4_mux_text[] = {
1167 "ZERO", "DMIC4", "ADC3",
1168};
1169
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001170static const char *dec5_mux_text[] = {
1171 "ZERO", "DMIC5", "ADC2",
1172};
1173
1174static const char *dec6_mux_text[] = {
1175 "ZERO", "DMIC6", "ADC1",
1176};
1177
1178static const char const *dec7_mux_text[] = {
1179 "ZERO", "DMIC1", "DMIC6", "ADC1", "ADC6", "ANC1_FB", "ANC2_FB",
1180};
1181
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001182static const char *dec8_mux_text[] = {
1183 "ZERO", "DMIC2", "DMIC5", "ADC2", "ADC5",
1184};
1185
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001186static const char *dec9_mux_text[] = {
1187 "ZERO", "DMIC4", "DMIC5", "ADC2", "ADC3", "ADCMB", "ANC1_FB", "ANC2_FB",
1188};
1189
1190static const char *dec10_mux_text[] = {
1191 "ZERO", "DMIC3", "DMIC6", "ADC1", "ADC4", "ADCMB", "ANC1_FB", "ANC2_FB",
1192};
1193
Bradley Rubin229c6a52011-07-12 16:18:48 -07001194static const char const *anc_mux_text[] = {
1195 "ZERO", "ADC1", "ADC2", "ADC3", "ADC4", "ADC5", "ADC6", "ADC_MB",
1196 "RSVD_1", "DMIC1", "DMIC2", "DMIC3", "DMIC4", "DMIC5", "DMIC6"
1197};
1198
1199static const char const *anc1_fb_mux_text[] = {
1200 "ZERO", "EAR_HPH_L", "EAR_LINE_1",
1201};
1202
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001203static const char *iir1_inp1_text[] = {
1204 "ZERO", "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
1205 "DEC9", "DEC10", "RX1", "RX2", "RX3", "RX4", "RX5", "RX6", "RX7"
1206};
1207
1208static const struct soc_enum rx_mix1_inp1_chain_enum =
1209 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 0, 12, rx_mix1_text);
1210
Bradley Rubin229c6a52011-07-12 16:18:48 -07001211static const struct soc_enum rx_mix1_inp2_chain_enum =
1212 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 4, 12, rx_mix1_text);
1213
Kiran Kandia9fffe92012-05-20 23:42:30 -07001214static const struct soc_enum rx_mix1_inp3_chain_enum =
1215 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B2_CTL, 0, 12, rx_mix1_text);
1216
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001217static const struct soc_enum rx2_mix1_inp1_chain_enum =
1218 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 0, 12, rx_mix1_text);
1219
Bradley Rubin229c6a52011-07-12 16:18:48 -07001220static const struct soc_enum rx2_mix1_inp2_chain_enum =
1221 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 4, 12, rx_mix1_text);
1222
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001223static const struct soc_enum rx3_mix1_inp1_chain_enum =
1224 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 0, 12, rx_mix1_text);
1225
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001226static const struct soc_enum rx3_mix1_inp2_chain_enum =
1227 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 4, 12, rx_mix1_text);
1228
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001229static const struct soc_enum rx4_mix1_inp1_chain_enum =
1230 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 0, 12, rx_mix1_text);
1231
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001232static const struct soc_enum rx4_mix1_inp2_chain_enum =
1233 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 4, 12, rx_mix1_text);
1234
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001235static const struct soc_enum rx5_mix1_inp1_chain_enum =
1236 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 0, 12, rx_mix1_text);
1237
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001238static const struct soc_enum rx5_mix1_inp2_chain_enum =
1239 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 4, 12, rx_mix1_text);
1240
1241static const struct soc_enum rx6_mix1_inp1_chain_enum =
1242 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 0, 12, rx_mix1_text);
1243
1244static const struct soc_enum rx6_mix1_inp2_chain_enum =
1245 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 4, 12, rx_mix1_text);
1246
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001247static const struct soc_enum rx7_mix1_inp1_chain_enum =
1248 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 0, 12, rx_mix1_text);
1249
1250static const struct soc_enum rx7_mix1_inp2_chain_enum =
1251 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 4, 12, rx_mix1_text);
1252
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001253static const struct soc_enum rx1_mix2_inp1_chain_enum =
1254 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B3_CTL, 0, 5, rx_mix2_text);
1255
1256static const struct soc_enum rx1_mix2_inp2_chain_enum =
1257 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B3_CTL, 3, 5, rx_mix2_text);
1258
1259static const struct soc_enum rx2_mix2_inp1_chain_enum =
1260 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B3_CTL, 0, 5, rx_mix2_text);
1261
1262static const struct soc_enum rx2_mix2_inp2_chain_enum =
1263 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B3_CTL, 3, 5, rx_mix2_text);
1264
1265static const struct soc_enum rx3_mix2_inp1_chain_enum =
1266 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B3_CTL, 0, 5, rx_mix2_text);
1267
1268static const struct soc_enum rx3_mix2_inp2_chain_enum =
1269 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B3_CTL, 3, 5, rx_mix2_text);
1270
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001271static const struct soc_enum rx4_dsm_enum =
1272 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B6_CTL, 4, 2, rx_dsm_text);
1273
1274static const struct soc_enum rx6_dsm_enum =
1275 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B6_CTL, 4, 2, rx_dsm_text);
1276
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001277static const struct soc_enum sb_tx1_mux_enum =
1278 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0, 9, sb_tx1_mux_text);
1279
1280static const struct soc_enum sb_tx2_mux_enum =
1281 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0, 9, sb_tx2_mux_text);
1282
1283static const struct soc_enum sb_tx3_mux_enum =
1284 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0, 9, sb_tx3_mux_text);
1285
1286static const struct soc_enum sb_tx4_mux_enum =
1287 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0, 9, sb_tx4_mux_text);
1288
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001289static const struct soc_enum sb_tx5_mux_enum =
1290 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0, 9, sb_tx5_mux_text);
1291
1292static const struct soc_enum sb_tx6_mux_enum =
1293 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0, 9, sb_tx6_mux_text);
1294
1295static const struct soc_enum sb_tx7_mux_enum =
1296 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0, 18,
1297 sb_tx7_to_tx10_mux_text);
1298
1299static const struct soc_enum sb_tx8_mux_enum =
1300 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0, 18,
1301 sb_tx7_to_tx10_mux_text);
1302
Kiran Kandi3426e512011-09-13 22:50:10 -07001303static const struct soc_enum sb_tx9_mux_enum =
1304 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0, 18,
1305 sb_tx7_to_tx10_mux_text);
1306
1307static const struct soc_enum sb_tx10_mux_enum =
1308 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0, 18,
1309 sb_tx7_to_tx10_mux_text);
1310
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001311static const struct soc_enum dec1_mux_enum =
1312 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 0, 3, dec1_mux_text);
1313
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001314static const struct soc_enum dec2_mux_enum =
1315 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 2, 3, dec2_mux_text);
1316
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001317static const struct soc_enum dec3_mux_enum =
1318 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 4, 3, dec3_mux_text);
1319
1320static const struct soc_enum dec4_mux_enum =
1321 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 6, 3, dec4_mux_text);
1322
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001323static const struct soc_enum dec5_mux_enum =
1324 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 0, 3, dec5_mux_text);
1325
1326static const struct soc_enum dec6_mux_enum =
1327 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 2, 3, dec6_mux_text);
1328
1329static const struct soc_enum dec7_mux_enum =
1330 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 4, 7, dec7_mux_text);
1331
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001332static const struct soc_enum dec8_mux_enum =
1333 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 0, 7, dec8_mux_text);
1334
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001335static const struct soc_enum dec9_mux_enum =
1336 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 3, 8, dec9_mux_text);
1337
1338static const struct soc_enum dec10_mux_enum =
1339 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B4_CTL, 0, 8, dec10_mux_text);
1340
Bradley Rubin229c6a52011-07-12 16:18:48 -07001341static const struct soc_enum anc1_mux_enum =
1342 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 0, 16, anc_mux_text);
1343
1344static const struct soc_enum anc2_mux_enum =
1345 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 4, 16, anc_mux_text);
1346
1347static const struct soc_enum anc1_fb_mux_enum =
1348 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B2_CTL, 0, 3, anc1_fb_mux_text);
1349
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001350static const struct soc_enum iir1_inp1_mux_enum =
1351 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_EQ1_B1_CTL, 0, 18, iir1_inp1_text);
1352
1353static const struct snd_kcontrol_new rx_mix1_inp1_mux =
1354 SOC_DAPM_ENUM("RX1 MIX1 INP1 Mux", rx_mix1_inp1_chain_enum);
1355
Bradley Rubin229c6a52011-07-12 16:18:48 -07001356static const struct snd_kcontrol_new rx_mix1_inp2_mux =
1357 SOC_DAPM_ENUM("RX1 MIX1 INP2 Mux", rx_mix1_inp2_chain_enum);
1358
Kiran Kandia9fffe92012-05-20 23:42:30 -07001359static const struct snd_kcontrol_new rx_mix1_inp3_mux =
1360 SOC_DAPM_ENUM("RX1 MIX1 INP3 Mux", rx_mix1_inp3_chain_enum);
1361
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001362static const struct snd_kcontrol_new rx2_mix1_inp1_mux =
1363 SOC_DAPM_ENUM("RX2 MIX1 INP1 Mux", rx2_mix1_inp1_chain_enum);
1364
Bradley Rubin229c6a52011-07-12 16:18:48 -07001365static const struct snd_kcontrol_new rx2_mix1_inp2_mux =
1366 SOC_DAPM_ENUM("RX2 MIX1 INP2 Mux", rx2_mix1_inp2_chain_enum);
1367
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001368static const struct snd_kcontrol_new rx3_mix1_inp1_mux =
1369 SOC_DAPM_ENUM("RX3 MIX1 INP1 Mux", rx3_mix1_inp1_chain_enum);
1370
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001371static const struct snd_kcontrol_new rx3_mix1_inp2_mux =
1372 SOC_DAPM_ENUM("RX3 MIX1 INP2 Mux", rx3_mix1_inp2_chain_enum);
1373
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001374static const struct snd_kcontrol_new rx4_mix1_inp1_mux =
1375 SOC_DAPM_ENUM("RX4 MIX1 INP1 Mux", rx4_mix1_inp1_chain_enum);
1376
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001377static const struct snd_kcontrol_new rx4_mix1_inp2_mux =
1378 SOC_DAPM_ENUM("RX4 MIX1 INP2 Mux", rx4_mix1_inp2_chain_enum);
1379
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001380static const struct snd_kcontrol_new rx5_mix1_inp1_mux =
1381 SOC_DAPM_ENUM("RX5 MIX1 INP1 Mux", rx5_mix1_inp1_chain_enum);
1382
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001383static const struct snd_kcontrol_new rx5_mix1_inp2_mux =
1384 SOC_DAPM_ENUM("RX5 MIX1 INP2 Mux", rx5_mix1_inp2_chain_enum);
1385
1386static const struct snd_kcontrol_new rx6_mix1_inp1_mux =
1387 SOC_DAPM_ENUM("RX6 MIX1 INP1 Mux", rx6_mix1_inp1_chain_enum);
1388
1389static const struct snd_kcontrol_new rx6_mix1_inp2_mux =
1390 SOC_DAPM_ENUM("RX6 MIX1 INP2 Mux", rx6_mix1_inp2_chain_enum);
1391
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001392static const struct snd_kcontrol_new rx7_mix1_inp1_mux =
1393 SOC_DAPM_ENUM("RX7 MIX1 INP1 Mux", rx7_mix1_inp1_chain_enum);
1394
1395static const struct snd_kcontrol_new rx7_mix1_inp2_mux =
1396 SOC_DAPM_ENUM("RX7 MIX1 INP2 Mux", rx7_mix1_inp2_chain_enum);
1397
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001398static const struct snd_kcontrol_new rx1_mix2_inp1_mux =
1399 SOC_DAPM_ENUM("RX1 MIX2 INP1 Mux", rx1_mix2_inp1_chain_enum);
1400
1401static const struct snd_kcontrol_new rx1_mix2_inp2_mux =
1402 SOC_DAPM_ENUM("RX1 MIX2 INP2 Mux", rx1_mix2_inp2_chain_enum);
1403
1404static const struct snd_kcontrol_new rx2_mix2_inp1_mux =
1405 SOC_DAPM_ENUM("RX2 MIX2 INP1 Mux", rx2_mix2_inp1_chain_enum);
1406
1407static const struct snd_kcontrol_new rx2_mix2_inp2_mux =
1408 SOC_DAPM_ENUM("RX2 MIX2 INP2 Mux", rx2_mix2_inp2_chain_enum);
1409
1410static const struct snd_kcontrol_new rx3_mix2_inp1_mux =
1411 SOC_DAPM_ENUM("RX3 MIX2 INP1 Mux", rx3_mix2_inp1_chain_enum);
1412
1413static const struct snd_kcontrol_new rx3_mix2_inp2_mux =
1414 SOC_DAPM_ENUM("RX3 MIX2 INP2 Mux", rx3_mix2_inp2_chain_enum);
1415
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001416static const struct snd_kcontrol_new rx4_dsm_mux =
1417 SOC_DAPM_ENUM("RX4 DSM MUX Mux", rx4_dsm_enum);
1418
1419static const struct snd_kcontrol_new rx6_dsm_mux =
1420 SOC_DAPM_ENUM("RX6 DSM MUX Mux", rx6_dsm_enum);
1421
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001422static const struct snd_kcontrol_new sb_tx1_mux =
1423 SOC_DAPM_ENUM("SLIM TX1 MUX Mux", sb_tx1_mux_enum);
1424
1425static const struct snd_kcontrol_new sb_tx2_mux =
1426 SOC_DAPM_ENUM("SLIM TX2 MUX Mux", sb_tx2_mux_enum);
1427
1428static const struct snd_kcontrol_new sb_tx3_mux =
1429 SOC_DAPM_ENUM("SLIM TX3 MUX Mux", sb_tx3_mux_enum);
1430
1431static const struct snd_kcontrol_new sb_tx4_mux =
1432 SOC_DAPM_ENUM("SLIM TX4 MUX Mux", sb_tx4_mux_enum);
1433
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001434static const struct snd_kcontrol_new sb_tx5_mux =
1435 SOC_DAPM_ENUM("SLIM TX5 MUX Mux", sb_tx5_mux_enum);
1436
1437static const struct snd_kcontrol_new sb_tx6_mux =
1438 SOC_DAPM_ENUM("SLIM TX6 MUX Mux", sb_tx6_mux_enum);
1439
1440static const struct snd_kcontrol_new sb_tx7_mux =
1441 SOC_DAPM_ENUM("SLIM TX7 MUX Mux", sb_tx7_mux_enum);
1442
1443static const struct snd_kcontrol_new sb_tx8_mux =
1444 SOC_DAPM_ENUM("SLIM TX8 MUX Mux", sb_tx8_mux_enum);
1445
Kiran Kandi3426e512011-09-13 22:50:10 -07001446static const struct snd_kcontrol_new sb_tx9_mux =
1447 SOC_DAPM_ENUM("SLIM TX9 MUX Mux", sb_tx9_mux_enum);
1448
1449static const struct snd_kcontrol_new sb_tx10_mux =
1450 SOC_DAPM_ENUM("SLIM TX10 MUX Mux", sb_tx10_mux_enum);
1451
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001452
Kiran Kandi59a96b12012-01-16 02:20:03 -08001453static int wcd9310_put_dec_enum(struct snd_kcontrol *kcontrol,
1454 struct snd_ctl_elem_value *ucontrol)
1455{
1456 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
1457 struct snd_soc_dapm_widget *w = wlist->widgets[0];
1458 struct snd_soc_codec *codec = w->codec;
1459 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1460 unsigned int dec_mux, decimator;
1461 char *dec_name = NULL;
1462 char *widget_name = NULL;
1463 char *temp;
1464 u16 tx_mux_ctl_reg;
1465 u8 adc_dmic_sel = 0x0;
1466 int ret = 0;
1467
1468 if (ucontrol->value.enumerated.item[0] > e->max - 1)
1469 return -EINVAL;
1470
1471 dec_mux = ucontrol->value.enumerated.item[0];
1472
1473 widget_name = kstrndup(w->name, 15, GFP_KERNEL);
1474 if (!widget_name)
1475 return -ENOMEM;
1476 temp = widget_name;
1477
1478 dec_name = strsep(&widget_name, " ");
1479 widget_name = temp;
1480 if (!dec_name) {
1481 pr_err("%s: Invalid decimator = %s\n", __func__, w->name);
1482 ret = -EINVAL;
1483 goto out;
1484 }
1485
1486 ret = kstrtouint(strpbrk(dec_name, "123456789"), 10, &decimator);
1487 if (ret < 0) {
1488 pr_err("%s: Invalid decimator = %s\n", __func__, dec_name);
1489 ret = -EINVAL;
1490 goto out;
1491 }
1492
1493 dev_dbg(w->dapm->dev, "%s(): widget = %s dec_name = %s decimator = %u"
1494 " dec_mux = %u\n", __func__, w->name, dec_name, decimator,
1495 dec_mux);
1496
1497
1498 switch (decimator) {
1499 case 1:
1500 case 2:
1501 case 3:
1502 case 4:
1503 case 5:
1504 case 6:
1505 if (dec_mux == 1)
1506 adc_dmic_sel = 0x1;
1507 else
1508 adc_dmic_sel = 0x0;
1509 break;
1510 case 7:
1511 case 8:
1512 case 9:
1513 case 10:
1514 if ((dec_mux == 1) || (dec_mux == 2))
1515 adc_dmic_sel = 0x1;
1516 else
1517 adc_dmic_sel = 0x0;
1518 break;
1519 default:
1520 pr_err("%s: Invalid Decimator = %u\n", __func__, decimator);
1521 ret = -EINVAL;
1522 goto out;
1523 }
1524
1525 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (decimator - 1);
1526
1527 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x1, adc_dmic_sel);
1528
1529 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
1530
1531out:
1532 kfree(widget_name);
1533 return ret;
1534}
1535
1536#define WCD9310_DEC_ENUM(xname, xenum) \
1537{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
1538 .info = snd_soc_info_enum_double, \
1539 .get = snd_soc_dapm_get_enum_double, \
1540 .put = wcd9310_put_dec_enum, \
1541 .private_value = (unsigned long)&xenum }
1542
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001543static const struct snd_kcontrol_new dec1_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001544 WCD9310_DEC_ENUM("DEC1 MUX Mux", dec1_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001545
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001546static const struct snd_kcontrol_new dec2_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001547 WCD9310_DEC_ENUM("DEC2 MUX Mux", dec2_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001548
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001549static const struct snd_kcontrol_new dec3_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001550 WCD9310_DEC_ENUM("DEC3 MUX Mux", dec3_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001551
1552static const struct snd_kcontrol_new dec4_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001553 WCD9310_DEC_ENUM("DEC4 MUX Mux", dec4_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001554
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001555static const struct snd_kcontrol_new dec5_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001556 WCD9310_DEC_ENUM("DEC5 MUX Mux", dec5_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001557
1558static const struct snd_kcontrol_new dec6_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001559 WCD9310_DEC_ENUM("DEC6 MUX Mux", dec6_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001560
1561static const struct snd_kcontrol_new dec7_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001562 WCD9310_DEC_ENUM("DEC7 MUX Mux", dec7_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001563
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001564static const struct snd_kcontrol_new dec8_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001565 WCD9310_DEC_ENUM("DEC8 MUX Mux", dec8_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001566
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001567static const struct snd_kcontrol_new dec9_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001568 WCD9310_DEC_ENUM("DEC9 MUX Mux", dec9_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001569
1570static const struct snd_kcontrol_new dec10_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001571 WCD9310_DEC_ENUM("DEC10 MUX Mux", dec10_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001572
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001573static const struct snd_kcontrol_new iir1_inp1_mux =
1574 SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);
1575
Kiran Kandi59a96b12012-01-16 02:20:03 -08001576static const struct snd_kcontrol_new anc1_mux =
1577 SOC_DAPM_ENUM("ANC1 MUX Mux", anc1_mux_enum);
1578
Bradley Rubin229c6a52011-07-12 16:18:48 -07001579static const struct snd_kcontrol_new anc2_mux =
1580 SOC_DAPM_ENUM("ANC2 MUX Mux", anc2_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001581
Bradley Rubin229c6a52011-07-12 16:18:48 -07001582static const struct snd_kcontrol_new anc1_fb_mux =
1583 SOC_DAPM_ENUM("ANC1 FB MUX Mux", anc1_fb_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001584
Bradley Rubin229c6a52011-07-12 16:18:48 -07001585static const struct snd_kcontrol_new dac1_switch[] = {
1586 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_EAR_EN, 5, 1, 0)
1587};
1588static const struct snd_kcontrol_new hphl_switch[] = {
1589 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_HPH_L_DAC_CTL, 6, 1, 0)
1590};
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001591
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001592static const struct snd_kcontrol_new hphl_pa_mix[] = {
1593 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1594 7, 1, 0),
1595 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1596 7, 1, 0),
1597 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1598 TABLA_A_AUX_L_PA_CONN_INV, 7, 1, 0),
1599 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1600 TABLA_A_AUX_R_PA_CONN_INV, 7, 1, 0),
1601};
1602
1603static const struct snd_kcontrol_new hphr_pa_mix[] = {
1604 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1605 6, 1, 0),
1606 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1607 6, 1, 0),
1608 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1609 TABLA_A_AUX_L_PA_CONN_INV, 6, 1, 0),
1610 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1611 TABLA_A_AUX_R_PA_CONN_INV, 6, 1, 0),
1612};
1613
1614static const struct snd_kcontrol_new lineout1_pa_mix[] = {
1615 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1616 5, 1, 0),
1617 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1618 5, 1, 0),
1619 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1620 TABLA_A_AUX_L_PA_CONN_INV, 5, 1, 0),
1621 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1622 TABLA_A_AUX_R_PA_CONN_INV, 5, 1, 0),
1623};
1624
1625static const struct snd_kcontrol_new lineout2_pa_mix[] = {
1626 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1627 4, 1, 0),
1628 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1629 4, 1, 0),
1630 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1631 TABLA_A_AUX_L_PA_CONN_INV, 4, 1, 0),
1632 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1633 TABLA_A_AUX_R_PA_CONN_INV, 4, 1, 0),
1634};
1635
1636static const struct snd_kcontrol_new lineout3_pa_mix[] = {
1637 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1638 3, 1, 0),
1639 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1640 3, 1, 0),
1641 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1642 TABLA_A_AUX_L_PA_CONN_INV, 3, 1, 0),
1643 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1644 TABLA_A_AUX_R_PA_CONN_INV, 3, 1, 0),
1645};
1646
1647static const struct snd_kcontrol_new lineout4_pa_mix[] = {
1648 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1649 2, 1, 0),
1650 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1651 2, 1, 0),
1652 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1653 TABLA_A_AUX_L_PA_CONN_INV, 2, 1, 0),
1654 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1655 TABLA_A_AUX_R_PA_CONN_INV, 2, 1, 0),
1656};
1657
1658static const struct snd_kcontrol_new lineout5_pa_mix[] = {
1659 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1660 1, 1, 0),
1661 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1662 1, 1, 0),
1663 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1664 TABLA_A_AUX_L_PA_CONN_INV, 1, 1, 0),
1665 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1666 TABLA_A_AUX_R_PA_CONN_INV, 1, 1, 0),
1667};
1668
1669static const struct snd_kcontrol_new ear_pa_mix[] = {
1670 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1671 0, 1, 0),
1672 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1673 0, 1, 0),
1674 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1675 TABLA_A_AUX_L_PA_CONN_INV, 0, 1, 0),
1676 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1677 TABLA_A_AUX_R_PA_CONN_INV, 0, 1, 0),
1678};
1679
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001680static const struct snd_kcontrol_new lineout3_ground_switch =
1681 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_3_DAC_CTL, 6, 1, 0);
1682
1683static const struct snd_kcontrol_new lineout4_ground_switch =
1684 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_4_DAC_CTL, 6, 1, 0);
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001685
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001686static void tabla_codec_enable_adc_block(struct snd_soc_codec *codec,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001687 int enable)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001688{
1689 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1690
1691 pr_debug("%s %d\n", __func__, enable);
1692
1693 if (enable) {
1694 tabla->adc_count++;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001695 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x2, 0x2);
1696 } else {
1697 tabla->adc_count--;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001698 if (!tabla->adc_count)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001699 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL,
Joonwoo Park03324832012-03-19 19:36:16 -07001700 0x2, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001701 }
1702}
1703
1704static int tabla_codec_enable_adc(struct snd_soc_dapm_widget *w,
1705 struct snd_kcontrol *kcontrol, int event)
1706{
1707 struct snd_soc_codec *codec = w->codec;
1708 u16 adc_reg;
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001709 u8 init_bit_shift;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001710
1711 pr_debug("%s %d\n", __func__, event);
1712
1713 if (w->reg == TABLA_A_TX_1_2_EN)
1714 adc_reg = TABLA_A_TX_1_2_TEST_CTL;
1715 else if (w->reg == TABLA_A_TX_3_4_EN)
1716 adc_reg = TABLA_A_TX_3_4_TEST_CTL;
1717 else if (w->reg == TABLA_A_TX_5_6_EN)
1718 adc_reg = TABLA_A_TX_5_6_TEST_CTL;
1719 else {
1720 pr_err("%s: Error, invalid adc register\n", __func__);
1721 return -EINVAL;
1722 }
1723
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001724 if (w->shift == 3)
1725 init_bit_shift = 6;
1726 else if (w->shift == 7)
1727 init_bit_shift = 7;
1728 else {
1729 pr_err("%s: Error, invalid init bit postion adc register\n",
1730 __func__);
1731 return -EINVAL;
1732 }
1733
1734
1735
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001736 switch (event) {
1737 case SND_SOC_DAPM_PRE_PMU:
1738 tabla_codec_enable_adc_block(codec, 1);
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001739 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift,
1740 1 << init_bit_shift);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001741 break;
1742 case SND_SOC_DAPM_POST_PMU:
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001743
1744 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift, 0x00);
1745
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001746 break;
1747 case SND_SOC_DAPM_POST_PMD:
1748 tabla_codec_enable_adc_block(codec, 0);
1749 break;
1750 }
1751 return 0;
1752}
1753
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001754static void tabla_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
1755{
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001756 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1757 0x80);
1758 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x04,
1759 0x04);
1760 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
1761 0x01);
1762 usleep_range(1000, 1000);
1763 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1764 0x00);
1765}
1766
1767static void tabla_codec_enable_bandgap(struct snd_soc_codec *codec,
1768 enum tabla_bandgap_type choice)
1769{
1770 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1771
1772 /* TODO lock resources accessed by audio streams and threaded
1773 * interrupt handlers
1774 */
1775
1776 pr_debug("%s, choice is %d, current is %d\n", __func__, choice,
1777 tabla->bandgap_type);
1778
1779 if (tabla->bandgap_type == choice)
1780 return;
1781
1782 if ((tabla->bandgap_type == TABLA_BANDGAP_OFF) &&
1783 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
1784 tabla_codec_enable_audio_mode_bandgap(codec);
1785 } else if (choice == TABLA_BANDGAP_MBHC_MODE) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001786 /* bandgap mode becomes fast,
1787 * mclk should be off or clk buff source souldn't be VBG
1788 * Let's turn off mclk always */
1789 WARN_ON(snd_soc_read(codec, TABLA_A_CLK_BUFF_EN2) & (1 << 2));
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001790 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x2,
1791 0x2);
1792 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1793 0x80);
1794 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x4,
1795 0x4);
1796 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
1797 0x01);
1798 usleep_range(1000, 1000);
1799 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1800 0x00);
1801 } else if ((tabla->bandgap_type == TABLA_BANDGAP_MBHC_MODE) &&
1802 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
Damir Didjusto52900462012-08-16 21:22:29 -07001803 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001804 usleep_range(100, 100);
1805 tabla_codec_enable_audio_mode_bandgap(codec);
1806 } else if (choice == TABLA_BANDGAP_OFF) {
Damir Didjusto52900462012-08-16 21:22:29 -07001807 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001808 } else {
1809 pr_err("%s: Error, Invalid bandgap settings\n", __func__);
1810 }
1811 tabla->bandgap_type = choice;
1812}
1813
1814static void tabla_codec_disable_clock_block(struct snd_soc_codec *codec)
1815{
1816 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1817 pr_debug("%s\n", __func__);
1818 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001819 usleep_range(50, 50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001820 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x02);
1821 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001822 usleep_range(50, 50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001823 tabla->clock_active = false;
1824}
1825
1826static int tabla_codec_mclk_index(const struct tabla_priv *tabla)
1827{
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001828 if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_12288KHZ)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001829 return 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001830 else if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_9600KHZ)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001831 return 1;
1832 else {
1833 BUG_ON(1);
1834 return -EINVAL;
1835 }
1836}
1837
1838static void tabla_enable_rx_bias(struct snd_soc_codec *codec, u32 enable)
1839{
1840 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1841
1842 if (enable) {
1843 tabla->rx_bias_count++;
1844 if (tabla->rx_bias_count == 1)
1845 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1846 0x80, 0x80);
1847 } else {
1848 tabla->rx_bias_count--;
1849 if (!tabla->rx_bias_count)
1850 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1851 0x80, 0x00);
1852 }
1853}
1854
1855static int tabla_codec_enable_config_mode(struct snd_soc_codec *codec,
1856 int enable)
1857{
1858 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1859
1860 pr_debug("%s: enable = %d\n", __func__, enable);
1861 if (enable) {
1862 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x10, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001863 /* bandgap mode to fast */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001864 snd_soc_write(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x17);
1865 usleep_range(5, 5);
1866 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001867 0x80);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001868 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001869 0x80);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001870 usleep_range(10, 10);
1871 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001872 usleep_range(10000, 10000);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001873 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x08);
1874 } else {
1875 snd_soc_update_bits(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x1,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001876 0);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001877 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001878 /* clk source to ext clk and clk buff ref to VBG */
1879 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x0C, 0x04);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001880 }
1881 tabla->config_mode_active = enable ? true : false;
1882
1883 return 0;
1884}
1885
1886static int tabla_codec_enable_clock_block(struct snd_soc_codec *codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001887 int config_mode)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001888{
1889 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1890
1891 pr_debug("%s: config_mode = %d\n", __func__, config_mode);
1892
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001893 /* transit to RCO requires mclk off */
1894 WARN_ON(snd_soc_read(codec, TABLA_A_CLK_BUFF_EN2) & (1 << 2));
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001895 if (config_mode) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001896 /* enable RCO and switch to it */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001897 tabla_codec_enable_config_mode(codec, 1);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001898 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001899 usleep_range(1000, 1000);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001900 } else {
1901 /* switch to MCLK */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001902 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
1903
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001904 if (tabla->mbhc_polling_active) {
1905 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
1906 tabla_codec_enable_config_mode(codec, 0);
1907 }
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001908 }
1909
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001910 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x01, 0x01);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001911 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001912 /* on MCLK */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001913 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x04);
1914 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_MCLK_CTL, 0x01, 0x01);
1915 usleep_range(50, 50);
1916 tabla->clock_active = true;
1917 return 0;
1918}
1919
1920static int tabla_codec_enable_aux_pga(struct snd_soc_dapm_widget *w,
1921 struct snd_kcontrol *kcontrol, int event)
1922{
1923 struct snd_soc_codec *codec = w->codec;
1924 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1925
1926 pr_debug("%s: %d\n", __func__, event);
1927
1928 switch (event) {
1929 case SND_SOC_DAPM_PRE_PMU:
1930 tabla_codec_enable_bandgap(codec,
1931 TABLA_BANDGAP_AUDIO_MODE);
1932 tabla_enable_rx_bias(codec, 1);
1933
1934 snd_soc_update_bits(codec, TABLA_A_AUX_COM_CTL,
1935 0x08, 0x08);
1936 /* Enable Zero Cross detect for AUX PGA channel
1937 * and set the initial AUX PGA gain to NEG_0P0_DB
1938 * to avoid glitches.
1939 */
1940 if (w->reg == TABLA_A_AUX_L_EN) {
1941 snd_soc_update_bits(codec, TABLA_A_AUX_L_EN,
1942 0x20, 0x20);
1943 tabla->aux_l_gain = snd_soc_read(codec,
1944 TABLA_A_AUX_L_GAIN);
1945 snd_soc_write(codec, TABLA_A_AUX_L_GAIN, 0x1F);
1946 } else {
1947 snd_soc_update_bits(codec, TABLA_A_AUX_R_EN,
1948 0x20, 0x20);
1949 tabla->aux_r_gain = snd_soc_read(codec,
1950 TABLA_A_AUX_R_GAIN);
1951 snd_soc_write(codec, TABLA_A_AUX_R_GAIN, 0x1F);
1952 }
1953 if (tabla->aux_pga_cnt++ == 1
1954 && !tabla->mclk_enabled) {
1955 tabla_codec_enable_clock_block(codec, 1);
1956 pr_debug("AUX PGA enabled RC osc\n");
1957 }
1958 break;
1959
1960 case SND_SOC_DAPM_POST_PMU:
1961 if (w->reg == TABLA_A_AUX_L_EN)
1962 snd_soc_write(codec, TABLA_A_AUX_L_GAIN,
1963 tabla->aux_l_gain);
1964 else
1965 snd_soc_write(codec, TABLA_A_AUX_R_GAIN,
1966 tabla->aux_r_gain);
1967 break;
1968
1969 case SND_SOC_DAPM_PRE_PMD:
1970 /* Mute AUX PGA channel in use before disabling AUX PGA */
1971 if (w->reg == TABLA_A_AUX_L_EN) {
1972 tabla->aux_l_gain = snd_soc_read(codec,
1973 TABLA_A_AUX_L_GAIN);
1974 snd_soc_write(codec, TABLA_A_AUX_L_GAIN, 0x1F);
1975 } else {
1976 tabla->aux_r_gain = snd_soc_read(codec,
1977 TABLA_A_AUX_R_GAIN);
1978 snd_soc_write(codec, TABLA_A_AUX_R_GAIN, 0x1F);
1979 }
1980 break;
1981
1982 case SND_SOC_DAPM_POST_PMD:
1983 tabla_enable_rx_bias(codec, 0);
1984
1985 snd_soc_update_bits(codec, TABLA_A_AUX_COM_CTL,
1986 0x08, 0x00);
1987 if (w->reg == TABLA_A_AUX_L_EN) {
1988 snd_soc_write(codec, TABLA_A_AUX_L_GAIN,
1989 tabla->aux_l_gain);
1990 snd_soc_update_bits(codec, TABLA_A_AUX_L_EN,
1991 0x20, 0x00);
1992 } else {
1993 snd_soc_write(codec, TABLA_A_AUX_R_GAIN,
1994 tabla->aux_r_gain);
1995 snd_soc_update_bits(codec, TABLA_A_AUX_R_EN,
1996 0x20, 0x00);
1997 }
1998
1999 if (tabla->aux_pga_cnt-- == 0) {
2000 if (tabla->mbhc_polling_active)
2001 tabla_codec_enable_bandgap(codec,
2002 TABLA_BANDGAP_MBHC_MODE);
2003 else
2004 tabla_codec_enable_bandgap(codec,
2005 TABLA_BANDGAP_OFF);
2006
2007 if (!tabla->mclk_enabled &&
2008 !tabla->mbhc_polling_active) {
2009 tabla_codec_enable_clock_block(codec, 0);
2010 }
2011 }
2012 break;
2013 }
2014 return 0;
2015}
2016
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002017static int tabla_codec_enable_lineout(struct snd_soc_dapm_widget *w,
2018 struct snd_kcontrol *kcontrol, int event)
2019{
2020 struct snd_soc_codec *codec = w->codec;
2021 u16 lineout_gain_reg;
2022
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002023 pr_debug("%s %d %s\n", __func__, event, w->name);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002024
2025 switch (w->shift) {
2026 case 0:
2027 lineout_gain_reg = TABLA_A_RX_LINE_1_GAIN;
2028 break;
2029 case 1:
2030 lineout_gain_reg = TABLA_A_RX_LINE_2_GAIN;
2031 break;
2032 case 2:
2033 lineout_gain_reg = TABLA_A_RX_LINE_3_GAIN;
2034 break;
2035 case 3:
2036 lineout_gain_reg = TABLA_A_RX_LINE_4_GAIN;
2037 break;
2038 case 4:
2039 lineout_gain_reg = TABLA_A_RX_LINE_5_GAIN;
2040 break;
2041 default:
2042 pr_err("%s: Error, incorrect lineout register value\n",
2043 __func__);
2044 return -EINVAL;
2045 }
2046
2047 switch (event) {
2048 case SND_SOC_DAPM_PRE_PMU:
2049 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x40);
2050 break;
2051 case SND_SOC_DAPM_POST_PMU:
SathishKumar Mani74ef8912012-09-11 14:25:46 -07002052 pr_debug("%s: sleeping 16 us after %s PA turn on\n",
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002053 __func__, w->name);
SathishKumar Mani74ef8912012-09-11 14:25:46 -07002054 usleep_range(16, 16);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002055 break;
2056 case SND_SOC_DAPM_POST_PMD:
2057 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x00);
2058 break;
2059 }
2060 return 0;
2061}
2062
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002063
2064static int tabla_codec_enable_dmic(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002065 struct snd_kcontrol *kcontrol, int event)
2066{
2067 struct snd_soc_codec *codec = w->codec;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002068 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2069 u8 dmic_clk_en;
2070 s32 *dmic_clk_cnt;
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002071 unsigned int dmic;
2072 int ret;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002073
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002074 ret = kstrtouint(strpbrk(w->name, "123456"), 10, &dmic);
2075 if (ret < 0) {
2076 pr_err("%s: Invalid DMIC line on the codec\n", __func__);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002077 return -EINVAL;
2078 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002079
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002080 switch (dmic) {
2081 case 1:
2082 case 2:
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002083 dmic_clk_en = 0x01;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002084 dmic_clk_cnt = &(tabla->dmic_1_2_clk_cnt);
2085
2086 pr_debug("%s() event %d DMIC%d dmic_1_2_clk_cnt %d\n",
2087 __func__, event, dmic, *dmic_clk_cnt);
2088
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002089 break;
2090
2091 case 3:
2092 case 4:
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002093 dmic_clk_en = 0x04;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002094 dmic_clk_cnt = &(tabla->dmic_3_4_clk_cnt);
2095
2096 pr_debug("%s() event %d DMIC%d dmic_3_4_clk_cnt %d\n",
2097 __func__, event, dmic, *dmic_clk_cnt);
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002098 break;
2099
2100 case 5:
2101 case 6:
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002102 dmic_clk_en = 0x10;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002103 dmic_clk_cnt = &(tabla->dmic_5_6_clk_cnt);
2104
2105 pr_debug("%s() event %d DMIC%d dmic_5_6_clk_cnt %d\n",
2106 __func__, event, dmic, *dmic_clk_cnt);
2107
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002108 break;
2109
2110 default:
2111 pr_err("%s: Invalid DMIC Selection\n", __func__);
2112 return -EINVAL;
2113 }
2114
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002115 switch (event) {
2116 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002117
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002118 (*dmic_clk_cnt)++;
2119 if (*dmic_clk_cnt == 1)
2120 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
2121 dmic_clk_en, dmic_clk_en);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002122
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002123 break;
2124 case SND_SOC_DAPM_POST_PMD:
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002125
2126 (*dmic_clk_cnt)--;
2127 if (*dmic_clk_cnt == 0)
2128 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
2129 dmic_clk_en, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002130 break;
2131 }
2132 return 0;
2133}
2134
Bradley Rubin229c6a52011-07-12 16:18:48 -07002135static int tabla_codec_enable_anc(struct snd_soc_dapm_widget *w,
2136 struct snd_kcontrol *kcontrol, int event)
2137{
2138 struct snd_soc_codec *codec = w->codec;
2139 const char *filename;
2140 const struct firmware *fw;
2141 int i;
2142 int ret;
Bradley Rubina7096d02011-08-03 18:29:02 -07002143 int num_anc_slots;
2144 struct anc_header *anc_head;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002145 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubina7096d02011-08-03 18:29:02 -07002146 u32 anc_writes_size = 0;
2147 int anc_size_remaining;
2148 u32 *anc_ptr;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002149 u16 reg;
2150 u8 mask, val, old_val;
2151
2152 pr_debug("%s %d\n", __func__, event);
2153 switch (event) {
2154 case SND_SOC_DAPM_PRE_PMU:
2155
Bradley Rubin4283a4c2011-07-29 16:18:54 -07002156 filename = "wcd9310/wcd9310_anc.bin";
Bradley Rubin229c6a52011-07-12 16:18:48 -07002157
2158 ret = request_firmware(&fw, filename, codec->dev);
2159 if (ret != 0) {
2160 dev_err(codec->dev, "Failed to acquire ANC data: %d\n",
2161 ret);
2162 return -ENODEV;
2163 }
2164
Bradley Rubina7096d02011-08-03 18:29:02 -07002165 if (fw->size < sizeof(struct anc_header)) {
Bradley Rubin229c6a52011-07-12 16:18:48 -07002166 dev_err(codec->dev, "Not enough data\n");
2167 release_firmware(fw);
2168 return -ENOMEM;
2169 }
2170
2171 /* First number is the number of register writes */
Bradley Rubina7096d02011-08-03 18:29:02 -07002172 anc_head = (struct anc_header *)(fw->data);
2173 anc_ptr = (u32 *)((u32)fw->data + sizeof(struct anc_header));
2174 anc_size_remaining = fw->size - sizeof(struct anc_header);
2175 num_anc_slots = anc_head->num_anc_slots;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002176
Bradley Rubina7096d02011-08-03 18:29:02 -07002177 if (tabla->anc_slot >= num_anc_slots) {
2178 dev_err(codec->dev, "Invalid ANC slot selected\n");
2179 release_firmware(fw);
2180 return -EINVAL;
2181 }
2182
2183 for (i = 0; i < num_anc_slots; i++) {
2184
2185 if (anc_size_remaining < TABLA_PACKED_REG_SIZE) {
2186 dev_err(codec->dev, "Invalid register format\n");
2187 release_firmware(fw);
2188 return -EINVAL;
2189 }
2190 anc_writes_size = (u32)(*anc_ptr);
2191 anc_size_remaining -= sizeof(u32);
2192 anc_ptr += 1;
2193
2194 if (anc_writes_size * TABLA_PACKED_REG_SIZE
2195 > anc_size_remaining) {
2196 dev_err(codec->dev, "Invalid register format\n");
2197 release_firmware(fw);
2198 return -ENOMEM;
2199 }
2200
2201 if (tabla->anc_slot == i)
2202 break;
2203
2204 anc_size_remaining -= (anc_writes_size *
2205 TABLA_PACKED_REG_SIZE);
Bradley Rubin939ff3f2011-08-26 17:19:34 -07002206 anc_ptr += anc_writes_size;
Bradley Rubina7096d02011-08-03 18:29:02 -07002207 }
2208 if (i == num_anc_slots) {
2209 dev_err(codec->dev, "Selected ANC slot not present\n");
Bradley Rubin229c6a52011-07-12 16:18:48 -07002210 release_firmware(fw);
2211 return -ENOMEM;
2212 }
2213
Bradley Rubina7096d02011-08-03 18:29:02 -07002214 for (i = 0; i < anc_writes_size; i++) {
2215 TABLA_CODEC_UNPACK_ENTRY(anc_ptr[i], reg,
Bradley Rubin229c6a52011-07-12 16:18:48 -07002216 mask, val);
2217 old_val = snd_soc_read(codec, reg);
Bradley Rubin4283a4c2011-07-29 16:18:54 -07002218 snd_soc_write(codec, reg, (old_val & ~mask) |
2219 (val & mask));
Bradley Rubin229c6a52011-07-12 16:18:48 -07002220 }
2221 release_firmware(fw);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002222
Joonwoo Park743d0e32012-05-17 15:11:58 -07002223 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
2224 /* if MBHC polling is active, set TX7_MBHC_EN bit 7 */
2225 if (tabla->mbhc_polling_active)
2226 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80,
2227 0x80);
2228 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002229 break;
2230 case SND_SOC_DAPM_POST_PMD:
Joonwoo Park743d0e32012-05-17 15:11:58 -07002231 /* unset TX7_MBHC_EN bit 7 */
2232 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
2233
Bradley Rubin229c6a52011-07-12 16:18:48 -07002234 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_RESET_CTL, 0xFF);
2235 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_CLK_EN_CTL, 0);
2236 break;
2237 }
2238 return 0;
2239}
2240
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002241/* called under codec_resource_lock acquisition */
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002242static void tabla_codec_start_hs_polling(struct snd_soc_codec *codec)
2243{
Bradley Rubincb3950a2011-08-18 13:07:26 -07002244 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07002245 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
2246 int mbhc_state = tabla->mbhc_state;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002247
Joonwoo Park03324832012-03-19 19:36:16 -07002248 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002249 if (!tabla->mbhc_polling_active) {
2250 pr_debug("Polling is not active, do not start polling\n");
2251 return;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002252 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002253 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Joonwoo Park03324832012-03-19 19:36:16 -07002254
Joonwoo Park5bbcb0c2012-08-07 17:25:52 -07002255 if (tabla->no_mic_headset_override) {
2256 pr_debug("%s setting button threshold to min", __func__);
2257 /* set to min */
2258 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL, 0x80);
2259 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL, 0x00);
2260 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL, 0x80);
2261 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL, 0x00);
2262 } else if (unlikely(mbhc_state == MBHC_STATE_POTENTIAL)) {
2263 pr_debug("%s recovering MBHC state machine\n", __func__);
2264 tabla->mbhc_state = MBHC_STATE_POTENTIAL_RECOVERY;
2265 /* set to max button press threshold */
2266 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL, 0x7F);
2267 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL, 0xFF);
2268 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
2269 (TABLA_IS_1_X(tabla_core->version) ?
2270 0x07 : 0x7F));
2271 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL, 0xFF);
2272 /* set to max */
2273 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL, 0x7F);
2274 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL, 0xFF);
Joonwoo Park03324832012-03-19 19:36:16 -07002275 }
2276
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002277 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
2278 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
2279 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
Joonwoo Park03324832012-03-19 19:36:16 -07002280 pr_debug("%s: leave\n", __func__);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002281}
2282
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002283/* called under codec_resource_lock acquisition */
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002284static void tabla_codec_pause_hs_polling(struct snd_soc_codec *codec)
2285{
Bradley Rubincb3950a2011-08-18 13:07:26 -07002286 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2287
Joonwoo Park03324832012-03-19 19:36:16 -07002288 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002289 if (!tabla->mbhc_polling_active) {
2290 pr_debug("polling not active, nothing to pause\n");
2291 return;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002292 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002293
2294 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Joonwoo Park03324832012-03-19 19:36:16 -07002295 pr_debug("%s: leave\n", __func__);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002296}
2297
Joonwoo Park03324832012-03-19 19:36:16 -07002298static void tabla_codec_switch_cfilt_mode(struct snd_soc_codec *codec, int mode)
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002299{
2300 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2301 u8 reg_mode_val, cur_mode_val;
2302 bool mbhc_was_polling = false;
2303
2304 if (mode)
2305 reg_mode_val = TABLA_CFILT_FAST_MODE;
2306 else
2307 reg_mode_val = TABLA_CFILT_SLOW_MODE;
2308
2309 cur_mode_val = snd_soc_read(codec,
2310 tabla->mbhc_bias_regs.cfilt_ctl) & 0x40;
2311
2312 if (cur_mode_val != reg_mode_val) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002313 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002314 if (tabla->mbhc_polling_active) {
2315 tabla_codec_pause_hs_polling(codec);
2316 mbhc_was_polling = true;
2317 }
2318 snd_soc_update_bits(codec,
2319 tabla->mbhc_bias_regs.cfilt_ctl, 0x40, reg_mode_val);
2320 if (mbhc_was_polling)
2321 tabla_codec_start_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002322 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002323 pr_debug("%s: CFILT mode change (%x to %x)\n", __func__,
2324 cur_mode_val, reg_mode_val);
2325 } else {
2326 pr_debug("%s: CFILT Value is already %x\n",
2327 __func__, cur_mode_val);
2328 }
2329}
2330
2331static void tabla_codec_update_cfilt_usage(struct snd_soc_codec *codec,
2332 u8 cfilt_sel, int inc)
2333{
2334 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2335 u32 *cfilt_cnt_ptr = NULL;
2336 u16 micb_cfilt_reg;
2337
2338 switch (cfilt_sel) {
2339 case TABLA_CFILT1_SEL:
2340 cfilt_cnt_ptr = &tabla->cfilt1_cnt;
2341 micb_cfilt_reg = TABLA_A_MICB_CFILT_1_CTL;
2342 break;
2343 case TABLA_CFILT2_SEL:
2344 cfilt_cnt_ptr = &tabla->cfilt2_cnt;
2345 micb_cfilt_reg = TABLA_A_MICB_CFILT_2_CTL;
2346 break;
2347 case TABLA_CFILT3_SEL:
2348 cfilt_cnt_ptr = &tabla->cfilt3_cnt;
2349 micb_cfilt_reg = TABLA_A_MICB_CFILT_3_CTL;
2350 break;
2351 default:
2352 return; /* should not happen */
2353 }
2354
2355 if (inc) {
2356 if (!(*cfilt_cnt_ptr)++) {
2357 /* Switch CFILT to slow mode if MBHC CFILT being used */
2358 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
2359 tabla_codec_switch_cfilt_mode(codec, 0);
2360
2361 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0x80);
2362 }
2363 } else {
2364 /* check if count not zero, decrement
2365 * then check if zero, go ahead disable cfilter
2366 */
2367 if ((*cfilt_cnt_ptr) && !--(*cfilt_cnt_ptr)) {
2368 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0);
2369
2370 /* Switch CFILT to fast mode if MBHC CFILT being used */
2371 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
2372 tabla_codec_switch_cfilt_mode(codec, 1);
2373 }
2374 }
2375}
2376
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002377static int tabla_find_k_value(unsigned int ldoh_v, unsigned int cfilt_mv)
2378{
2379 int rc = -EINVAL;
2380 unsigned min_mv, max_mv;
2381
2382 switch (ldoh_v) {
2383 case TABLA_LDOH_1P95_V:
2384 min_mv = 160;
2385 max_mv = 1800;
2386 break;
2387 case TABLA_LDOH_2P35_V:
2388 min_mv = 200;
2389 max_mv = 2200;
2390 break;
2391 case TABLA_LDOH_2P75_V:
2392 min_mv = 240;
2393 max_mv = 2600;
2394 break;
2395 case TABLA_LDOH_2P85_V:
2396 min_mv = 250;
2397 max_mv = 2700;
2398 break;
2399 default:
2400 goto done;
2401 }
2402
2403 if (cfilt_mv < min_mv || cfilt_mv > max_mv)
2404 goto done;
2405
2406 for (rc = 4; rc <= 44; rc++) {
2407 min_mv = max_mv * (rc) / 44;
2408 if (min_mv >= cfilt_mv) {
2409 rc -= 4;
2410 break;
2411 }
2412 }
2413done:
2414 return rc;
2415}
2416
2417static bool tabla_is_hph_pa_on(struct snd_soc_codec *codec)
2418{
2419 u8 hph_reg_val = 0;
2420 hph_reg_val = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_EN);
2421
2422 return (hph_reg_val & 0x30) ? true : false;
2423}
2424
Joonwoo Parka9444452011-12-08 18:48:27 -08002425static bool tabla_is_hph_dac_on(struct snd_soc_codec *codec, int left)
2426{
2427 u8 hph_reg_val = 0;
2428 if (left)
2429 hph_reg_val = snd_soc_read(codec,
2430 TABLA_A_RX_HPH_L_DAC_CTL);
2431 else
2432 hph_reg_val = snd_soc_read(codec,
2433 TABLA_A_RX_HPH_R_DAC_CTL);
2434
2435 return (hph_reg_val & 0xC0) ? true : false;
2436}
2437
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002438static void tabla_turn_onoff_override(struct snd_soc_codec *codec, bool on)
2439{
2440 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, on << 2);
2441}
2442
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002443/* called under codec_resource_lock acquisition */
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002444static void tabla_codec_drive_v_to_micbias(struct snd_soc_codec *codec,
2445 int usec)
2446{
2447 int cfilt_k_val;
2448 bool set = true;
2449 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2450
2451 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
2452 tabla->mbhc_micbias_switched) {
2453 pr_debug("%s: set mic V to micbias V\n", __func__);
2454 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
2455 tabla_turn_onoff_override(codec, true);
2456 while (1) {
2457 cfilt_k_val = tabla_find_k_value(
2458 tabla->pdata->micbias.ldoh_v,
2459 set ? tabla->mbhc_data.micb_mv :
2460 VDDIO_MICBIAS_MV);
2461 snd_soc_update_bits(codec,
2462 tabla->mbhc_bias_regs.cfilt_val,
2463 0xFC, (cfilt_k_val << 2));
2464 if (!set)
2465 break;
2466 usleep_range(usec, usec);
2467 set = false;
2468 }
2469 tabla_turn_onoff_override(codec, false);
2470 }
2471}
2472
2473/* called under codec_resource_lock acquisition */
2474static void __tabla_codec_switch_micbias(struct snd_soc_codec *codec,
2475 int vddio_switch, bool restartpolling,
2476 bool checkpolling)
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002477{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002478 int cfilt_k_val;
Joonwoo Park41956722012-04-18 13:13:07 -07002479 bool override;
2480 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002481
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002482 if (vddio_switch && !tabla->mbhc_micbias_switched &&
2483 (!checkpolling || tabla->mbhc_polling_active)) {
2484 if (restartpolling)
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08002485 tabla_codec_pause_hs_polling(codec);
Joonwoo Park41956722012-04-18 13:13:07 -07002486 override = snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x04;
2487 if (!override)
2488 tabla_turn_onoff_override(codec, true);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002489 /* Adjust threshold if Mic Bias voltage changes */
2490 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002491 cfilt_k_val = tabla_find_k_value(
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002492 tabla->pdata->micbias.ldoh_v,
2493 VDDIO_MICBIAS_MV);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002494 snd_soc_update_bits(codec,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002495 tabla->mbhc_bias_regs.cfilt_val,
2496 0xFC, (cfilt_k_val << 2));
Joonwoo Parkc1c67a92012-08-07 16:05:36 -07002497 usleep_range(cfilt_adjust_ms * 1000,
2498 cfilt_adjust_ms * 1000);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002499 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2500 tabla->mbhc_data.adj_v_ins_hu & 0xFF);
2501 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2502 (tabla->mbhc_data.adj_v_ins_hu >> 8) &
2503 0xFF);
2504 pr_debug("%s: Programmed MBHC thresholds to VDDIO\n",
2505 __func__);
2506 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002507
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002508 /* enable MIC BIAS Switch to VDDIO */
2509 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2510 0x80, 0x80);
2511 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2512 0x10, 0x00);
Joonwoo Park41956722012-04-18 13:13:07 -07002513 if (!override)
2514 tabla_turn_onoff_override(codec, false);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002515 if (restartpolling)
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08002516 tabla_codec_start_hs_polling(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002517
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002518 tabla->mbhc_micbias_switched = true;
2519 pr_debug("%s: VDDIO switch enabled\n", __func__);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002520 } else if (!vddio_switch && tabla->mbhc_micbias_switched) {
2521 if ((!checkpolling || tabla->mbhc_polling_active) &&
2522 restartpolling)
2523 tabla_codec_pause_hs_polling(codec);
2524 /* Reprogram thresholds */
2525 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
2526 cfilt_k_val = tabla_find_k_value(
2527 tabla->pdata->micbias.ldoh_v,
2528 tabla->mbhc_data.micb_mv);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002529 snd_soc_update_bits(codec,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002530 tabla->mbhc_bias_regs.cfilt_val,
2531 0xFC, (cfilt_k_val << 2));
Joonwoo Parkc1c67a92012-08-07 16:05:36 -07002532 usleep_range(cfilt_adjust_ms * 1000,
2533 cfilt_adjust_ms * 1000);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002534 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2535 tabla->mbhc_data.v_ins_hu & 0xFF);
2536 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2537 (tabla->mbhc_data.v_ins_hu >> 8) & 0xFF);
2538 pr_debug("%s: Programmed MBHC thresholds to MICBIAS\n",
2539 __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002540 }
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002541
2542 /* Disable MIC BIAS Switch to VDDIO */
2543 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2544 0x80, 0x00);
2545 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2546 0x10, 0x00);
2547
2548 if ((!checkpolling || tabla->mbhc_polling_active) &&
2549 restartpolling)
2550 tabla_codec_start_hs_polling(codec);
2551
2552 tabla->mbhc_micbias_switched = false;
2553 pr_debug("%s: VDDIO switch disabled\n", __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002554 }
2555}
2556
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002557static void tabla_codec_switch_micbias(struct snd_soc_codec *codec,
2558 int vddio_switch)
2559{
2560 return __tabla_codec_switch_micbias(codec, vddio_switch, true, true);
2561}
2562
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002563static int tabla_codec_enable_micbias(struct snd_soc_dapm_widget *w,
2564 struct snd_kcontrol *kcontrol, int event)
2565{
2566 struct snd_soc_codec *codec = w->codec;
Patrick Lai3043fba2011-08-01 14:15:57 -07002567 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2568 u16 micb_int_reg;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002569 int micb_line;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002570 u8 cfilt_sel_val = 0;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002571 char *internal1_text = "Internal1";
2572 char *internal2_text = "Internal2";
2573 char *internal3_text = "Internal3";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002574
2575 pr_debug("%s %d\n", __func__, event);
2576 switch (w->reg) {
2577 case TABLA_A_MICB_1_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002578 micb_int_reg = TABLA_A_MICB_1_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002579 cfilt_sel_val = tabla->pdata->micbias.bias1_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002580 micb_line = TABLA_MICBIAS1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002581 break;
2582 case TABLA_A_MICB_2_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002583 micb_int_reg = TABLA_A_MICB_2_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002584 cfilt_sel_val = tabla->pdata->micbias.bias2_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002585 micb_line = TABLA_MICBIAS2;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002586 break;
2587 case TABLA_A_MICB_3_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002588 micb_int_reg = TABLA_A_MICB_3_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002589 cfilt_sel_val = tabla->pdata->micbias.bias3_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002590 micb_line = TABLA_MICBIAS3;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002591 break;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002592 case TABLA_1_A_MICB_4_CTL:
2593 case TABLA_2_A_MICB_4_CTL:
2594 micb_int_reg = tabla->reg_addr.micb_4_int_rbias;
Patrick Lai3043fba2011-08-01 14:15:57 -07002595 cfilt_sel_val = tabla->pdata->micbias.bias4_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002596 micb_line = TABLA_MICBIAS4;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002597 break;
2598 default:
2599 pr_err("%s: Error, invalid micbias register\n", __func__);
2600 return -EINVAL;
2601 }
2602
2603 switch (event) {
2604 case SND_SOC_DAPM_PRE_PMU:
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002605 /* Decide whether to switch the micbias for MBHC */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002606 if (w->reg == tabla->mbhc_bias_regs.ctl_reg) {
2607 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002608 tabla_codec_switch_micbias(codec, 0);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002609 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2610 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002611
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002612 snd_soc_update_bits(codec, w->reg, 0x0E, 0x0A);
Patrick Lai3043fba2011-08-01 14:15:57 -07002613 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 1);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002614
2615 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002616 snd_soc_update_bits(codec, micb_int_reg, 0xE0, 0xE0);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002617 else if (strnstr(w->name, internal2_text, 30))
2618 snd_soc_update_bits(codec, micb_int_reg, 0x1C, 0x1C);
2619 else if (strnstr(w->name, internal3_text, 30))
2620 snd_soc_update_bits(codec, micb_int_reg, 0x3, 0x3);
2621
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002622 break;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002623 case SND_SOC_DAPM_POST_PMU:
Kiran Kandid8cf5212012-03-02 15:34:53 -08002624
2625 usleep_range(20000, 20000);
2626
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002627 if (tabla->mbhc_polling_active &&
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002628 tabla->mbhc_cfg.micbias == micb_line) {
2629 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002630 tabla_codec_pause_hs_polling(codec);
2631 tabla_codec_start_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002632 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002633 }
2634 break;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002635
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002636 case SND_SOC_DAPM_POST_PMD:
Joonwoo Park03324832012-03-19 19:36:16 -07002637 if ((w->reg == tabla->mbhc_bias_regs.ctl_reg) &&
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002638 tabla_is_hph_pa_on(codec)) {
2639 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002640 tabla_codec_switch_micbias(codec, 1);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002641 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2642 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002643
Bradley Rubin229c6a52011-07-12 16:18:48 -07002644 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002645 snd_soc_update_bits(codec, micb_int_reg, 0x80, 0x00);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002646 else if (strnstr(w->name, internal2_text, 30))
2647 snd_soc_update_bits(codec, micb_int_reg, 0x10, 0x00);
2648 else if (strnstr(w->name, internal3_text, 30))
2649 snd_soc_update_bits(codec, micb_int_reg, 0x2, 0x0);
2650
Patrick Lai3043fba2011-08-01 14:15:57 -07002651 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002652 break;
2653 }
2654
2655 return 0;
2656}
2657
Kiran Kandid8cf5212012-03-02 15:34:53 -08002658
2659static void tx_hpf_corner_freq_callback(struct work_struct *work)
2660{
2661 struct delayed_work *hpf_delayed_work;
2662 struct hpf_work *hpf_work;
2663 struct tabla_priv *tabla;
2664 struct snd_soc_codec *codec;
2665 u16 tx_mux_ctl_reg;
2666 u8 hpf_cut_of_freq;
2667
2668 hpf_delayed_work = to_delayed_work(work);
2669 hpf_work = container_of(hpf_delayed_work, struct hpf_work, dwork);
2670 tabla = hpf_work->tabla;
2671 codec = hpf_work->tabla->codec;
2672 hpf_cut_of_freq = hpf_work->tx_hpf_cut_of_freq;
2673
2674 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL +
2675 (hpf_work->decimator - 1) * 8;
2676
2677 pr_debug("%s(): decimator %u hpf_cut_of_freq 0x%x\n", __func__,
2678 hpf_work->decimator, (unsigned int)hpf_cut_of_freq);
2679
2680 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30, hpf_cut_of_freq << 4);
2681}
2682
2683#define TX_MUX_CTL_CUT_OFF_FREQ_MASK 0x30
2684#define CF_MIN_3DB_4HZ 0x0
2685#define CF_MIN_3DB_75HZ 0x1
2686#define CF_MIN_3DB_150HZ 0x2
2687
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002688static int tabla_codec_enable_dec(struct snd_soc_dapm_widget *w,
2689 struct snd_kcontrol *kcontrol, int event)
2690{
2691 struct snd_soc_codec *codec = w->codec;
Kiran Kandid8cf5212012-03-02 15:34:53 -08002692 unsigned int decimator;
2693 char *dec_name = NULL;
2694 char *widget_name = NULL;
2695 char *temp;
2696 int ret = 0;
2697 u16 dec_reset_reg, tx_vol_ctl_reg, tx_mux_ctl_reg;
2698 u8 dec_hpf_cut_of_freq;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002699 int offset;
2700
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002701
2702 pr_debug("%s %d\n", __func__, event);
2703
Kiran Kandid8cf5212012-03-02 15:34:53 -08002704 widget_name = kstrndup(w->name, 15, GFP_KERNEL);
2705 if (!widget_name)
2706 return -ENOMEM;
2707 temp = widget_name;
2708
2709 dec_name = strsep(&widget_name, " ");
2710 widget_name = temp;
2711 if (!dec_name) {
2712 pr_err("%s: Invalid decimator = %s\n", __func__, w->name);
2713 ret = -EINVAL;
2714 goto out;
2715 }
2716
2717 ret = kstrtouint(strpbrk(dec_name, "123456789"), 10, &decimator);
2718 if (ret < 0) {
2719 pr_err("%s: Invalid decimator = %s\n", __func__, dec_name);
2720 ret = -EINVAL;
2721 goto out;
2722 }
2723
2724 pr_debug("%s(): widget = %s dec_name = %s decimator = %u\n", __func__,
2725 w->name, dec_name, decimator);
2726
Kuirong Wange9c8a222012-03-28 16:24:09 -07002727 if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002728 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B1_CTL;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002729 offset = 0;
2730 } else if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002731 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B2_CTL;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002732 offset = 8;
2733 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002734 pr_err("%s: Error, incorrect dec\n", __func__);
2735 return -EINVAL;
2736 }
2737
Kiran Kandid8cf5212012-03-02 15:34:53 -08002738 tx_vol_ctl_reg = TABLA_A_CDC_TX1_VOL_CTL_CFG + 8 * (decimator -1);
2739 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (decimator - 1);
2740
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002741 switch (event) {
2742 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandid8cf5212012-03-02 15:34:53 -08002743
2744 // Enableable TX digital mute */
2745 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x01);
2746
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002747 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift,
2748 1 << w->shift);
2749 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift, 0x0);
Kiran Kandid8cf5212012-03-02 15:34:53 -08002750
2751 dec_hpf_cut_of_freq = snd_soc_read(codec, tx_mux_ctl_reg);
2752
2753 dec_hpf_cut_of_freq = (dec_hpf_cut_of_freq & 0x30) >> 4;
2754
2755 tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq =
2756 dec_hpf_cut_of_freq;
2757
2758 if ((dec_hpf_cut_of_freq != CF_MIN_3DB_150HZ)) {
2759
2760 /* set cut of freq to CF_MIN_3DB_150HZ (0x1); */
2761 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30,
2762 CF_MIN_3DB_150HZ << 4);
2763 }
2764
2765 /* enable HPF */
2766 snd_soc_update_bits(codec, tx_mux_ctl_reg , 0x08, 0x00);
2767
2768 break;
2769
2770 case SND_SOC_DAPM_POST_PMU:
2771
2772 /* Disable TX digital mute */
2773 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x00);
2774
2775 if (tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq !=
2776 CF_MIN_3DB_150HZ) {
2777
2778 schedule_delayed_work(&tx_hpf_work[decimator - 1].dwork,
2779 msecs_to_jiffies(300));
2780 }
Kuirong Wange9c8a222012-03-28 16:24:09 -07002781 /* apply the digital gain after the decimator is enabled*/
2782 if ((w->shift) < ARRAY_SIZE(rx_digital_gain_reg))
2783 snd_soc_write(codec,
2784 tx_digital_gain_reg[w->shift + offset],
2785 snd_soc_read(codec,
2786 tx_digital_gain_reg[w->shift + offset])
2787 );
2788
Kiran Kandid8cf5212012-03-02 15:34:53 -08002789 break;
2790
2791 case SND_SOC_DAPM_PRE_PMD:
2792
2793 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x01);
2794 cancel_delayed_work_sync(&tx_hpf_work[decimator - 1].dwork);
2795 break;
2796
2797 case SND_SOC_DAPM_POST_PMD:
2798
2799 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x08, 0x08);
2800 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30,
2801 (tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq) << 4);
2802
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002803 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002804 }
Kiran Kandid8cf5212012-03-02 15:34:53 -08002805out:
2806 kfree(widget_name);
2807 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002808}
2809
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002810static int tabla_codec_reset_interpolator(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002811 struct snd_kcontrol *kcontrol, int event)
2812{
2813 struct snd_soc_codec *codec = w->codec;
2814
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002815 pr_debug("%s %d %s\n", __func__, event, w->name);
2816
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002817 switch (event) {
2818 case SND_SOC_DAPM_PRE_PMU:
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002819 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
2820 1 << w->shift, 1 << w->shift);
2821 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
2822 1 << w->shift, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002823 break;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002824 case SND_SOC_DAPM_POST_PMU:
2825 /* apply the digital gain after the interpolator is enabled*/
2826 if ((w->shift) < ARRAY_SIZE(rx_digital_gain_reg))
2827 snd_soc_write(codec,
2828 rx_digital_gain_reg[w->shift],
2829 snd_soc_read(codec,
2830 rx_digital_gain_reg[w->shift])
2831 );
2832 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002833 }
2834 return 0;
2835}
2836
Bradley Rubin229c6a52011-07-12 16:18:48 -07002837static int tabla_codec_enable_ldo_h(struct snd_soc_dapm_widget *w,
2838 struct snd_kcontrol *kcontrol, int event)
2839{
2840 switch (event) {
2841 case SND_SOC_DAPM_POST_PMU:
2842 case SND_SOC_DAPM_POST_PMD:
2843 usleep_range(1000, 1000);
2844 break;
2845 }
2846 return 0;
2847}
2848
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002849static int tabla_codec_enable_rx_bias(struct snd_soc_dapm_widget *w,
2850 struct snd_kcontrol *kcontrol, int event)
2851{
2852 struct snd_soc_codec *codec = w->codec;
2853
2854 pr_debug("%s %d\n", __func__, event);
2855
2856 switch (event) {
2857 case SND_SOC_DAPM_PRE_PMU:
2858 tabla_enable_rx_bias(codec, 1);
2859 break;
2860 case SND_SOC_DAPM_POST_PMD:
2861 tabla_enable_rx_bias(codec, 0);
2862 break;
2863 }
2864 return 0;
2865}
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002866static int tabla_hphr_dac_event(struct snd_soc_dapm_widget *w,
2867 struct snd_kcontrol *kcontrol, int event)
2868{
2869 struct snd_soc_codec *codec = w->codec;
2870
2871 pr_debug("%s %s %d\n", __func__, w->name, event);
2872
2873 switch (event) {
2874 case SND_SOC_DAPM_PRE_PMU:
2875 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
2876 break;
2877 case SND_SOC_DAPM_POST_PMD:
2878 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
2879 break;
2880 }
2881 return 0;
2882}
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002883
Joonwoo Park8b1f0982011-12-08 17:12:45 -08002884static void tabla_snd_soc_jack_report(struct tabla_priv *tabla,
2885 struct snd_soc_jack *jack, int status,
2886 int mask)
2887{
2888 /* XXX: wake_lock_timeout()? */
Joonwoo Park03324832012-03-19 19:36:16 -07002889 snd_soc_jack_report_no_dapm(jack, status, mask);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08002890}
2891
Patrick Lai49efeac2011-11-03 11:01:12 -07002892static void hphocp_off_report(struct tabla_priv *tabla,
2893 u32 jack_status, int irq)
2894{
2895 struct snd_soc_codec *codec;
Joonwoo Park03324832012-03-19 19:36:16 -07002896 if (!tabla) {
2897 pr_err("%s: Bad tabla private data\n", __func__);
2898 return;
2899 }
Patrick Lai49efeac2011-11-03 11:01:12 -07002900
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002901 pr_debug("%s: clear ocp status %x\n", __func__, jack_status);
Joonwoo Park03324832012-03-19 19:36:16 -07002902 codec = tabla->codec;
2903 if (tabla->hph_status & jack_status) {
Patrick Lai49efeac2011-11-03 11:01:12 -07002904 tabla->hph_status &= ~jack_status;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002905 if (tabla->mbhc_cfg.headset_jack)
2906 tabla_snd_soc_jack_report(tabla,
2907 tabla->mbhc_cfg.headset_jack,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08002908 tabla->hph_status,
2909 TABLA_JACK_MASK);
Joonwoo Park0976d012011-12-22 11:48:18 -08002910 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x00);
2911 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
Patrick Laic7cae882011-11-18 11:52:49 -08002912 /* reset retry counter as PA is turned off signifying
2913 * start of new OCP detection session
2914 */
2915 if (TABLA_IRQ_HPH_PA_OCPL_FAULT)
2916 tabla->hphlocp_cnt = 0;
2917 else
2918 tabla->hphrocp_cnt = 0;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302919 wcd9xxx_enable_irq(codec->control_data, irq);
Patrick Lai49efeac2011-11-03 11:01:12 -07002920 }
2921}
2922
2923static void hphlocp_off_report(struct work_struct *work)
2924{
2925 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
2926 hphlocp_work);
2927 hphocp_off_report(tabla, SND_JACK_OC_HPHL, TABLA_IRQ_HPH_PA_OCPL_FAULT);
2928}
2929
2930static void hphrocp_off_report(struct work_struct *work)
2931{
2932 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
2933 hphrocp_work);
2934 hphocp_off_report(tabla, SND_JACK_OC_HPHR, TABLA_IRQ_HPH_PA_OCPR_FAULT);
2935}
2936
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002937static int tabla_hph_pa_event(struct snd_soc_dapm_widget *w,
2938 struct snd_kcontrol *kcontrol, int event)
2939{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002940 struct snd_soc_codec *codec = w->codec;
2941 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2942 u8 mbhc_micb_ctl_val;
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002943 pr_debug("%s: event = %d\n", __func__, event);
2944
2945 switch (event) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002946 case SND_SOC_DAPM_PRE_PMU:
2947 mbhc_micb_ctl_val = snd_soc_read(codec,
2948 tabla->mbhc_bias_regs.ctl_reg);
2949
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002950 if (!(mbhc_micb_ctl_val & 0x80)) {
2951 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002952 tabla_codec_switch_micbias(codec, 1);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002953 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2954 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002955 break;
2956
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002957 case SND_SOC_DAPM_POST_PMD:
Patrick Lai49efeac2011-11-03 11:01:12 -07002958 /* schedule work is required because at the time HPH PA DAPM
2959 * event callback is called by DAPM framework, CODEC dapm mutex
2960 * would have been locked while snd_soc_jack_report also
2961 * attempts to acquire same lock.
2962 */
Joonwoo Parka9444452011-12-08 18:48:27 -08002963 if (w->shift == 5) {
2964 clear_bit(TABLA_HPHL_PA_OFF_ACK,
2965 &tabla->hph_pa_dac_state);
2966 clear_bit(TABLA_HPHL_DAC_OFF_ACK,
2967 &tabla->hph_pa_dac_state);
2968 if (tabla->hph_status & SND_JACK_OC_HPHL)
2969 schedule_work(&tabla->hphlocp_work);
2970 } else if (w->shift == 4) {
2971 clear_bit(TABLA_HPHR_PA_OFF_ACK,
2972 &tabla->hph_pa_dac_state);
2973 clear_bit(TABLA_HPHR_DAC_OFF_ACK,
2974 &tabla->hph_pa_dac_state);
2975 if (tabla->hph_status & SND_JACK_OC_HPHR)
2976 schedule_work(&tabla->hphrocp_work);
2977 }
2978
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002979 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Joonwoo Park03324832012-03-19 19:36:16 -07002980 tabla_codec_switch_micbias(codec, 0);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002981 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002982
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002983 pr_debug("%s: sleep 10 ms after %s PA disable.\n", __func__,
2984 w->name);
2985 usleep_range(10000, 10000);
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002986 break;
2987 }
2988 return 0;
2989}
2990
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002991static void tabla_get_mbhc_micbias_regs(struct snd_soc_codec *codec,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002992 struct mbhc_micbias_regs *micbias_regs)
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002993{
2994 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002995 unsigned int cfilt;
2996
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002997 switch (tabla->mbhc_cfg.micbias) {
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002998 case TABLA_MICBIAS1:
2999 cfilt = tabla->pdata->micbias.bias1_cfilt_sel;
3000 micbias_regs->mbhc_reg = TABLA_A_MICB_1_MBHC;
3001 micbias_regs->int_rbias = TABLA_A_MICB_1_INT_RBIAS;
3002 micbias_regs->ctl_reg = TABLA_A_MICB_1_CTL;
3003 break;
3004 case TABLA_MICBIAS2:
3005 cfilt = tabla->pdata->micbias.bias2_cfilt_sel;
3006 micbias_regs->mbhc_reg = TABLA_A_MICB_2_MBHC;
3007 micbias_regs->int_rbias = TABLA_A_MICB_2_INT_RBIAS;
3008 micbias_regs->ctl_reg = TABLA_A_MICB_2_CTL;
3009 break;
3010 case TABLA_MICBIAS3:
3011 cfilt = tabla->pdata->micbias.bias3_cfilt_sel;
3012 micbias_regs->mbhc_reg = TABLA_A_MICB_3_MBHC;
3013 micbias_regs->int_rbias = TABLA_A_MICB_3_INT_RBIAS;
3014 micbias_regs->ctl_reg = TABLA_A_MICB_3_CTL;
3015 break;
3016 case TABLA_MICBIAS4:
3017 cfilt = tabla->pdata->micbias.bias4_cfilt_sel;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003018 micbias_regs->mbhc_reg = tabla->reg_addr.micb_4_mbhc;
3019 micbias_regs->int_rbias = tabla->reg_addr.micb_4_int_rbias;
3020 micbias_regs->ctl_reg = tabla->reg_addr.micb_4_ctl;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003021 break;
3022 default:
3023 /* Should never reach here */
3024 pr_err("%s: Invalid MIC BIAS for MBHC\n", __func__);
Jordan Crouse239d8412011-11-23 11:47:02 -07003025 return;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003026 }
3027
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003028 micbias_regs->cfilt_sel = cfilt;
3029
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003030 switch (cfilt) {
3031 case TABLA_CFILT1_SEL:
3032 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_1_VAL;
3033 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_1_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08003034 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt1_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003035 break;
3036 case TABLA_CFILT2_SEL:
3037 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_2_VAL;
3038 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_2_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08003039 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt2_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003040 break;
3041 case TABLA_CFILT3_SEL:
3042 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_3_VAL;
3043 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_3_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08003044 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt3_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003045 break;
3046 }
3047}
Santosh Mardie15e2302011-11-15 10:39:23 +05303048static const struct snd_soc_dapm_widget tabla_dapm_i2s_widgets[] = {
3049 SND_SOC_DAPM_SUPPLY("RX_I2S_CLK", TABLA_A_CDC_CLK_RX_I2S_CTL,
3050 4, 0, NULL, 0),
3051 SND_SOC_DAPM_SUPPLY("TX_I2S_CLK", TABLA_A_CDC_CLK_TX_I2S_CTL, 4,
3052 0, NULL, 0),
3053};
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003054
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003055static int tabla_lineout_dac_event(struct snd_soc_dapm_widget *w,
3056 struct snd_kcontrol *kcontrol, int event)
3057{
3058 struct snd_soc_codec *codec = w->codec;
3059
3060 pr_debug("%s %s %d\n", __func__, w->name, event);
3061
3062 switch (event) {
3063 case SND_SOC_DAPM_PRE_PMU:
3064 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
3065 break;
3066
3067 case SND_SOC_DAPM_POST_PMD:
3068 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
3069 break;
3070 }
3071 return 0;
3072}
3073
Damir Didjusto52900462012-08-16 21:22:29 -07003074static int tabla_ear_pa_event(struct snd_soc_dapm_widget *w,
3075 struct snd_kcontrol *kcontrol, int event)
3076{
3077 struct snd_soc_codec *codec = w->codec;
3078
3079 pr_debug("%s %d\n", __func__, event);
3080
3081 switch (event) {
3082 case SND_SOC_DAPM_PRE_PMU:
3083 snd_soc_update_bits(codec, TABLA_A_RX_EAR_EN, 0x50, 0x50);
3084 break;
3085
3086 case SND_SOC_DAPM_PRE_PMD:
3087 snd_soc_update_bits(codec, TABLA_A_RX_EAR_EN, 0x10, 0x00);
3088 snd_soc_update_bits(codec, TABLA_A_RX_EAR_EN, 0x40, 0x00);
3089 break;
3090 }
3091 return 0;
3092}
3093
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003094static const struct snd_soc_dapm_widget tabla_1_x_dapm_widgets[] = {
3095 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_1_A_MICB_4_CTL, 7,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303096 0, tabla_codec_enable_micbias,
3097 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
3098 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003099};
3100
3101static const struct snd_soc_dapm_widget tabla_2_higher_dapm_widgets[] = {
3102 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_2_A_MICB_4_CTL, 7,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303103 0, tabla_codec_enable_micbias,
3104 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
3105 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003106};
3107
Santosh Mardie15e2302011-11-15 10:39:23 +05303108static const struct snd_soc_dapm_route audio_i2s_map[] = {
3109 {"RX_I2S_CLK", NULL, "CDC_CONN"},
3110 {"SLIM RX1", NULL, "RX_I2S_CLK"},
3111 {"SLIM RX2", NULL, "RX_I2S_CLK"},
3112 {"SLIM RX3", NULL, "RX_I2S_CLK"},
3113 {"SLIM RX4", NULL, "RX_I2S_CLK"},
3114
3115 {"SLIM TX7", NULL, "TX_I2S_CLK"},
3116 {"SLIM TX8", NULL, "TX_I2S_CLK"},
3117 {"SLIM TX9", NULL, "TX_I2S_CLK"},
3118 {"SLIM TX10", NULL, "TX_I2S_CLK"},
3119};
3120
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003121static const struct snd_soc_dapm_route audio_map[] = {
3122 /* SLIMBUS Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003123
3124 {"SLIM TX1", NULL, "SLIM TX1 MUX"},
3125 {"SLIM TX1 MUX", "DEC1", "DEC1 MUX"},
3126
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003127 {"SLIM TX2", NULL, "SLIM TX2 MUX"},
3128 {"SLIM TX2 MUX", "DEC2", "DEC2 MUX"},
3129
3130 {"SLIM TX3", NULL, "SLIM TX3 MUX"},
3131 {"SLIM TX3 MUX", "DEC3", "DEC3 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003132 {"SLIM TX3 MUX", "RMIX1", "RX1 MIX1"},
3133 {"SLIM TX3 MUX", "RMIX2", "RX2 MIX1"},
3134 {"SLIM TX3 MUX", "RMIX3", "RX3 MIX1"},
3135 {"SLIM TX3 MUX", "RMIX4", "RX4 MIX1"},
3136 {"SLIM TX3 MUX", "RMIX5", "RX5 MIX1"},
3137 {"SLIM TX3 MUX", "RMIX6", "RX6 MIX1"},
3138 {"SLIM TX3 MUX", "RMIX7", "RX7 MIX1"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003139
3140 {"SLIM TX4", NULL, "SLIM TX4 MUX"},
3141 {"SLIM TX4 MUX", "DEC4", "DEC4 MUX"},
3142
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003143 {"SLIM TX5", NULL, "SLIM TX5 MUX"},
3144 {"SLIM TX5 MUX", "DEC5", "DEC5 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003145 {"SLIM TX5 MUX", "RMIX1", "RX1 MIX1"},
3146 {"SLIM TX5 MUX", "RMIX2", "RX2 MIX1"},
3147 {"SLIM TX5 MUX", "RMIX3", "RX3 MIX1"},
3148 {"SLIM TX5 MUX", "RMIX4", "RX4 MIX1"},
3149 {"SLIM TX5 MUX", "RMIX5", "RX5 MIX1"},
3150 {"SLIM TX5 MUX", "RMIX6", "RX6 MIX1"},
3151 {"SLIM TX5 MUX", "RMIX7", "RX7 MIX1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003152
3153 {"SLIM TX6", NULL, "SLIM TX6 MUX"},
3154 {"SLIM TX6 MUX", "DEC6", "DEC6 MUX"},
3155
3156 {"SLIM TX7", NULL, "SLIM TX7 MUX"},
3157 {"SLIM TX7 MUX", "DEC1", "DEC1 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07003158 {"SLIM TX7 MUX", "DEC2", "DEC2 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003159 {"SLIM TX7 MUX", "DEC3", "DEC3 MUX"},
3160 {"SLIM TX7 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003161 {"SLIM TX7 MUX", "DEC5", "DEC5 MUX"},
3162 {"SLIM TX7 MUX", "DEC6", "DEC6 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07003163 {"SLIM TX7 MUX", "DEC7", "DEC7 MUX"},
3164 {"SLIM TX7 MUX", "DEC8", "DEC8 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003165 {"SLIM TX7 MUX", "DEC9", "DEC9 MUX"},
3166 {"SLIM TX7 MUX", "DEC10", "DEC10 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003167 {"SLIM TX7 MUX", "RMIX1", "RX1 MIX1"},
3168 {"SLIM TX7 MUX", "RMIX2", "RX2 MIX1"},
3169 {"SLIM TX7 MUX", "RMIX3", "RX3 MIX1"},
3170 {"SLIM TX7 MUX", "RMIX4", "RX4 MIX1"},
3171 {"SLIM TX7 MUX", "RMIX5", "RX5 MIX1"},
3172 {"SLIM TX7 MUX", "RMIX6", "RX6 MIX1"},
3173 {"SLIM TX7 MUX", "RMIX7", "RX7 MIX1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003174
3175 {"SLIM TX8", NULL, "SLIM TX8 MUX"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003176 {"SLIM TX8 MUX", "DEC1", "DEC1 MUX"},
3177 {"SLIM TX8 MUX", "DEC2", "DEC2 MUX"},
3178 {"SLIM TX8 MUX", "DEC3", "DEC3 MUX"},
Bhalchandra Gajare9ec83cd2011-09-23 17:25:07 -07003179 {"SLIM TX8 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003180 {"SLIM TX8 MUX", "DEC5", "DEC5 MUX"},
3181 {"SLIM TX8 MUX", "DEC6", "DEC6 MUX"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003182 {"SLIM TX8 MUX", "DEC7", "DEC7 MUX"},
3183 {"SLIM TX8 MUX", "DEC8", "DEC8 MUX"},
3184 {"SLIM TX8 MUX", "DEC9", "DEC9 MUX"},
3185 {"SLIM TX8 MUX", "DEC10", "DEC10 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003186
Kiran Kandi3426e512011-09-13 22:50:10 -07003187 {"SLIM TX9", NULL, "SLIM TX9 MUX"},
3188 {"SLIM TX9 MUX", "DEC1", "DEC1 MUX"},
3189 {"SLIM TX9 MUX", "DEC2", "DEC2 MUX"},
3190 {"SLIM TX9 MUX", "DEC3", "DEC3 MUX"},
3191 {"SLIM TX9 MUX", "DEC4", "DEC4 MUX"},
3192 {"SLIM TX9 MUX", "DEC5", "DEC5 MUX"},
3193 {"SLIM TX9 MUX", "DEC6", "DEC6 MUX"},
3194 {"SLIM TX9 MUX", "DEC7", "DEC7 MUX"},
3195 {"SLIM TX9 MUX", "DEC8", "DEC8 MUX"},
3196 {"SLIM TX9 MUX", "DEC9", "DEC9 MUX"},
3197 {"SLIM TX9 MUX", "DEC10", "DEC10 MUX"},
3198
3199 {"SLIM TX10", NULL, "SLIM TX10 MUX"},
3200 {"SLIM TX10 MUX", "DEC1", "DEC1 MUX"},
3201 {"SLIM TX10 MUX", "DEC2", "DEC2 MUX"},
3202 {"SLIM TX10 MUX", "DEC3", "DEC3 MUX"},
3203 {"SLIM TX10 MUX", "DEC4", "DEC4 MUX"},
3204 {"SLIM TX10 MUX", "DEC5", "DEC5 MUX"},
3205 {"SLIM TX10 MUX", "DEC6", "DEC6 MUX"},
3206 {"SLIM TX10 MUX", "DEC7", "DEC7 MUX"},
3207 {"SLIM TX10 MUX", "DEC8", "DEC8 MUX"},
3208 {"SLIM TX10 MUX", "DEC9", "DEC9 MUX"},
3209 {"SLIM TX10 MUX", "DEC10", "DEC10 MUX"},
3210
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003211 /* Earpiece (RX MIX1) */
3212 {"EAR", NULL, "EAR PA"},
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003213 {"EAR PA", NULL, "EAR_PA_MIXER"},
3214 {"EAR_PA_MIXER", NULL, "DAC1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003215 {"DAC1", NULL, "CP"},
3216
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003217 {"ANC1 FB MUX", "EAR_HPH_L", "RX1 MIX2"},
3218 {"ANC1 FB MUX", "EAR_LINE_1", "RX2 MIX2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003219 {"ANC", NULL, "ANC1 FB MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003220
3221 /* Headset (RX MIX1 and RX MIX2) */
3222 {"HEADPHONE", NULL, "HPHL"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003223 {"HEADPHONE", NULL, "HPHR"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003224
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003225 {"HPHL", NULL, "HPHL_PA_MIXER"},
3226 {"HPHL_PA_MIXER", NULL, "HPHL DAC"},
3227
3228 {"HPHR", NULL, "HPHR_PA_MIXER"},
3229 {"HPHR_PA_MIXER", NULL, "HPHR DAC"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003230
3231 {"HPHL DAC", NULL, "CP"},
3232 {"HPHR DAC", NULL, "CP"},
3233
3234 {"ANC", NULL, "ANC1 MUX"},
3235 {"ANC", NULL, "ANC2 MUX"},
3236 {"ANC1 MUX", "ADC1", "ADC1"},
3237 {"ANC1 MUX", "ADC2", "ADC2"},
3238 {"ANC1 MUX", "ADC3", "ADC3"},
3239 {"ANC1 MUX", "ADC4", "ADC4"},
3240 {"ANC2 MUX", "ADC1", "ADC1"},
3241 {"ANC2 MUX", "ADC2", "ADC2"},
3242 {"ANC2 MUX", "ADC3", "ADC3"},
3243 {"ANC2 MUX", "ADC4", "ADC4"},
3244
Bradley Rubine1d08622011-07-20 18:01:35 -07003245 {"ANC", NULL, "CDC_CONN"},
3246
Bradley Rubin229c6a52011-07-12 16:18:48 -07003247 {"DAC1", "Switch", "RX1 CHAIN"},
3248 {"HPHL DAC", "Switch", "RX1 CHAIN"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003249 {"HPHR DAC", NULL, "RX2 CHAIN"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003250
Kiran Kandidb0a4b02011-08-23 09:32:09 -07003251 {"LINEOUT1", NULL, "LINEOUT1 PA"},
3252 {"LINEOUT2", NULL, "LINEOUT2 PA"},
3253 {"LINEOUT3", NULL, "LINEOUT3 PA"},
3254 {"LINEOUT4", NULL, "LINEOUT4 PA"},
3255 {"LINEOUT5", NULL, "LINEOUT5 PA"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003256
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003257 {"LINEOUT1 PA", NULL, "LINEOUT1_PA_MIXER"},
3258 {"LINEOUT1_PA_MIXER", NULL, "LINEOUT1 DAC"},
3259 {"LINEOUT2 PA", NULL, "LINEOUT2_PA_MIXER"},
3260 {"LINEOUT2_PA_MIXER", NULL, "LINEOUT2 DAC"},
3261 {"LINEOUT3 PA", NULL, "LINEOUT3_PA_MIXER"},
3262 {"LINEOUT3_PA_MIXER", NULL, "LINEOUT3 DAC"},
3263 {"LINEOUT4 PA", NULL, "LINEOUT4_PA_MIXER"},
3264 {"LINEOUT4_PA_MIXER", NULL, "LINEOUT4 DAC"},
3265 {"LINEOUT5 PA", NULL, "LINEOUT5_PA_MIXER"},
3266 {"LINEOUT5_PA_MIXER", NULL, "LINEOUT5 DAC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003267
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003268 {"LINEOUT1 DAC", NULL, "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003269 {"LINEOUT5 DAC", NULL, "RX7 MIX1"},
3270
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003271 {"RX1 CHAIN", NULL, "RX1 MIX2"},
3272 {"RX2 CHAIN", NULL, "RX2 MIX2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003273 {"RX1 CHAIN", NULL, "ANC"},
3274 {"RX2 CHAIN", NULL, "ANC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003275
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003276 {"CP", NULL, "RX_BIAS"},
3277 {"LINEOUT1 DAC", NULL, "RX_BIAS"},
3278 {"LINEOUT2 DAC", NULL, "RX_BIAS"},
3279 {"LINEOUT3 DAC", NULL, "RX_BIAS"},
3280 {"LINEOUT4 DAC", NULL, "RX_BIAS"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003281 {"LINEOUT5 DAC", NULL, "RX_BIAS"},
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003282
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003283 {"RX1 MIX1", NULL, "COMP1_CLK"},
3284 {"RX2 MIX1", NULL, "COMP1_CLK"},
3285 {"RX3 MIX1", NULL, "COMP2_CLK"},
3286 {"RX5 MIX1", NULL, "COMP2_CLK"},
3287
3288
Bradley Rubin229c6a52011-07-12 16:18:48 -07003289 {"RX1 MIX1", NULL, "RX1 MIX1 INP1"},
3290 {"RX1 MIX1", NULL, "RX1 MIX1 INP2"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003291 {"RX1 MIX1", NULL, "RX1 MIX1 INP3"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003292 {"RX2 MIX1", NULL, "RX2 MIX1 INP1"},
3293 {"RX2 MIX1", NULL, "RX2 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003294 {"RX3 MIX1", NULL, "RX3 MIX1 INP1"},
3295 {"RX3 MIX1", NULL, "RX3 MIX1 INP2"},
3296 {"RX4 MIX1", NULL, "RX4 MIX1 INP1"},
3297 {"RX4 MIX1", NULL, "RX4 MIX1 INP2"},
3298 {"RX5 MIX1", NULL, "RX5 MIX1 INP1"},
3299 {"RX5 MIX1", NULL, "RX5 MIX1 INP2"},
3300 {"RX6 MIX1", NULL, "RX6 MIX1 INP1"},
3301 {"RX6 MIX1", NULL, "RX6 MIX1 INP2"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003302 {"RX7 MIX1", NULL, "RX7 MIX1 INP1"},
3303 {"RX7 MIX1", NULL, "RX7 MIX1 INP2"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003304 {"RX1 MIX2", NULL, "RX1 MIX1"},
3305 {"RX1 MIX2", NULL, "RX1 MIX2 INP1"},
3306 {"RX1 MIX2", NULL, "RX1 MIX2 INP2"},
3307 {"RX2 MIX2", NULL, "RX2 MIX1"},
3308 {"RX2 MIX2", NULL, "RX2 MIX2 INP1"},
3309 {"RX2 MIX2", NULL, "RX2 MIX2 INP2"},
3310 {"RX3 MIX2", NULL, "RX3 MIX1"},
3311 {"RX3 MIX2", NULL, "RX3 MIX2 INP1"},
3312 {"RX3 MIX2", NULL, "RX3 MIX2 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003313
Bradley Rubin229c6a52011-07-12 16:18:48 -07003314 {"RX1 MIX1 INP1", "RX1", "SLIM RX1"},
3315 {"RX1 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303316 {"RX1 MIX1 INP1", "RX3", "SLIM RX3"},
3317 {"RX1 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003318 {"RX1 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003319 {"RX1 MIX1 INP1", "RX6", "SLIM RX6"},
3320 {"RX1 MIX1 INP1", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003321 {"RX1 MIX1 INP1", "IIR1", "IIR1"},
3322 {"RX1 MIX1 INP2", "RX1", "SLIM RX1"},
3323 {"RX1 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303324 {"RX1 MIX1 INP2", "RX3", "SLIM RX3"},
3325 {"RX1 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003326 {"RX1 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003327 {"RX1 MIX1 INP2", "RX6", "SLIM RX6"},
3328 {"RX1 MIX1 INP2", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003329 {"RX1 MIX1 INP2", "IIR1", "IIR1"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003330 {"RX1 MIX1 INP3", "RX1", "SLIM RX1"},
3331 {"RX1 MIX1 INP3", "RX2", "SLIM RX2"},
3332 {"RX1 MIX1 INP3", "RX3", "SLIM RX3"},
3333 {"RX1 MIX1 INP3", "RX4", "SLIM RX4"},
3334 {"RX1 MIX1 INP3", "RX5", "SLIM RX5"},
3335 {"RX1 MIX1 INP3", "RX6", "SLIM RX6"},
3336 {"RX1 MIX1 INP3", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003337 {"RX2 MIX1 INP1", "RX1", "SLIM RX1"},
3338 {"RX2 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303339 {"RX2 MIX1 INP1", "RX3", "SLIM RX3"},
3340 {"RX2 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003341 {"RX2 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003342 {"RX2 MIX1 INP1", "RX6", "SLIM RX6"},
3343 {"RX2 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003344 {"RX2 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003345 {"RX2 MIX1 INP2", "RX1", "SLIM RX1"},
3346 {"RX2 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303347 {"RX2 MIX1 INP2", "RX3", "SLIM RX3"},
3348 {"RX2 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003349 {"RX2 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003350 {"RX2 MIX1 INP2", "RX6", "SLIM RX6"},
3351 {"RX2 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003352 {"RX2 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003353 {"RX3 MIX1 INP1", "RX1", "SLIM RX1"},
3354 {"RX3 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303355 {"RX3 MIX1 INP1", "RX3", "SLIM RX3"},
3356 {"RX3 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003357 {"RX3 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003358 {"RX3 MIX1 INP1", "RX6", "SLIM RX6"},
3359 {"RX3 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003360 {"RX3 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003361 {"RX3 MIX1 INP2", "RX1", "SLIM RX1"},
3362 {"RX3 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303363 {"RX3 MIX1 INP2", "RX3", "SLIM RX3"},
3364 {"RX3 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003365 {"RX3 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003366 {"RX3 MIX1 INP2", "RX6", "SLIM RX6"},
3367 {"RX3 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003368 {"RX3 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003369 {"RX4 MIX1 INP1", "RX1", "SLIM RX1"},
3370 {"RX4 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303371 {"RX4 MIX1 INP1", "RX3", "SLIM RX3"},
3372 {"RX4 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003373 {"RX4 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003374 {"RX4 MIX1 INP1", "RX6", "SLIM RX6"},
3375 {"RX4 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003376 {"RX4 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003377 {"RX4 MIX1 INP2", "RX1", "SLIM RX1"},
3378 {"RX4 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303379 {"RX4 MIX1 INP2", "RX3", "SLIM RX3"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003380 {"RX4 MIX1 INP2", "RX5", "SLIM RX5"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303381 {"RX4 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003382 {"RX4 MIX1 INP2", "RX6", "SLIM RX6"},
3383 {"RX4 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003384 {"RX4 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003385 {"RX5 MIX1 INP1", "RX1", "SLIM RX1"},
3386 {"RX5 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303387 {"RX5 MIX1 INP1", "RX3", "SLIM RX3"},
3388 {"RX5 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003389 {"RX5 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003390 {"RX5 MIX1 INP1", "RX6", "SLIM RX6"},
3391 {"RX5 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003392 {"RX5 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003393 {"RX5 MIX1 INP2", "RX1", "SLIM RX1"},
3394 {"RX5 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303395 {"RX5 MIX1 INP2", "RX3", "SLIM RX3"},
3396 {"RX5 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003397 {"RX5 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003398 {"RX5 MIX1 INP2", "RX6", "SLIM RX6"},
3399 {"RX5 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003400 {"RX5 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003401 {"RX6 MIX1 INP1", "RX1", "SLIM RX1"},
3402 {"RX6 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303403 {"RX6 MIX1 INP1", "RX3", "SLIM RX3"},
3404 {"RX6 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003405 {"RX6 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003406 {"RX6 MIX1 INP1", "RX6", "SLIM RX6"},
3407 {"RX6 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003408 {"RX6 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003409 {"RX6 MIX1 INP2", "RX1", "SLIM RX1"},
3410 {"RX6 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303411 {"RX6 MIX1 INP2", "RX3", "SLIM RX3"},
3412 {"RX6 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003413 {"RX6 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003414 {"RX6 MIX1 INP2", "RX6", "SLIM RX6"},
3415 {"RX6 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003416 {"RX6 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003417 {"RX7 MIX1 INP1", "RX1", "SLIM RX1"},
3418 {"RX7 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303419 {"RX7 MIX1 INP1", "RX3", "SLIM RX3"},
3420 {"RX7 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003421 {"RX7 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003422 {"RX7 MIX1 INP1", "RX6", "SLIM RX6"},
3423 {"RX7 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003424 {"RX7 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003425 {"RX7 MIX1 INP2", "RX1", "SLIM RX1"},
3426 {"RX7 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303427 {"RX7 MIX1 INP2", "RX3", "SLIM RX3"},
3428 {"RX7 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003429 {"RX7 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003430 {"RX7 MIX1 INP2", "RX6", "SLIM RX6"},
3431 {"RX7 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003432 {"RX7 MIX1 INP2", "IIR1", "IIR1"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003433 {"RX1 MIX2 INP1", "IIR1", "IIR1"},
3434 {"RX1 MIX2 INP2", "IIR1", "IIR1"},
3435 {"RX2 MIX2 INP1", "IIR1", "IIR1"},
3436 {"RX2 MIX2 INP2", "IIR1", "IIR1"},
3437 {"RX3 MIX2 INP1", "IIR1", "IIR1"},
3438 {"RX3 MIX2 INP2", "IIR1", "IIR1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003439
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003440 /* Decimator Inputs */
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003441 {"DEC1 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003442 {"DEC1 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003443 {"DEC1 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003444 {"DEC2 MUX", "DMIC2", "DMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003445 {"DEC2 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003446 {"DEC2 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003447 {"DEC3 MUX", "DMIC3", "DMIC3"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003448 {"DEC3 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003449 {"DEC3 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07003450 {"DEC4 MUX", "DMIC4", "DMIC4"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003451 {"DEC4 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003452 {"DEC4 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07003453 {"DEC5 MUX", "DMIC5", "DMIC5"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003454 {"DEC5 MUX", "ADC2", "ADC2"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003455 {"DEC5 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07003456 {"DEC6 MUX", "DMIC6", "DMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003457 {"DEC6 MUX", "ADC1", "ADC1"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003458 {"DEC6 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003459 {"DEC7 MUX", "DMIC1", "DMIC1"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003460 {"DEC7 MUX", "DMIC6", "DMIC6"},
3461 {"DEC7 MUX", "ADC1", "ADC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003462 {"DEC7 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003463 {"DEC7 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003464 {"DEC8 MUX", "DMIC2", "DMIC2"},
3465 {"DEC8 MUX", "DMIC5", "DMIC5"},
3466 {"DEC8 MUX", "ADC2", "ADC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003467 {"DEC8 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003468 {"DEC8 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003469 {"DEC9 MUX", "DMIC4", "DMIC4"},
3470 {"DEC9 MUX", "DMIC5", "DMIC5"},
3471 {"DEC9 MUX", "ADC2", "ADC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003472 {"DEC9 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003473 {"DEC9 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003474 {"DEC10 MUX", "DMIC3", "DMIC3"},
3475 {"DEC10 MUX", "DMIC6", "DMIC6"},
3476 {"DEC10 MUX", "ADC1", "ADC1"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003477 {"DEC10 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003478 {"DEC10 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003479
3480 /* ADC Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003481 {"ADC1", NULL, "AMIC1"},
3482 {"ADC2", NULL, "AMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003483 {"ADC3", NULL, "AMIC3"},
3484 {"ADC4", NULL, "AMIC4"},
3485 {"ADC5", NULL, "AMIC5"},
3486 {"ADC6", NULL, "AMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003487
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003488 /* AUX PGA Connections */
3489 {"HPHL_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3490 {"HPHL_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3491 {"HPHL_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3492 {"HPHL_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3493 {"HPHR_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3494 {"HPHR_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3495 {"HPHR_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3496 {"HPHR_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3497 {"LINEOUT1_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3498 {"LINEOUT1_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3499 {"LINEOUT1_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3500 {"LINEOUT1_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3501 {"LINEOUT2_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3502 {"LINEOUT2_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3503 {"LINEOUT2_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3504 {"LINEOUT2_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3505 {"LINEOUT3_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3506 {"LINEOUT3_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3507 {"LINEOUT3_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3508 {"LINEOUT3_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3509 {"LINEOUT4_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3510 {"LINEOUT4_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3511 {"LINEOUT4_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3512 {"LINEOUT4_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3513 {"LINEOUT5_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3514 {"LINEOUT5_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3515 {"LINEOUT5_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3516 {"LINEOUT5_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3517 {"EAR_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3518 {"EAR_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3519 {"EAR_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3520 {"EAR_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3521 {"AUX_PGA_Left", NULL, "AMIC5"},
3522 {"AUX_PGA_Right", NULL, "AMIC6"},
3523
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003524 {"IIR1", NULL, "IIR1 INP1 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07003525 {"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
3526 {"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
3527 {"IIR1 INP1 MUX", "DEC3", "DEC3 MUX"},
3528 {"IIR1 INP1 MUX", "DEC4", "DEC4 MUX"},
3529 {"IIR1 INP1 MUX", "DEC5", "DEC5 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003530 {"IIR1 INP1 MUX", "DEC6", "DEC6 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07003531 {"IIR1 INP1 MUX", "DEC7", "DEC7 MUX"},
3532 {"IIR1 INP1 MUX", "DEC8", "DEC8 MUX"},
3533 {"IIR1 INP1 MUX", "DEC9", "DEC9 MUX"},
3534 {"IIR1 INP1 MUX", "DEC10", "DEC10 MUX"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003535
3536 {"MIC BIAS1 Internal1", NULL, "LDO_H"},
3537 {"MIC BIAS1 Internal2", NULL, "LDO_H"},
3538 {"MIC BIAS1 External", NULL, "LDO_H"},
3539 {"MIC BIAS2 Internal1", NULL, "LDO_H"},
3540 {"MIC BIAS2 Internal2", NULL, "LDO_H"},
3541 {"MIC BIAS2 Internal3", NULL, "LDO_H"},
3542 {"MIC BIAS2 External", NULL, "LDO_H"},
3543 {"MIC BIAS3 Internal1", NULL, "LDO_H"},
3544 {"MIC BIAS3 Internal2", NULL, "LDO_H"},
3545 {"MIC BIAS3 External", NULL, "LDO_H"},
3546 {"MIC BIAS4 External", NULL, "LDO_H"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003547};
3548
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003549static const struct snd_soc_dapm_route tabla_1_x_lineout_2_to_4_map[] = {
3550
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003551 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003552 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
3553
3554 {"LINEOUT2 DAC", NULL, "RX4 DSM MUX"},
3555
3556 {"LINEOUT3 DAC", NULL, "RX5 MIX1"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003557 {"LINEOUT3 DAC GROUND", "Switch", "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003558 {"LINEOUT3 DAC", NULL, "LINEOUT3 DAC GROUND"},
3559
3560 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
3561 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
3562
3563 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
3564 {"LINEOUT4 DAC GROUND", "Switch", "RX4 DSM MUX"},
3565 {"LINEOUT4 DAC", NULL, "LINEOUT4 DAC GROUND"},
3566};
3567
Kiran Kandi7a9fd902011-11-14 13:51:45 -08003568
3569static const struct snd_soc_dapm_route tabla_2_x_lineout_2_to_4_map[] = {
3570
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003571 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX2"},
Kiran Kandi7a9fd902011-11-14 13:51:45 -08003572 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
3573
3574 {"LINEOUT3 DAC", NULL, "RX4 DSM MUX"},
3575
3576 {"LINEOUT2 DAC", NULL, "RX5 MIX1"},
3577
3578 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
3579 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
3580
3581 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
3582};
3583
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003584static int tabla_readable(struct snd_soc_codec *ssc, unsigned int reg)
3585{
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003586 int i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303587 struct wcd9xxx *tabla_core = dev_get_drvdata(ssc->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003588
3589 if (TABLA_IS_1_X(tabla_core->version)) {
3590 for (i = 0; i < ARRAY_SIZE(tabla_1_reg_readable); i++) {
3591 if (tabla_1_reg_readable[i] == reg)
3592 return 1;
3593 }
3594 } else {
3595 for (i = 0; i < ARRAY_SIZE(tabla_2_reg_readable); i++) {
3596 if (tabla_2_reg_readable[i] == reg)
3597 return 1;
3598 }
3599 }
3600
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003601 return tabla_reg_readable[reg];
3602}
Kuirong Wange9c8a222012-03-28 16:24:09 -07003603static bool tabla_is_digital_gain_register(unsigned int reg)
3604{
3605 bool rtn = false;
3606 switch (reg) {
3607 case TABLA_A_CDC_RX1_VOL_CTL_B2_CTL:
3608 case TABLA_A_CDC_RX2_VOL_CTL_B2_CTL:
3609 case TABLA_A_CDC_RX3_VOL_CTL_B2_CTL:
3610 case TABLA_A_CDC_RX4_VOL_CTL_B2_CTL:
3611 case TABLA_A_CDC_RX5_VOL_CTL_B2_CTL:
3612 case TABLA_A_CDC_RX6_VOL_CTL_B2_CTL:
3613 case TABLA_A_CDC_RX7_VOL_CTL_B2_CTL:
3614 case TABLA_A_CDC_TX1_VOL_CTL_GAIN:
3615 case TABLA_A_CDC_TX2_VOL_CTL_GAIN:
3616 case TABLA_A_CDC_TX3_VOL_CTL_GAIN:
3617 case TABLA_A_CDC_TX4_VOL_CTL_GAIN:
3618 case TABLA_A_CDC_TX5_VOL_CTL_GAIN:
3619 case TABLA_A_CDC_TX6_VOL_CTL_GAIN:
3620 case TABLA_A_CDC_TX7_VOL_CTL_GAIN:
3621 case TABLA_A_CDC_TX8_VOL_CTL_GAIN:
3622 case TABLA_A_CDC_TX9_VOL_CTL_GAIN:
3623 case TABLA_A_CDC_TX10_VOL_CTL_GAIN:
3624 rtn = true;
3625 break;
3626 default:
3627 break;
3628 }
3629 return rtn;
3630}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003631static int tabla_volatile(struct snd_soc_codec *ssc, unsigned int reg)
3632{
3633 /* Registers lower than 0x100 are top level registers which can be
3634 * written by the Tabla core driver.
3635 */
3636
3637 if ((reg >= TABLA_A_CDC_MBHC_EN_CTL) || (reg < 0x100))
3638 return 1;
3639
Ben Romberger1f045a72011-11-04 10:14:57 -07003640 /* IIR Coeff registers are not cacheable */
3641 if ((reg >= TABLA_A_CDC_IIR1_COEF_B1_CTL) &&
3642 (reg <= TABLA_A_CDC_IIR2_COEF_B5_CTL))
3643 return 1;
3644
Kuirong Wange9c8a222012-03-28 16:24:09 -07003645 /* Digital gain register is not cacheable so we have to write
3646 * the setting even it is the same
3647 */
3648 if (tabla_is_digital_gain_register(reg))
3649 return 1;
3650
Joonwoo Parkab2c5872012-05-03 15:16:02 -07003651 /* HPH status registers */
3652 if (reg == TABLA_A_RX_HPH_L_STATUS || reg == TABLA_A_RX_HPH_R_STATUS)
3653 return 1;
3654
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003655 return 0;
3656}
3657
3658#define TABLA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
3659static int tabla_write(struct snd_soc_codec *codec, unsigned int reg,
3660 unsigned int value)
3661{
3662 int ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003663 BUG_ON(reg > TABLA_MAX_REGISTER);
3664
3665 if (!tabla_volatile(codec, reg)) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003666 ret = snd_soc_cache_write(codec, reg, value);
3667 if (ret != 0)
3668 dev_err(codec->dev, "Cache write to %x failed: %d\n",
3669 reg, ret);
3670 }
3671
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303672 return wcd9xxx_reg_write(codec->control_data, reg, value);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003673}
3674static unsigned int tabla_read(struct snd_soc_codec *codec,
3675 unsigned int reg)
3676{
3677 unsigned int val;
3678 int ret;
3679
3680 BUG_ON(reg > TABLA_MAX_REGISTER);
3681
3682 if (!tabla_volatile(codec, reg) && tabla_readable(codec, reg) &&
3683 reg < codec->driver->reg_cache_size) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003684 ret = snd_soc_cache_read(codec, reg, &val);
3685 if (ret >= 0) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003686 return val;
3687 } else
3688 dev_err(codec->dev, "Cache read from %x failed: %d\n",
3689 reg, ret);
3690 }
3691
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303692 val = wcd9xxx_reg_read(codec->control_data, reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003693 return val;
3694}
3695
Joonwoo Parkcf473b42012-03-29 19:48:16 -07003696static s16 tabla_get_current_v_ins(struct tabla_priv *tabla, bool hu)
3697{
3698 s16 v_ins;
3699 if ((tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) &&
3700 tabla->mbhc_micbias_switched)
3701 v_ins = hu ? (s16)tabla->mbhc_data.adj_v_ins_hu :
3702 (s16)tabla->mbhc_data.adj_v_ins_h;
3703 else
3704 v_ins = hu ? (s16)tabla->mbhc_data.v_ins_hu :
3705 (s16)tabla->mbhc_data.v_ins_h;
3706 return v_ins;
3707}
3708
3709static s16 tabla_get_current_v_hs_max(struct tabla_priv *tabla)
3710{
3711 s16 v_hs_max;
3712 struct tabla_mbhc_plug_type_cfg *plug_type;
3713
3714 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
3715 if ((tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) &&
3716 tabla->mbhc_micbias_switched)
3717 v_hs_max = tabla->mbhc_data.adj_v_hs_max;
3718 else
3719 v_hs_max = plug_type->v_hs_max;
3720 return v_hs_max;
3721}
3722
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07003723static void tabla_codec_calibrate_rel(struct snd_soc_codec *codec)
Bradley Rubincb1e2732011-06-23 16:49:20 -07003724{
Joonwoo Park0976d012011-12-22 11:48:18 -08003725 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003726
Joonwoo Park0976d012011-12-22 11:48:18 -08003727 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL,
3728 tabla->mbhc_data.v_b1_hu & 0xFF);
3729 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
3730 (tabla->mbhc_data.v_b1_hu >> 8) & 0xFF);
3731
3732 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL,
3733 tabla->mbhc_data.v_b1_h & 0xFF);
3734 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL,
3735 (tabla->mbhc_data.v_b1_h >> 8) & 0xFF);
3736
3737 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B9_CTL,
3738 tabla->mbhc_data.v_brh & 0xFF);
3739 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B10_CTL,
3740 (tabla->mbhc_data.v_brh >> 8) & 0xFF);
3741
3742 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B11_CTL,
3743 tabla->mbhc_data.v_brl & 0xFF);
3744 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B12_CTL,
3745 (tabla->mbhc_data.v_brl >> 8) & 0xFF);
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07003746}
3747
3748static void tabla_codec_calibrate_hs_polling(struct snd_soc_codec *codec)
3749{
3750 u8 *n_ready, *n_cic;
3751 struct tabla_mbhc_btn_detect_cfg *btn_det;
3752 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
3753 const s16 v_ins_hu = tabla_get_current_v_ins(tabla, true);
3754
3755 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
3756
3757 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
3758 v_ins_hu & 0xFF);
3759 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
3760 (v_ins_hu >> 8) & 0xFF);
3761
3762 tabla_codec_calibrate_rel(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08003763
Joonwoo Parkc0672392012-01-11 11:03:14 -08003764 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Park0976d012011-12-22 11:48:18 -08003765 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B1_CTL,
Joonwoo Parkc0672392012-01-11 11:03:14 -08003766 n_ready[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08003767 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B2_CTL,
3768 tabla->mbhc_data.npoll);
3769 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B3_CTL,
3770 tabla->mbhc_data.nbounce_wait);
Joonwoo Park0976d012011-12-22 11:48:18 -08003771 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08003772 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL,
3773 n_cic[tabla_codec_mclk_index(tabla)]);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003774}
3775
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003776static int tabla_startup(struct snd_pcm_substream *substream,
3777 struct snd_soc_dai *dai)
3778{
Kuirong Wanga545e722012-02-06 19:12:54 -08003779 struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003780 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
3781 substream->name, substream->stream);
Kuirong Wanga545e722012-02-06 19:12:54 -08003782 if ((tabla_core != NULL) &&
3783 (tabla_core->dev != NULL) &&
3784 (tabla_core->dev->parent != NULL))
3785 pm_runtime_get_sync(tabla_core->dev->parent);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003786
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003787 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003788}
3789
Ajay Dudani506f81c2012-08-23 16:01:50 -07003790static void tabla_shutdown(struct snd_pcm_substream *substream,
3791 struct snd_soc_dai *dai)
3792{
3793 struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
3794 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
3795 u32 active = 0;
3796
3797 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
3798 substream->name, substream->stream);
3799 if (tabla->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
3800 return;
3801
3802 if (dai->id <= NUM_CODEC_DAIS) {
3803 if (tabla->dai[dai->id-1].ch_mask) {
3804 active = 1;
3805 pr_debug("%s(): Codec DAI: chmask[%d] = 0x%x\n",
3806 __func__, dai->id-1, tabla->dai[dai->id-1].ch_mask);
3807 }
3808 }
3809
3810 if ((tabla_core != NULL) &&
3811 (tabla_core->dev != NULL) &&
3812 (tabla_core->dev->parent != NULL) &&
3813 (active == 0)) {
3814 pm_runtime_mark_last_busy(tabla_core->dev->parent);
3815 pm_runtime_put(tabla_core->dev->parent);
3816 }
3817}
3818
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003819int tabla_mclk_enable(struct snd_soc_codec *codec, int mclk_enable, bool dapm)
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003820{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003821 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
3822
Joonwoo Parkcf473b42012-03-29 19:48:16 -07003823 pr_debug("%s: mclk_enable = %u, dapm = %d\n", __func__, mclk_enable,
3824 dapm);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003825 if (dapm)
3826 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003827 if (mclk_enable) {
3828 tabla->mclk_enabled = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003829
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003830 if (tabla->mbhc_polling_active) {
Bradley Rubincb1e2732011-06-23 16:49:20 -07003831 tabla_codec_pause_hs_polling(codec);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003832 tabla_codec_disable_clock_block(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003833 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003834 TABLA_BANDGAP_AUDIO_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003835 tabla_codec_enable_clock_block(codec, 0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003836 tabla_codec_calibrate_hs_polling(codec);
3837 tabla_codec_start_hs_polling(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303838 } else {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003839 tabla_codec_disable_clock_block(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303840 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003841 TABLA_BANDGAP_AUDIO_MODE);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303842 tabla_codec_enable_clock_block(codec, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003843 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003844 } else {
3845
3846 if (!tabla->mclk_enabled) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003847 if (dapm)
3848 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003849 pr_err("Error, MCLK already diabled\n");
3850 return -EINVAL;
3851 }
3852 tabla->mclk_enabled = false;
3853
3854 if (tabla->mbhc_polling_active) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003855 tabla_codec_pause_hs_polling(codec);
3856 tabla_codec_disable_clock_block(codec);
3857 tabla_codec_enable_bandgap(codec,
3858 TABLA_BANDGAP_MBHC_MODE);
3859 tabla_enable_rx_bias(codec, 1);
3860 tabla_codec_enable_clock_block(codec, 1);
3861 tabla_codec_calibrate_hs_polling(codec);
3862 tabla_codec_start_hs_polling(codec);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003863 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1,
3864 0x05, 0x01);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303865 } else {
3866 tabla_codec_disable_clock_block(codec);
3867 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003868 TABLA_BANDGAP_OFF);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003869 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003870 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003871 if (dapm)
3872 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003873 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003874}
3875
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003876static int tabla_set_dai_sysclk(struct snd_soc_dai *dai,
3877 int clk_id, unsigned int freq, int dir)
3878{
3879 pr_debug("%s\n", __func__);
3880 return 0;
3881}
3882
3883static int tabla_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
3884{
Santosh Mardie15e2302011-11-15 10:39:23 +05303885 u8 val = 0;
3886 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
3887
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003888 pr_debug("%s\n", __func__);
Santosh Mardie15e2302011-11-15 10:39:23 +05303889 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
3890 case SND_SOC_DAIFMT_CBS_CFS:
3891 /* CPU is master */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303892 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003893 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05303894 snd_soc_update_bits(dai->codec,
3895 TABLA_A_CDC_CLK_TX_I2S_CTL,
3896 TABLA_I2S_MASTER_MODE_MASK, 0);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003897 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05303898 snd_soc_update_bits(dai->codec,
3899 TABLA_A_CDC_CLK_RX_I2S_CTL,
3900 TABLA_I2S_MASTER_MODE_MASK, 0);
3901 }
3902 break;
3903 case SND_SOC_DAIFMT_CBM_CFM:
3904 /* CPU is slave */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303905 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05303906 val = TABLA_I2S_MASTER_MODE_MASK;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003907 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05303908 snd_soc_update_bits(dai->codec,
3909 TABLA_A_CDC_CLK_TX_I2S_CTL, val, val);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003910 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05303911 snd_soc_update_bits(dai->codec,
3912 TABLA_A_CDC_CLK_RX_I2S_CTL, val, val);
3913 }
3914 break;
3915 default:
3916 return -EINVAL;
3917 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003918 return 0;
3919}
3920
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003921static int tabla_set_channel_map(struct snd_soc_dai *dai,
3922 unsigned int tx_num, unsigned int *tx_slot,
3923 unsigned int rx_num, unsigned int *rx_slot)
3924
3925{
3926 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
3927 u32 i = 0;
3928 if (!tx_slot && !rx_slot) {
3929 pr_err("%s: Invalid\n", __func__);
3930 return -EINVAL;
3931 }
Kiran Kandia9fffe92012-05-20 23:42:30 -07003932 pr_debug("%s(): dai_name = %s DAI-ID %x tx_ch %d rx_ch %d\n",
3933 __func__, dai->name, dai->id, tx_num, rx_num);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003934
Kiran Kandia9fffe92012-05-20 23:42:30 -07003935 if (dai->id == AIF1_PB || dai->id == AIF2_PB || dai->id == AIF3_PB) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003936 for (i = 0; i < rx_num; i++) {
3937 tabla->dai[dai->id - 1].ch_num[i] = rx_slot[i];
3938 tabla->dai[dai->id - 1].ch_act = 0;
3939 tabla->dai[dai->id - 1].ch_tot = rx_num;
3940 }
Neema Shetty3fb1b802012-04-27 13:53:24 -07003941 } else if (dai->id == AIF1_CAP || dai->id == AIF2_CAP ||
3942 dai->id == AIF3_CAP) {
Swaminathan Sathappan8644fb32012-08-01 12:53:03 -07003943 tabla->dai[dai->id - 1].ch_tot = tx_num;
3944 /* All channels are already active.
3945 * do not reset ch_act flag
3946 */
3947 if ((tabla->dai[dai->id - 1].ch_tot != 0)
3948 && (tabla->dai[dai->id - 1].ch_act ==
3949 tabla->dai[dai->id - 1].ch_tot)) {
3950 pr_info("%s: ch_act = %d, ch_tot = %d\n", __func__,
3951 tabla->dai[dai->id - 1].ch_act,
3952 tabla->dai[dai->id - 1].ch_tot);
3953 return 0;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003954 }
Swaminathan Sathappan8644fb32012-08-01 12:53:03 -07003955
3956 tabla->dai[dai->id - 1].ch_act = 0;
3957 for (i = 0; i < tx_num; i++)
3958 tabla->dai[dai->id - 1].ch_num[i] = tx_slot[i];
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003959 }
3960 return 0;
3961}
3962
3963static int tabla_get_channel_map(struct snd_soc_dai *dai,
3964 unsigned int *tx_num, unsigned int *tx_slot,
3965 unsigned int *rx_num, unsigned int *rx_slot)
3966
3967{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303968 struct wcd9xxx *tabla = dev_get_drvdata(dai->codec->control_data);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003969
3970 u32 cnt = 0;
3971 u32 tx_ch[SLIM_MAX_TX_PORTS];
3972 u32 rx_ch[SLIM_MAX_RX_PORTS];
3973
3974 if (!rx_slot && !tx_slot) {
3975 pr_err("%s: Invalid\n", __func__);
3976 return -EINVAL;
3977 }
Kiran Kandia9fffe92012-05-20 23:42:30 -07003978
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003979 /* for virtual port, codec driver needs to do
3980 * housekeeping, for now should be ok
3981 */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303982 wcd9xxx_get_channel(tabla, rx_ch, tx_ch);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003983 if (dai->id == AIF1_PB) {
3984 *rx_num = tabla_dai[dai->id - 1].playback.channels_max;
3985 while (cnt < *rx_num) {
3986 rx_slot[cnt] = rx_ch[cnt];
3987 cnt++;
3988 }
3989 } else if (dai->id == AIF1_CAP) {
3990 *tx_num = tabla_dai[dai->id - 1].capture.channels_max;
3991 while (cnt < *tx_num) {
3992 tx_slot[cnt] = tx_ch[6 + cnt];
3993 cnt++;
3994 }
Neema Shettyd3a89262012-02-16 10:23:50 -08003995 } else if (dai->id == AIF2_PB) {
3996 *rx_num = tabla_dai[dai->id - 1].playback.channels_max;
3997 while (cnt < *rx_num) {
3998 rx_slot[cnt] = rx_ch[5 + cnt];
3999 cnt++;
4000 }
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004001 } else if (dai->id == AIF2_CAP) {
4002 *tx_num = tabla_dai[dai->id - 1].capture.channels_max;
4003 tx_slot[0] = tx_ch[cnt];
4004 tx_slot[1] = tx_ch[1 + cnt];
Kiran Kandi323d7102012-04-18 19:56:14 -07004005 tx_slot[2] = tx_ch[5 + cnt];
Kiran Kandie408b842012-05-17 19:48:04 -07004006 tx_slot[3] = tx_ch[3 + cnt];
Kiran Kandia9fffe92012-05-20 23:42:30 -07004007
4008 } else if (dai->id == AIF3_PB) {
4009 *rx_num = tabla_dai[dai->id - 1].playback.channels_max;
4010 rx_slot[0] = rx_ch[3];
4011 rx_slot[1] = rx_ch[4];
4012
Neema Shetty3fb1b802012-04-27 13:53:24 -07004013 } else if (dai->id == AIF3_CAP) {
4014 *tx_num = tabla_dai[dai->id - 1].capture.channels_max;
4015 tx_slot[cnt] = tx_ch[2 + cnt];
4016 tx_slot[cnt + 1] = tx_ch[4 + cnt];
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004017 }
Kiran Kandia9fffe92012-05-20 23:42:30 -07004018 pr_debug("%s(): dai_name = %s DAI-ID %x tx_ch %d rx_ch %d\n",
4019 __func__, dai->name, dai->id, *tx_num, *rx_num);
4020
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004021
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004022 return 0;
4023}
4024
Kiran Kandi93923902012-06-20 17:00:25 -07004025
4026static struct snd_soc_dapm_widget tabla_dapm_aif_in_widgets[] = {
4027
4028 SND_SOC_DAPM_AIF_IN_E("SLIM RX1", "AIF1 Playback", 0, SND_SOC_NOPM, 1,
4029 0, tabla_codec_enable_slimrx,
4030 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4031
4032 SND_SOC_DAPM_AIF_IN_E("SLIM RX2", "AIF1 Playback", 0, SND_SOC_NOPM, 2,
4033 0, tabla_codec_enable_slimrx,
4034 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4035
4036 SND_SOC_DAPM_AIF_IN_E("SLIM RX3", "AIF1 Playback", 0, SND_SOC_NOPM, 3,
4037 0, tabla_codec_enable_slimrx,
4038 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4039
4040 SND_SOC_DAPM_AIF_IN_E("SLIM RX4", "AIF3 Playback", 0, SND_SOC_NOPM, 4,
4041 0, tabla_codec_enable_slimrx,
4042 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4043
4044 SND_SOC_DAPM_AIF_IN_E("SLIM RX5", "AIF3 Playback", 0, SND_SOC_NOPM, 5,
4045 0, tabla_codec_enable_slimrx,
4046 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4047
4048 SND_SOC_DAPM_AIF_IN_E("SLIM RX6", "AIF2 Playback", 0, SND_SOC_NOPM, 6,
4049 0, tabla_codec_enable_slimrx,
4050 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4051
4052 SND_SOC_DAPM_AIF_IN_E("SLIM RX7", "AIF2 Playback", 0, SND_SOC_NOPM, 7,
4053 0, tabla_codec_enable_slimrx,
4054 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4055};
4056
4057static struct snd_soc_dapm_widget tabla_dapm_aif_out_widgets[] = {
4058
4059 SND_SOC_DAPM_AIF_OUT_E("SLIM TX1", "AIF2 Capture", 0, SND_SOC_NOPM, 1,
4060 0, tabla_codec_enable_slimtx,
4061 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4062
4063 SND_SOC_DAPM_AIF_OUT_E("SLIM TX2", "AIF2 Capture", 0, SND_SOC_NOPM, 2,
4064 0, tabla_codec_enable_slimtx,
4065 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4066
4067 SND_SOC_DAPM_AIF_OUT_E("SLIM TX3", "AIF3 Capture", 0, SND_SOC_NOPM, 3,
4068 0, tabla_codec_enable_slimtx,
4069 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4070
4071 SND_SOC_DAPM_AIF_OUT_E("SLIM TX4", "AIF2 Capture", 0, SND_SOC_NOPM, 4,
4072 0, tabla_codec_enable_slimtx,
4073 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4074
4075 SND_SOC_DAPM_AIF_OUT_E("SLIM TX5", "AIF3 Capture", 0, SND_SOC_NOPM, 5,
4076 0, tabla_codec_enable_slimtx,
4077 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4078
4079 SND_SOC_DAPM_AIF_OUT_E("SLIM TX6", "AIF2 Capture", 0, SND_SOC_NOPM, 6,
4080 0, tabla_codec_enable_slimtx,
4081 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4082
4083 SND_SOC_DAPM_AIF_OUT_E("SLIM TX7", "AIF1 Capture", 0, SND_SOC_NOPM, 7,
4084 0, tabla_codec_enable_slimtx,
4085 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4086
4087 SND_SOC_DAPM_AIF_OUT_E("SLIM TX8", "AIF1 Capture", 0, SND_SOC_NOPM, 8,
4088 0, tabla_codec_enable_slimtx,
4089 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4090
4091 SND_SOC_DAPM_AIF_OUT_E("SLIM TX9", "AIF1 Capture", 0, SND_SOC_NOPM, 9,
4092 0, tabla_codec_enable_slimtx,
4093 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4094
4095 SND_SOC_DAPM_AIF_OUT_E("SLIM TX10", "AIF1 Capture", 0, SND_SOC_NOPM, 10,
4096 0, tabla_codec_enable_slimtx,
4097 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4098};
4099
4100static int tabla_set_interpolator_rate(struct snd_soc_dai *dai,
4101 u8 rx_fs_rate_reg_val, u32 compander_fs, u32 sample_rate)
4102{
4103 u32 i, j;
4104 u8 rx_mix1_inp;
4105 u16 rx_mix_1_reg_1, rx_mix_1_reg_2;
4106 u16 rx_fs_reg;
4107 u8 rx_mix_1_reg_1_val, rx_mix_1_reg_2_val;
4108 struct snd_soc_codec *codec = dai->codec;
4109 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
4110 struct snd_soc_dapm_widget *w = tabla_dapm_aif_in_widgets;
4111
4112 for (i = 0; i < ARRAY_SIZE(tabla_dapm_aif_in_widgets); i++) {
4113
4114 if (strncmp(dai->driver->playback.stream_name, w[i].sname, 13))
4115 continue;
4116
4117 rx_mix1_inp = w[i].shift + 4;
4118
4119 if ((rx_mix1_inp < 0x5) || (rx_mix1_inp > 0xB)) {
4120
4121 pr_err("%s: Invalid SLIM RX%u port. widget = %s\n",
4122 __func__, rx_mix1_inp - 4 , w[i].name);
4123 return -EINVAL;
4124 }
4125
4126 rx_mix_1_reg_1 = TABLA_A_CDC_CONN_RX1_B1_CTL;
4127
4128 for (j = 0; j < NUM_INTERPOLATORS; j++) {
4129
4130 rx_mix_1_reg_2 = rx_mix_1_reg_1 + 1;
4131
4132 rx_mix_1_reg_1_val = snd_soc_read(codec,
4133 rx_mix_1_reg_1);
4134 rx_mix_1_reg_2_val = snd_soc_read(codec,
4135 rx_mix_1_reg_2);
4136
4137 if (((rx_mix_1_reg_1_val & 0x0F) == rx_mix1_inp) ||
4138 (((rx_mix_1_reg_1_val >> 4) & 0x0F) == rx_mix1_inp)
4139 || ((rx_mix_1_reg_2_val & 0x0F) == rx_mix1_inp)) {
4140
4141 rx_fs_reg = TABLA_A_CDC_RX1_B5_CTL + 8 * j;
4142
4143 pr_debug("%s: %s connected to RX%u\n", __func__,
4144 w[i].name, j + 1);
4145
4146 pr_debug("%s: set RX%u sample rate to %u\n",
4147 __func__, j + 1, sample_rate);
4148
4149 snd_soc_update_bits(codec, rx_fs_reg,
4150 0xE0, rx_fs_rate_reg_val);
4151
4152 if (comp_rx_path[j] < COMPANDER_MAX)
4153 tabla->comp_fs[comp_rx_path[j]]
4154 = compander_fs;
4155 }
4156 if (j <= 2)
4157 rx_mix_1_reg_1 += 3;
4158 else
4159 rx_mix_1_reg_1 += 2;
4160 }
4161 }
4162 return 0;
4163}
4164
4165static int tabla_set_decimator_rate(struct snd_soc_dai *dai,
4166 u8 tx_fs_rate_reg_val, u32 sample_rate)
4167{
4168 struct snd_soc_codec *codec = dai->codec;
4169 struct snd_soc_dapm_widget *w = tabla_dapm_aif_out_widgets;
4170
4171 u32 i, tx_port;
4172 u16 tx_port_reg, tx_fs_reg;
4173 u8 tx_port_reg_val;
4174 s8 decimator;
4175
4176 for (i = 0; i < ARRAY_SIZE(tabla_dapm_aif_out_widgets); i++) {
4177
4178 if (strncmp(dai->driver->capture.stream_name, w[i].sname, 12))
4179 continue;
4180
4181 tx_port = w[i].shift;
4182
4183 if ((tx_port < 1) || (tx_port > NUM_DECIMATORS)) {
4184 pr_err("%s: Invalid SLIM TX%u port. widget = %s\n",
4185 __func__, tx_port, w[i].name);
4186 return -EINVAL;
4187 }
4188
4189 tx_port_reg = TABLA_A_CDC_CONN_TX_SB_B1_CTL + (tx_port - 1);
4190 tx_port_reg_val = snd_soc_read(codec, tx_port_reg);
4191
4192 decimator = 0;
4193
4194 if ((tx_port >= 1) && (tx_port <= 6)) {
4195
4196 tx_port_reg_val = tx_port_reg_val & 0x0F;
4197 if (tx_port_reg_val == 0x8)
4198 decimator = tx_port;
4199
4200 } else if ((tx_port >= 7) && (tx_port <= NUM_DECIMATORS)) {
4201
4202 tx_port_reg_val = tx_port_reg_val & 0x1F;
4203
4204 if ((tx_port_reg_val >= 0x8) &&
4205 (tx_port_reg_val <= 0x11)) {
4206
4207 decimator = (tx_port_reg_val - 0x8) + 1;
4208 }
4209 }
4210
4211 if (decimator) { /* SLIM_TX port has a DEC as input */
4212
4213 tx_fs_reg = TABLA_A_CDC_TX1_CLK_FS_CTL +
4214 8 * (decimator - 1);
4215
4216 pr_debug("%s: set DEC%u (-> SLIM_TX%u) rate to %u\n",
4217 __func__, decimator, tx_port, sample_rate);
4218
4219 snd_soc_update_bits(codec, tx_fs_reg, 0x07,
4220 tx_fs_rate_reg_val);
4221
4222 } else {
4223 if ((tx_port_reg_val >= 0x1) &&
4224 (tx_port_reg_val <= 0x7)) {
4225
4226 pr_debug("%s: RMIX%u going to SLIM TX%u\n",
4227 __func__, tx_port_reg_val, tx_port);
4228
4229 } else if ((tx_port_reg_val >= 0x8) &&
4230 (tx_port_reg_val <= 0x11)) {
4231
4232 pr_err("%s: ERROR: Should not be here\n",
4233 __func__);
4234 pr_err("%s: ERROR: DEC connected to SLIM TX%u\n"
4235 , __func__, tx_port);
4236 return -EINVAL;
4237
4238 } else if (tx_port_reg_val == 0) {
4239 pr_debug("%s: no signal to SLIM TX%u\n",
4240 __func__, tx_port);
4241 } else {
4242 pr_err("%s: ERROR: wrong signal to SLIM TX%u\n"
4243 , __func__, tx_port);
4244 pr_err("%s: ERROR: wrong signal = %u\n"
4245 , __func__, tx_port_reg_val);
4246 return -EINVAL;
4247 }
4248 }
4249 }
4250 return 0;
4251}
4252
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004253static int tabla_hw_params(struct snd_pcm_substream *substream,
Kiran Kandi93923902012-06-20 17:00:25 -07004254 struct snd_pcm_hw_params *params,
4255 struct snd_soc_dai *dai)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004256{
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004257 struct snd_soc_codec *codec = dai->codec;
Santosh Mardie15e2302011-11-15 10:39:23 +05304258 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
Kiran Kandi93923902012-06-20 17:00:25 -07004259 u8 tx_fs_rate_reg_val, rx_fs_rate_reg_val;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004260 u32 compander_fs;
Kiran Kandi93923902012-06-20 17:00:25 -07004261 int ret;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004262
Kiran Kandia9fffe92012-05-20 23:42:30 -07004263 pr_debug("%s: dai_name = %s DAI-ID %x rate %d num_ch %d\n", __func__,
Kiran Kandi93923902012-06-20 17:00:25 -07004264 dai->name, dai->id, params_rate(params),
4265 params_channels(params));
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004266
4267 switch (params_rate(params)) {
4268 case 8000:
Kiran Kandi93923902012-06-20 17:00:25 -07004269 tx_fs_rate_reg_val = 0x00;
4270 rx_fs_rate_reg_val = 0x00;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004271 compander_fs = COMPANDER_FS_8KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004272 break;
4273 case 16000:
Kiran Kandi93923902012-06-20 17:00:25 -07004274 tx_fs_rate_reg_val = 0x01;
4275 rx_fs_rate_reg_val = 0x20;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004276 compander_fs = COMPANDER_FS_16KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004277 break;
4278 case 32000:
Kiran Kandi93923902012-06-20 17:00:25 -07004279 tx_fs_rate_reg_val = 0x02;
4280 rx_fs_rate_reg_val = 0x40;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004281 compander_fs = COMPANDER_FS_32KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004282 break;
4283 case 48000:
Kiran Kandi93923902012-06-20 17:00:25 -07004284 tx_fs_rate_reg_val = 0x03;
4285 rx_fs_rate_reg_val = 0x60;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004286 compander_fs = COMPANDER_FS_48KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004287 break;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004288 case 96000:
Kiran Kandi93923902012-06-20 17:00:25 -07004289 tx_fs_rate_reg_val = 0x04;
4290 rx_fs_rate_reg_val = 0x80;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004291 compander_fs = COMPANDER_FS_96KHZ;
4292 break;
4293 case 192000:
Kiran Kandi93923902012-06-20 17:00:25 -07004294 tx_fs_rate_reg_val = 0x05;
4295 rx_fs_rate_reg_val = 0xA0;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004296 compander_fs = COMPANDER_FS_192KHZ;
4297 break;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004298 default:
4299 pr_err("%s: Invalid sampling rate %d\n", __func__,
4300 params_rate(params));
4301 return -EINVAL;
4302 }
4303
Kiran Kandi93923902012-06-20 17:00:25 -07004304 switch (substream->stream) {
4305 case SNDRV_PCM_STREAM_CAPTURE:
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004306
Kiran Kandi93923902012-06-20 17:00:25 -07004307 ret = tabla_set_decimator_rate(dai, tx_fs_rate_reg_val,
4308 params_rate(params));
4309 if (ret < 0) {
4310 pr_err("%s: set decimator rate failed %d\n", __func__,
4311 ret);
4312 return ret;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004313 }
Kiran Kandi93923902012-06-20 17:00:25 -07004314
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304315 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05304316 switch (params_format(params)) {
4317 case SNDRV_PCM_FORMAT_S16_LE:
4318 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004319 TABLA_A_CDC_CLK_TX_I2S_CTL, 0x20, 0x20);
Santosh Mardie15e2302011-11-15 10:39:23 +05304320 break;
4321 case SNDRV_PCM_FORMAT_S32_LE:
4322 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004323 TABLA_A_CDC_CLK_TX_I2S_CTL, 0x20, 0x00);
Santosh Mardie15e2302011-11-15 10:39:23 +05304324 break;
4325 default:
Kiran Kandi93923902012-06-20 17:00:25 -07004326 pr_err("%s: invalid TX format %u\n", __func__,
4327 params_format(params));
4328 return -EINVAL;
Santosh Mardie15e2302011-11-15 10:39:23 +05304329 }
4330 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_TX_I2S_CTL,
Kiran Kandi93923902012-06-20 17:00:25 -07004331 0x07, tx_fs_rate_reg_val);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004332 } else {
4333 tabla->dai[dai->id - 1].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05304334 }
Kiran Kandi93923902012-06-20 17:00:25 -07004335 break;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004336
Kiran Kandi93923902012-06-20 17:00:25 -07004337 case SNDRV_PCM_STREAM_PLAYBACK:
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004338
Kiran Kandi93923902012-06-20 17:00:25 -07004339 ret = tabla_set_interpolator_rate(dai, rx_fs_rate_reg_val,
4340 compander_fs, params_rate(params));
4341 if (ret < 0) {
4342 pr_err("%s: set decimator rate failed %d\n", __func__,
4343 ret);
4344 return ret;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004345 }
Kiran Kandi93923902012-06-20 17:00:25 -07004346
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304347 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05304348 switch (params_format(params)) {
4349 case SNDRV_PCM_FORMAT_S16_LE:
4350 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004351 TABLA_A_CDC_CLK_RX_I2S_CTL, 0x20, 0x20);
Santosh Mardie15e2302011-11-15 10:39:23 +05304352 break;
4353 case SNDRV_PCM_FORMAT_S32_LE:
4354 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004355 TABLA_A_CDC_CLK_RX_I2S_CTL, 0x20, 0x00);
Santosh Mardie15e2302011-11-15 10:39:23 +05304356 break;
4357 default:
Kiran Kandi93923902012-06-20 17:00:25 -07004358 pr_err("%s: invalid RX format %u\n", __func__,
4359 params_format(params));
4360 return -EINVAL;
Santosh Mardie15e2302011-11-15 10:39:23 +05304361 }
4362 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_I2S_CTL,
Kiran Kandi93923902012-06-20 17:00:25 -07004363 0x03, (rx_fs_rate_reg_val >> 0x05));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004364 } else {
4365 tabla->dai[dai->id - 1].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05304366 }
Kiran Kandi93923902012-06-20 17:00:25 -07004367 break;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004368
Kiran Kandi93923902012-06-20 17:00:25 -07004369 default:
4370 pr_err("%s: Invalid stream type %d\n", __func__,
4371 substream->stream);
4372 return -EINVAL;
4373 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004374 return 0;
4375}
4376
4377static struct snd_soc_dai_ops tabla_dai_ops = {
4378 .startup = tabla_startup,
Ajay Dudani506f81c2012-08-23 16:01:50 -07004379 .shutdown = tabla_shutdown,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004380 .hw_params = tabla_hw_params,
4381 .set_sysclk = tabla_set_dai_sysclk,
4382 .set_fmt = tabla_set_dai_fmt,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004383 .set_channel_map = tabla_set_channel_map,
4384 .get_channel_map = tabla_get_channel_map,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004385};
4386
4387static struct snd_soc_dai_driver tabla_dai[] = {
4388 {
4389 .name = "tabla_rx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004390 .id = AIF1_PB,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004391 .playback = {
4392 .stream_name = "AIF1 Playback",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004393 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004394 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004395 .rate_max = 192000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004396 .rate_min = 8000,
4397 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004398 .channels_max = 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004399 },
4400 .ops = &tabla_dai_ops,
4401 },
4402 {
4403 .name = "tabla_tx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004404 .id = AIF1_CAP,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004405 .capture = {
4406 .stream_name = "AIF1 Capture",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004407 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004408 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004409 .rate_max = 192000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004410 .rate_min = 8000,
4411 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004412 .channels_max = 4,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004413 },
4414 .ops = &tabla_dai_ops,
4415 },
Neema Shettyd3a89262012-02-16 10:23:50 -08004416 {
4417 .name = "tabla_rx2",
4418 .id = AIF2_PB,
4419 .playback = {
4420 .stream_name = "AIF2 Playback",
4421 .rates = WCD9310_RATES,
4422 .formats = TABLA_FORMATS,
4423 .rate_min = 8000,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004424 .rate_max = 192000,
Neema Shettyd3a89262012-02-16 10:23:50 -08004425 .channels_min = 1,
4426 .channels_max = 2,
4427 },
4428 .ops = &tabla_dai_ops,
4429 },
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004430 {
4431 .name = "tabla_tx2",
4432 .id = AIF2_CAP,
4433 .capture = {
4434 .stream_name = "AIF2 Capture",
4435 .rates = WCD9310_RATES,
4436 .formats = TABLA_FORMATS,
4437 .rate_max = 192000,
4438 .rate_min = 8000,
4439 .channels_min = 1,
4440 .channels_max = 4,
4441 },
4442 .ops = &tabla_dai_ops,
4443 },
Neema Shetty3fb1b802012-04-27 13:53:24 -07004444 {
4445 .name = "tabla_tx3",
4446 .id = AIF3_CAP,
4447 .capture = {
4448 .stream_name = "AIF3 Capture",
4449 .rates = WCD9310_RATES,
4450 .formats = TABLA_FORMATS,
4451 .rate_max = 48000,
4452 .rate_min = 8000,
4453 .channels_min = 1,
4454 .channels_max = 2,
4455 },
4456 .ops = &tabla_dai_ops,
4457 },
Kiran Kandia9fffe92012-05-20 23:42:30 -07004458 {
4459 .name = "tabla_rx3",
4460 .id = AIF3_PB,
4461 .playback = {
4462 .stream_name = "AIF3 Playback",
4463 .rates = WCD9310_RATES,
4464 .formats = TABLA_FORMATS,
4465 .rate_min = 8000,
4466 .rate_max = 192000,
4467 .channels_min = 1,
4468 .channels_max = 2,
4469 },
4470 .ops = &tabla_dai_ops,
4471 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004472};
Santosh Mardie15e2302011-11-15 10:39:23 +05304473
4474static struct snd_soc_dai_driver tabla_i2s_dai[] = {
4475 {
4476 .name = "tabla_i2s_rx1",
4477 .id = 1,
4478 .playback = {
4479 .stream_name = "AIF1 Playback",
4480 .rates = WCD9310_RATES,
4481 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004482 .rate_max = 192000,
Santosh Mardie15e2302011-11-15 10:39:23 +05304483 .rate_min = 8000,
4484 .channels_min = 1,
4485 .channels_max = 4,
4486 },
4487 .ops = &tabla_dai_ops,
4488 },
4489 {
4490 .name = "tabla_i2s_tx1",
4491 .id = 2,
4492 .capture = {
4493 .stream_name = "AIF1 Capture",
4494 .rates = WCD9310_RATES,
4495 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004496 .rate_max = 192000,
Santosh Mardie15e2302011-11-15 10:39:23 +05304497 .rate_min = 8000,
4498 .channels_min = 1,
4499 .channels_max = 4,
4500 },
4501 .ops = &tabla_dai_ops,
4502 },
4503};
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004504
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004505static int tabla_codec_enable_chmask(struct tabla_priv *tabla_p,
4506 int event, int index)
4507{
4508 int ret = 0;
4509 u32 k = 0;
4510 switch (event) {
4511 case SND_SOC_DAPM_POST_PMU:
4512 for (k = 0; k < tabla_p->dai[index].ch_tot; k++) {
4513 ret = wcd9xxx_get_slave_port(
4514 tabla_p->dai[index].ch_num[k]);
4515 if (ret < 0) {
4516 pr_err("%s: Invalid slave port ID: %d\n",
4517 __func__, ret);
4518 ret = -EINVAL;
4519 break;
4520 }
4521 tabla_p->dai[index].ch_mask |= 1 << ret;
4522 }
4523 ret = 0;
4524 break;
4525 case SND_SOC_DAPM_POST_PMD:
4526 ret = wait_event_timeout(tabla_p->dai[index].dai_wait,
4527 (tabla_p->dai[index].ch_mask == 0),
4528 msecs_to_jiffies(SLIM_CLOSE_TIMEOUT));
4529 if (!ret) {
4530 pr_err("%s: Slim close tx/rx wait timeout\n",
4531 __func__);
4532 ret = -EINVAL;
SathishKumar Mani58253c72012-10-06 13:24:38 -07004533 } else
4534 ret = 0;
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004535 break;
4536 }
4537 return ret;
4538}
4539
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004540static int tabla_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
4541 struct snd_kcontrol *kcontrol, int event)
4542{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304543 struct wcd9xxx *tabla;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004544 struct snd_soc_codec *codec = w->codec;
4545 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
4546 u32 j = 0;
SathishKumar Mani58253c72012-10-06 13:24:38 -07004547 int ret = 0;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004548 codec->control_data = dev_get_drvdata(codec->dev->parent);
4549 tabla = codec->control_data;
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004550
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004551 /* Execute the callback only if interface type is slimbus */
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004552 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
4553 if (event == SND_SOC_DAPM_POST_PMD && (tabla != NULL) &&
4554 (tabla->dev != NULL) &&
4555 (tabla->dev->parent != NULL)) {
4556 pm_runtime_mark_last_busy(tabla->dev->parent);
4557 pm_runtime_put(tabla->dev->parent);
4558 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004559 return 0;
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004560 }
Kiran Kandia9fffe92012-05-20 23:42:30 -07004561
4562 pr_debug("%s: %s %d\n", __func__, w->name, event);
4563
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004564 switch (event) {
4565 case SND_SOC_DAPM_POST_PMU:
4566 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004567 if ((tabla_dai[j].id == AIF1_CAP) ||
Neema Shetty3fb1b802012-04-27 13:53:24 -07004568 (tabla_dai[j].id == AIF2_CAP) ||
4569 (tabla_dai[j].id == AIF3_CAP))
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004570 continue;
4571 if (!strncmp(w->sname,
4572 tabla_dai[j].playback.stream_name, 13)) {
4573 ++tabla_p->dai[j].ch_act;
4574 break;
4575 }
4576 }
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004577 if (tabla_p->dai[j].ch_act == tabla_p->dai[j].ch_tot) {
4578 ret = tabla_codec_enable_chmask(tabla_p,
4579 SND_SOC_DAPM_POST_PMU,
4580 j);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304581 ret = wcd9xxx_cfg_slim_sch_rx(tabla,
4582 tabla_p->dai[j].ch_num,
4583 tabla_p->dai[j].ch_tot,
4584 tabla_p->dai[j].rate);
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004585 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004586 break;
4587 case SND_SOC_DAPM_POST_PMD:
4588 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004589 if ((tabla_dai[j].id == AIF1_CAP) ||
Neema Shetty3fb1b802012-04-27 13:53:24 -07004590 (tabla_dai[j].id == AIF2_CAP) ||
4591 (tabla_dai[j].id == AIF3_CAP))
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004592 continue;
4593 if (!strncmp(w->sname,
4594 tabla_dai[j].playback.stream_name, 13)) {
Helen Zeng2aaa3c12012-06-08 20:29:21 -07004595 if (tabla_p->dai[j].ch_act)
4596 --tabla_p->dai[j].ch_act;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004597 break;
4598 }
4599 }
4600 if (!tabla_p->dai[j].ch_act) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304601 ret = wcd9xxx_close_slim_sch_rx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004602 tabla_p->dai[j].ch_num,
4603 tabla_p->dai[j].ch_tot);
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004604 ret = tabla_codec_enable_chmask(tabla_p,
4605 SND_SOC_DAPM_POST_PMD,
4606 j);
SathishKumar Mani58253c72012-10-06 13:24:38 -07004607 if (ret < 0) {
4608 ret = wcd9xxx_disconnect_port(tabla,
4609 tabla_p->dai[j].ch_num,
4610 tabla_p->dai[j].ch_tot,
4611 1);
4612 pr_info("%s: Disconnect RX port ret = %d\n",
4613 __func__, ret);
4614 }
4615 tabla_p->dai[j].rate = 0;
4616 memset(tabla_p->dai[j].ch_num, 0, (sizeof(u32)*
4617 tabla_p->dai[j].ch_tot));
4618 tabla_p->dai[j].ch_tot = 0;
4619
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004620 if ((tabla != NULL) &&
4621 (tabla->dev != NULL) &&
4622 (tabla->dev->parent != NULL)) {
4623 pm_runtime_mark_last_busy(tabla->dev->parent);
4624 pm_runtime_put(tabla->dev->parent);
4625 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004626 }
4627 }
4628 return ret;
4629}
4630
4631static int tabla_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
4632 struct snd_kcontrol *kcontrol, int event)
4633{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304634 struct wcd9xxx *tabla;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004635 struct snd_soc_codec *codec = w->codec;
4636 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
4637 /* index to the DAI ID, for now hardcoding */
4638 u32 j = 0;
SathishKumar Mani58253c72012-10-06 13:24:38 -07004639 int ret = 0;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004640
4641 codec->control_data = dev_get_drvdata(codec->dev->parent);
4642 tabla = codec->control_data;
4643
4644 /* Execute the callback only if interface type is slimbus */
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004645 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
4646 if (event == SND_SOC_DAPM_POST_PMD && (tabla != NULL) &&
4647 (tabla->dev != NULL) &&
4648 (tabla->dev->parent != NULL)) {
4649 pm_runtime_mark_last_busy(tabla->dev->parent);
4650 pm_runtime_put(tabla->dev->parent);
4651 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004652 return 0;
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004653 }
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004654
4655 pr_debug("%s(): %s %d\n", __func__, w->name, event);
4656
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004657 switch (event) {
4658 case SND_SOC_DAPM_POST_PMU:
4659 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Neema Shettyd3a89262012-02-16 10:23:50 -08004660 if (tabla_dai[j].id == AIF1_PB ||
Kiran Kandia9fffe92012-05-20 23:42:30 -07004661 tabla_dai[j].id == AIF2_PB ||
4662 tabla_dai[j].id == AIF3_PB)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004663 continue;
4664 if (!strncmp(w->sname,
4665 tabla_dai[j].capture.stream_name, 13)) {
4666 ++tabla_p->dai[j].ch_act;
4667 break;
4668 }
4669 }
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004670 if (tabla_p->dai[j].ch_act == tabla_p->dai[j].ch_tot) {
4671 ret = tabla_codec_enable_chmask(tabla_p,
4672 SND_SOC_DAPM_POST_PMU,
4673 j);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304674 ret = wcd9xxx_cfg_slim_sch_tx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004675 tabla_p->dai[j].ch_num,
4676 tabla_p->dai[j].ch_tot,
4677 tabla_p->dai[j].rate);
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004678 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004679 break;
4680 case SND_SOC_DAPM_POST_PMD:
4681 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Neema Shettyd3a89262012-02-16 10:23:50 -08004682 if (tabla_dai[j].id == AIF1_PB ||
Kiran Kandia9fffe92012-05-20 23:42:30 -07004683 tabla_dai[j].id == AIF2_PB ||
4684 tabla_dai[j].id == AIF3_PB)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004685 continue;
4686 if (!strncmp(w->sname,
4687 tabla_dai[j].capture.stream_name, 13)) {
4688 --tabla_p->dai[j].ch_act;
4689 break;
4690 }
4691 }
4692 if (!tabla_p->dai[j].ch_act) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304693 ret = wcd9xxx_close_slim_sch_tx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004694 tabla_p->dai[j].ch_num,
4695 tabla_p->dai[j].ch_tot);
SathishKumar Mani58253c72012-10-06 13:24:38 -07004696 ret = tabla_codec_enable_chmask(tabla_p,
4697 SND_SOC_DAPM_POST_PMD,
4698 j);
4699 if (ret < 0) {
4700 ret = wcd9xxx_disconnect_port(tabla,
4701 tabla_p->dai[j].ch_num,
4702 tabla_p->dai[j].ch_tot, 0);
4703 pr_info("%s: Disconnect TX port, ret = %d\n",
4704 __func__, ret);
4705 }
4706
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004707 tabla_p->dai[j].rate = 0;
4708 memset(tabla_p->dai[j].ch_num, 0, (sizeof(u32)*
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304709 tabla_p->dai[j].ch_tot));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004710 tabla_p->dai[j].ch_tot = 0;
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004711 if ((tabla != NULL) &&
4712 (tabla->dev != NULL) &&
4713 (tabla->dev->parent != NULL)) {
4714 pm_runtime_mark_last_busy(tabla->dev->parent);
4715 pm_runtime_put(tabla->dev->parent);
4716 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004717 }
4718 }
4719 return ret;
4720}
4721
4722/* Todo: Have seperate dapm widgets for I2S and Slimbus.
4723 * Might Need to have callbacks registered only for slimbus
4724 */
4725static const struct snd_soc_dapm_widget tabla_dapm_widgets[] = {
4726 /*RX stuff */
4727 SND_SOC_DAPM_OUTPUT("EAR"),
4728
Damir Didjusto52900462012-08-16 21:22:29 -07004729 SND_SOC_DAPM_PGA_E("EAR PA", SND_SOC_NOPM, 0, 0, NULL,
4730 0, tabla_ear_pa_event, SND_SOC_DAPM_PRE_PMU |
4731 SND_SOC_DAPM_PRE_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004732
Damir Didjusto52900462012-08-16 21:22:29 -07004733 SND_SOC_DAPM_MIXER("DAC1", SND_SOC_NOPM, 0, 0, dac1_switch,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004734 ARRAY_SIZE(dac1_switch)),
4735
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004736 /* Headphone */
4737 SND_SOC_DAPM_OUTPUT("HEADPHONE"),
4738 SND_SOC_DAPM_PGA_E("HPHL", TABLA_A_RX_HPH_CNP_EN, 5, 0, NULL, 0,
4739 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
4740 SND_SOC_DAPM_POST_PMD),
4741 SND_SOC_DAPM_MIXER("HPHL DAC", TABLA_A_RX_HPH_L_DAC_CTL, 7, 0,
4742 hphl_switch, ARRAY_SIZE(hphl_switch)),
4743
4744 SND_SOC_DAPM_PGA_E("HPHR", TABLA_A_RX_HPH_CNP_EN, 4, 0, NULL, 0,
4745 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
4746 SND_SOC_DAPM_POST_PMD),
4747
4748 SND_SOC_DAPM_DAC_E("HPHR DAC", NULL, TABLA_A_RX_HPH_R_DAC_CTL, 7, 0,
4749 tabla_hphr_dac_event,
4750 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4751
4752 /* Speaker */
4753 SND_SOC_DAPM_OUTPUT("LINEOUT1"),
4754 SND_SOC_DAPM_OUTPUT("LINEOUT2"),
4755 SND_SOC_DAPM_OUTPUT("LINEOUT3"),
4756 SND_SOC_DAPM_OUTPUT("LINEOUT4"),
4757 SND_SOC_DAPM_OUTPUT("LINEOUT5"),
4758
4759 SND_SOC_DAPM_PGA_E("LINEOUT1 PA", TABLA_A_RX_LINE_CNP_EN, 0, 0, NULL,
4760 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4761 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4762 SND_SOC_DAPM_PGA_E("LINEOUT2 PA", TABLA_A_RX_LINE_CNP_EN, 1, 0, NULL,
4763 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4764 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4765 SND_SOC_DAPM_PGA_E("LINEOUT3 PA", TABLA_A_RX_LINE_CNP_EN, 2, 0, NULL,
4766 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4767 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4768 SND_SOC_DAPM_PGA_E("LINEOUT4 PA", TABLA_A_RX_LINE_CNP_EN, 3, 0, NULL,
4769 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4770 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4771 SND_SOC_DAPM_PGA_E("LINEOUT5 PA", TABLA_A_RX_LINE_CNP_EN, 4, 0, NULL, 0,
4772 tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4773 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4774
4775 SND_SOC_DAPM_DAC_E("LINEOUT1 DAC", NULL, TABLA_A_RX_LINE_1_DAC_CTL, 7, 0
4776 , tabla_lineout_dac_event,
4777 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4778 SND_SOC_DAPM_DAC_E("LINEOUT2 DAC", NULL, TABLA_A_RX_LINE_2_DAC_CTL, 7, 0
4779 , tabla_lineout_dac_event,
4780 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4781 SND_SOC_DAPM_DAC_E("LINEOUT3 DAC", NULL, TABLA_A_RX_LINE_3_DAC_CTL, 7, 0
4782 , tabla_lineout_dac_event,
4783 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4784 SND_SOC_DAPM_SWITCH("LINEOUT3 DAC GROUND", SND_SOC_NOPM, 0, 0,
4785 &lineout3_ground_switch),
4786 SND_SOC_DAPM_DAC_E("LINEOUT4 DAC", NULL, TABLA_A_RX_LINE_4_DAC_CTL, 7, 0
4787 , tabla_lineout_dac_event,
4788 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4789 SND_SOC_DAPM_SWITCH("LINEOUT4 DAC GROUND", SND_SOC_NOPM, 0, 0,
4790 &lineout4_ground_switch),
4791 SND_SOC_DAPM_DAC_E("LINEOUT5 DAC", NULL, TABLA_A_RX_LINE_5_DAC_CTL, 7, 0
4792 , tabla_lineout_dac_event,
4793 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4794
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004795 SND_SOC_DAPM_MIXER_E("RX1 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 0, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004796 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4797 SND_SOC_DAPM_POST_PMU),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004798 SND_SOC_DAPM_MIXER_E("RX2 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 1, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004799 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4800 SND_SOC_DAPM_POST_PMU),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004801 SND_SOC_DAPM_MIXER_E("RX3 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 2, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004802 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4803 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004804 SND_SOC_DAPM_MIXER_E("RX4 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004805 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4806 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004807 SND_SOC_DAPM_MIXER_E("RX5 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 4, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004808 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4809 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004810 SND_SOC_DAPM_MIXER_E("RX6 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004811 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4812 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004813 SND_SOC_DAPM_MIXER_E("RX7 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 6, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004814 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4815 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004816
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004817 SND_SOC_DAPM_MIXER("RX1 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
4818 SND_SOC_DAPM_MIXER("RX2 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
4819 SND_SOC_DAPM_MIXER("RX3 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
4820
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004821 SND_SOC_DAPM_MUX_E("RX4 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0,
4822 &rx4_dsm_mux, tabla_codec_reset_interpolator,
4823 SND_SOC_DAPM_PRE_PMU),
4824
4825 SND_SOC_DAPM_MUX_E("RX6 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0,
4826 &rx6_dsm_mux, tabla_codec_reset_interpolator,
4827 SND_SOC_DAPM_PRE_PMU),
4828
4829 SND_SOC_DAPM_MIXER("RX1 CHAIN", TABLA_A_CDC_RX1_B6_CTL, 5, 0, NULL, 0),
4830 SND_SOC_DAPM_MIXER("RX2 CHAIN", TABLA_A_CDC_RX2_B6_CTL, 5, 0, NULL, 0),
4831
4832 SND_SOC_DAPM_MUX("RX1 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4833 &rx_mix1_inp1_mux),
4834 SND_SOC_DAPM_MUX("RX1 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4835 &rx_mix1_inp2_mux),
Kiran Kandia9fffe92012-05-20 23:42:30 -07004836 SND_SOC_DAPM_MUX("RX1 MIX1 INP3", SND_SOC_NOPM, 0, 0,
4837 &rx_mix1_inp3_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004838 SND_SOC_DAPM_MUX("RX2 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4839 &rx2_mix1_inp1_mux),
4840 SND_SOC_DAPM_MUX("RX2 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4841 &rx2_mix1_inp2_mux),
4842 SND_SOC_DAPM_MUX("RX3 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4843 &rx3_mix1_inp1_mux),
4844 SND_SOC_DAPM_MUX("RX3 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4845 &rx3_mix1_inp2_mux),
4846 SND_SOC_DAPM_MUX("RX4 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4847 &rx4_mix1_inp1_mux),
4848 SND_SOC_DAPM_MUX("RX4 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4849 &rx4_mix1_inp2_mux),
4850 SND_SOC_DAPM_MUX("RX5 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4851 &rx5_mix1_inp1_mux),
4852 SND_SOC_DAPM_MUX("RX5 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4853 &rx5_mix1_inp2_mux),
4854 SND_SOC_DAPM_MUX("RX6 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4855 &rx6_mix1_inp1_mux),
4856 SND_SOC_DAPM_MUX("RX6 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4857 &rx6_mix1_inp2_mux),
4858 SND_SOC_DAPM_MUX("RX7 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4859 &rx7_mix1_inp1_mux),
4860 SND_SOC_DAPM_MUX("RX7 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4861 &rx7_mix1_inp2_mux),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004862 SND_SOC_DAPM_MUX("RX1 MIX2 INP1", SND_SOC_NOPM, 0, 0,
4863 &rx1_mix2_inp1_mux),
4864 SND_SOC_DAPM_MUX("RX1 MIX2 INP2", SND_SOC_NOPM, 0, 0,
4865 &rx1_mix2_inp2_mux),
4866 SND_SOC_DAPM_MUX("RX2 MIX2 INP1", SND_SOC_NOPM, 0, 0,
4867 &rx2_mix2_inp1_mux),
4868 SND_SOC_DAPM_MUX("RX2 MIX2 INP2", SND_SOC_NOPM, 0, 0,
4869 &rx2_mix2_inp2_mux),
4870 SND_SOC_DAPM_MUX("RX3 MIX2 INP1", SND_SOC_NOPM, 0, 0,
4871 &rx3_mix2_inp1_mux),
4872 SND_SOC_DAPM_MUX("RX3 MIX2 INP2", SND_SOC_NOPM, 0, 0,
4873 &rx3_mix2_inp2_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004874
4875 SND_SOC_DAPM_SUPPLY("CP", TABLA_A_CP_EN, 0, 0,
4876 tabla_codec_enable_charge_pump, SND_SOC_DAPM_POST_PMU |
4877 SND_SOC_DAPM_PRE_PMD),
4878
4879 SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
4880 tabla_codec_enable_rx_bias, SND_SOC_DAPM_PRE_PMU |
4881 SND_SOC_DAPM_POST_PMD),
4882
4883 /* TX */
4884
4885 SND_SOC_DAPM_SUPPLY("CDC_CONN", TABLA_A_CDC_CLK_OTHR_CTL, 2, 0, NULL,
4886 0),
4887
4888 SND_SOC_DAPM_SUPPLY("LDO_H", TABLA_A_LDO_H_MODE_1, 7, 0,
4889 tabla_codec_enable_ldo_h, SND_SOC_DAPM_POST_PMU),
4890
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004891 SND_SOC_DAPM_SUPPLY("COMP1_CLK", SND_SOC_NOPM, 0, 0,
4892 tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
4893 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
4894 SND_SOC_DAPM_SUPPLY("COMP2_CLK", SND_SOC_NOPM, 1, 0,
4895 tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
4896 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
4897
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004898 SND_SOC_DAPM_INPUT("AMIC1"),
4899 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", TABLA_A_MICB_1_CTL, 7, 0,
4900 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4901 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4902 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal1", TABLA_A_MICB_1_CTL, 7, 0,
4903 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4904 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4905 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal2", TABLA_A_MICB_1_CTL, 7, 0,
4906 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4907 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4908 SND_SOC_DAPM_ADC_E("ADC1", NULL, TABLA_A_TX_1_2_EN, 7, 0,
4909 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
4910 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4911
4912 SND_SOC_DAPM_INPUT("AMIC3"),
4913 SND_SOC_DAPM_ADC_E("ADC3", NULL, TABLA_A_TX_3_4_EN, 7, 0,
4914 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
4915 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4916
4917 SND_SOC_DAPM_INPUT("AMIC4"),
4918 SND_SOC_DAPM_ADC_E("ADC4", NULL, TABLA_A_TX_3_4_EN, 3, 0,
4919 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
4920 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4921
4922 SND_SOC_DAPM_INPUT("AMIC5"),
4923 SND_SOC_DAPM_ADC_E("ADC5", NULL, TABLA_A_TX_5_6_EN, 7, 0,
4924 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
4925
4926 SND_SOC_DAPM_INPUT("AMIC6"),
4927 SND_SOC_DAPM_ADC_E("ADC6", NULL, TABLA_A_TX_5_6_EN, 3, 0,
4928 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
4929
4930 SND_SOC_DAPM_MUX_E("DEC1 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 0, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004931 &dec1_mux, tabla_codec_enable_dec,
4932 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4933 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004934
4935 SND_SOC_DAPM_MUX_E("DEC2 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 1, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004936 &dec2_mux, tabla_codec_enable_dec,
4937 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4938 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004939
4940 SND_SOC_DAPM_MUX_E("DEC3 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 2, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004941 &dec3_mux, tabla_codec_enable_dec,
4942 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4943 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004944
4945 SND_SOC_DAPM_MUX_E("DEC4 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 3, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004946 &dec4_mux, tabla_codec_enable_dec,
4947 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4948 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004949
4950 SND_SOC_DAPM_MUX_E("DEC5 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 4, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004951 &dec5_mux, tabla_codec_enable_dec,
4952 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4953 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004954
4955 SND_SOC_DAPM_MUX_E("DEC6 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 5, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004956 &dec6_mux, tabla_codec_enable_dec,
4957 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4958 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004959
4960 SND_SOC_DAPM_MUX_E("DEC7 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 6, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004961 &dec7_mux, tabla_codec_enable_dec,
4962 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4963 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004964
4965 SND_SOC_DAPM_MUX_E("DEC8 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 7, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004966 &dec8_mux, tabla_codec_enable_dec,
4967 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4968 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004969
4970 SND_SOC_DAPM_MUX_E("DEC9 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 0, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004971 &dec9_mux, tabla_codec_enable_dec,
4972 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4973 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004974
4975 SND_SOC_DAPM_MUX_E("DEC10 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 1, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004976 &dec10_mux, tabla_codec_enable_dec,
4977 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4978 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004979
4980 SND_SOC_DAPM_MUX("ANC1 MUX", SND_SOC_NOPM, 0, 0, &anc1_mux),
4981 SND_SOC_DAPM_MUX("ANC2 MUX", SND_SOC_NOPM, 0, 0, &anc2_mux),
4982
4983 SND_SOC_DAPM_MIXER_E("ANC", SND_SOC_NOPM, 0, 0, NULL, 0,
4984 tabla_codec_enable_anc, SND_SOC_DAPM_PRE_PMU |
4985 SND_SOC_DAPM_POST_PMD),
4986
4987 SND_SOC_DAPM_MUX("ANC1 FB MUX", SND_SOC_NOPM, 0, 0, &anc1_fb_mux),
4988
4989 SND_SOC_DAPM_INPUT("AMIC2"),
4990 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", TABLA_A_MICB_2_CTL, 7, 0,
4991 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4992 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4993 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal1", TABLA_A_MICB_2_CTL, 7, 0,
4994 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4995 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4996 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal2", TABLA_A_MICB_2_CTL, 7, 0,
4997 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4998 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4999 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal3", TABLA_A_MICB_2_CTL, 7, 0,
5000 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5001 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5002 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 External", TABLA_A_MICB_3_CTL, 7, 0,
5003 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5004 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5005 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal1", TABLA_A_MICB_3_CTL, 7, 0,
5006 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5007 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5008 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal2", TABLA_A_MICB_3_CTL, 7, 0,
5009 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5010 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5011 SND_SOC_DAPM_ADC_E("ADC2", NULL, TABLA_A_TX_1_2_EN, 3, 0,
5012 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
5013 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5014
5015 SND_SOC_DAPM_MUX("SLIM TX1 MUX", SND_SOC_NOPM, 0, 0, &sb_tx1_mux),
Kiran Kandi1e6371d2012-03-29 11:48:57 -07005016 SND_SOC_DAPM_MUX("SLIM TX2 MUX", SND_SOC_NOPM, 0, 0, &sb_tx2_mux),
Kiran Kandi1e6371d2012-03-29 11:48:57 -07005017 SND_SOC_DAPM_MUX("SLIM TX3 MUX", SND_SOC_NOPM, 0, 0, &sb_tx3_mux),
Kiran Kandi1e6371d2012-03-29 11:48:57 -07005018 SND_SOC_DAPM_MUX("SLIM TX4 MUX", SND_SOC_NOPM, 0, 0, &sb_tx4_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005019 SND_SOC_DAPM_MUX("SLIM TX5 MUX", SND_SOC_NOPM, 0, 0, &sb_tx5_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005020 SND_SOC_DAPM_MUX("SLIM TX6 MUX", SND_SOC_NOPM, 0, 0, &sb_tx6_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005021 SND_SOC_DAPM_MUX("SLIM TX7 MUX", SND_SOC_NOPM, 0, 0, &sb_tx7_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005022 SND_SOC_DAPM_MUX("SLIM TX8 MUX", SND_SOC_NOPM, 0, 0, &sb_tx8_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005023 SND_SOC_DAPM_MUX("SLIM TX9 MUX", SND_SOC_NOPM, 0, 0, &sb_tx9_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005024 SND_SOC_DAPM_MUX("SLIM TX10 MUX", SND_SOC_NOPM, 0, 0, &sb_tx10_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005025
5026 /* Digital Mic Inputs */
5027 SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
5028 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5029 SND_SOC_DAPM_POST_PMD),
5030
5031 SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 0, 0,
5032 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5033 SND_SOC_DAPM_POST_PMD),
5034
5035 SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 0, 0,
5036 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5037 SND_SOC_DAPM_POST_PMD),
5038
5039 SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 0, 0,
5040 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5041 SND_SOC_DAPM_POST_PMD),
5042
5043 SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 0, 0,
5044 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5045 SND_SOC_DAPM_POST_PMD),
5046 SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 0, 0,
5047 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5048 SND_SOC_DAPM_POST_PMD),
5049
5050 /* Sidetone */
5051 SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
5052 SND_SOC_DAPM_PGA("IIR1", TABLA_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08005053
5054 /* AUX PGA */
5055 SND_SOC_DAPM_ADC_E("AUX_PGA_Left", NULL, TABLA_A_AUX_L_EN, 7, 0,
5056 tabla_codec_enable_aux_pga, SND_SOC_DAPM_PRE_PMU |
5057 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD |
5058 SND_SOC_DAPM_POST_PMD),
5059
5060 SND_SOC_DAPM_ADC_E("AUX_PGA_Right", NULL, TABLA_A_AUX_R_EN, 7, 0,
5061 tabla_codec_enable_aux_pga, SND_SOC_DAPM_PRE_PMU |
5062 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD |
5063 SND_SOC_DAPM_POST_PMD),
5064
5065 /* Lineout, ear and HPH PA Mixers */
5066 SND_SOC_DAPM_MIXER("HPHL_PA_MIXER", SND_SOC_NOPM, 0, 0,
5067 hphl_pa_mix, ARRAY_SIZE(hphl_pa_mix)),
5068
5069 SND_SOC_DAPM_MIXER("HPHR_PA_MIXER", SND_SOC_NOPM, 0, 0,
5070 hphr_pa_mix, ARRAY_SIZE(hphr_pa_mix)),
5071
5072 SND_SOC_DAPM_MIXER("LINEOUT1_PA_MIXER", SND_SOC_NOPM, 0, 0,
5073 lineout1_pa_mix, ARRAY_SIZE(lineout1_pa_mix)),
5074
5075 SND_SOC_DAPM_MIXER("LINEOUT2_PA_MIXER", SND_SOC_NOPM, 0, 0,
5076 lineout2_pa_mix, ARRAY_SIZE(lineout2_pa_mix)),
5077
5078 SND_SOC_DAPM_MIXER("LINEOUT3_PA_MIXER", SND_SOC_NOPM, 0, 0,
5079 lineout3_pa_mix, ARRAY_SIZE(lineout3_pa_mix)),
5080
5081 SND_SOC_DAPM_MIXER("LINEOUT4_PA_MIXER", SND_SOC_NOPM, 0, 0,
5082 lineout4_pa_mix, ARRAY_SIZE(lineout4_pa_mix)),
5083
5084 SND_SOC_DAPM_MIXER("LINEOUT5_PA_MIXER", SND_SOC_NOPM, 0, 0,
5085 lineout5_pa_mix, ARRAY_SIZE(lineout5_pa_mix)),
5086
5087 SND_SOC_DAPM_MIXER("EAR_PA_MIXER", SND_SOC_NOPM, 0, 0,
5088 ear_pa_mix, ARRAY_SIZE(ear_pa_mix)),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005089};
5090
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005091static short tabla_codec_read_sta_result(struct snd_soc_codec *codec)
Bradley Rubincb1e2732011-06-23 16:49:20 -07005092{
5093 u8 bias_msb, bias_lsb;
5094 short bias_value;
5095
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005096 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B3_STATUS);
5097 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B2_STATUS);
5098 bias_value = (bias_msb << 8) | bias_lsb;
5099 return bias_value;
5100}
5101
5102static short tabla_codec_read_dce_result(struct snd_soc_codec *codec)
5103{
5104 u8 bias_msb, bias_lsb;
5105 short bias_value;
5106
5107 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B5_STATUS);
5108 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B4_STATUS);
5109 bias_value = (bias_msb << 8) | bias_lsb;
5110 return bias_value;
5111}
5112
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005113static void tabla_turn_onoff_rel_detection(struct snd_soc_codec *codec, bool on)
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005114{
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005115 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, on << 1);
5116}
5117
5118static short __tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce,
5119 bool override_bypass, bool noreldetection)
5120{
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005121 short bias_value;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005122 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
5123
5124 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
5125 if (noreldetection)
5126 tabla_turn_onoff_rel_detection(codec, false);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005127
Joonwoo Park925914c2012-01-05 13:35:18 -08005128 /* Turn on the override */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005129 if (!override_bypass)
5130 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x4, 0x4);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005131 if (dce) {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005132 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5133 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
5134 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08005135 usleep_range(tabla->mbhc_data.t_sta_dce,
5136 tabla->mbhc_data.t_sta_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005137 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
Joonwoo Park0976d012011-12-22 11:48:18 -08005138 usleep_range(tabla->mbhc_data.t_dce,
5139 tabla->mbhc_data.t_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005140 bias_value = tabla_codec_read_dce_result(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005141 } else {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005142 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005143 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
5144 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08005145 usleep_range(tabla->mbhc_data.t_sta_dce,
5146 tabla->mbhc_data.t_sta_dce);
Joonwoo Park0976d012011-12-22 11:48:18 -08005147 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
5148 usleep_range(tabla->mbhc_data.t_sta,
5149 tabla->mbhc_data.t_sta);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005150 bias_value = tabla_codec_read_sta_result(codec);
5151 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5152 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005153 }
Joonwoo Park925914c2012-01-05 13:35:18 -08005154 /* Turn off the override after measuring mic voltage */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005155 if (!override_bypass)
5156 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
5157
5158 if (noreldetection)
5159 tabla_turn_onoff_rel_detection(codec, true);
5160 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005161
Bradley Rubincb1e2732011-06-23 16:49:20 -07005162 return bias_value;
5163}
5164
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005165static short tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce,
5166 bool norel)
5167{
5168 return __tabla_codec_sta_dce(codec, dce, false, norel);
5169}
5170
5171/* called only from interrupt which is under codec_resource_lock acquisition */
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07005172static short tabla_codec_setup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005173{
5174 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07005175 short bias_value;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08005176 u8 cfilt_mode;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005177
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005178 pr_debug("%s: enter, mclk_enabled %d\n", __func__, tabla->mclk_enabled);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005179 if (!tabla->mbhc_cfg.calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005180 pr_err("Error, no tabla calibration\n");
Bradley Rubincb1e2732011-06-23 16:49:20 -07005181 return -ENODEV;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005182 }
5183
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07005184 if (!tabla->mclk_enabled) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07005185 tabla_codec_disable_clock_block(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005186 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_MBHC_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07005187 tabla_enable_rx_bias(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005188 tabla_codec_enable_clock_block(codec, 1);
5189 }
5190
5191 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x01);
5192
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08005193 /* Make sure CFILT is in fast mode, save current mode */
Joonwoo Parkf4267c22012-01-10 13:25:24 -08005194 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
5195 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x70, 0x00);
Patrick Lai3043fba2011-08-01 14:15:57 -07005196
Joonwoo Parkf4267c22012-01-10 13:25:24 -08005197 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x1F, 0x16);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005198
5199 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005200 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005201
5202 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x80);
5203 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x1F, 0x1C);
5204 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x40, 0x40);
5205
5206 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005207 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5208 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005209
Joonwoo Park925914c2012-01-05 13:35:18 -08005210 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x2, 0x2);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005211 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5212
Bradley Rubincb1e2732011-06-23 16:49:20 -07005213 tabla_codec_calibrate_hs_polling(codec);
5214
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005215 /* don't flip override */
5216 bias_value = __tabla_codec_sta_dce(codec, 1, true, true);
Joonwoo Park0976d012011-12-22 11:48:18 -08005217 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
5218 cfilt_mode);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005219 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005220
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07005221 return bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005222}
5223
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005224static int tabla_cancel_btn_work(struct tabla_priv *tabla)
5225{
5226 int r = 0;
5227 struct wcd9xxx *core = dev_get_drvdata(tabla->codec->dev->parent);
5228
5229 if (cancel_delayed_work_sync(&tabla->mbhc_btn_dwork)) {
5230 /* if scheduled mbhc_btn_dwork is canceled from here,
5231 * we have to unlock from here instead btn_work */
5232 wcd9xxx_unlock_sleep(core);
5233 r = 1;
5234 }
5235 return r;
5236}
5237
5238/* called under codec_resource_lock acquisition */
5239void tabla_set_and_turnoff_hph_padac(struct snd_soc_codec *codec)
Joonwoo Park03324832012-03-19 19:36:16 -07005240{
5241 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005242 u8 wg_time;
5243
5244 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
5245 wg_time += 1;
Joonwoo Park03324832012-03-19 19:36:16 -07005246
5247 /* If headphone PA is on, check if userspace receives
5248 * removal event to sync-up PA's state */
5249 if (tabla_is_hph_pa_on(codec)) {
5250 pr_debug("%s PA is on, setting PA_OFF_ACK\n", __func__);
5251 set_bit(TABLA_HPHL_PA_OFF_ACK, &tabla->hph_pa_dac_state);
5252 set_bit(TABLA_HPHR_PA_OFF_ACK, &tabla->hph_pa_dac_state);
5253 } else {
5254 pr_debug("%s PA is off\n", __func__);
5255 }
5256
5257 if (tabla_is_hph_dac_on(codec, 1))
5258 set_bit(TABLA_HPHL_DAC_OFF_ACK, &tabla->hph_pa_dac_state);
5259 if (tabla_is_hph_dac_on(codec, 0))
5260 set_bit(TABLA_HPHR_DAC_OFF_ACK, &tabla->hph_pa_dac_state);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005261
5262 snd_soc_update_bits(codec, TABLA_A_RX_HPH_CNP_EN, 0x30, 0x00);
5263 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_DAC_CTL,
5264 0xC0, 0x00);
5265 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_DAC_CTL,
5266 0xC0, 0x00);
5267 usleep_range(wg_time * 1000, wg_time * 1000);
5268}
5269
5270static void tabla_clr_and_turnon_hph_padac(struct tabla_priv *tabla)
5271{
5272 bool pa_turned_on = false;
5273 struct snd_soc_codec *codec = tabla->codec;
5274 u8 wg_time;
5275
5276 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
5277 wg_time += 1;
5278
5279 if (test_and_clear_bit(TABLA_HPHR_DAC_OFF_ACK,
5280 &tabla->hph_pa_dac_state)) {
5281 pr_debug("%s: HPHR clear flag and enable DAC\n", __func__);
5282 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_R_DAC_CTL,
5283 0xC0, 0xC0);
5284 }
5285 if (test_and_clear_bit(TABLA_HPHL_DAC_OFF_ACK,
5286 &tabla->hph_pa_dac_state)) {
5287 pr_debug("%s: HPHL clear flag and enable DAC\n", __func__);
5288 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_L_DAC_CTL,
5289 0xC0, 0xC0);
5290 }
5291
5292 if (test_and_clear_bit(TABLA_HPHR_PA_OFF_ACK,
5293 &tabla->hph_pa_dac_state)) {
5294 pr_debug("%s: HPHR clear flag and enable PA\n", __func__);
5295 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x10,
5296 1 << 4);
5297 pa_turned_on = true;
5298 }
5299 if (test_and_clear_bit(TABLA_HPHL_PA_OFF_ACK,
5300 &tabla->hph_pa_dac_state)) {
5301 pr_debug("%s: HPHL clear flag and enable PA\n", __func__);
5302 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x20,
5303 1 << 5);
5304 pa_turned_on = true;
5305 }
5306
5307 if (pa_turned_on) {
5308 pr_debug("%s: PA was turned off by MBHC and not by DAPM\n",
5309 __func__);
5310 usleep_range(wg_time * 1000, wg_time * 1000);
5311 }
5312}
5313
5314/* called under codec_resource_lock acquisition */
5315static void tabla_codec_report_plug(struct snd_soc_codec *codec, int insertion,
5316 enum snd_jack_types jack_type)
5317{
5318 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07005319 pr_debug("%s: enter insertion %d hph_status %x\n",
5320 __func__, insertion, tabla->hph_status);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005321 if (!insertion) {
5322 /* Report removal */
5323 tabla->hph_status &= ~jack_type;
5324 if (tabla->mbhc_cfg.headset_jack) {
5325 /* cancel possibly scheduled btn work and
5326 * report release if we reported button press */
5327 if (tabla_cancel_btn_work(tabla)) {
5328 pr_debug("%s: button press is canceled\n",
5329 __func__);
5330 } else if (tabla->buttons_pressed) {
5331 pr_debug("%s: Reporting release for reported "
5332 "button press %d\n", __func__,
5333 jack_type);
5334 tabla_snd_soc_jack_report(tabla,
5335 tabla->mbhc_cfg.button_jack, 0,
5336 tabla->buttons_pressed);
5337 tabla->buttons_pressed &=
5338 ~TABLA_JACK_BUTTON_MASK;
5339 }
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005340 pr_debug("%s: Reporting removal %d(%x)\n", __func__,
5341 jack_type, tabla->hph_status);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005342 tabla_snd_soc_jack_report(tabla,
5343 tabla->mbhc_cfg.headset_jack,
5344 tabla->hph_status,
5345 TABLA_JACK_MASK);
5346 }
5347 tabla_set_and_turnoff_hph_padac(codec);
5348 hphocp_off_report(tabla, SND_JACK_OC_HPHR,
5349 TABLA_IRQ_HPH_PA_OCPR_FAULT);
5350 hphocp_off_report(tabla, SND_JACK_OC_HPHL,
5351 TABLA_IRQ_HPH_PA_OCPL_FAULT);
5352 tabla->current_plug = PLUG_TYPE_NONE;
5353 tabla->mbhc_polling_active = false;
5354 } else {
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07005355 if (tabla->mbhc_cfg.detect_extn_cable) {
5356 /* Report removal of current jack type */
5357 if (tabla->hph_status != jack_type &&
5358 tabla->mbhc_cfg.headset_jack) {
5359 pr_debug("%s: Reporting removal (%x)\n",
5360 __func__, tabla->hph_status);
5361 tabla_snd_soc_jack_report(tabla,
5362 tabla->mbhc_cfg.headset_jack,
5363 0, TABLA_JACK_MASK);
5364 tabla->hph_status = 0;
5365 }
5366 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005367 /* Report insertion */
5368 tabla->hph_status |= jack_type;
5369
5370 if (jack_type == SND_JACK_HEADPHONE)
5371 tabla->current_plug = PLUG_TYPE_HEADPHONE;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005372 else if (jack_type == SND_JACK_UNSUPPORTED)
5373 tabla->current_plug = PLUG_TYPE_GND_MIC_SWAP;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005374 else if (jack_type == SND_JACK_HEADSET) {
5375 tabla->mbhc_polling_active = true;
5376 tabla->current_plug = PLUG_TYPE_HEADSET;
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07005377 } else if (jack_type == SND_JACK_LINEOUT)
5378 tabla->current_plug = PLUG_TYPE_HIGH_HPH;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005379 if (tabla->mbhc_cfg.headset_jack) {
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005380 pr_debug("%s: Reporting insertion %d(%x)\n", __func__,
5381 jack_type, tabla->hph_status);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005382 tabla_snd_soc_jack_report(tabla,
5383 tabla->mbhc_cfg.headset_jack,
5384 tabla->hph_status,
5385 TABLA_JACK_MASK);
5386 }
5387 tabla_clr_and_turnon_hph_padac(tabla);
5388 }
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07005389 pr_debug("%s: leave hph_status %x\n", __func__, tabla->hph_status);
Joonwoo Park03324832012-03-19 19:36:16 -07005390}
5391
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005392static int tabla_codec_enable_hs_detect(struct snd_soc_codec *codec,
Joonwoo Park03324832012-03-19 19:36:16 -07005393 int insertion, int trigger,
5394 bool padac_off)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005395{
5396 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005397 int central_bias_enabled = 0;
Joonwoo Park0976d012011-12-22 11:48:18 -08005398 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005399 TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08005400 const struct tabla_mbhc_plug_detect_cfg *plug_det =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005401 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->mbhc_cfg.calibration);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005402
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07005403 pr_debug("%s: enter insertion(%d) trigger(0x%x)\n",
5404 __func__, insertion, trigger);
5405
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005406 if (!tabla->mbhc_cfg.calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005407 pr_err("Error, no tabla calibration\n");
5408 return -EINVAL;
5409 }
5410
5411 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0);
5412
Joonwoo Park03324832012-03-19 19:36:16 -07005413 /* Make sure mic bias and Mic line schmitt trigger
5414 * are turned OFF
5415 */
5416 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x01);
5417 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
5418
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005419 if (insertion) {
Bhalchandra Gajare18d10ee2012-08-23 13:44:07 -07005420 pr_debug("%s: setup for insertion\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07005421 tabla_codec_switch_micbias(codec, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005422
Joonwoo Park03324832012-03-19 19:36:16 -07005423 /* DAPM can manipulate PA/DAC bits concurrently */
5424 if (padac_off == true) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005425 tabla_set_and_turnoff_hph_padac(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07005426 }
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005427
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005428 if (trigger & MBHC_USE_HPHL_TRIGGER) {
Joonwoo Park03324832012-03-19 19:36:16 -07005429 /* Enable HPH Schmitt Trigger */
5430 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x11,
5431 0x11);
5432 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x0C,
5433 plug_det->hph_current << 2);
5434 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x02,
5435 0x02);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005436 }
5437 if (trigger & MBHC_USE_MB_TRIGGER) {
Joonwoo Park03324832012-03-19 19:36:16 -07005438 /* enable the mic line schmitt trigger */
5439 snd_soc_update_bits(codec,
5440 tabla->mbhc_bias_regs.mbhc_reg,
5441 0x60, plug_det->mic_current << 5);
5442 snd_soc_update_bits(codec,
5443 tabla->mbhc_bias_regs.mbhc_reg,
5444 0x80, 0x80);
5445 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
5446 snd_soc_update_bits(codec,
5447 tabla->mbhc_bias_regs.ctl_reg, 0x01,
5448 0x00);
5449 snd_soc_update_bits(codec,
5450 tabla->mbhc_bias_regs.mbhc_reg,
5451 0x10, 0x10);
5452 }
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005453
5454 /* setup for insetion detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005455 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005456 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005457 pr_debug("setup for removal detection\n");
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005458 /* Make sure the HPH schmitt trigger is OFF */
5459 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12, 0x00);
5460
5461 /* enable the mic line schmitt trigger */
Joonwoo Park03324832012-03-19 19:36:16 -07005462 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg,
5463 0x01, 0x00);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005464 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x60,
Joonwoo Park0976d012011-12-22 11:48:18 -08005465 plug_det->mic_current << 5);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005466 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
5467 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08005468 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005469 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
5470 0x10, 0x10);
5471
5472 /* Setup for low power removal detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005473 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0x2);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005474 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005475
5476 if (snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x4) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005477 /* called called by interrupt */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005478 if (!(tabla->clock_active)) {
5479 tabla_codec_enable_config_mode(codec, 1);
5480 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07005481 0x06, 0);
Joonwoo Park0976d012011-12-22 11:48:18 -08005482 usleep_range(generic->t_shutdown_plug_rem,
5483 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005484 tabla_codec_enable_config_mode(codec, 0);
5485 } else
5486 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07005487 0x06, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005488 }
5489
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07005490 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.int_rbias, 0x80, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005491
5492 /* If central bandgap disabled */
5493 if (!(snd_soc_read(codec, TABLA_A_PIN_CTL_OE1) & 1)) {
5494 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x3, 0x3);
Joonwoo Park0976d012011-12-22 11:48:18 -08005495 usleep_range(generic->t_bg_fast_settle,
5496 generic->t_bg_fast_settle);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005497 central_bias_enabled = 1;
5498 }
5499
5500 /* If LDO_H disabled */
5501 if (snd_soc_read(codec, TABLA_A_PIN_CTL_OE0) & 0x80) {
5502 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x10, 0);
5503 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08005504 usleep_range(generic->t_ldoh, generic->t_ldoh);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005505 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0);
5506
5507 if (central_bias_enabled)
5508 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x1, 0);
5509 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005510
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005511 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x3,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005512 tabla->mbhc_cfg.micbias);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005513
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305514 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005515 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07005516 pr_debug("%s: leave\n", __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005517 return 0;
5518}
5519
Joonwoo Park0976d012011-12-22 11:48:18 -08005520static u16 tabla_codec_v_sta_dce(struct snd_soc_codec *codec, bool dce,
5521 s16 vin_mv)
5522{
Joonwoo Park0976d012011-12-22 11:48:18 -08005523 struct tabla_priv *tabla;
Joonwoo Park03324832012-03-19 19:36:16 -07005524 s16 diff, zero;
Joonwoo Park0976d012011-12-22 11:48:18 -08005525 u32 mb_mv, in;
Joonwoo Park03324832012-03-19 19:36:16 -07005526 u16 value;
Joonwoo Park0976d012011-12-22 11:48:18 -08005527
5528 tabla = snd_soc_codec_get_drvdata(codec);
5529 mb_mv = tabla->mbhc_data.micb_mv;
5530
5531 if (mb_mv == 0) {
5532 pr_err("%s: Mic Bias voltage is set to zero\n", __func__);
5533 return -EINVAL;
5534 }
5535
5536 if (dce) {
Joonwoo Park03324832012-03-19 19:36:16 -07005537 diff = (tabla->mbhc_data.dce_mb) - (tabla->mbhc_data.dce_z);
5538 zero = (tabla->mbhc_data.dce_z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005539 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005540 diff = (tabla->mbhc_data.sta_mb) - (tabla->mbhc_data.sta_z);
5541 zero = (tabla->mbhc_data.sta_z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005542 }
5543 in = (u32) diff * vin_mv;
5544
Joonwoo Park03324832012-03-19 19:36:16 -07005545 value = (u16) (in / mb_mv) + zero;
5546 return value;
Joonwoo Park0976d012011-12-22 11:48:18 -08005547}
5548
5549static s32 tabla_codec_sta_dce_v(struct snd_soc_codec *codec, s8 dce,
5550 u16 bias_value)
5551{
5552 struct tabla_priv *tabla;
Joonwoo Park03324832012-03-19 19:36:16 -07005553 s16 value, z, mb;
Joonwoo Park0976d012011-12-22 11:48:18 -08005554 s32 mv;
5555
5556 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07005557 value = bias_value;
Joonwoo Park0976d012011-12-22 11:48:18 -08005558 if (dce) {
Joonwoo Park03324832012-03-19 19:36:16 -07005559 z = (tabla->mbhc_data.dce_z);
5560 mb = (tabla->mbhc_data.dce_mb);
5561 mv = (value - z) * (s32)tabla->mbhc_data.micb_mv / (mb - z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005562 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005563 z = (tabla->mbhc_data.sta_z);
5564 mb = (tabla->mbhc_data.sta_mb);
5565 mv = (value - z) * (s32)tabla->mbhc_data.micb_mv / (mb - z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005566 }
5567
5568 return mv;
5569}
5570
Joonwoo Park03324832012-03-19 19:36:16 -07005571static void btn_lpress_fn(struct work_struct *work)
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005572{
5573 struct delayed_work *delayed_work;
5574 struct tabla_priv *tabla;
Joonwoo Park0976d012011-12-22 11:48:18 -08005575 short bias_value;
5576 int dce_mv, sta_mv;
Joonwoo Park03324832012-03-19 19:36:16 -07005577 struct wcd9xxx *core;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005578
5579 pr_debug("%s:\n", __func__);
5580
5581 delayed_work = to_delayed_work(work);
Joonwoo Park03324832012-03-19 19:36:16 -07005582 tabla = container_of(delayed_work, struct tabla_priv, mbhc_btn_dwork);
Joonwoo Park816b8e62012-01-23 16:03:21 -08005583 core = dev_get_drvdata(tabla->codec->dev->parent);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005584
5585 if (tabla) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005586 if (tabla->mbhc_cfg.button_jack) {
Joonwoo Park0976d012011-12-22 11:48:18 -08005587 bias_value = tabla_codec_read_sta_result(tabla->codec);
5588 sta_mv = tabla_codec_sta_dce_v(tabla->codec, 0,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305589 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08005590 bias_value = tabla_codec_read_dce_result(tabla->codec);
5591 dce_mv = tabla_codec_sta_dce_v(tabla->codec, 1,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305592 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08005593 pr_debug("%s: Reporting long button press event"
5594 " STA: %d, DCE: %d\n", __func__,
5595 sta_mv, dce_mv);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005596 tabla_snd_soc_jack_report(tabla,
5597 tabla->mbhc_cfg.button_jack,
Joonwoo Park03324832012-03-19 19:36:16 -07005598 tabla->buttons_pressed,
5599 tabla->buttons_pressed);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005600 }
5601 } else {
5602 pr_err("%s: Bad tabla private data\n", __func__);
5603 }
5604
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005605 pr_debug("%s: leave\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07005606 wcd9xxx_unlock_sleep(core);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005607}
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07005608
Joonwoo Parke067b232012-06-14 13:11:30 -07005609static u16 tabla_get_cfilt_reg(struct snd_soc_codec *codec, u8 cfilt)
5610{
5611 u16 reg;
5612
5613 switch (cfilt) {
5614 case TABLA_CFILT1_SEL:
5615 reg = TABLA_A_MICB_CFILT_1_CTL;
5616 break;
5617 case TABLA_CFILT2_SEL:
5618 reg = TABLA_A_MICB_CFILT_2_CTL;
5619 break;
5620 case TABLA_CFILT3_SEL:
5621 reg = TABLA_A_MICB_CFILT_3_CTL;
5622 break;
5623 default:
5624 BUG();
5625 }
5626 return reg;
5627}
5628
Joonwoo Park0976d012011-12-22 11:48:18 -08005629void tabla_mbhc_cal(struct snd_soc_codec *codec)
5630{
5631 struct tabla_priv *tabla;
5632 struct tabla_mbhc_btn_detect_cfg *btn_det;
Joonwoo Parke067b232012-06-14 13:11:30 -07005633 u8 cfilt_mode, micbias2_cfilt_mode, bg_mode;
Joonwoo Park0976d012011-12-22 11:48:18 -08005634 u8 ncic, nmeas, navg;
5635 u32 mclk_rate;
5636 u32 dce_wait, sta_wait;
5637 u8 *n_cic;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005638 void *calibration;
Joonwoo Parke067b232012-06-14 13:11:30 -07005639 u16 bias2_ctl;
Joonwoo Park0976d012011-12-22 11:48:18 -08005640
5641 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005642 calibration = tabla->mbhc_cfg.calibration;
5643
5644 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
5645 tabla_turn_onoff_rel_detection(codec, false);
Joonwoo Park0976d012011-12-22 11:48:18 -08005646
5647 /* First compute the DCE / STA wait times
5648 * depending on tunable parameters.
5649 * The value is computed in microseconds
5650 */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005651 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08005652 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08005653 ncic = n_cic[tabla_codec_mclk_index(tabla)];
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005654 nmeas = TABLA_MBHC_CAL_BTN_DET_PTR(calibration)->n_meas;
5655 navg = TABLA_MBHC_CAL_GENERAL_PTR(calibration)->mbhc_navg;
5656 mclk_rate = tabla->mbhc_cfg.mclk_rate;
Joonwoo Park433149a2012-01-11 09:53:54 -08005657 dce_wait = (1000 * 512 * ncic * (nmeas + 1)) / (mclk_rate / 1000);
5658 sta_wait = (1000 * 128 * (navg + 1)) / (mclk_rate / 1000);
Joonwoo Park0976d012011-12-22 11:48:18 -08005659
5660 tabla->mbhc_data.t_dce = dce_wait;
5661 tabla->mbhc_data.t_sta = sta_wait;
5662
5663 /* LDOH and CFILT are already configured during pdata handling.
5664 * Only need to make sure CFILT and bandgap are in Fast mode.
5665 * Need to restore defaults once calculation is done.
5666 */
5667 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
Joonwoo Parke067b232012-06-14 13:11:30 -07005668 micbias2_cfilt_mode =
5669 snd_soc_read(codec, tabla_get_cfilt_reg(codec,
5670 tabla->pdata->micbias.bias2_cfilt_sel));
5671 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
5672 TABLA_CFILT_FAST_MODE);
5673 snd_soc_update_bits(codec,
5674 tabla_get_cfilt_reg(codec,
5675 tabla->pdata->micbias.bias2_cfilt_sel),
5676 0x40, TABLA_CFILT_FAST_MODE);
5677
Joonwoo Park0976d012011-12-22 11:48:18 -08005678 bg_mode = snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02,
5679 0x02);
5680
5681 /* Micbias, CFILT, LDOH, MBHC MUX mode settings
5682 * to perform ADC calibration
5683 */
5684 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x60,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005685 tabla->mbhc_cfg.micbias << 5);
Joonwoo Park0976d012011-12-22 11:48:18 -08005686 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
5687 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x60, 0x60);
5688 snd_soc_write(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x78);
5689 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x04);
5690
Joonwoo Parke067b232012-06-14 13:11:30 -07005691 /* MICBIAS2 routing for calibration */
5692 bias2_ctl = snd_soc_read(codec, TABLA_A_MICB_2_CTL);
5693 snd_soc_update_bits(codec, TABLA_A_MICB_1_MBHC, 0x03, TABLA_MICBIAS2);
5694 snd_soc_write(codec, TABLA_A_MICB_2_CTL,
5695 snd_soc_read(codec, tabla->mbhc_bias_regs.ctl_reg));
5696
Joonwoo Park0976d012011-12-22 11:48:18 -08005697 /* DCE measurement for 0 volts */
5698 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
5699 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
5700 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08005701 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
5702 usleep_range(100, 100);
5703 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
5704 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
5705 tabla->mbhc_data.dce_z = tabla_codec_read_dce_result(codec);
5706
5707 /* DCE measurment for MB voltage */
5708 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
5709 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
5710 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
5711 usleep_range(100, 100);
5712 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
5713 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
5714 tabla->mbhc_data.dce_mb = tabla_codec_read_dce_result(codec);
5715
5716 /* Sta measuremnt for 0 volts */
5717 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
5718 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
5719 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08005720 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
5721 usleep_range(100, 100);
5722 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
5723 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
5724 tabla->mbhc_data.sta_z = tabla_codec_read_sta_result(codec);
5725
5726 /* STA Measurement for MB Voltage */
5727 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
5728 usleep_range(100, 100);
5729 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
5730 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
5731 tabla->mbhc_data.sta_mb = tabla_codec_read_sta_result(codec);
5732
5733 /* Restore default settings. */
Joonwoo Parke067b232012-06-14 13:11:30 -07005734 snd_soc_write(codec, TABLA_A_MICB_2_CTL, bias2_ctl);
5735 snd_soc_update_bits(codec, TABLA_A_MICB_1_MBHC, 0x03,
5736 tabla->mbhc_cfg.micbias);
5737
Joonwoo Park0976d012011-12-22 11:48:18 -08005738 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
Joonwoo Parke067b232012-06-14 13:11:30 -07005739 snd_soc_update_bits(codec,
5740 tabla_get_cfilt_reg(codec,
5741 tabla->pdata->micbias.bias2_cfilt_sel), 0x40,
5742 micbias2_cfilt_mode);
Joonwoo Park0976d012011-12-22 11:48:18 -08005743 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
5744 cfilt_mode);
5745 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02, bg_mode);
5746
5747 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
5748 usleep_range(100, 100);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005749
5750 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
5751 tabla_turn_onoff_rel_detection(codec, true);
Joonwoo Park0976d012011-12-22 11:48:18 -08005752}
5753
5754void *tabla_mbhc_cal_btn_det_mp(const struct tabla_mbhc_btn_detect_cfg* btn_det,
5755 const enum tabla_mbhc_btn_det_mem mem)
5756{
5757 void *ret = &btn_det->_v_btn_low;
5758
5759 switch (mem) {
5760 case TABLA_BTN_DET_GAIN:
5761 ret += sizeof(btn_det->_n_cic);
5762 case TABLA_BTN_DET_N_CIC:
5763 ret += sizeof(btn_det->_n_ready);
Joonwoo Parkc0672392012-01-11 11:03:14 -08005764 case TABLA_BTN_DET_N_READY:
Joonwoo Park0976d012011-12-22 11:48:18 -08005765 ret += sizeof(btn_det->_v_btn_high[0]) * btn_det->num_btn;
5766 case TABLA_BTN_DET_V_BTN_HIGH:
5767 ret += sizeof(btn_det->_v_btn_low[0]) * btn_det->num_btn;
5768 case TABLA_BTN_DET_V_BTN_LOW:
5769 /* do nothing */
5770 break;
5771 default:
5772 ret = NULL;
5773 }
5774
5775 return ret;
5776}
5777
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005778static s16 tabla_scale_v_micb_vddio(struct tabla_priv *tabla, int v,
5779 bool tovddio)
5780{
5781 int r;
5782 int vddio_k, mb_k;
5783 vddio_k = tabla_find_k_value(tabla->pdata->micbias.ldoh_v,
5784 VDDIO_MICBIAS_MV);
5785 mb_k = tabla_find_k_value(tabla->pdata->micbias.ldoh_v,
5786 tabla->mbhc_data.micb_mv);
5787 if (tovddio)
5788 r = v * vddio_k / mb_k;
5789 else
5790 r = v * mb_k / vddio_k;
5791 return r;
5792}
5793
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07005794static void tabla_mbhc_calc_rel_thres(struct snd_soc_codec *codec, s16 mv)
5795{
5796 s16 deltamv;
5797 struct tabla_priv *tabla;
5798 struct tabla_mbhc_btn_detect_cfg *btn_det;
5799
5800 tabla = snd_soc_codec_get_drvdata(codec);
5801 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
5802
5803 tabla->mbhc_data.v_b1_h =
5804 tabla_codec_v_sta_dce(codec, DCE,
5805 mv + btn_det->v_btn_press_delta_cic);
5806
5807 tabla->mbhc_data.v_brh = tabla->mbhc_data.v_b1_h;
5808
5809 tabla->mbhc_data.v_brl = TABLA_MBHC_BUTTON_MIN;
5810
5811 deltamv = mv + btn_det->v_btn_press_delta_sta;
5812 tabla->mbhc_data.v_b1_hu = tabla_codec_v_sta_dce(codec, STA, deltamv);
5813
5814 deltamv = mv + btn_det->v_btn_press_delta_cic;
5815 tabla->mbhc_data.v_b1_huc = tabla_codec_v_sta_dce(codec, DCE, deltamv);
5816}
5817
5818static void tabla_mbhc_set_rel_thres(struct snd_soc_codec *codec, s16 mv)
5819{
5820 tabla_mbhc_calc_rel_thres(codec, mv);
5821 tabla_codec_calibrate_rel(codec);
5822}
5823
5824static s16 tabla_mbhc_highest_btn_mv(struct snd_soc_codec *codec)
5825{
5826 struct tabla_priv *tabla;
5827 struct tabla_mbhc_btn_detect_cfg *btn_det;
5828 u16 *btn_high;
5829
5830 tabla = snd_soc_codec_get_drvdata(codec);
5831 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
5832 btn_high = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_HIGH);
5833
5834 return btn_high[btn_det->num_btn - 1];
5835}
5836
Joonwoo Park0976d012011-12-22 11:48:18 -08005837static void tabla_mbhc_calc_thres(struct snd_soc_codec *codec)
5838{
5839 struct tabla_priv *tabla;
Joonwoo Park0976d012011-12-22 11:48:18 -08005840 struct tabla_mbhc_btn_detect_cfg *btn_det;
5841 struct tabla_mbhc_plug_type_cfg *plug_type;
Joonwoo Parkc0672392012-01-11 11:03:14 -08005842 u8 *n_ready;
Joonwoo Park0976d012011-12-22 11:48:18 -08005843
5844 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005845 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
5846 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08005847
Joonwoo Parkc0672392012-01-11 11:03:14 -08005848 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005849 if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_12288KHZ) {
Joonwoo Park03324832012-03-19 19:36:16 -07005850 tabla->mbhc_data.npoll = 4;
Joonwoo Park0976d012011-12-22 11:48:18 -08005851 tabla->mbhc_data.nbounce_wait = 30;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005852 } else if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_9600KHZ) {
Joonwoo Park0976d012011-12-22 11:48:18 -08005853 tabla->mbhc_data.npoll = 7;
5854 tabla->mbhc_data.nbounce_wait = 23;
Joonwoo Parkc0672392012-01-11 11:03:14 -08005855 }
Joonwoo Park0976d012011-12-22 11:48:18 -08005856
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005857 tabla->mbhc_data.t_sta_dce = ((1000 * 256) /
5858 (tabla->mbhc_cfg.mclk_rate / 1000) *
Joonwoo Parkc0672392012-01-11 11:03:14 -08005859 n_ready[tabla_codec_mclk_index(tabla)]) +
5860 10;
Joonwoo Park0976d012011-12-22 11:48:18 -08005861 tabla->mbhc_data.v_ins_hu =
5862 tabla_codec_v_sta_dce(codec, STA, plug_type->v_hs_max);
5863 tabla->mbhc_data.v_ins_h =
5864 tabla_codec_v_sta_dce(codec, DCE, plug_type->v_hs_max);
5865
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005866 tabla->mbhc_data.v_inval_ins_low = TABLA_MBHC_FAKE_INSERT_LOW;
5867 if (tabla->mbhc_cfg.gpio)
5868 tabla->mbhc_data.v_inval_ins_high =
5869 TABLA_MBHC_FAKE_INSERT_HIGH;
5870 else
5871 tabla->mbhc_data.v_inval_ins_high =
5872 TABLA_MBHC_FAKE_INS_HIGH_NO_GPIO;
5873
5874 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
5875 tabla->mbhc_data.adj_v_hs_max =
5876 tabla_scale_v_micb_vddio(tabla, plug_type->v_hs_max, true);
5877 tabla->mbhc_data.adj_v_ins_hu =
5878 tabla_codec_v_sta_dce(codec, STA,
5879 tabla->mbhc_data.adj_v_hs_max);
5880 tabla->mbhc_data.adj_v_ins_h =
5881 tabla_codec_v_sta_dce(codec, DCE,
5882 tabla->mbhc_data.adj_v_hs_max);
5883 tabla->mbhc_data.v_inval_ins_low =
5884 tabla_scale_v_micb_vddio(tabla,
5885 tabla->mbhc_data.v_inval_ins_low,
5886 false);
5887 tabla->mbhc_data.v_inval_ins_high =
5888 tabla_scale_v_micb_vddio(tabla,
5889 tabla->mbhc_data.v_inval_ins_high,
5890 false);
5891 }
5892
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07005893 tabla_mbhc_calc_rel_thres(codec, tabla_mbhc_highest_btn_mv(codec));
Joonwoo Park0976d012011-12-22 11:48:18 -08005894
5895 tabla->mbhc_data.v_no_mic =
5896 tabla_codec_v_sta_dce(codec, STA, plug_type->v_no_mic);
5897}
5898
5899void tabla_mbhc_init(struct snd_soc_codec *codec)
5900{
5901 struct tabla_priv *tabla;
5902 struct tabla_mbhc_general_cfg *generic;
5903 struct tabla_mbhc_btn_detect_cfg *btn_det;
5904 int n;
Joonwoo Park0976d012011-12-22 11:48:18 -08005905 u8 *n_cic, *gain;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305906 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Joonwoo Park0976d012011-12-22 11:48:18 -08005907
5908 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005909 generic = TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
5910 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08005911
Joonwoo Park0976d012011-12-22 11:48:18 -08005912 for (n = 0; n < 8; n++) {
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08005913 if ((!TABLA_IS_1_X(tabla_core->version)) || n != 7) {
Joonwoo Park0976d012011-12-22 11:48:18 -08005914 snd_soc_update_bits(codec,
5915 TABLA_A_CDC_MBHC_FEATURE_B1_CFG,
5916 0x07, n);
5917 snd_soc_write(codec, TABLA_A_CDC_MBHC_FEATURE_B2_CFG,
5918 btn_det->c[n]);
5919 }
5920 }
5921 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x07,
5922 btn_det->nc);
5923
5924 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
5925 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL, 0xFF,
Joonwoo Park107edf02012-01-11 11:42:24 -08005926 n_cic[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08005927
5928 gain = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_GAIN);
Joonwoo Park107edf02012-01-11 11:42:24 -08005929 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x78,
5930 gain[tabla_codec_mclk_index(tabla)] << 3);
Joonwoo Park0976d012011-12-22 11:48:18 -08005931
5932 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x70,
5933 generic->mbhc_nsa << 4);
5934
5935 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x0F,
5936 btn_det->n_meas);
5937
5938 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B5_CTL, generic->mbhc_navg);
5939
5940 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x80, 0x80);
5941
5942 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x78,
5943 btn_det->mbhc_nsc << 3);
5944
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005945 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x03,
5946 TABLA_MICBIAS2);
Joonwoo Park0976d012011-12-22 11:48:18 -08005947
5948 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
Joonwoo Park03324832012-03-19 19:36:16 -07005949
5950 snd_soc_update_bits(codec, TABLA_A_MBHC_SCALING_MUX_2, 0xF0, 0xF0);
Joonwoo Parke067b232012-06-14 13:11:30 -07005951
5952 /* override mbhc's micbias */
5953 snd_soc_update_bits(codec, TABLA_A_MICB_1_MBHC, 0x03,
5954 tabla->mbhc_cfg.micbias);
Joonwoo Park0976d012011-12-22 11:48:18 -08005955}
5956
Patrick Lai64b43262011-12-06 17:29:15 -08005957static bool tabla_mbhc_fw_validate(const struct firmware *fw)
5958{
5959 u32 cfg_offset;
5960 struct tabla_mbhc_imped_detect_cfg *imped_cfg;
5961 struct tabla_mbhc_btn_detect_cfg *btn_cfg;
5962
5963 if (fw->size < TABLA_MBHC_CAL_MIN_SIZE)
5964 return false;
5965
5966 /* previous check guarantees that there is enough fw data up
5967 * to num_btn
5968 */
5969 btn_cfg = TABLA_MBHC_CAL_BTN_DET_PTR(fw->data);
5970 cfg_offset = (u32) ((void *) btn_cfg - (void *) fw->data);
5971 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_BTN_SZ(btn_cfg)))
5972 return false;
5973
5974 /* previous check guarantees that there is enough fw data up
5975 * to start of impedance detection configuration
5976 */
5977 imped_cfg = TABLA_MBHC_CAL_IMPED_DET_PTR(fw->data);
5978 cfg_offset = (u32) ((void *) imped_cfg - (void *) fw->data);
5979
5980 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_MIN_SZ))
5981 return false;
5982
5983 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_SZ(imped_cfg)))
5984 return false;
5985
5986 return true;
5987}
Joonwoo Park03324832012-03-19 19:36:16 -07005988
Joonwoo Parkfee17432012-04-16 16:33:55 -07005989/* called under codec_resource_lock acquisition */
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005990static int tabla_determine_button(const struct tabla_priv *priv,
Joonwoo Parkfee17432012-04-16 16:33:55 -07005991 const s32 micmv)
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005992{
5993 s16 *v_btn_low, *v_btn_high;
5994 struct tabla_mbhc_btn_detect_cfg *btn_det;
5995 int i, btn = -1;
5996
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005997 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005998 v_btn_low = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_LOW);
5999 v_btn_high = tabla_mbhc_cal_btn_det_mp(btn_det,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306000 TABLA_BTN_DET_V_BTN_HIGH);
Joonwoo Parkfee17432012-04-16 16:33:55 -07006001
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006002 for (i = 0; i < btn_det->num_btn; i++) {
Joonwoo Parkfee17432012-04-16 16:33:55 -07006003 if ((v_btn_low[i] <= micmv) && (v_btn_high[i] >= micmv)) {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006004 btn = i;
6005 break;
6006 }
6007 }
6008
6009 if (btn == -1)
6010 pr_debug("%s: couldn't find button number for mic mv %d\n",
Joonwoo Parkfee17432012-04-16 16:33:55 -07006011 __func__, micmv);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006012
6013 return btn;
6014}
6015
6016static int tabla_get_button_mask(const int btn)
6017{
6018 int mask = 0;
6019 switch (btn) {
6020 case 0:
6021 mask = SND_JACK_BTN_0;
6022 break;
6023 case 1:
6024 mask = SND_JACK_BTN_1;
6025 break;
6026 case 2:
6027 mask = SND_JACK_BTN_2;
6028 break;
6029 case 3:
6030 mask = SND_JACK_BTN_3;
6031 break;
6032 case 4:
6033 mask = SND_JACK_BTN_4;
6034 break;
6035 case 5:
6036 mask = SND_JACK_BTN_5;
6037 break;
6038 case 6:
6039 mask = SND_JACK_BTN_6;
6040 break;
6041 case 7:
6042 mask = SND_JACK_BTN_7;
6043 break;
6044 }
6045 return mask;
6046}
6047
Bradley Rubincb1e2732011-06-23 16:49:20 -07006048static irqreturn_t tabla_dce_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006049{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006050 int i, mask;
Joonwoo Parkfee17432012-04-16 16:33:55 -07006051 short dce, sta;
Joonwoo Park12334832012-07-23 19:27:52 -07006052 s32 mv, mv_s, stamv, stamv_s;
Joonwoo Parkfee17432012-04-16 16:33:55 -07006053 bool vddio;
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006054 u16 *btn_high;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006055 int btn = -1, meas = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006056 struct tabla_priv *priv = data;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006057 const struct tabla_mbhc_btn_detect_cfg *d =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006058 TABLA_MBHC_CAL_BTN_DET_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006059 short btnmeas[d->n_btn_meas + 1];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006060 struct snd_soc_codec *codec = priv->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306061 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Joonwoo Park03324832012-03-19 19:36:16 -07006062 int n_btn_meas = d->n_btn_meas;
6063 u8 mbhc_status = snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_STATUS) & 0x3E;
Bradley Rubincb1e2732011-06-23 16:49:20 -07006064
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006065 pr_debug("%s: enter\n", __func__);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006066
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006067 btn_high = tabla_mbhc_cal_btn_det_mp(d, TABLA_BTN_DET_V_BTN_HIGH);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006068 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
6069 if (priv->mbhc_state == MBHC_STATE_POTENTIAL_RECOVERY) {
6070 pr_debug("%s: mbhc is being recovered, skip button press\n",
6071 __func__);
6072 goto done;
6073 }
6074
6075 priv->mbhc_state = MBHC_STATE_POTENTIAL;
6076
6077 if (!priv->mbhc_polling_active) {
6078 pr_warn("%s: mbhc polling is not active, skip button press\n",
6079 __func__);
6080 goto done;
6081 }
Joonwoo Park03324832012-03-19 19:36:16 -07006082
6083 dce = tabla_codec_read_dce_result(codec);
6084 mv = tabla_codec_sta_dce_v(codec, 1, dce);
6085
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006086 /* If GPIO interrupt already kicked in, ignore button press */
6087 if (priv->in_gpio_handler) {
6088 pr_debug("%s: GPIO State Changed, ignore button press\n",
6089 __func__);
6090 btn = -1;
6091 goto done;
6092 }
6093
Joonwoo Parkfee17432012-04-16 16:33:55 -07006094 vddio = (priv->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
6095 priv->mbhc_micbias_switched);
6096 mv_s = vddio ? tabla_scale_v_micb_vddio(priv, mv, false) : mv;
6097
Joonwoo Park03324832012-03-19 19:36:16 -07006098 if (mbhc_status != TABLA_MBHC_STATUS_REL_DETECTION) {
6099 if (priv->mbhc_last_resume &&
6100 !time_after(jiffies, priv->mbhc_last_resume + HZ)) {
6101 pr_debug("%s: Button is already released shortly after "
6102 "resume\n", __func__);
6103 n_btn_meas = 0;
Joonwoo Park03324832012-03-19 19:36:16 -07006104 }
6105 }
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07006106
Joonwoo Park12334832012-07-23 19:27:52 -07006107 /* save hw dce */
Joonwoo Parkfee17432012-04-16 16:33:55 -07006108 btnmeas[meas++] = tabla_determine_button(priv, mv_s);
Joonwoo Park12334832012-07-23 19:27:52 -07006109 pr_debug("%s: meas HW - DCE %x,%d,%d button %d\n", __func__,
6110 dce, mv, mv_s, btnmeas[0]);
6111 if (n_btn_meas == 0) {
6112 sta = tabla_codec_read_sta_result(codec);
6113 stamv_s = stamv = tabla_codec_sta_dce_v(codec, 0, sta);
6114 if (vddio)
6115 stamv_s = tabla_scale_v_micb_vddio(priv, stamv, false);
6116 btn = tabla_determine_button(priv, stamv_s);
6117 pr_debug("%s: meas HW - STA %x,%d,%d button %d\n", __func__,
6118 sta, stamv, stamv_s, btn);
6119 BUG_ON(meas != 1);
6120 if (btnmeas[0] != btn)
6121 btn = -1;
6122 }
6123
6124 /* determine pressed button */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006125 for (; ((d->n_btn_meas) && (meas < (d->n_btn_meas + 1))); meas++) {
Joonwoo Parkfee17432012-04-16 16:33:55 -07006126 dce = tabla_codec_sta_dce(codec, 1, false);
6127 mv = tabla_codec_sta_dce_v(codec, 1, dce);
6128 mv_s = vddio ? tabla_scale_v_micb_vddio(priv, mv, false) : mv;
6129
6130 btnmeas[meas] = tabla_determine_button(priv, mv_s);
Joonwoo Park12334832012-07-23 19:27:52 -07006131 pr_debug("%s: meas %d - DCE %x,%d,%d button %d\n",
Joonwoo Parkfee17432012-04-16 16:33:55 -07006132 __func__, meas, dce, mv, mv_s, btnmeas[meas]);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006133 /* if large enough measurements are collected,
6134 * start to check if last all n_btn_con measurements were
6135 * in same button low/high range */
6136 if (meas + 1 >= d->n_btn_con) {
6137 for (i = 0; i < d->n_btn_con; i++)
6138 if ((btnmeas[meas] < 0) ||
6139 (btnmeas[meas] != btnmeas[meas - i]))
6140 break;
6141 if (i == d->n_btn_con) {
6142 /* button pressed */
6143 btn = btnmeas[meas];
6144 break;
Joonwoo Park03324832012-03-19 19:36:16 -07006145 } else if ((n_btn_meas - meas) < (d->n_btn_con - 1)) {
6146 /* if left measurements are less than n_btn_con,
6147 * it's impossible to find button number */
6148 break;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006149 }
6150 }
Joonwoo Park8b1f0982011-12-08 17:12:45 -08006151 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006152
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006153 if (btn >= 0) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006154 if (priv->in_gpio_handler) {
6155 pr_debug("%s: GPIO already triggered, ignore button "
6156 "press\n", __func__);
6157 goto done;
6158 }
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006159 /* narrow down release threshold */
6160 tabla_mbhc_set_rel_thres(codec, btn_high[btn]);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006161 mask = tabla_get_button_mask(btn);
6162 priv->buttons_pressed |= mask;
Joonwoo Park03324832012-03-19 19:36:16 -07006163 wcd9xxx_lock_sleep(core);
6164 if (schedule_delayed_work(&priv->mbhc_btn_dwork,
6165 msecs_to_jiffies(400)) == 0) {
6166 WARN(1, "Button pressed twice without release"
6167 "event\n");
6168 wcd9xxx_unlock_sleep(core);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006169 }
Joonwoo Park816b8e62012-01-23 16:03:21 -08006170 } else {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006171 pr_debug("%s: bogus button press, too short press?\n",
6172 __func__);
Joonwoo Park816b8e62012-01-23 16:03:21 -08006173 }
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006174
Joonwoo Park03324832012-03-19 19:36:16 -07006175 done:
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006176 pr_debug("%s: leave\n", __func__);
6177 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006178 return IRQ_HANDLED;
6179}
6180
Joonwoo Park03324832012-03-19 19:36:16 -07006181static int tabla_is_fake_press(struct tabla_priv *priv)
6182{
6183 int i;
6184 int r = 0;
6185 struct snd_soc_codec *codec = priv->codec;
6186 const int dces = MBHC_NUM_DCE_PLUG_DETECT;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006187 s16 mb_v, v_ins_hu, v_ins_h;
6188
6189 v_ins_hu = tabla_get_current_v_ins(priv, true);
6190 v_ins_h = tabla_get_current_v_ins(priv, false);
Joonwoo Park03324832012-03-19 19:36:16 -07006191
6192 for (i = 0; i < dces; i++) {
6193 usleep_range(10000, 10000);
6194 if (i == 0) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006195 mb_v = tabla_codec_sta_dce(codec, 0, true);
Joonwoo Park03324832012-03-19 19:36:16 -07006196 pr_debug("%s: STA[0]: %d,%d\n", __func__, mb_v,
6197 tabla_codec_sta_dce_v(codec, 0, mb_v));
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006198 if (mb_v < (s16)priv->mbhc_data.v_b1_hu ||
6199 mb_v > v_ins_hu) {
Joonwoo Park03324832012-03-19 19:36:16 -07006200 r = 1;
6201 break;
6202 }
6203 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006204 mb_v = tabla_codec_sta_dce(codec, 1, true);
Joonwoo Park03324832012-03-19 19:36:16 -07006205 pr_debug("%s: DCE[%d]: %d,%d\n", __func__, i, mb_v,
6206 tabla_codec_sta_dce_v(codec, 1, mb_v));
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006207 if (mb_v < (s16)priv->mbhc_data.v_b1_h ||
6208 mb_v > v_ins_h) {
Joonwoo Park03324832012-03-19 19:36:16 -07006209 r = 1;
6210 break;
6211 }
6212 }
6213 }
6214
6215 return r;
6216}
6217
Bradley Rubincb1e2732011-06-23 16:49:20 -07006218static irqreturn_t tabla_release_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006219{
Joonwoo Parke5d3aa92012-01-11 14:47:15 -08006220 int ret;
Joonwoo Park816b8e62012-01-23 16:03:21 -08006221 struct tabla_priv *priv = data;
6222 struct snd_soc_codec *codec = priv->codec;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006223
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006224 pr_debug("%s: enter\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07006225
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006226 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
6227 priv->mbhc_state = MBHC_STATE_RELEASE;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006228
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006229 tabla_codec_drive_v_to_micbias(codec, 10000);
6230
Joonwoo Park03324832012-03-19 19:36:16 -07006231 if (priv->buttons_pressed & TABLA_JACK_BUTTON_MASK) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006232 ret = tabla_cancel_btn_work(priv);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006233 if (ret == 0) {
Joonwoo Park03324832012-03-19 19:36:16 -07006234 pr_debug("%s: Reporting long button release event\n",
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006235 __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006236 if (priv->mbhc_cfg.button_jack)
Joonwoo Park8b1f0982011-12-08 17:12:45 -08006237 tabla_snd_soc_jack_report(priv,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006238 priv->mbhc_cfg.button_jack, 0,
6239 priv->buttons_pressed);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006240 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07006241 if (tabla_is_fake_press(priv)) {
6242 pr_debug("%s: Fake button press interrupt\n",
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006243 __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006244 } else if (priv->mbhc_cfg.button_jack) {
6245 if (priv->in_gpio_handler) {
6246 pr_debug("%s: GPIO kicked in, ignore\n",
6247 __func__);
6248 } else {
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006249 pr_debug("%s: Reporting short button "
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006250 "press and release\n",
6251 __func__);
6252 tabla_snd_soc_jack_report(priv,
6253 priv->mbhc_cfg.button_jack,
6254 priv->buttons_pressed,
6255 priv->buttons_pressed);
6256 tabla_snd_soc_jack_report(priv,
6257 priv->mbhc_cfg.button_jack, 0,
6258 priv->buttons_pressed);
6259 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006260 }
6261 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006262
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006263 priv->buttons_pressed &= ~TABLA_JACK_BUTTON_MASK;
6264 }
6265
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006266 /* revert narrowed release threshold */
6267 tabla_mbhc_calc_rel_thres(codec, tabla_mbhc_highest_btn_mv(codec));
Joonwoo Park03324832012-03-19 19:36:16 -07006268 tabla_codec_calibrate_hs_polling(codec);
6269
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006270 if (priv->mbhc_cfg.gpio)
6271 msleep(TABLA_MBHC_GPIO_REL_DEBOUNCE_TIME_MS);
Joonwoo Park03324832012-03-19 19:36:16 -07006272
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006273 tabla_codec_start_hs_polling(codec);
6274
6275 pr_debug("%s: leave\n", __func__);
6276 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006277 return IRQ_HANDLED;
6278}
6279
Bradley Rubincb1e2732011-06-23 16:49:20 -07006280static void tabla_codec_shutdown_hs_removal_detect(struct snd_soc_codec *codec)
6281{
6282 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08006283 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006284 TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006285
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07006286 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07006287 tabla_codec_enable_config_mode(codec, 1);
6288
6289 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
6290 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x6, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006291
Joonwoo Park0976d012011-12-22 11:48:18 -08006292 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
6293
6294 usleep_range(generic->t_shutdown_plug_rem,
6295 generic->t_shutdown_plug_rem);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006296
6297 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0xA, 0x8);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07006298 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07006299 tabla_codec_enable_config_mode(codec, 0);
6300
6301 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x00);
6302}
6303
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006304static void tabla_codec_cleanup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006305{
6306 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006307
6308 tabla_codec_shutdown_hs_removal_detect(codec);
6309
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07006310 if (!tabla->mclk_enabled) {
Asish Bhattacharya486745a2012-01-20 06:41:53 +05306311 tabla_codec_disable_clock_block(codec);
6312 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006313 }
6314
6315 tabla->mbhc_polling_active = false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006316 tabla->mbhc_state = MBHC_STATE_NONE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006317}
6318
Patrick Lai49efeac2011-11-03 11:01:12 -07006319static irqreturn_t tabla_hphl_ocp_irq(int irq, void *data)
6320{
6321 struct tabla_priv *tabla = data;
6322 struct snd_soc_codec *codec;
6323
6324 pr_info("%s: received HPHL OCP irq\n", __func__);
6325
6326 if (tabla) {
6327 codec = tabla->codec;
Patrick Laie381d1e2012-07-06 22:42:52 -07006328 if ((tabla->hphlocp_cnt < TABLA_OCP_ATTEMPT) &&
6329 (!tabla->hphrocp_cnt)) {
Patrick Laic7cae882011-11-18 11:52:49 -08006330 pr_info("%s: retry\n", __func__);
Patrick Laie381d1e2012-07-06 22:42:52 -07006331 tabla->hphlocp_cnt++;
Patrick Laic7cae882011-11-18 11:52:49 -08006332 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6333 0x00);
6334 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6335 0x10);
6336 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306337 wcd9xxx_disable_irq(codec->control_data,
Patrick Laic7cae882011-11-18 11:52:49 -08006338 TABLA_IRQ_HPH_PA_OCPL_FAULT);
Patrick Laic7cae882011-11-18 11:52:49 -08006339 tabla->hph_status |= SND_JACK_OC_HPHL;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006340 if (tabla->mbhc_cfg.headset_jack)
Patrick Laic7cae882011-11-18 11:52:49 -08006341 tabla_snd_soc_jack_report(tabla,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006342 tabla->mbhc_cfg.headset_jack,
6343 tabla->hph_status,
6344 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07006345 }
6346 } else {
6347 pr_err("%s: Bad tabla private data\n", __func__);
6348 }
6349
6350 return IRQ_HANDLED;
6351}
6352
6353static irqreturn_t tabla_hphr_ocp_irq(int irq, void *data)
6354{
6355 struct tabla_priv *tabla = data;
6356 struct snd_soc_codec *codec;
6357
6358 pr_info("%s: received HPHR OCP irq\n", __func__);
6359
6360 if (tabla) {
6361 codec = tabla->codec;
Patrick Laie381d1e2012-07-06 22:42:52 -07006362 if ((tabla->hphrocp_cnt < TABLA_OCP_ATTEMPT) &&
6363 (!tabla->hphlocp_cnt)) {
Patrick Laic7cae882011-11-18 11:52:49 -08006364 pr_info("%s: retry\n", __func__);
Patrick Laie381d1e2012-07-06 22:42:52 -07006365 tabla->hphrocp_cnt++;
Patrick Laic7cae882011-11-18 11:52:49 -08006366 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6367 0x00);
6368 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6369 0x10);
6370 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306371 wcd9xxx_disable_irq(codec->control_data,
Patrick Laic7cae882011-11-18 11:52:49 -08006372 TABLA_IRQ_HPH_PA_OCPR_FAULT);
Patrick Laic7cae882011-11-18 11:52:49 -08006373 tabla->hph_status |= SND_JACK_OC_HPHR;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006374 if (tabla->mbhc_cfg.headset_jack)
Patrick Laic7cae882011-11-18 11:52:49 -08006375 tabla_snd_soc_jack_report(tabla,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006376 tabla->mbhc_cfg.headset_jack,
6377 tabla->hph_status,
6378 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07006379 }
6380 } else {
6381 pr_err("%s: Bad tabla private data\n", __func__);
6382 }
6383
6384 return IRQ_HANDLED;
6385}
6386
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006387static bool tabla_is_inval_ins_range(struct snd_soc_codec *codec,
6388 s32 mic_volt, bool highhph, bool *highv)
Joonwoo Park03324832012-03-19 19:36:16 -07006389{
6390 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006391 bool invalid = false;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006392 s16 v_hs_max;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006393
6394 /* Perform this check only when the high voltage headphone
6395 * needs to be considered as invalid
6396 */
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006397 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006398 *highv = mic_volt > v_hs_max;
6399 if (!highhph && *highv)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006400 invalid = true;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006401 else if (mic_volt < tabla->mbhc_data.v_inval_ins_high &&
6402 (mic_volt > tabla->mbhc_data.v_inval_ins_low))
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006403 invalid = true;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006404
6405 return invalid;
6406}
6407
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006408static bool tabla_is_inval_ins_delta(struct snd_soc_codec *codec,
6409 int mic_volt, int mic_volt_prev,
6410 int threshold)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006411{
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006412 return abs(mic_volt - mic_volt_prev) > threshold;
Joonwoo Park03324832012-03-19 19:36:16 -07006413}
6414
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006415/* called under codec_resource_lock acquisition */
6416void tabla_find_plug_and_report(struct snd_soc_codec *codec,
6417 enum tabla_mbhc_plug_type plug_type)
Joonwoo Park03324832012-03-19 19:36:16 -07006418{
6419 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006420
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006421 pr_debug("%s: enter current_plug(%d) new_plug(%d)\n",
6422 __func__, tabla->current_plug, plug_type);
6423
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006424 if (plug_type == PLUG_TYPE_HEADPHONE &&
6425 tabla->current_plug == PLUG_TYPE_NONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006426 /* Nothing was reported previously
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006427 * report a headphone or unsupported
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006428 */
6429 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
6430 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006431 } else if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006432 if (!tabla->mbhc_cfg.detect_extn_cable) {
6433 if (tabla->current_plug == PLUG_TYPE_HEADSET)
6434 tabla_codec_report_plug(codec, 0,
6435 SND_JACK_HEADSET);
6436 else if (tabla->current_plug == PLUG_TYPE_HEADPHONE)
6437 tabla_codec_report_plug(codec, 0,
6438 SND_JACK_HEADPHONE);
6439 }
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006440 tabla_codec_report_plug(codec, 1, SND_JACK_UNSUPPORTED);
6441 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006442 } else if (plug_type == PLUG_TYPE_HEADSET) {
6443 /* If Headphone was reported previously, this will
6444 * only report the mic line
6445 */
6446 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
6447 msleep(100);
6448 tabla_codec_start_hs_polling(codec);
6449 } else if (plug_type == PLUG_TYPE_HIGH_HPH) {
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006450 if (tabla->mbhc_cfg.detect_extn_cable) {
6451 /* High impedance device found. Report as LINEOUT*/
6452 tabla_codec_report_plug(codec, 1, SND_JACK_LINEOUT);
6453 tabla_codec_cleanup_hs_polling(codec);
6454 pr_debug("%s: setup mic trigger for further detection\n",
6455 __func__);
6456 tabla->lpi_enabled = true;
6457 /*
6458 * Do not enable HPHL trigger. If playback is active,
6459 * it might lead to continuous false HPHL triggers
6460 */
6461 tabla_codec_enable_hs_detect(codec, 1,
6462 MBHC_USE_MB_TRIGGER,
6463 false);
6464 } else {
6465 if (tabla->current_plug == PLUG_TYPE_NONE)
6466 tabla_codec_report_plug(codec, 1,
6467 SND_JACK_HEADPHONE);
6468 tabla_codec_cleanup_hs_polling(codec);
6469 pr_debug("setup mic trigger for further detection\n");
6470 tabla->lpi_enabled = true;
6471 tabla_codec_enable_hs_detect(codec, 1,
6472 MBHC_USE_MB_TRIGGER |
6473 MBHC_USE_HPHL_TRIGGER,
6474 false);
6475 }
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006476 } else {
6477 WARN(1, "Unexpected current plug_type %d, plug_type %d\n",
6478 tabla->current_plug, plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006479 }
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006480 pr_debug("%s: leave\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006481}
6482
6483/* should be called under interrupt context that hold suspend */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006484static void tabla_schedule_hs_detect_plug(struct tabla_priv *tabla,
6485 struct work_struct *correct_plug_work)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006486{
6487 pr_debug("%s: scheduling tabla_hs_correct_gpio_plug\n", __func__);
6488 tabla->hs_detect_work_stop = false;
6489 wcd9xxx_lock_sleep(tabla->codec->control_data);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006490 schedule_work(correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006491}
6492
6493/* called under codec_resource_lock acquisition */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006494static void tabla_cancel_hs_detect_plug(struct tabla_priv *tabla,
6495 struct work_struct *correct_plug_work)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006496{
6497 pr_debug("%s: canceling hs_correct_plug_work\n", __func__);
6498 tabla->hs_detect_work_stop = true;
6499 wmb();
6500 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006501 if (cancel_work_sync(correct_plug_work)) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006502 pr_debug("%s: hs_correct_plug_work is canceled\n", __func__);
6503 wcd9xxx_unlock_sleep(tabla->codec->control_data);
6504 }
6505 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
6506}
6507
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006508static bool tabla_hs_gpio_level_remove(struct tabla_priv *tabla)
6509{
6510 return (gpio_get_value_cansleep(tabla->mbhc_cfg.gpio) !=
6511 tabla->mbhc_cfg.gpio_level_insert);
6512}
6513
Joonwoo Park41956722012-04-18 13:13:07 -07006514/* called under codec_resource_lock acquisition */
6515static void tabla_codec_hphr_gnd_switch(struct snd_soc_codec *codec, bool on)
6516{
6517 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, on);
6518 if (on)
6519 usleep_range(5000, 5000);
6520}
6521
6522/* called under codec_resource_lock acquisition and mbhc override = 1 */
6523static enum tabla_mbhc_plug_type
6524tabla_codec_get_plug_type(struct snd_soc_codec *codec, bool highhph)
6525{
6526 int i;
6527 bool gndswitch, vddioswitch;
6528 int scaled;
6529 struct tabla_mbhc_plug_type_cfg *plug_type_ptr;
6530 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07006531 int num_det = MBHC_NUM_DCE_PLUG_DETECT + 1;
Joonwoo Park41956722012-04-18 13:13:07 -07006532 enum tabla_mbhc_plug_type plug_type[num_det];
6533 s16 mb_v[num_det];
6534 s32 mic_mv[num_det];
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006535 bool inval;
6536 bool highdelta;
6537 bool ahighv = false, highv;
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07006538 bool gndmicswapped = false;
Joonwoo Park41956722012-04-18 13:13:07 -07006539
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006540 pr_debug("%s: enter\n", __func__);
6541
Joonwoo Park41956722012-04-18 13:13:07 -07006542 /* make sure override is on */
6543 WARN_ON(!(snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x04));
6544
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006545 /* GND and MIC swap detection requires at least 2 rounds of DCE */
6546 BUG_ON(num_det < 2);
6547
6548 plug_type_ptr =
6549 TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
6550
6551 plug_type[0] = PLUG_TYPE_INVALID;
6552
Joonwoo Park41956722012-04-18 13:13:07 -07006553 /* performs DCEs for N times
6554 * 1st: check if voltage is in invalid range
6555 * 2nd - N-2nd: check voltage range and delta
6556 * N-1st: check voltage range, delta with HPHR GND switch
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07006557 * Nth: check voltage range with VDDIO switch */
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006558 for (i = 0; i < num_det; i++) {
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07006559 gndswitch = (i == (num_det - 2));
6560 vddioswitch = (i == (num_det - 1)) || (i == (num_det - 2));
Joonwoo Park41956722012-04-18 13:13:07 -07006561 if (i == 0) {
6562 mb_v[i] = tabla_codec_setup_hs_polling(codec);
6563 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006564 inval = tabla_is_inval_ins_range(codec, mic_mv[i],
6565 highhph, &highv);
6566 ahighv |= highv;
Joonwoo Park41956722012-04-18 13:13:07 -07006567 scaled = mic_mv[i];
Joonwoo Park41956722012-04-18 13:13:07 -07006568 } else {
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006569 if (vddioswitch)
6570 __tabla_codec_switch_micbias(tabla->codec, 1,
6571 false, false);
Joonwoo Park41956722012-04-18 13:13:07 -07006572 if (gndswitch)
6573 tabla_codec_hphr_gnd_switch(codec, true);
6574 mb_v[i] = __tabla_codec_sta_dce(codec, 1, true, true);
6575 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006576 if (vddioswitch)
6577 scaled = tabla_scale_v_micb_vddio(tabla,
Joonwoo Park41956722012-04-18 13:13:07 -07006578 mic_mv[i],
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006579 false);
6580 else
6581 scaled = mic_mv[i];
6582 /* !gndswitch & vddioswitch means the previous DCE
6583 * was done with gndswitch, don't compare with DCE
6584 * with gndswitch */
6585 highdelta = tabla_is_inval_ins_delta(codec, scaled,
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07006586 mic_mv[i - 1],
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006587 TABLA_MBHC_FAKE_INS_DELTA_SCALED_MV);
6588 inval = (tabla_is_inval_ins_range(codec, mic_mv[i],
6589 highhph, &highv) ||
6590 highdelta);
6591 ahighv |= highv;
Joonwoo Park41956722012-04-18 13:13:07 -07006592 if (gndswitch)
6593 tabla_codec_hphr_gnd_switch(codec, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006594 if (vddioswitch)
6595 __tabla_codec_switch_micbias(tabla->codec, 0,
6596 false, false);
6597 /* claim UNSUPPORTED plug insertion when
6598 * good headset is detected but HPHR GND switch makes
6599 * delta difference */
6600 if (i == (num_det - 2) && highdelta && !ahighv)
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07006601 gndmicswapped = true;
6602 else if (i == (num_det - 1) && inval) {
6603 if (gndmicswapped)
6604 plug_type[0] = PLUG_TYPE_GND_MIC_SWAP;
6605 else
6606 plug_type[0] = PLUG_TYPE_INVALID;
6607 }
Joonwoo Park41956722012-04-18 13:13:07 -07006608 }
6609 pr_debug("%s: DCE #%d, %04x, V %d, scaled V %d, GND %d, "
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006610 "VDDIO %d, inval %d\n", __func__,
Joonwoo Park41956722012-04-18 13:13:07 -07006611 i + 1, mb_v[i] & 0xffff, mic_mv[i], scaled, gndswitch,
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006612 vddioswitch, inval);
6613 /* don't need to run further DCEs */
6614 if (ahighv && inval)
6615 break;
6616 mic_mv[i] = scaled;
Joonwoo Park41956722012-04-18 13:13:07 -07006617 }
6618
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006619 for (i = 0; (plug_type[0] != PLUG_TYPE_GND_MIC_SWAP && !inval) &&
6620 i < num_det; i++) {
Joonwoo Park41956722012-04-18 13:13:07 -07006621 /*
6622 * If we are here, means none of the all
6623 * measurements are fake, continue plug type detection.
6624 * If all three measurements do not produce same
6625 * plug type, restart insertion detection
6626 */
6627 if (mic_mv[i] < plug_type_ptr->v_no_mic) {
6628 plug_type[i] = PLUG_TYPE_HEADPHONE;
6629 pr_debug("%s: Detect attempt %d, detected Headphone\n",
6630 __func__, i);
6631 } else if (highhph && (mic_mv[i] > plug_type_ptr->v_hs_max)) {
6632 plug_type[i] = PLUG_TYPE_HIGH_HPH;
6633 pr_debug("%s: Detect attempt %d, detected High "
6634 "Headphone\n", __func__, i);
6635 } else {
6636 plug_type[i] = PLUG_TYPE_HEADSET;
6637 pr_debug("%s: Detect attempt %d, detected Headset\n",
6638 __func__, i);
6639 }
6640
6641 if (i > 0 && (plug_type[i - 1] != plug_type[i])) {
6642 pr_err("%s: Detect attempt %d and %d are not same",
6643 __func__, i - 1, i);
6644 plug_type[0] = PLUG_TYPE_INVALID;
6645 inval = true;
6646 break;
6647 }
6648 }
6649
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006650 pr_debug("%s: Detected plug type %d\n", __func__, plug_type[0]);
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006651 pr_debug("%s: leave\n", __func__);
Joonwoo Park41956722012-04-18 13:13:07 -07006652 return plug_type[0];
6653}
6654
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006655static void tabla_hs_correct_gpio_plug(struct work_struct *work)
6656{
6657 struct tabla_priv *tabla;
6658 struct snd_soc_codec *codec;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006659 int retry = 0, pt_gnd_mic_swap_cnt = 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006660 bool correction = false;
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006661 enum tabla_mbhc_plug_type plug_type = PLUG_TYPE_INVALID;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006662 unsigned long timeout;
6663
6664 tabla = container_of(work, struct tabla_priv, hs_correct_plug_work);
6665 codec = tabla->codec;
6666
6667 pr_debug("%s: enter\n", __func__);
6668 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
6669
6670 /* Keep override on during entire plug type correction work.
6671 *
6672 * This is okay under the assumption that any GPIO irqs which use
6673 * MBHC block cancel and sync this work so override is off again
6674 * prior to GPIO interrupt handler's MBHC block usage.
6675 * Also while this correction work is running, we can guarantee
6676 * DAPM doesn't use any MBHC block as this work only runs with
6677 * headphone detection.
6678 */
6679 tabla_turn_onoff_override(codec, true);
6680
6681 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
6682 while (!time_after(jiffies, timeout)) {
6683 ++retry;
6684 rmb();
6685 if (tabla->hs_detect_work_stop) {
6686 pr_debug("%s: stop requested\n", __func__);
6687 break;
6688 }
6689
6690 msleep(TABLA_HS_DETECT_PLUG_INERVAL_MS);
6691 if (tabla_hs_gpio_level_remove(tabla)) {
6692 pr_debug("%s: GPIO value is low\n", __func__);
6693 break;
6694 }
6695
6696 /* can race with removal interrupt */
6697 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Joonwoo Park41956722012-04-18 13:13:07 -07006698 plug_type = tabla_codec_get_plug_type(codec, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006699 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
6700
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006701 pr_debug("%s: attempt(%d) current_plug(%d) new_plug(%d)\n",
6702 __func__, retry, tabla->current_plug, plug_type);
Joonwoo Park41956722012-04-18 13:13:07 -07006703 if (plug_type == PLUG_TYPE_INVALID) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006704 pr_debug("Invalid plug in attempt # %d\n", retry);
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006705 if (!tabla->mbhc_cfg.detect_extn_cable &&
6706 retry == NUM_ATTEMPTS_TO_REPORT &&
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006707 tabla->current_plug == PLUG_TYPE_NONE) {
6708 tabla_codec_report_plug(codec, 1,
6709 SND_JACK_HEADPHONE);
6710 }
Joonwoo Park41956722012-04-18 13:13:07 -07006711 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006712 pr_debug("Good headphone detected, continue polling mic\n");
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006713 if (tabla->mbhc_cfg.detect_extn_cable) {
6714 if (tabla->current_plug != plug_type)
6715 tabla_codec_report_plug(codec, 1,
6716 SND_JACK_HEADPHONE);
6717 } else if (tabla->current_plug == PLUG_TYPE_NONE)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006718 tabla_codec_report_plug(codec, 1,
6719 SND_JACK_HEADPHONE);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006720 } else {
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006721 if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
6722 pt_gnd_mic_swap_cnt++;
6723 if (pt_gnd_mic_swap_cnt <
6724 TABLA_MBHC_GND_MIC_SWAP_THRESHOLD)
6725 continue;
6726 else if (pt_gnd_mic_swap_cnt >
6727 TABLA_MBHC_GND_MIC_SWAP_THRESHOLD) {
6728 /* This is due to GND/MIC switch didn't
6729 * work, Report unsupported plug */
6730 } else if (tabla->mbhc_cfg.swap_gnd_mic) {
6731 /* if switch is toggled, check again,
6732 * otherwise report unsupported plug */
6733 if (tabla->mbhc_cfg.swap_gnd_mic(codec))
6734 continue;
6735 }
6736 } else
6737 pt_gnd_mic_swap_cnt = 0;
6738
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006739 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
6740 /* Turn off override */
6741 tabla_turn_onoff_override(codec, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006742 /* The valid plug also includes PLUG_TYPE_GND_MIC_SWAP
6743 */
Joonwoo Park41956722012-04-18 13:13:07 -07006744 tabla_find_plug_and_report(codec, plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006745 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
6746 pr_debug("Attempt %d found correct plug %d\n", retry,
Joonwoo Park41956722012-04-18 13:13:07 -07006747 plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006748 correction = true;
6749 break;
6750 }
6751 }
6752
6753 /* Turn off override */
6754 if (!correction)
6755 tabla_turn_onoff_override(codec, false);
6756
6757 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006758
6759 if (tabla->mbhc_cfg.detect_extn_cable) {
6760 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
6761 if (tabla->current_plug == PLUG_TYPE_HEADPHONE ||
6762 tabla->current_plug == PLUG_TYPE_GND_MIC_SWAP ||
6763 tabla->current_plug == PLUG_TYPE_INVALID ||
6764 plug_type == PLUG_TYPE_INVALID) {
6765 /* Enable removal detection */
6766 tabla_codec_cleanup_hs_polling(codec);
6767 tabla_codec_enable_hs_detect(codec, 0, 0, false);
6768 }
6769 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
6770 }
6771 pr_debug("%s: leave current_plug(%d)\n",
6772 __func__, tabla->current_plug);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006773 /* unlock sleep */
6774 wcd9xxx_unlock_sleep(tabla->codec->control_data);
6775}
6776
6777/* called under codec_resource_lock acquisition */
6778static void tabla_codec_decide_gpio_plug(struct snd_soc_codec *codec)
6779{
Joonwoo Park41956722012-04-18 13:13:07 -07006780 enum tabla_mbhc_plug_type plug_type;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006781 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006782
6783 pr_debug("%s: enter\n", __func__);
6784
6785 tabla_turn_onoff_override(codec, true);
Joonwoo Park41956722012-04-18 13:13:07 -07006786 plug_type = tabla_codec_get_plug_type(codec, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006787 tabla_turn_onoff_override(codec, false);
6788
6789 if (tabla_hs_gpio_level_remove(tabla)) {
6790 pr_debug("%s: GPIO value is low when determining plug\n",
6791 __func__);
6792 return;
6793 }
6794
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006795 if (plug_type == PLUG_TYPE_INVALID ||
6796 plug_type == PLUG_TYPE_GND_MIC_SWAP) {
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006797 tabla_schedule_hs_detect_plug(tabla,
6798 &tabla->hs_correct_plug_work);
Joonwoo Park41956722012-04-18 13:13:07 -07006799 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006800 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
6801
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006802 tabla_schedule_hs_detect_plug(tabla,
6803 &tabla->hs_correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006804 } else {
Joonwoo Park41956722012-04-18 13:13:07 -07006805 pr_debug("%s: Valid plug found, determine plug type %d\n",
6806 __func__, plug_type);
6807 tabla_find_plug_and_report(codec, plug_type);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006808 }
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006809 pr_debug("%s: leave\n", __func__);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006810}
6811
6812/* called under codec_resource_lock acquisition */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006813static void tabla_codec_detect_plug_type(struct snd_soc_codec *codec)
6814{
Joonwoo Park41956722012-04-18 13:13:07 -07006815 enum tabla_mbhc_plug_type plug_type;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006816 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
6817 const struct tabla_mbhc_plug_detect_cfg *plug_det =
6818 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->mbhc_cfg.calibration);
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006819 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006820 /* Turn on the override,
6821 * tabla_codec_setup_hs_polling requires override on */
6822 tabla_turn_onoff_override(codec, true);
Joonwoo Park03324832012-03-19 19:36:16 -07006823
6824 if (plug_det->t_ins_complete > 20)
6825 msleep(plug_det->t_ins_complete);
6826 else
6827 usleep_range(plug_det->t_ins_complete * 1000,
6828 plug_det->t_ins_complete * 1000);
6829
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006830 if (tabla->mbhc_cfg.gpio) {
6831 /* Turn off the override */
6832 tabla_turn_onoff_override(codec, false);
6833 if (tabla_hs_gpio_level_remove(tabla))
6834 pr_debug("%s: GPIO value is low when determining "
6835 "plug\n", __func__);
6836 else
6837 tabla_codec_decide_gpio_plug(codec);
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006838 pr_debug("%s: leave\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006839 return;
6840 }
6841
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006842 plug_type = tabla_codec_get_plug_type(codec, false);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006843 tabla_turn_onoff_override(codec, false);
Joonwoo Park03324832012-03-19 19:36:16 -07006844
Joonwoo Park41956722012-04-18 13:13:07 -07006845 if (plug_type == PLUG_TYPE_INVALID) {
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006846 pr_debug("%s: Invalid plug type detected\n", __func__);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006847 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006848 tabla_codec_cleanup_hs_polling(codec);
6849 tabla_codec_enable_hs_detect(codec, 1,
6850 MBHC_USE_MB_TRIGGER |
6851 MBHC_USE_HPHL_TRIGGER, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006852 } else if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
6853 pr_debug("%s: GND-MIC swapped plug type detected\n", __func__);
6854 tabla_codec_report_plug(codec, 1, SND_JACK_UNSUPPORTED);
6855 tabla_codec_cleanup_hs_polling(codec);
6856 tabla_codec_enable_hs_detect(codec, 0, 0, false);
Joonwoo Park41956722012-04-18 13:13:07 -07006857 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Park03324832012-03-19 19:36:16 -07006858 pr_debug("%s: Headphone Detected\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006859 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
6860 tabla_codec_cleanup_hs_polling(codec);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006861 tabla_schedule_hs_detect_plug(tabla,
6862 &tabla->hs_correct_plug_work_nogpio);
Joonwoo Park41956722012-04-18 13:13:07 -07006863 } else if (plug_type == PLUG_TYPE_HEADSET) {
Joonwoo Park03324832012-03-19 19:36:16 -07006864 pr_debug("%s: Headset detected\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006865 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
6866
Joonwoo Park03324832012-03-19 19:36:16 -07006867 /* avoid false button press detect */
6868 msleep(50);
Joonwoo Park03324832012-03-19 19:36:16 -07006869 tabla_codec_start_hs_polling(codec);
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006870 } else if (tabla->mbhc_cfg.detect_extn_cable &&
6871 plug_type == PLUG_TYPE_HIGH_HPH) {
6872 pr_debug("%s: High impedance plug type detected\n", __func__);
6873 tabla_codec_report_plug(codec, 1, SND_JACK_LINEOUT);
6874 /* Enable insertion detection on the other end of cable */
6875 tabla_codec_cleanup_hs_polling(codec);
6876 tabla_codec_enable_hs_detect(codec, 1,
6877 MBHC_USE_MB_TRIGGER, false);
Joonwoo Park03324832012-03-19 19:36:16 -07006878 }
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006879 pr_debug("%s: leave\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07006880}
6881
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006882/* called only from interrupt which is under codec_resource_lock acquisition */
6883static void tabla_hs_insert_irq_gpio(struct tabla_priv *priv, bool is_removal)
Bradley Rubincb1e2732011-06-23 16:49:20 -07006884{
Bradley Rubincb1e2732011-06-23 16:49:20 -07006885 struct snd_soc_codec *codec = priv->codec;
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006886 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006887
6888 if (!is_removal) {
6889 pr_debug("%s: MIC trigger insertion interrupt\n", __func__);
6890
6891 rmb();
6892 if (priv->lpi_enabled)
6893 msleep(100);
6894
6895 rmb();
6896 if (!priv->lpi_enabled) {
6897 pr_debug("%s: lpi is disabled\n", __func__);
6898 } else if (gpio_get_value_cansleep(priv->mbhc_cfg.gpio) ==
6899 priv->mbhc_cfg.gpio_level_insert) {
6900 pr_debug("%s: Valid insertion, "
6901 "detect plug type\n", __func__);
6902 tabla_codec_decide_gpio_plug(codec);
6903 } else {
6904 pr_debug("%s: Invalid insertion, "
6905 "stop plug detection\n", __func__);
6906 }
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006907 } else if (tabla->mbhc_cfg.detect_extn_cable) {
6908 pr_debug("%s: Removal\n", __func__);
6909 if (!tabla_hs_gpio_level_remove(tabla)) {
6910 /*
6911 * gpio says, something is still inserted, could be
6912 * extension cable i.e. headset is removed from
6913 * extension cable
6914 */
6915 /* cancel detect plug */
6916 tabla_cancel_hs_detect_plug(tabla,
6917 &tabla->hs_correct_plug_work);
6918 tabla_codec_decide_gpio_plug(codec);
6919 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006920 } else {
6921 pr_err("%s: GPIO used, invalid MBHC Removal\n", __func__);
6922 }
6923}
6924
6925/* called only from interrupt which is under codec_resource_lock acquisition */
6926static void tabla_hs_insert_irq_nogpio(struct tabla_priv *priv, bool is_removal,
6927 bool is_mb_trigger)
6928{
Joonwoo Park03324832012-03-19 19:36:16 -07006929 int ret;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006930 struct snd_soc_codec *codec = priv->codec;
6931 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006932 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
6933
6934 /* Cancel possibly running hs_detect_work */
6935 tabla_cancel_hs_detect_plug(tabla,
6936 &tabla->hs_correct_plug_work_nogpio);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07006937
6938 if (is_removal) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006939
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07006940 /*
6941 * If headphone is removed while playback is in progress,
6942 * it is possible that micbias will be switched to VDDIO.
6943 */
Joonwoo Park03324832012-03-19 19:36:16 -07006944 tabla_codec_switch_micbias(codec, 0);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006945 if (priv->current_plug == PLUG_TYPE_HEADPHONE)
6946 tabla_codec_report_plug(codec, 0, SND_JACK_HEADPHONE);
6947 else if (priv->current_plug == PLUG_TYPE_GND_MIC_SWAP)
6948 tabla_codec_report_plug(codec, 0, SND_JACK_UNSUPPORTED);
6949 else
6950 WARN(1, "%s: Unexpected current plug type %d\n",
6951 __func__, priv->current_plug);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006952 tabla_codec_shutdown_hs_removal_detect(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006953 tabla_codec_enable_hs_detect(codec, 1,
6954 MBHC_USE_MB_TRIGGER |
6955 MBHC_USE_HPHL_TRIGGER,
Joonwoo Park03324832012-03-19 19:36:16 -07006956 true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006957 } else if (is_mb_trigger && !is_removal) {
Joonwoo Park03324832012-03-19 19:36:16 -07006958 pr_debug("%s: Waiting for Headphone left trigger\n",
6959 __func__);
6960 wcd9xxx_lock_sleep(core);
6961 if (schedule_delayed_work(&priv->mbhc_insert_dwork,
6962 usecs_to_jiffies(1000000)) == 0) {
6963 pr_err("%s: mbhc_insert_dwork is already scheduled\n",
6964 __func__);
6965 wcd9xxx_unlock_sleep(core);
Joonwoo Parkf4267c22012-01-10 13:25:24 -08006966 }
Joonwoo Park03324832012-03-19 19:36:16 -07006967 tabla_codec_enable_hs_detect(codec, 1, MBHC_USE_HPHL_TRIGGER,
6968 false);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006969 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006970 ret = cancel_delayed_work(&priv->mbhc_insert_dwork);
6971 if (ret != 0) {
6972 pr_debug("%s: Complete plug insertion, Detecting plug "
6973 "type\n", __func__);
6974 tabla_codec_detect_plug_type(codec);
6975 wcd9xxx_unlock_sleep(core);
6976 } else {
6977 wcd9xxx_enable_irq(codec->control_data,
6978 TABLA_IRQ_MBHC_INSERTION);
6979 pr_err("%s: Error detecting plug insertion\n",
6980 __func__);
6981 }
Joonwoo Park03324832012-03-19 19:36:16 -07006982 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006983}
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08006984
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07006985/* called only from interrupt which is under codec_resource_lock acquisition */
6986static void tabla_hs_insert_irq_extn(struct tabla_priv *priv,
6987 bool is_mb_trigger)
6988{
6989 struct snd_soc_codec *codec = priv->codec;
6990 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
6991
6992 /* Cancel possibly running hs_detect_work */
6993 tabla_cancel_hs_detect_plug(tabla,
6994 &tabla->hs_correct_plug_work);
6995
6996 if (is_mb_trigger) {
6997 pr_debug("%s: Waiting for Headphone left trigger\n",
6998 __func__);
6999 tabla_codec_enable_hs_detect(codec, 1, MBHC_USE_HPHL_TRIGGER,
7000 false);
7001 } else {
7002 pr_debug("%s: HPHL trigger received, detecting plug type\n",
7003 __func__);
7004 tabla_codec_detect_plug_type(codec);
7005 }
7006}
7007
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007008static irqreturn_t tabla_hs_insert_irq(int irq, void *data)
7009{
7010 bool is_mb_trigger, is_removal;
7011 struct tabla_priv *priv = data;
7012 struct snd_soc_codec *codec = priv->codec;
Bradley Rubincb1e2732011-06-23 16:49:20 -07007013
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007014 pr_debug("%s: enter\n", __func__);
7015 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
7016 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
7017
7018 is_mb_trigger = !!(snd_soc_read(codec, priv->mbhc_bias_regs.mbhc_reg) &
7019 0x10);
7020 is_removal = !!(snd_soc_read(codec, TABLA_A_CDC_MBHC_INT_CTL) & 0x02);
7021 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x03, 0x00);
7022
7023 /* Turn off both HPH and MIC line schmitt triggers */
7024 snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
7025 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
7026 snd_soc_update_bits(codec, priv->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
7027
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07007028 if (priv->mbhc_cfg.detect_extn_cable &&
7029 priv->current_plug == PLUG_TYPE_HIGH_HPH)
7030 tabla_hs_insert_irq_extn(priv, is_mb_trigger);
7031 else if (priv->mbhc_cfg.gpio)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007032 tabla_hs_insert_irq_gpio(priv, is_removal);
7033 else
7034 tabla_hs_insert_irq_nogpio(priv, is_removal, is_mb_trigger);
7035
7036 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bradley Rubincb1e2732011-06-23 16:49:20 -07007037 return IRQ_HANDLED;
7038}
7039
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007040static bool is_valid_mic_voltage(struct snd_soc_codec *codec, s32 mic_mv)
7041{
7042 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007043 const struct tabla_mbhc_plug_type_cfg *plug_type =
7044 TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
7045 const s16 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007046
7047 return (!(mic_mv > 10 && mic_mv < 80) && (mic_mv > plug_type->v_no_mic)
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007048 && (mic_mv < v_hs_max)) ? true : false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007049}
7050
7051/* called under codec_resource_lock acquisition
7052 * returns true if mic voltage range is back to normal insertion
7053 * returns false either if timedout or removed */
7054static bool tabla_hs_remove_settle(struct snd_soc_codec *codec)
7055{
7056 int i;
7057 bool timedout, settled = false;
7058 s32 mic_mv[MBHC_NUM_DCE_PLUG_DETECT];
7059 short mb_v[MBHC_NUM_DCE_PLUG_DETECT];
7060 unsigned long retry = 0, timeout;
7061 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007062 const s16 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007063
7064 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
7065 while (!(timedout = time_after(jiffies, timeout))) {
7066 retry++;
7067 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
7068 pr_debug("%s: GPIO indicates removal\n", __func__);
7069 break;
7070 }
7071
7072 if (tabla->mbhc_cfg.gpio) {
7073 if (retry > 1)
7074 msleep(250);
7075 else
7076 msleep(50);
7077 }
7078
7079 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
7080 pr_debug("%s: GPIO indicates removal\n", __func__);
7081 break;
7082 }
7083
7084 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++) {
7085 mb_v[i] = tabla_codec_sta_dce(codec, 1, true);
7086 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
7087 pr_debug("%s : DCE run %lu, mic_mv = %d(%x)\n",
7088 __func__, retry, mic_mv[i], mb_v[i]);
7089 }
7090
7091 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
7092 pr_debug("%s: GPIO indicates removal\n", __func__);
7093 break;
7094 }
7095
7096 if (tabla->current_plug == PLUG_TYPE_NONE) {
7097 pr_debug("%s : headset/headphone is removed\n",
7098 __func__);
7099 break;
7100 }
7101
7102 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++)
7103 if (!is_valid_mic_voltage(codec, mic_mv[i]))
7104 break;
7105
7106 if (i == MBHC_NUM_DCE_PLUG_DETECT) {
7107 pr_debug("%s: MIC voltage settled\n", __func__);
7108 settled = true;
7109 msleep(200);
7110 break;
7111 }
7112
7113 /* only for non-GPIO remove irq */
7114 if (!tabla->mbhc_cfg.gpio) {
7115 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++)
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007116 if (mic_mv[i] < v_hs_max)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007117 break;
7118 if (i == MBHC_NUM_DCE_PLUG_DETECT) {
7119 pr_debug("%s: Headset is removed\n", __func__);
7120 break;
7121 }
7122 }
7123 }
7124
7125 if (timedout)
7126 pr_debug("%s: Microphone did not settle in %d seconds\n",
7127 __func__, TABLA_HS_DETECT_PLUG_TIME_MS);
7128 return settled;
7129}
7130
7131/* called only from interrupt which is under codec_resource_lock acquisition */
7132static void tabla_hs_remove_irq_gpio(struct tabla_priv *priv)
7133{
7134 struct snd_soc_codec *codec = priv->codec;
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07007135 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007136 if (tabla_hs_remove_settle(codec))
7137 tabla_codec_start_hs_polling(codec);
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07007138 pr_debug("%s: leave\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007139}
7140
7141/* called only from interrupt which is under codec_resource_lock acquisition */
7142static void tabla_hs_remove_irq_nogpio(struct tabla_priv *priv)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007143{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08007144 short bias_value;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007145 bool removed = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007146 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park0976d012011-12-22 11:48:18 -08007147 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007148 TABLA_MBHC_CAL_GENERAL_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08007149 int min_us = TABLA_FAKE_REMOVAL_MIN_PERIOD_MS * 1000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007150
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07007151 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007152 if (priv->current_plug != PLUG_TYPE_HEADSET) {
7153 pr_debug("%s(): Headset is not inserted, ignore removal\n",
7154 __func__);
7155 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
7156 0x08, 0x08);
7157 return;
7158 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007159
Joonwoo Park0976d012011-12-22 11:48:18 -08007160 usleep_range(generic->t_shutdown_plug_rem,
7161 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007162
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08007163 do {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007164 bias_value = tabla_codec_sta_dce(codec, 1, true);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08007165 pr_debug("%s: DCE %d,%d, %d us left\n", __func__, bias_value,
7166 tabla_codec_sta_dce_v(codec, 1, bias_value), min_us);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007167 if (bias_value < tabla_get_current_v_ins(priv, false)) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007168 pr_debug("%s: checking false removal\n", __func__);
7169 msleep(500);
7170 removed = !tabla_hs_remove_settle(codec);
7171 pr_debug("%s: headset %sactually removed\n", __func__,
7172 removed ? "" : "not ");
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08007173 break;
7174 }
7175 min_us -= priv->mbhc_data.t_dce;
7176 } while (min_us > 0);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07007177
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007178 if (removed) {
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07007179 if (priv->mbhc_cfg.detect_extn_cable) {
7180 if (!tabla_hs_gpio_level_remove(priv)) {
7181 /*
7182 * extension cable is still plugged in
7183 * report it as LINEOUT device
7184 */
7185 tabla_codec_report_plug(codec, 1,
7186 SND_JACK_LINEOUT);
7187 tabla_codec_cleanup_hs_polling(codec);
7188 tabla_codec_enable_hs_detect(codec, 1,
7189 MBHC_USE_MB_TRIGGER,
7190 false);
7191 }
7192 } else {
7193 /* Cancel possibly running hs_detect_work */
7194 tabla_cancel_hs_detect_plug(priv,
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007195 &priv->hs_correct_plug_work_nogpio);
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07007196 /*
7197 * If this removal is not false, first check the micbias
7198 * switch status and switch it to LDOH if it is already
7199 * switched to VDDIO.
7200 */
7201 tabla_codec_switch_micbias(codec, 0);
Joonwoo Park03324832012-03-19 19:36:16 -07007202
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07007203 tabla_codec_report_plug(codec, 0, SND_JACK_HEADSET);
7204 tabla_codec_cleanup_hs_polling(codec);
7205 tabla_codec_enable_hs_detect(codec, 1,
7206 MBHC_USE_MB_TRIGGER |
7207 MBHC_USE_HPHL_TRIGGER,
7208 true);
7209 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007210 } else {
7211 tabla_codec_start_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007212 }
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07007213 pr_debug("%s: leave\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007214}
Joonwoo Park8b1f0982011-12-08 17:12:45 -08007215
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007216static irqreturn_t tabla_hs_remove_irq(int irq, void *data)
7217{
7218 struct tabla_priv *priv = data;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007219 bool vddio;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007220 pr_debug("%s: enter, removal interrupt\n", __func__);
7221
7222 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007223 vddio = (priv->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
7224 priv->mbhc_micbias_switched);
7225 if (vddio)
7226 __tabla_codec_switch_micbias(priv->codec, 0, false, true);
7227
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07007228 if ((priv->mbhc_cfg.detect_extn_cable &&
7229 !tabla_hs_gpio_level_remove(priv)) ||
7230 !priv->mbhc_cfg.gpio) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007231 tabla_hs_remove_irq_nogpio(priv);
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07007232 } else
7233 tabla_hs_remove_irq_gpio(priv);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007234
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007235 /* if driver turned off vddio switch and headset is not removed,
7236 * turn on the vddio switch back, if headset is removed then vddio
7237 * switch is off by time now and shouldn't be turn on again from here */
7238 if (vddio && priv->current_plug == PLUG_TYPE_HEADSET)
7239 __tabla_codec_switch_micbias(priv->codec, 1, true, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007240 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007241
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007242 return IRQ_HANDLED;
7243}
7244
Joonwoo Park03324832012-03-19 19:36:16 -07007245void mbhc_insert_work(struct work_struct *work)
7246{
7247 struct delayed_work *dwork;
7248 struct tabla_priv *tabla;
7249 struct snd_soc_codec *codec;
7250 struct wcd9xxx *tabla_core;
7251
7252 dwork = to_delayed_work(work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007253 tabla = container_of(dwork, struct tabla_priv, mbhc_insert_dwork);
Joonwoo Park03324832012-03-19 19:36:16 -07007254 codec = tabla->codec;
7255 tabla_core = dev_get_drvdata(codec->dev->parent);
7256
7257 pr_debug("%s:\n", __func__);
7258
7259 /* Turn off both HPH and MIC line schmitt triggers */
7260 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
7261 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
7262 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
7263 wcd9xxx_disable_irq_sync(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
7264 tabla_codec_detect_plug_type(codec);
7265 wcd9xxx_unlock_sleep(tabla_core);
7266}
7267
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007268static void tabla_hs_gpio_handler(struct snd_soc_codec *codec)
7269{
7270 bool insert;
7271 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
7272 bool is_removed = false;
7273
7274 pr_debug("%s: enter\n", __func__);
7275
7276 tabla->in_gpio_handler = true;
7277 /* Wait here for debounce time */
7278 usleep_range(TABLA_GPIO_IRQ_DEBOUNCE_TIME_US,
7279 TABLA_GPIO_IRQ_DEBOUNCE_TIME_US);
7280
7281 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7282
7283 /* cancel pending button press */
7284 if (tabla_cancel_btn_work(tabla))
7285 pr_debug("%s: button press is canceled\n", __func__);
7286
7287 insert = (gpio_get_value_cansleep(tabla->mbhc_cfg.gpio) ==
7288 tabla->mbhc_cfg.gpio_level_insert);
7289 if ((tabla->current_plug == PLUG_TYPE_NONE) && insert) {
7290 tabla->lpi_enabled = false;
7291 wmb();
7292
7293 /* cancel detect plug */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007294 tabla_cancel_hs_detect_plug(tabla,
7295 &tabla->hs_correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007296
7297 /* Disable Mic Bias pull down and HPH Switch to GND */
7298 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01,
7299 0x00);
7300 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, 0x00);
7301 tabla_codec_detect_plug_type(codec);
7302 } else if ((tabla->current_plug != PLUG_TYPE_NONE) && !insert) {
7303 tabla->lpi_enabled = false;
7304 wmb();
7305
7306 /* cancel detect plug */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007307 tabla_cancel_hs_detect_plug(tabla,
7308 &tabla->hs_correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007309
7310 if (tabla->current_plug == PLUG_TYPE_HEADPHONE) {
7311 tabla_codec_report_plug(codec, 0, SND_JACK_HEADPHONE);
7312 is_removed = true;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007313 } else if (tabla->current_plug == PLUG_TYPE_GND_MIC_SWAP) {
7314 tabla_codec_report_plug(codec, 0, SND_JACK_UNSUPPORTED);
7315 is_removed = true;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007316 } else if (tabla->current_plug == PLUG_TYPE_HEADSET) {
7317 tabla_codec_pause_hs_polling(codec);
7318 tabla_codec_cleanup_hs_polling(codec);
7319 tabla_codec_report_plug(codec, 0, SND_JACK_HEADSET);
7320 is_removed = true;
Ravi Kumar Alamanda113eb8a2012-08-15 18:39:47 -07007321 } else if (tabla->current_plug == PLUG_TYPE_HIGH_HPH) {
7322 tabla_codec_report_plug(codec, 0, SND_JACK_LINEOUT);
7323 is_removed = true;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007324 }
7325
7326 if (is_removed) {
7327 /* Enable Mic Bias pull down and HPH Switch to GND */
7328 snd_soc_update_bits(codec,
7329 tabla->mbhc_bias_regs.ctl_reg, 0x01,
7330 0x01);
7331 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01,
7332 0x01);
7333 /* Make sure mic trigger is turned off */
7334 snd_soc_update_bits(codec,
7335 tabla->mbhc_bias_regs.ctl_reg,
7336 0x01, 0x01);
7337 snd_soc_update_bits(codec,
7338 tabla->mbhc_bias_regs.mbhc_reg,
7339 0x90, 0x00);
7340 /* Reset MBHC State Machine */
7341 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
7342 0x08, 0x08);
7343 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
7344 0x08, 0x00);
7345 /* Turn off override */
7346 tabla_turn_onoff_override(codec, false);
7347 }
7348 }
7349
7350 tabla->in_gpio_handler = false;
7351 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7352 pr_debug("%s: leave\n", __func__);
7353}
7354
7355static irqreturn_t tabla_mechanical_plug_detect_irq(int irq, void *data)
7356{
7357 int r = IRQ_HANDLED;
7358 struct snd_soc_codec *codec = data;
Joonwoo Parkb16c0bd2012-10-04 16:57:52 -07007359 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007360
7361 if (unlikely(wcd9xxx_lock_sleep(codec->control_data) == false)) {
7362 pr_warn("%s: failed to hold suspend\n", __func__);
Joonwoo Parkb16c0bd2012-10-04 16:57:52 -07007363 /*
7364 * Give up this IRQ for now and resend this IRQ so IRQ can be
7365 * handled after system resume
7366 */
7367 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7368 tabla->gpio_irq_resend = true;
7369 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7370 wake_lock_timeout(&tabla->irq_resend_wlock, HZ);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007371 r = IRQ_NONE;
7372 } else {
7373 tabla_hs_gpio_handler(codec);
7374 wcd9xxx_unlock_sleep(codec->control_data);
7375 }
7376
7377 return r;
7378}
7379
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007380static void tabla_hs_correct_plug_nogpio(struct work_struct *work)
7381{
7382 struct tabla_priv *tabla;
7383 struct snd_soc_codec *codec;
7384 unsigned long timeout;
7385 int retry = 0;
7386 enum tabla_mbhc_plug_type plug_type;
7387 bool is_headset = false;
7388
7389 pr_debug("%s(): Poll Microphone voltage for %d seconds\n",
7390 __func__, TABLA_HS_DETECT_PLUG_TIME_MS / 1000);
7391
7392 tabla = container_of(work, struct tabla_priv,
7393 hs_correct_plug_work_nogpio);
7394 codec = tabla->codec;
7395
7396 /* Make sure the MBHC mux is connected to MIC Path */
7397 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
7398
7399 /* setup for microphone polling */
7400 tabla_turn_onoff_override(codec, true);
7401 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
7402
7403 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
7404 while (!time_after(jiffies, timeout)) {
7405 ++retry;
7406
7407 msleep(TABLA_HS_DETECT_PLUG_INERVAL_MS);
7408 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7409 plug_type = tabla_codec_get_plug_type(codec, false);
7410 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7411
7412 if (plug_type == PLUG_TYPE_HIGH_HPH
7413 || plug_type == PLUG_TYPE_INVALID) {
7414
7415 /* this means the plug is removed
7416 * End microphone polling and setup
7417 * for low power removal detection.
7418 */
7419 pr_debug("%s(): Plug may be removed, setup removal\n",
7420 __func__);
7421 break;
7422 } else if (plug_type == PLUG_TYPE_HEADSET) {
7423 /* Plug is corrected from headphone to headset,
7424 * report headset and end the polling
7425 */
7426 is_headset = true;
7427 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7428 tabla_turn_onoff_override(codec, false);
7429 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
7430 tabla_codec_start_hs_polling(codec);
7431 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7432 pr_debug("%s(): corrected from headphone to headset\n",
7433 __func__);
7434 break;
7435 }
7436 }
7437
7438 /* Undo setup for microphone polling depending
7439 * result from polling
7440 */
7441 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
7442 if (!is_headset) {
Bhalchandra Gajare18d10ee2012-08-23 13:44:07 -07007443 pr_debug("%s: Inserted headphone is not a headset\n",
7444 __func__);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007445 tabla_turn_onoff_override(codec, false);
7446 tabla_codec_cleanup_hs_polling(codec);
7447 tabla_codec_enable_hs_detect(codec, 0, 0, false);
7448 }
7449 wcd9xxx_unlock_sleep(codec->control_data);
7450}
7451
Joonwoo Park1305bab2012-05-21 15:08:42 -07007452static int tabla_mbhc_init_and_calibrate(struct tabla_priv *tabla)
7453{
7454 int ret = 0;
7455 struct snd_soc_codec *codec = tabla->codec;
7456
7457 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
7458 tabla_mbhc_init(codec);
7459 tabla_mbhc_cal(codec);
7460 tabla_mbhc_calc_thres(codec);
7461 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
7462 tabla_codec_calibrate_hs_polling(codec);
7463 if (!tabla->mbhc_cfg.gpio) {
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007464 INIT_WORK(&tabla->hs_correct_plug_work_nogpio,
7465 tabla_hs_correct_plug_nogpio);
Joonwoo Park1305bab2012-05-21 15:08:42 -07007466 ret = tabla_codec_enable_hs_detect(codec, 1,
7467 MBHC_USE_MB_TRIGGER |
7468 MBHC_USE_HPHL_TRIGGER,
7469 false);
7470
7471 if (IS_ERR_VALUE(ret))
7472 pr_err("%s: Failed to setup MBHC detection\n",
7473 __func__);
7474 } else {
7475 /* Enable Mic Bias pull down and HPH Switch to GND */
7476 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg,
7477 0x01, 0x01);
7478 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, 0x01);
7479 INIT_WORK(&tabla->hs_correct_plug_work,
7480 tabla_hs_correct_gpio_plug);
7481 }
7482
7483 if (!IS_ERR_VALUE(ret)) {
7484 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
7485 wcd9xxx_enable_irq(codec->control_data,
7486 TABLA_IRQ_HPH_PA_OCPL_FAULT);
7487 wcd9xxx_enable_irq(codec->control_data,
7488 TABLA_IRQ_HPH_PA_OCPR_FAULT);
7489
7490 if (tabla->mbhc_cfg.gpio) {
7491 ret = request_threaded_irq(tabla->mbhc_cfg.gpio_irq,
7492 NULL,
7493 tabla_mechanical_plug_detect_irq,
7494 (IRQF_TRIGGER_RISING |
7495 IRQF_TRIGGER_FALLING),
7496 "tabla-gpio", codec);
7497 if (!IS_ERR_VALUE(ret)) {
7498 ret = enable_irq_wake(tabla->mbhc_cfg.gpio_irq);
7499 /* Bootup time detection */
7500 tabla_hs_gpio_handler(codec);
7501 }
7502 }
7503 }
7504
7505 return ret;
7506}
7507
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007508static void mbhc_fw_read(struct work_struct *work)
7509{
7510 struct delayed_work *dwork;
7511 struct tabla_priv *tabla;
7512 struct snd_soc_codec *codec;
7513 const struct firmware *fw;
Joonwoo Park1305bab2012-05-21 15:08:42 -07007514 int ret = -1, retry = 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007515
7516 dwork = to_delayed_work(work);
Joonwoo Park1305bab2012-05-21 15:08:42 -07007517 tabla = container_of(dwork, struct tabla_priv, mbhc_firmware_dwork);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007518 codec = tabla->codec;
7519
7520 while (retry < MBHC_FW_READ_ATTEMPTS) {
7521 retry++;
7522 pr_info("%s:Attempt %d to request MBHC firmware\n",
7523 __func__, retry);
7524 ret = request_firmware(&fw, "wcd9310/wcd9310_mbhc.bin",
7525 codec->dev);
7526
7527 if (ret != 0) {
7528 usleep_range(MBHC_FW_READ_TIMEOUT,
Joonwoo Park1305bab2012-05-21 15:08:42 -07007529 MBHC_FW_READ_TIMEOUT);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007530 } else {
7531 pr_info("%s: MBHC Firmware read succesful\n", __func__);
7532 break;
7533 }
7534 }
7535
7536 if (ret != 0) {
7537 pr_err("%s: Cannot load MBHC firmware use default cal\n",
7538 __func__);
7539 } else if (tabla_mbhc_fw_validate(fw) == false) {
7540 pr_err("%s: Invalid MBHC cal data size use default cal\n",
7541 __func__);
7542 release_firmware(fw);
7543 } else {
7544 tabla->mbhc_cfg.calibration = (void *)fw->data;
7545 tabla->mbhc_fw = fw;
7546 }
7547
Joonwoo Park1305bab2012-05-21 15:08:42 -07007548 (void) tabla_mbhc_init_and_calibrate(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007549}
7550
Joonwoo Park03324832012-03-19 19:36:16 -07007551int tabla_hs_detect(struct snd_soc_codec *codec,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007552 const struct tabla_mbhc_config *cfg)
Joonwoo Park03324832012-03-19 19:36:16 -07007553{
7554 struct tabla_priv *tabla;
7555 int rc = 0;
7556
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007557 if (!codec || !cfg->calibration) {
Joonwoo Park03324832012-03-19 19:36:16 -07007558 pr_err("Error: no codec or calibration\n");
7559 return -EINVAL;
7560 }
7561
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007562 if (cfg->mclk_rate != TABLA_MCLK_RATE_12288KHZ) {
7563 if (cfg->mclk_rate == TABLA_MCLK_RATE_9600KHZ)
Joonwoo Park03324832012-03-19 19:36:16 -07007564 pr_err("Error: clock rate %dHz is not yet supported\n",
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007565 cfg->mclk_rate);
Joonwoo Park03324832012-03-19 19:36:16 -07007566 else
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007567 pr_err("Error: unsupported clock rate %d\n",
7568 cfg->mclk_rate);
Joonwoo Park03324832012-03-19 19:36:16 -07007569 return -EINVAL;
7570 }
7571
7572 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007573 tabla->mbhc_cfg = *cfg;
7574 tabla->in_gpio_handler = false;
7575 tabla->current_plug = PLUG_TYPE_NONE;
7576 tabla->lpi_enabled = false;
Joonwoo Park03324832012-03-19 19:36:16 -07007577 tabla_get_mbhc_micbias_regs(codec, &tabla->mbhc_bias_regs);
7578
7579 /* Put CFILT in fast mode by default */
7580 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl,
7581 0x40, TABLA_CFILT_FAST_MODE);
7582 INIT_DELAYED_WORK(&tabla->mbhc_firmware_dwork, mbhc_fw_read);
7583 INIT_DELAYED_WORK(&tabla->mbhc_btn_dwork, btn_lpress_fn);
7584 INIT_WORK(&tabla->hphlocp_work, hphlocp_off_report);
7585 INIT_WORK(&tabla->hphrocp_work, hphrocp_off_report);
7586 INIT_DELAYED_WORK(&tabla->mbhc_insert_dwork, mbhc_insert_work);
7587
Joonwoo Park1305bab2012-05-21 15:08:42 -07007588 if (!tabla->mbhc_cfg.read_fw_bin)
7589 rc = tabla_mbhc_init_and_calibrate(tabla);
7590 else
Joonwoo Park03324832012-03-19 19:36:16 -07007591 schedule_delayed_work(&tabla->mbhc_firmware_dwork,
7592 usecs_to_jiffies(MBHC_FW_READ_TIMEOUT));
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007593
Joonwoo Park03324832012-03-19 19:36:16 -07007594 return rc;
7595}
7596EXPORT_SYMBOL_GPL(tabla_hs_detect);
7597
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007598static irqreturn_t tabla_slimbus_irq(int irq, void *data)
7599{
7600 struct tabla_priv *priv = data;
7601 struct snd_soc_codec *codec = priv->codec;
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07007602 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
7603 int i, j, port_id, k, ch_mask_temp;
Swaminathan Sathappan4bd38942012-07-17 11:31:31 -07007604 unsigned long slimbus_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007605 u8 val;
7606
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307607 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++) {
7608 slimbus_value = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007609 TABLA_SLIM_PGD_PORT_INT_STATUS0 + i);
7610 for_each_set_bit(j, &slimbus_value, BITS_PER_BYTE) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307611 val = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007612 TABLA_SLIM_PGD_PORT_INT_SOURCE0 + i*8 + j);
7613 if (val & 0x1)
7614 pr_err_ratelimited("overflow error on port %x,"
7615 " value %x\n", i*8 + j, val);
7616 if (val & 0x2)
7617 pr_err_ratelimited("underflow error on port %x,"
7618 " value %x\n", i*8 + j, val);
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07007619 if (val & 0x4) {
7620 pr_debug("%s: port %x disconnect value %x\n",
7621 __func__, i*8 + j, val);
7622 port_id = i*8 + j;
7623 for (k = 0; k < ARRAY_SIZE(tabla_dai); k++) {
7624 ch_mask_temp = 1 << port_id;
7625 if (ch_mask_temp &
7626 tabla_p->dai[k].ch_mask) {
7627 tabla_p->dai[k].ch_mask &=
7628 ~ch_mask_temp;
7629 if (!tabla_p->dai[k].ch_mask)
7630 wake_up(
7631 &tabla_p->dai[k].dai_wait);
7632 }
7633 }
7634 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007635 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307636 wcd9xxx_interface_reg_write(codec->control_data,
Swaminathan Sathappan4bd38942012-07-17 11:31:31 -07007637 TABLA_SLIM_PGD_PORT_INT_CLR0 + i, slimbus_value);
7638 val = 0x0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007639 }
7640
7641 return IRQ_HANDLED;
7642}
7643
Patrick Lai3043fba2011-08-01 14:15:57 -07007644static int tabla_handle_pdata(struct tabla_priv *tabla)
7645{
7646 struct snd_soc_codec *codec = tabla->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307647 struct wcd9xxx_pdata *pdata = tabla->pdata;
Patrick Lai3043fba2011-08-01 14:15:57 -07007648 int k1, k2, k3, rc = 0;
Santosh Mardi22920282011-10-26 02:38:40 +05307649 u8 leg_mode = pdata->amic_settings.legacy_mode;
7650 u8 txfe_bypass = pdata->amic_settings.txfe_enable;
7651 u8 txfe_buff = pdata->amic_settings.txfe_buff;
7652 u8 flag = pdata->amic_settings.use_pdata;
7653 u8 i = 0, j = 0;
7654 u8 val_txfe = 0, value = 0;
Patrick Lai3043fba2011-08-01 14:15:57 -07007655
7656 if (!pdata) {
7657 rc = -ENODEV;
7658 goto done;
7659 }
7660
7661 /* Make sure settings are correct */
7662 if ((pdata->micbias.ldoh_v > TABLA_LDOH_2P85_V) ||
7663 (pdata->micbias.bias1_cfilt_sel > TABLA_CFILT3_SEL) ||
7664 (pdata->micbias.bias2_cfilt_sel > TABLA_CFILT3_SEL) ||
7665 (pdata->micbias.bias3_cfilt_sel > TABLA_CFILT3_SEL) ||
7666 (pdata->micbias.bias4_cfilt_sel > TABLA_CFILT3_SEL)) {
7667 rc = -EINVAL;
7668 goto done;
7669 }
7670
7671 /* figure out k value */
7672 k1 = tabla_find_k_value(pdata->micbias.ldoh_v,
7673 pdata->micbias.cfilt1_mv);
7674 k2 = tabla_find_k_value(pdata->micbias.ldoh_v,
7675 pdata->micbias.cfilt2_mv);
7676 k3 = tabla_find_k_value(pdata->micbias.ldoh_v,
7677 pdata->micbias.cfilt3_mv);
7678
7679 if (IS_ERR_VALUE(k1) || IS_ERR_VALUE(k2) || IS_ERR_VALUE(k3)) {
7680 rc = -EINVAL;
7681 goto done;
7682 }
7683
7684 /* Set voltage level and always use LDO */
7685 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x0C,
7686 (pdata->micbias.ldoh_v << 2));
7687
7688 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_1_VAL, 0xFC,
7689 (k1 << 2));
7690 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_2_VAL, 0xFC,
7691 (k2 << 2));
7692 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_3_VAL, 0xFC,
7693 (k3 << 2));
7694
7695 snd_soc_update_bits(codec, TABLA_A_MICB_1_CTL, 0x60,
7696 (pdata->micbias.bias1_cfilt_sel << 5));
7697 snd_soc_update_bits(codec, TABLA_A_MICB_2_CTL, 0x60,
7698 (pdata->micbias.bias2_cfilt_sel << 5));
7699 snd_soc_update_bits(codec, TABLA_A_MICB_3_CTL, 0x60,
7700 (pdata->micbias.bias3_cfilt_sel << 5));
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007701 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_ctl, 0x60,
7702 (pdata->micbias.bias4_cfilt_sel << 5));
Patrick Lai3043fba2011-08-01 14:15:57 -07007703
Santosh Mardi22920282011-10-26 02:38:40 +05307704 for (i = 0; i < 6; j++, i += 2) {
7705 if (flag & (0x01 << i)) {
7706 value = (leg_mode & (0x01 << i)) ? 0x10 : 0x00;
7707 val_txfe = (txfe_bypass & (0x01 << i)) ? 0x20 : 0x00;
7708 val_txfe = val_txfe |
7709 ((txfe_buff & (0x01 << i)) ? 0x10 : 0x00);
7710 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
7711 0x10, value);
7712 snd_soc_update_bits(codec,
7713 TABLA_A_TX_1_2_TEST_EN + j * 10,
7714 0x30, val_txfe);
7715 }
7716 if (flag & (0x01 << (i + 1))) {
7717 value = (leg_mode & (0x01 << (i + 1))) ? 0x01 : 0x00;
7718 val_txfe = (txfe_bypass &
7719 (0x01 << (i + 1))) ? 0x02 : 0x00;
7720 val_txfe |= (txfe_buff &
7721 (0x01 << (i + 1))) ? 0x01 : 0x00;
7722 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
7723 0x01, value);
7724 snd_soc_update_bits(codec,
7725 TABLA_A_TX_1_2_TEST_EN + j * 10,
7726 0x03, val_txfe);
7727 }
7728 }
7729 if (flag & 0x40) {
7730 value = (leg_mode & 0x40) ? 0x10 : 0x00;
7731 value = value | ((txfe_bypass & 0x40) ? 0x02 : 0x00);
7732 value = value | ((txfe_buff & 0x40) ? 0x01 : 0x00);
7733 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN,
7734 0x13, value);
7735 }
Patrick Lai49efeac2011-11-03 11:01:12 -07007736
7737 if (pdata->ocp.use_pdata) {
7738 /* not defined in CODEC specification */
7739 if (pdata->ocp.hph_ocp_limit == 1 ||
7740 pdata->ocp.hph_ocp_limit == 5) {
7741 rc = -EINVAL;
7742 goto done;
7743 }
7744 snd_soc_update_bits(codec, TABLA_A_RX_COM_OCP_CTL,
7745 0x0F, pdata->ocp.num_attempts);
7746 snd_soc_write(codec, TABLA_A_RX_COM_OCP_COUNT,
7747 ((pdata->ocp.run_time << 4) | pdata->ocp.wait_time));
7748 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL,
7749 0xE0, (pdata->ocp.hph_ocp_limit << 5));
7750 }
Joonwoo Park03324832012-03-19 19:36:16 -07007751
7752 for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++) {
7753 if (!strncmp(pdata->regulator[i].name, "CDC_VDDA_RX", 11)) {
7754 if (pdata->regulator[i].min_uV == 1800000 &&
7755 pdata->regulator[i].max_uV == 1800000) {
7756 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL,
7757 0x1C);
7758 } else if (pdata->regulator[i].min_uV == 2200000 &&
7759 pdata->regulator[i].max_uV == 2200000) {
7760 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL,
7761 0x1E);
7762 } else {
7763 pr_err("%s: unsupported CDC_VDDA_RX voltage "
7764 "min %d, max %d\n", __func__,
7765 pdata->regulator[i].min_uV,
7766 pdata->regulator[i].max_uV);
7767 rc = -EINVAL;
7768 }
7769 break;
7770 }
7771 }
Patrick Lai3043fba2011-08-01 14:15:57 -07007772done:
7773 return rc;
7774}
7775
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007776static const struct tabla_reg_mask_val tabla_1_1_reg_defaults[] = {
7777
7778 /* Tabla 1.1 MICBIAS changes */
7779 TABLA_REG_VAL(TABLA_A_MICB_1_INT_RBIAS, 0x24),
7780 TABLA_REG_VAL(TABLA_A_MICB_2_INT_RBIAS, 0x24),
7781 TABLA_REG_VAL(TABLA_A_MICB_3_INT_RBIAS, 0x24),
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007782
7783 /* Tabla 1.1 HPH changes */
7784 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_PA, 0x57),
7785 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_LDO, 0x56),
7786
7787 /* Tabla 1.1 EAR PA changes */
7788 TABLA_REG_VAL(TABLA_A_RX_EAR_BIAS_PA, 0xA6),
7789 TABLA_REG_VAL(TABLA_A_RX_EAR_GAIN, 0x02),
7790 TABLA_REG_VAL(TABLA_A_RX_EAR_VCM, 0x03),
7791
7792 /* Tabla 1.1 Lineout_5 Changes */
7793 TABLA_REG_VAL(TABLA_A_RX_LINE_5_GAIN, 0x10),
7794
7795 /* Tabla 1.1 RX Changes */
7796 TABLA_REG_VAL(TABLA_A_CDC_RX1_B5_CTL, 0x78),
7797 TABLA_REG_VAL(TABLA_A_CDC_RX2_B5_CTL, 0x78),
7798 TABLA_REG_VAL(TABLA_A_CDC_RX3_B5_CTL, 0x78),
7799 TABLA_REG_VAL(TABLA_A_CDC_RX4_B5_CTL, 0x78),
7800 TABLA_REG_VAL(TABLA_A_CDC_RX5_B5_CTL, 0x78),
7801 TABLA_REG_VAL(TABLA_A_CDC_RX6_B5_CTL, 0x78),
7802 TABLA_REG_VAL(TABLA_A_CDC_RX7_B5_CTL, 0x78),
7803
7804 /* Tabla 1.1 RX1 and RX2 Changes */
7805 TABLA_REG_VAL(TABLA_A_CDC_RX1_B6_CTL, 0xA0),
7806 TABLA_REG_VAL(TABLA_A_CDC_RX2_B6_CTL, 0xA0),
7807
7808 /* Tabla 1.1 RX3 to RX7 Changes */
7809 TABLA_REG_VAL(TABLA_A_CDC_RX3_B6_CTL, 0x80),
7810 TABLA_REG_VAL(TABLA_A_CDC_RX4_B6_CTL, 0x80),
7811 TABLA_REG_VAL(TABLA_A_CDC_RX5_B6_CTL, 0x80),
7812 TABLA_REG_VAL(TABLA_A_CDC_RX6_B6_CTL, 0x80),
7813 TABLA_REG_VAL(TABLA_A_CDC_RX7_B6_CTL, 0x80),
7814
7815 /* Tabla 1.1 CLASSG Changes */
7816 TABLA_REG_VAL(TABLA_A_CDC_CLSG_FREQ_THRESH_B3_CTL, 0x1B),
7817};
7818
7819static const struct tabla_reg_mask_val tabla_2_0_reg_defaults[] = {
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007820 /* Tabla 2.0 MICBIAS changes */
7821 TABLA_REG_VAL(TABLA_A_MICB_2_MBHC, 0x02),
7822};
7823
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007824static const struct tabla_reg_mask_val tabla_1_x_only_reg_2_0_defaults[] = {
7825 TABLA_REG_VAL(TABLA_1_A_MICB_4_INT_RBIAS, 0x24),
7826};
7827
7828static const struct tabla_reg_mask_val tabla_2_only_reg_2_0_defaults[] = {
7829 TABLA_REG_VAL(TABLA_2_A_MICB_4_INT_RBIAS, 0x24),
7830};
7831
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007832static void tabla_update_reg_defaults(struct snd_soc_codec *codec)
7833{
7834 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307835 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007836
7837 for (i = 0; i < ARRAY_SIZE(tabla_1_1_reg_defaults); i++)
7838 snd_soc_write(codec, tabla_1_1_reg_defaults[i].reg,
7839 tabla_1_1_reg_defaults[i].val);
7840
7841 for (i = 0; i < ARRAY_SIZE(tabla_2_0_reg_defaults); i++)
7842 snd_soc_write(codec, tabla_2_0_reg_defaults[i].reg,
7843 tabla_2_0_reg_defaults[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007844
7845 if (TABLA_IS_1_X(tabla_core->version)) {
7846 for (i = 0; i < ARRAY_SIZE(tabla_1_x_only_reg_2_0_defaults);
7847 i++)
7848 snd_soc_write(codec,
7849 tabla_1_x_only_reg_2_0_defaults[i].reg,
7850 tabla_1_x_only_reg_2_0_defaults[i].val);
7851 } else {
7852 for (i = 0; i < ARRAY_SIZE(tabla_2_only_reg_2_0_defaults); i++)
7853 snd_soc_write(codec,
7854 tabla_2_only_reg_2_0_defaults[i].reg,
7855 tabla_2_only_reg_2_0_defaults[i].val);
7856 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007857}
7858
7859static const struct tabla_reg_mask_val tabla_codec_reg_init_val[] = {
Patrick Laic7cae882011-11-18 11:52:49 -08007860 /* Initialize current threshold to 350MA
7861 * number of wait and run cycles to 4096
7862 */
Patrick Lai49efeac2011-11-03 11:01:12 -07007863 {TABLA_A_RX_HPH_OCP_CTL, 0xE0, 0x60},
Patrick Laic7cae882011-11-18 11:52:49 -08007864 {TABLA_A_RX_COM_OCP_COUNT, 0xFF, 0xFF},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007865
Santosh Mardi32171012011-10-28 23:32:06 +05307866 {TABLA_A_QFUSE_CTL, 0xFF, 0x03},
7867
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007868 /* Initialize gain registers to use register gain */
7869 {TABLA_A_RX_HPH_L_GAIN, 0x10, 0x10},
7870 {TABLA_A_RX_HPH_R_GAIN, 0x10, 0x10},
7871 {TABLA_A_RX_LINE_1_GAIN, 0x10, 0x10},
7872 {TABLA_A_RX_LINE_2_GAIN, 0x10, 0x10},
7873 {TABLA_A_RX_LINE_3_GAIN, 0x10, 0x10},
7874 {TABLA_A_RX_LINE_4_GAIN, 0x10, 0x10},
7875
Kuirong Wangccb29c62012-06-15 11:09:07 -07007876 /* Set the MICBIAS default output as pull down*/
7877 {TABLA_A_MICB_1_CTL, 0x01, 0x01},
7878 {TABLA_A_MICB_2_CTL, 0x01, 0x01},
7879 {TABLA_A_MICB_3_CTL, 0x01, 0x01},
7880
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007881 /* Initialize mic biases to differential mode */
7882 {TABLA_A_MICB_1_INT_RBIAS, 0x24, 0x24},
7883 {TABLA_A_MICB_2_INT_RBIAS, 0x24, 0x24},
7884 {TABLA_A_MICB_3_INT_RBIAS, 0x24, 0x24},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007885
7886 {TABLA_A_CDC_CONN_CLSG_CTL, 0x3C, 0x14},
7887
7888 /* Use 16 bit sample size for TX1 to TX6 */
7889 {TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0x30, 0x20},
7890 {TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0x30, 0x20},
7891 {TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0x30, 0x20},
7892 {TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0x30, 0x20},
7893 {TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0x30, 0x20},
7894 {TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0x30, 0x20},
7895
7896 /* Use 16 bit sample size for TX7 to TX10 */
7897 {TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0x60, 0x40},
7898 {TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0x60, 0x40},
7899 {TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0x60, 0x40},
7900 {TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0x60, 0x40},
7901
7902 /* Use 16 bit sample size for RX */
7903 {TABLA_A_CDC_CONN_RX_SB_B1_CTL, 0xFF, 0xAA},
7904 {TABLA_A_CDC_CONN_RX_SB_B2_CTL, 0xFF, 0xAA},
7905
7906 /*enable HPF filter for TX paths */
7907 {TABLA_A_CDC_TX1_MUX_CTL, 0x8, 0x0},
7908 {TABLA_A_CDC_TX2_MUX_CTL, 0x8, 0x0},
7909 {TABLA_A_CDC_TX3_MUX_CTL, 0x8, 0x0},
7910 {TABLA_A_CDC_TX4_MUX_CTL, 0x8, 0x0},
7911 {TABLA_A_CDC_TX5_MUX_CTL, 0x8, 0x0},
7912 {TABLA_A_CDC_TX6_MUX_CTL, 0x8, 0x0},
7913 {TABLA_A_CDC_TX7_MUX_CTL, 0x8, 0x0},
7914 {TABLA_A_CDC_TX8_MUX_CTL, 0x8, 0x0},
7915 {TABLA_A_CDC_TX9_MUX_CTL, 0x8, 0x0},
7916 {TABLA_A_CDC_TX10_MUX_CTL, 0x8, 0x0},
Kiran Kandi0ba468f2012-05-08 11:45:05 -07007917
7918 /* config Decimator for DMIC CLK_MODE_1(3.072Mhz@12.88Mhz mclk) */
7919 {TABLA_A_CDC_TX1_DMIC_CTL, 0x1, 0x1},
7920 {TABLA_A_CDC_TX2_DMIC_CTL, 0x1, 0x1},
7921 {TABLA_A_CDC_TX3_DMIC_CTL, 0x1, 0x1},
7922 {TABLA_A_CDC_TX4_DMIC_CTL, 0x1, 0x1},
7923 {TABLA_A_CDC_TX5_DMIC_CTL, 0x1, 0x1},
7924 {TABLA_A_CDC_TX6_DMIC_CTL, 0x1, 0x1},
7925 {TABLA_A_CDC_TX7_DMIC_CTL, 0x1, 0x1},
7926 {TABLA_A_CDC_TX8_DMIC_CTL, 0x1, 0x1},
7927 {TABLA_A_CDC_TX9_DMIC_CTL, 0x1, 0x1},
7928 {TABLA_A_CDC_TX10_DMIC_CTL, 0x1, 0x1},
7929
7930 /* config DMIC clk to CLK_MODE_1 (3.072Mhz@12.88Mhz mclk) */
7931 {TABLA_A_CDC_CLK_DMIC_CTL, 0x2A, 0x2A},
7932
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007933};
7934
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007935static const struct tabla_reg_mask_val tabla_1_x_codec_reg_init_val[] = {
Kuirong Wangccb29c62012-06-15 11:09:07 -07007936 /* Set the MICBIAS default output as pull down*/
7937 {TABLA_1_A_MICB_4_CTL, 0x01, 0x01},
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007938 /* Initialize mic biases to differential mode */
7939 {TABLA_1_A_MICB_4_INT_RBIAS, 0x24, 0x24},
7940};
7941
7942static const struct tabla_reg_mask_val tabla_2_higher_codec_reg_init_val[] = {
Kuirong Wangccb29c62012-06-15 11:09:07 -07007943
7944 /* Set the MICBIAS default output as pull down*/
7945 {TABLA_2_A_MICB_4_CTL, 0x01, 0x01},
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007946 /* Initialize mic biases to differential mode */
7947 {TABLA_2_A_MICB_4_INT_RBIAS, 0x24, 0x24},
7948};
7949
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007950static void tabla_codec_init_reg(struct snd_soc_codec *codec)
7951{
7952 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307953 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007954
7955 for (i = 0; i < ARRAY_SIZE(tabla_codec_reg_init_val); i++)
7956 snd_soc_update_bits(codec, tabla_codec_reg_init_val[i].reg,
7957 tabla_codec_reg_init_val[i].mask,
7958 tabla_codec_reg_init_val[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007959 if (TABLA_IS_1_X(tabla_core->version)) {
7960 for (i = 0; i < ARRAY_SIZE(tabla_1_x_codec_reg_init_val); i++)
7961 snd_soc_update_bits(codec,
7962 tabla_1_x_codec_reg_init_val[i].reg,
7963 tabla_1_x_codec_reg_init_val[i].mask,
7964 tabla_1_x_codec_reg_init_val[i].val);
7965 } else {
7966 for (i = 0; i < ARRAY_SIZE(tabla_2_higher_codec_reg_init_val);
7967 i++)
7968 snd_soc_update_bits(codec,
7969 tabla_2_higher_codec_reg_init_val[i].reg,
7970 tabla_2_higher_codec_reg_init_val[i].mask,
7971 tabla_2_higher_codec_reg_init_val[i].val);
7972 }
7973}
7974
7975static void tabla_update_reg_address(struct tabla_priv *priv)
7976{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307977 struct wcd9xxx *tabla_core = dev_get_drvdata(priv->codec->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007978 struct tabla_reg_address *reg_addr = &priv->reg_addr;
7979
7980 if (TABLA_IS_1_X(tabla_core->version)) {
Joonwoo Parkcb7c8922012-02-16 23:12:59 -08007981 reg_addr->micb_4_mbhc = TABLA_1_A_MICB_4_MBHC;
7982 reg_addr->micb_4_int_rbias = TABLA_1_A_MICB_4_INT_RBIAS;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007983 reg_addr->micb_4_ctl = TABLA_1_A_MICB_4_CTL;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007984 } else if (TABLA_IS_2_0(tabla_core->version)) {
Joonwoo Parkcb7c8922012-02-16 23:12:59 -08007985 reg_addr->micb_4_mbhc = TABLA_2_A_MICB_4_MBHC;
7986 reg_addr->micb_4_int_rbias = TABLA_2_A_MICB_4_INT_RBIAS;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007987 reg_addr->micb_4_ctl = TABLA_2_A_MICB_4_CTL;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007988 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007989}
7990
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007991#ifdef CONFIG_DEBUG_FS
7992static int codec_debug_open(struct inode *inode, struct file *file)
7993{
7994 file->private_data = inode->i_private;
7995 return 0;
7996}
7997
7998static ssize_t codec_debug_write(struct file *filp,
7999 const char __user *ubuf, size_t cnt, loff_t *ppos)
8000{
8001 char lbuf[32];
8002 char *buf;
8003 int rc;
8004 struct tabla_priv *tabla = filp->private_data;
8005
8006 if (cnt > sizeof(lbuf) - 1)
8007 return -EINVAL;
8008
8009 rc = copy_from_user(lbuf, ubuf, cnt);
8010 if (rc)
8011 return -EFAULT;
8012
8013 lbuf[cnt] = '\0';
8014 buf = (char *)lbuf;
Joonwoo Park5bbcb0c2012-08-07 17:25:52 -07008015 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
8016 tabla->no_mic_headset_override =
8017 (*strsep(&buf, " ") == '0') ? false : true;
8018 if (tabla->no_mic_headset_override && tabla->mbhc_polling_active) {
8019 tabla_codec_pause_hs_polling(tabla->codec);
8020 tabla_codec_start_hs_polling(tabla->codec);
8021 }
8022 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
8023 return cnt;
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008024}
8025
8026static ssize_t codec_mbhc_debug_read(struct file *file, char __user *buf,
8027 size_t count, loff_t *pos)
8028{
8029 const int size = 768;
8030 char buffer[size];
8031 int n = 0;
8032 struct tabla_priv *tabla = file->private_data;
8033 struct snd_soc_codec *codec = tabla->codec;
8034 const struct mbhc_internal_cal_data *p = &tabla->mbhc_data;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07008035 const s16 v_ins_hu_cur = tabla_get_current_v_ins(tabla, true);
8036 const s16 v_ins_h_cur = tabla_get_current_v_ins(tabla, false);
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008037
8038 n = scnprintf(buffer, size - n, "dce_z = %x(%dmv)\n", p->dce_z,
8039 tabla_codec_sta_dce_v(codec, 1, p->dce_z));
8040 n += scnprintf(buffer + n, size - n, "dce_mb = %x(%dmv)\n",
8041 p->dce_mb, tabla_codec_sta_dce_v(codec, 1, p->dce_mb));
8042 n += scnprintf(buffer + n, size - n, "sta_z = %x(%dmv)\n",
8043 p->sta_z, tabla_codec_sta_dce_v(codec, 0, p->sta_z));
8044 n += scnprintf(buffer + n, size - n, "sta_mb = %x(%dmv)\n",
8045 p->sta_mb, tabla_codec_sta_dce_v(codec, 0, p->sta_mb));
8046 n += scnprintf(buffer + n, size - n, "t_dce = %x\n", p->t_dce);
8047 n += scnprintf(buffer + n, size - n, "t_sta = %x\n", p->t_sta);
8048 n += scnprintf(buffer + n, size - n, "micb_mv = %dmv\n",
8049 p->micb_mv);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07008050 n += scnprintf(buffer + n, size - n, "v_ins_hu = %x(%dmv)%s\n",
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008051 p->v_ins_hu,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07008052 tabla_codec_sta_dce_v(codec, 0, p->v_ins_hu),
8053 p->v_ins_hu == v_ins_hu_cur ? "*" : "");
8054 n += scnprintf(buffer + n, size - n, "v_ins_h = %x(%dmv)%s\n",
8055 p->v_ins_h, tabla_codec_sta_dce_v(codec, 1, p->v_ins_h),
8056 p->v_ins_h == v_ins_h_cur ? "*" : "");
8057 n += scnprintf(buffer + n, size - n, "adj_v_ins_hu = %x(%dmv)%s\n",
8058 p->adj_v_ins_hu,
8059 tabla_codec_sta_dce_v(codec, 0, p->adj_v_ins_hu),
8060 p->adj_v_ins_hu == v_ins_hu_cur ? "*" : "");
8061 n += scnprintf(buffer + n, size - n, "adj_v_ins_h = %x(%dmv)%s\n",
8062 p->adj_v_ins_h,
8063 tabla_codec_sta_dce_v(codec, 1, p->adj_v_ins_h),
8064 p->adj_v_ins_h == v_ins_h_cur ? "*" : "");
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008065 n += scnprintf(buffer + n, size - n, "v_b1_hu = %x(%dmv)\n",
8066 p->v_b1_hu, tabla_codec_sta_dce_v(codec, 0, p->v_b1_hu));
8067 n += scnprintf(buffer + n, size - n, "v_b1_h = %x(%dmv)\n",
8068 p->v_b1_h, tabla_codec_sta_dce_v(codec, 1, p->v_b1_h));
8069 n += scnprintf(buffer + n, size - n, "v_b1_huc = %x(%dmv)\n",
8070 p->v_b1_huc,
8071 tabla_codec_sta_dce_v(codec, 1, p->v_b1_huc));
8072 n += scnprintf(buffer + n, size - n, "v_brh = %x(%dmv)\n",
8073 p->v_brh, tabla_codec_sta_dce_v(codec, 1, p->v_brh));
8074 n += scnprintf(buffer + n, size - n, "v_brl = %x(%dmv)\n", p->v_brl,
8075 tabla_codec_sta_dce_v(codec, 0, p->v_brl));
8076 n += scnprintf(buffer + n, size - n, "v_no_mic = %x(%dmv)\n",
8077 p->v_no_mic,
8078 tabla_codec_sta_dce_v(codec, 0, p->v_no_mic));
8079 n += scnprintf(buffer + n, size - n, "npoll = %d\n", p->npoll);
8080 n += scnprintf(buffer + n, size - n, "nbounce_wait = %d\n",
8081 p->nbounce_wait);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07008082 n += scnprintf(buffer + n, size - n, "v_inval_ins_low = %d\n",
8083 p->v_inval_ins_low);
8084 n += scnprintf(buffer + n, size - n, "v_inval_ins_high = %d\n",
8085 p->v_inval_ins_high);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07008086 if (tabla->mbhc_cfg.gpio)
8087 n += scnprintf(buffer + n, size - n, "GPIO insert = %d\n",
8088 tabla_hs_gpio_level_remove(tabla));
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008089 buffer[n] = 0;
8090
8091 return simple_read_from_buffer(buf, count, pos, buffer, n);
8092}
8093
8094static const struct file_operations codec_debug_ops = {
8095 .open = codec_debug_open,
8096 .write = codec_debug_write,
8097};
8098
8099static const struct file_operations codec_mbhc_debug_ops = {
8100 .open = codec_debug_open,
8101 .read = codec_mbhc_debug_read,
8102};
8103#endif
8104
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008105static int tabla_codec_probe(struct snd_soc_codec *codec)
8106{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308107 struct wcd9xxx *control;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008108 struct tabla_priv *tabla;
8109 struct snd_soc_dapm_context *dapm = &codec->dapm;
8110 int ret = 0;
8111 int i;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08008112 int ch_cnt;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008113
8114 codec->control_data = dev_get_drvdata(codec->dev->parent);
8115 control = codec->control_data;
8116
8117 tabla = kzalloc(sizeof(struct tabla_priv), GFP_KERNEL);
8118 if (!tabla) {
8119 dev_err(codec->dev, "Failed to allocate private data\n");
8120 return -ENOMEM;
8121 }
Kiran Kandid8cf5212012-03-02 15:34:53 -08008122 for (i = 0 ; i < NUM_DECIMATORS; i++) {
8123 tx_hpf_work[i].tabla = tabla;
8124 tx_hpf_work[i].decimator = i + 1;
8125 INIT_DELAYED_WORK(&tx_hpf_work[i].dwork,
8126 tx_hpf_corner_freq_callback);
8127 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008128
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07008129 /* Make sure mbhc micbias register addresses are zeroed out */
8130 memset(&tabla->mbhc_bias_regs, 0,
8131 sizeof(struct mbhc_micbias_regs));
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07008132 tabla->mbhc_micbias_switched = false;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07008133
Joonwoo Park0976d012011-12-22 11:48:18 -08008134 /* Make sure mbhc intenal calibration data is zeroed out */
8135 memset(&tabla->mbhc_data, 0,
8136 sizeof(struct mbhc_internal_cal_data));
Joonwoo Park433149a2012-01-11 09:53:54 -08008137 tabla->mbhc_data.t_sta_dce = DEFAULT_DCE_STA_WAIT;
Joonwoo Park0976d012011-12-22 11:48:18 -08008138 tabla->mbhc_data.t_dce = DEFAULT_DCE_WAIT;
8139 tabla->mbhc_data.t_sta = DEFAULT_STA_WAIT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008140 snd_soc_codec_set_drvdata(codec, tabla);
8141
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07008142 tabla->mclk_enabled = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008143 tabla->bandgap_type = TABLA_BANDGAP_OFF;
8144 tabla->clock_active = false;
8145 tabla->config_mode_active = false;
8146 tabla->mbhc_polling_active = false;
Joonwoo Parkf4267c22012-01-10 13:25:24 -08008147 tabla->mbhc_fake_ins_start = 0;
Bradley Rubincb3950a2011-08-18 13:07:26 -07008148 tabla->no_mic_headset_override = false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008149 tabla->hs_polling_irq_prepared = false;
8150 mutex_init(&tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008151 tabla->codec = codec;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008152 tabla->mbhc_state = MBHC_STATE_NONE;
Joonwoo Park03324832012-03-19 19:36:16 -07008153 tabla->mbhc_last_resume = 0;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08008154 for (i = 0; i < COMPANDER_MAX; i++) {
8155 tabla->comp_enabled[i] = 0;
8156 tabla->comp_fs[i] = COMPANDER_FS_48KHZ;
8157 }
Patrick Lai3043fba2011-08-01 14:15:57 -07008158 tabla->pdata = dev_get_platdata(codec->dev->parent);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308159 tabla->intf_type = wcd9xxx_get_intf_type();
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08008160 tabla->aux_pga_cnt = 0;
8161 tabla->aux_l_gain = 0x1F;
8162 tabla->aux_r_gain = 0x1F;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008163 tabla_update_reg_address(tabla);
Santosh Mardi22920282011-10-26 02:38:40 +05308164 tabla_update_reg_defaults(codec);
8165 tabla_codec_init_reg(codec);
Santosh Mardi22920282011-10-26 02:38:40 +05308166 ret = tabla_handle_pdata(tabla);
Patrick Lai3043fba2011-08-01 14:15:57 -07008167 if (IS_ERR_VALUE(ret)) {
8168 pr_err("%s: bad pdata\n", __func__);
8169 goto err_pdata;
8170 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008171
Steve Mucklef132c6c2012-06-06 18:30:57 -07008172// snd_soc_add_codec_controls(codec, tabla_snd_controls,
8173// ARRAY_SIZE(tabla_snd_controls));
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008174 if (TABLA_IS_1_X(control->version))
Steve Mucklef132c6c2012-06-06 18:30:57 -07008175 snd_soc_add_codec_controls(codec, tabla_1_x_snd_controls,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008176 ARRAY_SIZE(tabla_1_x_snd_controls));
8177 else
Steve Mucklef132c6c2012-06-06 18:30:57 -07008178 snd_soc_add_codec_controls(codec, tabla_2_higher_snd_controls,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008179 ARRAY_SIZE(tabla_2_higher_snd_controls));
8180
Steve Mucklef132c6c2012-06-06 18:30:57 -07008181// snd_soc_dapm_new_controls(dapm, tabla_dapm_widgets,
8182// ARRAY_SIZE(tabla_dapm_widgets));
Kiran Kandi93923902012-06-20 17:00:25 -07008183
8184 snd_soc_dapm_new_controls(dapm, tabla_dapm_aif_in_widgets,
8185 ARRAY_SIZE(tabla_dapm_aif_in_widgets));
8186
8187 snd_soc_dapm_new_controls(dapm, tabla_dapm_aif_out_widgets,
8188 ARRAY_SIZE(tabla_dapm_aif_out_widgets));
8189
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008190 if (TABLA_IS_1_X(control->version))
8191 snd_soc_dapm_new_controls(dapm, tabla_1_x_dapm_widgets,
8192 ARRAY_SIZE(tabla_1_x_dapm_widgets));
8193 else
8194 snd_soc_dapm_new_controls(dapm, tabla_2_higher_dapm_widgets,
8195 ARRAY_SIZE(tabla_2_higher_dapm_widgets));
8196
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308197 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05308198 snd_soc_dapm_new_controls(dapm, tabla_dapm_i2s_widgets,
8199 ARRAY_SIZE(tabla_dapm_i2s_widgets));
8200 snd_soc_dapm_add_routes(dapm, audio_i2s_map,
8201 ARRAY_SIZE(audio_i2s_map));
8202 }
Steve Mucklef132c6c2012-06-06 18:30:57 -07008203// snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
Kiran Kandi8b3a8302011-09-27 16:13:28 -07008204
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008205 if (TABLA_IS_1_X(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08008206 snd_soc_dapm_add_routes(dapm, tabla_1_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008207 ARRAY_SIZE(tabla_1_x_lineout_2_to_4_map));
8208 } else if (TABLA_IS_2_0(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08008209 snd_soc_dapm_add_routes(dapm, tabla_2_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008210 ARRAY_SIZE(tabla_2_x_lineout_2_to_4_map));
Kiran Kandi7a9fd902011-11-14 13:51:45 -08008211 } else {
8212 pr_err("%s : ERROR. Unsupported Tabla version 0x%2x\n",
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308213 __func__, control->version);
Kiran Kandi7a9fd902011-11-14 13:51:45 -08008214 goto err_pdata;
8215 }
8216
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008217 snd_soc_dapm_sync(dapm);
8218
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308219 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008220 tabla_hs_insert_irq, "Headset insert detect", tabla);
8221 if (ret) {
8222 pr_err("%s: Failed to request irq %d\n", __func__,
8223 TABLA_IRQ_MBHC_INSERTION);
8224 goto err_insert_irq;
8225 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308226 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008227
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308228 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008229 tabla_hs_remove_irq, "Headset remove detect", tabla);
8230 if (ret) {
8231 pr_err("%s: Failed to request irq %d\n", __func__,
8232 TABLA_IRQ_MBHC_REMOVAL);
8233 goto err_remove_irq;
8234 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008235
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308236 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07008237 tabla_dce_handler, "DC Estimation detect", tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008238 if (ret) {
8239 pr_err("%s: Failed to request irq %d\n", __func__,
8240 TABLA_IRQ_MBHC_POTENTIAL);
8241 goto err_potential_irq;
8242 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008243
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308244 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE,
Bradley Rubincb1e2732011-06-23 16:49:20 -07008245 tabla_release_handler, "Button Release detect", tabla);
8246 if (ret) {
8247 pr_err("%s: Failed to request irq %d\n", __func__,
8248 TABLA_IRQ_MBHC_RELEASE);
8249 goto err_release_irq;
8250 }
8251
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308252 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_SLIMBUS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008253 tabla_slimbus_irq, "SLIMBUS Slave", tabla);
8254 if (ret) {
8255 pr_err("%s: Failed to request irq %d\n", __func__,
8256 TABLA_IRQ_SLIMBUS);
8257 goto err_slimbus_irq;
8258 }
8259
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308260 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++)
8261 wcd9xxx_interface_reg_write(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008262 TABLA_SLIM_PGD_PORT_INT_EN0 + i, 0xFF);
8263
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308264 ret = wcd9xxx_request_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07008265 TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla_hphl_ocp_irq,
8266 "HPH_L OCP detect", tabla);
8267 if (ret) {
8268 pr_err("%s: Failed to request irq %d\n", __func__,
8269 TABLA_IRQ_HPH_PA_OCPL_FAULT);
8270 goto err_hphl_ocp_irq;
8271 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308272 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPL_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07008273
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308274 ret = wcd9xxx_request_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07008275 TABLA_IRQ_HPH_PA_OCPR_FAULT, tabla_hphr_ocp_irq,
8276 "HPH_R OCP detect", tabla);
8277 if (ret) {
8278 pr_err("%s: Failed to request irq %d\n", __func__,
8279 TABLA_IRQ_HPH_PA_OCPR_FAULT);
8280 goto err_hphr_ocp_irq;
8281 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308282 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPR_FAULT);
Joonwoo Parkb16c0bd2012-10-04 16:57:52 -07008283
8284 /*
8285 * Register suspend lock and notifier to resend edge triggered
8286 * gpio IRQs
8287 */
8288 wake_lock_init(&tabla->irq_resend_wlock, WAKE_LOCK_SUSPEND,
8289 "tabla_gpio_irq_resend");
8290 tabla->gpio_irq_resend = false;
8291
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08008292 for (i = 0; i < ARRAY_SIZE(tabla_dai); i++) {
8293 switch (tabla_dai[i].id) {
8294 case AIF1_PB:
8295 ch_cnt = tabla_dai[i].playback.channels_max;
8296 break;
8297 case AIF1_CAP:
8298 ch_cnt = tabla_dai[i].capture.channels_max;
8299 break;
Neema Shettyd3a89262012-02-16 10:23:50 -08008300 case AIF2_PB:
8301 ch_cnt = tabla_dai[i].playback.channels_max;
8302 break;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07008303 case AIF2_CAP:
8304 ch_cnt = tabla_dai[i].capture.channels_max;
8305 break;
Kiran Kandia9fffe92012-05-20 23:42:30 -07008306 case AIF3_PB:
8307 ch_cnt = tabla_dai[i].playback.channels_max;
8308 break;
Neema Shetty3fb1b802012-04-27 13:53:24 -07008309 case AIF3_CAP:
8310 ch_cnt = tabla_dai[i].capture.channels_max;
8311 break;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08008312 default:
8313 continue;
8314 }
8315 tabla->dai[i].ch_num = kzalloc((sizeof(unsigned int)*
8316 ch_cnt), GFP_KERNEL);
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07008317 init_waitqueue_head(&tabla->dai[i].dai_wait);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08008318 }
Patrick Lai49efeac2011-11-03 11:01:12 -07008319
Bradley Rubincb3950a2011-08-18 13:07:26 -07008320#ifdef CONFIG_DEBUG_FS
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008321 if (ret == 0) {
8322 tabla->debugfs_poke =
8323 debugfs_create_file("TRRS", S_IFREG | S_IRUGO, NULL, tabla,
8324 &codec_debug_ops);
8325 tabla->debugfs_mbhc =
8326 debugfs_create_file("tabla_mbhc", S_IFREG | S_IRUGO,
8327 NULL, tabla, &codec_mbhc_debug_ops);
8328 }
Bradley Rubincb3950a2011-08-18 13:07:26 -07008329#endif
Steve Mucklef132c6c2012-06-06 18:30:57 -07008330 codec->ignore_pmdown_time = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008331 return ret;
8332
Patrick Lai49efeac2011-11-03 11:01:12 -07008333err_hphr_ocp_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308334 wcd9xxx_free_irq(codec->control_data,
8335 TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla);
Patrick Lai49efeac2011-11-03 11:01:12 -07008336err_hphl_ocp_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308337 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008338err_slimbus_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308339 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
Bradley Rubincb1e2732011-06-23 16:49:20 -07008340err_release_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308341 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008342err_potential_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308343 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008344err_remove_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308345 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008346err_insert_irq:
Patrick Lai3043fba2011-08-01 14:15:57 -07008347err_pdata:
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008348 mutex_destroy(&tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008349 kfree(tabla);
8350 return ret;
8351}
8352static int tabla_codec_remove(struct snd_soc_codec *codec)
8353{
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08008354 int i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008355 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkb16c0bd2012-10-04 16:57:52 -07008356
8357 wake_lock_destroy(&tabla->irq_resend_wlock);
8358
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308359 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
8360 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
8361 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
8362 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
8363 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008364 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008365 tabla_codec_disable_clock_block(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008366 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008367 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Patrick Lai64b43262011-12-06 17:29:15 -08008368 if (tabla->mbhc_fw)
8369 release_firmware(tabla->mbhc_fw);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08008370 for (i = 0; i < ARRAY_SIZE(tabla_dai); i++)
8371 kfree(tabla->dai[i].ch_num);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008372 mutex_destroy(&tabla->codec_resource_lock);
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008373#ifdef CONFIG_DEBUG_FS
8374 debugfs_remove(tabla->debugfs_poke);
8375 debugfs_remove(tabla->debugfs_mbhc);
8376#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008377 kfree(tabla);
8378 return 0;
8379}
8380static struct snd_soc_codec_driver soc_codec_dev_tabla = {
8381 .probe = tabla_codec_probe,
8382 .remove = tabla_codec_remove,
8383 .read = tabla_read,
8384 .write = tabla_write,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008385 .readable_register = tabla_readable,
8386 .volatile_register = tabla_volatile,
8387
8388 .reg_cache_size = TABLA_CACHE_SIZE,
8389 .reg_cache_default = tabla_reg_defaults,
8390 .reg_word_size = 1,
Steve Mucklef132c6c2012-06-06 18:30:57 -07008391 .controls = tabla_snd_controls,
8392 .num_controls = ARRAY_SIZE(tabla_snd_controls),
8393 .dapm_widgets = tabla_dapm_widgets,
8394 .num_dapm_widgets = ARRAY_SIZE(tabla_dapm_widgets),
8395 .dapm_routes = audio_map,
8396 .num_dapm_routes = ARRAY_SIZE(audio_map),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008397};
Bradley Rubincb3950a2011-08-18 13:07:26 -07008398
Joonwoo Park8b1f0982011-12-08 17:12:45 -08008399#ifdef CONFIG_PM
8400static int tabla_suspend(struct device *dev)
8401{
Joonwoo Park816b8e62012-01-23 16:03:21 -08008402 dev_dbg(dev, "%s: system suspend\n", __func__);
8403 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08008404}
8405
8406static int tabla_resume(struct device *dev)
8407{
Joonwoo Parkb16c0bd2012-10-04 16:57:52 -07008408 int irq;
Joonwoo Park03324832012-03-19 19:36:16 -07008409 struct platform_device *pdev = to_platform_device(dev);
8410 struct tabla_priv *tabla = platform_get_drvdata(pdev);
Joonwoo Parkb16c0bd2012-10-04 16:57:52 -07008411
Joonwoo Parkbf4e4842012-09-20 11:14:15 -07008412 dev_dbg(dev, "%s: system resume tabla %p\n", __func__, tabla);
Joonwoo Parkb16c0bd2012-10-04 16:57:52 -07008413 if (tabla) {
8414 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Joonwoo Parkbf4e4842012-09-20 11:14:15 -07008415 tabla->mbhc_last_resume = jiffies;
Joonwoo Parkb16c0bd2012-10-04 16:57:52 -07008416 if (tabla->gpio_irq_resend) {
8417 WARN_ON(!tabla->mbhc_cfg.gpio_irq);
8418 tabla->gpio_irq_resend = false;
8419
8420 irq = tabla->mbhc_cfg.gpio_irq;
8421 pr_debug("%s: Resending GPIO IRQ %d\n", __func__, irq);
8422 irq_set_pending(irq);
8423 check_irq_resend(irq_to_desc(irq), irq);
8424
8425 /* release suspend lock */
8426 wake_unlock(&tabla->irq_resend_wlock);
8427 }
8428 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
8429 }
8430
Joonwoo Park816b8e62012-01-23 16:03:21 -08008431 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08008432}
8433
8434static const struct dev_pm_ops tabla_pm_ops = {
8435 .suspend = tabla_suspend,
8436 .resume = tabla_resume,
8437};
8438#endif
8439
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008440static int __devinit tabla_probe(struct platform_device *pdev)
8441{
Santosh Mardie15e2302011-11-15 10:39:23 +05308442 int ret = 0;
Steve Mucklef132c6c2012-06-06 18:30:57 -07008443 pr_err("tabla_probe\n");
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308444 if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Santosh Mardie15e2302011-11-15 10:39:23 +05308445 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
8446 tabla_dai, ARRAY_SIZE(tabla_dai));
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308447 else if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
Santosh Mardie15e2302011-11-15 10:39:23 +05308448 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
8449 tabla_i2s_dai, ARRAY_SIZE(tabla_i2s_dai));
8450 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008451}
8452static int __devexit tabla_remove(struct platform_device *pdev)
8453{
8454 snd_soc_unregister_codec(&pdev->dev);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008455 return 0;
8456}
8457static struct platform_driver tabla_codec_driver = {
8458 .probe = tabla_probe,
8459 .remove = tabla_remove,
8460 .driver = {
8461 .name = "tabla_codec",
8462 .owner = THIS_MODULE,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08008463#ifdef CONFIG_PM
8464 .pm = &tabla_pm_ops,
8465#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008466 },
8467};
8468
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08008469static struct platform_driver tabla1x_codec_driver = {
8470 .probe = tabla_probe,
8471 .remove = tabla_remove,
8472 .driver = {
8473 .name = "tabla1x_codec",
8474 .owner = THIS_MODULE,
8475#ifdef CONFIG_PM
8476 .pm = &tabla_pm_ops,
8477#endif
8478 },
8479};
8480
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008481static int __init tabla_codec_init(void)
8482{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08008483 int rtn = platform_driver_register(&tabla_codec_driver);
8484 if (rtn == 0) {
8485 rtn = platform_driver_register(&tabla1x_codec_driver);
8486 if (rtn != 0)
8487 platform_driver_unregister(&tabla_codec_driver);
8488 }
8489 return rtn;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008490}
8491
8492static void __exit tabla_codec_exit(void)
8493{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08008494 platform_driver_unregister(&tabla1x_codec_driver);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008495 platform_driver_unregister(&tabla_codec_driver);
8496}
8497
8498module_init(tabla_codec_init);
8499module_exit(tabla_codec_exit);
8500
8501MODULE_DESCRIPTION("Tabla codec driver");
8502MODULE_VERSION("1.0");
8503MODULE_LICENSE("GPL v2");