| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | menu "DMA support" | 
 | 2 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 |  | 
| Manuel Lauss | fc467a2 | 2007-05-09 17:36:15 +0900 | [diff] [blame] | 4 | config SH_DMA | 
 | 5 | 	bool "SuperH on-chip DMA controller (DMAC) support" | 
| Paul Mundt | 3e76783 | 2007-07-20 14:23:04 +0900 | [diff] [blame] | 6 | 	depends on CPU_SH3 || CPU_SH4 | 
| Manuel Lauss | fc467a2 | 2007-05-09 17:36:15 +0900 | [diff] [blame] | 7 | 	default n | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 |  | 
| Nobuhiro Iwamatsu | 988f831 | 2009-03-16 03:22:07 +0000 | [diff] [blame] | 9 | config SH_DMA_IRQ_MULTI | 
 | 10 | 	bool | 
 | 11 | 	depends on SH_DMA | 
| Paul Mundt | a27873c | 2009-04-04 11:40:22 -0400 | [diff] [blame] | 12 | 	default y if CPU_SUBTYPE_SH7750  || CPU_SUBTYPE_SH7751  || \ | 
 | 13 | 		     CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7750R || \ | 
 | 14 | 		     CPU_SUBTYPE_SH7751R || CPU_SUBTYPE_SH7091  || \ | 
 | 15 | 		     CPU_SUBTYPE_SH7763  || CPU_SUBTYPE_SH7764  || \ | 
| Magnus Damm | 3d6ad46 | 2009-05-11 09:01:08 +0000 | [diff] [blame] | 16 | 		     CPU_SUBTYPE_SH7780  || CPU_SUBTYPE_SH7785  || \ | 
 | 17 | 		     CPU_SUBTYPE_SH7760 | 
| Nobuhiro Iwamatsu | 988f831 | 2009-03-16 03:22:07 +0000 | [diff] [blame] | 18 |  | 
| Nobuhiro Iwamatsu | d8902ad | 2009-09-07 03:26:23 +0000 | [diff] [blame] | 19 | config SH_DMA_API | 
 | 20 | 	depends on SH_DMA | 
 | 21 | 	bool "SuperH DMA API support" | 
 | 22 | 	default n | 
 | 23 | 	help | 
 | 24 | 	  SH_DMA_API always enabled DMA API of used SuperH. | 
 | 25 | 	  If you want to use DMA ENGINE, you must not enable this. | 
 | 26 | 	  Please enable DMA_ENGINE and SH_DMAE. | 
 | 27 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | config NR_ONCHIP_DMA_CHANNELS | 
| Paul Mundt | fc10020 | 2007-07-20 14:24:57 +0900 | [diff] [blame] | 29 | 	int | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | 	depends on SH_DMA | 
| Paul Mundt | a27873c | 2009-04-04 11:40:22 -0400 | [diff] [blame] | 31 | 	default "4" if CPU_SUBTYPE_SH7750  || CPU_SUBTYPE_SH7751  || \ | 
 | 32 | 		       CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091 | 
 | 33 | 	default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \ | 
 | 34 | 		       CPU_SUBTYPE_SH7760 | 
 | 35 | 	default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780  || \ | 
| Kuninori Morimoto | 24d7619 | 2009-08-19 10:24:15 +0000 | [diff] [blame] | 36 | 			CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7724 | 
| Nobuhiro Iwamatsu | 71b973a | 2009-03-10 17:26:49 +0900 | [diff] [blame] | 37 | 	default "6" | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | 	help | 
 | 39 | 	  This allows you to specify the number of channels that the on-chip | 
| Kuninori Morimoto | 24d7619 | 2009-08-19 10:24:15 +0000 | [diff] [blame] | 40 | 	  DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the | 
 | 41 | 	  SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6. | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 42 |  | 
 | 43 | config NR_DMA_CHANNELS_BOOL | 
 | 44 | 	depends on SH_DMA | 
 | 45 | 	bool "Override default number of maximum DMA channels" | 
 | 46 | 	help | 
 | 47 | 	  This allows you to forcibly update the maximum number of supported | 
 | 48 | 	  DMA channels for a given board. If this is unset, this will default | 
 | 49 | 	  to the number of channels that the on-chip DMAC has. | 
 | 50 |  | 
 | 51 | config NR_DMA_CHANNELS | 
 | 52 | 	int "Maximum number of DMA channels" | 
 | 53 | 	depends on SH_DMA && NR_DMA_CHANNELS_BOOL | 
 | 54 | 	default NR_ONCHIP_DMA_CHANNELS | 
 | 55 | 	help | 
 | 56 | 	  This allows you to specify the maximum number of DMA channels to | 
 | 57 | 	  support. Setting this to a higher value allows for cascading DMACs | 
 | 58 | 	  with additional channels. | 
 | 59 |  | 
| Manuel Lauss | fc467a2 | 2007-05-09 17:36:15 +0900 | [diff] [blame] | 60 | config SH_DMABRG | 
 | 61 | 	bool "SH7760 DMABRG support" | 
 | 62 | 	depends on CPU_SUBTYPE_SH7760 | 
 | 63 | 	help | 
 | 64 | 	  The DMABRG does data transfers from main memory to Audio/USB units | 
 | 65 | 	  of the SH7760. | 
 | 66 | 	  Say Y if you want to use Audio/USB DMA on your SH7760 board. | 
 | 67 |  | 
| Paul Mundt | da62e71 | 2009-03-17 09:30:36 +0900 | [diff] [blame] | 68 | config PVR2_DMA | 
 | 69 | 	tristate "PowerVR 2 DMAC support" | 
 | 70 | 	depends on SH_DREAMCAST && SH_DMA | 
 | 71 | 	help | 
 | 72 | 	  Selecting this will enable support for the PVR2 DMA controller. | 
 | 73 | 	  As this chains off of the on-chip DMAC, that must also be | 
 | 74 | 	  enabled by default. | 
 | 75 |  | 
 | 76 | 	  This is primarily used by the pvr2fb framebuffer driver for | 
 | 77 | 	  certain optimizations, but is not necessary for functionality. | 
 | 78 |  | 
 | 79 | 	  If in doubt, say N. | 
 | 80 |  | 
| Paul Mundt | 40f49e7 | 2009-03-17 12:47:56 +0900 | [diff] [blame] | 81 | config G2_DMA | 
 | 82 | 	tristate "G2 Bus DMA support" | 
 | 83 | 	depends on SH_DREAMCAST | 
 | 84 | 	select SH_DMA_API | 
 | 85 | 	help | 
 | 86 | 	  This enables support for the DMA controller for the Dreamcast's | 
 | 87 | 	  G2 bus. Drivers that want this will generally enable this on | 
 | 88 | 	  their own. | 
 | 89 |  | 
 | 90 | 	  If in doubt, say N. | 
 | 91 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | endmenu |