blob: 6590ec066180fd2d02164b09f8d41124c8c7ca13 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/gpio_event.h>
15#include <asm/mach-types.h>
16#include <asm/mach/arch.h>
17#include <mach/board.h>
18#include <mach/msm_iomap.h>
19#include <mach/msm_hsusb.h>
20#include <mach/rpc_hsusb.h>
21#include <mach/rpc_pmapp.h>
22#include <mach/usbdiag.h>
23#include <mach/msm_memtypes.h>
24#include <mach/msm_serial_hs.h>
25#include <linux/usb/android.h>
26#include <linux/platform_device.h>
27#include <linux/io.h>
28#include <linux/gpio.h>
29#include <mach/vreg.h>
30#include <mach/pmic.h>
31#include <mach/socinfo.h>
32#include <linux/mtd/nand.h>
33#include <linux/mtd/partitions.h>
34#include <asm/mach/mmc.h>
35#include <linux/i2c.h>
36#include <linux/i2c/sx150x.h>
37#include <linux/gpio.h>
38#include <linux/android_pmem.h>
39#include <linux/bootmem.h>
40#include <linux/mfd/marimba.h>
41#include <mach/vreg.h>
42#include <linux/power_supply.h>
43#include <mach/rpc_pmapp.h>
44
45#include <mach/msm_battery.h>
46#include <linux/smsc911x.h>
47#include <linux/atmel_maxtouch.h>
48#include "devices.h"
49#include "timer.h"
Justin Pauporeb3a33b72011-08-23 15:30:32 -070050#include "board-msm7x27a-regulator.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070051#include "devices-msm7x2xa.h"
52#include "pm.h"
53#include <mach/rpc_server_handset.h>
54#include <mach/socinfo.h>
55
56#define PMEM_KERNEL_EBI1_SIZE 0x3A000
57#define MSM_PMEM_AUDIO_SIZE 0x5B000
58#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
59#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
Rahul Kashyap181d5552011-07-07 10:39:23 +053060#define BAHAMA_SLAVE_ID_FM_REG 0x02
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070061#define FM_GPIO 83
62
63enum {
64 GPIO_EXPANDER_IRQ_BASE = NR_MSM_IRQS + NR_GPIO_IRQS,
65 GPIO_EXPANDER_GPIO_BASE = NR_MSM_GPIOS,
66 /* SURF expander */
67 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
68 GPIO_BT_SYS_REST_EN = GPIO_CORE_EXPANDER_BASE,
69 GPIO_WLAN_EXT_POR_N,
70 GPIO_DISPLAY_PWR_EN,
71 GPIO_BACKLIGHT_EN,
72 GPIO_PRESSURE_XCLR,
73 GPIO_VREG_S3_EXP,
74 GPIO_UBM2M_PWRDWN,
75 GPIO_ETM_MODE_CS_N,
76 GPIO_HOST_VBUS_EN,
77 GPIO_SPI_MOSI,
78 GPIO_SPI_MISO,
79 GPIO_SPI_CLK,
80 GPIO_SPI_CS0_N,
81 GPIO_CORE_EXPANDER_IO13,
82 GPIO_CORE_EXPANDER_IO14,
83 GPIO_CORE_EXPANDER_IO15,
84 /* Camera expander */
85 GPIO_CAM_EXPANDER_BASE = GPIO_CORE_EXPANDER_BASE + 16,
86 GPIO_CAM_GP_STROBE_READY = GPIO_CAM_EXPANDER_BASE,
87 GPIO_CAM_GP_AFBUSY,
88 GPIO_CAM_GP_CAM_PWDN,
89 GPIO_CAM_GP_CAM1MP_XCLR,
90 GPIO_CAM_GP_CAMIF_RESET_N,
91 GPIO_CAM_GP_STROBE_CE,
92 GPIO_CAM_GP_LED_EN1,
93 GPIO_CAM_GP_LED_EN2,
94};
95
96#if defined(CONFIG_GPIO_SX150X)
97enum {
98 SX150X_CORE,
99 SX150X_CAM,
100};
101
102static struct sx150x_platform_data sx150x_data[] __initdata = {
103 [SX150X_CORE] = {
104 .gpio_base = GPIO_CORE_EXPANDER_BASE,
105 .oscio_is_gpo = false,
106 .io_pullup_ena = 0,
pankaj kumarc5c01392011-08-12 13:44:05 +0530107 .io_pulldn_ena = 0x02,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108 .io_open_drain_ena = 0xfef8,
109 .irq_summary = -1,
110 },
111 [SX150X_CAM] = {
112 .gpio_base = GPIO_CAM_EXPANDER_BASE,
113 .oscio_is_gpo = false,
114 .io_pullup_ena = 0,
115 .io_pulldn_ena = 0,
116 .io_open_drain_ena = 0x23,
117 .irq_summary = -1,
118 },
119};
120#endif
121
122#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
123
124 /* FM Platform power and shutdown routines */
125#define FPGA_MSM_CNTRL_REG2 0x90008010
Rahul Kashyap6e669462011-07-23 16:42:56 +0530126
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700127static void config_pcm_i2s_mode(int mode)
128{
129 void __iomem *cfg_ptr;
130 u8 reg2;
131
132 cfg_ptr = ioremap_nocache(FPGA_MSM_CNTRL_REG2, sizeof(char));
133
134 if (!cfg_ptr)
135 return;
136 if (mode) {
137 /*enable the pcm mode in FPGA*/
138 reg2 = readb_relaxed(cfg_ptr);
139 if (reg2 == 0) {
140 reg2 = 1;
141 writeb_relaxed(reg2, cfg_ptr);
142 }
143 } else {
144 /*enable i2s mode in FPGA*/
145 reg2 = readb_relaxed(cfg_ptr);
146 if (reg2 == 1) {
147 reg2 = 0;
148 writeb_relaxed(reg2, cfg_ptr);
149 }
150 }
151 iounmap(cfg_ptr);
152}
153
154static unsigned fm_i2s_config_power_on[] = {
155 /*FM_I2S_SD*/
156 GPIO_CFG(68, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
157 /*FM_I2S_WS*/
158 GPIO_CFG(70, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
159 /*FM_I2S_SCK*/
160 GPIO_CFG(71, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
161};
162
163static unsigned fm_i2s_config_power_off[] = {
164 /*FM_I2S_SD*/
165 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
166 /*FM_I2S_WS*/
167 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
168 /*FM_I2S_SCK*/
169 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
170};
171
172static unsigned bt_config_power_on[] = {
173 /*RFR*/
174 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
175 /*CTS*/
176 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
177 /*RX*/
178 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
179 /*TX*/
180 GPIO_CFG(46, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
181};
182static unsigned bt_config_pcm_on[] = {
183 /*PCM_DOUT*/
184 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
185 /*PCM_DIN*/
186 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
187 /*PCM_SYNC*/
188 GPIO_CFG(70, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
189 /*PCM_CLK*/
190 GPIO_CFG(71, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
191};
192static unsigned bt_config_power_off[] = {
193 /*RFR*/
194 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
195 /*CTS*/
196 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
197 /*RX*/
198 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
199 /*TX*/
200 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
201};
202static unsigned bt_config_pcm_off[] = {
203 /*PCM_DOUT*/
204 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
205 /*PCM_DIN*/
206 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
207 /*PCM_SYNC*/
208 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
209 /*PCM_CLK*/
210 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
211};
212
213static int config_i2s(int mode)
214{
215 int pin, rc = 0;
216
217 if (mode == FM_I2S_ON) {
218 if (machine_is_msm7x27a_surf())
219 config_pcm_i2s_mode(0);
220 pr_err("%s mode = FM_I2S_ON", __func__);
221 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_on);
222 pin++) {
223 rc = gpio_tlmm_config(
224 fm_i2s_config_power_on[pin],
225 GPIO_CFG_ENABLE
226 );
227 if (rc < 0)
228 return rc;
229 }
230 } else if (mode == FM_I2S_OFF) {
231 pr_err("%s mode = FM_I2S_OFF", __func__);
232 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_off);
233 pin++) {
234 rc = gpio_tlmm_config(
235 fm_i2s_config_power_off[pin],
236 GPIO_CFG_ENABLE
237 );
238 if (rc < 0)
239 return rc;
240 }
241 }
242 return rc;
243}
244static int config_pcm(int mode)
245{
246 int pin, rc = 0;
247
248 if (mode == BT_PCM_ON) {
249 if (machine_is_msm7x27a_surf())
250 config_pcm_i2s_mode(1);
251 pr_err("%s mode =BT_PCM_ON", __func__);
252 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_on);
253 pin++) {
254 rc = gpio_tlmm_config(bt_config_pcm_on[pin],
255 GPIO_CFG_ENABLE);
256 if (rc < 0)
257 return rc;
258 }
259 } else if (mode == BT_PCM_OFF) {
260 pr_err("%s mode =BT_PCM_OFF", __func__);
261 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_off);
262 pin++) {
263 rc = gpio_tlmm_config(bt_config_pcm_off[pin],
264 GPIO_CFG_ENABLE);
265 if (rc < 0)
266 return rc;
267 }
268
269 }
270
271 return rc;
272}
273
274static int msm_bahama_setup_pcm_i2s(int mode)
275{
276 int fm_state = 0, bt_state = 0;
277 int rc = 0;
278 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
279
280 fm_state = marimba_get_fm_status(&config);
281 bt_state = marimba_get_bt_status(&config);
282
283 switch (mode) {
284 case BT_PCM_ON:
285 case BT_PCM_OFF:
286 if (!fm_state)
287 rc = config_pcm(mode);
288 break;
289 case FM_I2S_ON:
290 rc = config_i2s(mode);
291 break;
292 case FM_I2S_OFF:
293 if (bt_state)
294 rc = config_pcm(BT_PCM_ON);
295 else
296 rc = config_i2s(mode);
297 break;
298 default:
299 rc = -EIO;
300 pr_err("%s:Unsupported mode", __func__);
301 }
302 return rc;
303}
304
Rahul Kashyap181d5552011-07-07 10:39:23 +0530305static int bt_set_gpio(int on)
306{
307 int rc = 0;
308 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
309
310 if (on) {
311 rc = gpio_direction_output(GPIO_BT_SYS_REST_EN, 1);
312 msleep(100);
313 } else {
314 if (!marimba_get_fm_status(&config) &&
315 !marimba_get_bt_status(&config)) {
316 gpio_set_value_cansleep(GPIO_BT_SYS_REST_EN, 0);
317 rc = gpio_direction_input(GPIO_BT_SYS_REST_EN);
318 msleep(100);
319 }
320 }
321 if (rc)
322 pr_err("%s: BT sys_reset_en GPIO : Error", __func__);
323
324 return rc;
325}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700326static struct vreg *fm_regulator;
327static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
328{
329 int rc = 0;
330 const char *id = "FMPW";
331 uint32_t irqcfg;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530332 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
333 u8 value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700334
335 /* Voting for 1.8V Regulator */
336 fm_regulator = vreg_get(NULL , "msme1");
337 if (IS_ERR(fm_regulator)) {
338 pr_err("%s: vreg get failed with : (%ld)\n",
339 __func__, PTR_ERR(fm_regulator));
340 return -EINVAL;
341 }
342
343 /* Set the voltage level to 1.8V */
344 rc = vreg_set_level(fm_regulator, 1800);
345 if (rc < 0) {
346 pr_err("%s: set regulator level failed with :(%d)\n",
347 __func__, rc);
348 goto fm_vreg_fail;
349 }
350
351 /* Enabling the 1.8V regulator */
352 rc = vreg_enable(fm_regulator);
353 if (rc) {
354 pr_err("%s: enable regulator failed with :(%d)\n",
355 __func__, rc);
356 goto fm_vreg_fail;
357 }
358
359 /* Voting for 19.2MHz clock */
360 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
361 PMAPP_CLOCK_VOTE_ON);
362 if (rc < 0) {
363 pr_err("%s: clock vote failed with :(%d)\n",
364 __func__, rc);
365 goto fm_clock_vote_fail;
366 }
367
Rahul Kashyap181d5552011-07-07 10:39:23 +0530368 rc = bt_set_gpio(1);
369 if (rc) {
370 pr_err("%s: bt_set_gpio = %d", __func__, rc);
371 goto fm_gpio_config_fail;
372 }
373 /*re-write FM Slave Id, after reset*/
374 value = BAHAMA_SLAVE_ID_FM_ADDR;
375 rc = marimba_write_bit_mask(&config,
376 BAHAMA_SLAVE_ID_FM_REG, &value, 1, 0xFF);
377 if (rc < 0) {
378 pr_err("%s: FM Slave ID rewrite Failed = %d", __func__, rc);
379 goto fm_gpio_config_fail;
380 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700381 /* Configuring the FM GPIO */
382 irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
383 GPIO_CFG_2MA);
384
385 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
386 if (rc) {
387 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
388 __func__, irqcfg, rc);
389 goto fm_gpio_config_fail;
390 }
391
392 return 0;
393
394fm_gpio_config_fail:
395 pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
396 PMAPP_CLOCK_VOTE_OFF);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530397 bt_set_gpio(0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700398fm_clock_vote_fail:
399 vreg_disable(fm_regulator);
400
401fm_vreg_fail:
402 vreg_put(fm_regulator);
403
404 return rc;
405};
406
407static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
408{
409 int rc;
410 const char *id = "FMPW";
411
412 /* Releasing the GPIO line used by FM */
413 uint32_t irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
414 GPIO_CFG_2MA);
415
416 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
417 if (rc)
418 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
419 __func__, irqcfg, rc);
420
421 /* Releasing the 1.8V Regulator */
422 if (fm_regulator != NULL) {
423 rc = vreg_disable(fm_regulator);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700424 if (rc)
425 pr_err("%s: disable regulator failed:(%d)\n",
426 __func__, rc);
427 fm_regulator = NULL;
428 }
429
430 /* Voting off the clock */
431 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
432 PMAPP_CLOCK_VOTE_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700433 if (rc < 0)
434 pr_err("%s: voting off failed with :(%d)\n",
435 __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530436 rc = bt_set_gpio(0);
437 if (rc)
438 pr_err("%s: bt_set_gpio = %d", __func__, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700439}
440
441static struct marimba_fm_platform_data marimba_fm_pdata = {
442 .fm_setup = fm_radio_setup,
443 .fm_shutdown = fm_radio_shutdown,
444 .irq = MSM_GPIO_TO_INT(FM_GPIO),
445 .vreg_s2 = NULL,
446 .vreg_xo_out = NULL,
447 /* Configuring the FM SoC as I2S Master */
448 .is_fm_soc_i2s_master = true,
449 .config_i2s_gpio = msm_bahama_setup_pcm_i2s,
450};
451
Santosh Sajjan6822c682011-07-26 10:49:36 +0530452static struct platform_device msm_wlan_ar6000_pm_device = {
453 .name = "wlan_ar6000_pm_dev",
454 .id = -1,
455};
456
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700457static struct platform_device msm_bt_power_device = {
458 .name = "bt_power",
459};
Rahul Kashyap6e669462011-07-23 16:42:56 +0530460struct bahama_config_register {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700461 u8 reg;
462 u8 value;
463 u8 mask;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700464};
Rahul Kashyap6e669462011-07-23 16:42:56 +0530465struct bt_vreg_info {
466 const char *name;
467 unsigned int pmapp_id;
468 unsigned int level;
469 unsigned int is_pin_controlled;
470 struct vreg *vregs;
471};
472static struct bt_vreg_info bt_vregs[] = {
473 {"msme1", 2, 1800, 0, NULL},
474 {"bt", 21, 2900, 1, NULL}
475};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700476
477static int bahama_bt(int on)
478{
479
480 int rc = 0;
481 int i;
482
483 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
484
485 struct bahama_variant_register {
486 const size_t size;
487 const struct bahama_config_register *set;
488 };
489
490 const struct bahama_config_register *p;
491
492 u8 version;
493
494 const struct bahama_config_register v10_bt_on[] = {
495 { 0xE9, 0x00, 0xFF },
496 { 0xF4, 0x80, 0xFF },
497 { 0xE4, 0x00, 0xFF },
498 { 0xE5, 0x00, 0x0F },
499#ifdef CONFIG_WLAN
500 { 0xE6, 0x38, 0x7F },
501 { 0xE7, 0x06, 0xFF },
502#endif
503 { 0xE9, 0x21, 0xFF },
504 { 0x01, 0x0C, 0x1F },
505 { 0x01, 0x08, 0x1F },
506 };
507
508 const struct bahama_config_register v20_bt_on_fm_off[] = {
509 { 0x11, 0x0C, 0xFF },
510 { 0x13, 0x01, 0xFF },
511 { 0xF4, 0x80, 0xFF },
512 { 0xF0, 0x00, 0xFF },
513 { 0xE9, 0x00, 0xFF },
514#ifdef CONFIG_WLAN
515 { 0x81, 0x00, 0x7F },
516 { 0x82, 0x00, 0xFF },
517 { 0xE6, 0x38, 0x7F },
518 { 0xE7, 0x06, 0xFF },
519#endif
520 { 0x8E, 0x15, 0xFF },
521 { 0x8F, 0x15, 0xFF },
522 { 0x90, 0x15, 0xFF },
523
524 { 0xE9, 0x21, 0xFF },
525 };
526
527 const struct bahama_config_register v20_bt_on_fm_on[] = {
528 { 0x11, 0x0C, 0xFF },
529 { 0x13, 0x01, 0xFF },
530 { 0xF4, 0x86, 0xFF },
531 { 0xF0, 0x06, 0xFF },
532 { 0xE9, 0x00, 0xFF },
533#ifdef CONFIG_WLAN
534 { 0x81, 0x00, 0x7F },
535 { 0x82, 0x00, 0xFF },
536 { 0xE6, 0x38, 0x7F },
537 { 0xE7, 0x06, 0xFF },
538#endif
539 { 0xE9, 0x21, 0xFF },
540 };
541
542 const struct bahama_config_register v10_bt_off[] = {
543 { 0xE9, 0x00, 0xFF },
544 };
545
546 const struct bahama_config_register v20_bt_off_fm_off[] = {
547 { 0xF4, 0x84, 0xFF },
548 { 0xF0, 0x04, 0xFF },
549 { 0xE9, 0x00, 0xFF }
550 };
551
552 const struct bahama_config_register v20_bt_off_fm_on[] = {
553 { 0xF4, 0x86, 0xFF },
554 { 0xF0, 0x06, 0xFF },
555 { 0xE9, 0x00, 0xFF }
556 };
557 const struct bahama_variant_register bt_bahama[2][3] = {
558 {
559 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
560 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
561 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
562 },
563 {
564 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
565 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
566 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
567 }
568 };
569
570 u8 offset = 0; /* index into bahama configs */
571 on = on ? 1 : 0;
572 version = marimba_read_bahama_ver(&config);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530573 if ((int)version < 0 || version == BAHAMA_VER_UNSUPPORTED) {
574 dev_err(&msm_bt_power_device.dev, "%s: Bahama \
575 version read Error, version = %d \n",
576 __func__, version);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700577 return -EIO;
578 }
579
580 if (version == BAHAMA_VER_2_0) {
581 if (marimba_get_fm_status(&config))
582 offset = 0x01;
583 }
584
585 p = bt_bahama[on][version + offset].set;
586
587 dev_info(&msm_bt_power_device.dev,
588 "%s: found version %d\n", __func__, version);
589
590 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
591 u8 value = (p+i)->value;
592 rc = marimba_write_bit_mask(&config,
593 (p+i)->reg,
594 &value,
595 sizeof((p+i)->value),
596 (p+i)->mask);
597 if (rc < 0) {
598 dev_err(&msm_bt_power_device.dev,
599 "%s: reg %x write failed: %d\n",
600 __func__, (p+i)->reg, rc);
601 return rc;
602 }
Rahul Kashyap92497af2011-07-07 12:13:52 +0530603 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700604 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
605 __func__, (p+i)->reg,
606 value, (p+i)->mask);
607 value = 0;
608 rc = marimba_read_bit_mask(&config,
609 (p+i)->reg, &value,
610 sizeof((p+i)->value), (p+i)->mask);
611 if (rc < 0)
612 dev_err(&msm_bt_power_device.dev, "%s marimba_read_bit_mask- error",
613 __func__);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530614 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700615 "%s: reg 0x%02x read value 0x%02x mask 0x%02x\n",
616 __func__, (p+i)->reg,
617 value, (p+i)->mask);
618 }
619 /* Update BT Status */
620 if (on)
621 marimba_set_bt_status(&config, true);
622 else
623 marimba_set_bt_status(&config, false);
624 return rc;
625}
626static int bluetooth_switch_regulators(int on)
627{
628 int i, rc = 0;
Rahul Kashyap6e669462011-07-23 16:42:56 +0530629 const char *id = "BTPW";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700630
Rahul Kashyap6e669462011-07-23 16:42:56 +0530631 for (i = 0; i < ARRAY_SIZE(bt_vregs); i++) {
632 if (!bt_vregs[i].vregs) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700633 pr_err("%s: vreg_get %s failed(%d)\n",
Rahul Kashyap6e669462011-07-23 16:42:56 +0530634 __func__, bt_vregs[i].name, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700635 goto vreg_fail;
636 }
Rahul Kashyap6e669462011-07-23 16:42:56 +0530637 rc = on ? vreg_set_level(bt_vregs[i].vregs,
638 bt_vregs[i].level) : 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700639
640 if (rc < 0) {
641 pr_err("%s: vreg set level failed (%d)\n",
642 __func__, rc);
643 goto vreg_set_level_fail;
644 }
Rahul Kashyap6e669462011-07-23 16:42:56 +0530645 if (bt_vregs[i].is_pin_controlled == 1) {
646 rc = pmapp_vreg_pincntrl_vote(id,
647 bt_vregs[i].pmapp_id,
648 PMAPP_CLOCK_ID_D1,
649 on ? PMAPP_CLOCK_VOTE_ON :
650 PMAPP_CLOCK_VOTE_OFF);
651 } else {
652 rc = on ? vreg_enable(bt_vregs[i].vregs) :
653 vreg_disable(bt_vregs[i].vregs);
654 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700655
656 if (rc < 0) {
657 pr_err("%s: vreg %s %s failed(%d)\n",
Rahul Kashyap6e669462011-07-23 16:42:56 +0530658 __func__, bt_vregs[i].name,
659 on ? "enable" : "disable", rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700660 goto vreg_fail;
Rahul Kashyap6e669462011-07-23 16:42:56 +0530661 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700662 }
Rahul Kashyap6e669462011-07-23 16:42:56 +0530663
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700664 return rc;
665
666vreg_fail:
667 while (i) {
668 if (on)
Rahul Kashyap6e669462011-07-23 16:42:56 +0530669 vreg_disable(bt_vregs[--i].vregs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700670 }
671vreg_set_level_fail:
Rahul Kashyap6e669462011-07-23 16:42:56 +0530672 vreg_put(bt_vregs[0].vregs);
673 vreg_put(bt_vregs[1].vregs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700674 return rc;
675}
676
677static unsigned int msm_bahama_setup_power(void)
678{
679 int rc = 0;
680 struct vreg *vreg_s3 = NULL;
681
682 vreg_s3 = vreg_get(NULL, "msme1");
683 if (IS_ERR(vreg_s3)) {
684 pr_err("%s: vreg get failed (%ld)\n",
685 __func__, PTR_ERR(vreg_s3));
686 return PTR_ERR(vreg_s3);
687 }
688 rc = vreg_set_level(vreg_s3, 1800);
689 if (rc < 0) {
690 pr_err("%s: vreg set level failed (%d)\n",
691 __func__, rc);
692 goto vreg_fail;
693 }
694 rc = vreg_enable(vreg_s3);
695 if (rc < 0) {
696 pr_err("%s: vreg enable failed (%d)\n",
697 __func__, rc);
698 goto vreg_fail;
699 }
700
701 /*setup Bahama_sys_reset_n*/
702 rc = gpio_request(GPIO_BT_SYS_REST_EN, "bahama sys_rst_n");
703 if (rc < 0) {
704 pr_err("%s: gpio_request %d = %d\n", __func__,
705 GPIO_BT_SYS_REST_EN, rc);
706 goto vreg_fail;
707 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530708 rc = bt_set_gpio(1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700709 if (rc < 0) {
Rahul Kashyap181d5552011-07-07 10:39:23 +0530710 pr_err("%s: bt_set_gpio %d = %d\n", __func__,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700711 GPIO_BT_SYS_REST_EN, rc);
712 goto gpio_fail;
713 }
714 return rc;
715
716gpio_fail:
717 gpio_free(GPIO_BT_SYS_REST_EN);
718vreg_fail:
719 vreg_put(vreg_s3);
720 return rc;
721}
722
723static unsigned int msm_bahama_shutdown_power(int value)
724{
725 int rc = 0;
726 struct vreg *vreg_s3 = NULL;
727
728 vreg_s3 = vreg_get(NULL, "msme1");
729 if (IS_ERR(vreg_s3)) {
730 pr_err("%s: vreg get failed (%ld)\n",
731 __func__, PTR_ERR(vreg_s3));
732 return PTR_ERR(vreg_s3);
733 }
734 rc = vreg_disable(vreg_s3);
735 if (rc) {
736 pr_err("%s: vreg disable failed (%d)\n",
737 __func__, rc);
738 vreg_put(vreg_s3);
739 return rc;
740 }
Rahul Kashyape8698c62011-07-20 20:43:05 +0530741 if (value == BAHAMA_ID) {
742 rc = bt_set_gpio(0);
743 if (rc) {
744 pr_err("%s: bt_set_gpio = %d\n",
745 __func__, rc);
746 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530747 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700748 return rc;
749}
750
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700751static unsigned int msm_bahama_core_config(int type)
752{
753 int rc = 0;
754
755 if (type == BAHAMA_ID) {
756 int i;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530757 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700758 const struct bahama_config_register v20_init[] = {
759 /* reg, value, mask */
760 { 0xF4, 0x84, 0xFF }, /* AREG */
761 { 0xF0, 0x04, 0xFF } /* DREG */
762 };
763 if (marimba_read_bahama_ver(&config) == BAHAMA_VER_2_0) {
764 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
765 u8 value = v20_init[i].value;
766 rc = marimba_write_bit_mask(&config,
767 v20_init[i].reg,
768 &value,
769 sizeof(v20_init[i].value),
770 v20_init[i].mask);
771 if (rc < 0) {
772 pr_err("%s: reg %d write failed: %d\n",
773 __func__, v20_init[i].reg, rc);
774 return rc;
775 }
776 pr_debug("%s: reg 0x%02x value 0x%02x"
777 " mask 0x%02x\n",
778 __func__, v20_init[i].reg,
779 v20_init[i].value, v20_init[i].mask);
780 }
781 }
782 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530783 rc = bt_set_gpio(0);
784 if (rc) {
785 pr_err("%s: bt_set_gpio = %d\n",
786 __func__, rc);
787 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700788 pr_debug("core type: %d\n", type);
789 return rc;
790}
791
792static int bluetooth_power(int on)
793{
794 int pin, rc = 0;
795 const char *id = "BTPW";
796 int cid = 0;
797
798 cid = adie_get_detected_connectivity_type();
799 if (cid != BAHAMA_ID) {
800 pr_err("%s: unexpected adie connectivity type: %d\n",
801 __func__, cid);
802 return -ENODEV;
803 }
804 if (on) {
805 /*setup power for BT SOC*/
Rahul Kashyap181d5552011-07-07 10:39:23 +0530806 rc = bt_set_gpio(on);
807 if (rc) {
808 pr_err("%s: bt_set_gpio = %d\n",
809 __func__, rc);
810 goto exit;
811 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700812 rc = bluetooth_switch_regulators(on);
813 if (rc < 0) {
814 pr_err("%s: bluetooth_switch_regulators rc = %d",
815 __func__, rc);
816 goto exit;
817 }
818 /*setup BT GPIO lines*/
819 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on);
820 pin++) {
821 rc = gpio_tlmm_config(bt_config_power_on[pin],
822 GPIO_CFG_ENABLE);
823 if (rc < 0) {
824 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
825 __func__,
826 bt_config_power_on[pin],
827 rc);
828 goto fail_power;
829 }
830 }
831 /*Setup BT clocks*/
832 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
833 PMAPP_CLOCK_VOTE_ON);
834 if (rc < 0) {
835 pr_err("Failed to vote for TCXO_D1 ON\n");
836 goto fail_clock;
837 }
838 msleep(20);
839
840 /*I2C config for Bahama*/
841 rc = bahama_bt(1);
842 if (rc < 0) {
843 pr_err("%s: bahama_bt rc = %d", __func__, rc);
844 goto fail_i2c;
845 }
846 msleep(20);
847
848 /*setup BT PCM lines*/
849 rc = msm_bahama_setup_pcm_i2s(BT_PCM_ON);
850 if (rc < 0) {
851 pr_err("%s: msm_bahama_setup_pcm_i2s , rc =%d\n",
852 __func__, rc);
853 goto fail_power;
854 }
855 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
856 PMAPP_CLOCK_VOTE_PIN_CTRL);
857 if (rc < 0)
858 pr_err("%s:Pin Control Failed, rc = %d",
859 __func__, rc);
860
861 } else {
862 rc = bahama_bt(0);
863 if (rc < 0)
864 pr_err("%s: bahama_bt rc = %d", __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530865
866 rc = bt_set_gpio(on);
867 if (rc) {
868 pr_err("%s: bt_set_gpio = %d\n",
869 __func__, rc);
870 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700871fail_i2c:
872 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
873 PMAPP_CLOCK_VOTE_OFF);
874 if (rc < 0)
875 pr_err("%s: Failed to vote Off D1\n", __func__);
876fail_clock:
877 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off);
878 pin++) {
879 rc = gpio_tlmm_config(bt_config_power_off[pin],
880 GPIO_CFG_ENABLE);
881 if (rc < 0) {
882 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
883 __func__, bt_config_power_off[pin], rc);
884 }
885 }
886 rc = msm_bahama_setup_pcm_i2s(BT_PCM_OFF);
887 if (rc < 0) {
888 pr_err("%s: msm_bahama_setup_pcm_i2s, rc =%d\n",
889 __func__, rc);
890 }
891fail_power:
892 rc = bluetooth_switch_regulators(0);
893 if (rc < 0) {
894 pr_err("%s: switch_regulators : rc = %d",\
895 __func__, rc);
896 goto exit;
897 }
898 }
899 return rc;
900exit:
901 pr_err("%s: failed with rc = %d", __func__, rc);
902 return rc;
903}
904
905static int __init bt_power_init(void)
906{
907 int i, rc = 0;
Rahul Kashyap6e669462011-07-23 16:42:56 +0530908 for (i = 0; i < ARRAY_SIZE(bt_vregs); i++) {
909 bt_vregs[i].vregs = vreg_get(NULL,
910 bt_vregs[i].name);
911 if (IS_ERR(bt_vregs[i].vregs)) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700912 pr_err("%s: vreg get %s failed (%ld)\n",
Rahul Kashyap6e669462011-07-23 16:42:56 +0530913 __func__, bt_vregs[i].name,
914 PTR_ERR(bt_vregs[i].vregs));
915 rc = PTR_ERR(bt_vregs[i].vregs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700916 goto vreg_get_fail;
917 }
918 }
919
920 msm_bt_power_device.dev.platform_data = &bluetooth_power;
921
922 return rc;
923
924vreg_get_fail:
925 while (i)
Rahul Kashyap6e669462011-07-23 16:42:56 +0530926 vreg_put(bt_vregs[--i].vregs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700927 return rc;
928}
929
930static struct marimba_platform_data marimba_pdata = {
931 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
932 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
933 .bahama_setup = msm_bahama_setup_power,
934 .bahama_shutdown = msm_bahama_shutdown_power,
935 .bahama_core_config = msm_bahama_core_config,
936 .fm = &marimba_fm_pdata,
937};
938
939#endif
940
941#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
942static struct i2c_board_info core_exp_i2c_info[] __initdata = {
943 {
944 I2C_BOARD_INFO("sx1509q", 0x3e),
945 },
946};
947static struct i2c_board_info cam_exp_i2c_info[] __initdata = {
948 {
949 I2C_BOARD_INFO("sx1508q", 0x22),
950 .platform_data = &sx150x_data[SX150X_CAM],
951 },
952};
953#endif
954#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
955static struct i2c_board_info bahama_devices[] = {
956{
957 I2C_BOARD_INFO("marimba", 0xc),
958 .platform_data = &marimba_pdata,
959},
960};
961#endif
962
963#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
964static void __init register_i2c_devices(void)
965{
966
967 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
968 cam_exp_i2c_info,
969 ARRAY_SIZE(cam_exp_i2c_info));
970
971 if (machine_is_msm7x27a_surf())
972 sx150x_data[SX150X_CORE].io_open_drain_ena = 0xe0f0;
973
974 core_exp_i2c_info[0].platform_data =
975 &sx150x_data[SX150X_CORE];
976
977 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
978 core_exp_i2c_info,
979 ARRAY_SIZE(core_exp_i2c_info));
980#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
981 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
982 bahama_devices,
983 ARRAY_SIZE(bahama_devices));
984#endif
985}
986#endif
987
988static struct msm_gpio qup_i2c_gpios_io[] = {
989 { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
990 "qup_scl" },
991 { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
992 "qup_sda" },
993 { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
994 "qup_scl" },
995 { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
996 "qup_sda" },
997};
998
999static struct msm_gpio qup_i2c_gpios_hw[] = {
1000 { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1001 "qup_scl" },
1002 { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1003 "qup_sda" },
1004 { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1005 "qup_scl" },
1006 { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1007 "qup_sda" },
1008};
1009
1010static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
1011{
1012 int rc;
1013
1014 if (adap_id < 0 || adap_id > 1)
1015 return;
1016
1017 /* Each adapter gets 2 lines from the table */
1018 if (config_type)
1019 rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2);
1020 else
1021 rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2);
1022 if (rc < 0)
1023 pr_err("QUP GPIO request/enable failed: %d\n", rc);
1024}
1025
1026static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = {
1027 .clk_freq = 100000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001028 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1029};
1030
1031static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = {
1032 .clk_freq = 100000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001033 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1034};
1035
1036#ifdef CONFIG_ARCH_MSM7X27A
Prabhanjan Kandula1d920742011-08-19 10:28:11 +05301037#define MSM_PMEM_MDP_SIZE 0x1900000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001038#define MSM_PMEM_ADSP_SIZE 0x1000000
1039
1040#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
1041#define MSM_FB_SIZE 0x260000
1042#else
1043#define MSM_FB_SIZE 0x195000
1044#endif
1045
1046#endif
1047
1048static struct android_usb_platform_data android_usb_pdata = {
1049 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1050};
1051
1052static struct platform_device android_usb_device = {
1053 .name = "android_usb",
1054 .id = -1,
1055 .dev = {
1056 .platform_data = &android_usb_pdata,
1057 },
1058};
1059
1060#ifdef CONFIG_USB_EHCI_MSM_72K
1061static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1062{
1063 int rc = 0;
1064 unsigned gpio;
1065
1066 gpio = GPIO_HOST_VBUS_EN;
1067
1068 rc = gpio_request(gpio, "i2c_host_vbus_en");
1069 if (rc < 0) {
1070 pr_err("failed to request %d GPIO\n", gpio);
1071 return;
1072 }
1073 gpio_direction_output(gpio, !!on);
1074 gpio_set_value_cansleep(gpio, !!on);
1075 gpio_free(gpio);
1076}
1077
1078static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1079 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1080};
1081
1082static void __init msm7x2x_init_host(void)
1083{
1084 msm_add_host(0, &msm_usb_host_pdata);
1085}
1086#endif
1087
1088#ifdef CONFIG_USB_MSM_OTG_72K
1089static int hsusb_rpc_connect(int connect)
1090{
1091 if (connect)
1092 return msm_hsusb_rpc_connect();
1093 else
1094 return msm_hsusb_rpc_close();
1095}
1096
1097static struct vreg *vreg_3p3;
1098static int msm_hsusb_ldo_init(int init)
1099{
1100 if (init) {
1101 vreg_3p3 = vreg_get(NULL, "usb");
1102 if (IS_ERR(vreg_3p3))
1103 return PTR_ERR(vreg_3p3);
1104 } else
1105 vreg_put(vreg_3p3);
1106
1107 return 0;
1108}
1109
1110static int msm_hsusb_ldo_enable(int enable)
1111{
1112 static int ldo_status;
1113
1114 if (!vreg_3p3 || IS_ERR(vreg_3p3))
1115 return -ENODEV;
1116
1117 if (ldo_status == enable)
1118 return 0;
1119
1120 ldo_status = enable;
1121
1122 if (enable)
1123 return vreg_enable(vreg_3p3);
1124
1125 return vreg_disable(vreg_3p3);
1126}
1127
1128#ifndef CONFIG_USB_EHCI_MSM_72K
1129static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
1130{
1131 int ret = 0;
1132
1133 if (init)
1134 ret = msm_pm_app_rpc_init(callback);
1135 else
1136 msm_pm_app_rpc_deinit(callback);
1137
1138 return ret;
1139}
1140#endif
1141
1142static struct msm_otg_platform_data msm_otg_pdata = {
1143#ifndef CONFIG_USB_EHCI_MSM_72K
1144 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
1145#else
1146 .vbus_power = msm_hsusb_vbus_power,
1147#endif
1148 .rpc_connect = hsusb_rpc_connect,
1149 .core_clk = 1,
1150 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1151 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1152 .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT,
1153 .se1_gating = SE1_GATING_DISABLE,
1154 .ldo_init = msm_hsusb_ldo_init,
1155 .ldo_enable = msm_hsusb_ldo_enable,
1156 .chg_init = hsusb_chg_init,
1157 .chg_connected = hsusb_chg_connected,
1158 .chg_vbus_draw = hsusb_chg_vbus_draw,
1159};
1160#endif
1161
1162static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1163 .is_phy_status_timer_on = 1,
1164};
1165
1166static struct resource smc91x_resources[] = {
1167 [0] = {
1168 .start = 0x90000300,
1169 .end = 0x900003ff,
1170 .flags = IORESOURCE_MEM,
1171 },
1172 [1] = {
1173 .start = MSM_GPIO_TO_INT(4),
1174 .end = MSM_GPIO_TO_INT(4),
1175 .flags = IORESOURCE_IRQ,
1176 },
1177};
1178
1179static struct platform_device smc91x_device = {
1180 .name = "smc91x",
1181 .id = 0,
1182 .num_resources = ARRAY_SIZE(smc91x_resources),
1183 .resource = smc91x_resources,
1184};
1185
1186#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1187 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1188 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1189 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1190
1191static unsigned long vreg_sts, gpio_sts;
1192static struct vreg *vreg_mmc;
1193static struct vreg *vreg_emmc;
1194
1195struct sdcc_vreg {
1196 struct vreg *vreg_data;
1197 unsigned level;
1198};
1199
1200static struct sdcc_vreg sdcc_vreg_data[4];
1201
1202struct sdcc_gpio {
1203 struct msm_gpio *cfg_data;
1204 uint32_t size;
1205 struct msm_gpio *sleep_cfg_data;
1206};
1207
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301208/**
1209 * Due to insufficient drive strengths for SDC GPIO lines some old versioned
1210 * SD/MMC cards may cause data CRC errors. Hence, set optimal values
1211 * for SDC slots based on timing closure and marginality. SDC1 slot
1212 * require higher value since it should handle bad signal quality due
1213 * to size of T-flash adapters.
1214 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001215static struct msm_gpio sdc1_cfg_data[] = {
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301216 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001217 "sdc1_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301218 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001219 "sdc1_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301220 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001221 "sdc1_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301222 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001223 "sdc1_dat_0"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301224 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001225 "sdc1_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301226 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001227 "sdc1_clk"},
1228};
1229
1230static struct msm_gpio sdc2_cfg_data[] = {
1231 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1232 "sdc2_clk"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301233 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001234 "sdc2_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301235 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001236 "sdc2_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301237 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001238 "sdc2_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301239 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001240 "sdc2_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301241 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001242 "sdc2_dat_0"},
1243};
1244
1245static struct msm_gpio sdc2_sleep_cfg_data[] = {
Sujith Reddy Thummaf3535672011-08-22 08:53:44 +05301246 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001247 "sdc2_clk"},
Sujith Reddy Thummaf3535672011-08-22 08:53:44 +05301248 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001249 "sdc2_cmd"},
Sujith Reddy Thummaf3535672011-08-22 08:53:44 +05301250 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001251 "sdc2_dat_3"},
Sujith Reddy Thummaf3535672011-08-22 08:53:44 +05301252 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001253 "sdc2_dat_2"},
Sujith Reddy Thummaf3535672011-08-22 08:53:44 +05301254 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001255 "sdc2_dat_1"},
Sujith Reddy Thummaf3535672011-08-22 08:53:44 +05301256 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001257 "sdc2_dat_0"},
1258};
1259static struct msm_gpio sdc3_cfg_data[] = {
1260 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1261 "sdc3_clk"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301262 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001263 "sdc3_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301264 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001265 "sdc3_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301266 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001267 "sdc3_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301268 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001269 "sdc3_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301270 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001271 "sdc3_dat_0"},
1272#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301273 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001274 "sdc3_dat_7"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301275 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001276 "sdc3_dat_6"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301277 {GPIO_CFG(21, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001278 "sdc3_dat_5"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301279 {GPIO_CFG(108, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001280 "sdc3_dat_4"},
1281#endif
1282};
1283
1284static struct msm_gpio sdc4_cfg_data[] = {
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301285 {GPIO_CFG(19, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001286 "sdc4_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301287 {GPIO_CFG(20, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001288 "sdc4_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301289 {GPIO_CFG(21, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001290 "sdc4_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301291 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001292 "sdc4_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301293 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001294 "sdc4_dat_0"},
1295 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1296 "sdc4_clk"},
1297};
1298
1299static struct sdcc_gpio sdcc_cfg_data[] = {
1300 {
1301 .cfg_data = sdc1_cfg_data,
1302 .size = ARRAY_SIZE(sdc1_cfg_data),
1303 },
1304 {
1305 .cfg_data = sdc2_cfg_data,
1306 .size = ARRAY_SIZE(sdc2_cfg_data),
1307 .sleep_cfg_data = sdc2_sleep_cfg_data,
1308 },
1309 {
1310 .cfg_data = sdc3_cfg_data,
1311 .size = ARRAY_SIZE(sdc3_cfg_data),
1312 },
1313 {
1314 .cfg_data = sdc4_cfg_data,
1315 .size = ARRAY_SIZE(sdc4_cfg_data),
1316 },
1317};
1318
1319static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1320{
1321 int rc = 0;
1322 struct sdcc_gpio *curr;
1323
1324 curr = &sdcc_cfg_data[dev_id - 1];
1325 if (!(test_bit(dev_id, &gpio_sts)^enable))
1326 return rc;
1327
1328 if (enable) {
1329 set_bit(dev_id, &gpio_sts);
1330 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1331 if (rc)
1332 pr_err("%s: Failed to turn on GPIOs for slot %d\n",
1333 __func__, dev_id);
1334 } else {
1335 clear_bit(dev_id, &gpio_sts);
1336 if (curr->sleep_cfg_data) {
1337 rc = msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1338 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1339 return rc;
1340 }
1341 msm_gpios_disable_free(curr->cfg_data, curr->size);
1342 }
1343 return rc;
1344}
1345
1346static int msm_sdcc_setup_vreg(int dev_id, unsigned int enable)
1347{
1348 int rc = 0;
1349 struct sdcc_vreg *curr;
1350
1351 curr = &sdcc_vreg_data[dev_id - 1];
1352
1353 if (!(test_bit(dev_id, &vreg_sts)^enable))
1354 return rc;
1355
1356 if (enable) {
1357 set_bit(dev_id, &vreg_sts);
1358 rc = vreg_set_level(curr->vreg_data, curr->level);
1359 if (rc)
1360 pr_err("%s: vreg_set_level() = %d\n", __func__, rc);
1361
1362 rc = vreg_enable(curr->vreg_data);
1363 if (rc)
1364 pr_err("%s: vreg_enable() = %d\n", __func__, rc);
1365 } else {
1366 clear_bit(dev_id, &vreg_sts);
1367 rc = vreg_disable(curr->vreg_data);
1368 if (rc)
1369 pr_err("%s: vreg_disable() = %d\n", __func__, rc);
1370 }
1371 return rc;
1372}
1373
1374static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1375{
1376 int rc = 0;
1377 struct platform_device *pdev;
1378
1379 pdev = container_of(dv, struct platform_device, dev);
1380
1381 rc = msm_sdcc_setup_gpio(pdev->id, !!vdd);
1382 if (rc)
1383 goto out;
1384
1385 rc = msm_sdcc_setup_vreg(pdev->id, !!vdd);
1386out:
1387 return rc;
1388}
1389
1390#define GPIO_SDC1_HW_DET 85
1391
1392#if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \
1393 && defined(CONFIG_MMC_MSM_CARD_HW_DETECTION)
1394static unsigned int msm7x2xa_sdcc_slot_status(struct device *dev)
1395{
1396 int status;
1397
1398 status = gpio_tlmm_config(GPIO_CFG(GPIO_SDC1_HW_DET, 2, GPIO_CFG_INPUT,
1399 GPIO_CFG_PULL_UP, GPIO_CFG_8MA), GPIO_CFG_ENABLE);
1400 if (status)
1401 pr_err("%s:Failed to configure tlmm for GPIO %d\n", __func__,
1402 GPIO_SDC1_HW_DET);
1403
1404 status = gpio_request(GPIO_SDC1_HW_DET, "SD_HW_Detect");
1405 if (status) {
1406 pr_err("%s:Failed to request GPIO %d\n", __func__,
1407 GPIO_SDC1_HW_DET);
1408 } else {
1409 status = gpio_direction_input(GPIO_SDC1_HW_DET);
1410 if (!status)
1411 status = gpio_get_value(GPIO_SDC1_HW_DET);
1412 gpio_free(GPIO_SDC1_HW_DET);
1413 }
1414 return status;
1415}
1416#endif
1417
1418#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1419static struct mmc_platform_data sdc1_plat_data = {
1420 .ocr_mask = MMC_VDD_28_29,
1421 .translate_vdd = msm_sdcc_setup_power,
1422 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1423 .msmsdcc_fmin = 144000,
1424 .msmsdcc_fmid = 24576000,
1425 .msmsdcc_fmax = 49152000,
1426#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
1427 .status = msm7x2xa_sdcc_slot_status,
1428 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
1429 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1430#endif
1431};
1432#endif
1433
1434#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1435static struct mmc_platform_data sdc2_plat_data = {
1436 /*
1437 * SDC2 supports only 1.8V, claim for 2.85V range is just
1438 * for allowing buggy cards who advertise 2.8V even though
1439 * they can operate at 1.8V supply.
1440 */
1441 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_165_195,
1442 .translate_vdd = msm_sdcc_setup_power,
1443 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1444#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1445 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1446#endif
1447 .msmsdcc_fmin = 144000,
1448 .msmsdcc_fmid = 24576000,
1449 .msmsdcc_fmax = 49152000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001450};
1451#endif
1452
1453#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1454static struct mmc_platform_data sdc3_plat_data = {
1455 .ocr_mask = MMC_VDD_28_29,
1456 .translate_vdd = msm_sdcc_setup_power,
1457#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1458 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
1459#else
1460 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1461#endif
1462 .msmsdcc_fmin = 144000,
1463 .msmsdcc_fmid = 24576000,
1464 .msmsdcc_fmax = 49152000,
1465 .nonremovable = 1,
1466};
1467#endif
1468
1469#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1470 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1471static struct mmc_platform_data sdc4_plat_data = {
1472 .ocr_mask = MMC_VDD_28_29,
1473 .translate_vdd = msm_sdcc_setup_power,
1474 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1475 .msmsdcc_fmin = 144000,
1476 .msmsdcc_fmid = 24576000,
1477 .msmsdcc_fmax = 49152000,
1478};
1479#endif
1480#endif
1481
1482#ifdef CONFIG_SERIAL_MSM_HS
1483static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
1484 .inject_rx_on_wakeup = 1,
1485 .rx_to_inject = 0xFD,
1486};
1487#endif
1488static struct msm_pm_platform_data msm7x27a_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1489 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1490 .idle_supported = 1,
1491 .suspend_supported = 1,
1492 .idle_enabled = 1,
1493 .suspend_enabled = 1,
1494 .latency = 16000,
1495 .residency = 20000,
1496 },
1497 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1498 .idle_supported = 1,
1499 .suspend_supported = 1,
1500 .idle_enabled = 1,
1501 .suspend_enabled = 1,
1502 .latency = 12000,
1503 .residency = 20000,
1504 },
1505 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1506 .idle_supported = 1,
1507 .suspend_supported = 1,
1508 .idle_enabled = 0,
1509 .suspend_enabled = 1,
1510 .latency = 2000,
1511 .residency = 0,
1512 },
1513 [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = {
1514 .idle_supported = 1,
1515 .suspend_supported = 1,
1516 .idle_enabled = 1,
1517 .suspend_enabled = 1,
1518 .latency = 2,
1519 .residency = 0,
1520 },
1521};
1522
1523static struct android_pmem_platform_data android_pmem_adsp_pdata = {
1524 .name = "pmem_adsp",
1525 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
Mahesh Lankac6af7eb2011-08-02 18:00:35 +05301526 .cached = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001527 .memory_type = MEMTYPE_EBI1,
1528};
1529
1530static struct platform_device android_pmem_adsp_device = {
1531 .name = "android_pmem",
1532 .id = 1,
1533 .dev = { .platform_data = &android_pmem_adsp_pdata },
1534};
1535
1536static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1537static int __init pmem_mdp_size_setup(char *p)
1538{
1539 pmem_mdp_size = memparse(p, NULL);
1540 return 0;
1541}
1542
1543early_param("pmem_mdp_size", pmem_mdp_size_setup);
1544
1545static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1546static int __init pmem_adsp_size_setup(char *p)
1547{
1548 pmem_adsp_size = memparse(p, NULL);
1549 return 0;
1550}
1551
1552early_param("pmem_adsp_size", pmem_adsp_size_setup);
1553
1554static unsigned fb_size = MSM_FB_SIZE;
1555static int __init fb_size_setup(char *p)
1556{
1557 fb_size = memparse(p, NULL);
1558 return 0;
1559}
1560
1561early_param("fb_size", fb_size_setup);
1562
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001563static const char * const msm_fb_lcdc_vreg[] = {
1564 "gp2",
1565 "msme1",
1566};
1567
1568static const int msm_fb_lcdc_vreg_mV[] = {
1569 2850,
1570 1800,
1571};
1572
1573struct vreg *lcdc_vreg[ARRAY_SIZE(msm_fb_lcdc_vreg)];
1574
1575static uint32_t lcdc_gpio_initialized;
1576
1577static void lcdc_toshiba_gpio_init(void)
1578{
1579 int i, rc = 0;
1580 if (!lcdc_gpio_initialized) {
1581 if (gpio_request(GPIO_SPI_CLK, "spi_clk")) {
1582 pr_err("failed to request gpio spi_clk\n");
1583 return;
1584 }
1585 if (gpio_request(GPIO_SPI_CS0_N, "spi_cs")) {
1586 pr_err("failed to request gpio spi_cs0_N\n");
1587 goto fail_gpio6;
1588 }
1589 if (gpio_request(GPIO_SPI_MOSI, "spi_mosi")) {
1590 pr_err("failed to request gpio spi_mosi\n");
1591 goto fail_gpio5;
1592 }
1593 if (gpio_request(GPIO_SPI_MISO, "spi_miso")) {
1594 pr_err("failed to request gpio spi_miso\n");
1595 goto fail_gpio4;
1596 }
1597 if (gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr")) {
1598 pr_err("failed to request gpio_disp_pwr\n");
1599 goto fail_gpio3;
1600 }
1601 if (gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en")) {
1602 pr_err("failed to request gpio_bkl_en\n");
1603 goto fail_gpio2;
1604 }
1605 pmapp_disp_backlight_init();
1606
1607 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1608 lcdc_vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
1609
1610 rc = vreg_set_level(lcdc_vreg[i],
1611 msm_fb_lcdc_vreg_mV[i]);
1612
1613 if (rc < 0) {
1614 pr_err("%s: set regulator level failed "
1615 "with :(%d)\n", __func__, rc);
1616 goto fail_gpio1;
1617 }
1618 }
1619 lcdc_gpio_initialized = 1;
1620 }
1621 return;
1622
1623fail_gpio1:
1624 for (; i > 0; i--)
1625 vreg_put(lcdc_vreg[i - 1]);
1626
1627 gpio_free(GPIO_BACKLIGHT_EN);
1628fail_gpio2:
1629 gpio_free(GPIO_DISPLAY_PWR_EN);
1630fail_gpio3:
1631 gpio_free(GPIO_SPI_MISO);
1632fail_gpio4:
1633 gpio_free(GPIO_SPI_MOSI);
1634fail_gpio5:
1635 gpio_free(GPIO_SPI_CS0_N);
1636fail_gpio6:
1637 gpio_free(GPIO_SPI_CLK);
1638 lcdc_gpio_initialized = 0;
1639}
1640
1641static uint32_t lcdc_gpio_table[] = {
1642 GPIO_SPI_CLK,
1643 GPIO_SPI_CS0_N,
1644 GPIO_SPI_MOSI,
1645 GPIO_DISPLAY_PWR_EN,
1646 GPIO_BACKLIGHT_EN,
1647 GPIO_SPI_MISO,
1648};
1649
1650static void config_lcdc_gpio_table(uint32_t *table, int len, unsigned enable)
1651{
1652 int n;
1653
1654 if (lcdc_gpio_initialized) {
1655 /* All are IO Expander GPIOs */
1656 for (n = 0; n < (len - 1); n++)
1657 gpio_direction_output(table[n], 1);
1658 }
1659}
1660
1661static void lcdc_toshiba_config_gpios(int enable)
1662{
1663 config_lcdc_gpio_table(lcdc_gpio_table,
1664 ARRAY_SIZE(lcdc_gpio_table), enable);
1665}
1666
1667static int msm_fb_lcdc_power_save(int on)
1668{
1669 int i, rc = 0;
1670 /* Doing the init of the LCDC GPIOs very late as they are from
1671 an I2C-controlled IO Expander */
1672 lcdc_toshiba_gpio_init();
1673
1674 if (lcdc_gpio_initialized) {
1675 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
1676 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
1677
1678 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1679 if (on) {
1680 rc = vreg_enable(lcdc_vreg[i]);
1681
1682 if (rc) {
1683 printk(KERN_ERR "vreg_enable: %s vreg"
1684 "operation failed\n",
1685 msm_fb_lcdc_vreg[i]);
1686 goto lcdc_vreg_fail;
1687 }
1688 } else {
1689 rc = vreg_disable(lcdc_vreg[i]);
1690
1691 if (rc) {
1692 printk(KERN_ERR "vreg_disable: %s vreg "
1693 "operation failed\n",
1694 msm_fb_lcdc_vreg[i]);
1695 goto lcdc_vreg_fail;
1696 }
1697 }
1698 }
1699 }
1700
1701 return rc;
1702
1703lcdc_vreg_fail:
1704 if (on) {
1705 for (; i > 0; i--)
1706 vreg_disable(lcdc_vreg[i - 1]);
1707 } else {
1708 for (; i > 0; i--)
1709 vreg_enable(lcdc_vreg[i - 1]);
1710 }
1711
1712return rc;
1713
1714}
1715
1716
1717static int lcdc_toshiba_set_bl(int level)
1718{
1719 int ret;
1720
1721 ret = pmapp_disp_backlight_set_brightness(level);
1722 if (ret)
1723 pr_err("%s: can't set lcd backlight!\n", __func__);
1724
1725 return ret;
1726}
1727
1728
1729static struct lcdc_platform_data lcdc_pdata = {
Jeevan Shriram15f2a5e2011-07-13 21:45:26 +05301730 .lcdc_gpio_config = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001731 .lcdc_power_save = msm_fb_lcdc_power_save,
1732};
1733
1734static int lcd_panel_spi_gpio_num[] = {
1735 GPIO_SPI_MOSI, /* spi_sdi */
1736 GPIO_SPI_MISO, /* spi_sdoi */
1737 GPIO_SPI_CLK, /* spi_clk */
1738 GPIO_SPI_CS0_N, /* spi_cs */
1739};
1740
1741static struct msm_panel_common_pdata lcdc_toshiba_panel_data = {
1742 .panel_config_gpio = lcdc_toshiba_config_gpios,
1743 .pmic_backlight = lcdc_toshiba_set_bl,
1744 .gpio_num = lcd_panel_spi_gpio_num,
1745};
1746
1747static struct platform_device lcdc_toshiba_panel_device = {
1748 .name = "lcdc_toshiba_fwvga_pt",
1749 .id = 0,
1750 .dev = {
1751 .platform_data = &lcdc_toshiba_panel_data,
1752 }
1753};
1754
1755static struct resource msm_fb_resources[] = {
1756 {
1757 .flags = IORESOURCE_DMA,
1758 }
1759};
1760
1761static int msm_fb_detect_panel(const char *name)
1762{
1763 int ret = -EPERM;
1764
1765 if (machine_is_msm7x27a_surf()) {
1766 if (!strncmp(name, "lcdc_toshiba_fwvga_pt", 21))
1767 ret = 0;
1768 } else {
1769 ret = -ENODEV;
1770 }
1771
1772 return ret;
1773}
1774
1775static struct msm_fb_platform_data msm_fb_pdata = {
1776 .detect_client = msm_fb_detect_panel,
1777};
1778
1779static struct platform_device msm_fb_device = {
1780 .name = "msm_fb",
1781 .id = 0,
1782 .num_resources = ARRAY_SIZE(msm_fb_resources),
1783 .resource = msm_fb_resources,
1784 .dev = {
1785 .platform_data = &msm_fb_pdata,
1786 }
1787};
1788
1789#ifdef CONFIG_FB_MSM_MIPI_DSI
1790static int mipi_renesas_set_bl(int level)
1791{
1792 int ret;
1793
1794 ret = pmapp_disp_backlight_set_brightness(level);
1795
1796 if (ret)
1797 pr_err("%s: can't set lcd backlight!\n", __func__);
1798
1799 return ret;
1800}
1801
1802static struct msm_panel_common_pdata mipi_renesas_pdata = {
1803 .pmic_backlight = mipi_renesas_set_bl,
1804};
1805
1806
1807static struct platform_device mipi_dsi_renesas_panel_device = {
1808 .name = "mipi_renesas",
1809 .id = 0,
1810 .dev = {
1811 .platform_data = &mipi_renesas_pdata,
1812 }
1813};
1814#endif
1815
1816static void __init msm7x27a_init_mmc(void)
1817{
1818 vreg_emmc = vreg_get(NULL, "emmc");
1819 if (IS_ERR(vreg_emmc)) {
1820 pr_err("%s: vreg get failed (%ld)\n",
1821 __func__, PTR_ERR(vreg_emmc));
1822 return;
1823 }
1824
1825 vreg_mmc = vreg_get(NULL, "mmc");
1826 if (IS_ERR(vreg_mmc)) {
1827 pr_err("%s: vreg get failed (%ld)\n",
1828 __func__, PTR_ERR(vreg_mmc));
1829 return;
1830 }
1831
1832 /* eMMC slot */
1833#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1834 sdcc_vreg_data[2].vreg_data = vreg_emmc;
1835 sdcc_vreg_data[2].level = 3000;
1836 msm_add_sdcc(3, &sdc3_plat_data);
1837#endif
1838 /* Micro-SD slot */
1839#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1840 sdcc_vreg_data[0].vreg_data = vreg_mmc;
1841 sdcc_vreg_data[0].level = 2850;
1842 msm_add_sdcc(1, &sdc1_plat_data);
1843#endif
1844 /* SDIO WLAN slot */
1845#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1846 sdcc_vreg_data[1].vreg_data = vreg_mmc;
1847 sdcc_vreg_data[1].level = 2850;
1848 msm_add_sdcc(2, &sdc2_plat_data);
1849#endif
1850 /* Not Used */
1851#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1852 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1853 sdcc_vreg_data[3].vreg_data = vreg_mmc;
1854 sdcc_vreg_data[3].level = 2850;
1855 msm_add_sdcc(4, &sdc4_plat_data);
1856#endif
1857}
1858#define SND(desc, num) { .name = #desc, .id = num }
1859static struct snd_endpoint snd_endpoints_list[] = {
1860 SND(HANDSET, 0),
1861 SND(MONO_HEADSET, 2),
1862 SND(HEADSET, 3),
1863 SND(SPEAKER, 6),
1864 SND(TTY_HEADSET, 8),
1865 SND(TTY_VCO, 9),
1866 SND(TTY_HCO, 10),
1867 SND(BT, 12),
1868 SND(IN_S_SADC_OUT_HANDSET, 16),
1869 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
1870 SND(FM_DIGITAL_STEREO_HEADSET, 26),
1871 SND(FM_DIGITAL_SPEAKER_PHONE, 27),
1872 SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
1873 SND(CURRENT, 34),
1874 SND(FM_ANALOG_STEREO_HEADSET, 35),
1875 SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
1876};
1877#undef SND
1878
1879static struct msm_snd_endpoints msm_device_snd_endpoints = {
1880 .endpoints = snd_endpoints_list,
1881 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
1882};
1883
1884static struct platform_device msm_device_snd = {
1885 .name = "msm_snd",
1886 .id = -1,
1887 .dev = {
1888 .platform_data = &msm_device_snd_endpoints
1889 },
1890};
1891
1892#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1893 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1894 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1895 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1896 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1897 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1898#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1899 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1900 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1901 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1902 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1903 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1904#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1905 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1906 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1907 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1908 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1909 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1910#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1911 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1912 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1913 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1914 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1915 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1916#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
1917
1918static unsigned int dec_concurrency_table[] = {
1919 /* Audio LP */
1920 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
1921 0, 0, 0,
1922
1923 /* Concurrency 1 */
1924 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1925 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1926 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1927 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1928 (DEC4_FORMAT),
1929
1930 /* Concurrency 2 */
1931 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1932 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1933 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1934 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1935 (DEC4_FORMAT),
1936
1937 /* Concurrency 3 */
1938 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1939 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1940 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1941 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1942 (DEC4_FORMAT),
1943
1944 /* Concurrency 4 */
1945 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1946 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1947 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1948 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1949 (DEC4_FORMAT),
1950
1951 /* Concurrency 5 */
1952 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1953 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1954 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1955 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1956 (DEC4_FORMAT),
1957
1958 /* Concurrency 6 */
1959 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1960 0, 0, 0, 0,
1961
1962 /* Concurrency 7 */
1963 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1964 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1965 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1966 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1967 (DEC4_FORMAT),
1968};
1969
1970#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
1971 .module_queueid = queueid, .module_decid = decid, \
1972 .nr_codec_support = nr_codec}
1973
1974static struct msm_adspdec_info dec_info_list[] = {
1975 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
1976 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
1977 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
1978 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
1979 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
1980};
1981
1982static struct msm_adspdec_database msm_device_adspdec_database = {
1983 .num_dec = ARRAY_SIZE(dec_info_list),
1984 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
1985 ARRAY_SIZE(dec_info_list)),
1986 .dec_concurrency_table = dec_concurrency_table,
1987 .dec_info_list = dec_info_list,
1988};
1989
1990static struct platform_device msm_device_adspdec = {
1991 .name = "msm_adspdec",
1992 .id = -1,
1993 .dev = {
1994 .platform_data = &msm_device_adspdec_database
1995 },
1996};
1997
1998static struct android_pmem_platform_data android_pmem_audio_pdata = {
1999 .name = "pmem_audio",
2000 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2001 .cached = 0,
2002 .memory_type = MEMTYPE_EBI1,
2003};
2004
2005static struct platform_device android_pmem_audio_device = {
2006 .name = "android_pmem",
2007 .id = 2,
2008 .dev = { .platform_data = &android_pmem_audio_pdata },
2009};
2010
2011static struct android_pmem_platform_data android_pmem_pdata = {
2012 .name = "pmem",
2013 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2014 .cached = 1,
2015 .memory_type = MEMTYPE_EBI1,
2016};
2017static struct platform_device android_pmem_device = {
2018 .name = "android_pmem",
2019 .id = 0,
2020 .dev = { .platform_data = &android_pmem_pdata },
2021};
2022
2023static u32 msm_calculate_batt_capacity(u32 current_voltage);
2024
2025static struct msm_psy_batt_pdata msm_psy_batt_data = {
2026 .voltage_min_design = 2800,
2027 .voltage_max_design = 4300,
2028 .avail_chg_sources = AC_CHG | USB_CHG ,
2029 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
2030 .calculate_capacity = &msm_calculate_batt_capacity,
2031};
2032
2033static u32 msm_calculate_batt_capacity(u32 current_voltage)
2034{
2035 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
2036 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
2037
2038 return (current_voltage - low_voltage) * 100
2039 / (high_voltage - low_voltage);
2040}
2041
2042static struct platform_device msm_batt_device = {
2043 .name = "msm-battery",
2044 .id = -1,
2045 .dev.platform_data = &msm_psy_batt_data,
2046};
2047
2048static struct smsc911x_platform_config smsc911x_config = {
2049 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
2050 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
2051 .flags = SMSC911X_USE_16BIT,
2052};
2053
2054static struct resource smsc911x_resources[] = {
2055 [0] = {
2056 .start = 0x90000000,
2057 .end = 0x90007fff,
2058 .flags = IORESOURCE_MEM,
2059 },
2060 [1] = {
2061 .start = MSM_GPIO_TO_INT(48),
2062 .end = MSM_GPIO_TO_INT(48),
2063 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
2064 },
2065};
2066
2067static struct platform_device smsc911x_device = {
2068 .name = "smsc911x",
2069 .id = 0,
2070 .num_resources = ARRAY_SIZE(smsc911x_resources),
2071 .resource = smsc911x_resources,
2072 .dev = {
2073 .platform_data = &smsc911x_config,
2074 },
2075};
2076
2077static struct msm_gpio smsc911x_gpios[] = {
2078 { GPIO_CFG(48, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2079 "smsc911x_irq" },
2080 { GPIO_CFG(49, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2081 "eth_fifo_sel" },
2082};
2083
2084#define ETH_FIFO_SEL_GPIO 49
2085static void msm7x27a_cfg_smsc911x(void)
2086{
2087 int res;
2088
2089 res = msm_gpios_request_enable(smsc911x_gpios,
2090 ARRAY_SIZE(smsc911x_gpios));
2091 if (res) {
2092 pr_err("%s: unable to enable gpios for SMSC911x\n", __func__);
2093 return;
2094 }
2095
2096 /* ETH_FIFO_SEL */
2097 res = gpio_direction_output(ETH_FIFO_SEL_GPIO, 0);
2098 if (res) {
2099 pr_err("%s: unable to get direction for gpio %d\n", __func__,
2100 ETH_FIFO_SEL_GPIO);
2101 msm_gpios_disable_free(smsc911x_gpios,
2102 ARRAY_SIZE(smsc911x_gpios));
2103 return;
2104 }
2105 gpio_set_value(ETH_FIFO_SEL_GPIO, 0);
2106}
2107
2108#ifdef CONFIG_MSM_CAMERA
2109static uint32_t camera_off_gpio_table[] = {
2110 GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2111};
2112
2113static uint32_t camera_on_gpio_table[] = {
2114 GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2115};
2116
2117#ifdef CONFIG_MSM_CAMERA_FLASH
2118static struct msm_camera_sensor_flash_src msm_flash_src = {
Nishant Pandit474f2252011-07-23 23:17:56 +05302119 .flash_sr_type = MSM_CAMERA_FLASH_SRC_EXT,
2120 ._fsrc.ext_driver_src.led_en = GPIO_CAM_GP_LED_EN1,
2121 ._fsrc.ext_driver_src.led_flash_en = GPIO_CAM_GP_LED_EN2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002122};
2123#endif
2124
2125static struct vreg *vreg_gp1;
2126static struct vreg *vreg_gp2;
2127static struct vreg *vreg_gp3;
2128static void msm_camera_vreg_config(int vreg_en)
2129{
2130 int rc;
2131
2132 if (vreg_gp1 == NULL) {
2133 vreg_gp1 = vreg_get(NULL, "msme1");
2134 if (IS_ERR(vreg_gp1)) {
2135 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2136 __func__, "msme1", PTR_ERR(vreg_gp1));
2137 return;
2138 }
2139
2140 rc = vreg_set_level(vreg_gp1, 1800);
2141 if (rc) {
2142 pr_err("%s: GP1 set_level failed (%d)\n",
2143 __func__, rc);
2144 return;
2145 }
2146 }
2147
2148 if (vreg_gp2 == NULL) {
2149 vreg_gp2 = vreg_get(NULL, "gp2");
2150 if (IS_ERR(vreg_gp2)) {
2151 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2152 __func__, "gp2", PTR_ERR(vreg_gp2));
2153 return;
2154 }
2155
2156 rc = vreg_set_level(vreg_gp2, 2850);
2157 if (rc) {
2158 pr_err("%s: GP2 set_level failed (%d)\n",
2159 __func__, rc);
2160 }
2161 }
2162
2163 if (vreg_gp3 == NULL) {
2164 vreg_gp3 = vreg_get(NULL, "usb2");
2165 if (IS_ERR(vreg_gp3)) {
2166 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2167 __func__, "gp3", PTR_ERR(vreg_gp3));
2168 return;
2169 }
2170
2171 rc = vreg_set_level(vreg_gp3, 1800);
2172 if (rc) {
2173 pr_err("%s: GP3 set level failed (%d)\n",
2174 __func__, rc);
2175 }
2176 }
2177
2178 if (vreg_en) {
2179 rc = vreg_enable(vreg_gp1);
2180 if (rc) {
2181 pr_err("%s: GP1 enable failed (%d)\n",
2182 __func__, rc);
2183 return;
2184 }
2185
2186 rc = vreg_enable(vreg_gp2);
2187 if (rc) {
2188 pr_err("%s: GP2 enable failed (%d)\n",
2189 __func__, rc);
2190 }
2191
2192 rc = vreg_enable(vreg_gp3);
2193 if (rc) {
2194 pr_err("%s: GP3 enable failed (%d)\n",
2195 __func__, rc);
2196 }
2197 } else {
2198 rc = vreg_disable(vreg_gp1);
2199 if (rc)
2200 pr_err("%s: GP1 disable failed (%d)\n",
2201 __func__, rc);
2202
2203 rc = vreg_disable(vreg_gp2);
2204 if (rc) {
2205 pr_err("%s: GP2 disable failed (%d)\n",
2206 __func__, rc);
2207 }
2208
2209 rc = vreg_disable(vreg_gp3);
2210 if (rc) {
2211 pr_err("%s: GP3 disable failed (%d)\n",
2212 __func__, rc);
2213 }
2214 }
2215}
2216
2217static int config_gpio_table(uint32_t *table, int len)
2218{
2219 int rc = 0, i = 0;
2220
2221 for (i = 0; i < len; i++) {
2222 rc = gpio_tlmm_config(table[i], GPIO_CFG_ENABLE);
2223 if (rc) {
2224 pr_err("%s not able to get gpio\n", __func__);
2225 for (i--; i >= 0; i--)
2226 gpio_tlmm_config(camera_off_gpio_table[i],
2227 GPIO_CFG_ENABLE);
2228 break;
2229 }
2230 }
2231 return rc;
2232}
2233
2234static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data;
2235static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data;
2236static int config_camera_on_gpios_rear(void)
2237{
2238 int rc = 0;
2239
2240 if (machine_is_msm7x27a_ffa())
2241 msm_camera_vreg_config(1);
2242
2243 rc = config_gpio_table(camera_on_gpio_table,
2244 ARRAY_SIZE(camera_on_gpio_table));
2245 if (rc < 0) {
2246 pr_err("%s: CAMSENSOR gpio table request"
2247 "failed\n", __func__);
2248 return rc;
2249 }
2250
2251 return rc;
2252}
2253
2254static void config_camera_off_gpios_rear(void)
2255{
2256 if (machine_is_msm7x27a_ffa())
2257 msm_camera_vreg_config(0);
2258
2259 config_gpio_table(camera_off_gpio_table,
2260 ARRAY_SIZE(camera_off_gpio_table));
2261}
2262
2263static int config_camera_on_gpios_front(void)
2264{
2265 int rc = 0;
2266
2267 if (machine_is_msm7x27a_ffa())
2268 msm_camera_vreg_config(1);
2269
2270 rc = config_gpio_table(camera_on_gpio_table,
2271 ARRAY_SIZE(camera_on_gpio_table));
2272 if (rc < 0) {
2273 pr_err("%s: CAMSENSOR gpio table request"
2274 "failed\n", __func__);
2275 return rc;
2276 }
2277
2278 return rc;
2279}
2280
2281static void config_camera_off_gpios_front(void)
2282{
2283 if (machine_is_msm7x27a_ffa())
2284 msm_camera_vreg_config(0);
2285
2286 config_gpio_table(camera_off_gpio_table,
2287 ARRAY_SIZE(camera_off_gpio_table));
2288}
2289
2290struct msm_camera_device_platform_data msm_camera_device_data_rear = {
2291 .camera_gpio_on = config_camera_on_gpios_rear,
2292 .camera_gpio_off = config_camera_off_gpios_rear,
2293 .ioext.csiphy = 0xA1000000,
2294 .ioext.csisz = 0x00100000,
2295 .ioext.csiirq = INT_CSI_IRQ_1,
2296 .ioclk.mclk_clk_rate = 24000000,
2297 .ioclk.vfe_clk_rate = 192000000,
2298 .ioext.appphy = MSM_CLK_CTL_PHYS,
2299 .ioext.appsz = MSM_CLK_CTL_SIZE,
2300};
2301
2302struct msm_camera_device_platform_data msm_camera_device_data_front = {
2303 .camera_gpio_on = config_camera_on_gpios_front,
2304 .camera_gpio_off = config_camera_off_gpios_front,
2305 .ioext.csiphy = 0xA0F00000,
2306 .ioext.csisz = 0x00100000,
2307 .ioext.csiirq = INT_CSI_IRQ_0,
2308 .ioclk.mclk_clk_rate = 24000000,
2309 .ioclk.vfe_clk_rate = 192000000,
2310 .ioext.appphy = MSM_CLK_CTL_PHYS,
2311 .ioext.appsz = MSM_CLK_CTL_SIZE,
2312};
2313
2314#ifdef CONFIG_S5K4E1
2315static struct msm_camera_sensor_platform_info s5k4e1_sensor_7627a_info = {
2316 .mount_angle = 90
2317};
2318
2319static struct msm_camera_sensor_flash_data flash_s5k4e1 = {
2320 .flash_type = MSM_CAMERA_FLASH_LED,
2321 .flash_src = &msm_flash_src
2322};
2323
2324static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data = {
2325 .sensor_name = "s5k4e1",
2326 .sensor_reset_enable = 1,
2327 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N,
2328 .sensor_pwd = 85,
2329 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2330 .vcm_enable = 1,
2331 .pdata = &msm_camera_device_data_rear,
2332 .flash_data = &flash_s5k4e1,
2333 .sensor_platform_info = &s5k4e1_sensor_7627a_info,
2334 .csi_if = 1
2335};
2336
2337static struct platform_device msm_camera_sensor_s5k4e1 = {
2338 .name = "msm_camera_s5k4e1",
2339 .dev = {
2340 .platform_data = &msm_camera_sensor_s5k4e1_data,
2341 },
2342};
2343#endif
2344
2345#ifdef CONFIG_IMX072
2346static struct msm_camera_sensor_platform_info imx072_sensor_7627a_info = {
2347 .mount_angle = 90
2348};
2349
2350static struct msm_camera_sensor_flash_data flash_imx072 = {
2351 .flash_type = MSM_CAMERA_FLASH_LED,
2352 .flash_src = &msm_flash_src
2353};
2354
2355static struct msm_camera_sensor_info msm_camera_sensor_imx072_data = {
2356 .sensor_name = "imx072",
2357 .sensor_reset_enable = 1,
2358 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N, /* TODO 106,*/
2359 .sensor_pwd = 85,
2360 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2361 .vcm_enable = 1,
2362 .pdata = &msm_camera_device_data_rear,
2363 .flash_data = &flash_imx072,
2364 .sensor_platform_info = &imx072_sensor_7627a_info,
2365 .csi_if = 1
2366};
2367
2368static struct platform_device msm_camera_sensor_imx072 = {
2369 .name = "msm_camera_imx072",
2370 .dev = {
2371 .platform_data = &msm_camera_sensor_imx072_data,
2372 },
2373};
2374#endif
2375
2376#ifdef CONFIG_WEBCAM_OV9726
2377static struct msm_camera_sensor_platform_info ov9726_sensor_7627a_info = {
2378 .mount_angle = 90
2379};
2380
2381static struct msm_camera_sensor_flash_data flash_ov9726 = {
2382 .flash_type = MSM_CAMERA_FLASH_NONE,
2383 .flash_src = &msm_flash_src
2384};
2385
2386static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2387 .sensor_name = "ov9726",
2388 .sensor_reset_enable = 0,
2389 .sensor_reset = GPIO_CAM_GP_CAM1MP_XCLR,
2390 .sensor_pwd = 85,
2391 .vcm_pwd = 1,
2392 .vcm_enable = 0,
2393 .pdata = &msm_camera_device_data_front,
2394 .flash_data = &flash_ov9726,
2395 .sensor_platform_info = &ov9726_sensor_7627a_info,
2396 .csi_if = 1
2397};
2398
2399static struct platform_device msm_camera_sensor_ov9726 = {
2400 .name = "msm_camera_ov9726",
2401 .dev = {
2402 .platform_data = &msm_camera_sensor_ov9726_data,
2403 },
2404};
2405#endif
2406
2407#ifdef CONFIG_MT9E013
2408static struct msm_camera_sensor_platform_info mt9e013_sensor_7627a_info = {
2409 .mount_angle = 90
2410};
2411
2412static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2413 .flash_type = MSM_CAMERA_FLASH_LED,
2414 .flash_src = &msm_flash_src
2415};
2416
2417static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2418 .sensor_name = "mt9e013",
2419 .sensor_reset = 0,
2420 .sensor_reset_enable = 1,
2421 .sensor_pwd = 85,
2422 .vcm_pwd = 1,
2423 .vcm_enable = 0,
2424 .pdata = &msm_camera_device_data_rear,
2425 .flash_data = &flash_mt9e013,
2426 .sensor_platform_info = &mt9e013_sensor_7627a_info,
2427 .csi_if = 1
2428};
2429
2430static struct platform_device msm_camera_sensor_mt9e013 = {
2431 .name = "msm_camera_mt9e013",
2432 .dev = {
2433 .platform_data = &msm_camera_sensor_mt9e013_data,
2434 },
2435};
2436#endif
2437
2438static struct i2c_board_info i2c_camera_devices[] = {
2439 #ifdef CONFIG_S5K4E1
2440 {
2441 I2C_BOARD_INFO("s5k4e1", 0x36),
2442 },
2443 {
2444 I2C_BOARD_INFO("s5k4e1_af", 0x8c >> 1),
2445 },
2446 #endif
2447 #ifdef CONFIG_WEBCAM_OV9726
2448 {
2449 I2C_BOARD_INFO("ov9726", 0x10),
2450 },
2451 #endif
2452 #ifdef CONFIG_IMX072
2453 {
2454 I2C_BOARD_INFO("imx072", 0x34),
2455 },
2456 #endif
2457 #ifdef CONFIG_MT9E013
2458 {
2459 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2460 },
2461 #endif
2462 {
Nishant Pandit474f2252011-07-23 23:17:56 +05302463 I2C_BOARD_INFO("sc628a", 0x6E),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002464 },
2465};
2466#endif
2467#if defined(CONFIG_SERIAL_MSM_HSL_CONSOLE) \
2468 && defined(CONFIG_MSM_SHARED_GPIO_FOR_UART2DM)
2469static struct msm_gpio uart2dm_gpios[] = {
2470 {GPIO_CFG(19, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2471 "uart2dm_rfr_n" },
2472 {GPIO_CFG(20, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2473 "uart2dm_cts_n" },
2474 {GPIO_CFG(21, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2475 "uart2dm_rx" },
2476 {GPIO_CFG(108, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2477 "uart2dm_tx" },
2478};
2479
2480static void msm7x27a_cfg_uart2dm_serial(void)
2481{
2482 int ret;
2483 ret = msm_gpios_request_enable(uart2dm_gpios,
2484 ARRAY_SIZE(uart2dm_gpios));
2485 if (ret)
2486 pr_err("%s: unable to enable gpios for uart2dm\n", __func__);
2487}
2488#else
2489static void msm7x27a_cfg_uart2dm_serial(void) { }
2490#endif
2491
2492static struct platform_device *rumi_sim_devices[] __initdata = {
2493 &msm_device_dmov,
2494 &msm_device_smd,
2495 &smc91x_device,
2496 &msm_device_uart1,
2497 &msm_device_nand,
2498 &msm_device_uart_dm1,
2499 &msm_gsbi0_qup_i2c_device,
2500 &msm_gsbi1_qup_i2c_device,
2501};
2502
2503static struct platform_device *surf_ffa_devices[] __initdata = {
2504 &msm_device_dmov,
2505 &msm_device_smd,
2506 &msm_device_uart1,
2507 &msm_device_uart_dm1,
2508 &msm_device_uart_dm2,
2509 &msm_device_nand,
2510 &msm_gsbi0_qup_i2c_device,
2511 &msm_gsbi1_qup_i2c_device,
2512 &msm_device_otg,
2513 &msm_device_gadget_peripheral,
2514 &android_usb_device,
2515 &android_pmem_device,
2516 &android_pmem_adsp_device,
2517 &android_pmem_audio_device,
2518 &msm_device_snd,
2519 &msm_device_adspdec,
2520 &msm_fb_device,
2521 &lcdc_toshiba_panel_device,
2522 &msm_batt_device,
2523 &smsc911x_device,
2524#ifdef CONFIG_S5K4E1
2525 &msm_camera_sensor_s5k4e1,
2526#endif
2527#ifdef CONFIG_IMX072
2528 &msm_camera_sensor_imx072,
2529#endif
2530#ifdef CONFIG_WEBCAM_OV9726
2531 &msm_camera_sensor_ov9726,
2532#endif
2533#ifdef CONFIG_MT9E013
2534 &msm_camera_sensor_mt9e013,
2535#endif
2536#ifdef CONFIG_FB_MSM_MIPI_DSI
2537 &mipi_dsi_renesas_panel_device,
2538#endif
2539 &msm_kgsl_3d0,
2540#ifdef CONFIG_BT
2541 &msm_bt_power_device,
2542#endif
Manish Dewangan3a260992011-06-24 18:01:34 +05302543 &asoc_msm_pcm,
2544 &asoc_msm_dai0,
2545 &asoc_msm_dai1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002546};
2547
2548static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
2549static int __init pmem_kernel_ebi1_size_setup(char *p)
2550{
2551 pmem_kernel_ebi1_size = memparse(p, NULL);
2552 return 0;
2553}
2554early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2555
2556static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2557static int __init pmem_audio_size_setup(char *p)
2558{
2559 pmem_audio_size = memparse(p, NULL);
2560 return 0;
2561}
2562early_param("pmem_audio_size", pmem_audio_size_setup);
2563
2564static void __init msm_msm7x2x_allocate_memory_regions(void)
2565{
2566 void *addr;
2567 unsigned long size;
2568
2569 size = fb_size ? : MSM_FB_SIZE;
2570 addr = alloc_bootmem_align(size, 0x1000);
2571 msm_fb_resources[0].start = __pa(addr);
2572 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
2573 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
2574 size, addr, __pa(addr));
2575}
2576
2577static struct memtype_reserve msm7x27a_reserve_table[] __initdata = {
2578 [MEMTYPE_SMI] = {
2579 },
2580 [MEMTYPE_EBI0] = {
2581 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2582 },
2583 [MEMTYPE_EBI1] = {
2584 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2585 },
2586};
2587
2588static void __init size_pmem_devices(void)
2589{
2590#ifdef CONFIG_ANDROID_PMEM
2591 android_pmem_adsp_pdata.size = pmem_adsp_size;
2592 android_pmem_pdata.size = pmem_mdp_size;
2593 android_pmem_audio_pdata.size = pmem_audio_size;
2594#endif
2595}
2596
2597static void __init reserve_memory_for(struct android_pmem_platform_data *p)
2598{
2599 msm7x27a_reserve_table[p->memory_type].size += p->size;
2600}
2601
2602static void __init reserve_pmem_memory(void)
2603{
2604#ifdef CONFIG_ANDROID_PMEM
2605 reserve_memory_for(&android_pmem_adsp_pdata);
2606 reserve_memory_for(&android_pmem_pdata);
2607 reserve_memory_for(&android_pmem_audio_pdata);
2608 msm7x27a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
2609#endif
2610}
2611
2612static void __init msm7x27a_calculate_reserve_sizes(void)
2613{
2614 size_pmem_devices();
2615 reserve_pmem_memory();
2616}
2617
2618static int msm7x27a_paddr_to_memtype(unsigned int paddr)
2619{
2620 return MEMTYPE_EBI1;
2621}
2622
2623static struct reserve_info msm7x27a_reserve_info __initdata = {
2624 .memtype_reserve_table = msm7x27a_reserve_table,
2625 .calculate_reserve_sizes = msm7x27a_calculate_reserve_sizes,
2626 .paddr_to_memtype = msm7x27a_paddr_to_memtype,
2627};
2628
2629static void __init msm7x27a_reserve(void)
2630{
2631 reserve_info = &msm7x27a_reserve_info;
2632 msm_reserve();
2633}
2634
2635static void __init msm_device_i2c_init(void)
2636{
2637 msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
2638 msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
2639}
2640
2641static struct msm_panel_common_pdata mdp_pdata = {
2642 .gpio = 97,
2643 .mdp_rev = MDP_REV_303,
2644};
2645
2646#define GPIO_LCDC_BRDG_PD 128
2647#define GPIO_LCDC_BRDG_RESET_N 129
2648
2649#define LCDC_RESET_PHYS 0x90008014
2650static void __iomem *lcdc_reset_ptr;
2651
2652static unsigned mipi_dsi_gpio[] = {
2653 GPIO_CFG(GPIO_LCDC_BRDG_RESET_N, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2654 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2655 GPIO_CFG(GPIO_LCDC_BRDG_PD, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2656 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2657};
2658
2659enum {
2660 DSI_SINGLE_LANE = 1,
2661 DSI_TWO_LANES,
2662};
2663
2664static int msm_fb_get_lane_config(void)
2665{
2666 int rc = DSI_TWO_LANES;
2667
2668 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
2669 rc = DSI_SINGLE_LANE;
2670 pr_info("DSI Single Lane\n");
2671 } else {
2672 pr_info("DSI Two Lanes\n");
2673 }
2674 return rc;
2675}
2676
2677static int msm_fb_dsi_client_reset(void)
2678{
2679 int rc = 0;
2680
2681 rc = gpio_request(GPIO_LCDC_BRDG_RESET_N, "lcdc_brdg_reset_n");
2682 if (rc < 0) {
2683 pr_err("failed to request lcd brdg reset_n\n");
2684 return rc;
2685 }
2686
2687 rc = gpio_request(GPIO_LCDC_BRDG_PD, "lcdc_brdg_pd");
2688 if (rc < 0) {
2689 pr_err("failed to request lcd brdg pd\n");
2690 return rc;
2691 }
2692
2693 rc = gpio_tlmm_config(mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
2694 if (rc) {
2695 pr_err("Failed to enable LCDC Bridge reset enable\n");
2696 goto gpio_error;
2697 }
2698
2699 rc = gpio_tlmm_config(mipi_dsi_gpio[1], GPIO_CFG_ENABLE);
2700 if (rc) {
2701 pr_err("Failed to enable LCDC Bridge pd enable\n");
2702 goto gpio_error2;
2703 }
2704
2705 rc = gpio_direction_output(GPIO_LCDC_BRDG_RESET_N, 1);
2706 rc |= gpio_direction_output(GPIO_LCDC_BRDG_PD, 1);
2707 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2708
2709 if (!rc) {
2710 if (machine_is_msm7x27a_surf()) {
2711 lcdc_reset_ptr = ioremap_nocache(LCDC_RESET_PHYS,
2712 sizeof(uint32_t));
2713
2714 if (!lcdc_reset_ptr)
2715 return 0;
2716 }
2717 return rc;
2718 } else {
2719 goto gpio_error;
2720 }
2721
2722gpio_error2:
2723 pr_err("Failed GPIO bridge pd\n");
2724 gpio_free(GPIO_LCDC_BRDG_PD);
2725
2726gpio_error:
2727 pr_err("Failed GPIO bridge reset\n");
2728 gpio_free(GPIO_LCDC_BRDG_RESET_N);
2729 return rc;
2730}
2731
2732static const char * const msm_fb_dsi_vreg[] = {
2733 "gp2",
2734 "msme1",
2735};
2736
2737static const int msm_fb_dsi_vreg_mV[] = {
2738 2850,
2739 1800,
2740};
2741
2742static struct vreg *dsi_vreg[ARRAY_SIZE(msm_fb_dsi_vreg)];
2743static int dsi_gpio_initialized;
2744
2745static int mipi_dsi_panel_power(int on)
2746{
2747 int i, rc = 0;
2748 uint32_t lcdc_reset_cfg;
2749
2750 /* I2C-controlled GPIO Expander -init of the GPIOs very late */
2751 if (!dsi_gpio_initialized) {
2752 pmapp_disp_backlight_init();
2753
2754 rc = gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr");
2755 if (rc < 0) {
2756 pr_err("failed to request gpio_disp_pwr\n");
2757 return rc;
2758 }
2759
2760 if (machine_is_msm7x27a_surf()) {
2761 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN, 1);
2762 if (rc < 0) {
2763 pr_err("failed to enable display pwr\n");
2764 goto fail_gpio1;
2765 }
2766
2767 rc = gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en");
2768 if (rc < 0) {
2769 pr_err("failed to request gpio_bkl_en\n");
2770 goto fail_gpio1;
2771 }
2772
2773 rc = gpio_direction_output(GPIO_BACKLIGHT_EN, 1);
2774 if (rc < 0) {
2775 pr_err("failed to enable backlight\n");
2776 goto fail_gpio2;
2777 }
2778 }
2779
2780 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2781 dsi_vreg[i] = vreg_get(0, msm_fb_dsi_vreg[i]);
2782
2783 if (IS_ERR(dsi_vreg[i])) {
2784 pr_err("%s: vreg get failed with : (%ld)\n",
2785 __func__, PTR_ERR(dsi_vreg[i]));
2786 goto fail_gpio2;
2787 }
2788
2789 rc = vreg_set_level(dsi_vreg[i],
2790 msm_fb_dsi_vreg_mV[i]);
2791
2792 if (rc < 0) {
2793 pr_err("%s: set regulator level failed "
2794 "with :(%d)\n", __func__, rc);
2795 goto vreg_fail1;
2796 }
2797 }
2798 dsi_gpio_initialized = 1;
2799 }
2800
2801 if (machine_is_msm7x27a_surf()) {
2802 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
2803 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
2804 } else if (machine_is_msm7x27a_ffa()) {
2805 if (on) {
2806 /* This line drives an active low pin on FFA */
2807 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN,
2808 !on);
2809 if (rc < 0)
2810 pr_err("failed to set direction for "
2811 "display pwr\n");
2812 } else {
2813 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN,
2814 !on);
2815 rc = gpio_direction_input(GPIO_DISPLAY_PWR_EN);
2816 if (rc < 0)
2817 pr_err("failed to set direction for "
2818 "display pwr\n");
2819 }
2820 }
2821
2822 if (on) {
2823 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2824
2825 if (machine_is_msm7x27a_surf()) {
2826 lcdc_reset_cfg = readl_relaxed(lcdc_reset_ptr);
2827 rmb();
2828 lcdc_reset_cfg &= ~1;
2829
2830 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2831 msleep(20);
2832 wmb();
2833 lcdc_reset_cfg |= 1;
2834 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2835 } else {
2836 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2837 0);
2838 msleep(20);
2839 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2840 1);
2841 }
2842
2843 if (pmapp_disp_backlight_set_brightness(100))
2844 pr_err("backlight set brightness failed\n");
2845 } else {
2846 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 1);
2847
2848 if (pmapp_disp_backlight_set_brightness(0))
2849 pr_err("backlight set brightness failed\n");
2850 }
2851
2852 /*Configure vreg lines */
2853 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2854 if (on) {
2855 rc = vreg_enable(dsi_vreg[i]);
2856
2857 if (rc) {
2858 printk(KERN_ERR "vreg_enable: %s vreg"
2859 "operation failed\n",
2860 msm_fb_dsi_vreg[i]);
2861
2862 goto vreg_fail2;
2863 }
2864 } else {
2865 rc = vreg_disable(dsi_vreg[i]);
2866
2867 if (rc) {
2868 printk(KERN_ERR "vreg_disable: %s vreg "
2869 "operation failed\n",
2870 msm_fb_dsi_vreg[i]);
2871 goto vreg_fail2;
2872 }
2873 }
2874 }
2875
2876 return rc;
2877
2878vreg_fail2:
2879 if (on) {
2880 for (; i > 0; i--)
2881 vreg_disable(dsi_vreg[i - 1]);
2882 } else {
2883 for (; i > 0; i--)
2884 vreg_enable(dsi_vreg[i - 1]);
2885 }
2886
2887 return rc;
2888
2889vreg_fail1:
2890 for (; i > 0; i--)
2891 vreg_put(dsi_vreg[i - 1]);
2892
2893fail_gpio2:
2894 gpio_free(GPIO_BACKLIGHT_EN);
2895fail_gpio1:
2896 gpio_free(GPIO_DISPLAY_PWR_EN);
2897 dsi_gpio_initialized = 0;
2898 return rc;
2899}
2900
2901#define MDP_303_VSYNC_GPIO 97
2902
2903#ifdef CONFIG_FB_MSM_MDP303
2904static struct mipi_dsi_platform_data mipi_dsi_pdata = {
2905 .vsync_gpio = MDP_303_VSYNC_GPIO,
2906 .dsi_power_save = mipi_dsi_panel_power,
2907 .dsi_client_reset = msm_fb_dsi_client_reset,
2908 .get_lane_config = msm_fb_get_lane_config,
2909};
2910#endif
2911
2912static void __init msm_fb_add_devices(void)
2913{
2914 msm_fb_register_device("mdp", &mdp_pdata);
2915 msm_fb_register_device("lcdc", &lcdc_pdata);
2916 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
2917}
2918
2919#define MSM_EBI2_PHYS 0xa0d00000
2920#define MSM_EBI2_XMEM_CS2_CFG1 0xa0d10030
2921
2922static void __init msm7x27a_init_ebi2(void)
2923{
2924 uint32_t ebi2_cfg;
2925 void __iomem *ebi2_cfg_ptr;
2926
2927 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_PHYS, sizeof(uint32_t));
2928 if (!ebi2_cfg_ptr)
2929 return;
2930
2931 ebi2_cfg = readl(ebi2_cfg_ptr);
2932 if (machine_is_msm7x27a_rumi3() || machine_is_msm7x27a_surf())
2933 ebi2_cfg |= (1 << 4); /* CS2 */
2934
2935 writel(ebi2_cfg, ebi2_cfg_ptr);
2936 iounmap(ebi2_cfg_ptr);
2937
2938 /* Enable A/D MUX[bit 31] from EBI2_XMEM_CS2_CFG1 */
2939 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_XMEM_CS2_CFG1,
2940 sizeof(uint32_t));
2941 if (!ebi2_cfg_ptr)
2942 return;
2943
2944 ebi2_cfg = readl(ebi2_cfg_ptr);
2945 if (machine_is_msm7x27a_surf())
2946 ebi2_cfg |= (1 << 31);
2947
2948 writel(ebi2_cfg, ebi2_cfg_ptr);
2949 iounmap(ebi2_cfg_ptr);
2950}
2951
2952#define ATMEL_TS_I2C_NAME "maXTouch"
2953static struct vreg *vreg_l12;
2954static struct vreg *vreg_s3;
2955
2956#define ATMEL_TS_GPIO_IRQ 82
2957
2958static int atmel_ts_power_on(bool on)
2959{
2960 int rc;
2961
2962 rc = on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2963 if (rc) {
2964 pr_err("%s: vreg %sable failed (%d)\n",
2965 __func__, on ? "en" : "dis", rc);
2966 return rc;
2967 }
2968
2969 rc = on ? vreg_enable(vreg_s3) : vreg_disable(vreg_s3);
2970 if (rc) {
2971 pr_err("%s: vreg %sable failed (%d) for S3\n",
2972 __func__, on ? "en" : "dis", rc);
2973 !on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2974 return rc;
2975 }
2976 /* vreg stabilization delay */
2977 msleep(50);
2978 return 0;
2979}
2980
2981static int atmel_ts_platform_init(struct i2c_client *client)
2982{
2983 int rc;
2984
2985 vreg_l12 = vreg_get(NULL, "gp2");
2986 if (IS_ERR(vreg_l12)) {
2987 pr_err("%s: vreg_get for L2 failed\n", __func__);
2988 return PTR_ERR(vreg_l12);
2989 }
2990
2991 rc = vreg_set_level(vreg_l12, 2850);
2992 if (rc) {
2993 pr_err("%s: vreg set level failed (%d) for l2\n",
2994 __func__, rc);
2995 goto vreg_put_l2;
2996 }
2997
2998 vreg_s3 = vreg_get(NULL, "msme1");
2999 if (IS_ERR(vreg_s3)) {
3000 pr_err("%s: vreg_get for S3 failed\n", __func__);
3001 rc = PTR_ERR(vreg_s3);
3002 goto vreg_put_l2;
3003 }
3004
3005 rc = vreg_set_level(vreg_s3, 1800);
3006 if (rc) {
3007 pr_err("%s: vreg set level failed (%d) for S3\n",
3008 __func__, rc);
3009 goto vreg_put_s3;
3010 }
3011
3012 rc = gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3013 GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
3014 GPIO_CFG_8MA), GPIO_CFG_ENABLE);
3015 if (rc) {
3016 pr_err("%s: gpio_tlmm_config for %d failed\n",
3017 __func__, ATMEL_TS_GPIO_IRQ);
3018 goto vreg_put_s3;
3019 }
3020
3021 /* configure touchscreen interrupt gpio */
3022 rc = gpio_request(ATMEL_TS_GPIO_IRQ, "atmel_maxtouch_gpio");
3023 if (rc) {
3024 pr_err("%s: unable to request gpio %d\n",
3025 __func__, ATMEL_TS_GPIO_IRQ);
3026 goto ts_gpio_tlmm_unconfig;
3027 }
3028
3029 rc = gpio_direction_input(ATMEL_TS_GPIO_IRQ);
3030 if (rc < 0) {
3031 pr_err("%s: unable to set the direction of gpio %d\n",
3032 __func__, ATMEL_TS_GPIO_IRQ);
3033 goto free_ts_gpio;
3034 }
3035 return 0;
3036
3037free_ts_gpio:
3038 gpio_free(ATMEL_TS_GPIO_IRQ);
3039ts_gpio_tlmm_unconfig:
3040 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3041 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3042 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3043vreg_put_s3:
3044 vreg_put(vreg_s3);
3045vreg_put_l2:
3046 vreg_put(vreg_l12);
3047 return rc;
3048}
3049
3050static int atmel_ts_platform_exit(struct i2c_client *client)
3051{
3052 gpio_free(ATMEL_TS_GPIO_IRQ);
3053 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3054 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3055 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3056 vreg_disable(vreg_s3);
3057 vreg_put(vreg_s3);
3058 vreg_disable(vreg_l12);
3059 vreg_put(vreg_l12);
3060 return 0;
3061}
3062
3063static u8 atmel_ts_read_chg(void)
3064{
3065 return gpio_get_value(ATMEL_TS_GPIO_IRQ);
3066}
3067
3068static u8 atmel_ts_valid_interrupt(void)
3069{
3070 return !atmel_ts_read_chg();
3071}
3072
3073#define ATMEL_X_OFFSET 13
3074#define ATMEL_Y_OFFSET 0
3075
3076static struct mxt_platform_data atmel_ts_pdata = {
3077 .numtouch = 4,
3078 .init_platform_hw = atmel_ts_platform_init,
3079 .exit_platform_hw = atmel_ts_platform_exit,
3080 .power_on = atmel_ts_power_on,
3081 .display_res_x = 480,
3082 .display_res_y = 864,
3083 .min_x = ATMEL_X_OFFSET,
3084 .max_x = (505 - ATMEL_X_OFFSET),
3085 .min_y = ATMEL_Y_OFFSET,
3086 .max_y = (863 - ATMEL_Y_OFFSET),
3087 .valid_interrupt = atmel_ts_valid_interrupt,
3088 .read_chg = atmel_ts_read_chg,
3089};
3090
3091static struct i2c_board_info atmel_ts_i2c_info[] __initdata = {
3092 {
3093 I2C_BOARD_INFO(ATMEL_TS_I2C_NAME, 0x4a),
3094 .platform_data = &atmel_ts_pdata,
3095 .irq = MSM_GPIO_TO_INT(ATMEL_TS_GPIO_IRQ),
3096 },
3097};
3098
3099#define KP_INDEX(row, col) ((row)*ARRAY_SIZE(kp_col_gpios) + (col))
3100
3101static unsigned int kp_row_gpios[] = {31, 32, 33, 34, 35};
3102static unsigned int kp_col_gpios[] = {36, 37, 38, 39, 40};
3103
3104static const unsigned short keymap[ARRAY_SIZE(kp_col_gpios) *
3105 ARRAY_SIZE(kp_row_gpios)] = {
3106 [KP_INDEX(0, 0)] = KEY_7,
3107 [KP_INDEX(0, 1)] = KEY_DOWN,
3108 [KP_INDEX(0, 2)] = KEY_UP,
3109 [KP_INDEX(0, 3)] = KEY_RIGHT,
3110 [KP_INDEX(0, 4)] = KEY_ENTER,
3111
3112 [KP_INDEX(1, 0)] = KEY_LEFT,
3113 [KP_INDEX(1, 1)] = KEY_SEND,
3114 [KP_INDEX(1, 2)] = KEY_1,
3115 [KP_INDEX(1, 3)] = KEY_4,
3116 [KP_INDEX(1, 4)] = KEY_CLEAR,
3117
3118 [KP_INDEX(2, 0)] = KEY_6,
3119 [KP_INDEX(2, 1)] = KEY_5,
3120 [KP_INDEX(2, 2)] = KEY_8,
3121 [KP_INDEX(2, 3)] = KEY_3,
3122 [KP_INDEX(2, 4)] = KEY_NUMERIC_STAR,
3123
3124 [KP_INDEX(3, 0)] = KEY_9,
3125 [KP_INDEX(3, 1)] = KEY_NUMERIC_POUND,
3126 [KP_INDEX(3, 2)] = KEY_0,
3127 [KP_INDEX(3, 3)] = KEY_2,
3128 [KP_INDEX(3, 4)] = KEY_SLEEP,
3129
3130 [KP_INDEX(4, 0)] = KEY_BACK,
3131 [KP_INDEX(4, 1)] = KEY_HOME,
3132 [KP_INDEX(4, 2)] = KEY_MENU,
3133 [KP_INDEX(4, 3)] = KEY_VOLUMEUP,
3134 [KP_INDEX(4, 4)] = KEY_VOLUMEDOWN,
3135};
3136
3137/* SURF keypad platform device information */
3138static struct gpio_event_matrix_info kp_matrix_info = {
3139 .info.func = gpio_event_matrix_func,
3140 .keymap = keymap,
3141 .output_gpios = kp_row_gpios,
3142 .input_gpios = kp_col_gpios,
3143 .noutputs = ARRAY_SIZE(kp_row_gpios),
3144 .ninputs = ARRAY_SIZE(kp_col_gpios),
3145 .settle_time.tv_nsec = 40 * NSEC_PER_USEC,
3146 .poll_time.tv_nsec = 20 * NSEC_PER_MSEC,
3147 .flags = GPIOKPF_LEVEL_TRIGGERED_IRQ | GPIOKPF_DRIVE_INACTIVE |
3148 GPIOKPF_PRINT_UNMAPPED_KEYS,
3149};
3150
3151static struct gpio_event_info *kp_info[] = {
3152 &kp_matrix_info.info
3153};
3154
3155static struct gpio_event_platform_data kp_pdata = {
3156 .name = "7x27a_kp",
3157 .info = kp_info,
3158 .info_count = ARRAY_SIZE(kp_info)
3159};
3160
3161static struct platform_device kp_pdev = {
3162 .name = GPIO_EVENT_DEV_NAME,
3163 .id = -1,
3164 .dev = {
3165 .platform_data = &kp_pdata,
3166 },
3167};
3168
3169static struct msm_handset_platform_data hs_platform_data = {
3170 .hs_name = "7k_handset",
3171 .pwr_key_delay_ms = 500, /* 0 will disable end key */
3172};
3173
3174static struct platform_device hs_pdev = {
3175 .name = "msm-handset",
3176 .id = -1,
3177 .dev = {
3178 .platform_data = &hs_platform_data,
3179 },
3180};
3181
Justin Pauporeb3a33b72011-08-23 15:30:32 -07003182static struct platform_device msm_proccomm_regulator_dev = {
3183 .name = PROCCOMM_REGULATOR_DEV_NAME,
3184 .id = -1,
3185 .dev = {
3186 .platform_data = &msm7x27a_proccomm_regulator_data
3187 }
3188};
3189
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003190#define LED_GPIO_PDM 96
3191#define UART1DM_RX_GPIO 45
Santosh Sajjanb479f0f2011-08-18 21:00:44 +05303192
3193#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
3194static int __init msm7x27a_init_ar6000pm(void)
3195{
3196 return platform_device_register(&msm_wlan_ar6000_pm_device);
3197}
3198#else
3199static int __init msm7x27a_init_ar6000pm(void) { return 0; }
3200#endif
3201
Justin Pauporeb3a33b72011-08-23 15:30:32 -07003202static void __init msm7x27a_init_regulators(void)
3203{
3204 int rc = platform_device_register(&msm_proccomm_regulator_dev);
3205 if (rc)
3206 pr_err("%s: could not register regulator device: %d\n",
3207 __func__, rc);
3208}
3209
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003210static void __init msm7x2x_init(void)
3211{
Trilok Sonia416c492011-07-22 20:20:23 +05303212 msm7x2x_misc_init();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003213
Justin Pauporeb3a33b72011-08-23 15:30:32 -07003214 /* Initialize regulators first so that other devices can use them */
3215 msm7x27a_init_regulators();
3216
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003217 /* Common functions for SURF/FFA/RUMI3 */
3218 msm_device_i2c_init();
Santosh Sajjanb479f0f2011-08-18 21:00:44 +05303219 /* Ensure ar6000pm device is registered before MMC/SDC */
3220 msm7x27a_init_ar6000pm();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003221 msm7x27a_init_mmc();
3222 msm7x27a_init_ebi2();
3223 msm7x27a_cfg_uart2dm_serial();
3224#ifdef CONFIG_SERIAL_MSM_HS
3225 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
3226 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
3227#endif
3228
3229 if (machine_is_msm7x27a_rumi3()) {
3230 platform_add_devices(rumi_sim_devices,
3231 ARRAY_SIZE(rumi_sim_devices));
3232 }
3233 if (machine_is_msm7x27a_surf() || machine_is_msm7x27a_ffa()) {
3234#ifdef CONFIG_USB_MSM_OTG_72K
3235 msm_otg_pdata.swfi_latency =
3236 msm7x27a_pm_data
3237 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
3238 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3239#endif
3240 msm_device_gadget_peripheral.dev.platform_data =
3241 &msm_gadget_pdata;
3242 msm7x27a_cfg_smsc911x();
3243 platform_add_devices(msm_footswitch_devices,
3244 msm_num_footswitch_devices);
3245 platform_add_devices(surf_ffa_devices,
3246 ARRAY_SIZE(surf_ffa_devices));
3247 msm_fb_add_devices();
3248#ifdef CONFIG_USB_EHCI_MSM_72K
3249 msm7x2x_init_host();
3250#endif
3251 }
3252
3253 msm_pm_set_platform_data(msm7x27a_pm_data,
3254 ARRAY_SIZE(msm7x27a_pm_data));
3255
3256#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
3257 register_i2c_devices();
3258#endif
3259#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
3260 bt_power_init();
3261#endif
3262 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
3263 atmel_ts_pdata.min_x = 0;
3264 atmel_ts_pdata.max_x = 480;
3265 atmel_ts_pdata.min_y = 0;
3266 atmel_ts_pdata.max_y = 320;
3267 }
3268
3269 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
3270 atmel_ts_i2c_info,
3271 ARRAY_SIZE(atmel_ts_i2c_info));
3272
3273 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
3274 i2c_camera_devices,
3275 ARRAY_SIZE(i2c_camera_devices));
3276 platform_device_register(&kp_pdev);
3277 platform_device_register(&hs_pdev);
3278
3279 /* configure it as a pdm function*/
3280 if (gpio_tlmm_config(GPIO_CFG(LED_GPIO_PDM, 3,
3281 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
3282 GPIO_CFG_8MA), GPIO_CFG_ENABLE))
3283 pr_err("%s: gpio_tlmm_config for %d failed\n",
3284 __func__, LED_GPIO_PDM);
3285 else
3286 platform_device_register(&led_pdev);
3287
3288#ifdef CONFIG_MSM_RPC_VIBRATOR
3289 if (machine_is_msm7x27a_ffa())
3290 msm_init_pmic_vibrator();
3291#endif
3292 /*7x25a kgsl initializations*/
3293 msm7x25a_kgsl_3d0_init();
3294}
3295
3296static void __init msm7x2x_init_early(void)
3297{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003298 msm_msm7x2x_allocate_memory_regions();
3299}
3300
3301MACHINE_START(MSM7X27A_RUMI3, "QCT MSM7x27a RUMI3")
3302 .boot_params = PHYS_OFFSET + 0x100,
3303 .map_io = msm_common_io_init,
3304 .reserve = msm7x27a_reserve,
3305 .init_irq = msm_init_irq,
3306 .init_machine = msm7x2x_init,
3307 .timer = &msm_timer,
3308 .init_early = msm7x2x_init_early,
3309MACHINE_END
3310MACHINE_START(MSM7X27A_SURF, "QCT MSM7x27a SURF")
3311 .boot_params = PHYS_OFFSET + 0x100,
3312 .map_io = msm_common_io_init,
3313 .reserve = msm7x27a_reserve,
3314 .init_irq = msm_init_irq,
3315 .init_machine = msm7x2x_init,
3316 .timer = &msm_timer,
3317 .init_early = msm7x2x_init_early,
3318MACHINE_END
3319MACHINE_START(MSM7X27A_FFA, "QCT MSM7x27a FFA")
3320 .boot_params = PHYS_OFFSET + 0x100,
3321 .map_io = msm_common_io_init,
3322 .reserve = msm7x27a_reserve,
3323 .init_irq = msm_init_irq,
3324 .init_machine = msm7x2x_init,
3325 .timer = &msm_timer,
3326 .init_early = msm7x2x_init_early,
3327MACHINE_END