blob: 320ac8bc178dceaac86a266dd7b6f65c16051c3f [file] [log] [blame]
Kiran Kumar H Ndd128472011-12-01 09:35:34 -08001/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070013#ifndef __LINUX_MSM_CAMERA_H
14#define __LINUX_MSM_CAMERA_H
15
16#ifdef MSM_CAMERA_BIONIC
17#include <sys/types.h>
18#endif
19#include <linux/types.h>
20#include <linux/ioctl.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070021#ifdef __KERNEL__
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/cdev.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070023#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#ifdef MSM_CAMERA_GCC
25#include <time.h>
26#else
27#include <linux/time.h>
28#endif
29
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -070030#include <linux/ion.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070031
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070032#define MSM_CAM_IOCTL_MAGIC 'm'
33
34#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
35 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
36
37#define MSM_CAM_IOCTL_REGISTER_PMEM \
38 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
39
40#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
41 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
42
43#define MSM_CAM_IOCTL_CTRL_COMMAND \
44 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
45
46#define MSM_CAM_IOCTL_CONFIG_VFE \
47 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
48
49#define MSM_CAM_IOCTL_GET_STATS \
50 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
51
52#define MSM_CAM_IOCTL_GETFRAME \
53 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
54
55#define MSM_CAM_IOCTL_ENABLE_VFE \
56 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
57
58#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
59 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
60
61#define MSM_CAM_IOCTL_CONFIG_CMD \
62 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
63
64#define MSM_CAM_IOCTL_DISABLE_VFE \
65 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
66
67#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
68 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
69
70#define MSM_CAM_IOCTL_VFE_APPS_RESET \
71 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
72
73#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
74 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
75
76#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
77 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
78
79#define MSM_CAM_IOCTL_AXI_CONFIG \
80 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
81
82#define MSM_CAM_IOCTL_GET_PICTURE \
83 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
84
85#define MSM_CAM_IOCTL_SET_CROP \
86 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
87
88#define MSM_CAM_IOCTL_PICT_PP \
89 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
90
91#define MSM_CAM_IOCTL_PICT_PP_DONE \
92 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
93
94#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
95 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
96
97#define MSM_CAM_IOCTL_FLASH_LED_CFG \
98 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
99
100#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
101 _IO(MSM_CAM_IOCTL_MAGIC, 23)
102
103#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
104 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
105
106#define MSM_CAM_IOCTL_AF_CTRL \
107 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
108
109#define MSM_CAM_IOCTL_AF_CTRL_DONE \
110 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
111
112#define MSM_CAM_IOCTL_CONFIG_VPE \
113 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
114
115#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
116 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
117
118#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
119 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
120
121#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
122 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
123
124#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
125 _IO(MSM_CAM_IOCTL_MAGIC, 31)
126
127#define MSM_CAM_IOCTL_FLASH_CTRL \
128 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
129
130#define MSM_CAM_IOCTL_ERROR_CONFIG \
131 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
132
133#define MSM_CAM_IOCTL_ABORT_CAPTURE \
134 _IO(MSM_CAM_IOCTL_MAGIC, 34)
135
136#define MSM_CAM_IOCTL_SET_FD_ROI \
137 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
138
139#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
140 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
141
142#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
143 _IO(MSM_CAM_IOCTL_MAGIC, 37)
144
145#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
146 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
147
148#define MSM_CAM_IOCTL_PUT_ST_FRAME \
149 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
150
Mansoor Aftab5d418372011-07-26 17:01:26 -0700151#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
Kevin Chan94b4c832012-03-02 21:27:16 -0800152 _IOR(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event *)
Mansoor Aftab5d418372011-07-26 17:01:26 -0700153
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700154#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800155 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *)
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700156
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700157#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
Kevin Chan94b4c832012-03-02 21:27:16 -0800158 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *)
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700159
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700160#define MSM_CAM_IOCTL_MCTL_POST_PROC \
Kevin Chan94b4c832012-03-02 21:27:16 -0800161 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700162
163#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800164 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700165
166#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800167 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700168
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800169#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800170 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *)
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800171
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800172#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800173 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800174
175#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800176 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800177
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800178#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800179 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *)
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800180
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800181#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800182 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800183
184#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800185 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800186
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800187#define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800188 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *)
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800189
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700190#define MSM_CAM_IOCTL_EEPROM_IO_CFG \
191 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *)
192
Nishant Panditb2157c92012-04-25 01:09:28 +0530193#define MSM_CAM_IOCTL_ISPIF_IO_CFG \
194 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *)
195
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700196struct msm_mctl_pp_cmd {
197 int32_t id;
198 uint16_t length;
199 void *value;
200};
201
202struct msm_mctl_post_proc_cmd {
203 int32_t type;
204 struct msm_mctl_pp_cmd cmd;
205};
206
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700207#define MSM_CAMERA_LED_OFF 0
208#define MSM_CAMERA_LED_LOW 1
209#define MSM_CAMERA_LED_HIGH 2
Nishant Pandit474f2252011-07-23 23:17:56 +0530210#define MSM_CAMERA_LED_INIT 3
211#define MSM_CAMERA_LED_RELEASE 4
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700212
213#define MSM_CAMERA_STROBE_FLASH_NONE 0
214#define MSM_CAMERA_STROBE_FLASH_XENON 1
215
216#define MSM_MAX_CAMERA_SENSORS 5
217#define MAX_SENSOR_NAME 32
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800218#define MAX_CAM_NAME_SIZE 32
219#define MAX_ACT_MOD_NAME_SIZE 32
220#define MAX_ACT_NAME_SIZE 32
221#define NUM_ACTUATOR_DIR 2
222#define MAX_ACTUATOR_SCENARIO 8
223#define MAX_ACTUATOR_REGION 5
224#define MAX_ACTUATOR_INIT_SET 12
225#define MAX_ACTUATOR_TYPE_SIZE 32
226#define MAX_ACTUATOR_REG_TBL_SIZE 8
227
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700228
229#define MSM_MAX_CAMERA_CONFIGS 2
230
231#define PP_SNAP 0x01
232#define PP_RAW_SNAP ((0x01)<<1)
233#define PP_PREV ((0x01)<<2)
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800234#define PP_THUMB ((0x01)<<3)
235#define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700236
237#define MSM_CAM_CTRL_CMD_DONE 0
238#define MSM_CAM_SENSOR_VFE_CMD 1
239
Kiran Kumar H Nceea7622011-08-23 14:01:03 -0700240/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
241#define MAX_PLANES 8
242
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700243/*****************************************************
244 * structure
245 *****************************************************/
246
247/* define five type of structures for userspace <==> kernel
248 * space communication:
249 * command 1 - 2 are from userspace ==> kernel
250 * command 3 - 4 are from kernel ==> userspace
251 *
252 * 1. control command: control command(from control thread),
253 * control status (from config thread);
254 */
255struct msm_ctrl_cmd {
256 uint16_t type;
257 uint16_t length;
258 void *value;
259 uint16_t status;
260 uint32_t timeout_ms;
261 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
262 int vnode_id; /* video dev id. Can we overload resp_fd? */
Kevin Chan94b4c832012-03-02 21:27:16 -0800263 int queue_idx;
264 uint32_t evt_id;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700265 uint32_t stream_type; /* used to pass value to qcamera server */
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -0700266 int config_ident; /*used as identifier for config node*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700267};
268
269struct msm_cam_evt_msg {
270 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */
271 unsigned short msg_id;
272 unsigned int len; /* size in, number of bytes out */
273 uint32_t frame_id;
274 void *data;
Ninad Mahimkaree55c192012-04-25 14:36:17 -0700275 struct timespec timestamp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700276};
277
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700278struct msm_pp_frame_sp {
279 /* phy addr of the buffer */
280 unsigned long phy_addr;
281 uint32_t y_off;
282 uint32_t cbcr_off;
283 /* buffer length */
284 uint32_t length;
285 int32_t fd;
286 uint32_t addr_offset;
287 /* mapped addr */
288 unsigned long vaddr;
289};
290
291struct msm_pp_frame_mp {
292 /* phy addr of the plane */
293 unsigned long phy_addr;
294 /* offset of plane data */
295 uint32_t data_offset;
296 /* plane length */
297 uint32_t length;
298 int32_t fd;
299 uint32_t addr_offset;
300 /* mapped addr */
301 unsigned long vaddr;
302};
303
304struct msm_pp_frame {
305 uint32_t handle; /* stores vb cookie */
306 uint32_t frame_id;
Kevin Chan318d7cb2011-11-29 14:24:26 -0800307 unsigned short buf_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700308 int path;
309 unsigned short image_type;
310 unsigned short num_planes; /* 1 for sp */
311 struct timeval timestamp;
312 union {
313 struct msm_pp_frame_sp sp;
314 struct msm_pp_frame_mp mp[MAX_PLANES];
315 };
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800316 int node_type;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700317};
318
Mingcheng Zhu49505502011-07-19 20:44:36 -0700319struct msm_cam_evt_divert_frame {
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700320 unsigned short image_mode;
321 unsigned short op_mode;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700322 unsigned short inst_idx;
323 unsigned short node_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700324 struct msm_pp_frame frame;
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700325 int do_pp;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700326};
327
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700328struct msm_mctl_pp_cmd_ack_event {
329 uint32_t cmd; /* VPE_CMD_ZOOM? */
330 int status; /* 0 done, < 0 err */
331 uint32_t cookie; /* daemon's cookie */
332};
333
334struct msm_mctl_pp_event_info {
335 int32_t event;
336 union {
337 struct msm_mctl_pp_cmd_ack_event ack;
338 };
339};
340
341struct msm_isp_event_ctrl {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700342 unsigned short resptype;
343 union {
344 struct msm_cam_evt_msg isp_msg;
345 struct msm_ctrl_cmd ctrl;
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700346 struct msm_cam_evt_divert_frame div_frame;
347 struct msm_mctl_pp_event_info pp_event_info;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700348 } isp_data;
349};
350
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700351#define MSM_CAM_RESP_CTRL 0
352#define MSM_CAM_RESP_STAT_EVT_MSG 1
353#define MSM_CAM_RESP_STEREO_OP_1 2
354#define MSM_CAM_RESP_STEREO_OP_2 3
355#define MSM_CAM_RESP_V4L2 4
Mingcheng Zhu49505502011-07-19 20:44:36 -0700356#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700357#define MSM_CAM_RESP_DONE_EVENT 6
358#define MSM_CAM_RESP_MCTL_PP_EVENT 7
359#define MSM_CAM_RESP_MAX 8
Mingcheng Zhu49505502011-07-19 20:44:36 -0700360
Mingcheng Zhu270813a2011-08-10 17:23:18 -0700361#define MSM_CAM_APP_NOTIFY_EVENT 0
Kevin Chan4bb6ead2012-02-29 01:01:41 -0800362#define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700363
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700364/* this one is used to send ctrl/status up to config thread */
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700365
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700366struct msm_stats_event_ctrl {
367 /* 0 - ctrl_cmd from control thread,
368 * 1 - stats/event kernel,
369 * 2 - V4L control or read request */
370 int resptype;
371 int timeout_ms;
372 struct msm_ctrl_cmd ctrl_cmd;
373 /* struct vfe_event_t stats_event; */
374 struct msm_cam_evt_msg stats_event;
375};
376
377/* 2. config command: config command(from config thread); */
378struct msm_camera_cfg_cmd {
379 /* what to config:
380 * 1 - sensor config, 2 - vfe config */
381 uint16_t cfg_type;
382
383 /* sensor config type */
384 uint16_t cmd_type;
385 uint16_t queue;
386 uint16_t length;
387 void *value;
388};
389
390#define CMD_GENERAL 0
391#define CMD_AXI_CFG_OUT1 1
392#define CMD_AXI_CFG_SNAP_O1_AND_O2 2
393#define CMD_AXI_CFG_OUT2 3
394#define CMD_PICT_T_AXI_CFG 4
395#define CMD_PICT_M_AXI_CFG 5
396#define CMD_RAW_PICT_AXI_CFG 6
397
398#define CMD_FRAME_BUF_RELEASE 7
399#define CMD_PREV_BUF_CFG 8
400#define CMD_SNAP_BUF_RELEASE 9
401#define CMD_SNAP_BUF_CFG 10
402#define CMD_STATS_DISABLE 11
403#define CMD_STATS_AEC_AWB_ENABLE 12
404#define CMD_STATS_AF_ENABLE 13
405#define CMD_STATS_AEC_ENABLE 14
406#define CMD_STATS_AWB_ENABLE 15
407#define CMD_STATS_ENABLE 16
408
409#define CMD_STATS_AXI_CFG 17
410#define CMD_STATS_AEC_AXI_CFG 18
411#define CMD_STATS_AF_AXI_CFG 19
412#define CMD_STATS_AWB_AXI_CFG 20
413#define CMD_STATS_RS_AXI_CFG 21
414#define CMD_STATS_CS_AXI_CFG 22
415#define CMD_STATS_IHIST_AXI_CFG 23
416#define CMD_STATS_SKIN_AXI_CFG 24
417
418#define CMD_STATS_BUF_RELEASE 25
419#define CMD_STATS_AEC_BUF_RELEASE 26
420#define CMD_STATS_AF_BUF_RELEASE 27
421#define CMD_STATS_AWB_BUF_RELEASE 28
422#define CMD_STATS_RS_BUF_RELEASE 29
423#define CMD_STATS_CS_BUF_RELEASE 30
424#define CMD_STATS_IHIST_BUF_RELEASE 31
425#define CMD_STATS_SKIN_BUF_RELEASE 32
426
427#define UPDATE_STATS_INVALID 33
428#define CMD_AXI_CFG_SNAP_GEMINI 34
429#define CMD_AXI_CFG_SNAP 35
430#define CMD_AXI_CFG_PREVIEW 36
431#define CMD_AXI_CFG_VIDEO 37
432
433#define CMD_STATS_IHIST_ENABLE 38
434#define CMD_STATS_RS_ENABLE 39
435#define CMD_STATS_CS_ENABLE 40
436#define CMD_VPE 41
437#define CMD_AXI_CFG_VPE 42
438#define CMD_AXI_CFG_ZSL 43
439#define CMD_AXI_CFG_SNAP_VPE 44
440#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530441#define CMD_CONFIG_PING_ADDR 46
442#define CMD_CONFIG_PONG_ADDR 47
443#define CMD_CONFIG_FREE_BUF_ADDR 48
444#define CMD_AXI_CFG_ZSL_ALL_CHNLS 49
445#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50
Suresh Vankadara055cb8e2012-01-18 00:50:04 +0530446#define CMD_VFE_BUFFER_RELEASE 51
Kevin Chancf264862012-04-19 19:10:38 -0700447#define CMD_VFE_PROCESS_IRQ 52
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700448
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800449#define CMD_AXI_CFG_PRIM 0xF1
450#define CMD_AXI_CFG_PRIM_ALL_CHNLS 0xF2
451#define CMD_AXI_CFG_SEC 0xF4
452#define CMD_AXI_CFG_SEC_ALL_CHNLS 0xF8
453
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700454#define CMD_AXI_START 0xE1
455#define CMD_AXI_STOP 0xE2
456
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700457/* vfe config command: config command(from config thread)*/
458struct msm_vfe_cfg_cmd {
459 int cmd_type;
460 uint16_t length;
461 void *value;
462};
463
464struct msm_vpe_cfg_cmd {
465 int cmd_type;
466 uint16_t length;
467 void *value;
468};
469
470#define MAX_CAMERA_ENABLE_NAME_LEN 32
471struct camera_enable_cmd {
472 char name[MAX_CAMERA_ENABLE_NAME_LEN];
473};
474
475#define MSM_PMEM_OUTPUT1 0
476#define MSM_PMEM_OUTPUT2 1
477#define MSM_PMEM_OUTPUT1_OUTPUT2 2
478#define MSM_PMEM_THUMBNAIL 3
479#define MSM_PMEM_MAINIMG 4
480#define MSM_PMEM_RAW_MAINIMG 5
481#define MSM_PMEM_AEC_AWB 6
482#define MSM_PMEM_AF 7
483#define MSM_PMEM_AEC 8
484#define MSM_PMEM_AWB 9
485#define MSM_PMEM_RS 10
486#define MSM_PMEM_CS 11
487#define MSM_PMEM_IHIST 12
488#define MSM_PMEM_SKIN 13
489#define MSM_PMEM_VIDEO 14
490#define MSM_PMEM_PREVIEW 15
491#define MSM_PMEM_VIDEO_VPE 16
492#define MSM_PMEM_C2D 17
493#define MSM_PMEM_MAINIMG_VPE 18
494#define MSM_PMEM_THUMBNAIL_VPE 19
495#define MSM_PMEM_MAX 20
496
497#define STAT_AEAW 0
498#define STAT_AEC 1
499#define STAT_AF 2
500#define STAT_AWB 3
501#define STAT_RS 4
502#define STAT_CS 5
503#define STAT_IHIST 6
504#define STAT_SKIN 7
505#define STAT_MAX 8
506
507#define FRAME_PREVIEW_OUTPUT1 0
508#define FRAME_PREVIEW_OUTPUT2 1
509#define FRAME_SNAPSHOT 2
510#define FRAME_THUMBNAIL 3
511#define FRAME_RAW_SNAPSHOT 4
512#define FRAME_MAX 5
513
514struct msm_pmem_info {
515 int type;
516 int fd;
517 void *vaddr;
518 uint32_t offset;
519 uint32_t len;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700520 uint32_t y_off;
521 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530522 uint32_t planar0_off;
523 uint32_t planar1_off;
524 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700525 uint8_t active;
526};
527
528struct outputCfg {
529 uint32_t height;
530 uint32_t width;
531
532 uint32_t window_height_firstline;
533 uint32_t window_height_lastline;
534};
535
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800536#define VIDEO_NODE 0
537#define MCTL_NODE 1
538
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700539#define OUTPUT_1 0
540#define OUTPUT_2 1
541#define OUTPUT_1_AND_2 2 /* snapshot only */
542#define OUTPUT_1_AND_3 3 /* video */
543#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
544#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
545#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
546#define OUTPUT_1_2_AND_3 7
Kiran Kumar H N4cff94a2011-10-17 11:37:33 -0700547#define OUTPUT_ALL_CHNLS 8
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530548#define OUTPUT_VIDEO_ALL_CHNLS 9
549#define OUTPUT_ZSL_ALL_CHNLS 10
550#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700551
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800552#define OUTPUT_PRIM 0xF1
553#define OUTPUT_PRIM_ALL_CHNLS 0xF2
554#define OUTPUT_SEC 0xF4
555#define OUTPUT_SEC_ALL_CHNLS 0xF8
556
557
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700558#define MSM_FRAME_PREV_1 0
559#define MSM_FRAME_PREV_2 1
560#define MSM_FRAME_ENC 2
561
562#define OUTPUT_TYPE_P (1<<0)
563#define OUTPUT_TYPE_T (1<<1)
564#define OUTPUT_TYPE_S (1<<2)
565#define OUTPUT_TYPE_V (1<<3)
566#define OUTPUT_TYPE_L (1<<4)
567#define OUTPUT_TYPE_ST_L (1<<5)
568#define OUTPUT_TYPE_ST_R (1<<6)
569#define OUTPUT_TYPE_ST_D (1<<7)
570
571struct fd_roi_info {
572 void *info;
573 int info_len;
574};
575
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700576struct msm_mem_map_info {
577 uint32_t cookie;
578 uint32_t length;
Mingcheng Zhufe7abc02011-08-09 13:27:39 -0700579 uint32_t mem_type;
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700580};
581
Mingcheng Zhu49505502011-07-19 20:44:36 -0700582#define MSM_MEM_MMAP 0
583#define MSM_MEM_USERPTR 1
584#define MSM_PLANE_MAX 8
585#define MSM_PLANE_Y 0
586#define MSM_PLANE_UV 1
587
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700588struct msm_frame {
589 struct timespec ts;
590 int path;
591 int type;
592 unsigned long buffer;
593 uint32_t phy_offset;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700594 uint32_t y_off;
595 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530596 uint32_t planar0_off;
597 uint32_t planar1_off;
598 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700599 int fd;
600
601 void *cropinfo;
602 int croplen;
603 uint32_t error_code;
604 struct fd_roi_info roi_info;
605 uint32_t frame_id;
606 int stcam_quality_ind;
607 uint32_t stcam_conv_value;
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -0700608
609 struct ion_allocation_data ion_alloc;
610 struct ion_fd_data fd_data;
Ankit Premrajkae2c9c0b2012-06-07 17:18:25 -0700611 int ion_dev_fd;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700612};
613
614enum msm_st_frame_packing {
615 SIDE_BY_SIDE_HALF,
616 SIDE_BY_SIDE_FULL,
617 TOP_DOWN_HALF,
618 TOP_DOWN_FULL,
619};
620
621struct msm_st_crop {
622 uint32_t in_w;
623 uint32_t in_h;
624 uint32_t out_w;
625 uint32_t out_h;
626};
627
628struct msm_st_half {
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530629 uint32_t buf_p0_off;
630 uint32_t buf_p1_off;
631 uint32_t buf_p0_stride;
632 uint32_t buf_p1_stride;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700633 uint32_t pix_x_off;
634 uint32_t pix_y_off;
635 struct msm_st_crop stCropInfo;
636};
637
638struct msm_st_frame {
639 struct msm_frame buf_info;
640 int type;
641 enum msm_st_frame_packing packing;
642 struct msm_st_half L;
643 struct msm_st_half R;
644 int frame_id;
645};
646
647#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
648
649struct stats_buff {
650 unsigned long buff;
651 int fd;
652};
653
654struct msm_stats_buf {
Lakshmi Narayana Kalavala4ab97a92011-07-26 15:30:14 -0700655 uint8_t awb_ymin;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700656 struct stats_buff aec;
657 struct stats_buff awb;
658 struct stats_buff af;
659 struct stats_buff ihist;
660 struct stats_buff rs;
661 struct stats_buff cs;
662 struct stats_buff skin;
663 int type;
664 uint32_t status_bits;
665 unsigned long buffer;
666 int fd;
Ankit Premrajka073e0ca2012-03-06 12:26:08 -0800667 int length;
668 struct ion_handle *handle;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700669 uint32_t frame_id;
670};
671#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
672/* video capture mode in VIDIOC_S_PARM */
673#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
674 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
675/* extendedmode for video recording in VIDIOC_S_PARM */
676#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
677 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
678/* extendedmode for the full size main image in VIDIOC_S_PARM */
679#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
680/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
681#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
682 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
683#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
684 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
685#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
686
687
688#define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE
689#define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1)
690#define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2)
691#define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3)
692#define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4)
693#define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5)
694#define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6)
695#define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7)
696#define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8)
697#define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9)
698#define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10)
699#define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11)
700#define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12)
701#define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13)
702#define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700703#define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15)
704#define MSM_V4L2_PID_MMAP_ENTRY (V4L2_CID_PRIVATE_BASE+16)
705#define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800706#define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18)
707#define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700708
709/* camera operation mode for video recording - two frame output queues */
710#define MSM_V4L2_CAM_OP_DEFAULT 0
711/* camera operation mode for video recording - two frame output queues */
712#define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1)
713/* camera operation mode for video recording - two frame output queues */
714#define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2)
715/* camera operation mode for standard shapshot - two frame output queues */
716#define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3)
717/* camera operation mode for zsl shapshot - three output queues */
718#define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4)
719/* camera operation mode for raw snapshot - one frame output queue */
720#define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5)
Jignesh Mehta6cf8a742012-02-04 23:40:50 -0800721/* camera operation mode for jpeg snapshot - one frame output queue */
722#define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6)
723
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700724
725#define MSM_V4L2_VID_CAP_TYPE 0
726#define MSM_V4L2_STREAM_ON 1
727#define MSM_V4L2_STREAM_OFF 2
728#define MSM_V4L2_SNAPSHOT 3
729#define MSM_V4L2_QUERY_CTRL 4
730#define MSM_V4L2_GET_CTRL 5
731#define MSM_V4L2_SET_CTRL 6
732#define MSM_V4L2_QUERY 7
733#define MSM_V4L2_GET_CROP 8
734#define MSM_V4L2_SET_CROP 9
735#define MSM_V4L2_OPEN 10
736#define MSM_V4L2_CLOSE 11
737#define MSM_V4L2_SET_CTRL_CMD 12
738#define MSM_V4L2_EVT_SUB_MASK 13
739#define MSM_V4L2_MAX 14
740#define V4L2_CAMERA_EXIT 43
741
742struct crop_info {
743 void *info;
744 int len;
745};
746
747struct msm_postproc {
748 int ftnum;
749 struct msm_frame fthumnail;
750 int fmnum;
751 struct msm_frame fmain;
752};
753
754struct msm_snapshot_pp_status {
755 void *status;
756};
757
758#define CFG_SET_MODE 0
759#define CFG_SET_EFFECT 1
760#define CFG_START 2
761#define CFG_PWR_UP 3
762#define CFG_PWR_DOWN 4
763#define CFG_WRITE_EXPOSURE_GAIN 5
764#define CFG_SET_DEFAULT_FOCUS 6
765#define CFG_MOVE_FOCUS 7
766#define CFG_REGISTER_TO_REAL_GAIN 8
767#define CFG_REAL_TO_REGISTER_GAIN 9
768#define CFG_SET_FPS 10
769#define CFG_SET_PICT_FPS 11
770#define CFG_SET_BRIGHTNESS 12
771#define CFG_SET_CONTRAST 13
772#define CFG_SET_ZOOM 14
773#define CFG_SET_EXPOSURE_MODE 15
774#define CFG_SET_WB 16
775#define CFG_SET_ANTIBANDING 17
776#define CFG_SET_EXP_GAIN 18
777#define CFG_SET_PICT_EXP_GAIN 19
778#define CFG_SET_LENS_SHADING 20
779#define CFG_GET_PICT_FPS 21
780#define CFG_GET_PREV_L_PF 22
781#define CFG_GET_PREV_P_PL 23
782#define CFG_GET_PICT_L_PF 24
783#define CFG_GET_PICT_P_PL 25
784#define CFG_GET_AF_MAX_STEPS 26
785#define CFG_GET_PICT_MAX_EXP_LC 27
786#define CFG_SEND_WB_INFO 28
787#define CFG_SENSOR_INIT 29
788#define CFG_GET_3D_CALI_DATA 30
789#define CFG_GET_CALIB_DATA 31
Kevin Chana980f392011-08-01 20:55:00 -0700790#define CFG_GET_OUTPUT_INFO 32
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700791#define CFG_GET_EEPROM_INFO 33
792#define CFG_GET_EEPROM_DATA 34
793#define CFG_SET_ACTUATOR_INFO 35
794#define CFG_GET_ACTUATOR_INFO 36
Su Liu6c3bb322012-02-14 02:15:05 +0530795/* TBD: QRD */
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700796#define CFG_SET_SATURATION 37
797#define CFG_SET_SHARPNESS 38
798#define CFG_SET_TOUCHAEC 39
799#define CFG_SET_AUTO_FOCUS 40
800#define CFG_SET_AUTOFLASH 41
801#define CFG_SET_EXPOSURE_COMPENSATION 42
802#define CFG_SET_ISO 43
Nishant Panditb2157c92012-04-25 01:09:28 +0530803#define CFG_START_STREAM 44
804#define CFG_STOP_STREAM 45
805#define CFG_GET_CSI_PARAMS 46
806#define CFG_MAX 47
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700807
808
809#define MOVE_NEAR 0
810#define MOVE_FAR 1
811
812#define SENSOR_PREVIEW_MODE 0
813#define SENSOR_SNAPSHOT_MODE 1
814#define SENSOR_RAW_SNAPSHOT_MODE 2
815#define SENSOR_HFR_60FPS_MODE 3
816#define SENSOR_HFR_90FPS_MODE 4
817#define SENSOR_HFR_120FPS_MODE 5
818
819#define SENSOR_QTR_SIZE 0
820#define SENSOR_FULL_SIZE 1
821#define SENSOR_QVGA_SIZE 2
822#define SENSOR_INVALID_SIZE 3
823
824#define CAMERA_EFFECT_OFF 0
825#define CAMERA_EFFECT_MONO 1
826#define CAMERA_EFFECT_NEGATIVE 2
827#define CAMERA_EFFECT_SOLARIZE 3
828#define CAMERA_EFFECT_SEPIA 4
829#define CAMERA_EFFECT_POSTERIZE 5
830#define CAMERA_EFFECT_WHITEBOARD 6
831#define CAMERA_EFFECT_BLACKBOARD 7
832#define CAMERA_EFFECT_AQUA 8
Yonggui Maoc0055a12011-09-29 19:31:47 -0700833#define CAMERA_EFFECT_EMBOSS 9
834#define CAMERA_EFFECT_SKETCH 10
835#define CAMERA_EFFECT_NEON 11
836#define CAMERA_EFFECT_MAX 12
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700837
Taniya Dasa9bdb012011-09-08 11:21:33 +0530838/* QRD */
839#define CAMERA_EFFECT_BW 10
840#define CAMERA_EFFECT_BLUISH 12
841#define CAMERA_EFFECT_REDDISH 13
842#define CAMERA_EFFECT_GREENISH 14
843
844/* QRD */
845#define CAMERA_ANTIBANDING_OFF 0
846#define CAMERA_ANTIBANDING_50HZ 2
847#define CAMERA_ANTIBANDING_60HZ 1
848#define CAMERA_ANTIBANDING_AUTO 3
849
850#define CAMERA_CONTRAST_LV0 0
851#define CAMERA_CONTRAST_LV1 1
852#define CAMERA_CONTRAST_LV2 2
853#define CAMERA_CONTRAST_LV3 3
854#define CAMERA_CONTRAST_LV4 4
855#define CAMERA_CONTRAST_LV5 5
856#define CAMERA_CONTRAST_LV6 6
857#define CAMERA_CONTRAST_LV7 7
858#define CAMERA_CONTRAST_LV8 8
859#define CAMERA_CONTRAST_LV9 9
860
861#define CAMERA_BRIGHTNESS_LV0 0
862#define CAMERA_BRIGHTNESS_LV1 1
863#define CAMERA_BRIGHTNESS_LV2 2
864#define CAMERA_BRIGHTNESS_LV3 3
865#define CAMERA_BRIGHTNESS_LV4 4
866#define CAMERA_BRIGHTNESS_LV5 5
867#define CAMERA_BRIGHTNESS_LV6 6
868#define CAMERA_BRIGHTNESS_LV7 7
869#define CAMERA_BRIGHTNESS_LV8 8
870
871
872#define CAMERA_SATURATION_LV0 0
873#define CAMERA_SATURATION_LV1 1
874#define CAMERA_SATURATION_LV2 2
875#define CAMERA_SATURATION_LV3 3
876#define CAMERA_SATURATION_LV4 4
877#define CAMERA_SATURATION_LV5 5
878#define CAMERA_SATURATION_LV6 6
879#define CAMERA_SATURATION_LV7 7
880#define CAMERA_SATURATION_LV8 8
881
882#define CAMERA_SHARPNESS_LV0 0
883#define CAMERA_SHARPNESS_LV1 3
884#define CAMERA_SHARPNESS_LV2 6
885#define CAMERA_SHARPNESS_LV3 9
886#define CAMERA_SHARPNESS_LV4 12
887#define CAMERA_SHARPNESS_LV5 15
888#define CAMERA_SHARPNESS_LV6 18
889#define CAMERA_SHARPNESS_LV7 21
890#define CAMERA_SHARPNESS_LV8 24
891#define CAMERA_SHARPNESS_LV9 27
892#define CAMERA_SHARPNESS_LV10 30
893
894#define CAMERA_SETAE_AVERAGE 0
895#define CAMERA_SETAE_CENWEIGHT 1
896
Taniya Dasa9bdb012011-09-08 11:21:33 +0530897#define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */
898#define CAMERA_WB_CUSTOM 2
899#define CAMERA_WB_INCANDESCENT 3
900#define CAMERA_WB_FLUORESCENT 4
901#define CAMERA_WB_DAYLIGHT 5
902#define CAMERA_WB_CLOUDY_DAYLIGHT 6
903#define CAMERA_WB_TWILIGHT 7
904#define CAMERA_WB_SHADE 8
905
906#define CAMERA_EXPOSURE_COMPENSATION_LV0 12
907#define CAMERA_EXPOSURE_COMPENSATION_LV1 6
908#define CAMERA_EXPOSURE_COMPENSATION_LV2 0
909#define CAMERA_EXPOSURE_COMPENSATION_LV3 -6
910#define CAMERA_EXPOSURE_COMPENSATION_LV4 -12
911
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800912enum msm_v4l2_saturation_level {
913 MSM_V4L2_SATURATION_L0,
914 MSM_V4L2_SATURATION_L1,
915 MSM_V4L2_SATURATION_L2,
916 MSM_V4L2_SATURATION_L3,
917 MSM_V4L2_SATURATION_L4,
918 MSM_V4L2_SATURATION_L5,
919 MSM_V4L2_SATURATION_L6,
920 MSM_V4L2_SATURATION_L7,
921 MSM_V4L2_SATURATION_L8,
922 MSM_V4L2_SATURATION_L9,
923 MSM_V4L2_SATURATION_L10,
924};
925
Suresh Vankadara212d9722012-05-30 15:51:20 +0530926enum msm_v4l2_contrast_level {
927 MSM_V4L2_CONTRAST_L0,
928 MSM_V4L2_CONTRAST_L1,
929 MSM_V4L2_CONTRAST_L2,
930 MSM_V4L2_CONTRAST_L3,
931 MSM_V4L2_CONTRAST_L4,
932 MSM_V4L2_CONTRAST_L5,
933 MSM_V4L2_CONTRAST_L6,
934 MSM_V4L2_CONTRAST_L7,
935 MSM_V4L2_CONTRAST_L8,
936 MSM_V4L2_CONTRAST_L9,
937 MSM_V4L2_CONTRAST_L10,
938};
939
940
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800941enum msm_v4l2_exposure_level {
942 MSM_V4L2_EXPOSURE_N2,
943 MSM_V4L2_EXPOSURE_N1,
944 MSM_V4L2_EXPOSURE_D,
945 MSM_V4L2_EXPOSURE_P1,
946 MSM_V4L2_EXPOSURE_P2,
947};
948
949enum msm_v4l2_sharpness_level {
950 MSM_V4L2_SHARPNESS_L0,
951 MSM_V4L2_SHARPNESS_L1,
952 MSM_V4L2_SHARPNESS_L2,
953 MSM_V4L2_SHARPNESS_L3,
954 MSM_V4L2_SHARPNESS_L4,
955 MSM_V4L2_SHARPNESS_L5,
956 MSM_V4L2_SHARPNESS_L6,
957};
958
959enum msm_v4l2_expo_metering_mode {
960 MSM_V4L2_EXP_FRAME_AVERAGE,
961 MSM_V4L2_EXP_CENTER_WEIGHTED,
962 MSM_V4L2_EXP_SPOT_METERING,
963};
964
965enum msm_v4l2_iso_mode {
966 MSM_V4L2_ISO_AUTO = 0,
967 MSM_V4L2_ISO_DEBLUR,
968 MSM_V4L2_ISO_100,
969 MSM_V4L2_ISO_200,
970 MSM_V4L2_ISO_400,
971 MSM_V4L2_ISO_800,
972 MSM_V4L2_ISO_1600,
973};
974
975enum msm_v4l2_wb_mode {
Suresh Vankadara212d9722012-05-30 15:51:20 +0530976 MSM_V4L2_WB_OFF,
977 MSM_V4L2_WB_AUTO ,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800978 MSM_V4L2_WB_CUSTOM,
979 MSM_V4L2_WB_INCANDESCENT,
980 MSM_V4L2_WB_FLUORESCENT,
981 MSM_V4L2_WB_DAYLIGHT,
982 MSM_V4L2_WB_CLOUDY_DAYLIGHT,
Suresh Vankadara212d9722012-05-30 15:51:20 +0530983};
984
985enum msm_v4l2_special_effect {
986 MSM_V4L2_EFFECT_OFF,
987 MSM_V4L2_EFFECT_MONO,
988 MSM_V4L2_EFFECT_NEGATIVE,
989 MSM_V4L2_EFFECT_SOLARIZE,
990 MSM_V4L2_EFFECT_SEPIA,
991 MSM_V4L2_EFFECT_POSTERAIZE,
992 MSM_V4L2_EFFECT_WHITEBOARD,
993 MSM_V4L2_EFFECT_BLACKBOARD,
994 MSM_V4L2_EFFECT_AQUA,
995 MSM_V4L2_EFFECT_EMBOSS,
996 MSM_V4L2_EFFECT_SKETCH,
997 MSM_V4L2_EFFECT_NEON,
998 MSM_V4L2_EFFECT_MAX,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800999};
1000
1001enum msm_v4l2_power_line_frequency {
1002 MSM_V4L2_POWER_LINE_OFF,
1003 MSM_V4L2_POWER_LINE_60HZ,
1004 MSM_V4L2_POWER_LINE_50HZ,
1005 MSM_V4L2_POWER_LINE_AUTO,
1006};
Taniya Dasa9bdb012011-09-08 11:21:33 +05301007
Su Liu6c3bb322012-02-14 02:15:05 +05301008#define CAMERA_ISO_TYPE_AUTO 0
1009#define CAMEAR_ISO_TYPE_HJR 1
1010#define CAMEAR_ISO_TYPE_100 2
1011#define CAMERA_ISO_TYPE_200 3
1012#define CAMERA_ISO_TYPE_400 4
1013#define CAMEAR_ISO_TYPE_800 5
1014#define CAMERA_ISO_TYPE_1600 6
1015
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001016struct sensor_pict_fps {
1017 uint16_t prevfps;
1018 uint16_t pictfps;
1019};
1020
1021struct exp_gain_cfg {
1022 uint16_t gain;
1023 uint32_t line;
1024};
1025
1026struct focus_cfg {
1027 int32_t steps;
1028 int dir;
1029};
1030
1031struct fps_cfg {
1032 uint16_t f_mult;
1033 uint16_t fps_div;
1034 uint32_t pict_fps_div;
1035};
1036struct wb_info_cfg {
1037 uint16_t red_gain;
1038 uint16_t green_gain;
1039 uint16_t blue_gain;
1040};
1041struct sensor_3d_exp_cfg {
1042 uint16_t gain;
1043 uint32_t line;
1044 uint16_t r_gain;
1045 uint16_t b_gain;
1046 uint16_t gr_gain;
1047 uint16_t gb_gain;
1048 uint16_t gain_adjust;
1049};
1050struct sensor_3d_cali_data_t{
1051 unsigned char left_p_matrix[3][4][8];
1052 unsigned char right_p_matrix[3][4][8];
1053 unsigned char square_len[8];
1054 unsigned char focal_len[8];
1055 unsigned char pixel_pitch[8];
1056 uint16_t left_r;
1057 uint16_t left_b;
1058 uint16_t left_gb;
1059 uint16_t left_af_far;
1060 uint16_t left_af_mid;
1061 uint16_t left_af_short;
1062 uint16_t left_af_5um;
1063 uint16_t left_af_50up;
1064 uint16_t left_af_50down;
1065 uint16_t right_r;
1066 uint16_t right_b;
1067 uint16_t right_gb;
1068 uint16_t right_af_far;
1069 uint16_t right_af_mid;
1070 uint16_t right_af_short;
1071 uint16_t right_af_5um;
1072 uint16_t right_af_50up;
1073 uint16_t right_af_50down;
1074};
1075struct sensor_init_cfg {
1076 uint8_t prev_res;
1077 uint8_t pict_res;
1078};
1079
1080struct sensor_calib_data {
1081 /* Color Related Measurements */
1082 uint16_t r_over_g;
1083 uint16_t b_over_g;
1084 uint16_t gr_over_gb;
1085
1086 /* Lens Related Measurements */
1087 uint16_t macro_2_inf;
1088 uint16_t inf_2_macro;
1089 uint16_t stroke_amt;
1090 uint16_t af_pos_1m;
1091 uint16_t af_pos_inf;
1092};
1093
Kevin Chana980f392011-08-01 20:55:00 -07001094enum msm_sensor_resolution_t {
Kevin Chan36e2bdc2011-08-30 17:21:21 -07001095 MSM_SENSOR_RES_FULL,
1096 MSM_SENSOR_RES_QTR,
Kevin Chana980f392011-08-01 20:55:00 -07001097 MSM_SENSOR_RES_2,
1098 MSM_SENSOR_RES_3,
1099 MSM_SENSOR_RES_4,
1100 MSM_SENSOR_RES_5,
1101 MSM_SENSOR_RES_6,
1102 MSM_SENSOR_RES_7,
1103 MSM_SENSOR_INVALID_RES,
1104};
1105
1106struct msm_sensor_output_info_t {
1107 uint16_t x_output;
1108 uint16_t y_output;
1109 uint16_t line_length_pclk;
1110 uint16_t frame_length_lines;
Kevin Chane30d3692011-10-14 16:11:01 -07001111 uint32_t vt_pixel_clk;
1112 uint32_t op_pixel_clk;
Kevin Chan272f6602011-10-18 14:20:03 -07001113 uint16_t binning_factor;
Kevin Chana980f392011-08-01 20:55:00 -07001114};
1115
1116struct sensor_output_info_t {
1117 struct msm_sensor_output_info_t *output_info;
1118 uint16_t num_info;
1119};
1120
Taniya Dasa9bdb012011-09-08 11:21:33 +05301121struct mirror_flip {
1122 int32_t x_mirror;
1123 int32_t y_flip;
1124};
1125
1126struct cord {
1127 uint32_t x;
1128 uint32_t y;
1129};
1130
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001131struct msm_eeprom_data_t {
1132 void *eeprom_data;
1133 uint16_t index;
1134};
1135
Nishant Panditb2157c92012-04-25 01:09:28 +05301136struct msm_camera_csid_vc_cfg {
1137 uint8_t cid;
1138 uint8_t dt;
1139 uint8_t decode_format;
1140};
1141
1142struct csi_lane_params_t {
1143 uint8_t csi_lane_assign;
1144 uint8_t csi_lane_mask;
1145 uint8_t csi_if;
1146 uint8_t csid_core;
1147 uint32_t csid_version;
1148};
1149
1150#define CSI_EMBED_DATA 0x12
1151#define CSI_RESERVED_DATA_0 0x13
1152#define CSI_YUV422_8 0x1E
1153#define CSI_RAW8 0x2A
1154#define CSI_RAW10 0x2B
1155#define CSI_RAW12 0x2C
1156
1157#define CSI_DECODE_6BIT 0
1158#define CSI_DECODE_8BIT 1
1159#define CSI_DECODE_10BIT 2
1160#define CSI_DECODE_DPCM_10_8_10 5
1161
1162#define ISPIF_STREAM(intf, action) (((intf)<<ISPIF_S_STREAM_SHIFT)+(action))
1163#define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0)
1164#define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1)
1165#define ISPIF_OFF_IMMEDIATELY (0x01 << 2)
1166#define ISPIF_S_STREAM_SHIFT 4
1167
1168
1169#define PIX_0 (0x01 << 0)
1170#define RDI_0 (0x01 << 1)
1171#define PIX_1 (0x01 << 2)
1172#define RDI_1 (0x01 << 3)
1173#define PIX_2 (0x01 << 4)
1174#define RDI_2 (0x01 << 5)
1175
1176
1177enum msm_ispif_intftype {
1178 PIX0,
1179 RDI0,
1180 PIX1,
1181 RDI1,
1182 PIX2,
1183 RDI2,
1184 INTF_MAX,
1185};
1186
1187enum msm_ispif_vc {
1188 VC0,
1189 VC1,
1190 VC2,
1191 VC3,
1192};
1193
1194enum msm_ispif_cid {
1195 CID0,
1196 CID1,
1197 CID2,
1198 CID3,
1199 CID4,
1200 CID5,
1201 CID6,
1202 CID7,
1203 CID8,
1204 CID9,
1205 CID10,
1206 CID11,
1207 CID12,
1208 CID13,
1209 CID14,
1210 CID15,
1211};
1212
1213struct msm_ispif_params {
1214 uint8_t intftype;
1215 uint16_t cid_mask;
1216 uint8_t csid;
1217};
1218
1219struct msm_ispif_params_list {
1220 uint32_t len;
1221 struct msm_ispif_params params[4];
1222};
1223
1224enum ispif_cfg_type_t {
1225 ISPIF_INIT,
1226 ISPIF_SET_CFG,
1227 ISPIF_SET_ON_FRAME_BOUNDARY,
1228 ISPIF_SET_OFF_FRAME_BOUNDARY,
1229 ISPIF_SET_OFF_IMMEDIATELY,
1230 ISPIF_RELEASE,
1231};
1232
1233struct ispif_cfg_data {
1234 enum ispif_cfg_type_t cfgtype;
1235 union {
1236 uint32_t csid_version;
1237 int cmd;
1238 struct msm_ispif_params_list ispif_params;
1239 } cfg;
1240};
1241
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001242struct sensor_cfg_data {
1243 int cfgtype;
1244 int mode;
1245 int rs;
1246 uint8_t max_steps;
1247
1248 union {
1249 int8_t effect;
1250 uint8_t lens_shading;
1251 uint16_t prevl_pf;
1252 uint16_t prevp_pl;
1253 uint16_t pictl_pf;
1254 uint16_t pictp_pl;
1255 uint32_t pict_max_exp_lc;
1256 uint16_t p_fps;
Su Liu6c3bb322012-02-14 02:15:05 +05301257 uint8_t iso_type;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001258 struct sensor_init_cfg init_info;
1259 struct sensor_pict_fps gfps;
1260 struct exp_gain_cfg exp_gain;
1261 struct focus_cfg focus;
1262 struct fps_cfg fps;
1263 struct wb_info_cfg wb_info;
1264 struct sensor_3d_exp_cfg sensor_3d_exp;
1265 struct sensor_calib_data calib_info;
Kevin Chana980f392011-08-01 20:55:00 -07001266 struct sensor_output_info_t output_info;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001267 struct msm_eeprom_data_t eeprom_data;
Nishant Panditb2157c92012-04-25 01:09:28 +05301268 struct csi_lane_params_t csi_lane_params;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301269 /* QRD */
1270 uint16_t antibanding;
1271 uint8_t contrast;
1272 uint8_t saturation;
1273 uint8_t sharpness;
1274 int8_t brightness;
1275 int ae_mode;
1276 uint8_t wb_val;
1277 int8_t exp_compensation;
1278 struct cord aec_cord;
1279 int is_autoflash;
1280 struct mirror_flip mirror_flip;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001281 } cfg;
1282};
1283
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001284struct damping_params_t {
1285 uint32_t damping_step;
1286 uint32_t damping_delay;
1287 uint32_t hw_params;
1288};
1289
1290enum actuator_type {
1291 ACTUATOR_VCM,
1292 ACTUATOR_PIEZO,
1293};
1294
1295enum msm_actuator_data_type {
1296 MSM_ACTUATOR_BYTE_DATA = 1,
1297 MSM_ACTUATOR_WORD_DATA,
1298};
1299
1300enum msm_actuator_addr_type {
1301 MSM_ACTUATOR_BYTE_ADDR = 1,
1302 MSM_ACTUATOR_WORD_ADDR,
1303};
1304
1305enum msm_actuator_write_type {
1306 MSM_ACTUATOR_WRITE_HW_DAMP,
1307 MSM_ACTUATOR_WRITE_DAC,
1308};
1309
1310struct msm_actuator_reg_params_t {
1311 enum msm_actuator_write_type reg_write_type;
1312 uint32_t hw_mask;
1313 uint16_t reg_addr;
1314 uint16_t hw_shift;
1315 uint16_t data_shift;
1316};
1317
1318struct reg_settings_t {
1319 uint16_t reg_addr;
1320 uint16_t reg_data;
1321};
1322
1323struct region_params_t {
1324 /* [0] = ForwardDirection Macro boundary
1325 [1] = ReverseDirection Inf boundary
1326 */
1327 uint16_t step_bound[2];
1328 uint16_t code_per_step;
1329};
1330
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001331struct msm_actuator_move_params_t {
1332 int8_t dir;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001333 int8_t sign_dir;
1334 int16_t dest_step_pos;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001335 int32_t num_steps;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001336 struct damping_params_t *ringing_params;
1337};
1338
1339struct msm_actuator_tuning_params_t {
1340 int16_t initial_code;
1341 uint16_t pwd_step;
1342 uint16_t region_size;
1343 uint32_t total_steps;
1344 struct region_params_t *region_params;
1345};
1346
1347struct msm_actuator_params_t {
1348 enum actuator_type act_type;
1349 uint8_t reg_tbl_size;
1350 uint16_t data_size;
1351 uint16_t init_setting_size;
1352 uint32_t i2c_addr;
1353 enum msm_actuator_addr_type i2c_addr_type;
1354 enum msm_actuator_data_type i2c_data_type;
1355 struct msm_actuator_reg_params_t *reg_tbl_params;
1356 struct reg_settings_t *init_settings;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001357};
1358
1359struct msm_actuator_set_info_t {
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001360 struct msm_actuator_params_t actuator_params;
1361 struct msm_actuator_tuning_params_t af_tuning_params;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001362};
1363
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001364struct msm_actuator_get_info_t {
1365 uint32_t focal_length_num;
1366 uint32_t focal_length_den;
1367 uint32_t f_number_num;
1368 uint32_t f_number_den;
1369 uint32_t f_pix_num;
1370 uint32_t f_pix_den;
1371 uint32_t total_f_dist_num;
1372 uint32_t total_f_dist_den;
Jeyaprakash Soundrapandian04592002012-02-08 10:29:50 -08001373 uint32_t hor_view_angle_num;
1374 uint32_t hor_view_angle_den;
1375 uint32_t ver_view_angle_num;
1376 uint32_t ver_view_angle_den;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001377};
1378
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001379enum af_camera_name {
1380 ACTUATOR_MAIN_CAM_0,
1381 ACTUATOR_MAIN_CAM_1,
1382 ACTUATOR_MAIN_CAM_2,
1383 ACTUATOR_MAIN_CAM_3,
1384 ACTUATOR_MAIN_CAM_4,
1385 ACTUATOR_MAIN_CAM_5,
1386 ACTUATOR_WEB_CAM_0,
1387 ACTUATOR_WEB_CAM_1,
1388 ACTUATOR_WEB_CAM_2,
1389};
1390
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001391struct msm_actuator_cfg_data {
1392 int cfgtype;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001393 uint8_t is_af_supported;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001394 union {
1395 struct msm_actuator_move_params_t move;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001396 struct msm_actuator_set_info_t set_info;
1397 struct msm_actuator_get_info_t get_info;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001398 enum af_camera_name cam_name;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001399 } cfg;
1400};
1401
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001402struct msm_eeprom_support {
1403 uint16_t is_supported;
1404 uint16_t size;
1405 uint16_t index;
1406 uint16_t qvalue;
1407};
1408
1409struct msm_calib_wb {
1410 uint16_t r_over_g;
1411 uint16_t b_over_g;
1412 uint16_t gr_over_gb;
1413};
1414
1415struct msm_calib_af {
1416 uint16_t macro_dac;
1417 uint16_t inf_dac;
1418 uint16_t start_dac;
1419};
1420
1421struct msm_calib_lsc {
1422 uint16_t r_gain[221];
1423 uint16_t b_gain[221];
1424 uint16_t gr_gain[221];
1425 uint16_t gb_gain[221];
1426};
1427
1428struct pixel_t {
1429 int x;
1430 int y;
1431};
1432
1433struct msm_calib_dpc {
1434 uint16_t validcount;
1435 struct pixel_t snapshot_coord[128];
1436 struct pixel_t preview_coord[128];
1437 struct pixel_t video_coord[128];
1438};
1439
1440struct msm_camera_eeprom_info_t {
1441 struct msm_eeprom_support af;
1442 struct msm_eeprom_support wb;
1443 struct msm_eeprom_support lsc;
1444 struct msm_eeprom_support dpc;
1445};
1446
1447struct msm_eeprom_cfg_data {
1448 int cfgtype;
1449 uint8_t is_eeprom_supported;
1450 union {
1451 struct msm_eeprom_data_t get_data;
1452 struct msm_camera_eeprom_info_t get_info;
1453 } cfg;
1454};
1455
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001456struct sensor_large_data {
1457 int cfgtype;
1458 union {
1459 struct sensor_3d_cali_data_t sensor_3d_cali_data;
1460 } data;
1461};
1462
1463enum sensor_type_t {
1464 BAYER,
1465 YUV,
1466 JPEG_SOC,
1467};
1468
1469enum flash_type {
1470 LED_FLASH,
1471 STROBE_FLASH,
1472};
1473
1474enum strobe_flash_ctrl_type {
1475 STROBE_FLASH_CTRL_INIT,
1476 STROBE_FLASH_CTRL_CHARGE,
1477 STROBE_FLASH_CTRL_RELEASE
1478};
1479
1480struct strobe_flash_ctrl_data {
1481 enum strobe_flash_ctrl_type type;
1482 int charge_en;
1483};
1484
1485struct msm_camera_info {
1486 int num_cameras;
1487 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
1488 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
1489 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
1490 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
1491 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001492};
1493
1494struct msm_cam_config_dev_info {
1495 int num_config_nodes;
1496 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -07001497 int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001498};
1499
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -08001500struct msm_mctl_node_info {
1501 int num_mctl_nodes;
1502 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
1503};
1504
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001505struct flash_ctrl_data {
1506 int flashtype;
1507 union {
1508 int led_state;
1509 struct strobe_flash_ctrl_data strobe_ctrl;
1510 } ctrl_data;
1511};
1512
1513#define GET_NAME 0
1514#define GET_PREVIEW_LINE_PER_FRAME 1
1515#define GET_PREVIEW_PIXELS_PER_LINE 2
1516#define GET_SNAPSHOT_LINE_PER_FRAME 3
1517#define GET_SNAPSHOT_PIXELS_PER_LINE 4
1518#define GET_SNAPSHOT_FPS 5
1519#define GET_SNAPSHOT_MAX_EP_LINE_CNT 6
1520
1521struct msm_camsensor_info {
1522 char name[MAX_SENSOR_NAME];
1523 uint8_t flash_enabled;
Sreesudhan Ramakrish Ramkumara2688822012-04-05 20:22:50 -07001524 uint8_t strobe_flash_enabled;
1525 uint8_t actuator_enabled;
Nishant Panditb2157c92012-04-25 01:09:28 +05301526 uint8_t ispif_supported;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001527 int8_t total_steps;
1528 uint8_t support_3d;
Mingcheng Zhuc85b8ad2012-03-08 17:47:17 -08001529 enum flash_type flashtype;
1530 enum sensor_type_t sensor_type;
1531 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
1532 uint32_t camera_type; /* msm_camera_type */
1533 int mount_angle;
1534 uint32_t max_width;
1535 uint32_t max_height;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001536};
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001537
1538#define V4L2_SINGLE_PLANE 0
1539#define V4L2_MULTI_PLANE_Y 0
1540#define V4L2_MULTI_PLANE_CBCR 1
1541#define V4L2_MULTI_PLANE_CB 1
1542#define V4L2_MULTI_PLANE_CR 2
1543
1544struct plane_data {
1545 int plane_id;
1546 uint32_t offset;
1547 unsigned long size;
1548};
1549
1550struct img_plane_info {
1551 uint32_t width;
1552 uint32_t height;
1553 uint32_t pixelformat;
1554 uint8_t buffer_type; /*Single/Multi planar*/
1555 uint8_t output_port;
1556 uint32_t ext_mode;
1557 uint8_t num_planes;
1558 struct plane_data plane[MAX_PLANES];
Mingcheng Zhu996be182011-10-16 16:04:23 -07001559 uint32_t sp_y_offset;
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001560 uint8_t vpe_can_use;
1561};
1562
Kevin Chan210061f2012-02-14 20:56:16 -08001563#define QCAMERA_NAME "qcamera"
1564#define QCAMERA_DEVICE_GROUP_ID 1
1565#define QCAMERA_VNODE_GROUP_ID 2
1566
Kevin Chan94b4c832012-03-02 21:27:16 -08001567#define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001568 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001569
1570#define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001571 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001572
1573#define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001574 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001575
1576#define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \
Kevin Chan41a38702012-06-06 22:25:41 -07001577 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001578
1579#define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \
Kevin Chan41a38702012-06-06 22:25:41 -07001580 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001581
Sunid Wilson4584b5f2012-04-13 12:48:25 -07001582#define MSM_CAM_IOCTL_SEND_EVENT \
1583 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event)
1584
Kiran Kumar H N64bd23c2012-05-25 12:06:21 -07001585#define MSM_CAM_V4L2_IOCTL_CFG_VPE \
1586 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd)
1587
Kevin Chan41a38702012-06-06 22:25:41 -07001588#define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \
1589 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
1590
Kevin Chan94b4c832012-03-02 21:27:16 -08001591struct msm_camera_v4l2_ioctl_t {
Kevin Chan41a38702012-06-06 22:25:41 -07001592 uint32_t id;
Kevin Chan94b4c832012-03-02 21:27:16 -08001593 void __user *ioctl_ptr;
Kevin Chan41a38702012-06-06 22:25:41 -07001594 uint32_t len;
Kevin Chan94b4c832012-03-02 21:27:16 -08001595};
1596
Kiran Kumar H Nb4a278e2012-06-18 19:25:47 -07001597enum msm_camss_irq_idx {
1598 CAMERA_SS_IRQ_0,
1599 CAMERA_SS_IRQ_1,
1600 CAMERA_SS_IRQ_2,
1601 CAMERA_SS_IRQ_3,
1602 CAMERA_SS_IRQ_4,
1603 CAMERA_SS_IRQ_5,
1604 CAMERA_SS_IRQ_6,
1605 CAMERA_SS_IRQ_7,
1606 CAMERA_SS_IRQ_8,
1607 CAMERA_SS_IRQ_9,
1608 CAMERA_SS_IRQ_10,
1609 CAMERA_SS_IRQ_11,
1610 CAMERA_SS_IRQ_12,
1611 CAMERA_SS_IRQ_MAX
1612};
1613
1614enum msm_cam_hw_idx {
1615 MSM_CAM_HW_MICRO,
1616 MSM_CAM_HW_CCI,
1617 MSM_CAM_HW_CSI0,
1618 MSM_CAM_HW_CSI1,
1619 MSM_CAM_HW_CSI2,
1620 MSM_CAM_HW_CSI3,
1621 MSM_CAM_HW_ISPIF,
1622 MSM_CAM_HW_CPP,
1623 MSM_CAM_HW_VFE0,
1624 MSM_CAM_HW_VFE1,
1625 MSM_CAM_HW_JPEG0,
1626 MSM_CAM_HW_JPEG1,
1627 MSM_CAM_HW_JPEG2,
1628 MSM_CAM_HW_MAX
1629};
1630
1631struct msm_camera_irq_cfg {
1632 /* Bit mask of all the camera hardwares that needs to
1633 * be composited into a single IRQ to the MSM.
1634 * Current usage: (may be updated based on hw changes)
1635 * Bits 31:13 - Reserved.
1636 * Bits 12:0
1637 * 12 - MSM_CAM_HW_JPEG2
1638 * 11 - MSM_CAM_HW_JPEG1
1639 * 10 - MSM_CAM_HW_JPEG0
1640 * 9 - MSM_CAM_HW_VFE1
1641 * 8 - MSM_CAM_HW_VFE0
1642 * 7 - MSM_CAM_HW_CPP
1643 * 6 - MSM_CAM_HW_ISPIF
1644 * 5 - MSM_CAM_HW_CSI3
1645 * 4 - MSM_CAM_HW_CSI2
1646 * 3 - MSM_CAM_HW_CSI1
1647 * 2 - MSM_CAM_HW_CSI0
1648 * 1 - MSM_CAM_HW_CCI
1649 * 0 - MSM_CAM_HW_MICRO
1650 */
1651 uint32_t cam_hw_mask;
1652 uint8_t irq_idx;
1653 uint8_t num_hwcore;
1654};
1655
1656#define MSM_IRQROUTER_CFG_COMPIRQ \
1657 _IOWR('V', BASE_VIDIOC_PRIVATE, void __user *)
1658
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001659#endif /* __LINUX_MSM_CAMERA_H */