| Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 1 | /* | 
 | 2 |  * This file is subject to the terms and conditions of the GNU General Public | 
 | 3 |  * License.  See the file "COPYING" in the main directory of this archive | 
 | 4 |  * for more details. | 
 | 5 |  * | 
 | 6 |  * Copyright (C) 2003, 2004 Chris Dearman | 
 | 7 |  */ | 
 | 8 | #ifndef __ASM_MACH_SIM_CPU_FEATURE_OVERRIDES_H | 
 | 9 | #define __ASM_MACH_SIM_CPU_FEATURE_OVERRIDES_H | 
 | 10 |  | 
| Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 11 |  | 
 | 12 | /* | 
 | 13 |  * CPU feature overrides for MIPS boards | 
 | 14 |  */ | 
 | 15 | #ifdef CONFIG_CPU_MIPS32 | 
 | 16 | #define cpu_has_tlb		1 | 
 | 17 | #define cpu_has_4kex		1 | 
| Kumba | c3b1c2d | 2006-06-18 02:17:01 -0400 | [diff] [blame] | 18 | #define cpu_has_4k_cache	1 | 
| Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 19 | #define cpu_has_fpu		0 | 
 | 20 | /* #define cpu_has_32fpr	? */ | 
 | 21 | #define cpu_has_counter		1 | 
 | 22 | /* #define cpu_has_watch	? */ | 
 | 23 | #define cpu_has_divec		1 | 
 | 24 | #define cpu_has_vce		0 | 
 | 25 | /* #define cpu_has_cache_cdex_p	? */ | 
 | 26 | /* #define cpu_has_cache_cdex_s	? */ | 
 | 27 | /* #define cpu_has_prefetch	? */ | 
 | 28 | #define cpu_has_mcheck		1 | 
 | 29 | /* #define cpu_has_ejtag	? */ | 
 | 30 | #define cpu_has_llsc		1 | 
 | 31 | /* #define cpu_has_vtag_icache	? */ | 
 | 32 | /* #define cpu_has_dc_aliases	? */ | 
 | 33 | /* #define cpu_has_ic_fills_f_dc ? */ | 
 | 34 | #define cpu_has_nofpuex		0 | 
 | 35 | /* #define cpu_has_64bits	? */ | 
 | 36 | /* #define cpu_has_64bit_zero_reg ? */ | 
| Ralf Baechle | fc5d2d2 | 2006-07-06 13:04:01 +0100 | [diff] [blame] | 37 | /* #define cpu_has_inclusive_pcaches ? */ | 
| Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 38 | #endif | 
 | 39 |  | 
 | 40 | #ifdef CONFIG_CPU_MIPS64 | 
 | 41 | #define cpu_has_tlb		1 | 
 | 42 | #define cpu_has_4kex		1 | 
| Kumba | c3b1c2d | 2006-06-18 02:17:01 -0400 | [diff] [blame] | 43 | #define cpu_has_4k_cache	1 | 
| Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 44 | /* #define cpu_has_fpu		? */ | 
 | 45 | /* #define cpu_has_32fpr	? */ | 
 | 46 | #define cpu_has_counter		1 | 
 | 47 | /* #define cpu_has_watch	? */ | 
 | 48 | #define cpu_has_divec		1 | 
 | 49 | #define cpu_has_vce		0 | 
 | 50 | /* #define cpu_has_cache_cdex_p	? */ | 
 | 51 | /* #define cpu_has_cache_cdex_s	? */ | 
 | 52 | /* #define cpu_has_prefetch	? */ | 
 | 53 | #define cpu_has_mcheck		1 | 
 | 54 | /* #define cpu_has_ejtag	? */ | 
 | 55 | #define cpu_has_llsc		1 | 
 | 56 | /* #define cpu_has_vtag_icache	? */ | 
 | 57 | /* #define cpu_has_dc_aliases	? */ | 
 | 58 | /* #define cpu_has_ic_fills_f_dc ? */ | 
 | 59 | #define cpu_has_nofpuex		0 | 
 | 60 | /* #define cpu_has_64bits	? */ | 
 | 61 | /* #define cpu_has_64bit_zero_reg ? */ | 
| Ralf Baechle | fc5d2d2 | 2006-07-06 13:04:01 +0100 | [diff] [blame] | 62 | /* #define cpu_has_inclusive_pcaches ? */ | 
| Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 63 | #endif | 
 | 64 |  | 
 | 65 | #endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */ |