| Yoshinori Sato | cce2d45 | 2008-08-04 16:33:47 +0900 | [diff] [blame] | 1 | /* | 
|  | 2 | * arch/sh/mm/cache-sh2a.c | 
|  | 3 | * | 
|  | 4 | * Copyright (C) 2008 Yoshinori Sato | 
|  | 5 | * | 
|  | 6 | * Released under the terms of the GNU GPL v2.0. | 
|  | 7 | */ | 
|  | 8 |  | 
|  | 9 | #include <linux/init.h> | 
|  | 10 | #include <linux/mm.h> | 
|  | 11 |  | 
|  | 12 | #include <asm/cache.h> | 
|  | 13 | #include <asm/addrspace.h> | 
|  | 14 | #include <asm/processor.h> | 
|  | 15 | #include <asm/cacheflush.h> | 
|  | 16 | #include <asm/io.h> | 
|  | 17 |  | 
|  | 18 | void __flush_wback_region(void *start, int size) | 
|  | 19 | { | 
|  | 20 | unsigned long v; | 
|  | 21 | unsigned long begin, end; | 
|  | 22 | unsigned long flags; | 
|  | 23 |  | 
|  | 24 | begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); | 
|  | 25 | end = ((unsigned long)start + size + L1_CACHE_BYTES-1) | 
|  | 26 | & ~(L1_CACHE_BYTES-1); | 
|  | 27 |  | 
|  | 28 | local_irq_save(flags); | 
|  | 29 | jump_to_uncached(); | 
|  | 30 |  | 
|  | 31 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { | 
|  | 32 | unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0); | 
|  | 33 | int way; | 
|  | 34 | for (way = 0; way < 4; way++) { | 
|  | 35 | unsigned long data =  ctrl_inl(addr | (way << 11)); | 
|  | 36 | if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) { | 
|  | 37 | data &= ~SH_CACHE_UPDATED; | 
|  | 38 | ctrl_outl(data, addr | (way << 11)); | 
|  | 39 | } | 
|  | 40 | } | 
|  | 41 | } | 
|  | 42 |  | 
|  | 43 | back_to_cached(); | 
|  | 44 | local_irq_restore(flags); | 
|  | 45 | } | 
|  | 46 |  | 
|  | 47 | void __flush_purge_region(void *start, int size) | 
|  | 48 | { | 
|  | 49 | unsigned long v; | 
|  | 50 | unsigned long begin, end; | 
|  | 51 | unsigned long flags; | 
|  | 52 |  | 
|  | 53 | begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); | 
|  | 54 | end = ((unsigned long)start + size + L1_CACHE_BYTES-1) | 
|  | 55 | & ~(L1_CACHE_BYTES-1); | 
|  | 56 |  | 
|  | 57 | local_irq_save(flags); | 
|  | 58 | jump_to_uncached(); | 
|  | 59 |  | 
|  | 60 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { | 
|  | 61 | ctrl_outl((v & CACHE_PHYSADDR_MASK), | 
|  | 62 | CACHE_OC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008); | 
|  | 63 | } | 
|  | 64 | back_to_cached(); | 
|  | 65 | local_irq_restore(flags); | 
|  | 66 | } | 
|  | 67 |  | 
|  | 68 | void __flush_invalidate_region(void *start, int size) | 
|  | 69 | { | 
|  | 70 | unsigned long v; | 
|  | 71 | unsigned long begin, end; | 
|  | 72 | unsigned long flags; | 
|  | 73 |  | 
|  | 74 | begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); | 
|  | 75 | end = ((unsigned long)start + size + L1_CACHE_BYTES-1) | 
|  | 76 | & ~(L1_CACHE_BYTES-1); | 
|  | 77 | local_irq_save(flags); | 
|  | 78 | jump_to_uncached(); | 
|  | 79 |  | 
|  | 80 | #ifdef CONFIG_CACHE_WRITEBACK | 
|  | 81 | ctrl_outl(ctrl_inl(CCR) | CCR_OCACHE_INVALIDATE, CCR); | 
|  | 82 | /* I-cache invalidate */ | 
|  | 83 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { | 
|  | 84 | ctrl_outl((v & CACHE_PHYSADDR_MASK), | 
|  | 85 | CACHE_IC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008); | 
|  | 86 | } | 
|  | 87 | #else | 
|  | 88 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { | 
|  | 89 | ctrl_outl((v & CACHE_PHYSADDR_MASK), | 
|  | 90 | CACHE_IC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008); | 
|  | 91 | ctrl_outl((v & CACHE_PHYSADDR_MASK), | 
|  | 92 | CACHE_OC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008); | 
|  | 93 | } | 
|  | 94 | #endif | 
|  | 95 | back_to_cached(); | 
|  | 96 | local_irq_restore(flags); | 
|  | 97 | } | 
|  | 98 |  | 
|  | 99 | /* WBack O-Cache and flush I-Cache */ | 
|  | 100 | void flush_icache_range(unsigned long start, unsigned long end) | 
|  | 101 | { | 
|  | 102 | unsigned long v; | 
|  | 103 | unsigned long flags; | 
|  | 104 |  | 
|  | 105 | start = start & ~(L1_CACHE_BYTES-1); | 
|  | 106 | end = (end + L1_CACHE_BYTES-1) & ~(L1_CACHE_BYTES-1); | 
|  | 107 |  | 
|  | 108 | local_irq_save(flags); | 
|  | 109 | jump_to_uncached(); | 
|  | 110 |  | 
|  | 111 | for (v = start; v < end; v+=L1_CACHE_BYTES) { | 
|  | 112 | unsigned long addr = (v & 0x000007f0); | 
|  | 113 | int way; | 
|  | 114 | /* O-Cache writeback */ | 
|  | 115 | for (way = 0; way < 4; way++) { | 
|  | 116 | unsigned long data =  ctrl_inl(CACHE_OC_ADDRESS_ARRAY | addr | (way << 11)); | 
|  | 117 | if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) { | 
|  | 118 | data &= ~SH_CACHE_UPDATED; | 
|  | 119 | ctrl_outl(data, CACHE_OC_ADDRESS_ARRAY | addr | (way << 11)); | 
|  | 120 | } | 
|  | 121 | } | 
|  | 122 | /* I-Cache invalidate */ | 
|  | 123 | ctrl_outl(addr, | 
|  | 124 | CACHE_IC_ADDRESS_ARRAY | addr | 0x00000008); | 
|  | 125 | } | 
|  | 126 |  | 
|  | 127 | back_to_cached(); | 
|  | 128 | local_irq_restore(flags); | 
|  | 129 | } |