blob: 194717cbce5d912c61a2b00b6f027c733a4c80aa [file] [log] [blame]
Sathish Ambley9d69ac32012-03-21 10:28:26 -07001/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
Sathish Ambley4df614c2011-10-07 16:30:46 -070012
13/include/ "skeleton.dtsi"
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -070014/include/ "msm8974_pm.dtsi"
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -070015/include/ "msm8974-iommu.dtsi"
Kevin Chan350b6932012-08-01 02:21:00 -070016/include/ "msm8974-camera.dtsi"
Pratik Patelf20bacb2012-07-21 14:46:36 -070017/include/ "msm8974-coresight.dtsi"
Matt Wagantallfc727212012-01-06 18:18:25 -080018/include/ "msm-gdsc.dtsi"
Olav Haugan49173442012-08-01 13:23:18 -070019/include/ "msm8974-ion.dtsi"
Pu Chen1335e872012-08-01 08:45:25 -060020/include/ "msm8974-gpu.dtsi"
Sathish Ambley4df614c2011-10-07 16:30:46 -070021
22/ {
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -070023 model = "Qualcomm MSM 8974";
24 compatible = "qcom,msm8974";
Sathish Ambley4df614c2011-10-07 16:30:46 -070025 interrupt-parent = <&intc>;
26
27 intc: interrupt-controller@F9000000 {
28 compatible = "qcom,msm-qgic2";
29 interrupt-controller;
Michael Bohanc7224532012-01-06 16:02:52 -080030 #interrupt-cells = <3>;
Sathish Ambley4df614c2011-10-07 16:30:46 -070031 reg = <0xF9000000 0x1000>,
32 <0xF9002000 0x1000>;
33 };
Sathish Ambley3d50c762011-10-25 15:26:00 -070034
Sathish Ambleye046b242012-04-09 12:38:05 -070035 msmgpio: gpio@fd510000 {
Michael Bohan0425f6f2012-01-17 14:36:39 -080036 compatible = "qcom,msm-gpio";
Rohit Vaswanib1cc4932012-07-23 21:30:11 -070037 gpio-controller;
38 #gpio-cells = <2>;
Michael Bohan0425f6f2012-01-17 14:36:39 -080039 interrupt-controller;
40 #interrupt-cells = <2>;
Sathish Ambleye046b242012-04-09 12:38:05 -070041 reg = <0xfd510000 0x4000>;
Michael Bohan0425f6f2012-01-17 14:36:39 -080042 };
43
Sathish Ambley098f9bd2011-11-09 16:32:53 -080044 timer {
Sathish Ambley2f27a172012-03-16 10:46:28 -070045 compatible = "qcom,msm-qtimer", "arm,armv7-timer";
Sathish Ambleyddd099e2012-04-25 13:24:47 -070046 interrupts = <1 2 0 1 3 0>;
Sathish Ambley2f27a172012-03-16 10:46:28 -070047 clock-frequency = <19200000>;
Sathish Ambley098f9bd2011-11-09 16:32:53 -080048 };
49
Praneeth Paladugu4b73ec82012-02-08 12:55:59 -080050 qcom,vidc@fdc00000 {
51 compatible = "qcom,msm-vidc";
52 reg = <0xfdc00000 0xff000>;
53 interrupts = <0 44 0>;
Vinay Kalia68398a42012-06-22 18:36:12 -070054 vidc-cp-map = <0x1000000 0x40000000>;
55 vidc-ns-map = <0x40000000 0x40000000>;
Vinay Kalia40680aa2012-07-23 12:45:39 -070056 load-freq-tbl = <979200 410000000>,
57 <560145 266670000>,
58 <421161 200000000>,
59 <243000 133330000>,
60 <108000 100000000>,
61 <36000 50000000>;
Praneeth Paladugu4b73ec82012-02-08 12:55:59 -080062 };
63
David Brown225abee2012-02-09 22:28:50 -080064 serial@f991f000 {
Sathish Ambley3d50c762011-10-25 15:26:00 -070065 compatible = "qcom,msm-lsuart-v14";
David Brown225abee2012-02-09 22:28:50 -080066 reg = <0xf991f000 0x1000>;
Michael Bohanc7224532012-01-06 16:02:52 -080067 interrupts = <0 109 0>;
Stepan Moskovchenko43f11582012-08-08 17:20:38 -070068 status = "disabled";
Sathish Ambley3d50c762011-10-25 15:26:00 -070069 };
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053070
Sathish Ambley9d69ac32012-03-21 10:28:26 -070071 serial@f995e000 {
72 compatible = "qcom,msm-lsuart-v14";
73 reg = <0xf995e000 0x1000>;
74 interrupts = <0 114 0>;
Stepan Moskovchenko43f11582012-08-08 17:20:38 -070075 status = "disabled";
Sathish Ambley9d69ac32012-03-21 10:28:26 -070076 };
77
Stepan Moskovchenko5269b602012-08-08 17:57:09 -070078 serial@f991e000 {
79 compatible = "qcom,msm-lsuart-v14";
80 reg = <0xf991e000 0x1000>;
81 interrupts = <0 108 0>;
82 status = "disabled";
83 };
84
David Brown225abee2012-02-09 22:28:50 -080085 usb@f9a55000 {
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053086 compatible = "qcom,hsusb-otg";
David Brown225abee2012-02-09 22:28:50 -080087 reg = <0xf9a55000 0x400>;
Michael Bohanc7224532012-01-06 16:02:52 -080088 interrupts = <0 134 0>;
Michael Bohane66a3a92012-03-26 12:47:28 -070089 HSUSB_VDDCX-supply = <&pm8841_s2>;
90 HSUSB_1p8-supply = <&pm8941_l6>;
91 HSUSB_3p3-supply = <&pm8941_l24>;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053092
93 qcom,hsusb-otg-phy-type = <2>;
94 qcom,hsusb-otg-mode = <1>;
95 qcom,hsusb-otg-otg-control = <1>;
Manu Gautambd53fba2012-07-31 16:13:06 +053096 qcom,hsusb-otg-disable-reset;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053097 };
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +053098
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +053099 qcom,sdcc@f9824000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530100 cell-index = <1>; /* SDC1 eMMC slot */
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530101 compatible = "qcom,msm-sdcc";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530102 reg = <0xf9824000 0x1000>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530103 reg-names = "core_mem";
Michael Bohanc7224532012-01-06 16:02:52 -0800104 interrupts = <0 123 0>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530105 interrupt-names = "core_irq";
Sujit Reddy Thummab9ff7f02012-05-04 09:57:49 +0530106 vdd-supply = <&pm8941_l20>;
107 vdd-io-supply = <&pm8941_s3>;
108
109 qcom,sdcc-vdd-voltage_level = <2950000 2950000>;
110 qcom,sdcc-vdd-current_level = <800 500000>;
111
112 qcom,sdcc-vdd-io-always_on;
113 qcom,sdcc-vdd-io-voltage_level = <1800000 1800000>;
114 qcom,sdcc-vdd-io-current_level = <250 154000>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530115
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530116 qcom,sdcc-pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
117 qcom,sdcc-pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
118 qcom,sdcc-pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
119 qcom,sdcc-pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
120
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530121 qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000 200000000>;
122 qcom,sdcc-sup-voltages = <2950 2950>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530123 qcom,sdcc-bus-width = <8>;
124 qcom,sdcc-nonremovable;
Sujit Reddy Thumma824b7522012-05-30 13:04:34 +0530125 qcom,sdcc-bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530126 };
127
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530128 qcom,sdcc@f98a4000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530129 cell-index = <2>; /* SDC2 SD card slot */
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530130 compatible = "qcom,msm-sdcc";
131 reg = <0xf98a4000 0x1000>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530132 reg-names = "core_mem";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530133 interrupts = <0 125 0>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530134 interrupt-names = "core_irq";
Sujit Reddy Thummab9ff7f02012-05-04 09:57:49 +0530135 vdd-supply = <&pm8941_l21>;
136 vdd-io-supply = <&pm8941_l13>;
137
138 qcom,sdcc-vdd-voltage_level = <2950000 2950000>;
139 qcom,sdcc-vdd-current_level = <9000 800000>;
140
141 qcom,sdcc-vdd-io-always_on;
142 qcom,sdcc-vdd-io-lpm_sup;
143 qcom,sdcc-vdd-io-voltage_level = <1800000 2950000>;
144 qcom,sdcc-vdd-io-current_level = <6 22000>;
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530145
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530146 qcom,sdcc-pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
147 qcom,sdcc-pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
148 qcom,sdcc-pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
149 qcom,sdcc-pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
150
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530151 qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000 200000000>;
152 qcom,sdcc-sup-voltages = <2950 2950>;
153 qcom,sdcc-bus-width = <4>;
Sujit Reddy Thumma824b7522012-05-30 13:04:34 +0530154 qcom,sdcc-xpc;
155 qcom,sdcc-bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
156 qcom,sdcc-current-limit = <800>;
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530157 };
158
159 qcom,sdcc@f9864000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530160 cell-index = <3>; /* SDC3 SDIO slot */
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530161 compatible = "qcom,msm-sdcc";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530162 reg = <0xf9864000 0x1000>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530163 reg-names = "core_mem";
Michael Bohanc7224532012-01-06 16:02:52 -0800164 interrupts = <0 127 0>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530165 interrupt-names = "core_irq";
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530166
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530167 gpios = <&msmgpio 40 0>, /* CLK */
168 <&msmgpio 39 0>, /* CMD */
169 <&msmgpio 38 0>, /* DATA0 */
170 <&msmgpio 37 0>, /* DATA1 */
171 <&msmgpio 36 0>, /* DATA2 */
172 <&msmgpio 35 0>; /* DATA3 */
173 qcom,sdcc-gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
174
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530175 qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000>;
176 qcom,sdcc-sup-voltages = <1800 1800>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530177 qcom,sdcc-bus-width = <4>;
Sujit Reddy Thumma824b7522012-05-30 13:04:34 +0530178 qcom,sdcc-bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50";
Sujit Reddy Thumma7138b3e2012-06-04 09:10:11 +0530179 status = "disable";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530180 };
181
182 qcom,sdcc@f98e4000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530183 cell-index = <4>; /* SDC4 SDIO slot */
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530184 compatible = "qcom,msm-sdcc";
185 reg = <0xf98e4000 0x1000>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530186 reg-names = "core_mem";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530187 interrupts = <0 129 0>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530188 interrupt-names = "core_irq";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530189
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530190 gpios = <&msmgpio 93 0>, /* CLK */
191 <&msmgpio 91 0>, /* CMD */
192 <&msmgpio 96 0>, /* DATA0 */
193 <&msmgpio 95 0>, /* DATA1 */
194 <&msmgpio 94 0>, /* DATA2 */
195 <&msmgpio 92 0>; /* DATA3 */
196 qcom,sdcc-gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
197
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530198 qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000>;
199 qcom,sdcc-sup-voltages = <1800 1800>;
200 qcom,sdcc-bus-width = <4>;
Sujit Reddy Thumma824b7522012-05-30 13:04:34 +0530201 qcom,sdcc-bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50";
Sujit Reddy Thumma7138b3e2012-06-04 09:10:11 +0530202 status = "disable";
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530203 };
Yan He1466daa2011-11-30 17:25:38 -0800204
David Brown225abee2012-02-09 22:28:50 -0800205 qcom,sps@f9980000 {
Yan He1466daa2011-11-30 17:25:38 -0800206 compatible = "qcom,msm_sps";
David Brown225abee2012-02-09 22:28:50 -0800207 reg = <0xf9984000 0x15000>,
208 <0xf9999000 0xb000>;
Michael Bohanc7224532012-01-06 16:02:52 -0800209 interrupts = <0 94 0>;
Yan He1466daa2011-11-30 17:25:38 -0800210
211 qcom,bam-dma-res-pipes = <6>;
212 };
213
Hariprasad Dhalinarasimhade991f02012-05-31 13:15:51 -0700214
Harini Jayaraman5f98dbb2011-12-20 13:38:19 -0700215 spi@f9924000 {
216 compatible = "qcom,spi-qup-v2";
217 reg = <0xf9924000 0x1000>;
Michael Bohan857c8ac2012-01-23 16:57:34 -0800218 interrupts = <0 96 0>;
Vikram Mulukutla703e5722012-05-24 21:53:40 -0700219 spi-max-frequency = <25000000>;
Harini Jayaraman5f98dbb2011-12-20 13:38:19 -0700220 };
Kenneth Heitkef3c829c2012-01-13 17:02:43 -0700221
Sagar Dhariaa316a962012-03-21 16:13:22 -0600222 slim@fe12f000 {
223 cell-index = <1>;
224 compatible = "qcom,slim-msm";
225 reg = <0xfe12f000 0x35000>,
226 <0xfe104000 0x20000>;
227 reg-names = "slimbus_physical", "slimbus_bam_physical";
228 interrupts = <0 163 0 0 164 0>;
229 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
230 qcom,min-clk-gear = <10>;
Sagar Dhariac0d6cf52012-07-31 19:17:26 -0600231 qcom,rxreg-access;
Kiran Kandie8bf5d52012-08-06 16:03:16 -0700232
233 taiko_codec {
234 compatible = "qcom,taiko-slim-pgd";
235 elemental-addr = [00 01 A0 00 17 02];
236
237 qcom,cdc-reset-gpio = <&msmgpio 63 0>;
238
239 cdc-vdd-buck-supply = <&pm8941_s2>;
240 qcom,cdc-vdd-buck-voltage = <2150000 2150000>;
241 qcom,cdc-vdd-buck-current = <650000>;
242
243 cdc-vdd-tx-h-supply = <&pm8941_s3>;
244 qcom,cdc-vdd-tx-h-voltage = <1800000 1800000>;
245 qcom,cdc-vdd-tx-h-current = <25000>;
246
247 cdc-vdd-rx-h-supply = <&pm8941_s3>;
248 qcom,cdc-vdd-rx-h-voltage = <1800000 1800000>;
249 qcom,cdc-vdd-rx-h-current = <25000>;
250
251 cdc-vddpx-1-supply = <&pm8941_s3>;
252 qcom,cdc-vddpx-1-voltage = <1800000 1800000>;
253 qcom,cdc-vddpx-1-current = <10000>;
254
255 cdc-vdd-a-1p2v-supply = <&pm8941_l1>;
256 qcom,cdc-vdd-a-1p2v-voltage = <1225000 1225000>;
257 qcom,cdc-vdd-a-1p2v-current = <10000>;
258
259 cdc-vddcx-1-supply = <&pm8941_l1>;
260 qcom,cdc-vddcx-1-voltage = <1225000 1225000>;
261 qcom,cdc-vddcx-1-current = <10000>;
262
263 cdc-vddcx-2-supply = <&pm8941_l1>;
264 qcom,cdc-vddcx-2-voltage = <1225000 1225000>;
265 qcom,cdc-vddcx-2-current = <10000>;
266
267 qcom,cdc-micbias-ldoh-v = <0x3>;
268 qcom,cdc-micbias-cfilt1-mv = <1800>;
269 qcom,cdc-micbias-cfilt2-mv = <2700>;
270 qcom,cdc-micbias-cfilt3-mv = <1800>;
271 qcom,cdc-micbias1-cfilt-sel = <0x0>;
272 qcom,cdc-micbias2-cfilt-sel = <0x1>;
273 qcom,cdc-micbias3-cfilt-sel = <0x2>;
274 qcom,cdc-micbias4-cfilt-sel = <0x2>;
275
276 qcom,cdc-slim-ifd = "taiko-slim-ifd";
277 qcom,cdc-slim-ifd-elemental-addr = [00 00 A0 00 17 02];
278 };
Sagar Dhariaa316a962012-03-21 16:13:22 -0600279 };
280
Varad Deshmukh18057ed2012-07-03 16:34:53 -0700281 spmi_bus: qcom,spmi@fc4c0000 {
Kenneth Heitkef3c829c2012-01-13 17:02:43 -0700282 cell-index = <0>;
283 compatible = "qcom,spmi-pmic-arb";
284 reg = <0xfc4cf000 0x1000>,
285 <0Xfc4cb000 0x1000>;
286 /* 190,ee0_krait_hlos_spmi_periph_irq */
287 /* 187,channel_0_krait_hlos_trans_done_irq */
288 interrupts = <0 190 0 0 187 0>;
289 qcom,pmic-arb-ee = <0>;
290 qcom,pmic-arb-channel = <0>;
Gilad Avidov1d175ba2012-08-06 17:05:22 -0600291 qcom,pmic-arb-ppid-map = <0x40400000>, /* BUS */
292 <0x40500001>, /* INT */
293 <0x40600002>, /* SPMI */
294 <0x40800003>, /* PON */
295 <0x42400004>, /* TEMP_ALARM */
296 <0x47000005>, /* PBS_CORE */
297 <0x47100006>, /* PBS_CLIENT0 */
298 <0x47200007>, /* PBS_CLIENT1 */
299 <0x47300008>, /* PBS_CLIENT2 */
300 <0x47400009>, /* PBS_CLIENT3 */
301 <0x4750000a>, /* PBS_CLIENT4 */
302 <0x4760000b>, /* PBS_CLIENT5 */
303 <0x4770000c>, /* PBS_CLIENT6 */
304 <0x4780000d>, /* PBS_CLIENT7 */
305 <0x4a00000e>, /* MPP1 */
306 <0x4a100021>, /* MPP2 */
307 <0x4a20000f>, /* MPP3 */
308 <0x4a300010>, /* MPP4 */
309 <0x51000011>, /* BCLK_GEN_MAIN */
310 <0x51d00012>, /* S4_CTRL */
311 <0x51e00013>, /* S4_PS */
312 <0x51f00014>, /* S4_FREQ */
313 <0x52000015>, /* S5_CTRL */
314 <0x52100016>, /* S5_PS */
315 <0x52200017>, /* S5_FREQ */
316 <0x52300018>, /* S6_CTRL */
317 <0x52400019>, /* S6_PS */
318 <0x5250001a>, /* S6_FREQ */
319 <0x5260001b>, /* S7_CTRL */
320 <0x5270001c>, /* S7_PS */
321 <0x5280001d>, /* S7_FREQ */
322 <0x5290001e>, /* S8_CTRL */
323 <0x52a0001f>, /* S8_PS */
324 <0x52b00020>, /* S8_FREQ */
325 <0x00400022>, /* BUS */
326 <0x00500023>, /* INT */
327 <0x00600024>, /* SPMI */
328 <0x00800025>, /* PON */
329 <0x00b00027>, /* VREG_TFT */
330 <0x01000028>, /* SMBB_CHGR */
331 <0x01100029>, /* SMBB_BUCK */
332 <0x0120002a>, /* SMBB_BAT_IF */
333 <0x0130002b>, /* SMBB_USB_CHGPTH */
334 <0x0140002c>, /* SMBB_DC_CHGPTH */
335 <0x0150002d>, /* SMBB_BOOST */
336 <0x0160002e>, /* SMBB_MISC */
337 <0x0170002f>, /* SMBB_FREQ */
338 <0x02400030>, /* TEMP_ALARM */
339 <0x02800031>, /* COIN */
340 <0x03100032>, /* VADC1_USR */
341 <0x03300033>, /* VADC1_BMS */
342 <0x03400034>, /* VADC2_BTM */
343 <0x03600035>, /* IADC1_USR */
344 <0x03800036>, /* IADC1_BMS */
345 <0x04000037>, /* BMS1 */
346 <0x05700039>, /* DIFF_CLK1 */
347 <0x05c0003b>, /* DIV_CLK2 */
348 <0x0610003d>, /* RTC_ALARM */
349 <0x0620003e>, /* RTC_TIMER */
350 <0x07100040>, /* PBS_CLIENT0 */
351 <0x07200041>, /* PBS_CLIENT1 */
352 <0x07300042>, /* PBS_CLIENT2 */
353 <0x07400043>, /* PBS_CLIENT3 */
354 <0x07500044>, /* PBS_CLIENT4 */
355 <0x07600045>, /* PBS_CLIENT5 */
356 <0x07700046>, /* PBS_CLIENT6 */
357 <0x07800047>, /* PBS_CLIENT7 */
358 <0x07900048>, /* PBS_CLIENT8 */
359 <0x07a00049>, /* PBS_CLIENT9 */
360 <0x07b0004a>, /* PBS_CLIENT10 */
361 <0x07c0004b>, /* PBS_CLIENT11 */
362 <0x07d0004c>, /* PBS_CLIENT12 */
363 <0x07e0004d>, /* PBS_CLIENT13 */
364 <0x07f0004e>, /* PBS_CLIENT14 */
365 <0x0800004f>, /* PBS_CLIENT15 */
366 <0x0a100050>, /* MPP2 */
367 <0x0a300051>, /* MPP4 */
368 <0x0a400052>, /* MPP5 */
369 <0x0a500053>, /* MPP6 */
370 <0x0a600054>, /* MPP7 */
371 <0x0a700055>, /* MPP8 */
372 <0x0c000056>, /* GPIO1 */
373 <0x0c100057>, /* GPIO2 */
374 <0x0c200058>, /* GPIO3 */
375 <0x0c300059>, /* GPIO4 */
376 <0x0c40005a>, /* GPIO5 */
377 <0x0c50005b>, /* GPIO6 */
378 <0x0c60005c>, /* GPIO7 */
379 <0x0c70005d>, /* GPIO8 */
380 <0x0c80005e>, /* GPIO9 */
381 <0x0c90005f>, /* GPIO10 */
382 <0x0ca00060>, /* GPIO11 */
383 <0x0cb00061>, /* GPIO12 */
384 <0x0cc00062>, /* GPIO13 */
385 <0x0cd00063>, /* GPIO14 */
386 <0x0ce00064>, /* GPIO15 */
387 <0x0cf00065>, /* GPIO16 */
388 <0x0d200066>, /* GPIO19 */
389 <0x0d300067>, /* GPIO20 */
390 <0x0d500068>, /* GPIO22 */
391 <0x0d600069>, /* GPIO23 */
392 <0x0d70006a>, /* GPIO24 */
393 <0x0d80006b>, /* GPIO25 */
394 <0x0d90006c>, /* GPIO26 */
395 <0x0da0006d>, /* GPIO27 */
396 <0x0dc0006e>, /* GPIO29 */
397 <0x0dd0006f>, /* GPIO30 */
398 <0x0df00070>, /* GPIO32 */
399 <0x0e000071>, /* GPIO33 */
400 <0x0e100072>, /* GPIO34 */
401 <0x0e200073>, /* GPIO35 */
402 <0x0e300074>, /* GPIO36 */
403 <0x11000075>, /* BUCK_CMN */
404 <0x1a000076>, /* BOOST */
405 <0x1a100077>, /* BOOST_FREQ */
406 <0x1a800078>, /* KEYPAD1 */
407 <0x1b000079>, /* LPG_LUT */
408 <0x1b10007a>, /* LPG_CHAN1 */
409 <0x1b20007b>, /* LPG_CHAN2 */
410 <0x1b30007c>, /* LPG_CHAN3 */
411 <0x1b40007d>, /* LPG_CHAN4 */
412 <0x1b50007e>, /* LPG_CHAN5 */
413 <0x1b60007f>, /* LPG_CHAN6 */
414 <0x1b700080>, /* LPG_CHAN7 */
415 <0x1b800081>, /* LPG_CHAN8 */
416 <0x1bc00082>, /* PWM_3D */
417 <0x1c000083>, /* VIB1 */
418 <0x1d000084>, /* TRI_LED */
419 <0x1d300085>, /* FLASH1 */
420 <0x1d800086>, /* WLED1 */
421 <0x1e200087>, /* KPDBL_MAIN */
422 <0x1e300088>, /* KPDBL_LUT */
423 <0x1e400089>, /* LPG_CHAN9 */
424 <0x1e50008a>, /* LPG_CHAN10 */
425 <0x1e60008b>, /* LPG_CHAN11 */
426 <0x1e70008c>; /* LPG_CHAN12 */
Kenneth Heitkef3c829c2012-01-13 17:02:43 -0700427 };
Sagar Dharia218edb92012-01-15 18:03:01 -0700428
429 i2c@f9966000 {
430 cell-index = <0>;
431 compatible = "qcom,i2c-qup";
432 reg = <0Xf9966000 0x1000>;
433 reg-names = "qup_phys_addr";
434 interrupts = <0 104 0>;
435 interrupt-names = "qup_err_intr";
436 qcom,i2c-bus-freq = <100000>;
437 qcom,i2c-src-freq = <24000000>;
438 };
Matt Wagantalle9b715a2012-01-04 18:16:14 -0800439
Matt Wagantall48523022012-04-23 13:28:42 -0700440 qcom,acpuclk@f9000000 {
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -0700441 compatible = "qcom,acpuclk-8974";
Matt Wagantallbf9eb2c2012-05-31 09:44:22 -0700442 krait0-supply = <&krait0_vreg>;
443 krait1-supply = <&krait1_vreg>;
444 krait2-supply = <&krait2_vreg>;
445 krait3-supply = <&krait3_vreg>;
David Collins1c91ea72012-05-03 16:17:35 -0700446 krait0_mem-supply = <&pm8841_s1_ao>;
447 krait1_mem-supply = <&pm8841_s1_ao>;
448 krait2_mem-supply = <&pm8841_s1_ao>;
449 krait3_mem-supply = <&pm8841_s1_ao>;
450 krait0_dig-supply = <&pm8841_s2_corner_ao>;
451 krait1_dig-supply = <&pm8841_s2_corner_ao>;
452 krait2_dig-supply = <&pm8841_s2_corner_ao>;
453 krait3_dig-supply = <&pm8841_s2_corner_ao>;
Matt Wagantall337cdb72012-06-29 12:07:27 -0700454 krait0_hfpll_a-supply = <&pm8941_s2_ao>;
455 krait1_hfpll_a-supply = <&pm8941_s2_ao>;
456 krait2_hfpll_a-supply = <&pm8941_s2_ao>;
457 krait3_hfpll_a-supply = <&pm8941_s2_ao>;
458 l2_hfpll_a-supply = <&pm8941_s2_ao>;
459 krait0_hfpll_b-supply = <&pm8941_l12_ao>;
460 krait1_hfpll_b-supply = <&pm8941_l12_ao>;
461 krait2_hfpll_b-supply = <&pm8941_l12_ao>;
462 krait3_hfpll_b-supply = <&pm8941_l12_ao>;
463 l2_hfpll_b-supply = <&pm8941_l12_ao>;
Matt Wagantalle9b715a2012-01-04 18:16:14 -0800464 };
Ido Shayevitzef72ddd2012-03-28 18:55:55 +0200465
Shimrit Malichi57ae1492012-08-06 14:03:45 +0300466 qcom,ssusb@f9200000 {
Ido Shayevitzef72ddd2012-03-28 18:55:55 +0200467 compatible = "qcom,dwc-usb3-msm";
Shimrit Malichi57ae1492012-08-06 14:03:45 +0300468 reg = <0xf9200000 0xfc000>;
Manu Gautam17206c22012-06-21 10:17:53 +0530469 interrupts = <0 131 0 0 179 0>;
470 interrupt-names = "irq", "otg_irq";
Manu Gautam60e01352012-05-29 09:00:34 +0530471 SSUSB_VDDCX-supply = <&pm8841_s2>;
472 SSUSB_1p8-supply = <&pm8941_l6>;
473 HSUSB_VDDCX-supply = <&pm8841_s2>;
474 HSUSB_1p8-supply = <&pm8941_l6>;
475 HSUSB_3p3-supply = <&pm8941_l24>;
Ido Shayevitzef72ddd2012-03-28 18:55:55 +0200476 qcom,dwc-usb3-msm-dbm-eps = <4>;
477 };
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700478
Matt Wagantallfc727212012-01-06 18:18:25 -0800479 gdsc_oxili_gx: qcom,gdsc@fd8c4024 {
480 parent-supply = <&pm8841_s4>;
481 };
482
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700483 qcom,lpass@fe200000 {
484 compatible = "qcom,pil-q6v5-lpass";
485 reg = <0xfe200000 0x00100>,
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700486 <0xfd485100 0x00010>;
487
Matt Wagantall6e6b8cd2012-05-24 12:42:24 -0700488 qcom,firmware-name = "adsp";
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700489 };
Tianyi Gouc1e049f82011-11-23 14:20:16 -0800490
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700491 qcom,msm-pcm {
492 compatible = "qcom,msm-pcm-dsp";
493 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700494
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700495 qcom,msm-pcm-routing {
496 compatible = "qcom,msm-pcm-routing";
497 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700498
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700499 qcom,msm-pcm-lpa {
500 compatible = "qcom,msm-pcm-lpa";
501 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700502
Harmandeep Singha3453a72012-07-03 12:31:09 -0700503 qcom,msm-compr-dsp {
504 compatible = "qcom,msm-compr-dsp";
505 };
506
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700507 qcom,msm-voip-dsp {
508 compatible = "qcom,msm-voip-dsp";
509 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700510
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700511 qcom,msm-stub-codec {
512 compatible = "qcom,msm-stub-codec";
513 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700514
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700515 qcom,msm-dai-fe {
516 compatible = "qcom,msm-dai-fe";
517 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700518
Joonwoo Park6572ac52012-07-10 17:17:00 -0700519 qcom,msm-dai-q6 {
520 compatible = "qcom,msm-dai-q6";
521 qcom,msm-dai-q6-sb-0-rx {
522 compatible = "qcom,msm-dai-q6-dev";
523 qcom,msm-dai-q6-dev-id = <16384>;
524 };
525
526 qcom,msm-dai-q6-sb-0-tx {
527 compatible = "qcom,msm-dai-q6-dev";
528 qcom,msm-dai-q6-dev-id = <16385>;
529 };
530 };
531
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700532 qcom,msm-auxpcm {
533 compatible = "qcom,msm-auxpcm-resource";
534 qcom,msm-cpudai-auxpcm-clk = "pcm_clk";
535 qcom,msm-cpudai-auxpcm-mode = <0>;
536 qcom,msm-cpudai-auxpcm-sync = <1>;
537 qcom,msm-cpudai-auxpcm-frame = <5>;
538 qcom,msm-cpudai-auxpcm-quant = <2>;
539 qcom,msm-cpudai-auxpcm-slot = <1>;
540 qcom,msm-cpudai-auxpcm-data = <0>;
541 qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>;
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700542
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700543 qcom,msm-auxpcm-rx {
544 qcom,msm-auxpcm-dev-id = <4106>;
545 compatible = "qcom,msm-auxpcm-dev";
546 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700547
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700548 qcom,msm-auxpcm-tx {
549 qcom,msm-auxpcm-dev-id = <4107>;
550 compatible = "qcom,msm-auxpcm-dev";
551 };
552 };
553
554 qcom,msm-pcm-hostless {
555 compatible = "qcom,msm-pcm-hostless";
556 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700557
Phani Kumar Uppalapati8b3a1bb2012-06-26 19:56:58 -0700558 qcom,msm-ocmem-audio {
559 compatible = "qcom,msm-ocmem-audio";
560 qcom,msm-ocmem-audio-src-id = <11>;
561 qcom,msm-ocmem-audio-dst-id = <604>;
562 qcom,msm-ocmem-audio-ab = <32505856>;
563 qcom,msm-ocmem-audio-ib = <32505856>;
564 };
565
Matt Wagantall4e2599e2012-03-21 22:31:35 -0700566 qcom,mss@fc880000 {
567 compatible = "qcom,pil-q6v5-mss";
568 reg = <0xfc880000 0x100>,
569 <0xfd485000 0x400>,
570 <0xfc820000 0x020>,
Matt Wagantall16bc5cc2012-08-09 21:33:23 -0700571 <0xfc401680 0x004>,
572 <0xfc980008 0x004>;
Matt Wagantall4e2599e2012-03-21 22:31:35 -0700573 vdd_mss-supply = <&pm8841_s3>;
574
575 qcom,firmware-name = "mba";
576 qcom,pil-self-auth = <1>;
577 };
578
Matt Wagantalle6e00d52012-03-08 17:39:07 -0800579 qcom,mba@fc820000 {
580 compatible = "qcom,pil-mba";
581 reg = <0xfc820000 0x0020>,
582 <0x0d1fc000 0x4000>;
583
584 qcom,firmware-name = "modem";
585 qcom,depends-on = "mba";
586 };
587
Tianyi Gouc1e049f82011-11-23 14:20:16 -0800588 qcom,pronto@fb21b000 {
589 compatible = "qcom,pil-pronto";
590 reg = <0xfb21b000 0x3000>,
591 <0xfc401700 0x4>,
592 <0xfd485300 0xc>;
593 vdd_pronto_pll-supply = <&pm8941_l12>;
594
595 qcom,firmware-name = "wcnss";
596 };
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700597
598 qcom,ocmem@fdd00000 {
Naveen Ramaraj94455a42012-07-05 16:01:40 -0700599 compatible = "qcom,msm-ocmem";
600 reg = <0xfdd00000 0x2000>,
601 <0xfdd02000 0x2000>,
602 <0xfe039000 0x400>,
603 <0xfec00000 0x180000>;
604 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
605 interrupts = <0 76 0 0 77 0>;
606 interrupt-names = "ocmem_irq", "dm_irq";
607 qcom,ocmem-num-regions = <0x3>;
Naveen Ramarajba3a6262012-08-02 17:14:27 -0700608 qcom,resource-type = <0x706d636f>;
Naveen Ramaraj94455a42012-07-05 16:01:40 -0700609 #address-cells = <1>;
610 #size-cells = <1>;
611 ranges = <0x0 0xfec00000 0x180000>;
612
613 partition@0 {
614 reg = <0x0 0x100000>;
615 qcom,ocmem-part-name = "graphics";
616 qcom,ocmem-part-min = <0x80000>;
617 };
618
619 partition@80000 {
620 reg = <0x80000 0xA0000>;
621 qcom,ocmem-part-name = "lp_audio";
622 qcom,ocmem-part-min = <0xA0000>;
623 };
624
625 partition@E0000 {
626 reg = <0x120000 0x20000>;
Naveen Ramarajcc4ec152012-05-14 09:55:29 -0700627 qcom,ocmem-part-name = "other_os";
Naveen Ramaraj94455a42012-07-05 16:01:40 -0700628 qcom,ocmem-part-min = <0x20000>;
629 };
630
631 partition@100000 {
632 reg = <0x100000 0x80000>;
633 qcom,ocmem-part-name = "video";
634 qcom,ocmem-part-min = <0x55000>;
635 };
636
637 partition@140000 {
638 reg = <0x140000 0x40000>;
639 qcom,ocmem-part-name = "sensors";
640 qcom,ocmem-part-min = <0x40000>;
641 };
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700642 };
Mahesh Sivasubramanian3f0d0c72012-05-04 17:35:55 -0600643
Varad Deshmukh18057ed2012-07-03 16:34:53 -0700644 rpm_bus: qcom,rpm-smd {
Mahesh Sivasubramanian3f0d0c72012-05-04 17:35:55 -0600645 compatible = "qcom,rpm-smd";
646 rpm-channel-name = "rpm_requests";
647 rpm-channel-type = <15>; /* SMD_APPS_RPM */
648 };
Hariprasad Dhalinarasimhade991f02012-05-31 13:15:51 -0700649
650 qcom,msm-rng@f9bff000 {
651 compatible = "qcom,msm-rng";
652 reg = <0xf9bff000 0x200>;
653 };
Ramesh Masavarapufb1f01e2012-06-14 09:40:40 -0700654
655 qcom,qseecom@fe806000 {
656 compatible = "qcom,qseecom";
657 };
Adrian Salido-Moreno5ef3ac02012-05-14 18:40:47 -0700658
659 qcom,mdss_mdp@fd900000 {
660 cell-index = <0>;
661 compatible = "qcom,mdss_mdp";
662 reg = <0xfd900000 0x22100>;
663 interrupts = <0 72 0>;
Matt Wagantall37320fb2012-06-26 14:50:28 -0700664 vdd-supply = <&gdsc_mdss>;
Adrian Salido-Moreno5ef3ac02012-05-14 18:40:47 -0700665 };
666
Chandan Uddarajude63dec2012-05-29 18:55:10 -0700667 mdss_dsi: qcom,mdss_dsi@fd922800 {
668 cell-index = <1>;
669 compatible = "qcom,msm-mdss-dsi";
670 reg = <0xfd922800 0x5ac>,
671 <0xfd8c0000 0x01000>;
Chandan Uddarajude63dec2012-05-29 18:55:10 -0700672 };
673
Adrian Salido-Moreno5ef3ac02012-05-14 18:40:47 -0700674 qcom,mdss_wb_panel {
675 cell-index = <1>;
676 compatible = "qcom,mdss_wb";
677 qcom,mdss_pan_res = <640 480>;
678 qcom,mdss_pan_bpp = <24>;
679 };
Hanumant72aec702012-06-25 11:51:07 -0700680
681 qcom,wdt@f9017000 {
682 compatible = "qcom,msm-watchdog";
683 reg = <0xf9017000 0x1000>;
684 interrupts = <0 3 0 0 4 0>;
685 qcom,bark-time = <11000>;
686 qcom,pet-time = <10000>;
687 qcom,ipi-ping = <1>;
688 };
Hariprasad Dhalinarasimha0fc258f2012-07-05 13:01:29 -0700689
690 qcom,tz-log@fe805720 {
691 compatible = "qcom,tz-log";
692 reg = <0xfe805720 0x1000>;
693 };
Tianyi Gou828798d2012-05-02 21:12:38 -0700694
695 qcom,venus@fdce0000 {
696 compatible = "qcom,pil-venus";
697 reg = <0xfdce0000 0x4000>,
698 <0xfdc80208 0x8>;
699 vdd-supply = <&gdsc_venus>;
700
701 qcom,firmware-name = "venus";
702 qcom,firmware-min-paddr = <0xF500000>;
703 qcom,firmware-max-paddr = <0xFA00000>;
704 };
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -0700705
Stepan Moskovchenkoc79a7382012-07-19 17:24:32 -0700706 qcom,cache_erp {
707 compatible = "qcom,cache_erp";
708 interrupts = <1 9 0>, <0 2 0>;
709 interrupt-names = "l1_irq", "l2_irq";
710 };
711
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -0700712 tsens@fc4a8000 {
713 compatible = "qcom,msm-tsens";
714 reg = <0xfc4a8000 0x2000>,
715 <0xfc4b80d0 0x5>;
716 reg-names = "tsens_physical", "tsens_eeprom_physical";
717 interrupts = <0 184 0>;
718 qcom,sensors = <11>;
Siddartha Mohanadoss205bce62012-07-27 17:17:18 -0700719 qcom,slope = <3200 3200 3200 3200 3200 3200 3200 3200 3200
720 3200 3200>;
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -0700721 };
Laura Abbottf7e44042012-06-22 12:50:32 -0700722
723 qcom,msm-rtb {
724 compatible = "qcom,msm-rtb";
725 qcom,memory-reservation-type = "EBI1";
726 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
727 };
Mona Hossainb43e94b2012-05-07 08:52:06 -0700728
729 qcom,qcedev@fd440000 {
730 compatible = "qcom,qcedev";
731 reg = <0xfd440000 0x20000>,
732 <0xfd444000 0x8000>;
Ramesh Masavarapu97ad00d2012-08-06 16:47:26 -0700733 reg-names = "crypto-base","crypto-bam-base";
Mona Hossainb43e94b2012-05-07 08:52:06 -0700734 interrupts = <0 235 0>;
Ramesh Masavarapu97ad00d2012-08-06 16:47:26 -0700735 qcom,bam-pipe-pair = <0>;
Mona Hossainb43e94b2012-05-07 08:52:06 -0700736 };
737
738 qcom,qcrypto@fd444000 {
739 compatible = "qcom,qcrypto";
740 reg = <0xfd440000 0x20000>,
741 <0xfd444000 0x8000>;
Ramesh Masavarapu97ad00d2012-08-06 16:47:26 -0700742 reg-names = "crypto-base","crypto-bam-base";
Mona Hossainb43e94b2012-05-07 08:52:06 -0700743 interrupts = <0 235 0>;
Ramesh Masavarapu97ad00d2012-08-06 16:47:26 -0700744 qcom,bam-pipe-pair = <1>;
Mona Hossainb43e94b2012-05-07 08:52:06 -0700745 };
Shimrit Malichi57ae1492012-08-06 14:03:45 +0300746
747 qcom,usbbam@f9304000 {
748 compatible = "qcom,usb-bam-msm";
749 reg = <0xf9304000 0x9000>;
750 interrupts = <0 132 0>;
751 qcom,usb-active-bam = <0>;
752 qcom,usb-total-bam-num = <1>;
753 qcom,usb-bam-num-pipes = <16>;
754 qcom,usb-base-address = <0xf9200000>;
755
756 qcom,pipe1 {
757 label = "usb-to-peri-qdss-dwc3";
758 qcom,usb-bam-type = <0>;
759 qcom,src-bam-physical-address = <0>;
760 qcom,src-bam-pipe-index = <0>;
761 qcom,dst-bam-physical-address = <0>;
762 qcom,dst-bam-pipe-index = <0>;
763 qcom,data-fifo-offset = <0>;
764 qcom,data-fifo-size = <0>;
765 qcom,descriptor-fifo-offset = <0>;
766 qcom,descriptor-fifo-size = <0>;
767 };
768
769 qcom,pipe2 {
770 label = "peri-to-usb-qdss-dwc3";
771 qcom,usb-bam-type = <0>;
772 qcom,src-bam-physical-address = <0xfc37C000>;
773 qcom,src-bam-pipe-index = <0>;
774 qcom,dst-bam-physical-address = <0xf9304000>;
775 qcom,dst-bam-pipe-index = <2>;
776 qcom,data-fifo-offset = <0xf0000>;
777 qcom,data-fifo-size = <0x4000>;
778 qcom,descriptor-fifo-offset = <0xf4000>;
779 qcom,descriptor-fifo-size = <0x1400>;
780 };
781 };
Eugene Seahce52ef22012-07-12 12:40:38 -0600782
783 qcom,msm-thermal {
784 compatible = "qcom,msm-thermal";
785 qcom,sensor-id = <0>;
786 qcom,poll-ms = <250>;
787 qcom,limit-temp = <60>;
788 qcom,temp-hysteresis = <10>;
789 qcom,freq-step = <2>;
790 };
Anirudh Ghayalb70740f2012-08-01 09:00:49 +0530791
792 gpio_keys {
793 compatible = "gpio-keys";
794
795 camera_snapshot {
796 label = "camera_snapshot";
797 gpios = <&pm8941_gpios 3 0x1>;
798 linux,input-type = <1>;
799 linux,code = <0x2fe>;
800 gpio-key,wakeup;
801 debounce-interval = <15>;
802 };
803
804 camera_focus {
805 label = "camera_focus";
806 gpios = <&pm8941_gpios 4 0x1>;
807 linux,input-type = <1>;
808 linux,code = <0x210>;
809 gpio-key,wakeup;
810 debounce-interval = <15>;
811 };
812
813 vol_up {
814 label = "volume_up";
815 gpios = <&pm8941_gpios 5 0x1>;
816 linux,input-type = <1>;
817 linux,code = <115>;
818 gpio-key,wakeup;
819 debounce-interval = <15>;
820 };
821 };
Sathish Ambley4df614c2011-10-07 16:30:46 -0700822};
Varad Deshmukh18057ed2012-07-03 16:34:53 -0700823
824/include/ "msm-pm8x41-rpm-regulator.dtsi"
825/include/ "msm-pm8841.dtsi"
826/include/ "msm-pm8941.dtsi"
827/include/ "msm8974-regulator.dtsi"
828/include/ "msm8974-gpio.dtsi"