| David Howells | 7f386ac | 2011-03-18 16:54:30 +0000 | [diff] [blame] | 1 | /* MN10300 CPU cache invalidation routines, using automatic purge registers | 
|  | 2 | * | 
|  | 3 | * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved. | 
|  | 4 | * Written by David Howells (dhowells@redhat.com) | 
|  | 5 | * | 
|  | 6 | * This program is free software; you can redistribute it and/or | 
|  | 7 | * modify it under the terms of the GNU General Public Licence | 
|  | 8 | * as published by the Free Software Foundation; either version | 
|  | 9 | * 2 of the Licence, or (at your option) any later version. | 
|  | 10 | */ | 
|  | 11 | #include <linux/sys.h> | 
|  | 12 | #include <linux/linkage.h> | 
|  | 13 | #include <asm/cache.h> | 
|  | 14 | #include <asm/irqflags.h> | 
|  | 15 | #include <asm/cacheflush.h> | 
|  | 16 | #include "cache.inc" | 
|  | 17 |  | 
|  | 18 | .am33_2 | 
|  | 19 |  | 
|  | 20 | .globl	debugger_local_cache_flushinv_one | 
|  | 21 |  | 
|  | 22 | ############################################################################### | 
|  | 23 | # | 
|  | 24 | # void debugger_local_cache_flushinv_one(u8 *addr) | 
|  | 25 | # | 
|  | 26 | # Invalidate one particular cacheline if it's in the icache | 
|  | 27 | # | 
|  | 28 | ############################################################################### | 
|  | 29 | ALIGN | 
|  | 30 | .globl	debugger_local_cache_flushinv_one | 
|  | 31 | .type	debugger_local_cache_flushinv_one,@function | 
|  | 32 | debugger_local_cache_flushinv_one: | 
|  | 33 | mov	d0,a1 | 
|  | 34 |  | 
|  | 35 | mov	CHCTR,a0 | 
|  | 36 | movhu	(a0),d0 | 
|  | 37 | btst	CHCTR_ICEN,d0 | 
|  | 38 | beq	mn10300_local_icache_inv_range_reg_end | 
|  | 39 |  | 
|  | 40 | LOCAL_CLI_SAVE(d1) | 
|  | 41 |  | 
|  | 42 | mov	ICIVCR,a0 | 
|  | 43 |  | 
|  | 44 | # wait for the invalidator to quiesce | 
|  | 45 | setlb | 
|  | 46 | mov	(a0),d0 | 
|  | 47 | btst	ICIVCR_ICIVBSY,d0 | 
|  | 48 | lne | 
|  | 49 |  | 
|  | 50 | # set the mask | 
|  | 51 | mov	~L1_CACHE_TAG_MASK,d0 | 
|  | 52 | mov	d0,(ICIVMR) | 
|  | 53 |  | 
|  | 54 | # invalidate the cache line at the given address | 
|  | 55 | and	~L1_CACHE_TAG_MASK,a1 | 
|  | 56 | or	ICIVCR_ICI,a1 | 
|  | 57 | mov	a1,(a0) | 
|  | 58 |  | 
|  | 59 | # wait for the invalidator to quiesce again | 
|  | 60 | setlb | 
|  | 61 | mov	(a0),d0 | 
|  | 62 | btst	ICIVCR_ICIVBSY,d0 | 
|  | 63 | lne | 
|  | 64 |  | 
|  | 65 | LOCAL_IRQ_RESTORE(d1) | 
|  | 66 |  | 
|  | 67 | mn10300_local_icache_inv_range_reg_end: | 
|  | 68 | ret	[],0 | 
|  | 69 | .size	debugger_local_cache_flushinv_one,.-debugger_local_cache_flushinv_one |