blob: 20156ee0cafbcb2ad1987cb790d93d447f7a53ab [file] [log] [blame]
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080012 */
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070017#include <linux/i2c.h>
18#include <linux/gpio.h>
19#include <linux/msm_ssbi.h>
20#include <linux/regulator/gpio-regulator.h>
21#include <linux/mfd/pm8xxx/pm8921.h>
22#include <linux/regulator/consumer.h>
23#include <linux/spi/spi.h>
24#include <linux/slimbus/slimbus.h>
25#include <linux/bootmem.h>
26#ifdef CONFIG_ANDROID_PMEM
27#include <linux/android_pmem.h>
28#endif
29#include <linux/cyttsp.h>
30#include <linux/dma-mapping.h>
31#include <linux/platform_data/qcom_crypto_device.h>
32#include <linux/leds.h>
33#include <linux/leds-pm8xxx.h>
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080034
35#include <asm/mach-types.h>
36#include <asm/mach/arch.h>
Larry Basselb4126da2011-07-18 14:31:33 -070037#include <asm/setup.h>
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080038#include <asm/hardware/gic.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070039#include <asm/mach/mmc.h>
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080040
41#include <mach/board.h>
42#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070043#include <mach/msm_spi.h>
44#ifdef CONFIG_USB_MSM_OTG_72K
45#include <mach/msm_hsusb.h>
46#else
47#include <linux/usb/msm_hsusb.h>
48#endif
49#include <linux/usb/android.h>
50#include <mach/usbdiag.h>
51#include <mach/socinfo.h>
52#include <mach/rpm.h>
53#include <mach/gpio.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070054#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055#include <mach/msm_bus_board.h>
56#include <mach/msm_memtypes.h>
57#include <mach/dma.h>
58#include <mach/msm_dsps.h>
59#include <mach/msm_xo.h>
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080060
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070061#ifdef CONFIG_WCD9310_CODEC
62#include <linux/slimbus/slimbus.h>
63#include <linux/mfd/wcd9310/core.h>
64#include <linux/mfd/wcd9310/pdata.h>
65#endif
66
67#include "timer.h"
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -080068#include "devices.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070069#include "devices-msm8x60.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070070#include "spm.h"
71#include "board-msm8960.h"
72#include "pm.h"
73#include "cpuidle.h"
74#include "rpm_resources.h"
75#include "mpm.h"
76
77static struct platform_device msm_fm_platform_init = {
78 .name = "iris_fm",
79 .id = -1,
80};
81
82struct pm8xxx_gpio_init {
83 unsigned gpio;
84 struct pm_gpio config;
85};
86
87struct pm8xxx_mpp_init {
88 unsigned mpp;
89 struct pm8xxx_mpp_config_data config;
90};
91
92#define PM8XXX_GPIO_INIT(_gpio, _dir, _buf, _val, _pull, _vin, _out_strength, \
93 _func, _inv, _disable) \
94{ \
95 .gpio = PM8921_GPIO_PM_TO_SYS(_gpio), \
96 .config = { \
97 .direction = _dir, \
98 .output_buffer = _buf, \
99 .output_value = _val, \
100 .pull = _pull, \
101 .vin_sel = _vin, \
102 .out_strength = _out_strength, \
103 .function = _func, \
104 .inv_int_pol = _inv, \
105 .disable_pin = _disable, \
106 } \
107}
108
109#define PM8XXX_MPP_INIT(_mpp, _type, _level, _control) \
110{ \
111 .mpp = PM8921_MPP_PM_TO_SYS(_mpp), \
112 .config = { \
113 .type = PM8XXX_MPP_TYPE_##_type, \
114 .level = _level, \
115 .control = PM8XXX_MPP_##_control, \
116 } \
117}
118
119#define PM8XXX_GPIO_DISABLE(_gpio) \
120 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_IN, 0, 0, 0, PM_GPIO_VIN_S4, \
121 0, 0, 0, 1)
122
123#define PM8XXX_GPIO_OUTPUT(_gpio, _val) \
124 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_OUT, PM_GPIO_OUT_BUF_CMOS, _val, \
125 PM_GPIO_PULL_NO, PM_GPIO_VIN_S4, \
126 PM_GPIO_STRENGTH_HIGH, \
127 PM_GPIO_FUNC_NORMAL, 0, 0)
128
129#define PM8XXX_GPIO_INPUT(_gpio, _pull) \
130 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_IN, PM_GPIO_OUT_BUF_CMOS, 0, \
131 _pull, PM_GPIO_VIN_S4, \
132 PM_GPIO_STRENGTH_NO, \
133 PM_GPIO_FUNC_NORMAL, 0, 0)
134
135#define PM8XXX_GPIO_OUTPUT_FUNC(_gpio, _val, _func) \
136 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_OUT, PM_GPIO_OUT_BUF_CMOS, _val, \
137 PM_GPIO_PULL_NO, PM_GPIO_VIN_S4, \
138 PM_GPIO_STRENGTH_HIGH, \
139 _func, 0, 0)
140
141/* Initial PM8921 GPIO configurations */
142static struct pm8xxx_gpio_init pm8921_gpios[] __initdata = {
143 PM8XXX_GPIO_DISABLE(6), /* Disable unused */
144 PM8XXX_GPIO_DISABLE(7), /* Disable NFC */
145 PM8XXX_GPIO_INPUT(16, PM_GPIO_PULL_UP_30), /* SD_CARD_WP */
146 PM8XXX_GPIO_DISABLE(22), /* Disable NFC */
147 PM8XXX_GPIO_OUTPUT_FUNC(24, 0, PM_GPIO_FUNC_1), /* Bl: Off, PWM mode */
148 PM8XXX_GPIO_INPUT(26, PM_GPIO_PULL_UP_30), /* SD_CARD_DET_N */
149 PM8XXX_GPIO_OUTPUT(43, 0), /* DISP_RESET_N */
150};
151
152/* Initial PM8921 MPP configurations */
153static struct pm8xxx_mpp_init pm8921_mpps[] __initdata = {
154 /* External 5V regulator enable; shared by HDMI and USB_OTG switches. */
155 PM8XXX_MPP_INIT(7, D_INPUT, PM8921_MPP_DIG_LEVEL_VPH, DIN_TO_INT),
156 PM8XXX_MPP_INIT(PM8921_AMUX_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
157 DOUT_CTRL_LOW),
158 PM8XXX_MPP_INIT(PM8921_AMUX_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
159 DOUT_CTRL_LOW),
160};
161
162static void __init pm8921_gpio_mpp_init(void)
163{
164 int i, rc;
165
166 for (i = 0; i < ARRAY_SIZE(pm8921_gpios); i++) {
167 rc = pm8xxx_gpio_config(pm8921_gpios[i].gpio,
168 &pm8921_gpios[i].config);
169 if (rc) {
170 pr_err("%s: pm8xxx_gpio_config: rc=%d\n", __func__, rc);
171 break;
172 }
173 }
174
175 for (i = 0; i < ARRAY_SIZE(pm8921_mpps); i++) {
176 rc = pm8xxx_mpp_config(pm8921_mpps[i].mpp,
177 &pm8921_mpps[i].config);
178 if (rc) {
179 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
180 break;
181 }
182 }
183}
184
185#define FPGA_CS_GPIO 14
186#define KS8851_RST_GPIO 89
187#define KS8851_IRQ_GPIO 90
188
189/* Macros assume PMIC GPIOs and MPPs start at 1 */
190#define PM8921_GPIO_BASE NR_GPIO_IRQS
191#define PM8921_GPIO_PM_TO_SYS(pm_gpio) (pm_gpio - 1 + PM8921_GPIO_BASE)
192#define PM8921_MPP_BASE (PM8921_GPIO_BASE + PM8921_NR_GPIOS)
193#define PM8921_MPP_PM_TO_SYS(pm_gpio) (pm_gpio - 1 + PM8921_MPP_BASE)
194#define PM8921_IRQ_BASE (NR_MSM_IRQS + NR_GPIO_IRQS)
195#define PM8921_MPP_IRQ_BASE (PM8921_IRQ_BASE + NR_GPIO_IRQS)
196
197static struct gpiomux_setting gsbi1 = {
198 .func = GPIOMUX_FUNC_1,
199 .drv = GPIOMUX_DRV_8MA,
200 .pull = GPIOMUX_PULL_NONE,
201};
202
203static struct gpiomux_setting gsbi3 = {
204 .func = GPIOMUX_FUNC_1,
205 .drv = GPIOMUX_DRV_8MA,
206 .pull = GPIOMUX_PULL_NONE,
207};
208
209static struct gpiomux_setting gsbi4 = {
210 .func = GPIOMUX_FUNC_1,
211 .drv = GPIOMUX_DRV_8MA,
212 .pull = GPIOMUX_PULL_NONE,
213};
214
215static struct gpiomux_setting gsbi5 = {
216 .func = GPIOMUX_FUNC_1,
217 .drv = GPIOMUX_DRV_8MA,
218 .pull = GPIOMUX_PULL_NONE,
219};
220
221static struct gpiomux_setting gsbi10 = {
222 .func = GPIOMUX_FUNC_2,
223 .drv = GPIOMUX_DRV_8MA,
224 .pull = GPIOMUX_PULL_NONE,
225};
226
227static struct gpiomux_setting gsbi12 = {
228 .func = GPIOMUX_FUNC_1,
229 .drv = GPIOMUX_DRV_8MA,
230 .pull = GPIOMUX_PULL_NONE,
231};
232
233static struct gpiomux_setting cdc_mclk = {
234 .func = GPIOMUX_FUNC_1,
235 .drv = GPIOMUX_DRV_8MA,
236 .pull = GPIOMUX_PULL_NONE,
237};
238
239static struct gpiomux_setting gpio_eth_config = {
240 .pull = GPIOMUX_PULL_NONE,
241 .drv = GPIOMUX_DRV_8MA,
242 .func = GPIOMUX_FUNC_GPIO,
243};
244
245static struct gpiomux_setting slimbus = {
246 .func = GPIOMUX_FUNC_1,
247 .drv = GPIOMUX_DRV_8MA,
248 .pull = GPIOMUX_PULL_KEEPER,
249};
250
251struct msm_gpiomux_config msm8960_gpiomux_configs[NR_GPIO_IRQS] = {
252 {
253 .gpio = KS8851_IRQ_GPIO,
254 .settings = {
255 [GPIOMUX_SUSPENDED] = &gpio_eth_config,
256 }
257 },
258 {
259 .gpio = KS8851_RST_GPIO,
260 .settings = {
261 [GPIOMUX_SUSPENDED] = &gpio_eth_config,
262 }
263 },
264 {
265 .gpio = FPGA_CS_GPIO,
266 .settings = {
267 [GPIOMUX_SUSPENDED] = &gpio_eth_config,
268 }
269 },
270};
271
272static struct msm_gpiomux_config msm8960_gsbi_configs[] __initdata = {
273 {
274 .gpio = 6, /* GSBI1 QUP SPI_DATA_MOSI */
275 .settings = {
276 [GPIOMUX_SUSPENDED] = &gsbi1,
277 },
278 },
279 {
280 .gpio = 7, /* GSBI1 QUP SPI_DATA_MISO */
281 .settings = {
282 [GPIOMUX_SUSPENDED] = &gsbi1,
283 },
284 },
285 {
286 .gpio = 8, /* GSBI1 QUP SPI_CS_N */
287 .settings = {
288 [GPIOMUX_SUSPENDED] = &gsbi1,
289 },
290 },
291 {
292 .gpio = 9, /* GSBI1 QUP SPI_CLK */
293 .settings = {
294 [GPIOMUX_SUSPENDED] = &gsbi1,
295 },
296 },
297 {
298 .gpio = 16, /* GSBI3 I2C QUP SDA */
299 .settings = {
300 [GPIOMUX_SUSPENDED] = &gsbi3,
301 },
302 },
303 {
304 .gpio = 17, /* GSBI3 I2C QUP SCL */
305 .settings = {
306 [GPIOMUX_SUSPENDED] = &gsbi3,
307 },
308 },
309 {
310 .gpio = 20, /* GSBI4 I2C QUP SDA */
311 .settings = {
312 [GPIOMUX_SUSPENDED] = &gsbi4,
313 },
314 },
315 {
316 .gpio = 21, /* GSBI4 I2C QUP SCL */
317 .settings = {
318 [GPIOMUX_SUSPENDED] = &gsbi4,
319 },
320 },
321 {
322 .gpio = 22, /* GSBI5 UART2 */
323 .settings = {
324 [GPIOMUX_SUSPENDED] = &gsbi5,
325 },
326 },
327 {
328 .gpio = 23, /* GSBI5 UART2 */
329 .settings = {
330 [GPIOMUX_SUSPENDED] = &gsbi5,
331 },
332 },
333 {
334 .gpio = 24, /* GSBI5 UART2 */
335 .settings = {
336 [GPIOMUX_SUSPENDED] = &gsbi5,
337 },
338 },
339 {
340 .gpio = 25, /* GSBI5 UART2 */
341 .settings = {
342 [GPIOMUX_SUSPENDED] = &gsbi5,
343 },
344 },
345 {
346 .gpio = 44, /* GSBI12 I2C QUP SDA */
347 .settings = {
348 [GPIOMUX_SUSPENDED] = &gsbi12,
349 },
350 },
351 {
352 .gpio = 45, /* GSBI12 I2C QUP SCL */
353 .settings = {
354 [GPIOMUX_SUSPENDED] = &gsbi12,
355 },
356 },
357 {
358 .gpio = 73, /* GSBI10 I2C QUP SDA */
359 .settings = {
360 [GPIOMUX_SUSPENDED] = &gsbi10,
361 },
362 },
363 {
364 .gpio = 74, /* GSBI10 I2C QUP SCL */
365 .settings = {
366 [GPIOMUX_SUSPENDED] = &gsbi10,
367 },
368 },
369};
370
371static struct msm_gpiomux_config msm8960_slimbus_config[] __initdata = {
372 {
373 .gpio = 60, /* slimbus data */
374 .settings = {
375 [GPIOMUX_SUSPENDED] = &slimbus,
376 },
377 },
378 {
379 .gpio = 61, /* slimbus clk */
380 .settings = {
381 [GPIOMUX_SUSPENDED] = &slimbus,
382 },
383 },
384};
385
386static struct msm_gpiomux_config msm8960_audio_codec_configs[] __initdata = {
387 {
388 .gpio = 59,
389 .settings = {
390 [GPIOMUX_SUSPENDED] = &cdc_mclk,
391 },
392 },
393};
394static struct gpiomux_setting wcnss_5wire_suspend_cfg = {
395 .func = GPIOMUX_FUNC_GPIO,
396 .drv = GPIOMUX_DRV_2MA,
397 .pull = GPIOMUX_PULL_NONE,
398};
399
400static struct gpiomux_setting wcnss_5wire_active_cfg = {
401 .func = GPIOMUX_FUNC_1,
402 .drv = GPIOMUX_DRV_6MA,
403 .pull = GPIOMUX_PULL_DOWN,
404};
405
406static struct msm_gpiomux_config wcnss_5wire_interface[] = {
407 {
408 .gpio = 84,
409 .settings = {
410 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
411 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
412 },
413 },
414 {
415 .gpio = 85,
416 .settings = {
417 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
418 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
419 },
420 },
421 {
422 .gpio = 86,
423 .settings = {
424 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
425 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
426 },
427 },
428 {
429 .gpio = 87,
430 .settings = {
431 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
432 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
433 },
434 },
435 {
436 .gpio = 88,
437 .settings = {
438 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
439 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
440 },
441 },
442};
443
444static struct gpiomux_setting cam_suspend_cfg = {
445 .func = GPIOMUX_FUNC_GPIO,
446 .drv = GPIOMUX_DRV_2MA,
447 .pull = GPIOMUX_PULL_DOWN,
448};
449
450static struct gpiomux_setting cam_active_1_cfg = {
451 .func = GPIOMUX_FUNC_1,
452 .drv = GPIOMUX_DRV_2MA,
453 .pull = GPIOMUX_PULL_NONE,
454};
455
456static struct gpiomux_setting cam_active_2_cfg = {
457 .func = GPIOMUX_FUNC_GPIO,
458 .drv = GPIOMUX_DRV_2MA,
459 .pull = GPIOMUX_PULL_NONE,
460};
461
462static struct gpiomux_setting cam_active_3_cfg = {
463 .func = GPIOMUX_FUNC_1,
464 .drv = GPIOMUX_DRV_8MA,
465 .pull = GPIOMUX_PULL_UP,
466};
467
468static struct msm_gpiomux_config msm8960_cam_configs[] __initdata = {
469 {
470 .gpio = 2,
471 .settings = {
472 [GPIOMUX_ACTIVE] = &cam_active_2_cfg,
473 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
474 },
475 },
476 {
477 .gpio = 3,
478 .settings = {
479 [GPIOMUX_ACTIVE] = &cam_active_1_cfg,
480 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
481 },
482 },
483 {
484 .gpio = 4,
485 .settings = {
486 [GPIOMUX_ACTIVE] = &cam_active_1_cfg,
487 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
488 },
489 },
490 {
491 .gpio = 5,
492 .settings = {
493 [GPIOMUX_ACTIVE] = &cam_active_1_cfg,
494 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
495 },
496 },
497 {
498 .gpio = 18,
499 .settings = {
500 [GPIOMUX_ACTIVE] = &cam_active_3_cfg,
501 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
502 },
503 },
504 {
505 .gpio = 19,
506 .settings = {
507 [GPIOMUX_ACTIVE] = &cam_active_3_cfg,
508 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
509 },
510 },
511 {
512 .gpio = 20,
513 .settings = {
514 [GPIOMUX_ACTIVE] = &cam_active_3_cfg,
515 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
516 },
517 },
518 {
519 .gpio = 21,
520 .settings = {
521 [GPIOMUX_ACTIVE] = &cam_active_3_cfg,
522 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
523 },
524 },
525 {
526 .gpio = 76,
527 .settings = {
528 [GPIOMUX_ACTIVE] = &cam_active_2_cfg,
529 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
530 },
531 },
532 {
533 .gpio = 107,
534 .settings = {
535 [GPIOMUX_ACTIVE] = &cam_active_2_cfg,
536 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
537 },
538 },
539};
540
541static struct gpiomux_setting cyts_resout_sus_cfg = {
542 .func = GPIOMUX_FUNC_GPIO,
543 .drv = GPIOMUX_DRV_6MA,
544 .pull = GPIOMUX_PULL_UP,
545};
546
547static struct gpiomux_setting cyts_resout_act_cfg = {
548 .func = GPIOMUX_FUNC_GPIO,
549 .drv = GPIOMUX_DRV_6MA,
550 .pull = GPIOMUX_PULL_UP,
551};
552
553static struct gpiomux_setting cyts_sleep_sus_cfg = {
554 .func = GPIOMUX_FUNC_GPIO,
555 .drv = GPIOMUX_DRV_6MA,
556 .pull = GPIOMUX_PULL_DOWN,
557};
558
559static struct gpiomux_setting cyts_sleep_act_cfg = {
560 .func = GPIOMUX_FUNC_GPIO,
561 .drv = GPIOMUX_DRV_6MA,
562 .pull = GPIOMUX_PULL_DOWN,
563};
564
565static struct gpiomux_setting cyts_int_act_cfg = {
566 .func = GPIOMUX_FUNC_GPIO,
567 .drv = GPIOMUX_DRV_8MA,
568 .pull = GPIOMUX_PULL_UP,
569};
570
571static struct gpiomux_setting cyts_int_sus_cfg = {
572 .func = GPIOMUX_FUNC_GPIO,
573 .drv = GPIOMUX_DRV_2MA,
574 .pull = GPIOMUX_PULL_UP,
575};
576
577
578static struct msm_gpiomux_config msm8960_cyts_configs[] __initdata = {
579 { /* TS INTERRUPT */
580 .gpio = 11,
581 .settings = {
582 [GPIOMUX_ACTIVE] = &cyts_int_act_cfg,
583 [GPIOMUX_SUSPENDED] = &cyts_int_sus_cfg,
584 },
585 },
586 { /* TS SLEEP */
587 .gpio = 50,
588 .settings = {
589 [GPIOMUX_ACTIVE] = &cyts_sleep_act_cfg,
590 [GPIOMUX_SUSPENDED] = &cyts_sleep_sus_cfg,
591 },
592 },
593 { /* TS RESOUT */
594 .gpio = 52,
595 .settings = {
596 [GPIOMUX_ACTIVE] = &cyts_resout_act_cfg,
597 [GPIOMUX_SUSPENDED] = &cyts_resout_sus_cfg,
598 },
599 },
600};
601
602#define MSM_PMEM_KERNEL_EBI1_SIZE 0x110C000
603#define MSM_PMEM_ADSP_SIZE 0x3800000
604#define MSM_PMEM_AUDIO_SIZE 0x279000
605#define MSM_PMEM_SIZE 0x1800000 /* 24 Mbytes */
606
607#ifdef CONFIG_KERNEL_PMEM_EBI_REGION
608static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
609static int __init pmem_kernel_ebi1_size_setup(char *p)
610{
611 pmem_kernel_ebi1_size = memparse(p, NULL);
612 return 0;
613}
614early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
615#endif
616
617#ifdef CONFIG_ANDROID_PMEM
618static unsigned pmem_size = MSM_PMEM_SIZE;
619static int __init pmem_size_setup(char *p)
620{
621 pmem_size = memparse(p, NULL);
622 return 0;
623}
624early_param("pmem_size", pmem_size_setup);
625
626static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
627
628static int __init pmem_adsp_size_setup(char *p)
629{
630 pmem_adsp_size = memparse(p, NULL);
631 return 0;
632}
633early_param("pmem_adsp_size", pmem_adsp_size_setup);
634
635static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
636
637static int __init pmem_audio_size_setup(char *p)
638{
639 pmem_audio_size = memparse(p, NULL);
640 return 0;
641}
642early_param("pmem_audio_size", pmem_audio_size_setup);
643#endif
644
645#ifdef CONFIG_ANDROID_PMEM
646static struct android_pmem_platform_data android_pmem_pdata = {
647 .name = "pmem",
648 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
649 .cached = 1,
650 .memory_type = MEMTYPE_EBI1,
651};
652
653static struct platform_device android_pmem_device = {
654 .name = "android_pmem",
655 .id = 0,
656 .dev = {.platform_data = &android_pmem_pdata},
657};
658
659static struct android_pmem_platform_data android_pmem_adsp_pdata = {
660 .name = "pmem_adsp",
661 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
662 .cached = 0,
663 .memory_type = MEMTYPE_EBI1,
664};
665static struct platform_device android_pmem_adsp_device = {
666 .name = "android_pmem",
667 .id = 2,
668 .dev = { .platform_data = &android_pmem_adsp_pdata },
669};
670
671static struct android_pmem_platform_data android_pmem_audio_pdata = {
672 .name = "pmem_audio",
673 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
674 .cached = 0,
675 .memory_type = MEMTYPE_EBI1,
676};
677
678static struct platform_device android_pmem_audio_device = {
679 .name = "android_pmem",
680 .id = 4,
681 .dev = { .platform_data = &android_pmem_audio_pdata },
682};
683#endif
684
685static struct memtype_reserve msm8960_reserve_table[] __initdata = {
686 [MEMTYPE_SMI] = {
687 },
688 [MEMTYPE_EBI0] = {
689 .flags = MEMTYPE_FLAGS_1M_ALIGN,
690 },
691 [MEMTYPE_EBI1] = {
692 .flags = MEMTYPE_FLAGS_1M_ALIGN,
693 },
694};
695
696static void __init size_pmem_devices(void)
697{
698#ifdef CONFIG_ANDROID_PMEM
699 android_pmem_adsp_pdata.size = pmem_adsp_size;
700 android_pmem_pdata.size = pmem_size;
701 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
702#endif
703}
704
705static void __init reserve_memory_for(struct android_pmem_platform_data *p)
706{
707 msm8960_reserve_table[p->memory_type].size += p->size;
708}
709
710static void __init reserve_pmem_memory(void)
711{
712#ifdef CONFIG_ANDROID_PMEM
713 reserve_memory_for(&android_pmem_adsp_pdata);
714 reserve_memory_for(&android_pmem_pdata);
715 reserve_memory_for(&android_pmem_audio_pdata);
716 msm8960_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
717#endif
718}
719
Larry Basselb4126da2011-07-18 14:31:33 -0700720static int msm8960_paddr_to_memtype(unsigned int paddr)
721{
722 return MEMTYPE_EBI1;
723}
724
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700725static void __init msm8960_calculate_reserve_sizes(void)
726{
727 size_pmem_devices();
728 reserve_pmem_memory();
729}
730
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700731static struct reserve_info msm8960_reserve_info __initdata = {
732 .memtype_reserve_table = msm8960_reserve_table,
733 .calculate_reserve_sizes = msm8960_calculate_reserve_sizes,
734 .paddr_to_memtype = msm8960_paddr_to_memtype,
735};
736
Larry Basselb4126da2011-07-18 14:31:33 -0700737static int msm8960_memory_bank_size(void)
738{
739 return 1<<29;
740}
741
742static void __init locate_unstable_memory(void)
743{
744 struct membank *mb = &meminfo.bank[meminfo.nr_banks - 1];
745 unsigned long bank_size;
746 unsigned long low, high;
747
748 bank_size = msm8960_memory_bank_size();
749 low = meminfo.bank[0].start;
750 high = mb->start + mb->size;
751 low &= ~(bank_size - 1);
752
753 if (high - low <= bank_size)
754 return;
755 msm8960_reserve_info.low_unstable_address = low + bank_size;
756 msm8960_reserve_info.max_unstable_size = high - low - bank_size;
757 msm8960_reserve_info.bank_size = bank_size;
758 pr_info("low unstable address %lx max size %lx bank size %lx\n",
759 msm8960_reserve_info.low_unstable_address,
760 msm8960_reserve_info.max_unstable_size,
761 msm8960_reserve_info.bank_size);
762}
763
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700764static void __init msm8960_reserve(void)
765{
766 reserve_info = &msm8960_reserve_info;
Larry Basselb4126da2011-07-18 14:31:33 -0700767 locate_unstable_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700768 msm_reserve();
769}
770
Larry Bassela7eadea2011-07-14 10:46:00 -0700771static int msm8960_change_memory_power(unsigned long start_pfn,
772 unsigned long nr_pages, int change_type)
773{
774 return 1;
775}
776
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700777#ifdef CONFIG_MSM_CAMERA
778
779static int msm_cam_gpio_tbl[] = {
780 5, /*CAMIF_MCLK*/
781 20, /*CAMIF_I2C_DATA*/
782 21, /*CAMIF_I2C_CLK*/
783};
784
785#define VFE_CAMIF_TIMER1_GPIO 2
786#define VFE_CAMIF_TIMER2_GPIO 3
787#define VFE_CAMIF_TIMER3_GPIO_INT 4
788struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
789 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
790 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
791 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
792 .flash_recharge_duration = 50000,
793 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
794};
795
796#ifdef CONFIG_IMX074
797static struct msm_camera_sensor_platform_info sensor_board_info = {
Mansoor Aftab6d6ff5e2011-07-20 17:25:36 -0700798 .mount_angle = 90
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700799};
800#endif
801
802static int config_gpio_table(int gpio_en)
803{
804 int rc = 0, i = 0;
805 if (gpio_en) {
806 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
807 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
808 if (rc < 0) {
809 pr_err("%s not able to get gpio\n", __func__);
810 for (i--; i >= 0; i--)
811 gpio_free(msm_cam_gpio_tbl[i]);
812 break;
813 }
814 }
815 } else {
816 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
817 gpio_free(msm_cam_gpio_tbl[i]);
818 }
819 return rc;
820}
821
822static int config_camera_on_gpios(void)
823{
824 int rc = 0;
825
826 rc = config_gpio_table(1);
827 if (rc < 0) {
828 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
829 "failed\n", __func__);
830 return rc;
831 }
832 return rc;
833}
834
835static void config_camera_off_gpios(void)
836{
837 config_gpio_table(0);
838}
839
840struct msm_camera_device_platform_data msm_camera_csi0_device_data = {
841 .camera_gpio_on = config_camera_on_gpios,
842 .camera_gpio_off = config_camera_off_gpios,
843 .ioclk.mclk_clk_rate = 24000000,
844 .ioclk.vfe_clk_rate = 228570000,
845 .csid_core = 0,
846};
847
848struct msm_camera_device_platform_data msm_camera_csi1_device_data = {
849 .camera_gpio_on = config_camera_on_gpios,
850 .camera_gpio_off = config_camera_off_gpios,
851 .ioclk.mclk_clk_rate = 24000000,
852 .ioclk.vfe_clk_rate = 228570000,
853 .csid_core = 1,
854};
855
856#ifdef CONFIG_IMX074
857static struct msm_camera_sensor_flash_data flash_imx074 = {
858 .flash_type = MSM_CAMERA_FLASH_LED,
859};
860
861static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
862 .sensor_name = "imx074",
863 .sensor_reset = 107,
864 .sensor_pwd = 85,
865 .vcm_pwd = 0,
866 .vcm_enable = 1,
867 .pdata = &msm_camera_csi0_device_data,
868 .flash_data = &flash_imx074,
869 .strobe_flash_data = &strobe_flash_xenon,
870 .sensor_platform_info = &sensor_board_info,
871 .csi_if = 1
872};
873
874struct platform_device msm8960_camera_sensor_imx074 = {
875 .name = "msm_camera_imx074",
876 .dev = {
877 .platform_data = &msm_camera_sensor_imx074_data,
878 },
879};
880#endif
881#ifdef CONFIG_OV2720
882static struct msm_camera_sensor_flash_data flash_ov2720 = {
883 .flash_type = MSM_CAMERA_FLASH_LED,
884};
885
886static struct msm_camera_sensor_info msm_camera_sensor_ov2720_data = {
887 .sensor_name = "ov2720",
888 .sensor_reset = 76,
889 .sensor_pwd = 85,
890 .vcm_pwd = 0,
891 .vcm_enable = 1,
892 .pdata = &msm_camera_csi1_device_data,
893 .flash_data = &flash_ov2720,
894 .csi_if = 1
895};
896
897struct platform_device msm8960_camera_sensor_ov2720 = {
898 .name = "msm_camera_ov2720",
899 .dev = {
900 .platform_data = &msm_camera_sensor_ov2720_data,
901 },
902};
903#endif
Kevin Chandfecce22011-07-13 10:52:41 -0700904
905static struct msm_camera_sensor_flash_data flash_qs_mt9p017 = {
906 .flash_type = MSM_CAMERA_FLASH_LED,
907};
908
909static struct msm_camera_sensor_info msm_camera_sensor_qs_mt9p017_data = {
910 .sensor_name = "qs_mt9p017",
911 .sensor_reset = 107,
912 .sensor_pwd = 85,
913 .vcm_pwd = 0,
914 .vcm_enable = 1,
915 .pdata = &msm_camera_csi0_device_data,
916 .flash_data = &flash_qs_mt9p017,
917 .sensor_platform_info = &sensor_board_info,
918 .csi_if = 1
919};
920
921struct platform_device msm8960_camera_sensor_qs_mt9p017 = {
922 .name = "msm_camera_qs_mt9p017",
923 .dev = {
924 .platform_data = &msm_camera_sensor_qs_mt9p017_data,
925 },
926};
927
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700928static void __init msm8960_init_cam(void)
929{
930 int i;
931 struct platform_device *cam_dev[] = {
932 &msm8960_camera_sensor_imx074,
933 &msm8960_camera_sensor_ov2720,
Kevin Chandfecce22011-07-13 10:52:41 -0700934 &msm8960_camera_sensor_qs_mt9p017,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700935 };
936
937 for (i = 0; i < ARRAY_SIZE(cam_dev); i++) {
938 struct msm_camera_sensor_info *s_info;
939 s_info = cam_dev[i]->dev.platform_data;
940 msm_get_cam_resources(s_info);
941 platform_device_register(cam_dev[i]);
942 }
943}
944#endif
945
946#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
947/* prim = 608 x 1024 x 4(bpp) x 3(pages) */
948#define MSM_FB_PRIM_BUF_SIZE 0x720000
949#else
950/* prim = 608 x 1024 x 4(bpp) x 2(pages) */
951#define MSM_FB_PRIM_BUF_SIZE 0x4C0000
952#endif
953
954#ifdef CONFIG_FB_MSM_MIPI_DSI
955/* 960 x 540 x 3 x 2 */
956#define MIPI_DSI_WRITEBACK_SIZE 0x300000
957#else
958#define MIPI_DSI_WRITEBACK_SIZE 0
959#endif
960
961#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
962/* hdmi = 1920 x 1088 x 2(bpp) x 1(page) */
963#define MSM_FB_EXT_BUF_SIZE 0x3FC000
964#elif defined(CONFIG_FB_MSM_TVOUT)
965/* tvout = 720 x 576 x 2(bpp) x 2(pages) */
966#define MSM_FB_EXT_BUF_SIZE 0x195000
967#else /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
968#define MSM_FB_EXT_BUF_SIZE 0
969#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
970
971#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE +\
972 MIPI_DSI_WRITEBACK_SIZE, 4096)
973
974#define MDP_VSYNC_GPIO 0
975
976static struct resource msm_fb_resources[] = {
977 {
978 .flags = IORESOURCE_DMA,
979 }
980};
981
982static struct platform_device msm_fb_device = {
983 .name = "msm_fb",
984 .id = 0,
985 .num_resources = ARRAY_SIZE(msm_fb_resources),
986 .resource = msm_fb_resources,
987};
988
989static bool dsi_power_on;
990
991static int mipi_dsi_panel_power(int on)
992{
993 static struct regulator *reg_l8, *reg_l23, *reg_l2;
994 static int gpio24, gpio43;
995 int rc;
996
997 struct pm_gpio gpio43_param = {
998 .direction = PM_GPIO_DIR_OUT,
999 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
1000 .output_value = 0,
1001 .pull = PM_GPIO_PULL_NO,
1002 .vin_sel = 2,
1003 .out_strength = PM_GPIO_STRENGTH_HIGH,
1004 .function = PM_GPIO_FUNC_PAIRED,
1005 .inv_int_pol = 0,
1006 .disable_pin = 0,
1007 };
1008
1009 struct pm_gpio gpio24_param = {
1010 .direction = PM_GPIO_DIR_OUT,
1011 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
1012 .output_value = 1,
1013 .pull = PM_GPIO_PULL_NO,
1014 .vin_sel = 2,
1015 .out_strength = PM_GPIO_STRENGTH_HIGH,
1016 .function = PM_GPIO_FUNC_NORMAL,
1017 .inv_int_pol = 0,
1018 .disable_pin = 0,
1019 };
1020
1021 pr_info("%s: state : %d\n", __func__, on);
1022
1023 if (!dsi_power_on) {
1024
1025 reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev,
1026 "dsi_vdc");
1027 if (IS_ERR(reg_l8)) {
1028 pr_err("could not get 8921_l8, rc = %ld\n",
1029 PTR_ERR(reg_l8));
1030 return -ENODEV;
1031 }
1032
1033 reg_l23 = regulator_get(&msm_mipi_dsi1_device.dev,
1034 "dsi_vddio");
1035 if (IS_ERR(reg_l23)) {
1036 pr_err("could not get 8921_l23, rc = %ld\n",
1037 PTR_ERR(reg_l23));
1038 return -ENODEV;
1039 }
1040
1041 reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
1042 "dsi_vdda");
1043 if (IS_ERR(reg_l2)) {
1044 pr_err("could not get 8921_l2, rc = %ld\n",
1045 PTR_ERR(reg_l2));
1046 return -ENODEV;
1047 }
1048
1049 rc = regulator_set_voltage(reg_l8, 2800000, 3000000);
1050 if (rc) {
1051 pr_err("set_voltage l8 failed, rc=%d\n", rc);
1052 return -EINVAL;
1053 }
1054 rc = regulator_set_voltage(reg_l23, 1800000, 1800000);
1055 if (rc) {
1056 pr_err("set_voltage l23 failed, rc=%d\n", rc);
1057 return -EINVAL;
1058 }
1059 rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
1060 if (rc) {
1061 pr_err("set_voltage l2 failed, rc=%d\n", rc);
1062 return -EINVAL;
1063 }
1064
1065 gpio43 = PM8921_GPIO_PM_TO_SYS(43);
1066 rc = gpio_request(gpio43, "disp_rst_n");
1067 if (rc) {
1068 pr_err("request gpio 43 failed, rc=%d\n", rc);
1069 return -ENODEV;
1070 }
1071
1072 gpio24 = PM8921_GPIO_PM_TO_SYS(24);
1073 rc = gpio_request(gpio24, "disp_backlight");
1074 if (rc) {
1075 pr_err("request gpio 24 failed, rc=%d\n", rc);
1076 return -EINVAL;
1077 }
1078 dsi_power_on = true;
1079 }
1080
1081 if (on) {
1082 rc = regulator_set_optimum_mode(reg_l8, 100000);
1083 if (rc < 0) {
1084 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
1085 return -EINVAL;
1086 }
1087 rc = regulator_set_optimum_mode(reg_l23, 100000);
1088 if (rc < 0) {
1089 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1090 return -EINVAL;
1091 }
1092 rc = regulator_set_optimum_mode(reg_l2, 100000);
1093 if (rc < 0) {
1094 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
1095 return -EINVAL;
1096 }
1097 rc = regulator_enable(reg_l8);
1098 if (rc) {
1099 pr_err("enable l8 failed, rc=%d\n", rc);
1100 return -ENODEV;
1101 }
1102 rc = regulator_enable(reg_l23);
1103 if (rc) {
1104 pr_err("enable l8 failed, rc=%d\n", rc);
1105 return -ENODEV;
1106 }
1107 rc = regulator_enable(reg_l2);
1108 if (rc) {
1109 pr_err("enable l2 failed, rc=%d\n", rc);
1110 return -ENODEV;
1111 }
1112
1113 gpio43_param.pull = PM_GPIO_PULL_NO;
1114 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1115 if (rc) {
1116 pr_err("gpio_config 43 failed (1), rc=%d\n", rc);
1117 return -EINVAL;
1118 }
1119 gpio43_param.pull = PM_GPIO_PULL_UP_30;
1120 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1121 if (rc) {
1122 pr_err("gpio_config 43 failed (2), rc=%d\n", rc);
1123 return -EINVAL;
1124 }
1125 gpio43_param.pull = PM_GPIO_PULL_NO;
1126 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1127 if (rc) {
1128 pr_err("gpio_config 43 failed (3), rc=%d\n", rc);
1129 return -EINVAL;
1130 }
1131 gpio43_param.pull = PM_GPIO_PULL_UP_30;
1132 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1133 if (rc) {
1134 pr_err("gpio_config 43 failed (4), rc=%d\n", rc);
1135 return -EINVAL;
1136 }
1137
1138 rc = pm8xxx_gpio_config(gpio24, &gpio24_param);
1139 if (rc) {
1140 pr_err("gpio_config 24 failed, rc=%d\n", rc);
1141 return -EINVAL;
1142 }
1143
1144 gpio_set_value_cansleep(gpio43, 1);
1145 } else {
1146 rc = regulator_set_optimum_mode(reg_l8, 100);
1147 if (rc < 0) {
1148 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
1149 return -EINVAL;
1150 }
1151 rc = regulator_set_optimum_mode(reg_l23, 100);
1152 if (rc < 0) {
1153 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1154 return -EINVAL;
1155 }
1156 rc = regulator_set_optimum_mode(reg_l2, 100);
1157 if (rc < 0) {
1158 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
1159 return -EINVAL;
1160 }
1161 gpio_set_value_cansleep(gpio43, 0);
1162 }
1163 return 0;
1164}
1165
1166static struct mipi_dsi_platform_data mipi_dsi_pdata = {
1167 .vsync_gpio = MDP_VSYNC_GPIO,
1168 .dsi_power_save = mipi_dsi_panel_power,
1169};
1170
1171#ifdef CONFIG_MSM_BUS_SCALING
1172
1173static struct msm_bus_vectors mdp_init_vectors[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001174 {
1175 .src = MSM_BUS_MASTER_MDP_PORT0,
1176 .dst = MSM_BUS_SLAVE_EBI_CH0,
1177 .ab = 0,
1178 .ib = 0,
1179 },
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001180};
1181
1182static struct msm_bus_vectors mdp_ui_vectors[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001183 {
1184 .src = MSM_BUS_MASTER_MDP_PORT0,
1185 .dst = MSM_BUS_SLAVE_EBI_CH0,
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001186 .ab = 216000000 * 2,
1187 .ib = 270000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001188 },
1189};
1190
1191static struct msm_bus_vectors mdp_vga_vectors[] = {
1192 /* VGA and less video */
1193 {
1194 .src = MSM_BUS_MASTER_MDP_PORT0,
1195 .dst = MSM_BUS_SLAVE_EBI_CH0,
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001196 .ab = 216000000 * 2,
1197 .ib = 270000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001198 },
1199};
1200
1201static struct msm_bus_vectors mdp_720p_vectors[] = {
1202 /* 720p and less video */
1203 {
1204 .src = MSM_BUS_MASTER_MDP_PORT0,
1205 .dst = MSM_BUS_SLAVE_EBI_CH0,
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001206 .ab = 230400000 * 2,
1207 .ib = 288000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001208 },
1209};
1210
1211static struct msm_bus_vectors mdp_1080p_vectors[] = {
1212 /* 1080p and less video */
1213 {
1214 .src = MSM_BUS_MASTER_MDP_PORT0,
1215 .dst = MSM_BUS_SLAVE_EBI_CH0,
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001216 .ab = 334080000 * 2,
1217 .ib = 417600000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001218 },
1219};
1220
1221static struct msm_bus_paths mdp_bus_scale_usecases[] = {
1222 {
1223 ARRAY_SIZE(mdp_init_vectors),
1224 mdp_init_vectors,
1225 },
1226 {
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001227 ARRAY_SIZE(mdp_ui_vectors),
1228 mdp_ui_vectors,
1229 },
1230 {
1231 ARRAY_SIZE(mdp_ui_vectors),
1232 mdp_ui_vectors,
1233 },
1234 {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001235 ARRAY_SIZE(mdp_vga_vectors),
1236 mdp_vga_vectors,
1237 },
1238 {
1239 ARRAY_SIZE(mdp_720p_vectors),
1240 mdp_720p_vectors,
1241 },
1242 {
1243 ARRAY_SIZE(mdp_1080p_vectors),
1244 mdp_1080p_vectors,
1245 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001246};
1247
1248static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
1249 mdp_bus_scale_usecases,
1250 ARRAY_SIZE(mdp_bus_scale_usecases),
1251 .name = "mdp",
1252};
1253
1254#endif
1255
1256int mdp_core_clk_rate_table[] = {
1257 85330000,
1258 85330000,
1259 128000000,
1260 200000000,
1261 200000000,
1262};
1263
1264static struct msm_panel_common_pdata mdp_pdata = {
1265 .gpio = MDP_VSYNC_GPIO,
1266 .mdp_core_clk_rate = 85330000,
1267 .mdp_core_clk_table = mdp_core_clk_rate_table,
1268 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
1269#ifdef CONFIG_MSM_BUS_SCALING
1270 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
1271#endif
1272 .mdp_rev = MDP_REV_42,
1273};
1274
1275static struct platform_device mipi_dsi_renesas_panel_device = {
1276 .name = "mipi_renesas",
1277 .id = 0,
1278};
1279
1280static struct platform_device mipi_dsi_simulator_panel_device = {
1281 .name = "mipi_simulator",
1282 .id = 0,
1283};
1284
1285static struct platform_device mipi_dsi_toshiba_panel_device = {
1286 .name = "mipi_toshiba",
1287 .id = 0,
1288};
1289
1290#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
1291static struct resource hdmi_msm_resources[] = {
1292 {
1293 .name = "hdmi_msm_qfprom_addr",
1294 .start = 0x00700000,
1295 .end = 0x007060FF,
1296 .flags = IORESOURCE_MEM,
1297 },
1298 {
1299 .name = "hdmi_msm_hdmi_addr",
1300 .start = 0x04A00000,
1301 .end = 0x04A00FFF,
1302 .flags = IORESOURCE_MEM,
1303 },
1304 {
1305 .name = "hdmi_msm_irq",
1306 .start = HDMI_IRQ,
1307 .end = HDMI_IRQ,
1308 .flags = IORESOURCE_IRQ,
1309 },
1310};
1311
1312static int hdmi_enable_5v(int on);
1313static int hdmi_core_power(int on, int show);
1314static int hdmi_cec_power(int on);
1315
1316static struct msm_hdmi_platform_data hdmi_msm_data = {
1317 .irq = HDMI_IRQ,
1318 .enable_5v = hdmi_enable_5v,
1319 .core_power = hdmi_core_power,
1320 .cec_power = hdmi_cec_power,
1321};
1322
1323static struct platform_device hdmi_msm_device = {
1324 .name = "hdmi_msm",
1325 .id = 0,
1326 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
1327 .resource = hdmi_msm_resources,
1328 .dev.platform_data = &hdmi_msm_data,
1329};
1330#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
1331
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001332#ifdef CONFIG_MSM_BUS_SCALING
1333static struct msm_bus_vectors dtv_bus_init_vectors[] = {
1334 {
1335 .src = MSM_BUS_MASTER_MDP_PORT0,
1336 .dst = MSM_BUS_SLAVE_EBI_CH0,
1337 .ab = 0,
1338 .ib = 0,
1339 },
1340};
1341static struct msm_bus_vectors dtv_bus_def_vectors[] = {
1342 {
1343 .src = MSM_BUS_MASTER_MDP_PORT0,
1344 .dst = MSM_BUS_SLAVE_EBI_CH0,
1345 .ab = 566092800 * 2,
1346 .ib = 707616000 * 2,
1347 },
1348};
1349static struct msm_bus_paths dtv_bus_scale_usecases[] = {
1350 {
1351 ARRAY_SIZE(dtv_bus_init_vectors),
1352 dtv_bus_init_vectors,
1353 },
1354 {
1355 ARRAY_SIZE(dtv_bus_def_vectors),
1356 dtv_bus_def_vectors,
1357 },
1358};
1359static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
1360 dtv_bus_scale_usecases,
1361 ARRAY_SIZE(dtv_bus_scale_usecases),
1362 .name = "dtv",
1363};
1364
1365static struct lcdc_platform_data dtv_pdata = {
1366 .bus_scale_table = &dtv_bus_scale_pdata,
1367};
1368#endif
1369
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001370static void __init msm_fb_add_devices(void)
1371{
1372 if (machine_is_msm8x60_rumi3()) {
1373 msm_fb_register_device("mdp", NULL);
1374 mipi_dsi_pdata.target_type = 1;
1375 } else
1376 msm_fb_register_device("mdp", &mdp_pdata);
1377 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001378#ifdef CONFIG_MSM_BUS_SCALING
1379 msm_fb_register_device("dtv", &dtv_pdata);
1380#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001381}
1382
1383#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
1384static struct gpiomux_setting hdmi_suspend_cfg = {
1385 .func = GPIOMUX_FUNC_GPIO,
1386 .drv = GPIOMUX_DRV_2MA,
1387 .pull = GPIOMUX_PULL_DOWN,
1388};
1389
1390static struct gpiomux_setting hdmi_active_1_cfg = {
1391 .func = GPIOMUX_FUNC_1,
1392 .drv = GPIOMUX_DRV_2MA,
1393 .pull = GPIOMUX_PULL_UP,
1394};
1395
1396static struct gpiomux_setting hdmi_active_2_cfg = {
1397 .func = GPIOMUX_FUNC_1,
1398 .drv = GPIOMUX_DRV_2MA,
1399 .pull = GPIOMUX_PULL_DOWN,
1400};
1401
1402static struct msm_gpiomux_config msm8960_hdmi_configs[] __initdata = {
1403 {
1404 .gpio = 99,
1405 .settings = {
1406 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
1407 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1408 },
1409 },
1410 {
1411 .gpio = 100,
1412 .settings = {
1413 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
1414 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1415 },
1416 },
1417 {
1418 .gpio = 101,
1419 .settings = {
1420 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
1421 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1422 },
1423 },
1424 {
1425 .gpio = 102,
1426 .settings = {
1427 [GPIOMUX_ACTIVE] = &hdmi_active_2_cfg,
1428 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1429 },
1430 },
1431};
1432
1433static int hdmi_enable_5v(int on)
1434{
1435 /* TBD: PM8921 regulator instead of 8901 */
1436 static struct regulator *reg_8921_hdmi_mvs; /* HDMI_5V */
1437 static int prev_on;
1438 int rc;
1439
1440 if (on == prev_on)
1441 return 0;
1442
1443 if (!reg_8921_hdmi_mvs)
1444 reg_8921_hdmi_mvs = regulator_get(&hdmi_msm_device.dev,
1445 "hdmi_mvs");
1446
1447 if (on) {
1448 rc = regulator_enable(reg_8921_hdmi_mvs);
1449 if (rc) {
1450 pr_err("'%s' regulator enable failed, rc=%d\n",
1451 "8921_hdmi_mvs", rc);
1452 return rc;
1453 }
1454 pr_debug("%s(on): success\n", __func__);
1455 } else {
1456 rc = regulator_disable(reg_8921_hdmi_mvs);
1457 if (rc)
1458 pr_warning("'%s' regulator disable failed, rc=%d\n",
1459 "8921_hdmi_mvs", rc);
1460 pr_debug("%s(off): success\n", __func__);
1461 }
1462
1463 prev_on = on;
1464
1465 return 0;
1466}
1467
1468static int hdmi_core_power(int on, int show)
1469{
1470 static struct regulator *reg_8921_l23, *reg_8921_s4;
1471 static int prev_on;
1472 int rc;
1473
1474 if (on == prev_on)
1475 return 0;
1476
1477 /* TBD: PM8921 regulator instead of 8901 */
1478 if (!reg_8921_l23)
1479 reg_8921_l23 = regulator_get(&hdmi_msm_device.dev, "hdmi_avdd");
1480
1481 if (!reg_8921_s4)
1482 reg_8921_s4 = regulator_get(&hdmi_msm_device.dev, "hdmi_vcc");
1483
1484 if (on) {
1485 rc = regulator_set_optimum_mode(reg_8921_l23, 100000);
1486 if (rc < 0) {
1487 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1488 return -EINVAL;
1489 }
1490
1491 rc = regulator_set_voltage(reg_8921_l23, 1800000, 1800000);
1492 if (!rc)
1493 rc = regulator_enable(reg_8921_l23);
1494 if (rc) {
1495 pr_err("'%s' regulator enable failed, rc=%d\n",
1496 "hdmi_avdd", rc);
1497 return rc;
1498 }
1499 rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000);
1500 if (!rc)
1501 rc = regulator_enable(reg_8921_s4);
1502 if (rc) {
1503 pr_err("'%s' regulator enable failed, rc=%d\n",
1504 "hdmi_vcc", rc);
1505 return rc;
1506 }
1507
1508 rc = gpio_request(100, "HDMI_DDC_CLK");
1509 if (rc) {
1510 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1511 "HDMI_DDC_CLK", 100, rc);
1512 goto error1;
1513 }
1514 rc = gpio_request(101, "HDMI_DDC_DATA");
1515 if (rc) {
1516 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1517 "HDMI_DDC_DATA", 101, rc);
1518 goto error2;
1519 }
1520 rc = gpio_request(102, "HDMI_HPD");
1521 if (rc) {
1522 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1523 "HDMI_HPD", 102, rc);
1524 goto error3;
1525 }
1526 pr_debug("%s(on): success\n", __func__);
1527 } else {
1528 gpio_free(100);
1529 gpio_free(101);
1530 gpio_free(102);
1531
1532 rc = regulator_set_optimum_mode(reg_8921_l23, 100);
1533 if (rc < 0) {
1534 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1535 return -EINVAL;
1536 }
1537
1538 pr_debug("%s(off): success\n", __func__);
1539 }
1540
1541 prev_on = on;
1542
1543 return 0;
1544
1545error3:
1546 gpio_free(101);
1547error2:
1548 gpio_free(100);
1549error1:
1550 regulator_disable(reg_8921_l23);
1551 return rc;
1552}
1553
1554static int hdmi_cec_power(int on)
1555{
1556 static int prev_on;
1557 int rc;
1558
1559 if (on == prev_on)
1560 return 0;
1561
1562 if (on) {
1563 rc = gpio_request(99, "HDMI_CEC_VAR");
1564 if (rc) {
1565 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1566 "HDMI_CEC_VAR", 99, rc);
1567 goto error;
1568 }
1569 pr_debug("%s(on): success\n", __func__);
1570 } else {
1571 gpio_free(99);
1572 pr_debug("%s(off): success\n", __func__);
1573 }
1574
1575 prev_on = on;
1576
1577 return 0;
1578error:
1579 return rc;
1580}
1581#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
1582
1583static void __init msm8960_allocate_memory_regions(void)
1584{
1585 void *addr;
1586 unsigned long size;
1587
1588 size = MSM_FB_SIZE;
1589 addr = alloc_bootmem_align(size, 0x1000);
1590 msm_fb_resources[0].start = __pa(addr);
1591 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
1592 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
1593 size, addr, __pa(addr));
1594
1595}
1596#ifdef CONFIG_WCD9310_CODEC
1597
1598#define TABLA_INTERRUPT_BASE (NR_MSM_IRQS + NR_GPIO_IRQS + NR_PM8921_IRQS)
1599
1600static struct tabla_pdata tabla_platform_data = {
1601 .slimbus_slave_device = {
1602 .name = "tabla-slave",
1603 .e_addr = {0, 0, 0x10, 0, 0x17, 2},
1604 },
1605 .irq = MSM_GPIO_TO_INT(62),
1606 .irq_base = TABLA_INTERRUPT_BASE,
1607 .num_irqs = NR_TABLA_IRQS,
1608 .reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
1609};
1610
1611static struct slim_device msm_slim_tabla = {
1612 .name = "tabla-slim",
1613 .e_addr = {0, 1, 0x10, 0, 0x17, 2},
1614 .dev = {
1615 .platform_data = &tabla_platform_data,
1616 },
1617};
1618#endif
1619
1620static struct slim_boardinfo msm_slim_devices[] = {
1621#ifdef CONFIG_WCD9310_CODEC
1622 {
1623 .bus_num = 1,
1624 .slim_slave = &msm_slim_tabla,
1625 },
1626#endif
1627 /* add more slimbus slaves as needed */
1628};
1629
Yunsen Wang5c1a7392011-07-09 19:10:16 -07001630#define MSM_WCNSS_PHYS 0x03000000
1631#define MSM_WCNSS_SIZE 0x280000
1632
1633static struct resource resources_wcnss_wlan[] = {
1634 {
1635 .start = RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ,
1636 .end = RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ,
1637 .name = "wcnss_wlanrx_irq",
1638 .flags = IORESOURCE_IRQ,
1639 },
1640 {
1641 .start = RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ,
1642 .end = RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ,
1643 .name = "wcnss_wlantx_irq",
1644 .flags = IORESOURCE_IRQ,
1645 },
1646 {
1647 .start = MSM_WCNSS_PHYS,
1648 .end = MSM_WCNSS_PHYS + MSM_WCNSS_SIZE - 1,
1649 .name = "wcnss_mmio",
1650 .flags = IORESOURCE_MEM,
1651 },
1652};
1653
1654static struct platform_device msm_device_wcnss_wlan = {
1655 .name = "wcnss_wlan",
1656 .id = 0,
1657 .num_resources = ARRAY_SIZE(resources_wcnss_wlan),
1658 .resource = resources_wcnss_wlan,
1659};
1660
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001661#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
1662 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
1663 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
1664 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
1665
1666#define QCE_SIZE 0x10000
1667#define QCE_0_BASE 0x18500000
1668
1669#define QCE_HW_KEY_SUPPORT 0
1670#define QCE_SHA_HMAC_SUPPORT 1
1671#define QCE_SHARE_CE_RESOURCE 1
1672#define QCE_CE_SHARED 0
1673
1674static struct resource qcrypto_resources[] = {
1675 [0] = {
1676 .start = QCE_0_BASE,
1677 .end = QCE_0_BASE + QCE_SIZE - 1,
1678 .flags = IORESOURCE_MEM,
1679 },
1680 [1] = {
1681 .name = "crypto_channels",
1682 .start = DMOV_CE_IN_CHAN,
1683 .end = DMOV_CE_OUT_CHAN,
1684 .flags = IORESOURCE_DMA,
1685 },
1686 [2] = {
1687 .name = "crypto_crci_in",
1688 .start = DMOV_CE_IN_CRCI,
1689 .end = DMOV_CE_IN_CRCI,
1690 .flags = IORESOURCE_DMA,
1691 },
1692 [3] = {
1693 .name = "crypto_crci_out",
1694 .start = DMOV_CE_OUT_CRCI,
1695 .end = DMOV_CE_OUT_CRCI,
1696 .flags = IORESOURCE_DMA,
1697 },
1698};
1699
1700static struct resource qcedev_resources[] = {
1701 [0] = {
1702 .start = QCE_0_BASE,
1703 .end = QCE_0_BASE + QCE_SIZE - 1,
1704 .flags = IORESOURCE_MEM,
1705 },
1706 [1] = {
1707 .name = "crypto_channels",
1708 .start = DMOV_CE_IN_CHAN,
1709 .end = DMOV_CE_OUT_CHAN,
1710 .flags = IORESOURCE_DMA,
1711 },
1712 [2] = {
1713 .name = "crypto_crci_in",
1714 .start = DMOV_CE_IN_CRCI,
1715 .end = DMOV_CE_IN_CRCI,
1716 .flags = IORESOURCE_DMA,
1717 },
1718 [3] = {
1719 .name = "crypto_crci_out",
1720 .start = DMOV_CE_OUT_CRCI,
1721 .end = DMOV_CE_OUT_CRCI,
1722 .flags = IORESOURCE_DMA,
1723 },
1724};
1725
1726#endif
1727
1728#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
1729 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
1730
1731static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
1732 .ce_shared = QCE_CE_SHARED,
1733 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
1734 .hw_key_support = QCE_HW_KEY_SUPPORT,
1735 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
1736};
1737
1738static struct platform_device qcrypto_device = {
1739 .name = "qcrypto",
1740 .id = 0,
1741 .num_resources = ARRAY_SIZE(qcrypto_resources),
1742 .resource = qcrypto_resources,
1743 .dev = {
1744 .coherent_dma_mask = DMA_BIT_MASK(32),
1745 .platform_data = &qcrypto_ce_hw_suppport,
1746 },
1747};
1748#endif
1749
1750#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
1751 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
1752
1753static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
1754 .ce_shared = QCE_CE_SHARED,
1755 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
1756 .hw_key_support = QCE_HW_KEY_SUPPORT,
1757 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
1758};
1759
1760static struct platform_device qcedev_device = {
1761 .name = "qce",
1762 .id = 0,
1763 .num_resources = ARRAY_SIZE(qcedev_resources),
1764 .resource = qcedev_resources,
1765 .dev = {
1766 .coherent_dma_mask = DMA_BIT_MASK(32),
1767 .platform_data = &qcedev_ce_hw_suppport,
1768 },
1769};
1770#endif
1771
1772
1773static int __init gpiomux_init(void)
1774{
1775 int rc;
1776
1777 rc = msm_gpiomux_init(NR_GPIO_IRQS);
1778 if (rc) {
1779 pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
1780 return rc;
1781 }
1782
1783 msm_gpiomux_install(msm8960_cam_configs,
1784 ARRAY_SIZE(msm8960_cam_configs));
1785
1786 msm_gpiomux_install(msm8960_gpiomux_configs,
1787 ARRAY_SIZE(msm8960_gsbi_configs));
1788
1789 msm_gpiomux_install(msm8960_gsbi_configs,
1790 ARRAY_SIZE(msm8960_gsbi_configs));
1791
1792 msm_gpiomux_install(msm8960_cyts_configs,
1793 ARRAY_SIZE(msm8960_cyts_configs));
1794
1795 msm_gpiomux_install(msm8960_slimbus_config,
1796 ARRAY_SIZE(msm8960_slimbus_config));
1797
1798 msm_gpiomux_install(msm8960_audio_codec_configs,
1799 ARRAY_SIZE(msm8960_audio_codec_configs));
1800
1801#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
1802 msm_gpiomux_install(msm8960_hdmi_configs,
1803 ARRAY_SIZE(msm8960_hdmi_configs));
1804#endif
1805
1806 msm_gpiomux_install(wcnss_5wire_interface,
1807 ARRAY_SIZE(wcnss_5wire_interface));
1808
1809 return 0;
1810}
1811
1812static struct msm_acpu_clock_platform_data msm8960_acpu_clock_data = {
1813 .acpu_switch_time_us = 0,
1814 .vdd_switch_time_us = 0,
1815};
1816
1817#define MSM_SHARED_RAM_PHYS 0x80000000
1818
1819static struct pm8921_adc_amux pm8921_adc_channels_data[] = {
1820 {"vcoin", CHANNEL_VCOIN, CHAN_PATH_SCALING2, AMUX_RSV1,
1821 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1822 {"vbat", CHANNEL_VBAT, CHAN_PATH_SCALING2, AMUX_RSV1,
1823 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1824 {"dcin", CHANNEL_DCIN, CHAN_PATH_SCALING4, AMUX_RSV1,
1825 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1826 {"ichg", CHANNEL_ICHG, CHAN_PATH_SCALING1, AMUX_RSV1,
1827 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1828 {"vph_pwr", CHANNEL_VPH_PWR, CHAN_PATH_SCALING2, AMUX_RSV1,
1829 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1830 {"ibat", CHANNEL_IBAT, CHAN_PATH_SCALING1, AMUX_RSV1,
1831 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1832 {"m4", CHANNEL_MPP_1, CHAN_PATH_SCALING1, AMUX_RSV1,
1833 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1834 {"m5", CHANNEL_MPP_2, CHAN_PATH_SCALING2, AMUX_RSV1,
1835 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1836 {"batt_therm", CHANNEL_BATT_THERM, CHAN_PATH_SCALING1, AMUX_RSV2,
1837 ADC_DECIMATION_TYPE2, ADC_SCALE_BATT_THERM},
1838 {"batt_id", CHANNEL_BATT_ID, CHAN_PATH_SCALING1, AMUX_RSV1,
1839 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1840 {"usbin", CHANNEL_USBIN, CHAN_PATH_SCALING3, AMUX_RSV1,
1841 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1842 {"pmic_therm", CHANNEL_DIE_TEMP, CHAN_PATH_SCALING1, AMUX_RSV1,
1843 ADC_DECIMATION_TYPE2, ADC_SCALE_PMIC_THERM},
1844 {"625mv", CHANNEL_625MV, CHAN_PATH_SCALING1, AMUX_RSV1,
1845 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1846 {"125v", CHANNEL_125V, CHAN_PATH_SCALING1, AMUX_RSV1,
1847 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1848 {"chg_temp", CHANNEL_CHG_TEMP, CHAN_PATH_SCALING1, AMUX_RSV1,
1849 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1850};
1851
1852static struct pm8921_adc_properties pm8921_adc_data = {
1853 .adc_vdd_reference = 1800, /* milli-voltage for this adc */
1854 .bitresolution = 15,
1855 .bipolar = 0,
1856};
1857
1858static struct pm8921_adc_platform_data pm8921_adc_pdata = {
1859 .adc_channel = pm8921_adc_channels_data,
1860 .adc_num_channel = ARRAY_SIZE(pm8921_adc_channels_data),
1861 .adc_prop = &pm8921_adc_data,
1862};
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08001863
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001864static void __init msm8960_map_io(void)
1865{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001866 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001867 msm_map_msm8960_io();
1868}
1869
1870static void __init msm8960_init_irq(void)
1871{
1872 unsigned int i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001873
1874 msm_mpm_irq_extn_init();
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001875 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001876 (void *)MSM_QGIC_CPU_BASE);
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001877
1878 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001879 writel_relaxed(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001880
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001881 writel_relaxed(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
1882 mb();
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08001883
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001884 /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
1885 * as they are configured as level, which does not play nice with
1886 * handle_percpu_irq.
1887 */
1888 for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
1889 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
Thomas Gleixner6845664a2011-03-24 13:25:22 +01001890 irq_set_handler(i, handle_percpu_irq);
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001891 }
1892}
1893
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001894/* MSM8960 have 5 SDCC controllers */
1895enum sdcc_controllers {
1896 SDCC1,
1897 SDCC2,
1898 SDCC3,
1899 SDCC4,
1900 SDCC5,
1901 MAX_SDCC_CONTROLLER
1902};
1903
1904/* All SDCC controllers requires VDD/VCC voltage */
1905static struct msm_mmc_reg_data mmc_vdd_reg_data[MAX_SDCC_CONTROLLER] = {
1906 /* SDCC1 : eMMC card connected */
1907 [SDCC1] = {
1908 .name = "sdc_vdd",
1909 .set_voltage_sup = 1,
1910 .level = 2950000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001911 .hpm_uA = 200000, /* 200mA */
1912 },
1913 /* SDCC3 : External card slot connected */
1914 [SDCC3] = {
1915 .name = "sdc_vdd",
1916 .set_voltage_sup = 1,
1917 .level = 2950000,
1918 .hpm_uA = 600000, /* 600mA */
1919 }
1920};
1921
1922/* Only slots having eMMC card will require VCCQ voltage */
1923static struct msm_mmc_reg_data mmc_vccq_reg_data[1] = {
1924 /* SDCC1 : eMMC card connected */
1925 [SDCC1] = {
1926 .name = "sdc_vccq",
1927 .set_voltage_sup = 1,
1928 .always_on = 1,
1929 .level = 1800000,
1930 .hpm_uA = 200000, /* 200mA */
1931 }
1932};
1933
1934/* All SDCC controllers may require voting for VDD PAD voltage */
1935static struct msm_mmc_reg_data mmc_vddp_reg_data[MAX_SDCC_CONTROLLER] = {
1936 /* SDCC3 : External card slot connected */
1937 [SDCC3] = {
1938 .name = "sdc_vddp",
1939 .set_voltage_sup = 1,
1940 .level = 2950000,
1941 .always_on = 1,
1942 .lpm_sup = 1,
1943 /* Max. Active current required is 16 mA */
1944 .hpm_uA = 16000,
1945 /*
1946 * Sleep current required is ~300 uA. But min. vote can be
1947 * in terms of mA (min. 1 mA). So let's vote for 2 mA
1948 * during sleep.
1949 */
1950 .lpm_uA = 2000,
1951 }
1952};
1953
1954static struct msm_mmc_slot_reg_data mmc_slot_vreg_data[MAX_SDCC_CONTROLLER] = {
1955 /* SDCC1 : eMMC card connected */
1956 [SDCC1] = {
1957 .vdd_data = &mmc_vdd_reg_data[SDCC1],
1958 .vccq_data = &mmc_vccq_reg_data[SDCC1],
1959 },
1960 /* SDCC3 : External card slot connected */
1961 [SDCC3] = {
1962 .vdd_data = &mmc_vdd_reg_data[SDCC3],
1963 .vddp_data = &mmc_vddp_reg_data[SDCC3],
1964 }
1965};
1966
1967/* SDC1 pad data */
1968static struct msm_mmc_pad_drv sdc1_pad_drv_on_cfg[] = {
1969 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_16MA},
1970 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_10MA},
1971 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_10MA}
1972};
1973
1974static struct msm_mmc_pad_drv sdc1_pad_drv_off_cfg[] = {
1975 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_2MA},
1976 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_2MA},
1977 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_2MA}
1978};
1979
1980static struct msm_mmc_pad_pull sdc1_pad_pull_on_cfg[] = {
1981 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_UP},
1982 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_UP}
1983};
1984
1985static struct msm_mmc_pad_pull sdc1_pad_pull_off_cfg[] = {
1986 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_DOWN},
1987 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_DOWN}
1988};
1989
1990/* SDC3 pad data */
1991static struct msm_mmc_pad_drv sdc3_pad_drv_on_cfg[] = {
1992 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
1993 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
1994 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
1995};
1996
1997static struct msm_mmc_pad_drv sdc3_pad_drv_off_cfg[] = {
1998 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
1999 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
2000 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
2001};
2002
2003static struct msm_mmc_pad_pull sdc3_pad_pull_on_cfg[] = {
2004 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
2005 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
2006};
2007
2008static struct msm_mmc_pad_pull sdc3_pad_pull_off_cfg[] = {
2009 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
2010 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
2011};
2012
2013struct msm_mmc_pad_pull_data mmc_pad_pull_data[MAX_SDCC_CONTROLLER] = {
2014 [SDCC1] = {
2015 .on = sdc1_pad_pull_on_cfg,
2016 .off = sdc1_pad_pull_off_cfg,
2017 .size = ARRAY_SIZE(sdc1_pad_pull_on_cfg)
2018 },
2019 [SDCC3] = {
2020 .on = sdc3_pad_pull_on_cfg,
2021 .off = sdc3_pad_pull_off_cfg,
2022 .size = ARRAY_SIZE(sdc3_pad_pull_on_cfg)
2023 },
2024};
2025
2026struct msm_mmc_pad_drv_data mmc_pad_drv_data[MAX_SDCC_CONTROLLER] = {
2027 [SDCC1] = {
2028 .on = sdc1_pad_drv_on_cfg,
2029 .off = sdc1_pad_drv_off_cfg,
2030 .size = ARRAY_SIZE(sdc1_pad_drv_on_cfg)
2031 },
2032 [SDCC3] = {
2033 .on = sdc3_pad_drv_on_cfg,
2034 .off = sdc3_pad_drv_off_cfg,
2035 .size = ARRAY_SIZE(sdc3_pad_drv_on_cfg)
2036 },
2037};
2038
2039struct msm_mmc_pad_data mmc_pad_data[MAX_SDCC_CONTROLLER] = {
2040 [SDCC1] = {
2041 .pull = &mmc_pad_pull_data[SDCC1],
2042 .drv = &mmc_pad_drv_data[SDCC1]
2043 },
2044 [SDCC3] = {
2045 .pull = &mmc_pad_pull_data[SDCC3],
2046 .drv = &mmc_pad_drv_data[SDCC3]
2047 },
2048};
2049
2050struct msm_mmc_pin_data mmc_slot_pin_data[MAX_SDCC_CONTROLLER] = {
2051 [SDCC1] = {
2052 .pad_data = &mmc_pad_data[SDCC1],
2053 },
2054 [SDCC3] = {
2055 .pad_data = &mmc_pad_data[SDCC3],
2056 },
2057};
2058
2059static unsigned int sdc1_sup_clk_rates[] = {
Subhash Jadavanib808efac2011-06-27 15:14:07 -07002060 400000, 24000000, 48000000, 96000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002061};
2062
2063static unsigned int sdc3_sup_clk_rates[] = {
2064 400000, 24000000, 48000000, 96000000
2065};
2066
2067#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
2068static struct mmc_platform_data msm8960_sdc1_data = {
2069 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
2070#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
2071 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
2072#else
2073 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
2074#endif
2075 .sup_clk_table = sdc1_sup_clk_rates,
2076 .sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
2077 .nonremovable = 1,
2078 .sdcc_v4_sup = true,
2079 .vreg_data = &mmc_slot_vreg_data[SDCC1],
Subhash Jadavanib808efac2011-06-27 15:14:07 -07002080 .pin_data = &mmc_slot_pin_data[SDCC1],
2081 .uhs_caps = MMC_CAP_1_8V_DDR
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002082};
2083#endif
2084
2085#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
2086static struct mmc_platform_data msm8960_sdc3_data = {
2087 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
2088 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
2089 .sup_clk_table = sdc3_sup_clk_rates,
2090 .sup_clk_cnt = ARRAY_SIZE(sdc3_sup_clk_rates),
2091 .wpswitch_gpio = PM8921_GPIO_PM_TO_SYS(16),
2092 .sdcc_v4_sup = true,
2093 .vreg_data = &mmc_slot_vreg_data[SDCC3],
2094 .pin_data = &mmc_slot_pin_data[SDCC3],
2095#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
2096 .status_gpio = PM8921_GPIO_PM_TO_SYS(26),
2097 .status_irq = PM8921_GPIO_IRQ(PM8921_IRQ_BASE, 26),
2098 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
2099#endif
2100 .xpc_cap = 1,
2101 .uhs_caps = (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
2102 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_DDR50 |
Subhash Jadavanib808efac2011-06-27 15:14:07 -07002103 MMC_CAP_MAX_CURRENT_600 | MMC_CAP_1_8V_DDR)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002104};
2105#endif
2106
2107static void __init msm8960_init_mmc(void)
2108{
2109#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
2110 /* SDC1 : eMMC card connected */
2111 msm_add_sdcc(1, &msm8960_sdc1_data);
2112#endif
2113#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
2114 /* SDC3: External card slot */
2115 msm_add_sdcc(3, &msm8960_sdc3_data);
2116#endif
2117}
2118
2119static void __init msm8960_init_buses(void)
2120{
2121#ifdef CONFIG_MSM_BUS_SCALING
2122 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
2123 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
2124 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
2125 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
2126 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
2127 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
2128 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
2129 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
2130 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
2131 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
2132#endif
2133}
2134
2135static struct msm_spi_platform_data msm8960_qup_spi_gsbi1_pdata = {
2136 .max_clock_speed = 15060000,
2137};
2138
2139#ifdef CONFIG_USB_MSM_OTG_72K
2140static struct msm_otg_platform_data msm_otg_pdata;
2141#else
2142#define USB_5V_EN 42
2143static void msm_hsusb_vbus_power(bool on)
2144{
2145 int rc;
2146 static bool vbus_is_on;
2147 static struct regulator *mvs_otg_switch;
2148 struct pm_gpio param = {
2149 .direction = PM_GPIO_DIR_OUT,
2150 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
2151 .output_value = 1,
2152 .pull = PM_GPIO_PULL_NO,
2153 .vin_sel = PM_GPIO_VIN_S4,
2154 .out_strength = PM_GPIO_STRENGTH_MED,
2155 .function = PM_GPIO_FUNC_NORMAL,
2156 };
2157
2158 if (vbus_is_on == on)
2159 return;
2160
2161 if (on) {
2162 mvs_otg_switch = regulator_get(&msm_device_otg.dev, "vbus_otg");
2163 if (IS_ERR(mvs_otg_switch)) {
2164 pr_err("Unable to get mvs_otg_switch\n");
2165 return;
2166 }
2167
2168 rc = gpio_request(PM8921_GPIO_PM_TO_SYS(USB_5V_EN),
2169 "usb_5v_en");
2170 if (rc < 0) {
2171 pr_err("failed to request usb_5v_en gpio\n");
2172 goto put_mvs_otg;
2173 }
2174
2175 if (regulator_enable(mvs_otg_switch)) {
2176 pr_err("unable to enable mvs_otg_switch\n");
2177 goto free_usb_5v_en;
2178 }
2179
2180 rc = pm8xxx_gpio_config(PM8921_GPIO_PM_TO_SYS(USB_5V_EN),
2181 &param);
2182 if (rc < 0) {
2183 pr_err("failed to configure usb_5v_en gpio\n");
2184 goto disable_mvs_otg;
2185 }
2186 vbus_is_on = true;
2187 return;
2188 }
2189disable_mvs_otg:
2190 regulator_disable(mvs_otg_switch);
2191free_usb_5v_en:
2192 gpio_free(PM8921_GPIO_PM_TO_SYS(USB_5V_EN));
2193put_mvs_otg:
2194 regulator_put(mvs_otg_switch);
2195 vbus_is_on = false;
2196}
2197
2198static struct msm_otg_platform_data msm_otg_pdata = {
2199 .mode = USB_OTG,
2200 .otg_control = OTG_PMIC_CONTROL,
2201 .phy_type = SNPS_28NM_INTEGRATED_PHY,
2202 .pclk_src_name = "dfab_usb_hs_clk",
2203 .pmic_id_irq = PM8921_USB_ID_IN_IRQ(PM8921_IRQ_BASE),
2204 .vbus_power = msm_hsusb_vbus_power,
2205};
2206#endif
2207
2208#define PID_MAGIC_ID 0x71432909
2209#define SERIAL_NUM_MAGIC_ID 0x61945374
2210#define SERIAL_NUMBER_LENGTH 127
2211#define DLOAD_USB_BASE_ADD 0x2A03F0C8
2212
2213struct magic_num_struct {
2214 uint32_t pid;
2215 uint32_t serial_num;
2216};
2217
2218struct dload_struct {
2219 uint32_t reserved1;
2220 uint32_t reserved2;
2221 uint32_t reserved3;
2222 uint16_t reserved4;
2223 uint16_t pid;
2224 char serial_number[SERIAL_NUMBER_LENGTH];
2225 uint16_t reserved5;
2226 struct magic_num_struct magic_struct;
2227};
2228
2229static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
2230{
2231 struct dload_struct __iomem *dload = 0;
2232
2233 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
2234 if (!dload) {
2235 pr_err("%s: cannot remap I/O memory region: %08x\n",
2236 __func__, DLOAD_USB_BASE_ADD);
2237 return -ENXIO;
2238 }
2239
2240 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
2241 __func__, dload, pid, snum);
2242 /* update pid */
2243 dload->magic_struct.pid = PID_MAGIC_ID;
2244 dload->pid = pid;
2245
2246 /* update serial number */
2247 dload->magic_struct.serial_num = 0;
2248 if (!snum) {
2249 memset(dload->serial_number, 0, SERIAL_NUMBER_LENGTH);
2250 goto out;
2251 }
2252
2253 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
2254 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
2255 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
2256out:
2257 iounmap(dload);
2258 return 0;
2259}
2260
2261static struct android_usb_platform_data android_usb_pdata = {
2262 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
2263};
2264
2265struct platform_device android_usb_device = {
2266 .name = "android_usb",
2267 .id = -1,
2268 .dev = {
2269 .platform_data = &android_usb_pdata,
2270 },
2271};
2272
2273static uint8_t spm_wfi_cmd_sequence[] __initdata = {
2274 0x03, 0x0f,
2275};
2276
2277static uint8_t spm_power_collapse_without_rpm[] __initdata = {
2278 0x00, 0x24, 0x54, 0x10,
2279 0x09, 0x03, 0x01,
2280 0x10, 0x54, 0x30, 0x0C,
2281 0x24, 0x30, 0x0f,
2282};
2283
2284static uint8_t spm_power_collapse_with_rpm[] __initdata = {
2285 0x00, 0x24, 0x54, 0x10,
2286 0x09, 0x07, 0x01, 0x0B,
2287 0x10, 0x54, 0x30, 0x0C,
2288 0x24, 0x30, 0x0f,
2289};
2290
2291static struct msm_spm_seq_entry msm_spm_seq_list[] __initdata = {
2292 [0] = {
2293 .mode = MSM_SPM_MODE_CLOCK_GATING,
2294 .notify_rpm = false,
2295 .cmd = spm_wfi_cmd_sequence,
2296 },
2297 [1] = {
2298 .mode = MSM_SPM_MODE_POWER_COLLAPSE,
2299 .notify_rpm = false,
2300 .cmd = spm_power_collapse_without_rpm,
2301 },
2302 [2] = {
2303 .mode = MSM_SPM_MODE_POWER_COLLAPSE,
2304 .notify_rpm = true,
2305 .cmd = spm_power_collapse_with_rpm,
2306 },
2307};
2308
2309static struct msm_spm_platform_data msm_spm_data[] __initdata = {
2310 [0] = {
2311 .reg_base_addr = MSM_SAW0_BASE,
2312 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
2313 .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
2314 .reg_init_values[MSM_SPM_REG_SAW2_VCTL] = 0x9C,
2315#if defined(CONFIG_MSM_AVS_HW)
2316 .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
2317 .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
2318#endif
2319 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
2320 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
2321 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
2322 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
2323 .vctl_timeout_us = 50,
2324 .num_modes = ARRAY_SIZE(msm_spm_seq_list),
2325 .modes = msm_spm_seq_list,
2326 },
2327 [1] = {
2328 .reg_base_addr = MSM_SAW1_BASE,
2329 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
2330 .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
2331 .reg_init_values[MSM_SPM_REG_SAW2_VCTL] = 0x9C,
2332#if defined(CONFIG_MSM_AVS_HW)
2333 .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
2334 .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
2335#endif
2336 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
2337 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
2338 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
2339 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
2340 .vctl_timeout_us = 50,
2341 .num_modes = ARRAY_SIZE(msm_spm_seq_list),
2342 .modes = msm_spm_seq_list,
2343 },
2344};
2345
2346static uint8_t l2_spm_wfi_cmd_sequence[] __initdata = {
2347 0x00, 0x20, 0x03, 0x20,
2348 0x00, 0x0f,
2349};
2350
2351static uint8_t l2_spm_gdhs_cmd_sequence[] __initdata = {
2352 0x00, 0x20, 0x34, 0x64,
2353 0x48, 0x07, 0x48, 0x20,
2354 0x50, 0x64, 0x04, 0x34,
2355 0x50, 0x0f,
2356};
2357static uint8_t l2_spm_power_off_cmd_sequence[] __initdata = {
2358 0x00, 0x10, 0x34, 0x64,
2359 0x48, 0x07, 0x48, 0x10,
2360 0x50, 0x64, 0x04, 0x34,
2361 0x50, 0x0F,
2362};
2363
2364static struct msm_spm_seq_entry msm_spm_l2_seq_list[] __initdata = {
2365 [0] = {
2366 .mode = MSM_SPM_L2_MODE_RETENTION,
2367 .notify_rpm = false,
2368 .cmd = l2_spm_wfi_cmd_sequence,
2369 },
2370 [1] = {
2371 .mode = MSM_SPM_L2_MODE_GDHS,
2372 .notify_rpm = true,
2373 .cmd = l2_spm_gdhs_cmd_sequence,
2374 },
2375 [2] = {
2376 .mode = MSM_SPM_L2_MODE_POWER_COLLAPSE,
2377 .notify_rpm = true,
2378 .cmd = l2_spm_power_off_cmd_sequence,
2379 },
2380};
2381
2382
2383static struct msm_spm_platform_data msm_spm_l2_data[] __initdata = {
2384 [0] = {
2385 .reg_base_addr = MSM_SAW_L2_BASE,
2386 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
2387 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x00,
2388 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
2389 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x00A000AE,
2390 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x00A00020,
2391 .modes = msm_spm_l2_seq_list,
2392 .num_modes = ARRAY_SIZE(msm_spm_l2_seq_list),
2393 },
2394};
2395
2396#define CYTTSP_TS_GPIO_IRQ 11
2397#define CYTTSP_TS_SLEEP_GPIO 50
2398#define CYTTSP_TS_RESOUT_N_GPIO 52
2399
2400/*virtual key support */
2401static ssize_t tma340_vkeys_show(struct kobject *kobj,
2402 struct kobj_attribute *attr, char *buf)
2403{
2404 return snprintf(buf, 200,
2405 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":73:1120:97:97"
2406 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":230:1120:97:97"
2407 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":389:1120:97:97"
2408 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":544:1120:97:97"
2409 "\n");
2410}
2411
2412static struct kobj_attribute tma340_vkeys_attr = {
2413 .attr = {
2414 .mode = S_IRUGO,
2415 },
2416 .show = &tma340_vkeys_show,
2417};
2418
2419static struct attribute *tma340_properties_attrs[] = {
2420 &tma340_vkeys_attr.attr,
2421 NULL
2422};
2423
2424static struct attribute_group tma340_properties_attr_group = {
2425 .attrs = tma340_properties_attrs,
2426};
2427
2428
2429static int cyttsp_platform_init(struct i2c_client *client)
2430{
2431 int rc = 0;
2432 static struct kobject *tma340_properties_kobj;
2433
2434 tma340_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
2435 tma340_properties_kobj = kobject_create_and_add("board_properties",
2436 NULL);
2437 if (tma340_properties_kobj)
2438 rc = sysfs_create_group(tma340_properties_kobj,
2439 &tma340_properties_attr_group);
2440 if (!tma340_properties_kobj || rc)
2441 pr_err("%s: failed to create board_properties\n",
2442 __func__);
2443
2444 return 0;
2445}
2446
2447static struct cyttsp_regulator regulator_data[] = {
2448 {
2449 .name = "vdd",
2450 .min_uV = CY_TMA300_VTG_MIN_UV,
2451 .max_uV = CY_TMA300_VTG_MAX_UV,
2452 .load_uA = CY_TMA300_CURR_24HZ_UA,
2453 },
2454 /* TODO: Remove after runtime PM is enabled in I2C driver */
2455 {
2456 .name = "vcc_i2c",
2457 .min_uV = CY_I2C_VTG_MIN_UV,
2458 .max_uV = CY_I2C_VTG_MAX_UV,
2459 .load_uA = CY_I2C_CURR_UA,
2460 },
2461};
2462
2463static struct cyttsp_platform_data cyttsp_pdata = {
2464 .panel_maxx = 634,
2465 .panel_maxy = 1166,
2466 .disp_maxx = 616,
2467 .disp_maxy = 1023,
2468 .disp_minx = 0,
2469 .disp_miny = 16,
2470 .flags = 0x01,
2471 .gen = CY_GEN3, /* or */
2472 .use_st = CY_USE_ST,
2473 .use_mt = CY_USE_MT,
2474 .use_hndshk = CY_SEND_HNDSHK,
2475 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05302476 .use_sleep = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002477 .use_gestures = CY_USE_GESTURES,
2478 .fw_fname = "cyttsp_8960_cdp.hex",
2479 /* activate up to 4 groups
2480 * and set active distance
2481 */
2482 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
2483 CY_GEST_GRP3 | CY_GEST_GRP4 |
2484 CY_ACT_DIST,
2485 /* change act_intrvl to customize the Active power state
2486 * scanning/processing refresh interval for Operating mode
2487 */
2488 .act_intrvl = CY_ACT_INTRVL_DFLT,
2489 /* change tch_tmout to customize the touch timeout for the
2490 * Active power state for Operating mode
2491 */
2492 .tch_tmout = CY_TCH_TMOUT_DFLT,
2493 /* change lp_intrvl to customize the Low Power power state
2494 * scanning/processing refresh interval for Operating mode
2495 */
2496 .lp_intrvl = CY_LP_INTRVL_DFLT,
2497 .sleep_gpio = CYTTSP_TS_SLEEP_GPIO,
2498 .resout_gpio = CYTTSP_TS_RESOUT_N_GPIO,
2499 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
2500 .regulator_info = regulator_data,
2501 .num_regulators = ARRAY_SIZE(regulator_data),
2502 .init = cyttsp_platform_init,
2503};
2504
2505static struct i2c_board_info cyttsp_info[] __initdata = {
2506 {
2507 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
2508 .platform_data = &cyttsp_pdata,
2509#ifndef CY_USE_TIMER
2510 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
2511#endif /* CY_USE_TIMER */
2512 },
2513};
2514
2515static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2516{
2517}
2518
2519static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi4_pdata = {
2520 .clk_freq = 100000,
2521 .src_clk_rate = 24000000,
2522 .clk = "gsbi_qup_clk",
2523 .pclk = "gsbi_pclk",
2524 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2525};
2526
2527static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi3_pdata = {
2528 .clk_freq = 100000,
2529 .src_clk_rate = 24000000,
2530 .clk = "gsbi_qup_clk",
2531 .pclk = "gsbi_pclk",
2532 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2533};
2534
2535static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi10_pdata = {
2536 .clk_freq = 100000,
2537 .src_clk_rate = 24000000,
2538 .clk = "gsbi_qup_clk",
2539 .pclk = "gsbi_pclk",
2540 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2541};
2542
2543static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi12_pdata = {
2544 .clk_freq = 100000,
2545 .src_clk_rate = 24000000,
2546 .clk = "gsbi_qup_clk",
2547 .pclk = "gsbi_pclk",
2548 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2549};
2550
2551static struct msm_rpm_platform_data msm_rpm_data = {
2552 .reg_base_addrs = {
2553 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
2554 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
2555 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
2556 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
2557 },
2558
2559 .irq_ack = RPM_APCC_CPU0_GP_HIGH_IRQ,
2560 .irq_err = RPM_APCC_CPU0_GP_LOW_IRQ,
2561 .irq_vmpm = RPM_APCC_CPU0_GP_MEDIUM_IRQ,
2562 .msm_apps_ipc_rpm_reg = MSM_APCS_GCC_BASE + 0x008,
2563 .msm_apps_ipc_rpm_val = 4,
2564};
2565
2566static struct spi_board_info spi_board_info[] __initdata = {
2567 {
2568 .modalias = "ks8851",
2569 .irq = MSM_GPIO_TO_INT(KS8851_IRQ_GPIO),
2570 .max_speed_hz = 19200000,
2571 .bus_num = 0,
2572 .chip_select = 0,
2573 .mode = SPI_MODE_0,
2574 },
2575};
2576
2577static struct platform_device msm_device_saw_core0 = {
2578 .name = "saw-regulator",
2579 .id = 0,
2580 .dev = {
2581 .platform_data = &msm_saw_regulator_pdata_s5,
2582 },
2583};
2584
2585static struct platform_device msm_device_saw_core1 = {
2586 .name = "saw-regulator",
2587 .id = 1,
2588 .dev = {
2589 .platform_data = &msm_saw_regulator_pdata_s6,
2590 },
2591};
2592
2593#ifdef CONFIG_MSM_FAKE_BATTERY
2594static struct platform_device fish_battery_device = {
2595 .name = "fish_battery",
2596};
2597#endif
2598
2599struct platform_device msm8960_device_ext_5v_vreg __devinitdata = {
2600 .name = GPIO_REGULATOR_DEV_NAME,
2601 .id = PM8921_MPP_PM_TO_SYS(7),
2602 .dev = {
2603 .platform_data = &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
2604 },
2605};
2606
2607struct platform_device msm8960_device_ext_l2_vreg __devinitdata = {
2608 .name = GPIO_REGULATOR_DEV_NAME,
2609 .id = 91,
2610 .dev = {
2611 .platform_data = &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_L2],
2612 },
2613};
2614
2615static struct platform_device *common_devices[] __initdata = {
2616 &msm_device_dmov,
2617 &msm_device_smd,
2618 &msm8960_device_uart_gsbi5,
2619 &msm_device_saw_core0,
2620 &msm_device_saw_core1,
2621 &msm8960_device_ext_5v_vreg,
2622 &msm8960_device_ext_l2_vreg,
2623 &msm8960_device_ssbi_pm8921,
2624 &msm8960_device_qup_spi_gsbi1,
2625 &msm8960_device_qup_i2c_gsbi3,
2626 &msm8960_device_qup_i2c_gsbi4,
2627 &msm8960_device_qup_i2c_gsbi10,
2628#ifndef CONFIG_MSM_DSPS
2629 &msm8960_device_qup_i2c_gsbi12,
2630#endif
2631 &msm_slim_ctrl,
2632 &msm_device_wcnss_wlan,
2633#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
2634 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
2635 &qcrypto_device,
2636#endif
2637
2638#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
2639 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
2640 &qcedev_device,
2641#endif
2642#ifdef CONFIG_MSM_ROTATOR
2643 &msm_rotator_device,
2644#endif
2645 &msm_device_sps,
2646#ifdef CONFIG_MSM_FAKE_BATTERY
2647 &fish_battery_device,
2648#endif
2649#ifdef CONFIG_ANDROID_PMEM
2650 &android_pmem_device,
2651 &android_pmem_adsp_device,
2652 &android_pmem_audio_device,
2653#endif
2654 &msm_fb_device,
2655 &msm_device_vidc,
2656 &msm_device_bam_dmux,
2657 &msm_fm_platform_init,
Mona Hossain9c430e32011-07-27 11:04:47 -07002658
2659#ifdef CONFIG_HW_RANDOM_MSM
2660 &msm_device_rng,
2661#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002662};
2663
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08002664static struct platform_device *sim_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002665 &msm_device_otg,
2666 &msm_device_gadget_peripheral,
2667 &msm_device_hsusb_host,
2668 &android_usb_device,
2669 &msm_device_vidc,
2670 &mipi_dsi_simulator_panel_device,
2671 &msm_bus_apps_fabric,
2672 &msm_bus_sys_fabric,
2673 &msm_bus_mm_fabric,
2674 &msm_bus_sys_fpb,
2675 &msm_bus_cpss_fpb,
2676 &msm_pcm,
2677 &msm_pcm_routing,
2678 &msm_cpudai0,
2679 &msm_cpudai1,
2680 &msm_cpudai_hdmi_rx,
2681 &msm_cpudai_bt_rx,
2682 &msm_cpudai_bt_tx,
2683 &msm_cpudai_fm_rx,
2684 &msm_cpudai_fm_tx,
2685 &msm_cpu_fe,
2686 &msm_stub_codec,
2687 &msm_voice,
2688 &msm_voip,
2689 &msm_lpa_pcm,
2690
2691#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
2692 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
2693 &qcrypto_device,
2694#endif
2695
2696#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
2697 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
2698 &qcedev_device,
2699#endif
2700
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08002701};
2702
2703static struct platform_device *rumi3_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002704 &msm_kgsl_3d0,
2705 &msm_kgsl_2d0,
2706 &msm_kgsl_2d1,
2707 &mipi_dsi_renesas_panel_device,
2708#ifdef CONFIG_MSM_GEMINI
2709 &msm8960_gemini_device,
2710#endif
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08002711};
2712
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002713static struct platform_device *cdp_devices[] __initdata = {
2714 &msm_device_otg,
2715 &msm_device_gadget_peripheral,
2716 &msm_device_hsusb_host,
2717 &android_usb_device,
2718 &msm_pcm,
2719 &msm_pcm_routing,
2720 &msm_cpudai0,
2721 &msm_cpudai1,
2722 &msm_cpudai_hdmi_rx,
2723 &msm_cpudai_bt_rx,
2724 &msm_cpudai_bt_tx,
2725 &msm_cpudai_fm_rx,
2726 &msm_cpudai_fm_tx,
2727 &msm_cpu_fe,
2728 &msm_stub_codec,
2729 &msm_kgsl_3d0,
2730#ifdef CONFIG_MSM_KGSL_2D
2731 &msm_kgsl_2d0,
2732 &msm_kgsl_2d1,
2733#endif
2734 &mipi_dsi_toshiba_panel_device,
2735#ifdef CONFIG_MSM_GEMINI
2736 &msm8960_gemini_device,
2737#endif
2738 &msm_voice,
2739 &msm_voip,
2740 &msm_lpa_pcm,
2741#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2742 &hdmi_msm_device,
2743#endif
2744 &msm_pcm_hostless,
2745 &msm_bus_apps_fabric,
2746 &msm_bus_sys_fabric,
2747 &msm_bus_mm_fabric,
2748 &msm_bus_sys_fpb,
2749 &msm_bus_cpss_fpb,
2750};
2751
2752static void __init msm8960_i2c_init(void)
2753{
2754 msm8960_device_qup_i2c_gsbi4.dev.platform_data =
2755 &msm8960_i2c_qup_gsbi4_pdata;
2756
2757 msm8960_device_qup_i2c_gsbi3.dev.platform_data =
2758 &msm8960_i2c_qup_gsbi3_pdata;
2759
2760 msm8960_device_qup_i2c_gsbi10.dev.platform_data =
2761 &msm8960_i2c_qup_gsbi10_pdata;
2762
2763 msm8960_device_qup_i2c_gsbi12.dev.platform_data =
2764 &msm8960_i2c_qup_gsbi12_pdata;
2765}
2766
2767static struct pm8xxx_irq_platform_data pm8xxx_irq_pdata __devinitdata = {
2768 .irq_base = PM8921_IRQ_BASE,
2769 .devirq = MSM_GPIO_TO_INT(104),
2770 .irq_trigger_flag = IRQF_TRIGGER_LOW,
2771};
2772
2773static struct pm8xxx_gpio_platform_data pm8xxx_gpio_pdata __devinitdata = {
2774 .gpio_base = PM8921_GPIO_PM_TO_SYS(1),
2775};
2776
2777static struct pm8xxx_mpp_platform_data pm8xxx_mpp_pdata __devinitdata = {
2778 .mpp_base = PM8921_MPP_PM_TO_SYS(1),
2779};
2780
2781static struct pm8xxx_rtc_platform_data pm8xxx_rtc_pdata __devinitdata = {
2782 .rtc_write_enable = false,
2783};
2784
2785static struct pm8xxx_pwrkey_platform_data pm8xxx_pwrkey_pdata = {
2786 .pull_up = 1,
2787 .kpd_trigger_delay_us = 970,
2788 .wakeup = 1,
2789};
2790
2791static const unsigned int keymap[] = {
2792 KEY(0, 0, KEY_VOLUMEUP),
2793 KEY(0, 1, KEY_VOLUMEDOWN),
2794 KEY(0, 2, KEY_CAMERA_SNAPSHOT),
2795 KEY(0, 3, KEY_CAMERA_FOCUS),
2796};
2797
2798static struct matrix_keymap_data keymap_data = {
2799 .keymap_size = ARRAY_SIZE(keymap),
2800 .keymap = keymap,
2801};
2802
2803static struct pm8xxx_keypad_platform_data keypad_data = {
2804 .input_name = "keypad_8960",
2805 .input_phys_device = "keypad_8960/input0",
2806 .num_rows = 1,
2807 .num_cols = 5,
2808 .rows_gpio_start = PM8921_GPIO_PM_TO_SYS(9),
2809 .cols_gpio_start = PM8921_GPIO_PM_TO_SYS(1),
2810 .debounce_ms = 15,
2811 .scan_delay_ms = 32,
2812 .row_hold_ns = 91500,
2813 .wakeup = 1,
2814 .keymap_data = &keymap_data,
2815};
2816
2817static const unsigned int keymap_sim[] = {
2818 KEY(0, 0, KEY_7),
2819 KEY(0, 1, KEY_DOWN),
2820 KEY(0, 2, KEY_UP),
2821 KEY(0, 3, KEY_RIGHT),
2822 KEY(0, 4, KEY_ENTER),
2823 KEY(0, 5, KEY_L),
2824 KEY(0, 6, KEY_BACK),
2825 KEY(0, 7, KEY_M),
2826
2827 KEY(1, 0, KEY_LEFT),
2828 KEY(1, 1, KEY_SEND),
2829 KEY(1, 2, KEY_1),
2830 KEY(1, 3, KEY_4),
2831 KEY(1, 4, KEY_CLEAR),
2832 KEY(1, 5, KEY_MSDOS),
2833 KEY(1, 6, KEY_SPACE),
2834 KEY(1, 7, KEY_COMMA),
2835
2836 KEY(2, 0, KEY_6),
2837 KEY(2, 1, KEY_5),
2838 KEY(2, 2, KEY_8),
2839 KEY(2, 3, KEY_3),
2840 KEY(2, 4, KEY_NUMERIC_STAR),
2841 KEY(2, 5, KEY_UP),
2842 KEY(2, 6, KEY_DOWN),
2843 KEY(2, 7, KEY_LEFTSHIFT),
2844
2845 KEY(3, 0, KEY_9),
2846 KEY(3, 1, KEY_NUMERIC_POUND),
2847 KEY(3, 2, KEY_0),
2848 KEY(3, 3, KEY_2),
2849 KEY(3, 4, KEY_SLEEP),
2850 KEY(3, 5, KEY_F1),
2851 KEY(3, 6, KEY_F2),
2852 KEY(3, 7, KEY_F3),
2853
2854 KEY(4, 0, KEY_BACK),
2855 KEY(4, 1, KEY_HOME),
2856 KEY(4, 2, KEY_MENU),
2857 KEY(4, 3, KEY_VOLUMEUP),
2858 KEY(4, 4, KEY_VOLUMEDOWN),
2859 KEY(4, 5, KEY_F4),
2860 KEY(4, 6, KEY_F5),
2861 KEY(4, 7, KEY_F6),
2862
2863 KEY(5, 0, KEY_R),
2864 KEY(5, 1, KEY_T),
2865 KEY(5, 2, KEY_Y),
2866 KEY(5, 3, KEY_LEFTALT),
2867 KEY(5, 4, KEY_KPENTER),
2868 KEY(5, 5, KEY_Q),
2869 KEY(5, 6, KEY_W),
2870 KEY(5, 7, KEY_E),
2871
2872 KEY(6, 0, KEY_F),
2873 KEY(6, 1, KEY_G),
2874 KEY(6, 2, KEY_H),
2875 KEY(6, 3, KEY_CAPSLOCK),
2876 KEY(6, 4, KEY_PAGEUP),
2877 KEY(6, 5, KEY_A),
2878 KEY(6, 6, KEY_S),
2879 KEY(6, 7, KEY_D),
2880
2881 KEY(7, 0, KEY_V),
2882 KEY(7, 1, KEY_B),
2883 KEY(7, 2, KEY_N),
2884 KEY(7, 3, KEY_MENU),
2885 KEY(7, 4, KEY_PAGEDOWN),
2886 KEY(7, 5, KEY_Z),
2887 KEY(7, 6, KEY_X),
2888 KEY(7, 7, KEY_C),
2889
2890 KEY(8, 0, KEY_P),
2891 KEY(8, 1, KEY_J),
2892 KEY(8, 2, KEY_K),
2893 KEY(8, 3, KEY_INSERT),
2894 KEY(8, 4, KEY_LINEFEED),
2895 KEY(8, 5, KEY_U),
2896 KEY(8, 6, KEY_I),
2897 KEY(8, 7, KEY_O),
2898
2899 KEY(9, 0, KEY_4),
2900 KEY(9, 1, KEY_5),
2901 KEY(9, 2, KEY_6),
2902 KEY(9, 3, KEY_7),
2903 KEY(9, 4, KEY_8),
2904 KEY(9, 5, KEY_1),
2905 KEY(9, 6, KEY_2),
2906 KEY(9, 7, KEY_3),
2907
2908 KEY(10, 0, KEY_F7),
2909 KEY(10, 1, KEY_F8),
2910 KEY(10, 2, KEY_F9),
2911 KEY(10, 3, KEY_F10),
2912 KEY(10, 4, KEY_FN),
2913 KEY(10, 5, KEY_9),
2914 KEY(10, 6, KEY_0),
2915 KEY(10, 7, KEY_DOT),
2916
2917 KEY(11, 0, KEY_LEFTCTRL),
2918 KEY(11, 1, KEY_F11),
2919 KEY(11, 2, KEY_ENTER),
2920 KEY(11, 3, KEY_SEARCH),
2921 KEY(11, 4, KEY_DELETE),
2922 KEY(11, 5, KEY_RIGHT),
2923 KEY(11, 6, KEY_LEFT),
2924 KEY(11, 7, KEY_RIGHTSHIFT),
2925 KEY(0, 0, KEY_VOLUMEUP),
2926 KEY(0, 1, KEY_VOLUMEDOWN),
2927 KEY(0, 2, KEY_CAMERA_SNAPSHOT),
2928 KEY(0, 3, KEY_CAMERA_FOCUS),
2929};
2930
2931static struct matrix_keymap_data keymap_data_sim = {
2932 .keymap_size = ARRAY_SIZE(keymap_sim),
2933 .keymap = keymap_sim,
2934};
2935
2936static struct pm8xxx_keypad_platform_data keypad_data_sim = {
2937 .input_name = "keypad_8960",
2938 .input_phys_device = "keypad_8960/input0",
2939 .num_rows = 12,
2940 .num_cols = 8,
2941 .rows_gpio_start = PM8921_GPIO_PM_TO_SYS(9),
2942 .cols_gpio_start = PM8921_GPIO_PM_TO_SYS(1),
2943 .debounce_ms = 15,
2944 .scan_delay_ms = 32,
2945 .row_hold_ns = 91500,
2946 .wakeup = 1,
2947 .keymap_data = &keymap_data_sim,
2948};
2949
2950static struct pm8921_charger_platform_data pm8921_chg_pdata __devinitdata = {
2951 .safety_time = 180,
2952 .update_time = 1,
2953 .max_voltage = 4200,
2954 .min_voltage = 3200,
2955 .resume_voltage = 4100,
2956 .term_current = 100,
2957};
2958
2959static struct pm8xxx_misc_platform_data pm8xxx_misc_pdata = {
2960 .priority = 0,
2961};
2962
2963static struct pm8921_bms_platform_data pm8921_bms_pdata __devinitdata = {
2964 .r_sense = 10,
2965 .i_test = 2500,
2966 .v_failure = 3000,
2967 .calib_delay_ms = 600000,
2968 .batt_data = &palladium_1500_data,
2969};
2970
2971static struct led_info pm8921_led_info[] = {
2972 [0] = {
2973 .name = "led:drv1",
2974 .flags = PM8XXX_ID_LED_1,
2975 },
2976};
2977
2978static struct led_platform_data pm8xxx_leds_pdata = {
2979 .num_leds = ARRAY_SIZE(pm8921_led_info),
2980 .leds = pm8921_led_info,
2981};
2982
2983static struct pm8921_platform_data pm8921_platform_data __devinitdata = {
2984 .irq_pdata = &pm8xxx_irq_pdata,
2985 .gpio_pdata = &pm8xxx_gpio_pdata,
2986 .mpp_pdata = &pm8xxx_mpp_pdata,
2987 .rtc_pdata = &pm8xxx_rtc_pdata,
2988 .pwrkey_pdata = &pm8xxx_pwrkey_pdata,
2989 .keypad_pdata = &keypad_data,
2990 .misc_pdata = &pm8xxx_misc_pdata,
2991 .regulator_pdatas = msm_pm8921_regulator_pdata,
2992 .charger_pdata = &pm8921_chg_pdata,
2993 .bms_pdata = &pm8921_bms_pdata,
2994 .adc_pdata = &pm8921_adc_pdata,
2995 .leds_pdata = &pm8xxx_leds_pdata,
2996};
2997
2998static struct msm_ssbi_platform_data msm8960_ssbi_pm8921_pdata __devinitdata = {
2999 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
3000 .slave = {
3001 .name = "pm8921-core",
3002 .platform_data = &pm8921_platform_data,
3003 },
3004};
3005
3006static void msm8960_wcnss_init(void)
3007{
3008 int i, ret, j;
3009
3010 for (i = 0; i < ARRAY_SIZE(wcnss_5wire_interface); i++) {
3011 ret = gpio_request(wcnss_5wire_interface[i].gpio,
3012 "wcnss_5_wire");
3013 if (ret) {
3014 pr_err("wcnss_5_wire gpio %d failed: %d\n",
3015 wcnss_5wire_interface[i].gpio, ret);
3016 goto fail;
3017 }
3018 }
3019
3020 pr_info("%s: Iris 5-wire gpios configured\n", __func__);
3021
3022 return;
3023
3024fail:
3025 for (j = 0; j < i; j++)
3026 gpio_free(wcnss_5wire_interface[j].gpio);
3027}
3028
3029static int ethernet_init(void)
3030{
3031 int ret;
3032 ret = gpio_request(KS8851_IRQ_GPIO, "ks8851_irq");
3033 if (ret) {
3034 pr_err("ks8851 gpio_request failed: %d\n", ret);
3035 goto fail;
3036 }
3037
3038 ret = gpio_request(KS8851_RST_GPIO, "ks8851_rst");
3039 if (ret) {
3040 pr_err("ks8851 gpio_request failed: %d\n", ret);
3041 goto fail_rst;
3042 }
3043
3044 ret = gpio_request(FPGA_CS_GPIO, "fpga_cs");
3045 if (ret) {
3046 pr_err("ks8851 gpio_request failed: %d\n", ret);
3047 goto fail_cs;
3048 }
3049
3050 gpio_direction_output(FPGA_CS_GPIO, 1);
3051 gpio_direction_output(KS8851_RST_GPIO, 1);
3052 return 0;
3053fail_cs:
3054 gpio_free(KS8851_RST_GPIO);
3055fail_rst:
3056 gpio_free(KS8851_IRQ_GPIO);
3057fail:
3058 return ret;
3059}
3060
3061static struct msm_cpuidle_state msm_cstates[] __initdata = {
3062 {0, 0, "C0", "WFI",
3063 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
3064
3065 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
3066 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
3067
3068 {0, 2, "C2", "POWER_COLLAPSE",
3069 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
3070
3071 {1, 0, "C0", "WFI",
3072 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
3073
3074 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
3075 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
3076};
3077
3078static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
3079 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
3080 .idle_supported = 1,
3081 .suspend_supported = 1,
3082 .idle_enabled = 0,
3083 .suspend_enabled = 0,
3084 .latency = 4000,
3085 .residency = 13000,
3086 },
3087
3088 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
3089 .idle_supported = 1,
3090 .suspend_supported = 1,
3091 .idle_enabled = 0,
3092 .suspend_enabled = 0,
3093 .latency = 500,
3094 .residency = 6000,
3095 },
3096
3097 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
3098 .idle_supported = 1,
3099 .suspend_supported = 1,
3100 .idle_enabled = 1,
3101 .suspend_enabled = 1,
3102 .latency = 2,
3103 .residency = 0,
3104 },
3105
3106 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
3107 .idle_supported = 0,
3108 .suspend_supported = 1,
3109 .idle_enabled = 0,
3110 .suspend_enabled = 0,
3111 .latency = 600,
3112 .residency = 7200,
3113 },
3114
3115 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
3116 .idle_supported = 1,
3117 .suspend_supported = 1,
3118 .idle_enabled = 0,
3119 .suspend_enabled = 0,
3120 .latency = 500,
3121 .residency = 6000,
3122 },
3123
3124 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
3125 .idle_supported = 1,
3126 .suspend_supported = 0,
3127 .idle_enabled = 1,
3128 .suspend_enabled = 0,
3129 .latency = 2,
3130 .residency = 0,
3131 },
3132};
3133
3134static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
3135 {
3136 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
3137 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
3138 true,
3139 1, 8000, 100000, 1,
3140 },
3141
3142 {
3143 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
3144 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
3145 true,
3146 1500, 5000, 60100000, 3000,
3147 },
3148
3149 {
3150 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3151 MSM_RPMRS_LIMITS(ON, GDHS, MAX, ACTIVE),
3152 false,
3153 1800, 5000, 60350000, 3500,
3154 },
3155
3156 {
3157 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3158 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
3159 false,
3160 2800, 2500, 65350000, 4800,
3161 },
3162
3163 {
3164 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3165 MSM_RPMRS_LIMITS(OFF, GDHS, MAX, ACTIVE),
3166 false,
3167 3800, 4500, 67850000, 5500,
3168 },
3169
3170 {
3171 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3172 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
3173 false,
3174 4800, 2000, 71850000, 6800,
3175 },
3176
3177 {
3178 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3179 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
3180 false,
3181 6800, 500, 75850000, 8800,
3182 },
3183
3184 {
3185 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3186 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
3187 false,
3188 7800, 0, 76350000, 9800,
3189 },
3190};
3191
3192#ifdef CONFIG_I2C
3193#define I2C_SURF 1
3194#define I2C_FFA (1 << 1)
3195#define I2C_RUMI (1 << 2)
3196#define I2C_SIM (1 << 3)
3197#define I2C_FLUID (1 << 4)
3198#define MSM_8960_GSBI4_QUP_I2C_BUS_ID 4
3199#define MSM_8960_GSBI3_QUP_I2C_BUS_ID 3
3200
3201struct i2c_registry {
3202 u8 machs;
3203 int bus;
3204 struct i2c_board_info *info;
3205 int len;
3206};
3207
3208#ifdef CONFIG_MSM_CAMERA
3209static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
3210#ifdef CONFIG_IMX074
3211 {
3212 I2C_BOARD_INFO("imx074", 0x1A),
3213 },
3214#endif
3215#ifdef CONFIG_OV2720
3216 {
3217 I2C_BOARD_INFO("ov2720", 0x6C),
3218 },
3219#endif
Kevin Chandfecce22011-07-13 10:52:41 -07003220 {
3221 I2C_BOARD_INFO("qs_mt9p017", 0x6C >> 1),
3222 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003223};
3224#endif
3225
3226/* Sensors DSPS platform data */
3227#ifdef CONFIG_MSM_DSPS
3228#define DSPS_PIL_GENERIC_NAME "dsps"
3229#endif /* CONFIG_MSM_DSPS */
3230
3231static void __init msm8960_init_dsps(void)
3232{
3233#ifdef CONFIG_MSM_DSPS
3234 struct msm_dsps_platform_data *pdata =
3235 msm_dsps_device.dev.platform_data;
3236 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
3237 pdata->gpios = NULL;
3238 pdata->gpios_num = 0;
3239
3240 platform_device_register(&msm_dsps_device);
3241#endif /* CONFIG_MSM_DSPS */
3242}
3243
3244static struct i2c_registry msm8960_i2c_devices[] __initdata = {
3245#ifdef CONFIG_MSM_CAMERA
3246 {
3247 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_RUMI,
3248 MSM_8960_GSBI4_QUP_I2C_BUS_ID,
3249 msm_camera_boardinfo,
3250 ARRAY_SIZE(msm_camera_boardinfo),
3251 },
3252#endif
3253 {
3254 I2C_SURF | I2C_FFA | I2C_FLUID,
3255 MSM_8960_GSBI3_QUP_I2C_BUS_ID,
3256 cyttsp_info,
3257 ARRAY_SIZE(cyttsp_info),
3258 }
3259};
3260#endif /* CONFIG_I2C */
3261
3262static void __init register_i2c_devices(void)
3263{
3264#ifdef CONFIG_I2C
3265 u8 mach_mask = 0;
3266 int i;
3267
3268 /* Build the matching 'supported_machs' bitmask */
3269 if (machine_is_msm8960_cdp())
3270 mach_mask = I2C_SURF;
3271 else if (machine_is_msm8960_rumi3())
3272 mach_mask = I2C_RUMI;
3273 else if (machine_is_msm8960_sim())
3274 mach_mask = I2C_SIM;
Amy Maloche2d028032011-07-20 14:08:06 -07003275 else if (machine_is_msm8960_fluid())
3276 mach_mask = I2C_FLUID;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003277 else
3278 pr_err("unmatched machine ID in register_i2c_devices\n");
3279
3280 /* Run the array and install devices as appropriate */
3281 for (i = 0; i < ARRAY_SIZE(msm8960_i2c_devices); ++i) {
3282 if (msm8960_i2c_devices[i].machs & mach_mask)
3283 i2c_register_board_info(msm8960_i2c_devices[i].bus,
3284 msm8960_i2c_devices[i].info,
3285 msm8960_i2c_devices[i].len);
3286 }
3287#endif
3288}
3289
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003290static void __init msm8960_sim_init(void)
3291{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003292 if (socinfo_init() < 0)
3293 pr_err("socinfo_init() failed!\n");
3294
3295 BUG_ON(msm_rpm_init(&msm_rpm_data));
3296 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
3297 ARRAY_SIZE(msm_rpmrs_levels)));
3298 regulator_suppress_info_printing();
3299 msm8960_clock_init();
3300 msm8960_device_ssbi_pm8921.dev.platform_data =
3301 &msm8960_ssbi_pm8921_pdata;
3302 pm8921_platform_data.num_regulators = msm_pm8921_regulator_pdata_len;
3303 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3304 &msm8960_qup_spi_gsbi1_pdata;
3305
3306 /* Simulator supports a QWERTY keypad */
3307 pm8921_platform_data.keypad_pdata = &keypad_data_sim;
3308
3309 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3310 msm_device_gadget_peripheral.dev.parent = &msm_device_otg.dev;
3311 msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
3312 gpiomux_init();
3313 ethernet_init();
3314 msm8960_i2c_init();
3315 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
3316 msm_spm_l2_init(msm_spm_l2_data);
3317 msm8960_init_buses();
3318 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
3319 pm8921_gpio_mpp_init();
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003320 platform_add_devices(sim_devices, ARRAY_SIZE(sim_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003321 msm_acpu_clock_init(&msm8960_acpu_clock_data);
3322
3323 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3324 &msm8960_qup_spi_gsbi1_pdata;
3325 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
3326
3327 msm8960_init_mmc();
3328 msm_fb_add_devices();
3329 slim_register_board_info(msm_slim_devices,
3330 ARRAY_SIZE(msm_slim_devices));
3331 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
3332 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
3333 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
3334 msm_pm_data);
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003335}
3336
3337static void __init msm8960_rumi3_init(void)
3338{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003339 if (socinfo_init() < 0)
3340 pr_err("socinfo_init() failed!\n");
3341
3342 BUG_ON(msm_rpm_init(&msm_rpm_data));
3343 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
3344 ARRAY_SIZE(msm_rpmrs_levels)));
3345 regulator_suppress_info_printing();
3346 msm8960_clock_init_dummy();
3347 gpiomux_init();
3348 ethernet_init();
3349 msm8960_device_ssbi_pm8921.dev.platform_data =
3350 &msm8960_ssbi_pm8921_pdata;
3351 pm8921_platform_data.num_regulators = msm_pm8921_regulator_pdata_len;
3352 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3353 &msm8960_qup_spi_gsbi1_pdata;
3354 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
3355 msm8960_i2c_init();
3356 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
3357 msm_spm_l2_init(msm_spm_l2_data);
3358 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
3359 pm8921_gpio_mpp_init();
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003360 platform_add_devices(rumi3_devices, ARRAY_SIZE(rumi3_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003361 msm8960_init_mmc();
3362
3363 register_i2c_devices();
3364 msm_fb_add_devices();
3365 slim_register_board_info(msm_slim_devices,
3366 ARRAY_SIZE(msm_slim_devices));
3367 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
3368 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
3369 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
3370 msm_pm_data);
3371}
3372
3373static void __init msm8960_cdp_init(void)
3374{
3375 if (socinfo_init() < 0)
3376 pr_err("socinfo_init() failed!\n");
3377
3378 BUG_ON(msm_rpm_init(&msm_rpm_data));
3379 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
3380 ARRAY_SIZE(msm_rpmrs_levels)));
3381 regulator_suppress_info_printing();
3382 if (msm_xo_init())
3383 pr_err("Failed to initialize XO votes\n");
3384 msm8960_clock_init();
3385 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3386 msm_device_gadget_peripheral.dev.parent = &msm_device_otg.dev;
3387 msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
3388 gpiomux_init();
3389 ethernet_init();
3390 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3391 &msm8960_qup_spi_gsbi1_pdata;
3392 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
3393 msm8960_device_ssbi_pm8921.dev.platform_data =
3394 &msm8960_ssbi_pm8921_pdata;
3395 pm8921_platform_data.num_regulators = msm_pm8921_regulator_pdata_len;
3396 msm8960_i2c_init();
3397 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
3398 msm_spm_l2_init(msm_spm_l2_data);
3399 msm8960_init_buses();
3400 platform_add_devices(msm_footswitch_devices,
3401 msm_num_footswitch_devices);
3402 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
3403 pm8921_gpio_mpp_init();
3404 platform_add_devices(cdp_devices, ARRAY_SIZE(cdp_devices));
3405 msm8960_init_cam();
3406 msm8960_init_mmc();
3407 msm_acpu_clock_init(&msm8960_acpu_clock_data);
3408 register_i2c_devices();
3409 msm8960_wcnss_init();
3410 msm_fb_add_devices();
3411 slim_register_board_info(msm_slim_devices,
3412 ARRAY_SIZE(msm_slim_devices));
3413 msm8960_init_dsps();
3414 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
3415 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
3416 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
3417 msm_pm_data);
Larry Bassela7eadea2011-07-14 10:46:00 -07003418 change_memory_power = &msm8960_change_memory_power;
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003419}
3420
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08003421MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
3422 .map_io = msm8960_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003423 .reserve = msm8960_reserve,
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08003424 .init_irq = msm8960_init_irq,
3425 .timer = &msm_timer,
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003426 .init_machine = msm8960_sim_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003427 .init_early = msm8960_allocate_memory_regions,
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08003428MACHINE_END
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08003429
3430MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
3431 .map_io = msm8960_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003432 .reserve = msm8960_reserve,
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08003433 .init_irq = msm8960_init_irq,
3434 .timer = &msm_timer,
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003435 .init_machine = msm8960_rumi3_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003436 .init_early = msm8960_allocate_memory_regions,
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08003437MACHINE_END
3438
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003439MACHINE_START(MSM8960_CDP, "QCT MSM8960 CDP")
3440 .map_io = msm8960_map_io,
3441 .reserve = msm8960_reserve,
3442 .init_irq = msm8960_init_irq,
3443 .timer = &msm_timer,
3444 .init_machine = msm8960_cdp_init,
3445 .init_early = msm8960_allocate_memory_regions,
3446MACHINE_END
3447
3448MACHINE_START(MSM8960_MTP, "QCT MSM8960 MTP")
3449 .map_io = msm8960_map_io,
3450 .reserve = msm8960_reserve,
3451 .init_irq = msm8960_init_irq,
3452 .timer = &msm_timer,
3453 .init_machine = msm8960_cdp_init,
3454 .init_early = msm8960_allocate_memory_regions,
3455MACHINE_END
3456
3457MACHINE_START(MSM8960_FLUID, "QCT MSM8960 FLUID")
3458 .map_io = msm8960_map_io,
3459 .reserve = msm8960_reserve,
3460 .init_irq = msm8960_init_irq,
3461 .timer = &msm_timer,
3462 .init_machine = msm8960_cdp_init,
3463 .init_early = msm8960_allocate_memory_regions,
3464MACHINE_END