| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  * include/asm/m32700ut_lcd.h | 
 | 3 |  * | 
 | 4 |  * M32700UT-LCD board | 
 | 5 |  * | 
 | 6 |  * Copyright (c) 2002	Takeo Takahashi | 
 | 7 |  * | 
 | 8 |  * This file is subject to the terms and conditions of the GNU General | 
 | 9 |  * Public License.  See the file "COPYING" in the main directory of | 
 | 10 |  * this archive for more details. | 
 | 11 |  * | 
 | 12 |  * $Id$ | 
 | 13 |  */ | 
 | 14 |  | 
 | 15 | #ifndef _M32700UT_M32700UT_LCD_H | 
 | 16 | #define _M32700UT_M32700UT_LCD_H | 
 | 17 |  | 
 | 18 | #include <linux/config.h> | 
 | 19 |  | 
 | 20 | #ifndef __ASSEMBLY__ | 
 | 21 | /* | 
 | 22 |  * C functions use non-cache address. | 
 | 23 |  */ | 
 | 24 | #define M32700UT_LCD_BASE	(0x10000000 /* + NONCACHE_OFFSET */) | 
 | 25 | #else | 
 | 26 | #define M32700UT_LCD_BASE	(0x10000000 + NONCACHE_OFFSET) | 
 | 27 | #endif	/* __ASSEMBLY__ */ | 
 | 28 |  | 
 | 29 | /* | 
 | 30 |  * ICU | 
 | 31 |  */ | 
 | 32 | #define M32700UT_LCD_IRQ_BAT_INT	(M32700UT_LCD_PLD_IRQ_BASE + 1) | 
 | 33 | #define M32700UT_LCD_IRQ_USB_INT1	(M32700UT_LCD_PLD_IRQ_BASE + 2) | 
 | 34 | #define M32700UT_LCD_IRQ_AUDT0		(M32700UT_LCD_PLD_IRQ_BASE + 3) | 
 | 35 | #define M32700UT_LCD_IRQ_AUDT2		(M32700UT_LCD_PLD_IRQ_BASE + 4) | 
 | 36 | #define M32700UT_LCD_IRQ_BATSIO_RCV	(M32700UT_LCD_PLD_IRQ_BASE + 16) | 
 | 37 | #define M32700UT_LCD_IRQ_BATSIO_SND	(M32700UT_LCD_PLD_IRQ_BASE + 17) | 
 | 38 | #define M32700UT_LCD_IRQ_ASNDSIO_RCV	(M32700UT_LCD_PLD_IRQ_BASE + 18) | 
 | 39 | #define M32700UT_LCD_IRQ_ASNDSIO_SND	(M32700UT_LCD_PLD_IRQ_BASE + 19) | 
 | 40 | #define M32700UT_LCD_IRQ_ACNLSIO_SND	(M32700UT_LCD_PLD_IRQ_BASE + 21) | 
 | 41 |  | 
 | 42 | #define M32700UT_LCD_ICUISTS	__reg16(M32700UT_LCD_BASE + 0x300002) | 
 | 43 | #define M32700UT_LCD_ICUISTS_VECB_MASK	(0xf000) | 
 | 44 | #define M32700UT_LCD_VECB(x)	((x) & M32700UT_LCD_ICUISTS_VECB_MASK) | 
 | 45 | #define M32700UT_LCD_ICUISTS_ISN_MASK	(0x07c0) | 
 | 46 | #define M32700UT_LCD_ICUISTS_ISN(x)	((x) & M32700UT_LCD_ICUISTS_ISN_MASK) | 
 | 47 | #define M32700UT_LCD_ICUIREQ0	__reg16(M32700UT_LCD_BASE + 0x300004) | 
 | 48 | #define M32700UT_LCD_ICUIREQ1	__reg16(M32700UT_LCD_BASE + 0x300006) | 
 | 49 | #define M32700UT_LCD_ICUCR1	__reg16(M32700UT_LCD_BASE + 0x300020) | 
 | 50 | #define M32700UT_LCD_ICUCR2	__reg16(M32700UT_LCD_BASE + 0x300022) | 
 | 51 | #define M32700UT_LCD_ICUCR3	__reg16(M32700UT_LCD_BASE + 0x300024) | 
 | 52 | #define M32700UT_LCD_ICUCR4	__reg16(M32700UT_LCD_BASE + 0x300026) | 
 | 53 | #define M32700UT_LCD_ICUCR16	__reg16(M32700UT_LCD_BASE + 0x300030) | 
 | 54 | #define M32700UT_LCD_ICUCR17	__reg16(M32700UT_LCD_BASE + 0x300032) | 
 | 55 | #define M32700UT_LCD_ICUCR18	__reg16(M32700UT_LCD_BASE + 0x300034) | 
 | 56 | #define M32700UT_LCD_ICUCR19	__reg16(M32700UT_LCD_BASE + 0x300036) | 
 | 57 | #define M32700UT_LCD_ICUCR21	__reg16(M32700UT_LCD_BASE + 0x30003a) | 
 | 58 |  | 
 | 59 | #endif	/* _M32700UT_M32700UT_LCD_H */ |