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Bryan Wu2f6f4bc2008-11-18 17:48:21 +08001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
Bryan Wu2f6f4bc2008-11-18 17:48:21 +08005 *
Robin Getz96f10502009-09-24 14:11:24 +00006 * Licensed under the GPL-2 or later.
Bryan Wu2f6f4bc2008-11-18 17:48:21 +08007 */
8
9#include <linux/device.h>
Paul Gortmaker8dc7a9c2011-08-09 11:05:22 -040010#include <linux/export.h>
Bryan Wu2f6f4bc2008-11-18 17:48:21 +080011#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
14#include <linux/mtd/physmap.h>
15#include <linux/spi/spi.h>
16#include <linux/spi/flash.h>
17
18#include <linux/i2c.h>
19#include <linux/irq.h>
20#include <linux/interrupt.h>
21#include <asm/dma.h>
22#include <asm/bfin5xx_spi.h>
23#include <asm/reboot.h>
24#include <asm/portmux.h>
25#include <asm/dpmc.h>
Cliff Cai501674a2009-01-07 23:14:38 +080026#include <asm/bfin_sdh.h>
Bryan Wu2f6f4bc2008-11-18 17:48:21 +080027#include <linux/spi/ad7877.h>
Graf Yang65319622009-02-04 16:49:45 +080028#include <net/dsa.h>
Bryan Wu2f6f4bc2008-11-18 17:48:21 +080029
30/*
31 * Name the Board for the /proc/cpuinfo
32 */
Mike Frysingerfe85cad2008-11-18 17:48:22 +080033const char bfin_board_name[] = "ADI BF518F-EZBRD";
Bryan Wu2f6f4bc2008-11-18 17:48:21 +080034
35/*
36 * Driver needs to know address, irq and flag pin.
37 */
38
39#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
40static struct mtd_partition ezbrd_partitions[] = {
41 {
42 .name = "bootloader(nor)",
43 .size = 0x40000,
44 .offset = 0,
45 }, {
46 .name = "linux kernel(nor)",
47 .size = 0x1C0000,
48 .offset = MTDPART_OFS_APPEND,
49 }, {
50 .name = "file system(nor)",
51 .size = MTDPART_SIZ_FULL,
52 .offset = MTDPART_OFS_APPEND,
53 }
54};
55
56static struct physmap_flash_data ezbrd_flash_data = {
57 .width = 2,
58 .parts = ezbrd_partitions,
59 .nr_parts = ARRAY_SIZE(ezbrd_partitions),
60};
61
62static struct resource ezbrd_flash_resource = {
63 .start = 0x20000000,
Sonic Zhang7d157fb2011-11-07 18:40:10 +080064#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
Graf Yangee0263c2009-05-20 06:06:15 +000065 .end = 0x202fffff,
66#else
Bryan Wu2f6f4bc2008-11-18 17:48:21 +080067 .end = 0x203fffff,
Graf Yangee0263c2009-05-20 06:06:15 +000068#endif
Bryan Wu2f6f4bc2008-11-18 17:48:21 +080069 .flags = IORESOURCE_MEM,
70};
71
72static struct platform_device ezbrd_flash_device = {
73 .name = "physmap-flash",
74 .id = 0,
75 .dev = {
76 .platform_data = &ezbrd_flash_data,
77 },
78 .num_resources = 1,
79 .resource = &ezbrd_flash_resource,
80};
81#endif
82
83#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
84static struct platform_device rtc_device = {
85 .name = "rtc-bfin",
86 .id = -1,
87};
88#endif
89
90#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Sonic Zhang02460d02010-06-11 10:44:22 +000091#include <linux/bfin_mac.h>
92static const unsigned short bfin_mac_peripherals[] = {
93 P_MII0_ETxD0,
94 P_MII0_ETxD1,
95 P_MII0_ETxEN,
96 P_MII0_ERxD0,
97 P_MII0_ERxD1,
98 P_MII0_TxCLK,
99 P_MII0_PHYINT,
100 P_MII0_CRS,
101 P_MII0_MDC,
102 P_MII0_MDIO,
103 0
104};
105
106static struct bfin_phydev_platform_data bfin_phydev_data[] = {
107 {
Sonic Zhangd57bc0f2010-11-23 10:00:15 +0000108#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
Sonic Zhang02460d02010-06-11 10:44:22 +0000109 .addr = 3,
Sonic Zhangd57bc0f2010-11-23 10:00:15 +0000110#else
111 .addr = 1,
112#endif
Sonic Zhang02460d02010-06-11 10:44:22 +0000113 .irq = IRQ_MAC_PHYINT,
114 },
115};
116
117static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
Sonic Zhangd57bc0f2010-11-23 10:00:15 +0000118 .phydev_number = 1,
Sonic Zhang02460d02010-06-11 10:44:22 +0000119 .phydev_data = bfin_phydev_data,
120 .phy_mode = PHY_INTERFACE_MODE_MII,
121 .mac_peripherals = bfin_mac_peripherals,
Sonic Zhangd57bc0f2010-11-23 10:00:15 +0000122#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
123 .phy_mask = 0xfff7, /* Only probe the port phy connect to the on chip MAC */
124#endif
Steven Miao1247f2f2011-12-07 17:39:56 +0800125 .vlan1_mask = 1,
126 .vlan2_mask = 2,
Sonic Zhang02460d02010-06-11 10:44:22 +0000127};
128
Graf Yang65319622009-02-04 16:49:45 +0800129static struct platform_device bfin_mii_bus = {
130 .name = "bfin_mii_bus",
Sonic Zhang02460d02010-06-11 10:44:22 +0000131 .dev = {
132 .platform_data = &bfin_mii_bus_data,
133 }
Graf Yang65319622009-02-04 16:49:45 +0800134};
135
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800136static struct platform_device bfin_mac_device = {
137 .name = "bfin_mac",
Sonic Zhang02460d02010-06-11 10:44:22 +0000138 .dev = {
139 .platform_data = &bfin_mii_bus,
140 }
Graf Yang65319622009-02-04 16:49:45 +0800141};
Graf Yang65319622009-02-04 16:49:45 +0800142
143#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
Mike Frysinger2780cd62009-06-11 09:22:02 -0400144static struct dsa_chip_data ksz8893m_switch_chip_data = {
Graf Yang65319622009-02-04 16:49:45 +0800145 .mii_bus = &bfin_mii_bus.dev,
Mike Frysinger2780cd62009-06-11 09:22:02 -0400146 .port_names = {
147 NULL,
148 "eth%d",
149 "eth%d",
150 "cpu",
151 },
152};
153static struct dsa_platform_data ksz8893m_switch_data = {
154 .nr_chips = 1,
Graf Yang65319622009-02-04 16:49:45 +0800155 .netdev = &bfin_mac_device.dev,
Mike Frysinger2780cd62009-06-11 09:22:02 -0400156 .chip = &ksz8893m_switch_chip_data,
Graf Yang65319622009-02-04 16:49:45 +0800157};
158
159static struct platform_device ksz8893m_switch_device = {
160 .name = "dsa",
161 .id = 0,
162 .num_resources = 0,
163 .dev.platform_data = &ksz8893m_switch_data,
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800164};
165#endif
Graf Yangc19577e2009-03-05 17:35:59 +0800166#endif
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800167
168#if defined(CONFIG_MTD_M25P80) \
169 || defined(CONFIG_MTD_M25P80_MODULE)
170static struct mtd_partition bfin_spi_flash_partitions[] = {
171 {
172 .name = "bootloader(spi)",
173 .size = 0x00040000,
174 .offset = 0,
175 .mask_flags = MTD_CAP_ROM
176 }, {
177 .name = "linux kernel(spi)",
178 .size = MTDPART_SIZ_FULL,
179 .offset = MTDPART_OFS_APPEND,
180 }
181};
182
183static struct flash_platform_data bfin_spi_flash_data = {
184 .name = "m25p80",
185 .parts = bfin_spi_flash_partitions,
186 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
187 .type = "m25p16",
188};
189
190/* SPI flash chip (m25p64) */
191static struct bfin5xx_spi_chip spi_flash_chip_info = {
192 .enable_dma = 0, /* use dma transfer with this chip*/
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800193};
194#endif
195
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800196#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
197static struct bfin5xx_spi_chip mmc_spi_chip_info = {
198 .enable_dma = 0,
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800199};
200#endif
201
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800202#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800203static const struct ad7877_platform_data bfin_ad7877_ts_info = {
204 .model = 7877,
205 .vref_delay_usecs = 50, /* internal, no capacitor */
206 .x_plate_ohms = 419,
207 .y_plate_ohms = 486,
208 .pressure_max = 1000,
209 .pressure_min = 0,
210 .stopacq_polarity = 1,
211 .first_conversion_delay = 3,
212 .acquisition_time = 1,
213 .averaging = 1,
214 .pen_down_acc_interval = 1,
215};
216#endif
217
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800218static struct spi_board_info bfin_spi_board_info[] __initdata = {
219#if defined(CONFIG_MTD_M25P80) \
220 || defined(CONFIG_MTD_M25P80_MODULE)
221 {
222 /* the modalias must be the same as spi device driver name */
223 .modalias = "m25p80", /* Name of spi_driver for this device */
224 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
225 .bus_num = 0, /* Framework bus number */
Graf Yanga4272932009-06-10 08:45:12 +0000226 .chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800227 .platform_data = &bfin_spi_flash_data,
228 .controller_data = &spi_flash_chip_info,
229 .mode = SPI_MODE_3,
230 },
231#endif
232
Graf Yangc19577e2009-03-05 17:35:59 +0800233#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Graf Yang65319622009-02-04 16:49:45 +0800234#if defined(CONFIG_NET_DSA_KSZ8893M) \
235 || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
236 {
237 .modalias = "ksz8893m",
238 .max_speed_hz = 5000000,
239 .bus_num = 0,
240 .chip_select = 1,
241 .platform_data = NULL,
Graf Yang65319622009-02-04 16:49:45 +0800242 .mode = SPI_MODE_3,
243 },
244#endif
Graf Yangc19577e2009-03-05 17:35:59 +0800245#endif
Graf Yang65319622009-02-04 16:49:45 +0800246
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800247#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800248 {
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800249 .modalias = "mmc_spi",
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800250 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
251 .bus_num = 0,
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800252 .chip_select = 5,
253 .controller_data = &mmc_spi_chip_info,
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800254 .mode = SPI_MODE_3,
255 },
256#endif
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800257#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
258 {
259 .modalias = "ad7877",
260 .platform_data = &bfin_ad7877_ts_info,
261 .irq = IRQ_PF8,
262 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
263 .bus_num = 0,
264 .chip_select = 2,
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800265 },
266#endif
267#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
268 && defined(CONFIG_SND_SOC_WM8731_SPI)
269 {
270 .modalias = "wm8731",
271 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
272 .bus_num = 0,
273 .chip_select = 5,
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800274 .mode = SPI_MODE_0,
275 },
276#endif
277#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
278 {
279 .modalias = "spidev",
280 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
281 .bus_num = 0,
282 .chip_select = 1,
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800283 },
284#endif
285#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
286 {
287 .modalias = "bfin-lq035q1-spi",
288 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
289 .bus_num = 0,
290 .chip_select = 1,
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800291 .mode = SPI_CPHA | SPI_CPOL,
292 },
293#endif
294};
295
296/* SPI controller data */
Sonic Zhang7d157fb2011-11-07 18:40:10 +0800297#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800298/* SPI (0) */
299static struct bfin5xx_spi_master bfin_spi0_info = {
Mike Frysingerc5af5452010-06-16 19:29:51 +0000300 .num_chipselect = 6,
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800301 .enable_dma = 1, /* master has the ability to do dma transfer */
302 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
303};
304
305static struct resource bfin_spi0_resource[] = {
306 [0] = {
307 .start = SPI0_REGBASE,
308 .end = SPI0_REGBASE + 0xFF,
309 .flags = IORESOURCE_MEM,
310 },
311 [1] = {
312 .start = CH_SPI0,
313 .end = CH_SPI0,
Yi Li53122692009-06-05 12:11:11 +0000314 .flags = IORESOURCE_DMA,
315 },
316 [2] = {
317 .start = IRQ_SPI0,
318 .end = IRQ_SPI0,
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800319 .flags = IORESOURCE_IRQ,
320 },
321};
322
323static struct platform_device bfin_spi0_device = {
324 .name = "bfin-spi",
325 .id = 0, /* Bus number */
326 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
327 .resource = bfin_spi0_resource,
328 .dev = {
329 .platform_data = &bfin_spi0_info, /* Passed to driver */
330 },
331};
332
333/* SPI (1) */
334static struct bfin5xx_spi_master bfin_spi1_info = {
Mike Frysingerc5af5452010-06-16 19:29:51 +0000335 .num_chipselect = 6,
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800336 .enable_dma = 1, /* master has the ability to do dma transfer */
337 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
338};
339
340static struct resource bfin_spi1_resource[] = {
341 [0] = {
342 .start = SPI1_REGBASE,
343 .end = SPI1_REGBASE + 0xFF,
344 .flags = IORESOURCE_MEM,
345 },
346 [1] = {
347 .start = CH_SPI1,
348 .end = CH_SPI1,
Yi Li53122692009-06-05 12:11:11 +0000349 .flags = IORESOURCE_DMA,
350 },
351 [2] = {
352 .start = IRQ_SPI1,
353 .end = IRQ_SPI1,
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800354 .flags = IORESOURCE_IRQ,
355 },
356};
357
358static struct platform_device bfin_spi1_device = {
359 .name = "bfin-spi",
360 .id = 1, /* Bus number */
361 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
362 .resource = bfin_spi1_resource,
363 .dev = {
364 .platform_data = &bfin_spi1_info, /* Passed to driver */
365 },
366};
367#endif /* spi master and devices */
368
369#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800370#ifdef CONFIG_SERIAL_BFIN_UART0
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000371static struct resource bfin_uart0_resources[] = {
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800372 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000373 .start = UART0_THR,
374 .end = UART0_GCTL+2,
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800375 .flags = IORESOURCE_MEM,
376 },
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800377 {
Sonic Zhangedb0a642011-08-01 17:53:21 +0800378 .start = IRQ_UART0_TX,
379 .end = IRQ_UART0_TX,
380 .flags = IORESOURCE_IRQ,
381 },
382 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000383 .start = IRQ_UART0_RX,
Sonic Zhangedb0a642011-08-01 17:53:21 +0800384 .end = IRQ_UART0_RX,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000385 .flags = IORESOURCE_IRQ,
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800386 },
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000387 {
388 .start = IRQ_UART0_ERROR,
389 .end = IRQ_UART0_ERROR,
390 .flags = IORESOURCE_IRQ,
391 },
392 {
393 .start = CH_UART0_TX,
394 .end = CH_UART0_TX,
395 .flags = IORESOURCE_DMA,
396 },
397 {
398 .start = CH_UART0_RX,
399 .end = CH_UART0_RX,
400 .flags = IORESOURCE_DMA,
401 },
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800402};
403
Mike Frysingera8b19882010-11-24 09:23:04 +0000404static unsigned short bfin_uart0_peripherals[] = {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000405 P_UART0_TX, P_UART0_RX, 0
406};
407
408static struct platform_device bfin_uart0_device = {
409 .name = "bfin-uart",
410 .id = 0,
411 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
412 .resource = bfin_uart0_resources,
413 .dev = {
414 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
415 },
416};
417#endif
418#ifdef CONFIG_SERIAL_BFIN_UART1
419static struct resource bfin_uart1_resources[] = {
420 {
421 .start = UART1_THR,
422 .end = UART1_GCTL+2,
423 .flags = IORESOURCE_MEM,
424 },
425 {
Sonic Zhangedb0a642011-08-01 17:53:21 +0800426 .start = IRQ_UART1_TX,
427 .end = IRQ_UART1_TX,
428 .flags = IORESOURCE_IRQ,
429 },
430 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000431 .start = IRQ_UART1_RX,
Sonic Zhangedb0a642011-08-01 17:53:21 +0800432 .end = IRQ_UART1_RX,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000433 .flags = IORESOURCE_IRQ,
434 },
435 {
436 .start = IRQ_UART1_ERROR,
437 .end = IRQ_UART1_ERROR,
438 .flags = IORESOURCE_IRQ,
439 },
440 {
441 .start = CH_UART1_TX,
442 .end = CH_UART1_TX,
443 .flags = IORESOURCE_DMA,
444 },
445 {
446 .start = CH_UART1_RX,
447 .end = CH_UART1_RX,
448 .flags = IORESOURCE_DMA,
449 },
450};
451
Mike Frysingera8b19882010-11-24 09:23:04 +0000452static unsigned short bfin_uart1_peripherals[] = {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000453 P_UART1_TX, P_UART1_RX, 0
454};
455
456static struct platform_device bfin_uart1_device = {
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800457 .name = "bfin-uart",
458 .id = 1,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000459 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
460 .resource = bfin_uart1_resources,
461 .dev = {
462 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
463 },
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800464};
465#endif
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000466#endif
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800467
468#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800469#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +0800470static struct resource bfin_sir0_resources[] = {
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800471 {
472 .start = 0xFFC00400,
473 .end = 0xFFC004FF,
474 .flags = IORESOURCE_MEM,
475 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800476 {
477 .start = IRQ_UART0_RX,
478 .end = IRQ_UART0_RX+1,
479 .flags = IORESOURCE_IRQ,
480 },
481 {
482 .start = CH_UART0_RX,
483 .end = CH_UART0_RX+1,
484 .flags = IORESOURCE_DMA,
485 },
486};
487
488static struct platform_device bfin_sir0_device = {
489 .name = "bfin_sir",
490 .id = 0,
491 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
492 .resource = bfin_sir0_resources,
493};
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800494#endif
495#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +0800496static struct resource bfin_sir1_resources[] = {
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800497 {
498 .start = 0xFFC02000,
499 .end = 0xFFC020FF,
500 .flags = IORESOURCE_MEM,
501 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800502 {
503 .start = IRQ_UART1_RX,
504 .end = IRQ_UART1_RX+1,
505 .flags = IORESOURCE_IRQ,
506 },
507 {
508 .start = CH_UART1_RX,
509 .end = CH_UART1_RX+1,
510 .flags = IORESOURCE_DMA,
511 },
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800512};
513
Graf Yang42bd8bc2009-01-07 23:14:39 +0800514static struct platform_device bfin_sir1_device = {
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800515 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +0800516 .id = 1,
517 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
518 .resource = bfin_sir1_resources,
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800519};
520#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +0800521#endif
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800522
Bob Liu97dd5052010-09-29 08:30:12 +0000523#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
524static struct platform_device bfin_i2s = {
525 .name = "bfin-i2s",
526 .id = CONFIG_SND_BF5XX_SPORT_NUM,
527 /* TODO: add platform data here */
528};
529#endif
530
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800531#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
532static struct resource bfin_twi0_resource[] = {
533 [0] = {
534 .start = TWI0_REGBASE,
535 .end = TWI0_REGBASE,
536 .flags = IORESOURCE_MEM,
537 },
538 [1] = {
539 .start = IRQ_TWI,
540 .end = IRQ_TWI,
541 .flags = IORESOURCE_IRQ,
542 },
543};
544
545static struct platform_device i2c_bfin_twi_device = {
546 .name = "i2c-bfin-twi",
547 .id = 0,
548 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
549 .resource = bfin_twi0_resource,
550};
551#endif
552
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800553static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
Michael Hennerichebd58332009-07-02 11:00:38 +0000554#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800555 {
556 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
557 },
558#endif
Michael Hennerich204844e2009-06-30 14:57:22 +0000559#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800560 {
561 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
562 .irq = IRQ_PF8,
563 },
564#endif
Bob Liu97dd5052010-09-29 08:30:12 +0000565#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
566 {
567 I2C_BOARD_INFO("ssm2602", 0x1b),
568 },
569#endif
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800570};
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800571
572#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +0000573#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
574static struct resource bfin_sport0_uart_resources[] = {
575 {
576 .start = SPORT0_TCR1,
577 .end = SPORT0_MRCS3+4,
578 .flags = IORESOURCE_MEM,
579 },
580 {
581 .start = IRQ_SPORT0_RX,
582 .end = IRQ_SPORT0_RX+1,
583 .flags = IORESOURCE_IRQ,
584 },
585 {
586 .start = IRQ_SPORT0_ERROR,
587 .end = IRQ_SPORT0_ERROR,
588 .flags = IORESOURCE_IRQ,
589 },
590};
591
Mike Frysingera8b19882010-11-24 09:23:04 +0000592static unsigned short bfin_sport0_peripherals[] = {
Sonic Zhangdf5de262009-09-23 05:01:56 +0000593 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
Sonic Zhange54b6732010-11-12 02:45:38 +0000594 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
Sonic Zhangdf5de262009-09-23 05:01:56 +0000595};
596
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800597static struct platform_device bfin_sport0_uart_device = {
598 .name = "bfin-sport-uart",
599 .id = 0,
Sonic Zhangdf5de262009-09-23 05:01:56 +0000600 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
601 .resource = bfin_sport0_uart_resources,
602 .dev = {
603 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
604 },
605};
606#endif
607#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
608static struct resource bfin_sport1_uart_resources[] = {
609 {
610 .start = SPORT1_TCR1,
611 .end = SPORT1_MRCS3+4,
612 .flags = IORESOURCE_MEM,
613 },
614 {
615 .start = IRQ_SPORT1_RX,
616 .end = IRQ_SPORT1_RX+1,
617 .flags = IORESOURCE_IRQ,
618 },
619 {
620 .start = IRQ_SPORT1_ERROR,
621 .end = IRQ_SPORT1_ERROR,
622 .flags = IORESOURCE_IRQ,
623 },
624};
625
Mike Frysingera8b19882010-11-24 09:23:04 +0000626static unsigned short bfin_sport1_peripherals[] = {
Sonic Zhangdf5de262009-09-23 05:01:56 +0000627 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
Sonic Zhange54b6732010-11-12 02:45:38 +0000628 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800629};
630
631static struct platform_device bfin_sport1_uart_device = {
632 .name = "bfin-sport-uart",
633 .id = 1,
Sonic Zhangdf5de262009-09-23 05:01:56 +0000634 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
635 .resource = bfin_sport1_uart_resources,
636 .dev = {
637 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
638 },
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800639};
640#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +0000641#endif
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800642
643#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
644#include <linux/input.h>
645#include <linux/gpio_keys.h>
646
647static struct gpio_keys_button bfin_gpio_keys_table[] = {
648 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
649 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
650};
651
652static struct gpio_keys_platform_data bfin_gpio_keys_data = {
653 .buttons = bfin_gpio_keys_table,
654 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
655};
656
657static struct platform_device bfin_device_gpiokeys = {
658 .name = "gpio-keys",
659 .dev = {
660 .platform_data = &bfin_gpio_keys_data,
661 },
662};
663#endif
664
Cliff Cai501674a2009-01-07 23:14:38 +0800665#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
666
667static struct bfin_sd_host bfin_sdh_data = {
668 .dma_chan = CH_RSI,
669 .irq_int0 = IRQ_RSI_INT0,
670 .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
671};
672
673static struct platform_device bf51x_sdh_device = {
674 .name = "bfin-sdh",
675 .id = 0,
676 .dev = {
677 .platform_data = &bfin_sdh_data,
678 },
679};
680#endif
681
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800682static const unsigned int cclk_vlev_datasheet[] =
683{
684 VRPAIR(VLEV_100, 400000000),
685 VRPAIR(VLEV_105, 426000000),
686 VRPAIR(VLEV_110, 500000000),
687 VRPAIR(VLEV_115, 533000000),
688 VRPAIR(VLEV_120, 600000000),
689};
690
691static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
692 .tuple_tab = cclk_vlev_datasheet,
693 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
694 .vr_settling_time = 25 /* us */,
695};
696
697static struct platform_device bfin_dpmc = {
698 .name = "bfin dpmc",
699 .dev = {
700 .platform_data = &bfin_dmpc_vreg_data,
701 },
702};
703
704static struct platform_device *stamp_devices[] __initdata = {
705
706 &bfin_dpmc,
707
708#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
709 &rtc_device,
710#endif
711
712#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Graf Yang65319622009-02-04 16:49:45 +0800713 &bfin_mii_bus,
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800714 &bfin_mac_device,
Graf Yang65319622009-02-04 16:49:45 +0800715#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
716 &ksz8893m_switch_device,
717#endif
Graf Yangc19577e2009-03-05 17:35:59 +0800718#endif
Graf Yang65319622009-02-04 16:49:45 +0800719
Sonic Zhang7d157fb2011-11-07 18:40:10 +0800720#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800721 &bfin_spi0_device,
722 &bfin_spi1_device,
723#endif
724
725#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000726#ifdef CONFIG_SERIAL_BFIN_UART0
727 &bfin_uart0_device,
728#endif
729#ifdef CONFIG_SERIAL_BFIN_UART1
730 &bfin_uart1_device,
731#endif
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800732#endif
733
734#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +0800735#ifdef CONFIG_BFIN_SIR0
736 &bfin_sir0_device,
737#endif
738#ifdef CONFIG_BFIN_SIR1
739 &bfin_sir1_device,
740#endif
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800741#endif
742
743#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
744 &i2c_bfin_twi_device,
745#endif
746
Bob Liu97dd5052010-09-29 08:30:12 +0000747#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
748 &bfin_i2s,
749#endif
750
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800751#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +0000752#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800753 &bfin_sport0_uart_device,
Sonic Zhangdf5de262009-09-23 05:01:56 +0000754#endif
755#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800756 &bfin_sport1_uart_device,
757#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +0000758#endif
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800759
760#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
761 &bfin_device_gpiokeys,
762#endif
763
Cliff Cai501674a2009-01-07 23:14:38 +0800764#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
765 &bf51x_sdh_device,
766#endif
767
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800768#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
769 &ezbrd_flash_device,
770#endif
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800771};
772
773static int __init ezbrd_init(void)
774{
775 printk(KERN_INFO "%s(): registering device resources\n", __func__);
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800776 i2c_register_board_info(0, bfin_i2c_board_info,
777 ARRAY_SIZE(bfin_i2c_board_info));
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800778 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
779 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
Graf Yangee0263c2009-05-20 06:06:15 +0000780 /* setup BF518-EZBRD GPIO pin PG11 to AMS2, PG15 to AMS3. */
781 peripheral_request(P_AMS2, "ParaFlash");
Sonic Zhang7d157fb2011-11-07 18:40:10 +0800782#if !defined(CONFIG_SPI_BFIN5XX) && !defined(CONFIG_SPI_BFIN5XX_MODULE)
Graf Yangee0263c2009-05-20 06:06:15 +0000783 peripheral_request(P_AMS3, "ParaFlash");
784#endif
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800785 return 0;
786}
787
788arch_initcall(ezbrd_init);
789
Sonic Zhangc13ce9f2009-09-23 09:37:46 +0000790static struct platform_device *ezbrd_early_devices[] __initdata = {
791#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
792#ifdef CONFIG_SERIAL_BFIN_UART0
793 &bfin_uart0_device,
794#endif
795#ifdef CONFIG_SERIAL_BFIN_UART1
796 &bfin_uart1_device,
797#endif
798#endif
799
800#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
801#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
802 &bfin_sport0_uart_device,
803#endif
804#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
805 &bfin_sport1_uart_device,
806#endif
807#endif
808};
809
810void __init native_machine_early_platform_add_devices(void)
811{
812 printk(KERN_INFO "register early platform devices\n");
813 early_platform_add_devices(ezbrd_early_devices,
814 ARRAY_SIZE(ezbrd_early_devices));
815}
816
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800817void native_machine_restart(char *cmd)
818{
819 /* workaround reboot hang when booting from SPI */
820 if ((bfin_read_SYSCR() & 0x7) == 0x3)
Sonic Zhangb52dae32009-02-04 16:49:45 +0800821 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800822}
823
824void bfin_get_ether_addr(char *addr)
825{
826 /* the MAC is stored in OTP memory page 0xDF */
827 u32 ret;
828 u64 otp_mac;
829 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
830
831 ret = otp_read(0xDF, 0x00, &otp_mac);
832 if (!(ret & 0x1)) {
833 char *otp_mac_p = (char *)&otp_mac;
834 for (ret = 0; ret < 6; ++ret)
835 addr[ret] = otp_mac_p[5 - ret];
836 }
837}
838EXPORT_SYMBOL(bfin_get_ether_addr);