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Paul Mackerras14cf11a2005-09-26 16:04:21 +10001/*
Paul Mackerras14cf11a2005-09-26 16:04:21 +10002 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * Modified by Cort Dougan (cort@cs.nmt.edu)
10 * and Paul Mackerras (paulus@samba.org)
11 */
12
13/*
14 * This file handles the architecture-dependent parts of hardware exceptions
15 */
16
Paul Mackerras14cf11a2005-09-26 16:04:21 +100017#include <linux/errno.h>
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/mm.h>
21#include <linux/stddef.h>
22#include <linux/unistd.h>
Paul Mackerras8dad3f92005-10-06 13:27:05 +100023#include <linux/ptrace.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100024#include <linux/slab.h>
25#include <linux/user.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100026#include <linux/interrupt.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100027#include <linux/init.h>
28#include <linux/module.h>
Paul Mackerras8dad3f92005-10-06 13:27:05 +100029#include <linux/prctl.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100030#include <linux/delay.h>
31#include <linux/kprobes.h>
Michael Ellermancc532912005-12-04 18:39:43 +110032#include <linux/kexec.h>
Michael Hanselmann5474c122006-06-25 05:47:08 -070033#include <linux/backlight.h>
Jeremy Fitzhardinge73c9cea2006-12-08 03:30:41 -080034#include <linux/bug.h>
Christoph Hellwig1eeb66a2007-05-08 00:27:03 -070035#include <linux/kdebug.h>
Geert Uytterhoeven80947e72009-05-18 02:10:05 +000036#include <linux/debugfs.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100037
Geert Uytterhoeven80947e72009-05-18 02:10:05 +000038#include <asm/emulated_ops.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100039#include <asm/pgtable.h>
40#include <asm/uaccess.h>
41#include <asm/system.h>
42#include <asm/io.h>
Paul Mackerras86417782005-10-10 22:37:57 +100043#include <asm/machdep.h>
44#include <asm/rtas.h>
David Gibsonf7f6f4f2005-10-19 14:53:32 +100045#include <asm/pmc.h>
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +100046#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +100047#include <asm/reg.h>
Paul Mackerras86417782005-10-10 22:37:57 +100048#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +100049#ifdef CONFIG_PMAC_BACKLIGHT
50#include <asm/backlight.h>
51#endif
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +100052#ifdef CONFIG_PPC64
Paul Mackerras86417782005-10-10 22:37:57 +100053#include <asm/firmware.h>
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +100054#include <asm/processor.h>
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +100055#endif
David Wilderc0ce7d02006-06-23 15:29:34 -070056#include <asm/kexec.h>
Kumar Gala16c57b32009-02-10 20:10:44 +000057#include <asm/ppc-opcode.h>
Kumar Gala620165f2009-02-12 13:54:53 +000058#ifdef CONFIG_FSL_BOOKE
59#include <asm/dbell.h>
60#endif
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +100061
Olof Johansson7dbb9222008-01-31 14:34:47 +110062#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
Anton Blanchard5be34922010-01-12 00:50:14 +000063int (*__debugger)(struct pt_regs *regs) __read_mostly;
64int (*__debugger_ipi)(struct pt_regs *regs) __read_mostly;
65int (*__debugger_bpt)(struct pt_regs *regs) __read_mostly;
66int (*__debugger_sstep)(struct pt_regs *regs) __read_mostly;
67int (*__debugger_iabr_match)(struct pt_regs *regs) __read_mostly;
68int (*__debugger_dabr_match)(struct pt_regs *regs) __read_mostly;
69int (*__debugger_fault_handler)(struct pt_regs *regs) __read_mostly;
Paul Mackerras14cf11a2005-09-26 16:04:21 +100070
71EXPORT_SYMBOL(__debugger);
72EXPORT_SYMBOL(__debugger_ipi);
73EXPORT_SYMBOL(__debugger_bpt);
74EXPORT_SYMBOL(__debugger_sstep);
75EXPORT_SYMBOL(__debugger_iabr_match);
76EXPORT_SYMBOL(__debugger_dabr_match);
77EXPORT_SYMBOL(__debugger_fault_handler);
78#endif
79
Paul Mackerras14cf11a2005-09-26 16:04:21 +100080/*
81 * Trap & Exception support
82 */
83
anton@samba.org6031d9d2007-03-20 20:38:12 -050084#ifdef CONFIG_PMAC_BACKLIGHT
85static void pmac_backlight_unblank(void)
86{
87 mutex_lock(&pmac_backlight_mutex);
88 if (pmac_backlight) {
89 struct backlight_properties *props;
90
91 props = &pmac_backlight->props;
92 props->brightness = props->max_brightness;
93 props->power = FB_BLANK_UNBLANK;
94 backlight_update_status(pmac_backlight);
95 }
96 mutex_unlock(&pmac_backlight_mutex);
97}
98#else
99static inline void pmac_backlight_unblank(void) { }
100#endif
101
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000102int die(const char *str, struct pt_regs *regs, long err)
103{
anton@samba.org34c2a142007-03-20 20:38:13 -0500104 static struct {
Thomas Gleixnerb8f87782010-02-18 02:22:31 +0000105 raw_spinlock_t lock;
anton@samba.org34c2a142007-03-20 20:38:13 -0500106 u32 lock_owner;
107 int lock_owner_depth;
108 } die = {
Thomas Gleixnerb8f87782010-02-18 02:22:31 +0000109 .lock = __RAW_SPIN_LOCK_UNLOCKED(die.lock),
anton@samba.org34c2a142007-03-20 20:38:13 -0500110 .lock_owner = -1,
111 .lock_owner_depth = 0
112 };
David Wilderc0ce7d02006-06-23 15:29:34 -0700113 static int die_counter;
anton@samba.org34c2a142007-03-20 20:38:13 -0500114 unsigned long flags;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000115
116 if (debugger(regs))
117 return 1;
118
anton@samba.org293e4682007-03-20 20:38:11 -0500119 oops_enter();
120
anton@samba.org34c2a142007-03-20 20:38:13 -0500121 if (die.lock_owner != raw_smp_processor_id()) {
122 console_verbose();
Thomas Gleixnerb8f87782010-02-18 02:22:31 +0000123 raw_spin_lock_irqsave(&die.lock, flags);
anton@samba.org34c2a142007-03-20 20:38:13 -0500124 die.lock_owner = smp_processor_id();
125 die.lock_owner_depth = 0;
126 bust_spinlocks(1);
127 if (machine_is(powermac))
128 pmac_backlight_unblank();
129 } else {
130 local_save_flags(flags);
131 }
Michael Hanselmann5474c122006-06-25 05:47:08 -0700132
anton@samba.org34c2a142007-03-20 20:38:13 -0500133 if (++die.lock_owner_depth < 3) {
134 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000135#ifdef CONFIG_PREEMPT
anton@samba.org34c2a142007-03-20 20:38:13 -0500136 printk("PREEMPT ");
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000137#endif
138#ifdef CONFIG_SMP
anton@samba.org34c2a142007-03-20 20:38:13 -0500139 printk("SMP NR_CPUS=%d ", NR_CPUS);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000140#endif
141#ifdef CONFIG_DEBUG_PAGEALLOC
anton@samba.org34c2a142007-03-20 20:38:13 -0500142 printk("DEBUG_PAGEALLOC ");
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000143#endif
144#ifdef CONFIG_NUMA
anton@samba.org34c2a142007-03-20 20:38:13 -0500145 printk("NUMA ");
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000146#endif
anton@samba.orgae7f4462007-03-20 20:38:14 -0500147 printk("%s\n", ppc_md.name ? ppc_md.name : "");
Benjamin Herrenschmidte8222502006-03-28 23:15:54 +1100148
Anton Blanchard66fcb102010-02-07 14:44:16 +0000149 sysfs_printk_last_file();
150 if (notify_die(DIE_OOPS, str, regs, err, 255,
151 SIGSEGV) == NOTIFY_STOP)
152 return 1;
153
anton@samba.org34c2a142007-03-20 20:38:13 -0500154 print_modules();
155 show_regs(regs);
156 } else {
157 printk("Recursive die() failure, output suppressed\n");
158 }
159
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000160 bust_spinlocks(0);
anton@samba.org34c2a142007-03-20 20:38:13 -0500161 die.lock_owner = -1;
Pavel Emelianovbcdcd8e2007-07-17 04:03:42 -0700162 add_taint(TAINT_DIE);
Thomas Gleixnerb8f87782010-02-18 02:22:31 +0000163 raw_spin_unlock_irqrestore(&die.lock, flags);
David Wilderc0ce7d02006-06-23 15:29:34 -0700164
165 if (kexec_should_crash(current) ||
166 kexec_sr_activated(smp_processor_id()))
167 crash_kexec(regs);
168 crash_kexec_secondary(regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000169
170 if (in_interrupt())
171 panic("Fatal exception in interrupt");
172
Hormscea6a4b2006-07-30 03:03:34 -0700173 if (panic_on_oops)
Horms012c4372006-08-13 23:24:22 -0700174 panic("Fatal exception");
Hormscea6a4b2006-07-30 03:03:34 -0700175
anton@samba.org293e4682007-03-20 20:38:11 -0500176 oops_exit();
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000177 do_exit(err);
178
179 return 0;
180}
181
Oleg Nesterov25baa352009-12-15 16:47:18 -0800182void user_single_step_siginfo(struct task_struct *tsk,
183 struct pt_regs *regs, siginfo_t *info)
184{
185 memset(info, 0, sizeof(*info));
186 info->si_signo = SIGTRAP;
187 info->si_code = TRAP_TRACE;
188 info->si_addr = (void __user *)regs->nip;
189}
190
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000191void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
192{
193 siginfo_t info;
Olof Johanssond0c3d532007-10-12 10:20:07 +1000194 const char fmt32[] = KERN_INFO "%s[%d]: unhandled signal %d " \
195 "at %08lx nip %08lx lr %08lx code %x\n";
196 const char fmt64[] = KERN_INFO "%s[%d]: unhandled signal %d " \
197 "at %016lx nip %016lx lr %016lx code %x\n";
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000198
199 if (!user_mode(regs)) {
200 if (die("Exception in kernel mode", regs, signr))
201 return;
Olof Johanssond0c3d532007-10-12 10:20:07 +1000202 } else if (show_unhandled_signals &&
203 unhandled_signal(current, signr) &&
204 printk_ratelimit()) {
205 printk(regs->msr & MSR_SF ? fmt64 : fmt32,
206 current->comm, current->pid, signr,
207 addr, regs->nip, regs->link, code);
208 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000209
210 memset(&info, 0, sizeof(info));
211 info.si_signo = signr;
212 info.si_code = code;
213 info.si_addr = (void __user *) addr;
214 force_sig_info(signr, &info, current);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000215}
216
217#ifdef CONFIG_PPC64
218void system_reset_exception(struct pt_regs *regs)
219{
220 /* See if any machine dependent calls */
Arnd Bergmannc902be72006-01-04 19:55:53 +0000221 if (ppc_md.system_reset_exception) {
222 if (ppc_md.system_reset_exception(regs))
223 return;
224 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000225
David Wilderc0ce7d02006-06-23 15:29:34 -0700226#ifdef CONFIG_KEXEC
227 cpu_set(smp_processor_id(), cpus_in_sr);
228#endif
229
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000230 die("System Reset", regs, SIGABRT);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000231
David Wildereac83922006-06-29 15:17:30 -0700232 /*
233 * Some CPUs when released from the debugger will execute this path.
234 * These CPUs entered the debugger via a soft-reset. If the CPU was
235 * hung before entering the debugger it will return to the hung
236 * state when exiting this function. This causes a problem in
237 * kdump since the hung CPU(s) will not respond to the IPI sent
238 * from kdump. To prevent the problem we call crash_kexec_secondary()
239 * here. If a kdump had not been initiated or we exit the debugger
240 * with the "exit and recover" command (x) crash_kexec_secondary()
241 * will return after 5ms and the CPU returns to its previous state.
242 */
243 crash_kexec_secondary(regs);
244
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000245 /* Must die if the interrupt is not recoverable */
246 if (!(regs->msr & MSR_RI))
247 panic("Unrecoverable System Reset");
248
249 /* What should we do here? We could issue a shutdown or hard reset. */
250}
251#endif
252
253/*
254 * I/O accesses can cause machine checks on powermacs.
255 * Check if the NIP corresponds to the address of a sync
256 * instruction for which there is an entry in the exception
257 * table.
258 * Note that the 601 only takes a machine check on TEA
259 * (transfer error ack) signal assertion, and does not
260 * set any of the top 16 bits of SRR1.
261 * -- paulus.
262 */
263static inline int check_io_access(struct pt_regs *regs)
264{
Benjamin Herrenschmidt68a64352006-11-13 09:27:39 +1100265#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000266 unsigned long msr = regs->msr;
267 const struct exception_table_entry *entry;
268 unsigned int *nip = (unsigned int *)regs->nip;
269
270 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
271 && (entry = search_exception_tables(regs->nip)) != NULL) {
272 /*
273 * Check that it's a sync instruction, or somewhere
274 * in the twi; isync; nop sequence that inb/inw/inl uses.
275 * As the address is in the exception table
276 * we should be able to read the instr there.
277 * For the debug message, we look at the preceding
278 * load or store.
279 */
280 if (*nip == 0x60000000) /* nop */
281 nip -= 2;
282 else if (*nip == 0x4c00012c) /* isync */
283 --nip;
284 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) {
285 /* sync or twi */
286 unsigned int rb;
287
288 --nip;
289 rb = (*nip >> 11) & 0x1f;
290 printk(KERN_DEBUG "%s bad port %lx at %p\n",
291 (*nip & 0x100)? "OUT to": "IN from",
292 regs->gpr[rb] - _IO_BASE, nip);
293 regs->msr |= MSR_RI;
294 regs->nip = entry->fixup;
295 return 1;
296 }
297 }
Benjamin Herrenschmidt68a64352006-11-13 09:27:39 +1100298#endif /* CONFIG_PPC32 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000299 return 0;
300}
301
Dave Kleikamp172ae2e2010-02-08 11:50:57 +0000302#ifdef CONFIG_PPC_ADV_DEBUG_REGS
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000303/* On 4xx, the reason for the machine check or program exception
304 is in the ESR. */
305#define get_reason(regs) ((regs)->dsisr)
306#ifndef CONFIG_FSL_BOOKE
307#define get_mc_reason(regs) ((regs)->dsisr)
308#else
Becky Bruce86d7a9a2007-08-02 15:37:15 -0500309#define get_mc_reason(regs) (mfspr(SPRN_MCSR) & MCSR_MASK)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000310#endif
311#define REASON_FP ESR_FP
312#define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
313#define REASON_PRIVILEGED ESR_PPR
314#define REASON_TRAP ESR_PTR
315
316/* single-step stuff */
317#define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC)
318#define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
319
320#else
321/* On non-4xx, the reason for the machine check or program
322 exception is in the MSR. */
323#define get_reason(regs) ((regs)->msr)
324#define get_mc_reason(regs) ((regs)->msr)
325#define REASON_FP 0x100000
326#define REASON_ILLEGAL 0x80000
327#define REASON_PRIVILEGED 0x40000
328#define REASON_TRAP 0x20000
329
330#define single_stepping(regs) ((regs)->msr & MSR_SE)
331#define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
332#endif
333
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100334#if defined(CONFIG_4xx)
335int machine_check_4xx(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000336{
Kumar Gala1a6a4ff2006-03-30 21:11:15 -0600337 unsigned long reason = get_mc_reason(regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000338
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000339 if (reason & ESR_IMCP) {
340 printk("Instruction");
341 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
342 } else
343 printk("Data");
344 printk(" machine check in kernel mode.\n");
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100345
346 return 0;
347}
348
349int machine_check_440A(struct pt_regs *regs)
350{
351 unsigned long reason = get_mc_reason(regs);
352
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000353 printk("Machine check in kernel mode.\n");
354 if (reason & ESR_IMCP){
355 printk("Instruction Synchronous Machine Check exception\n");
356 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
357 }
358 else {
359 u32 mcsr = mfspr(SPRN_MCSR);
360 if (mcsr & MCSR_IB)
361 printk("Instruction Read PLB Error\n");
362 if (mcsr & MCSR_DRB)
363 printk("Data Read PLB Error\n");
364 if (mcsr & MCSR_DWB)
365 printk("Data Write PLB Error\n");
366 if (mcsr & MCSR_TLBP)
367 printk("TLB Parity Error\n");
368 if (mcsr & MCSR_ICP){
369 flush_instruction_cache();
370 printk("I-Cache Parity Error\n");
371 }
372 if (mcsr & MCSR_DCSP)
373 printk("D-Cache Search Parity Error\n");
374 if (mcsr & MCSR_DCFP)
375 printk("D-Cache Flush Parity Error\n");
376 if (mcsr & MCSR_IMPE)
377 printk("Machine Check exception is imprecise\n");
378
379 /* Clear MCSR */
380 mtspr(SPRN_MCSR, mcsr);
381 }
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100382 return 0;
383}
384#elif defined(CONFIG_E500)
385int machine_check_e500(struct pt_regs *regs)
386{
387 unsigned long reason = get_mc_reason(regs);
388
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000389 printk("Machine check in kernel mode.\n");
390 printk("Caused by (from MCSR=%lx): ", reason);
391
392 if (reason & MCSR_MCP)
393 printk("Machine Check Signal\n");
394 if (reason & MCSR_ICPERR)
395 printk("Instruction Cache Parity Error\n");
396 if (reason & MCSR_DCP_PERR)
397 printk("Data Cache Push Parity Error\n");
398 if (reason & MCSR_DCPERR)
399 printk("Data Cache Parity Error\n");
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000400 if (reason & MCSR_BUS_IAERR)
401 printk("Bus - Instruction Address Error\n");
402 if (reason & MCSR_BUS_RAERR)
403 printk("Bus - Read Address Error\n");
404 if (reason & MCSR_BUS_WAERR)
405 printk("Bus - Write Address Error\n");
406 if (reason & MCSR_BUS_IBERR)
407 printk("Bus - Instruction Data Error\n");
408 if (reason & MCSR_BUS_RBERR)
409 printk("Bus - Read Data Bus Error\n");
410 if (reason & MCSR_BUS_WBERR)
411 printk("Bus - Read Data Bus Error\n");
412 if (reason & MCSR_BUS_IPERR)
413 printk("Bus - Instruction Parity Error\n");
414 if (reason & MCSR_BUS_RPERR)
415 printk("Bus - Read Parity Error\n");
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100416
417 return 0;
418}
419#elif defined(CONFIG_E200)
420int machine_check_e200(struct pt_regs *regs)
421{
422 unsigned long reason = get_mc_reason(regs);
423
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000424 printk("Machine check in kernel mode.\n");
425 printk("Caused by (from MCSR=%lx): ", reason);
426
427 if (reason & MCSR_MCP)
428 printk("Machine Check Signal\n");
429 if (reason & MCSR_CP_PERR)
430 printk("Cache Push Parity Error\n");
431 if (reason & MCSR_CPERR)
432 printk("Cache Parity Error\n");
433 if (reason & MCSR_EXCP_ERR)
434 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n");
435 if (reason & MCSR_BUS_IRERR)
436 printk("Bus - Read Bus Error on instruction fetch\n");
437 if (reason & MCSR_BUS_DRERR)
438 printk("Bus - Read Bus Error on data load\n");
439 if (reason & MCSR_BUS_WRERR)
440 printk("Bus - Write Bus Error on buffered store or cache line push\n");
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100441
442 return 0;
443}
444#else
445int machine_check_generic(struct pt_regs *regs)
446{
447 unsigned long reason = get_mc_reason(regs);
448
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000449 printk("Machine check in kernel mode.\n");
450 printk("Caused by (from SRR1=%lx): ", reason);
451 switch (reason & 0x601F0000) {
452 case 0x80000:
453 printk("Machine check signal\n");
454 break;
455 case 0: /* for 601 */
456 case 0x40000:
457 case 0x140000: /* 7450 MSS error and TEA */
458 printk("Transfer error ack signal\n");
459 break;
460 case 0x20000:
461 printk("Data parity error signal\n");
462 break;
463 case 0x10000:
464 printk("Address parity error signal\n");
465 break;
466 case 0x20000000:
467 printk("L1 Data Cache error\n");
468 break;
469 case 0x40000000:
470 printk("L1 Instruction Cache error\n");
471 break;
472 case 0x00100000:
473 printk("L2 data cache parity error\n");
474 break;
475 default:
476 printk("Unknown values in msr\n");
477 }
Olof Johansson75918a42007-09-21 05:11:20 +1000478 return 0;
479}
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100480#endif /* everything else */
Olof Johansson75918a42007-09-21 05:11:20 +1000481
482void machine_check_exception(struct pt_regs *regs)
483{
484 int recover = 0;
485
Anton Blanchard89713ed2010-01-31 20:34:06 +0000486 __get_cpu_var(irq_stat).mce_exceptions++;
487
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100488 /* See if any machine dependent calls. In theory, we would want
489 * to call the CPU first, and call the ppc_md. one if the CPU
490 * one returns a positive number. However there is existing code
491 * that assumes the board gets a first chance, so let's keep it
492 * that way for now and fix things later. --BenH.
493 */
Olof Johansson75918a42007-09-21 05:11:20 +1000494 if (ppc_md.machine_check_exception)
495 recover = ppc_md.machine_check_exception(regs);
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100496 else if (cur_cpu_spec->machine_check)
497 recover = cur_cpu_spec->machine_check(regs);
Olof Johansson75918a42007-09-21 05:11:20 +1000498
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100499 if (recover > 0)
Olof Johansson75918a42007-09-21 05:11:20 +1000500 return;
501
502 if (user_mode(regs)) {
503 regs->msr |= MSR_RI;
504 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
505 return;
506 }
507
508#if defined(CONFIG_8xx) && defined(CONFIG_PCI)
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100509 /* the qspan pci read routines can cause machine checks -- Cort
510 *
511 * yuck !!! that totally needs to go away ! There are better ways
512 * to deal with that than having a wart in the mcheck handler.
513 * -- BenH
514 */
Olof Johansson75918a42007-09-21 05:11:20 +1000515 bad_page_fault(regs, regs->dar, SIGBUS);
516 return;
517#endif
518
519 if (debugger_fault_handler(regs)) {
520 regs->msr |= MSR_RI;
521 return;
522 }
523
524 if (check_io_access(regs))
525 return;
526
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000527 if (debugger_fault_handler(regs))
528 return;
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000529 die("Machine check", regs, SIGBUS);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000530
531 /* Must die if the interrupt is not recoverable */
532 if (!(regs->msr & MSR_RI))
533 panic("Unrecoverable Machine check");
534}
535
536void SMIException(struct pt_regs *regs)
537{
538 die("System Management Interrupt", regs, SIGABRT);
539}
540
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000541void unknown_exception(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000542{
543 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
544 regs->nip, regs->msr, regs->trap);
545
546 _exception(SIGTRAP, regs, 0, 0);
547}
548
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000549void instruction_breakpoint_exception(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000550{
551 if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
552 5, SIGTRAP) == NOTIFY_STOP)
553 return;
554 if (debugger_iabr_match(regs))
555 return;
556 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
557}
558
559void RunModeException(struct pt_regs *regs)
560{
561 _exception(SIGTRAP, regs, 0, 0);
562}
563
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000564void __kprobes single_step_exception(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000565{
566 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
567
568 if (notify_die(DIE_SSTEP, "single_step", regs, 5,
569 5, SIGTRAP) == NOTIFY_STOP)
570 return;
571 if (debugger_sstep(regs))
572 return;
573
574 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
575}
576
577/*
578 * After we have successfully emulated an instruction, we have to
579 * check if the instruction was being single-stepped, and if so,
580 * pretend we got a single-step exception. This was pointed out
581 * by Kumar Gala. -- paulus
582 */
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000583static void emulate_single_step(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000584{
585 if (single_stepping(regs)) {
586 clear_single_step(regs);
587 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
588 }
589}
590
Kumar Gala5fad2932007-02-07 01:47:59 -0600591static inline int __parse_fpscr(unsigned long fpscr)
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000592{
Kumar Gala5fad2932007-02-07 01:47:59 -0600593 int ret = 0;
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000594
595 /* Invalid operation */
596 if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX))
Kumar Gala5fad2932007-02-07 01:47:59 -0600597 ret = FPE_FLTINV;
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000598
599 /* Overflow */
600 else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX))
Kumar Gala5fad2932007-02-07 01:47:59 -0600601 ret = FPE_FLTOVF;
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000602
603 /* Underflow */
604 else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX))
Kumar Gala5fad2932007-02-07 01:47:59 -0600605 ret = FPE_FLTUND;
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000606
607 /* Divide by zero */
608 else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX))
Kumar Gala5fad2932007-02-07 01:47:59 -0600609 ret = FPE_FLTDIV;
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000610
611 /* Inexact result */
612 else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX))
Kumar Gala5fad2932007-02-07 01:47:59 -0600613 ret = FPE_FLTRES;
614
615 return ret;
616}
617
618static void parse_fpe(struct pt_regs *regs)
619{
620 int code = 0;
621
622 flush_fp_to_thread(current);
623
624 code = __parse_fpscr(current->thread.fpscr.val);
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000625
626 _exception(SIGFPE, regs, code, regs->nip);
627}
628
629/*
630 * Illegal instruction emulation support. Originally written to
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000631 * provide the PVR to user applications using the mfspr rd, PVR.
632 * Return non-zero if we can't emulate, or -EFAULT if the associated
633 * memory access caused an access fault. Return zero on success.
634 *
635 * There are a couple of ways to do this, either "decode" the instruction
636 * or directly match lots of bits. In this case, matching lots of
637 * bits is faster and easier.
Paul Mackerras86417782005-10-10 22:37:57 +1000638 *
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000639 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000640static int emulate_string_inst(struct pt_regs *regs, u32 instword)
641{
642 u8 rT = (instword >> 21) & 0x1f;
643 u8 rA = (instword >> 16) & 0x1f;
644 u8 NB_RB = (instword >> 11) & 0x1f;
645 u32 num_bytes;
646 unsigned long EA;
647 int pos = 0;
648
649 /* Early out if we are an invalid form of lswx */
Kumar Gala16c57b32009-02-10 20:10:44 +0000650 if ((instword & PPC_INST_STRING_MASK) == PPC_INST_LSWX)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000651 if ((rT == rA) || (rT == NB_RB))
652 return -EINVAL;
653
654 EA = (rA == 0) ? 0 : regs->gpr[rA];
655
Kumar Gala16c57b32009-02-10 20:10:44 +0000656 switch (instword & PPC_INST_STRING_MASK) {
657 case PPC_INST_LSWX:
658 case PPC_INST_STSWX:
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000659 EA += NB_RB;
660 num_bytes = regs->xer & 0x7f;
661 break;
Kumar Gala16c57b32009-02-10 20:10:44 +0000662 case PPC_INST_LSWI:
663 case PPC_INST_STSWI:
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000664 num_bytes = (NB_RB == 0) ? 32 : NB_RB;
665 break;
666 default:
667 return -EINVAL;
668 }
669
670 while (num_bytes != 0)
671 {
672 u8 val;
673 u32 shift = 8 * (3 - (pos & 0x3));
674
Kumar Gala16c57b32009-02-10 20:10:44 +0000675 switch ((instword & PPC_INST_STRING_MASK)) {
676 case PPC_INST_LSWX:
677 case PPC_INST_LSWI:
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000678 if (get_user(val, (u8 __user *)EA))
679 return -EFAULT;
680 /* first time updating this reg,
681 * zero it out */
682 if (pos == 0)
683 regs->gpr[rT] = 0;
684 regs->gpr[rT] |= val << shift;
685 break;
Kumar Gala16c57b32009-02-10 20:10:44 +0000686 case PPC_INST_STSWI:
687 case PPC_INST_STSWX:
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000688 val = regs->gpr[rT] >> shift;
689 if (put_user(val, (u8 __user *)EA))
690 return -EFAULT;
691 break;
692 }
693 /* move EA to next address */
694 EA += 1;
695 num_bytes--;
696
697 /* manage our position within the register */
698 if (++pos == 4) {
699 pos = 0;
700 if (++rT == 32)
701 rT = 0;
702 }
703 }
704
705 return 0;
706}
707
Will Schmidtc3412dc2006-08-30 13:11:38 -0500708static int emulate_popcntb_inst(struct pt_regs *regs, u32 instword)
709{
710 u32 ra,rs;
711 unsigned long tmp;
712
713 ra = (instword >> 16) & 0x1f;
714 rs = (instword >> 21) & 0x1f;
715
716 tmp = regs->gpr[rs];
717 tmp = tmp - ((tmp >> 1) & 0x5555555555555555ULL);
718 tmp = (tmp & 0x3333333333333333ULL) + ((tmp >> 2) & 0x3333333333333333ULL);
719 tmp = (tmp + (tmp >> 4)) & 0x0f0f0f0f0f0f0f0fULL;
720 regs->gpr[ra] = tmp;
721
722 return 0;
723}
724
Kumar Galac1469f12007-11-19 21:35:29 -0600725static int emulate_isel(struct pt_regs *regs, u32 instword)
726{
727 u8 rT = (instword >> 21) & 0x1f;
728 u8 rA = (instword >> 16) & 0x1f;
729 u8 rB = (instword >> 11) & 0x1f;
730 u8 BC = (instword >> 6) & 0x1f;
731 u8 bit;
732 unsigned long tmp;
733
734 tmp = (rA == 0) ? 0 : regs->gpr[rA];
735 bit = (regs->ccr >> (31 - BC)) & 0x1;
736
737 regs->gpr[rT] = bit ? tmp : regs->gpr[rB];
738
739 return 0;
740}
741
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000742static int emulate_instruction(struct pt_regs *regs)
743{
744 u32 instword;
745 u32 rd;
746
Paul Mackerrasfab5db92006-06-07 16:14:40 +1000747 if (!user_mode(regs) || (regs->msr & MSR_LE))
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000748 return -EINVAL;
749 CHECK_FULL_REGS(regs);
750
751 if (get_user(instword, (u32 __user *)(regs->nip)))
752 return -EFAULT;
753
754 /* Emulate the mfspr rD, PVR. */
Kumar Gala16c57b32009-02-10 20:10:44 +0000755 if ((instword & PPC_INST_MFSPR_PVR_MASK) == PPC_INST_MFSPR_PVR) {
Anton Blanchardeecff812009-10-27 18:46:55 +0000756 PPC_WARN_EMULATED(mfpvr, regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000757 rd = (instword >> 21) & 0x1f;
758 regs->gpr[rd] = mfspr(SPRN_PVR);
759 return 0;
760 }
761
762 /* Emulating the dcba insn is just a no-op. */
Geert Uytterhoeven80947e72009-05-18 02:10:05 +0000763 if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA) {
Anton Blanchardeecff812009-10-27 18:46:55 +0000764 PPC_WARN_EMULATED(dcba, regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000765 return 0;
Geert Uytterhoeven80947e72009-05-18 02:10:05 +0000766 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000767
768 /* Emulate the mcrxr insn. */
Kumar Gala16c57b32009-02-10 20:10:44 +0000769 if ((instword & PPC_INST_MCRXR_MASK) == PPC_INST_MCRXR) {
Paul Mackerras86417782005-10-10 22:37:57 +1000770 int shift = (instword >> 21) & 0x1c;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000771 unsigned long msk = 0xf0000000UL >> shift;
772
Anton Blanchardeecff812009-10-27 18:46:55 +0000773 PPC_WARN_EMULATED(mcrxr, regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000774 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
775 regs->xer &= ~0xf0000000UL;
776 return 0;
777 }
778
779 /* Emulate load/store string insn. */
Geert Uytterhoeven80947e72009-05-18 02:10:05 +0000780 if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING) {
Anton Blanchardeecff812009-10-27 18:46:55 +0000781 PPC_WARN_EMULATED(string, regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000782 return emulate_string_inst(regs, instword);
Geert Uytterhoeven80947e72009-05-18 02:10:05 +0000783 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000784
Will Schmidtc3412dc2006-08-30 13:11:38 -0500785 /* Emulate the popcntb (Population Count Bytes) instruction. */
Kumar Gala16c57b32009-02-10 20:10:44 +0000786 if ((instword & PPC_INST_POPCNTB_MASK) == PPC_INST_POPCNTB) {
Anton Blanchardeecff812009-10-27 18:46:55 +0000787 PPC_WARN_EMULATED(popcntb, regs);
Will Schmidtc3412dc2006-08-30 13:11:38 -0500788 return emulate_popcntb_inst(regs, instword);
789 }
790
Kumar Galac1469f12007-11-19 21:35:29 -0600791 /* Emulate isel (Integer Select) instruction */
Kumar Gala16c57b32009-02-10 20:10:44 +0000792 if ((instword & PPC_INST_ISEL_MASK) == PPC_INST_ISEL) {
Anton Blanchardeecff812009-10-27 18:46:55 +0000793 PPC_WARN_EMULATED(isel, regs);
Kumar Galac1469f12007-11-19 21:35:29 -0600794 return emulate_isel(regs, instword);
795 }
796
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000797 return -EINVAL;
798}
799
Jeremy Fitzhardinge73c9cea2006-12-08 03:30:41 -0800800int is_valid_bugaddr(unsigned long addr)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000801{
Jeremy Fitzhardinge73c9cea2006-12-08 03:30:41 -0800802 return is_kernel_addr(addr);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000803}
804
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000805void __kprobes program_check_exception(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000806{
807 unsigned int reason = get_reason(regs);
808 extern int do_mathemu(struct pt_regs *regs);
809
Kim Phillipsaa42c692006-12-08 02:43:30 -0600810 /* We can now get here via a FP Unavailable exception if the core
Kumar Gala04903a32007-02-07 01:13:32 -0600811 * has no FPU, in that case the reason flags will be 0 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000812
813 if (reason & REASON_FP) {
814 /* IEEE FP exception */
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000815 parse_fpe(regs);
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000816 return;
817 }
818 if (reason & REASON_TRAP) {
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000819 /* trap exception */
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000820 if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP)
821 == NOTIFY_STOP)
822 return;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000823 if (debugger_bpt(regs))
824 return;
Jeremy Fitzhardinge73c9cea2006-12-08 03:30:41 -0800825
826 if (!(regs->msr & MSR_PR) && /* not user-mode */
Heiko Carstens608e2612007-07-15 23:41:39 -0700827 report_bug(regs->nip, regs) == BUG_TRAP_TYPE_WARN) {
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000828 regs->nip += 4;
829 return;
830 }
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000831 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
832 return;
833 }
834
Paul Mackerrascd8a5672006-03-03 17:11:40 +1100835 local_irq_enable();
836
Kumar Gala04903a32007-02-07 01:13:32 -0600837#ifdef CONFIG_MATH_EMULATION
838 /* (reason & REASON_ILLEGAL) would be the obvious thing here,
839 * but there seems to be a hardware bug on the 405GP (RevD)
840 * that means ESR is sometimes set incorrectly - either to
841 * ESR_DST (!?) or 0. In the process of chasing this with the
842 * hardware people - not sure if it can happen on any illegal
843 * instruction or only on FP instructions, whether there is a
844 * pattern to occurences etc. -dgibson 31/Mar/2003 */
Kumar Gala5fad2932007-02-07 01:47:59 -0600845 switch (do_mathemu(regs)) {
846 case 0:
Kumar Gala04903a32007-02-07 01:13:32 -0600847 emulate_single_step(regs);
848 return;
Kumar Gala5fad2932007-02-07 01:47:59 -0600849 case 1: {
850 int code = 0;
851 code = __parse_fpscr(current->thread.fpscr.val);
852 _exception(SIGFPE, regs, code, regs->nip);
853 return;
854 }
855 case -EFAULT:
856 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
857 return;
Kumar Gala04903a32007-02-07 01:13:32 -0600858 }
Kumar Gala5fad2932007-02-07 01:47:59 -0600859 /* fall through on any other errors */
Kumar Gala04903a32007-02-07 01:13:32 -0600860#endif /* CONFIG_MATH_EMULATION */
861
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000862 /* Try to emulate it if we should. */
863 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000864 switch (emulate_instruction(regs)) {
865 case 0:
866 regs->nip += 4;
867 emulate_single_step(regs);
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000868 return;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000869 case -EFAULT:
870 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000871 return;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000872 }
873 }
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000874
875 if (reason & REASON_PRIVILEGED)
876 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
877 else
878 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000879}
880
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000881void alignment_exception(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000882{
Benjamin Herrenschmidt4393c4f2006-11-01 15:11:39 +1100883 int sig, code, fixed = 0;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000884
Paul Mackerrase9370ae2006-06-07 16:15:39 +1000885 /* we don't implement logging of alignment exceptions */
886 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS))
887 fixed = fix_alignment(regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000888
889 if (fixed == 1) {
890 regs->nip += 4; /* skip over emulated instruction */
891 emulate_single_step(regs);
892 return;
893 }
894
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000895 /* Operand address was bad */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000896 if (fixed == -EFAULT) {
Benjamin Herrenschmidt4393c4f2006-11-01 15:11:39 +1100897 sig = SIGSEGV;
898 code = SEGV_ACCERR;
899 } else {
900 sig = SIGBUS;
901 code = BUS_ADRALN;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000902 }
Benjamin Herrenschmidt4393c4f2006-11-01 15:11:39 +1100903 if (user_mode(regs))
904 _exception(sig, regs, code, regs->dar);
905 else
906 bad_page_fault(regs, regs->dar, sig);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000907}
908
909void StackOverflow(struct pt_regs *regs)
910{
911 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
912 current, regs->gpr[1]);
913 debugger(regs);
914 show_regs(regs);
915 panic("kernel stack overflow");
916}
917
918void nonrecoverable_exception(struct pt_regs *regs)
919{
920 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
921 regs->nip, regs->msr);
922 debugger(regs);
923 die("nonrecoverable exception", regs, SIGKILL);
924}
925
926void trace_syscall(struct pt_regs *regs)
927{
928 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n",
Alexey Dobriyan19c58702007-10-18 23:40:41 -0700929 current, task_pid_nr(current), regs->nip, regs->link, regs->gpr[0],
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000930 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
931}
932
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000933void kernel_fp_unavailable_exception(struct pt_regs *regs)
934{
935 printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
936 "%lx at %lx\n", regs->trap, regs->nip);
937 die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
938}
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000939
940void altivec_unavailable_exception(struct pt_regs *regs)
941{
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000942 if (user_mode(regs)) {
943 /* A user program has executed an altivec instruction,
944 but this kernel doesn't support altivec. */
945 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
946 return;
947 }
Anton Blanchard6c4841c2006-10-13 11:41:00 +1000948
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000949 printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
950 "%lx at %lx\n", regs->trap, regs->nip);
951 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000952}
953
Michael Neulingce48b212008-06-25 14:07:18 +1000954void vsx_unavailable_exception(struct pt_regs *regs)
955{
956 if (user_mode(regs)) {
957 /* A user program has executed an vsx instruction,
958 but this kernel doesn't support vsx. */
959 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
960 return;
961 }
962
963 printk(KERN_EMERG "Unrecoverable VSX Unavailable Exception "
964 "%lx at %lx\n", regs->trap, regs->nip);
965 die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT);
966}
967
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000968void performance_monitor_exception(struct pt_regs *regs)
969{
Anton Blanchard89713ed2010-01-31 20:34:06 +0000970 __get_cpu_var(irq_stat).pmu_irqs++;
971
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000972 perf_irq(regs);
973}
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000974
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000975#ifdef CONFIG_8xx
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000976void SoftwareEmulation(struct pt_regs *regs)
977{
978 extern int do_mathemu(struct pt_regs *);
979 extern int Soft_emulate_8xx(struct pt_regs *);
Scott Wood5dd57a12007-09-18 15:29:35 -0500980#if defined(CONFIG_MATH_EMULATION) || defined(CONFIG_8XX_MINIMAL_FPEMU)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000981 int errcode;
Scott Wood5dd57a12007-09-18 15:29:35 -0500982#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000983
984 CHECK_FULL_REGS(regs);
985
986 if (!user_mode(regs)) {
987 debugger(regs);
988 die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
989 }
990
991#ifdef CONFIG_MATH_EMULATION
992 errcode = do_mathemu(regs);
Geert Uytterhoeven80947e72009-05-18 02:10:05 +0000993 if (errcode >= 0)
Anton Blanchardeecff812009-10-27 18:46:55 +0000994 PPC_WARN_EMULATED(math, regs);
Kumar Gala5fad2932007-02-07 01:47:59 -0600995
996 switch (errcode) {
997 case 0:
998 emulate_single_step(regs);
999 return;
1000 case 1: {
1001 int code = 0;
1002 code = __parse_fpscr(current->thread.fpscr.val);
1003 _exception(SIGFPE, regs, code, regs->nip);
1004 return;
1005 }
1006 case -EFAULT:
1007 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
1008 return;
1009 default:
1010 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1011 return;
1012 }
1013
Scott Wood5dd57a12007-09-18 15:29:35 -05001014#elif defined(CONFIG_8XX_MINIMAL_FPEMU)
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001015 errcode = Soft_emulate_8xx(regs);
Geert Uytterhoeven80947e72009-05-18 02:10:05 +00001016 if (errcode >= 0)
Anton Blanchardeecff812009-10-27 18:46:55 +00001017 PPC_WARN_EMULATED(8xx, regs);
Geert Uytterhoeven80947e72009-05-18 02:10:05 +00001018
Kumar Gala5fad2932007-02-07 01:47:59 -06001019 switch (errcode) {
1020 case 0:
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001021 emulate_single_step(regs);
Kumar Gala5fad2932007-02-07 01:47:59 -06001022 return;
1023 case 1:
1024 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1025 return;
1026 case -EFAULT:
1027 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
1028 return;
1029 }
Scott Wood5dd57a12007-09-18 15:29:35 -05001030#else
1031 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
Kumar Gala5fad2932007-02-07 01:47:59 -06001032#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001033}
Paul Mackerras8dad3f92005-10-06 13:27:05 +10001034#endif /* CONFIG_8xx */
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001035
Dave Kleikamp172ae2e2010-02-08 11:50:57 +00001036#ifdef CONFIG_PPC_ADV_DEBUG_REGS
Dave Kleikamp3bffb652010-02-08 11:51:18 +00001037static void handle_debug(struct pt_regs *regs, unsigned long debug_status)
1038{
1039 int changed = 0;
1040 /*
1041 * Determine the cause of the debug event, clear the
1042 * event flags and send a trap to the handler. Torez
1043 */
1044 if (debug_status & (DBSR_DAC1R | DBSR_DAC1W)) {
1045 dbcr_dac(current) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1046#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1047 current->thread.dbcr2 &= ~DBCR2_DAC12MODE;
1048#endif
1049 do_send_trap(regs, mfspr(SPRN_DAC1), debug_status, TRAP_HWBKPT,
1050 5);
1051 changed |= 0x01;
1052 } else if (debug_status & (DBSR_DAC2R | DBSR_DAC2W)) {
1053 dbcr_dac(current) &= ~(DBCR_DAC2R | DBCR_DAC2W);
1054 do_send_trap(regs, mfspr(SPRN_DAC2), debug_status, TRAP_HWBKPT,
1055 6);
1056 changed |= 0x01;
1057 } else if (debug_status & DBSR_IAC1) {
1058 current->thread.dbcr0 &= ~DBCR0_IAC1;
1059 dbcr_iac_range(current) &= ~DBCR_IAC12MODE;
1060 do_send_trap(regs, mfspr(SPRN_IAC1), debug_status, TRAP_HWBKPT,
1061 1);
1062 changed |= 0x01;
1063 } else if (debug_status & DBSR_IAC2) {
1064 current->thread.dbcr0 &= ~DBCR0_IAC2;
1065 do_send_trap(regs, mfspr(SPRN_IAC2), debug_status, TRAP_HWBKPT,
1066 2);
1067 changed |= 0x01;
1068 } else if (debug_status & DBSR_IAC3) {
1069 current->thread.dbcr0 &= ~DBCR0_IAC3;
1070 dbcr_iac_range(current) &= ~DBCR_IAC34MODE;
1071 do_send_trap(regs, mfspr(SPRN_IAC3), debug_status, TRAP_HWBKPT,
1072 3);
1073 changed |= 0x01;
1074 } else if (debug_status & DBSR_IAC4) {
1075 current->thread.dbcr0 &= ~DBCR0_IAC4;
1076 do_send_trap(regs, mfspr(SPRN_IAC4), debug_status, TRAP_HWBKPT,
1077 4);
1078 changed |= 0x01;
1079 }
1080 /*
1081 * At the point this routine was called, the MSR(DE) was turned off.
1082 * Check all other debug flags and see if that bit needs to be turned
1083 * back on or not.
1084 */
1085 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0, current->thread.dbcr1))
1086 regs->msr |= MSR_DE;
1087 else
1088 /* Make sure the IDM flag is off */
1089 current->thread.dbcr0 &= ~DBCR0_IDM;
1090
1091 if (changed & 0x01)
1092 mtspr(SPRN_DBCR0, current->thread.dbcr0);
1093}
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001094
Kumar Galaf8279622008-06-26 02:01:37 -05001095void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status)
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001096{
Dave Kleikamp3bffb652010-02-08 11:51:18 +00001097 current->thread.dbsr = debug_status;
1098
Roland McGrathec097c82009-05-28 21:26:38 +00001099 /* Hack alert: On BookE, Branch Taken stops on the branch itself, while
1100 * on server, it stops on the target of the branch. In order to simulate
1101 * the server behaviour, we thus restart right away with a single step
1102 * instead of stopping here when hitting a BT
1103 */
1104 if (debug_status & DBSR_BT) {
1105 regs->msr &= ~MSR_DE;
1106
1107 /* Disable BT */
1108 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_BT);
1109 /* Clear the BT event */
1110 mtspr(SPRN_DBSR, DBSR_BT);
1111
1112 /* Do the single step trick only when coming from userspace */
1113 if (user_mode(regs)) {
1114 current->thread.dbcr0 &= ~DBCR0_BT;
1115 current->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC;
1116 regs->msr |= MSR_DE;
1117 return;
1118 }
1119
1120 if (notify_die(DIE_SSTEP, "block_step", regs, 5,
1121 5, SIGTRAP) == NOTIFY_STOP) {
1122 return;
1123 }
1124 if (debugger_sstep(regs))
1125 return;
1126 } else if (debug_status & DBSR_IC) { /* Instruction complete */
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001127 regs->msr &= ~MSR_DE;
Kumar Galaf8279622008-06-26 02:01:37 -05001128
1129 /* Disable instruction completion */
1130 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
1131 /* Clear the instruction completion event */
1132 mtspr(SPRN_DBSR, DBSR_IC);
1133
1134 if (notify_die(DIE_SSTEP, "single_step", regs, 5,
1135 5, SIGTRAP) == NOTIFY_STOP) {
1136 return;
1137 }
1138
1139 if (debugger_sstep(regs))
1140 return;
1141
Dave Kleikamp3bffb652010-02-08 11:51:18 +00001142 if (user_mode(regs)) {
1143 current->thread.dbcr0 &= ~DBCR0_IC;
1144#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1145 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0,
1146 current->thread.dbcr1))
1147 regs->msr |= MSR_DE;
1148 else
1149 /* Make sure the IDM bit is off */
1150 current->thread.dbcr0 &= ~DBCR0_IDM;
1151#endif
1152 }
Kumar Galaf8279622008-06-26 02:01:37 -05001153
1154 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
Dave Kleikamp3bffb652010-02-08 11:51:18 +00001155 } else
1156 handle_debug(regs, debug_status);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001157}
Dave Kleikamp172ae2e2010-02-08 11:50:57 +00001158#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001159
1160#if !defined(CONFIG_TAU_INT)
1161void TAUException(struct pt_regs *regs)
1162{
1163 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
1164 regs->nip, regs->msr, regs->trap, print_tainted());
1165}
1166#endif /* CONFIG_INT_TAU */
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001167
1168#ifdef CONFIG_ALTIVEC
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001169void altivec_assist_exception(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001170{
1171 int err;
1172
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001173 if (!user_mode(regs)) {
1174 printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode"
1175 " at %lx\n", regs->nip);
Paul Mackerras8dad3f92005-10-06 13:27:05 +10001176 die("Kernel VMX/Altivec assist exception", regs, SIGILL);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001177 }
1178
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001179 flush_altivec_to_thread(current);
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001180
Anton Blanchardeecff812009-10-27 18:46:55 +00001181 PPC_WARN_EMULATED(altivec, regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001182 err = emulate_altivec(regs);
1183 if (err == 0) {
1184 regs->nip += 4; /* skip emulated instruction */
1185 emulate_single_step(regs);
1186 return;
1187 }
1188
1189 if (err == -EFAULT) {
1190 /* got an error reading the instruction */
1191 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1192 } else {
1193 /* didn't recognize the instruction */
1194 /* XXX quick hack for now: set the non-Java bit in the VSCR */
1195 if (printk_ratelimit())
1196 printk(KERN_ERR "Unrecognized altivec instruction "
1197 "in %s at %lx\n", current->comm, regs->nip);
1198 current->thread.vscr.u[3] |= 0x10000;
1199 }
1200}
1201#endif /* CONFIG_ALTIVEC */
1202
Michael Neulingce48b212008-06-25 14:07:18 +10001203#ifdef CONFIG_VSX
1204void vsx_assist_exception(struct pt_regs *regs)
1205{
1206 if (!user_mode(regs)) {
1207 printk(KERN_EMERG "VSX assist exception in kernel mode"
1208 " at %lx\n", regs->nip);
1209 die("Kernel VSX assist exception", regs, SIGILL);
1210 }
1211
1212 flush_vsx_to_thread(current);
1213 printk(KERN_INFO "VSX assist not supported at %lx\n", regs->nip);
1214 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1215}
1216#endif /* CONFIG_VSX */
1217
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001218#ifdef CONFIG_FSL_BOOKE
Kumar Gala620165f2009-02-12 13:54:53 +00001219
1220void doorbell_exception(struct pt_regs *regs)
1221{
1222#ifdef CONFIG_SMP
1223 int cpu = smp_processor_id();
1224 int msg;
1225
1226 if (num_online_cpus() < 2)
1227 return;
1228
1229 for (msg = 0; msg < 4; msg++)
1230 if (test_and_clear_bit(msg, &dbell_smp_message[cpu]))
1231 smp_message_recv(msg);
1232#else
1233 printk(KERN_WARNING "Received doorbell on non-smp system\n");
1234#endif
1235}
1236
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001237void CacheLockingException(struct pt_regs *regs, unsigned long address,
1238 unsigned long error_code)
1239{
1240 /* We treat cache locking instructions from the user
1241 * as priv ops, in the future we could try to do
1242 * something smarter
1243 */
1244 if (error_code & (ESR_DLK|ESR_ILK))
1245 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
1246 return;
1247}
1248#endif /* CONFIG_FSL_BOOKE */
1249
1250#ifdef CONFIG_SPE
1251void SPEFloatingPointException(struct pt_regs *regs)
1252{
Liu Yu6a800f32008-10-28 11:50:21 +08001253 extern int do_spe_mathemu(struct pt_regs *regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001254 unsigned long spefscr;
1255 int fpexc_mode;
1256 int code = 0;
Liu Yu6a800f32008-10-28 11:50:21 +08001257 int err;
1258
1259 preempt_disable();
1260 if (regs->msr & MSR_SPE)
1261 giveup_spe(current);
1262 preempt_enable();
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001263
1264 spefscr = current->thread.spefscr;
1265 fpexc_mode = current->thread.fpexc_mode;
1266
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001267 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
1268 code = FPE_FLTOVF;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001269 }
1270 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
1271 code = FPE_FLTUND;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001272 }
1273 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
1274 code = FPE_FLTDIV;
1275 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
1276 code = FPE_FLTINV;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001277 }
1278 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
1279 code = FPE_FLTRES;
1280
Liu Yu6a800f32008-10-28 11:50:21 +08001281 err = do_spe_mathemu(regs);
1282 if (err == 0) {
1283 regs->nip += 4; /* skip emulated instruction */
1284 emulate_single_step(regs);
1285 return;
1286 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001287
Liu Yu6a800f32008-10-28 11:50:21 +08001288 if (err == -EFAULT) {
1289 /* got an error reading the instruction */
1290 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1291 } else if (err == -EINVAL) {
1292 /* didn't recognize the instruction */
1293 printk(KERN_ERR "unrecognized spe instruction "
1294 "in %s at %lx\n", current->comm, regs->nip);
1295 } else {
1296 _exception(SIGFPE, regs, code, regs->nip);
1297 }
1298
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001299 return;
1300}
Liu Yu6a800f32008-10-28 11:50:21 +08001301
1302void SPEFloatingPointRoundException(struct pt_regs *regs)
1303{
1304 extern int speround_handler(struct pt_regs *regs);
1305 int err;
1306
1307 preempt_disable();
1308 if (regs->msr & MSR_SPE)
1309 giveup_spe(current);
1310 preempt_enable();
1311
1312 regs->nip -= 4;
1313 err = speround_handler(regs);
1314 if (err == 0) {
1315 regs->nip += 4; /* skip emulated instruction */
1316 emulate_single_step(regs);
1317 return;
1318 }
1319
1320 if (err == -EFAULT) {
1321 /* got an error reading the instruction */
1322 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1323 } else if (err == -EINVAL) {
1324 /* didn't recognize the instruction */
1325 printk(KERN_ERR "unrecognized spe instruction "
1326 "in %s at %lx\n", current->comm, regs->nip);
1327 } else {
1328 _exception(SIGFPE, regs, 0, regs->nip);
1329 return;
1330 }
1331}
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001332#endif
1333
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001334/*
1335 * We enter here if we get an unrecoverable exception, that is, one
1336 * that happened at a point where the RI (recoverable interrupt) bit
1337 * in the MSR is 0. This indicates that SRR0/1 are live, and that
1338 * we therefore lost state by taking this exception.
1339 */
1340void unrecoverable_exception(struct pt_regs *regs)
1341{
1342 printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n",
1343 regs->trap, regs->nip);
1344 die("Unrecoverable exception", regs, SIGABRT);
1345}
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001346
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001347#ifdef CONFIG_BOOKE_WDT
1348/*
1349 * Default handler for a Watchdog exception,
1350 * spins until a reboot occurs
1351 */
1352void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
1353{
1354 /* Generic WatchdogHandler, implement your own */
1355 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
1356 return;
1357}
1358
1359void WatchdogException(struct pt_regs *regs)
1360{
1361 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
1362 WatchdogHandler(regs);
1363}
1364#endif
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001365
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001366/*
1367 * We enter here if we discover during exception entry that we are
1368 * running in supervisor mode with a userspace value in the stack pointer.
1369 */
1370void kernel_bad_stack(struct pt_regs *regs)
1371{
1372 printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n",
1373 regs->gpr[1], regs->nip);
1374 die("Bad kernel stack pointer", regs, SIGABRT);
1375}
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001376
1377void __init trap_init(void)
1378{
1379}
Geert Uytterhoeven80947e72009-05-18 02:10:05 +00001380
1381
1382#ifdef CONFIG_PPC_EMULATED_STATS
1383
1384#define WARN_EMULATED_SETUP(type) .type = { .name = #type }
1385
1386struct ppc_emulated ppc_emulated = {
1387#ifdef CONFIG_ALTIVEC
1388 WARN_EMULATED_SETUP(altivec),
1389#endif
1390 WARN_EMULATED_SETUP(dcba),
1391 WARN_EMULATED_SETUP(dcbz),
1392 WARN_EMULATED_SETUP(fp_pair),
1393 WARN_EMULATED_SETUP(isel),
1394 WARN_EMULATED_SETUP(mcrxr),
1395 WARN_EMULATED_SETUP(mfpvr),
1396 WARN_EMULATED_SETUP(multiple),
1397 WARN_EMULATED_SETUP(popcntb),
1398 WARN_EMULATED_SETUP(spe),
1399 WARN_EMULATED_SETUP(string),
1400 WARN_EMULATED_SETUP(unaligned),
1401#ifdef CONFIG_MATH_EMULATION
1402 WARN_EMULATED_SETUP(math),
1403#elif defined(CONFIG_8XX_MINIMAL_FPEMU)
1404 WARN_EMULATED_SETUP(8xx),
1405#endif
1406#ifdef CONFIG_VSX
1407 WARN_EMULATED_SETUP(vsx),
1408#endif
1409};
1410
1411u32 ppc_warn_emulated;
1412
1413void ppc_warn_emulated_print(const char *type)
1414{
1415 if (printk_ratelimit())
1416 pr_warning("%s used emulated %s instruction\n", current->comm,
1417 type);
1418}
1419
1420static int __init ppc_warn_emulated_init(void)
1421{
1422 struct dentry *dir, *d;
1423 unsigned int i;
1424 struct ppc_emulated_entry *entries = (void *)&ppc_emulated;
1425
1426 if (!powerpc_debugfs_root)
1427 return -ENODEV;
1428
1429 dir = debugfs_create_dir("emulated_instructions",
1430 powerpc_debugfs_root);
1431 if (!dir)
1432 return -ENOMEM;
1433
1434 d = debugfs_create_u32("do_warn", S_IRUGO | S_IWUSR, dir,
1435 &ppc_warn_emulated);
1436 if (!d)
1437 goto fail;
1438
1439 for (i = 0; i < sizeof(ppc_emulated)/sizeof(*entries); i++) {
1440 d = debugfs_create_u32(entries[i].name, S_IRUGO | S_IWUSR, dir,
1441 (u32 *)&entries[i].val.counter);
1442 if (!d)
1443 goto fail;
1444 }
1445
1446 return 0;
1447
1448fail:
1449 debugfs_remove_recursive(dir);
1450 return -ENOMEM;
1451}
1452
1453device_initcall(ppc_warn_emulated_init);
1454
1455#endif /* CONFIG_PPC_EMULATED_STATS */