David Howells | b920de1 | 2008-02-08 04:19:31 -0800 | [diff] [blame^] | 1 | /* MN10300 Low level time management |
| 2 | * |
| 3 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. |
| 4 | * Written by David Howells (dhowells@redhat.com) |
| 5 | * - Derived from arch/i386/kernel/time.c |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public Licence |
| 9 | * as published by the Free Software Foundation; either version |
| 10 | * 2 of the Licence, or (at your option) any later version. |
| 11 | */ |
| 12 | #include <linux/sched.h> |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/time.h> |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/smp.h> |
| 18 | #include <linux/profile.h> |
| 19 | #include <asm/irq.h> |
| 20 | #include <asm/div64.h> |
| 21 | #include <asm/processor.h> |
| 22 | #include <asm/intctl-regs.h> |
| 23 | #include <asm/rtc.h> |
| 24 | |
| 25 | #ifdef CONFIG_MN10300_RTC |
| 26 | unsigned long mn10300_ioclk; /* system I/O clock frequency */ |
| 27 | unsigned long mn10300_iobclk; /* system I/O clock frequency */ |
| 28 | unsigned long mn10300_tsc_per_HZ; /* number of ioclks per jiffy */ |
| 29 | #endif /* CONFIG_MN10300_RTC */ |
| 30 | |
| 31 | static unsigned long mn10300_last_tsc; /* time-stamp counter at last time |
| 32 | * interrupt occurred */ |
| 33 | |
| 34 | static irqreturn_t timer_interrupt(int irq, void *dev_id); |
| 35 | |
| 36 | static struct irqaction timer_irq = { |
| 37 | .handler = timer_interrupt, |
| 38 | .flags = IRQF_DISABLED | IRQF_SHARED | IRQF_TIMER, |
| 39 | .mask = CPU_MASK_NONE, |
| 40 | .name = "timer", |
| 41 | }; |
| 42 | |
| 43 | /* |
| 44 | * scheduler clock - returns current time in nanosec units. |
| 45 | */ |
| 46 | unsigned long long sched_clock(void) |
| 47 | { |
| 48 | union { |
| 49 | unsigned long long l; |
| 50 | u32 w[2]; |
| 51 | } quot; |
| 52 | |
| 53 | quot.w[0] = mn10300_last_tsc - get_cycles(); |
| 54 | quot.w[1] = 1000000000; |
| 55 | |
| 56 | asm("mulu %2,%3,%0,%1" |
| 57 | : "=r"(quot.w[1]), "=r"(quot.w[0]) |
| 58 | : "0"(quot.w[1]), "1"(quot.w[0]) |
| 59 | : "cc"); |
| 60 | |
| 61 | do_div(quot.l, MN10300_TSCCLK); |
| 62 | |
| 63 | return quot.l; |
| 64 | } |
| 65 | |
| 66 | /* |
| 67 | * advance the kernel's time keeping clocks (xtime and jiffies) |
| 68 | * - we use Timer 0 & 1 cascaded as a clock to nudge us the next time |
| 69 | * there's a need to update |
| 70 | */ |
| 71 | static irqreturn_t timer_interrupt(int irq, void *dev_id) |
| 72 | { |
| 73 | unsigned tsc, elapse; |
| 74 | |
| 75 | write_seqlock(&xtime_lock); |
| 76 | |
| 77 | while (tsc = get_cycles(), |
| 78 | elapse = mn10300_last_tsc - tsc, /* time elapsed since last |
| 79 | * tick */ |
| 80 | elapse > MN10300_TSC_PER_HZ |
| 81 | ) { |
| 82 | mn10300_last_tsc -= MN10300_TSC_PER_HZ; |
| 83 | |
| 84 | /* advance the kernel's time tracking system */ |
| 85 | profile_tick(CPU_PROFILING); |
| 86 | do_timer(1); |
| 87 | update_process_times(user_mode(get_irq_regs())); |
| 88 | check_rtc_time(); |
| 89 | } |
| 90 | |
| 91 | write_sequnlock(&xtime_lock); |
| 92 | return IRQ_HANDLED; |
| 93 | } |
| 94 | |
| 95 | /* |
| 96 | * initialise the various timers used by the main part of the kernel |
| 97 | */ |
| 98 | void __init time_init(void) |
| 99 | { |
| 100 | /* we need the prescalar running to be able to use IOCLK/8 |
| 101 | * - IOCLK runs at 1/4 (ST5 open) or 1/8 (ST5 closed) internal CPU clock |
| 102 | * - IOCLK runs at Fosc rate (crystal speed) |
| 103 | */ |
| 104 | TMPSCNT |= TMPSCNT_ENABLE; |
| 105 | |
| 106 | startup_timestamp_counter(); |
| 107 | |
| 108 | printk(KERN_INFO |
| 109 | "timestamp counter I/O clock running at %lu.%02lu" |
| 110 | " (calibrated against RTC)\n", |
| 111 | MN10300_TSCCLK / 1000000, (MN10300_TSCCLK / 10000) % 100); |
| 112 | |
| 113 | xtime.tv_sec = get_initial_rtc_time(); |
| 114 | xtime.tv_nsec = 0; |
| 115 | |
| 116 | mn10300_last_tsc = TMTSCBC; |
| 117 | |
| 118 | /* use timer 0 & 1 cascaded to tick at as close to HZ as possible */ |
| 119 | setup_irq(TMJCIRQ, &timer_irq); |
| 120 | |
| 121 | set_intr_level(TMJCIRQ, TMJCICR_LEVEL); |
| 122 | |
| 123 | startup_jiffies_counter(); |
| 124 | |
| 125 | #ifdef CONFIG_MN10300_WD_TIMER |
| 126 | /* start the watchdog timer */ |
| 127 | watchdog_go(); |
| 128 | #endif |
| 129 | } |