blob: a2112aa88c1faff8efb45c277b0817daef220dce [file] [log] [blame]
Kukjin Kim61c542b2011-10-03 09:46:13 +09001/* linux/arch/arm/plat-samsung/devs.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Base SAMSUNG platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
19#include <linux/serial_core.h>
20#include <linux/platform_device.h>
21#include <linux/io.h>
22#include <linux/slab.h>
23#include <linux/string.h>
24#include <linux/dma-mapping.h>
Kukjin Kim57167142011-10-03 09:46:56 +090025#include <linux/fb.h>
26#include <linux/gfp.h>
Kukjin Kim0523ec32011-10-03 09:46:56 +090027#include <linux/mtd/mtd.h>
28#include <linux/mtd/onenand.h>
Kukjin Kimbad1e6a2011-10-03 09:47:58 +090029#include <linux/mtd/partitions.h>
30#include <linux/mmc/host.h>
Kukjin Kim57167142011-10-03 09:46:56 +090031#include <linux/ioport.h>
Kukjin Kim61c542b2011-10-03 09:46:13 +090032
33#include <asm/irq.h>
Kukjin Kim57167142011-10-03 09:46:56 +090034#include <asm/pmu.h>
Kukjin Kim61c542b2011-10-03 09:46:13 +090035#include <asm/mach/arch.h>
36#include <asm/mach/map.h>
37#include <asm/mach/irq.h>
38
39#include <mach/hardware.h>
40#include <mach/dma.h>
41#include <mach/irqs.h>
42#include <mach/map.h>
43
44#include <plat/cpu.h>
45#include <plat/devs.h>
Kukjin Kimbad1e6a2011-10-03 09:47:58 +090046#include <plat/adc.h>
47#include <plat/ata.h>
Kukjin Kim57167142011-10-03 09:46:56 +090048#include <plat/ehci.h>
Kukjin Kim61c542b2011-10-03 09:46:13 +090049#include <plat/fb.h>
50#include <plat/fb-s3c2410.h>
Kukjin Kimbad1e6a2011-10-03 09:47:58 +090051#include <plat/hwmon.h>
Kukjin Kim57167142011-10-03 09:46:56 +090052#include <plat/iic.h>
Kukjin Kimbad1e6a2011-10-03 09:47:58 +090053#include <plat/keypad.h>
Kukjin Kim61c542b2011-10-03 09:46:13 +090054#include <plat/mci.h>
Kukjin Kimbad1e6a2011-10-03 09:47:58 +090055#include <plat/nand.h>
56#include <plat/sdhci.h>
Kukjin Kim61c542b2011-10-03 09:46:13 +090057#include <plat/ts.h>
58#include <plat/udc.h>
Kukjin Kimbad1e6a2011-10-03 09:47:58 +090059#include <plat/usb-control.h>
Kukjin Kim57167142011-10-03 09:46:56 +090060#include <plat/usb-phy.h>
61#include <plat/regs-iic.h>
Kukjin Kim61c542b2011-10-03 09:46:13 +090062#include <plat/regs-serial.h>
63#include <plat/regs-spi.h>
64
65static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
66
67/* AC97 */
68#ifdef CONFIG_CPU_S3C2440
69static struct resource s3c_ac97_resource[] = {
70 [0] = {
71 .start = S3C2440_PA_AC97,
72 .end = S3C2440_PA_AC97 + S3C2440_SZ_AC97 - 1,
73 .flags = IORESOURCE_MEM,
74 },
75 [1] = {
76 .start = IRQ_S3C244x_AC97,
77 .end = IRQ_S3C244x_AC97,
78 .flags = IORESOURCE_IRQ,
79 },
80 [2] = {
81 .name = "PCM out",
82 .start = DMACH_PCM_OUT,
83 .end = DMACH_PCM_OUT,
84 .flags = IORESOURCE_DMA,
85 },
86 [3] = {
87 .name = "PCM in",
88 .start = DMACH_PCM_IN,
89 .end = DMACH_PCM_IN,
90 .flags = IORESOURCE_DMA,
91 },
92 [4] = {
93 .name = "Mic in",
94 .start = DMACH_MIC_IN,
95 .end = DMACH_MIC_IN,
96 .flags = IORESOURCE_DMA,
97 },
98};
99
100struct platform_device s3c_device_ac97 = {
101 .name = "samsung-ac97",
102 .id = -1,
103 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
104 .resource = s3c_ac97_resource,
105 .dev = {
106 .dma_mask = &samsung_device_dma_mask,
107 .coherent_dma_mask = DMA_BIT_MASK(32),
108 }
109};
110#endif /* CONFIG_CPU_S3C2440 */
111
112/* ADC */
113
114#ifdef CONFIG_PLAT_S3C24XX
115static struct resource s3c_adc_resource[] = {
116 [0] = {
117 .start = S3C24XX_PA_ADC,
118 .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
119 .flags = IORESOURCE_MEM,
120 },
121 [1] = {
122 .start = IRQ_TC,
123 .end = IRQ_TC,
124 .flags = IORESOURCE_IRQ,
125 },
126 [2] = {
127 .start = IRQ_ADC,
128 .end = IRQ_ADC,
129 .flags = IORESOURCE_IRQ,
130 }
131};
132
133struct platform_device s3c_device_adc = {
134 .name = "s3c24xx-adc",
135 .id = -1,
136 .num_resources = ARRAY_SIZE(s3c_adc_resource),
137 .resource = s3c_adc_resource,
138};
139#endif /* CONFIG_PLAT_S3C24XX */
140
Kukjin Kimbad1e6a2011-10-03 09:47:58 +0900141#if defined(CONFIG_SAMSUNG_DEV_ADC)
142static struct resource s3c_adc_resource[] = {
143 [0] = {
144 .start = SAMSUNG_PA_ADC,
145 .end = SAMSUNG_PA_ADC + SZ_256 - 1,
146 .flags = IORESOURCE_MEM,
147 },
148 [1] = {
149 .start = IRQ_TC,
150 .end = IRQ_TC,
151 .flags = IORESOURCE_IRQ,
152 },
153 [2] = {
154 .start = IRQ_ADC,
155 .end = IRQ_ADC,
156 .flags = IORESOURCE_IRQ,
157 },
158};
159
160struct platform_device s3c_device_adc = {
161 .name = "samsung-adc",
162 .id = -1,
163 .num_resources = ARRAY_SIZE(s3c_adc_resource),
164 .resource = s3c_adc_resource,
165};
166#endif /* CONFIG_SAMSUNG_DEV_ADC */
167
Kukjin Kim61c542b2011-10-03 09:46:13 +0900168/* Camif Controller */
169
170#ifdef CONFIG_CPU_S3C2440
171static struct resource s3c_camif_resource[] = {
172 [0] = {
173 .start = S3C2440_PA_CAMIF,
174 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
175 .flags = IORESOURCE_MEM,
176 },
177 [1] = {
178 .start = IRQ_CAM,
179 .end = IRQ_CAM,
180 .flags = IORESOURCE_IRQ,
181 }
182};
183
184struct platform_device s3c_device_camif = {
185 .name = "s3c2440-camif",
186 .id = -1,
187 .num_resources = ARRAY_SIZE(s3c_camif_resource),
188 .resource = s3c_camif_resource,
189 .dev = {
190 .dma_mask = &samsung_device_dma_mask,
191 .coherent_dma_mask = DMA_BIT_MASK(32),
192 }
193};
194#endif /* CONFIG_CPU_S3C2440 */
195
Kukjin Kimbad1e6a2011-10-03 09:47:58 +0900196/* ASOC DMA */
197
198struct platform_device samsung_asoc_dma = {
199 .name = "samsung-audio",
200 .id = -1,
201 .dev = {
202 .dma_mask = &samsung_device_dma_mask,
203 .coherent_dma_mask = DMA_BIT_MASK(32),
204 }
205};
206
207struct platform_device samsung_asoc_idma = {
208 .name = "samsung-idma",
209 .id = -1,
210 .dev = {
211 .dma_mask = &samsung_device_dma_mask,
212 .coherent_dma_mask = DMA_BIT_MASK(32),
213 }
214};
215
216/* FB */
217
218#ifdef CONFIG_S3C_DEV_FB
219static struct resource s3c_fb_resource[] = {
220 [0] = {
221 .start = S3C_PA_FB,
222 .end = S3C_PA_FB + SZ_16K - 1,
223 .flags = IORESOURCE_MEM,
224 },
225 [1] = {
226 .start = IRQ_LCD_VSYNC,
227 .end = IRQ_LCD_VSYNC,
228 .flags = IORESOURCE_IRQ,
229 },
230 [2] = {
231 .start = IRQ_LCD_FIFO,
232 .end = IRQ_LCD_FIFO,
233 .flags = IORESOURCE_IRQ,
234 },
235 [3] = {
236 .start = IRQ_LCD_SYSTEM,
237 .end = IRQ_LCD_SYSTEM,
238 .flags = IORESOURCE_IRQ,
239 },
240};
241
242struct platform_device s3c_device_fb = {
243 .name = "s3c-fb",
244 .id = -1,
245 .num_resources = ARRAY_SIZE(s3c_fb_resource),
246 .resource = s3c_fb_resource,
247 .dev = {
248 .dma_mask = &samsung_device_dma_mask,
249 .coherent_dma_mask = DMA_BIT_MASK(32),
250 },
251};
252
253void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
254{
255 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
256 &s3c_device_fb);
257}
258#endif /* CONFIG_S3C_DEV_FB */
259
Kukjin Kim57167142011-10-03 09:46:56 +0900260/* FIMC */
261
262#ifdef CONFIG_S5P_DEV_FIMC0
263static struct resource s5p_fimc0_resource[] = {
264 [0] = {
265 .start = S5P_PA_FIMC0,
266 .end = S5P_PA_FIMC0 + SZ_4K - 1,
267 .flags = IORESOURCE_MEM,
268 },
269 [1] = {
270 .start = IRQ_FIMC0,
271 .end = IRQ_FIMC0,
272 .flags = IORESOURCE_IRQ,
273 },
274};
275
276struct platform_device s5p_device_fimc0 = {
277 .name = "s5p-fimc",
278 .id = 0,
279 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
280 .resource = s5p_fimc0_resource,
281 .dev = {
282 .dma_mask = &samsung_device_dma_mask,
283 .coherent_dma_mask = DMA_BIT_MASK(32),
284 },
285};
286#endif /* CONFIG_S5P_DEV_FIMC0 */
287
288#ifdef CONFIG_S5P_DEV_FIMC1
289static struct resource s5p_fimc1_resource[] = {
290 [0] = {
291 .start = S5P_PA_FIMC1,
292 .end = S5P_PA_FIMC1 + SZ_4K - 1,
293 .flags = IORESOURCE_MEM,
294 },
295 [1] = {
296 .start = IRQ_FIMC1,
297 .end = IRQ_FIMC1,
298 .flags = IORESOURCE_IRQ,
299 },
300};
301
302struct platform_device s5p_device_fimc1 = {
303 .name = "s5p-fimc",
304 .id = 1,
305 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
306 .resource = s5p_fimc1_resource,
307 .dev = {
308 .dma_mask = &samsung_device_dma_mask,
309 .coherent_dma_mask = DMA_BIT_MASK(32),
310 },
311};
312#endif /* CONFIG_S5P_DEV_FIMC1 */
313
314#ifdef CONFIG_S5P_DEV_FIMC2
315static struct resource s5p_fimc2_resource[] = {
316 [0] = {
317 .start = S5P_PA_FIMC2,
318 .end = S5P_PA_FIMC2 + SZ_4K - 1,
319 .flags = IORESOURCE_MEM,
320 },
321 [1] = {
322 .start = IRQ_FIMC2,
323 .end = IRQ_FIMC2,
324 .flags = IORESOURCE_IRQ,
325 },
326};
327
328struct platform_device s5p_device_fimc2 = {
329 .name = "s5p-fimc",
330 .id = 2,
331 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
332 .resource = s5p_fimc2_resource,
333 .dev = {
334 .dma_mask = &samsung_device_dma_mask,
335 .coherent_dma_mask = DMA_BIT_MASK(32),
336 },
337};
338#endif /* CONFIG_S5P_DEV_FIMC2 */
339
340#ifdef CONFIG_S5P_DEV_FIMC3
341static struct resource s5p_fimc3_resource[] = {
342 [0] = {
343 .start = S5P_PA_FIMC3,
344 .end = S5P_PA_FIMC3 + SZ_4K - 1,
345 .flags = IORESOURCE_MEM,
346 },
347 [1] = {
348 .start = IRQ_FIMC3,
349 .end = IRQ_FIMC3,
350 .flags = IORESOURCE_IRQ,
351 },
352};
353
354struct platform_device s5p_device_fimc3 = {
355 .name = "s5p-fimc",
356 .id = 3,
357 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
358 .resource = s5p_fimc3_resource,
359 .dev = {
360 .dma_mask = &samsung_device_dma_mask,
361 .coherent_dma_mask = DMA_BIT_MASK(32),
362 },
363};
364#endif /* CONFIG_S5P_DEV_FIMC3 */
365
366/* FIMD0 */
367
368#ifdef CONFIG_S5P_DEV_FIMD0
369static struct resource s5p_fimd0_resource[] = {
370 [0] = {
371 .start = S5P_PA_FIMD0,
372 .end = S5P_PA_FIMD0 + SZ_32K - 1,
373 .flags = IORESOURCE_MEM,
374 },
375 [1] = {
376 .start = IRQ_FIMD0_VSYNC,
377 .end = IRQ_FIMD0_VSYNC,
378 .flags = IORESOURCE_IRQ,
379 },
380 [2] = {
381 .start = IRQ_FIMD0_FIFO,
382 .end = IRQ_FIMD0_FIFO,
383 .flags = IORESOURCE_IRQ,
384 },
385 [3] = {
386 .start = IRQ_FIMD0_SYSTEM,
387 .end = IRQ_FIMD0_SYSTEM,
388 .flags = IORESOURCE_IRQ,
389 },
390};
391
392struct platform_device s5p_device_fimd0 = {
393 .name = "s5p-fb",
394 .id = 0,
395 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
396 .resource = s5p_fimd0_resource,
397 .dev = {
398 .dma_mask = &samsung_device_dma_mask,
399 .coherent_dma_mask = DMA_BIT_MASK(32),
400 },
401};
402
403void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
404{
405 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
406 &s5p_device_fimd0);
407}
408#endif /* CONFIG_S5P_DEV_FIMD0 */
409
Kukjin Kimbad1e6a2011-10-03 09:47:58 +0900410/* HWMON */
411
412#ifdef CONFIG_S3C_DEV_HWMON
413struct platform_device s3c_device_hwmon = {
414 .name = "s3c-hwmon",
415 .id = -1,
416 .dev.parent = &s3c_device_adc.dev,
417};
418
419void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
420{
421 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
422 &s3c_device_hwmon);
423}
424#endif /* CONFIG_S3C_DEV_HWMON */
425
426/* HSMMC */
427
428#define S3C_SZ_HSMMC 0x1000
429
430#ifdef CONFIG_S3C_DEV_HSMMC
431static struct resource s3c_hsmmc_resource[] = {
432 [0] = {
433 .start = S3C_PA_HSMMC0,
434 .end = S3C_PA_HSMMC0 + S3C_SZ_HSMMC - 1,
435 .flags = IORESOURCE_MEM,
436 },
437 [1] = {
438 .start = IRQ_HSMMC0,
439 .end = IRQ_HSMMC0,
440 .flags = IORESOURCE_IRQ,
441 }
442};
443
444struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
445 .max_width = 4,
446 .host_caps = (MMC_CAP_4_BIT_DATA |
447 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
448 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
449};
450
451struct platform_device s3c_device_hsmmc0 = {
452 .name = "s3c-sdhci",
453 .id = 0,
454 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
455 .resource = s3c_hsmmc_resource,
456 .dev = {
457 .dma_mask = &samsung_device_dma_mask,
458 .coherent_dma_mask = DMA_BIT_MASK(32),
459 .platform_data = &s3c_hsmmc0_def_platdata,
460 },
461};
462
463void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
464{
465 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
466}
467#endif /* CONFIG_S3C_DEV_HSMMC */
468
469#ifdef CONFIG_S3C_DEV_HSMMC1
470static struct resource s3c_hsmmc1_resource[] = {
471 [0] = {
472 .start = S3C_PA_HSMMC1,
473 .end = S3C_PA_HSMMC1 + S3C_SZ_HSMMC - 1,
474 .flags = IORESOURCE_MEM,
475 },
476 [1] = {
477 .start = IRQ_HSMMC1,
478 .end = IRQ_HSMMC1,
479 .flags = IORESOURCE_IRQ,
480 }
481};
482
483struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
484 .max_width = 4,
485 .host_caps = (MMC_CAP_4_BIT_DATA |
486 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
487 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
488};
489
490struct platform_device s3c_device_hsmmc1 = {
491 .name = "s3c-sdhci",
492 .id = 1,
493 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
494 .resource = s3c_hsmmc1_resource,
495 .dev = {
496 .dma_mask = &samsung_device_dma_mask,
497 .coherent_dma_mask = DMA_BIT_MASK(32),
498 .platform_data = &s3c_hsmmc1_def_platdata,
499 },
500};
501
502void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
503{
504 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
505}
506#endif /* CONFIG_S3C_DEV_HSMMC1 */
507
508/* HSMMC2 */
509
510#ifdef CONFIG_S3C_DEV_HSMMC2
511static struct resource s3c_hsmmc2_resource[] = {
512 [0] = {
513 .start = S3C_PA_HSMMC2,
514 .end = S3C_PA_HSMMC2 + S3C_SZ_HSMMC - 1,
515 .flags = IORESOURCE_MEM,
516 },
517 [1] = {
518 .start = IRQ_HSMMC2,
519 .end = IRQ_HSMMC2,
520 .flags = IORESOURCE_IRQ,
521 }
522};
523
524struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
525 .max_width = 4,
526 .host_caps = (MMC_CAP_4_BIT_DATA |
527 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
528 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
529};
530
531struct platform_device s3c_device_hsmmc2 = {
532 .name = "s3c-sdhci",
533 .id = 2,
534 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
535 .resource = s3c_hsmmc2_resource,
536 .dev = {
537 .dma_mask = &samsung_device_dma_mask,
538 .coherent_dma_mask = DMA_BIT_MASK(32),
539 .platform_data = &s3c_hsmmc2_def_platdata,
540 },
541};
542
543void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
544{
545 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
546}
547#endif /* CONFIG_S3C_DEV_HSMMC2 */
548
549#ifdef CONFIG_S3C_DEV_HSMMC3
550static struct resource s3c_hsmmc3_resource[] = {
551 [0] = {
552 .start = S3C_PA_HSMMC3,
553 .end = S3C_PA_HSMMC3 + S3C_SZ_HSMMC - 1,
554 .flags = IORESOURCE_MEM,
555 },
556 [1] = {
557 .start = IRQ_HSMMC3,
558 .end = IRQ_HSMMC3,
559 .flags = IORESOURCE_IRQ,
560 }
561};
562
563struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
564 .max_width = 4,
565 .host_caps = (MMC_CAP_4_BIT_DATA |
566 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
567 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
568};
569
570struct platform_device s3c_device_hsmmc3 = {
571 .name = "s3c-sdhci",
572 .id = 3,
573 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
574 .resource = s3c_hsmmc3_resource,
575 .dev = {
576 .dma_mask = &samsung_device_dma_mask,
577 .coherent_dma_mask = DMA_BIT_MASK(32),
578 .platform_data = &s3c_hsmmc3_def_platdata,
579 },
580};
581
582void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
583{
584 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
585}
586#endif /* CONFIG_S3C_DEV_HSMMC3 */
587
588/* I2C */
589
590static struct resource s3c_i2c0_resource[] = {
591 [0] = {
592 .start = S3C_PA_IIC,
593 .end = S3C_PA_IIC + SZ_4K - 1,
594 .flags = IORESOURCE_MEM,
595 },
596 [1] = {
597 .start = IRQ_IIC,
598 .end = IRQ_IIC,
599 .flags = IORESOURCE_IRQ,
600 },
601};
602
603struct platform_device s3c_device_i2c0 = {
604 .name = "s3c2410-i2c",
605#ifdef CONFIG_S3C_DEV_I2C1
606 .id = 0,
607#else
608 .id = -1,
609#endif
610 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
611 .resource = s3c_i2c0_resource,
612};
613
614struct s3c2410_platform_i2c default_i2c_data __initdata = {
615 .flags = 0,
616 .slave_addr = 0x10,
617 .frequency = 100*1000,
618 .sda_delay = 100,
619};
620
621void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
622{
623 struct s3c2410_platform_i2c *npd;
624
625 if (!pd)
626 pd = &default_i2c_data;
627
628 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
629 &s3c_device_i2c0);
630
631 if (!npd->cfg_gpio)
632 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
633}
634
635#ifdef CONFIG_S3C_DEV_I2C1
636static struct resource s3c_i2c1_resource[] = {
637 [0] = {
638 .start = S3C_PA_IIC1,
639 .end = S3C_PA_IIC1 + SZ_4K - 1,
640 .flags = IORESOURCE_MEM,
641 },
642 [1] = {
643 .start = IRQ_IIC1,
644 .end = IRQ_IIC1,
645 .flags = IORESOURCE_IRQ,
646 },
647};
648
649struct platform_device s3c_device_i2c1 = {
650 .name = "s3c2410-i2c",
651 .id = 1,
652 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
653 .resource = s3c_i2c1_resource,
654};
655
656void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
657{
658 struct s3c2410_platform_i2c *npd;
659
660 if (!pd) {
661 pd = &default_i2c_data;
662 pd->bus_num = 1;
663 }
664
665 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
666 &s3c_device_i2c1);
667
668 if (!npd->cfg_gpio)
669 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
670}
671#endif /* CONFIG_S3C_DEV_I2C1 */
672
673#ifdef CONFIG_S3C_DEV_I2C2
674static struct resource s3c_i2c2_resource[] = {
675 [0] = {
676 .start = S3C_PA_IIC2,
677 .end = S3C_PA_IIC2 + SZ_4K - 1,
678 .flags = IORESOURCE_MEM,
679 },
680 [1] = {
681 .start = IRQ_IIC2,
682 .end = IRQ_IIC2,
683 .flags = IORESOURCE_IRQ,
684 },
685};
686
687struct platform_device s3c_device_i2c2 = {
688 .name = "s3c2410-i2c",
689 .id = 2,
690 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
691 .resource = s3c_i2c2_resource,
692};
693
694void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
695{
696 struct s3c2410_platform_i2c *npd;
697
698 if (!pd) {
699 pd = &default_i2c_data;
700 pd->bus_num = 2;
701 }
702
703 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
704 &s3c_device_i2c2);
705
706 if (!npd->cfg_gpio)
707 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
708}
709#endif /* CONFIG_S3C_DEV_I2C2 */
710
711#ifdef CONFIG_S3C_DEV_I2C3
712static struct resource s3c_i2c3_resource[] = {
713 [0] = {
714 .start = S3C_PA_IIC3,
715 .end = S3C_PA_IIC3 + SZ_4K - 1,
716 .flags = IORESOURCE_MEM,
717 },
718 [1] = {
719 .start = IRQ_IIC3,
720 .end = IRQ_IIC3,
721 .flags = IORESOURCE_IRQ,
722 },
723};
724
725struct platform_device s3c_device_i2c3 = {
726 .name = "s3c2440-i2c",
727 .id = 3,
728 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
729 .resource = s3c_i2c3_resource,
730};
731
732void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
733{
734 struct s3c2410_platform_i2c *npd;
735
736 if (!pd) {
737 pd = &default_i2c_data;
738 pd->bus_num = 3;
739 }
740
741 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
742 &s3c_device_i2c3);
743
744 if (!npd->cfg_gpio)
745 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
746}
747#endif /*CONFIG_S3C_DEV_I2C3 */
748
749#ifdef CONFIG_S3C_DEV_I2C4
750static struct resource s3c_i2c4_resource[] = {
751 [0] = {
752 .start = S3C_PA_IIC4,
753 .end = S3C_PA_IIC4 + SZ_4K - 1,
754 .flags = IORESOURCE_MEM,
755 },
756 [1] = {
757 .start = IRQ_IIC4,
758 .end = IRQ_IIC4,
759 .flags = IORESOURCE_IRQ,
760 },
761};
762
763struct platform_device s3c_device_i2c4 = {
764 .name = "s3c2440-i2c",
765 .id = 4,
766 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
767 .resource = s3c_i2c4_resource,
768};
769
770void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
771{
772 struct s3c2410_platform_i2c *npd;
773
774 if (!pd) {
775 pd = &default_i2c_data;
776 pd->bus_num = 4;
777 }
778
779 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
780 &s3c_device_i2c4);
781
782 if (!npd->cfg_gpio)
783 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
784}
785#endif /*CONFIG_S3C_DEV_I2C4 */
786
787#ifdef CONFIG_S3C_DEV_I2C5
788static struct resource s3c_i2c5_resource[] = {
789 [0] = {
790 .start = S3C_PA_IIC5,
791 .end = S3C_PA_IIC5 + SZ_4K - 1,
792 .flags = IORESOURCE_MEM,
793 },
794 [1] = {
795 .start = IRQ_IIC5,
796 .end = IRQ_IIC5,
797 .flags = IORESOURCE_IRQ,
798 },
799};
800
801struct platform_device s3c_device_i2c5 = {
802 .name = "s3c2440-i2c",
803 .id = 5,
804 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
805 .resource = s3c_i2c5_resource,
806};
807
808void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
809{
810 struct s3c2410_platform_i2c *npd;
811
812 if (!pd) {
813 pd = &default_i2c_data;
814 pd->bus_num = 5;
815 }
816
817 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
818 &s3c_device_i2c5);
819
820 if (!npd->cfg_gpio)
821 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
822}
823#endif /*CONFIG_S3C_DEV_I2C5 */
824
825#ifdef CONFIG_S3C_DEV_I2C6
826static struct resource s3c_i2c6_resource[] = {
827 [0] = {
828 .start = S3C_PA_IIC6,
829 .end = S3C_PA_IIC6 + SZ_4K - 1,
830 .flags = IORESOURCE_MEM,
831 },
832 [1] = {
833 .start = IRQ_IIC6,
834 .end = IRQ_IIC6,
835 .flags = IORESOURCE_IRQ,
836 },
837};
838
839struct platform_device s3c_device_i2c6 = {
840 .name = "s3c2440-i2c",
841 .id = 6,
842 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
843 .resource = s3c_i2c6_resource,
844};
845
846void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
847{
848 struct s3c2410_platform_i2c *npd;
849
850 if (!pd) {
851 pd = &default_i2c_data;
852 pd->bus_num = 6;
853 }
854
855 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
856 &s3c_device_i2c6);
857
858 if (!npd->cfg_gpio)
859 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
860}
861#endif /* CONFIG_S3C_DEV_I2C6 */
862
863#ifdef CONFIG_S3C_DEV_I2C7
864static struct resource s3c_i2c7_resource[] = {
865 [0] = {
866 .start = S3C_PA_IIC7,
867 .end = S3C_PA_IIC7 + SZ_4K - 1,
868 .flags = IORESOURCE_MEM,
869 },
870 [1] = {
871 .start = IRQ_IIC7,
872 .end = IRQ_IIC7,
873 .flags = IORESOURCE_IRQ,
874 },
875};
876
877struct platform_device s3c_device_i2c7 = {
878 .name = "s3c2440-i2c",
879 .id = 7,
880 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
881 .resource = s3c_i2c7_resource,
882};
883
884void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
885{
886 struct s3c2410_platform_i2c *npd;
887
888 if (!pd) {
889 pd = &default_i2c_data;
890 pd->bus_num = 7;
891 }
892
893 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
894 &s3c_device_i2c7);
895
896 if (!npd->cfg_gpio)
897 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
898}
899#endif /* CONFIG_S3C_DEV_I2C7 */
900
Kukjin Kim57167142011-10-03 09:46:56 +0900901/* I2C HDMIPHY */
902
903#ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
904static struct resource s5p_i2c_resource[] = {
905 [0] = {
906 .start = S5P_PA_IIC_HDMIPHY,
907 .end = S5P_PA_IIC_HDMIPHY + SZ_4K - 1,
908 .flags = IORESOURCE_MEM,
909 },
910 [1] = {
911 .start = IRQ_IIC_HDMIPHY,
912 .end = IRQ_IIC_HDMIPHY,
913 .flags = IORESOURCE_IRQ,
914 },
915};
916
917struct platform_device s5p_device_i2c_hdmiphy = {
918 .name = "s3c2440-hdmiphy-i2c",
919 .id = -1,
920 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
921 .resource = s5p_i2c_resource,
922};
923
924void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
925{
926 struct s3c2410_platform_i2c *npd;
927
928 if (!pd) {
929 pd = &default_i2c_data;
930
931 if (soc_is_exynos4210())
932 pd->bus_num = 8;
933 else if (soc_is_s5pv210())
934 pd->bus_num = 3;
935 else
936 pd->bus_num = 0;
937 }
938
939 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
940 &s5p_device_i2c_hdmiphy);
941}
942#endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
943
Kukjin Kim61c542b2011-10-03 09:46:13 +0900944/* I2S */
945
946#ifdef CONFIG_PLAT_S3C24XX
947static struct resource s3c_iis_resource[] = {
948 [0] = {
949 .start = S3C24XX_PA_IIS,
950 .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS - 1,
951 .flags = IORESOURCE_MEM,
952 }
953};
954
955struct platform_device s3c_device_iis = {
956 .name = "s3c24xx-iis",
957 .id = -1,
958 .num_resources = ARRAY_SIZE(s3c_iis_resource),
959 .resource = s3c_iis_resource,
960 .dev = {
961 .dma_mask = &samsung_device_dma_mask,
962 .coherent_dma_mask = DMA_BIT_MASK(32),
963 }
964};
965#endif /* CONFIG_PLAT_S3C24XX */
966
967#ifdef CONFIG_CPU_S3C2440
968struct platform_device s3c2412_device_iis = {
969 .name = "s3c2412-iis",
970 .id = -1,
971 .dev = {
972 .dma_mask = &samsung_device_dma_mask,
973 .coherent_dma_mask = DMA_BIT_MASK(32),
974 }
975};
976#endif /* CONFIG_CPU_S3C2440 */
977
Kukjin Kimbad1e6a2011-10-03 09:47:58 +0900978/* IDE CFCON */
979
980#ifdef CONFIG_SAMSUNG_DEV_IDE
981static struct resource s3c_cfcon_resource[] = {
982 [0] = {
983 .start = SAMSUNG_PA_CFCON,
984 .end = SAMSUNG_PA_CFCON + SZ_16K - 1,
985 .flags = IORESOURCE_MEM,
986 },
987 [1] = {
988 .start = IRQ_CFCON,
989 .end = IRQ_CFCON,
990 .flags = IORESOURCE_IRQ,
991 },
992};
993
994struct platform_device s3c_device_cfcon = {
995 .id = 0,
996 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
997 .resource = s3c_cfcon_resource,
998};
999
1000void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
1001{
1002 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
1003 &s3c_device_cfcon);
1004}
1005#endif /* CONFIG_SAMSUNG_DEV_IDE */
1006
1007/* KEYPAD */
1008
1009#ifdef CONFIG_SAMSUNG_DEV_KEYPAD
1010static struct resource samsung_keypad_resources[] = {
1011 [0] = {
1012 .start = SAMSUNG_PA_KEYPAD,
1013 .end = SAMSUNG_PA_KEYPAD + 0x20 - 1,
1014 .flags = IORESOURCE_MEM,
1015 },
1016 [1] = {
1017 .start = IRQ_KEYPAD,
1018 .end = IRQ_KEYPAD,
1019 .flags = IORESOURCE_IRQ,
1020 },
1021};
1022
1023struct platform_device samsung_device_keypad = {
1024 .name = "samsung-keypad",
1025 .id = -1,
1026 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
1027 .resource = samsung_keypad_resources,
1028};
1029
1030void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
1031{
1032 struct samsung_keypad_platdata *npd;
1033
1034 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
1035 &samsung_device_keypad);
1036
1037 if (!npd->cfg_gpio)
1038 npd->cfg_gpio = samsung_keypad_cfg_gpio;
1039}
1040#endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
1041
Kukjin Kim61c542b2011-10-03 09:46:13 +09001042/* LCD Controller */
1043
1044#ifdef CONFIG_PLAT_S3C24XX
1045static struct resource s3c_lcd_resource[] = {
1046 [0] = {
1047 .start = S3C24XX_PA_LCD,
1048 .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
1049 .flags = IORESOURCE_MEM,
1050 },
1051 [1] = {
1052 .start = IRQ_LCD,
1053 .end = IRQ_LCD,
1054 .flags = IORESOURCE_IRQ,
1055 }
1056};
1057
1058struct platform_device s3c_device_lcd = {
1059 .name = "s3c2410-lcd",
1060 .id = -1,
1061 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
1062 .resource = s3c_lcd_resource,
1063 .dev = {
1064 .dma_mask = &samsung_device_dma_mask,
1065 .coherent_dma_mask = DMA_BIT_MASK(32),
1066 }
1067};
1068
1069void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
1070{
1071 struct s3c2410fb_mach_info *npd;
1072
1073 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
1074 if (npd) {
1075 npd->displays = kmemdup(pd->displays,
1076 sizeof(struct s3c2410fb_display) * npd->num_displays,
1077 GFP_KERNEL);
1078 if (!npd->displays)
1079 printk(KERN_ERR "no memory for LCD display data\n");
1080 } else {
1081 printk(KERN_ERR "no memory for LCD platform data\n");
1082 }
1083}
1084#endif /* CONFIG_PLAT_S3C24XX */
1085
Kukjin Kim57167142011-10-03 09:46:56 +09001086/* MFC */
1087
1088#ifdef CONFIG_S5P_DEV_MFC
1089static struct resource s5p_mfc_resource[] = {
1090 [0] = {
1091 .start = S5P_PA_MFC,
1092 .end = S5P_PA_MFC + SZ_64K - 1,
1093 .flags = IORESOURCE_MEM,
1094 },
1095 [1] = {
1096 .start = IRQ_MFC,
1097 .end = IRQ_MFC,
1098 .flags = IORESOURCE_IRQ,
1099 }
1100};
1101
1102struct platform_device s5p_device_mfc = {
1103 .name = "s5p-mfc",
1104 .id = -1,
1105 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
1106 .resource = s5p_mfc_resource,
1107};
1108
1109/*
1110 * MFC hardware has 2 memory interfaces which are modelled as two separate
1111 * platform devices to let dma-mapping distinguish between them.
1112 *
1113 * MFC parent device (s5p_device_mfc) must be registered before memory
1114 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
1115 */
1116
1117struct platform_device s5p_device_mfc_l = {
1118 .name = "s5p-mfc-l",
1119 .id = -1,
1120 .dev = {
1121 .parent = &s5p_device_mfc.dev,
1122 .dma_mask = &samsung_device_dma_mask,
1123 .coherent_dma_mask = DMA_BIT_MASK(32),
1124 },
1125};
1126
1127struct platform_device s5p_device_mfc_r = {
1128 .name = "s5p-mfc-r",
1129 .id = -1,
1130 .dev = {
1131 .parent = &s5p_device_mfc.dev,
1132 .dma_mask = &samsung_device_dma_mask,
1133 .coherent_dma_mask = DMA_BIT_MASK(32),
1134 },
1135};
1136#endif /* CONFIG_S5P_DEV_MFC */
1137
1138/* MIPI CSIS */
1139
1140#ifdef CONFIG_S5P_DEV_CSIS0
1141static struct resource s5p_mipi_csis0_resource[] = {
1142 [0] = {
1143 .start = S5P_PA_MIPI_CSIS0,
1144 .end = S5P_PA_MIPI_CSIS0 + SZ_4K - 1,
1145 .flags = IORESOURCE_MEM,
1146 },
1147 [1] = {
1148 .start = IRQ_MIPI_CSIS0,
1149 .end = IRQ_MIPI_CSIS0,
1150 .flags = IORESOURCE_IRQ,
1151 }
1152};
1153
1154struct platform_device s5p_device_mipi_csis0 = {
1155 .name = "s5p-mipi-csis",
1156 .id = 0,
1157 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
1158 .resource = s5p_mipi_csis0_resource,
1159};
1160#endif /* CONFIG_S5P_DEV_CSIS0 */
1161
1162#ifdef CONFIG_S5P_DEV_CSIS1
1163static struct resource s5p_mipi_csis1_resource[] = {
1164 [0] = {
1165 .start = S5P_PA_MIPI_CSIS1,
1166 .end = S5P_PA_MIPI_CSIS1 + SZ_4K - 1,
1167 .flags = IORESOURCE_MEM,
1168 },
1169 [1] = {
1170 .start = IRQ_MIPI_CSIS1,
1171 .end = IRQ_MIPI_CSIS1,
1172 .flags = IORESOURCE_IRQ,
1173 },
1174};
1175
1176struct platform_device s5p_device_mipi_csis1 = {
1177 .name = "s5p-mipi-csis",
1178 .id = 1,
1179 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
1180 .resource = s5p_mipi_csis1_resource,
1181};
1182#endif
1183
Kukjin Kimbad1e6a2011-10-03 09:47:58 +09001184/* NAND */
1185
1186#ifdef CONFIG_S3C_DEV_NAND
1187static struct resource s3c_nand_resource[] = {
1188 [0] = {
1189 .start = S3C_PA_NAND,
1190 .end = S3C_PA_NAND + SZ_1M,
1191 .flags = IORESOURCE_MEM,
1192 }
1193};
1194
1195struct platform_device s3c_device_nand = {
1196 .name = "s3c2410-nand",
1197 .id = -1,
1198 .num_resources = ARRAY_SIZE(s3c_nand_resource),
1199 .resource = s3c_nand_resource,
1200};
1201
1202/*
1203 * s3c_nand_copy_set() - copy nand set data
1204 * @set: The new structure, directly copied from the old.
1205 *
1206 * Copy all the fields from the NAND set field from what is probably __initdata
1207 * to new kernel memory. The code returns 0 if the copy happened correctly or
1208 * an error code for the calling function to display.
1209 *
1210 * Note, we currently do not try and look to see if we've already copied the
1211 * data in a previous set.
1212 */
1213static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
1214{
1215 void *ptr;
1216 int size;
1217
1218 size = sizeof(struct mtd_partition) * set->nr_partitions;
1219 if (size) {
1220 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
1221 set->partitions = ptr;
1222
1223 if (!ptr)
1224 return -ENOMEM;
1225 }
1226
1227 if (set->nr_map && set->nr_chips) {
1228 size = sizeof(int) * set->nr_chips;
1229 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
1230 set->nr_map = ptr;
1231
1232 if (!ptr)
1233 return -ENOMEM;
1234 }
1235
1236 if (set->ecc_layout) {
1237 ptr = kmemdup(set->ecc_layout,
1238 sizeof(struct nand_ecclayout), GFP_KERNEL);
1239 set->ecc_layout = ptr;
1240
1241 if (!ptr)
1242 return -ENOMEM;
1243 }
1244
1245 return 0;
1246}
1247
1248void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
1249{
1250 struct s3c2410_platform_nand *npd;
1251 int size;
1252 int ret;
1253
1254 /* note, if we get a failure in allocation, we simply drop out of the
1255 * function. If there is so little memory available at initialisation
1256 * time then there is little chance the system is going to run.
1257 */
1258
1259 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
1260 &s3c_device_nand);
1261 if (!npd)
1262 return;
1263
1264 /* now see if we need to copy any of the nand set data */
1265
1266 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
1267 if (size) {
1268 struct s3c2410_nand_set *from = npd->sets;
1269 struct s3c2410_nand_set *to;
1270 int i;
1271
1272 to = kmemdup(from, size, GFP_KERNEL);
1273 npd->sets = to; /* set, even if we failed */
1274
1275 if (!to) {
1276 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1277 return;
1278 }
1279
1280 for (i = 0; i < npd->nr_sets; i++) {
1281 ret = s3c_nand_copy_set(to);
1282 if (ret) {
1283 printk(KERN_ERR "%s: failed to copy set %d\n",
1284 __func__, i);
1285 return;
1286 }
1287 to++;
1288 }
1289 }
1290}
1291#endif /* CONFIG_S3C_DEV_NAND */
1292
1293/* ONENAND */
1294
1295#ifdef CONFIG_S3C_DEV_ONENAND
1296static struct resource s3c_onenand_resources[] = {
1297 [0] = {
1298 .start = S3C_PA_ONENAND,
1299 .end = S3C_PA_ONENAND + 0x400 - 1,
1300 .flags = IORESOURCE_MEM,
1301 },
1302 [1] = {
1303 .start = S3C_PA_ONENAND_BUF,
1304 .end = S3C_PA_ONENAND_BUF + S3C_SZ_ONENAND_BUF - 1,
1305 .flags = IORESOURCE_MEM,
1306 },
1307 [2] = {
1308 .start = IRQ_ONENAND,
1309 .end = IRQ_ONENAND,
1310 .flags = IORESOURCE_IRQ,
1311 },
1312};
1313
1314struct platform_device s3c_device_onenand = {
1315 .name = "samsung-onenand",
1316 .id = 0,
1317 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1318 .resource = s3c_onenand_resources,
1319};
1320#endif /* CONFIG_S3C_DEV_ONENAND */
1321
Kukjin Kim0523ec32011-10-03 09:46:56 +09001322#ifdef CONFIG_S3C64XX_DEV_ONENAND1
1323static struct resource s3c64xx_onenand1_resources[] = {
1324 [0] = {
1325 .start = S3C64XX_PA_ONENAND1,
1326 .end = S3C64XX_PA_ONENAND1 + 0x400 - 1,
1327 .flags = IORESOURCE_MEM,
1328 },
1329 [1] = {
1330 .start = S3C64XX_PA_ONENAND1_BUF,
1331 .end = S3C64XX_PA_ONENAND1_BUF + S3C64XX_SZ_ONENAND1_BUF - 1,
1332 .flags = IORESOURCE_MEM,
1333 },
1334 [2] = {
1335 .start = IRQ_ONENAND1,
1336 .end = IRQ_ONENAND1,
1337 .flags = IORESOURCE_IRQ,
1338 },
1339};
1340
1341struct platform_device s3c64xx_device_onenand1 = {
1342 .name = "samsung-onenand",
1343 .id = 1,
1344 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1345 .resource = s3c64xx_onenand1_resources,
1346};
1347
1348void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1349{
1350 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1351 &s3c64xx_device_onenand1);
1352}
1353#endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1354
Kukjin Kim57167142011-10-03 09:46:56 +09001355#ifdef CONFIG_S5P_DEV_ONENAND
1356static struct resource s5p_onenand_resources[] = {
1357 [0] = {
1358 .start = S5P_PA_ONENAND,
1359 .end = S5P_PA_ONENAND + SZ_128K - 1,
1360 .flags = IORESOURCE_MEM,
1361 },
1362 [1] = {
1363 .start = S5P_PA_ONENAND_DMA,
1364 .end = S5P_PA_ONENAND_DMA + SZ_8K - 1,
1365 .flags = IORESOURCE_MEM,
1366 },
1367 [2] = {
1368 .start = IRQ_ONENAND_AUDI,
1369 .end = IRQ_ONENAND_AUDI,
1370 .flags = IORESOURCE_IRQ,
1371 },
1372};
1373
1374struct platform_device s5p_device_onenand = {
1375 .name = "s5pc110-onenand",
1376 .id = -1,
1377 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1378 .resource = s5p_onenand_resources,
1379};
1380#endif /* CONFIG_S5P_DEV_ONENAND */
1381
1382/* PMU */
1383
1384#ifdef CONFIG_PLAT_S5P
1385static struct resource s5p_pmu_resource = {
1386 .start = IRQ_PMU,
1387 .end = IRQ_PMU,
1388 .flags = IORESOURCE_IRQ,
1389};
1390
1391struct platform_device s5p_device_pmu = {
1392 .name = "arm-pmu",
1393 .id = ARM_PMU_DEVICE_CPU,
1394 .num_resources = 1,
1395 .resource = &s5p_pmu_resource,
1396};
1397
1398static int __init s5p_pmu_init(void)
1399{
1400 platform_device_register(&s5p_device_pmu);
1401 return 0;
1402}
1403arch_initcall(s5p_pmu_init);
1404#endif /* CONFIG_PLAT_S5P */
1405
Kukjin Kimbad1e6a2011-10-03 09:47:58 +09001406/* PWM Timer */
1407
1408#ifdef CONFIG_SAMSUNG_DEV_PWM
1409
1410#define TIMER_RESOURCE_SIZE (1)
1411
1412#define TIMER_RESOURCE(_tmr, _irq) \
1413 (struct resource [TIMER_RESOURCE_SIZE]) { \
1414 [0] = { \
1415 .start = _irq, \
1416 .end = _irq, \
1417 .flags = IORESOURCE_IRQ \
1418 } \
1419 }
1420
1421#define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1422 .name = "s3c24xx-pwm", \
1423 .id = _tmr_no, \
1424 .num_resources = TIMER_RESOURCE_SIZE, \
1425 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1426
1427/*
1428 * since we already have an static mapping for the timer,
1429 * we do not bother setting any IO resource for the base.
1430 */
1431
1432struct platform_device s3c_device_timer[] = {
1433 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1434 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1435 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1436 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1437 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1438};
1439#endif /* CONFIG_SAMSUNG_DEV_PWM */
1440
Kukjin Kim61c542b2011-10-03 09:46:13 +09001441/* RTC */
1442
1443#ifdef CONFIG_PLAT_S3C24XX
1444static struct resource s3c_rtc_resource[] = {
1445 [0] = {
1446 .start = S3C24XX_PA_RTC,
1447 .end = S3C24XX_PA_RTC + 0xff,
1448 .flags = IORESOURCE_MEM,
1449 },
1450 [1] = {
1451 .start = IRQ_RTC,
1452 .end = IRQ_RTC,
1453 .flags = IORESOURCE_IRQ,
1454 },
1455 [2] = {
1456 .start = IRQ_TICK,
1457 .end = IRQ_TICK,
1458 .flags = IORESOURCE_IRQ
1459 }
1460};
1461
1462struct platform_device s3c_device_rtc = {
1463 .name = "s3c2410-rtc",
1464 .id = -1,
1465 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1466 .resource = s3c_rtc_resource,
1467};
1468#endif /* CONFIG_PLAT_S3C24XX */
1469
Kukjin Kimbad1e6a2011-10-03 09:47:58 +09001470#ifdef CONFIG_S3C_DEV_RTC
1471static struct resource s3c_rtc_resource[] = {
1472 [0] = {
1473 .start = S3C_PA_RTC,
1474 .end = S3C_PA_RTC + 0xff,
1475 .flags = IORESOURCE_MEM,
1476 },
1477 [1] = {
1478 .start = IRQ_RTC_ALARM,
1479 .end = IRQ_RTC_ALARM,
1480 .flags = IORESOURCE_IRQ,
1481 },
1482 [2] = {
1483 .start = IRQ_RTC_TIC,
1484 .end = IRQ_RTC_TIC,
1485 .flags = IORESOURCE_IRQ
1486 }
1487};
1488
1489struct platform_device s3c_device_rtc = {
1490 .name = "s3c64xx-rtc",
1491 .id = -1,
1492 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1493 .resource = s3c_rtc_resource,
1494};
1495#endif /* CONFIG_S3C_DEV_RTC */
1496
Kukjin Kim61c542b2011-10-03 09:46:13 +09001497/* SDI */
1498
1499#ifdef CONFIG_PLAT_S3C24XX
1500static struct resource s3c_sdi_resource[] = {
1501 [0] = {
1502 .start = S3C24XX_PA_SDI,
1503 .end = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1,
1504 .flags = IORESOURCE_MEM,
1505 },
1506 [1] = {
1507 .start = IRQ_SDI,
1508 .end = IRQ_SDI,
1509 .flags = IORESOURCE_IRQ,
1510 }
1511};
1512
1513struct platform_device s3c_device_sdi = {
1514 .name = "s3c2410-sdi",
1515 .id = -1,
1516 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1517 .resource = s3c_sdi_resource,
1518};
1519
1520void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1521{
1522 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1523 &s3c_device_sdi);
1524}
1525#endif /* CONFIG_PLAT_S3C24XX */
1526
1527/* SPI */
1528
1529#ifdef CONFIG_PLAT_S3C24XX
1530static struct resource s3c_spi0_resource[] = {
1531 [0] = {
1532 .start = S3C24XX_PA_SPI,
1533 .end = S3C24XX_PA_SPI + 0x1f,
1534 .flags = IORESOURCE_MEM,
1535 },
1536 [1] = {
1537 .start = IRQ_SPI0,
1538 .end = IRQ_SPI0,
1539 .flags = IORESOURCE_IRQ,
1540 }
1541};
1542
1543struct platform_device s3c_device_spi0 = {
1544 .name = "s3c2410-spi",
1545 .id = 0,
1546 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1547 .resource = s3c_spi0_resource,
1548 .dev = {
1549 .dma_mask = &samsung_device_dma_mask,
1550 .coherent_dma_mask = DMA_BIT_MASK(32),
1551 }
1552};
1553
1554static struct resource s3c_spi1_resource[] = {
1555 [0] = {
1556 .start = S3C24XX_PA_SPI + S3C2410_SPI1,
1557 .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f,
1558 .flags = IORESOURCE_MEM,
1559 },
1560 [1] = {
1561 .start = IRQ_SPI1,
1562 .end = IRQ_SPI1,
1563 .flags = IORESOURCE_IRQ,
1564 }
1565};
1566
1567struct platform_device s3c_device_spi1 = {
1568 .name = "s3c2410-spi",
1569 .id = 1,
1570 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1571 .resource = s3c_spi1_resource,
1572 .dev = {
1573 .dma_mask = &samsung_device_dma_mask,
1574 .coherent_dma_mask = DMA_BIT_MASK(32),
1575 }
1576};
1577#endif /* CONFIG_PLAT_S3C24XX */
1578
1579/* Touchscreen */
1580
1581#ifdef CONFIG_PLAT_S3C24XX
1582static struct resource s3c_ts_resource[] = {
1583 [0] = {
1584 .start = S3C24XX_PA_ADC,
1585 .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
1586 .flags = IORESOURCE_MEM,
1587 },
1588 [1] = {
1589 .start = IRQ_TC,
1590 .end = IRQ_TC,
1591 .flags = IORESOURCE_IRQ,
1592 },
1593
1594};
1595
1596struct platform_device s3c_device_ts = {
1597 .name = "s3c2410-ts",
1598 .id = -1,
1599 .dev.parent = &s3c_device_adc.dev,
1600 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1601 .resource = s3c_ts_resource,
1602};
1603
1604void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1605{
1606 s3c_set_platdata(hard_s3c2410ts_info,
1607 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1608}
1609#endif /* CONFIG_PLAT_S3C24XX */
1610
Kukjin Kimbad1e6a2011-10-03 09:47:58 +09001611#ifdef CONFIG_SAMSUNG_DEV_TS
1612static struct resource s3c_ts_resource[] = {
1613 [0] = {
1614 .start = SAMSUNG_PA_ADC,
1615 .end = SAMSUNG_PA_ADC + SZ_256 - 1,
1616 .flags = IORESOURCE_MEM,
1617 },
1618 [1] = {
1619 .start = IRQ_TC,
1620 .end = IRQ_TC,
1621 .flags = IORESOURCE_IRQ,
1622 },
1623};
1624
1625static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1626 .delay = 10000,
1627 .presc = 49,
1628 .oversampling_shift = 2,
1629};
1630
1631struct platform_device s3c_device_ts = {
1632 .name = "s3c64xx-ts",
1633 .id = -1,
1634 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1635 .resource = s3c_ts_resource,
1636};
1637
1638void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1639{
1640 if (!pd)
1641 pd = &default_ts_data;
1642
1643 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1644 &s3c_device_ts);
1645}
1646#endif /* CONFIG_SAMSUNG_DEV_TS */
1647
Kukjin Kim57167142011-10-03 09:46:56 +09001648/* TV */
1649
1650#ifdef CONFIG_S5P_DEV_TV
1651
1652static struct resource s5p_hdmi_resources[] = {
1653 [0] = {
1654 .start = S5P_PA_HDMI,
1655 .end = S5P_PA_HDMI + SZ_1M - 1,
1656 .flags = IORESOURCE_MEM,
1657 },
1658 [1] = {
1659 .start = IRQ_HDMI,
1660 .end = IRQ_HDMI,
1661 .flags = IORESOURCE_IRQ,
1662 },
1663};
1664
1665struct platform_device s5p_device_hdmi = {
1666 .name = "s5p-hdmi",
1667 .id = -1,
1668 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1669 .resource = s5p_hdmi_resources,
1670};
1671
1672static struct resource s5p_sdo_resources[] = {
1673 [0] = {
1674 .start = S5P_PA_SDO,
1675 .end = S5P_PA_SDO + SZ_64K - 1,
1676 .flags = IORESOURCE_MEM,
1677 },
1678 [1] = {
1679 .start = IRQ_SDO,
1680 .end = IRQ_SDO,
1681 .flags = IORESOURCE_IRQ,
1682 }
1683};
1684
1685struct platform_device s5p_device_sdo = {
1686 .name = "s5p-sdo",
1687 .id = -1,
1688 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1689 .resource = s5p_sdo_resources,
1690};
1691
1692static struct resource s5p_mixer_resources[] = {
1693 [0] = {
1694 .start = S5P_PA_MIXER,
1695 .end = S5P_PA_MIXER + SZ_64K - 1,
1696 .flags = IORESOURCE_MEM,
1697 .name = "mxr"
1698 },
1699 [1] = {
1700 .start = S5P_PA_VP,
1701 .end = S5P_PA_VP + SZ_64K - 1,
1702 .flags = IORESOURCE_MEM,
1703 .name = "vp"
1704 },
1705 [2] = {
1706 .start = IRQ_MIXER,
1707 .end = IRQ_MIXER,
1708 .flags = IORESOURCE_IRQ,
1709 .name = "irq"
1710 }
1711};
1712
1713struct platform_device s5p_device_mixer = {
1714 .name = "s5p-mixer",
1715 .id = -1,
1716 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1717 .resource = s5p_mixer_resources,
1718 .dev = {
1719 .dma_mask = &samsung_device_dma_mask,
1720 .coherent_dma_mask = DMA_BIT_MASK(32),
1721 }
1722};
1723#endif /* CONFIG_S5P_DEV_TV */
1724
Kukjin Kimbad1e6a2011-10-03 09:47:58 +09001725/* USB */
1726
1727#ifdef CONFIG_S3C_DEV_USB_HOST
1728static struct resource s3c_usb_resource[] = {
1729 [0] = {
1730 .start = S3C_PA_USBHOST,
1731 .end = S3C_PA_USBHOST + 0x100 - 1,
1732 .flags = IORESOURCE_MEM,
1733 },
1734 [1] = {
1735 .start = IRQ_USBH,
1736 .end = IRQ_USBH,
1737 .flags = IORESOURCE_IRQ,
1738 }
1739};
1740
1741struct platform_device s3c_device_ohci = {
1742 .name = "s3c2410-ohci",
1743 .id = -1,
1744 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1745 .resource = s3c_usb_resource,
1746 .dev = {
1747 .dma_mask = &samsung_device_dma_mask,
1748 .coherent_dma_mask = DMA_BIT_MASK(32),
1749 }
1750};
1751
1752/*
1753 * s3c_ohci_set_platdata - initialise OHCI device platform data
1754 * @info: The platform data.
1755 *
1756 * This call copies the @info passed in and sets the device .platform_data
1757 * field to that copy. The @info is copied so that the original can be marked
1758 * __initdata.
1759 */
1760
1761void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1762{
1763 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1764 &s3c_device_ohci);
1765}
1766#endif /* CONFIG_S3C_DEV_USB_HOST */
1767
Kukjin Kim61c542b2011-10-03 09:46:13 +09001768/* USB Device (Gadget) */
1769
1770#ifdef CONFIG_PLAT_S3C24XX
1771static struct resource s3c_usbgadget_resource[] = {
1772 [0] = {
1773 .start = S3C24XX_PA_USBDEV,
1774 .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
1775 .flags = IORESOURCE_MEM,
1776 },
1777 [1] = {
1778 .start = IRQ_USBD,
1779 .end = IRQ_USBD,
1780 .flags = IORESOURCE_IRQ,
1781 }
1782};
1783
1784struct platform_device s3c_device_usbgadget = {
1785 .name = "s3c2410-usbgadget",
1786 .id = -1,
1787 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1788 .resource = s3c_usbgadget_resource,
1789};
1790
1791void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1792{
1793 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1794}
1795#endif /* CONFIG_PLAT_S3C24XX */
1796
Kukjin Kim57167142011-10-03 09:46:56 +09001797/* USB EHCI Host Controller */
1798
1799#ifdef CONFIG_S5P_DEV_USB_EHCI
1800static struct resource s5p_ehci_resource[] = {
1801 [0] = {
1802 .start = S5P_PA_EHCI,
1803 .end = S5P_PA_EHCI + SZ_256 - 1,
1804 .flags = IORESOURCE_MEM,
1805 },
1806 [1] = {
1807 .start = IRQ_USB_HOST,
1808 .end = IRQ_USB_HOST,
1809 .flags = IORESOURCE_IRQ,
1810 }
1811};
1812
1813struct platform_device s5p_device_ehci = {
1814 .name = "s5p-ehci",
1815 .id = -1,
1816 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1817 .resource = s5p_ehci_resource,
1818 .dev = {
1819 .dma_mask = &samsung_device_dma_mask,
1820 .coherent_dma_mask = DMA_BIT_MASK(32),
1821 }
1822};
1823
1824void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1825{
1826 struct s5p_ehci_platdata *npd;
1827
1828 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1829 &s5p_device_ehci);
1830
1831 if (!npd->phy_init)
1832 npd->phy_init = s5p_usb_phy_init;
1833 if (!npd->phy_exit)
1834 npd->phy_exit = s5p_usb_phy_exit;
1835}
1836#endif /* CONFIG_S5P_DEV_USB_EHCI */
1837
Kukjin Kimbad1e6a2011-10-03 09:47:58 +09001838/* USB HSOTG */
1839
1840#ifdef CONFIG_S3C_DEV_USB_HSOTG
1841static struct resource s3c_usb_hsotg_resources[] = {
1842 [0] = {
1843 .start = S3C_PA_USB_HSOTG,
1844 .end = S3C_PA_USB_HSOTG + 0x10000 - 1,
1845 .flags = IORESOURCE_MEM,
1846 },
1847 [1] = {
1848 .start = IRQ_OTG,
1849 .end = IRQ_OTG,
1850 .flags = IORESOURCE_IRQ,
1851 },
1852};
1853
1854struct platform_device s3c_device_usb_hsotg = {
1855 .name = "s3c-hsotg",
1856 .id = -1,
1857 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1858 .resource = s3c_usb_hsotg_resources,
1859 .dev = {
1860 .dma_mask = &samsung_device_dma_mask,
1861 .coherent_dma_mask = DMA_BIT_MASK(32),
1862 },
1863};
1864#endif /* CONFIG_S3C_DEV_USB_HSOTG */
1865
Kukjin Kim61c542b2011-10-03 09:46:13 +09001866/* USB High Spped 2.0 Device (Gadget) */
1867
1868#ifdef CONFIG_PLAT_S3C24XX
1869static struct resource s3c_hsudc_resource[] = {
1870 [0] = {
1871 .start = S3C2416_PA_HSUDC,
1872 .end = S3C2416_PA_HSUDC + S3C2416_SZ_HSUDC - 1,
1873 .flags = IORESOURCE_MEM,
1874 },
1875 [1] = {
1876 .start = IRQ_USBD,
1877 .end = IRQ_USBD,
1878 .flags = IORESOURCE_IRQ,
1879 }
1880};
1881
1882struct platform_device s3c_device_usb_hsudc = {
1883 .name = "s3c-hsudc",
1884 .id = -1,
1885 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1886 .resource = s3c_hsudc_resource,
1887 .dev = {
1888 .dma_mask = &samsung_device_dma_mask,
1889 .coherent_dma_mask = DMA_BIT_MASK(32),
1890 },
1891};
1892
1893void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1894{
1895 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1896}
1897#endif /* CONFIG_PLAT_S3C24XX */
Kukjin Kimbad1e6a2011-10-03 09:47:58 +09001898
1899/* WDT */
1900
1901#ifdef CONFIG_S3C_DEV_WDT
1902static struct resource s3c_wdt_resource[] = {
1903 [0] = {
1904 .start = S3C_PA_WDT,
1905 .end = S3C_PA_WDT + SZ_1K,
1906 .flags = IORESOURCE_MEM,
1907 },
1908 [1] = {
1909 .start = IRQ_WDT,
1910 .end = IRQ_WDT,
1911 .flags = IORESOURCE_IRQ,
1912 }
1913};
1914
1915struct platform_device s3c_device_wdt = {
1916 .name = "s3c2410-wdt",
1917 .id = -1,
1918 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1919 .resource = s3c_wdt_resource,
1920};
1921#endif /* CONFIG_S3C_DEV_WDT */