| Dmitry Baryshkov | f024ff1 | 2008-06-27 10:37:57 +0100 | [diff] [blame] | 1 | #ifndef MFD_TMIO_H | 
 | 2 | #define MFD_TMIO_H | 
 | 3 |  | 
| Dmitry Baryshkov | b53cde3 | 2008-10-15 22:03:55 -0700 | [diff] [blame] | 4 | #include <linux/fb.h> | 
| Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 5 | #include <linux/io.h> | 
 | 6 | #include <linux/platform_device.h> | 
| Guennadi Liakhovetski | 7311bef | 2011-05-11 16:51:11 +0000 | [diff] [blame] | 7 | #include <linux/pm_runtime.h> | 
| Dmitry Baryshkov | b53cde3 | 2008-10-15 22:03:55 -0700 | [diff] [blame] | 8 |  | 
| Ian Molton | d3a2f71 | 2008-07-31 20:44:28 +0200 | [diff] [blame] | 9 | #define tmio_ioread8(addr) readb(addr) | 
 | 10 | #define tmio_ioread16(addr) readw(addr) | 
 | 11 | #define tmio_ioread16_rep(r, b, l) readsw(r, b, l) | 
 | 12 | #define tmio_ioread32(addr) \ | 
 | 13 | 	(((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16)) | 
 | 14 |  | 
 | 15 | #define tmio_iowrite8(val, addr) writeb((val), (addr)) | 
 | 16 | #define tmio_iowrite16(val, addr) writew((val), (addr)) | 
 | 17 | #define tmio_iowrite16_rep(r, b, l) writesw(r, b, l) | 
 | 18 | #define tmio_iowrite32(val, addr) \ | 
 | 19 | 	do { \ | 
 | 20 | 	writew((val),       (addr)); \ | 
 | 21 | 	writew((val) >> 16, (addr) + 2); \ | 
 | 22 | 	} while (0) | 
 | 23 |  | 
| Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 24 | #define CNF_CMD     0x04 | 
 | 25 | #define CNF_CTL_BASE   0x10 | 
 | 26 | #define CNF_INT_PIN  0x3d | 
 | 27 | #define CNF_STOP_CLK_CTL 0x40 | 
 | 28 | #define CNF_GCLK_CTL 0x41 | 
 | 29 | #define CNF_SD_CLK_MODE 0x42 | 
 | 30 | #define CNF_PIN_STATUS 0x44 | 
 | 31 | #define CNF_PWR_CTL_1 0x48 | 
 | 32 | #define CNF_PWR_CTL_2 0x49 | 
 | 33 | #define CNF_PWR_CTL_3 0x4a | 
 | 34 | #define CNF_CARD_DETECT_MODE 0x4c | 
 | 35 | #define CNF_SD_SLOT 0x50 | 
 | 36 | #define CNF_EXT_GCLK_CTL_1 0xf0 | 
 | 37 | #define CNF_EXT_GCLK_CTL_2 0xf1 | 
 | 38 | #define CNF_EXT_GCLK_CTL_3 0xf9 | 
 | 39 | #define CNF_SD_LED_EN_1 0xfa | 
 | 40 | #define CNF_SD_LED_EN_2 0xfe | 
 | 41 |  | 
 | 42 | #define   SDCREN 0x2   /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/ | 
 | 43 |  | 
 | 44 | #define sd_config_write8(base, shift, reg, val) \ | 
 | 45 | 	tmio_iowrite8((val), (base) + ((reg) << (shift))) | 
 | 46 | #define sd_config_write16(base, shift, reg, val) \ | 
 | 47 | 	tmio_iowrite16((val), (base) + ((reg) << (shift))) | 
 | 48 | #define sd_config_write32(base, shift, reg, val) \ | 
 | 49 | 	do { \ | 
 | 50 | 		tmio_iowrite16((val), (base) + ((reg) << (shift)));   \ | 
 | 51 | 		tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \ | 
 | 52 | 	} while (0) | 
 | 53 |  | 
| Guennadi Liakhovetski | ac8fb3e | 2010-05-19 18:36:02 +0000 | [diff] [blame] | 54 | /* tmio MMC platform flags */ | 
 | 55 | #define TMIO_MMC_WRPROTECT_DISABLE	(1 << 0) | 
| Yusuke Goda | f1334fb | 2010-08-30 11:50:19 +0100 | [diff] [blame] | 56 | /* | 
 | 57 |  * Some controllers can support a 2-byte block size when the bus width | 
 | 58 |  * is configured in 4-bit mode. | 
 | 59 |  */ | 
 | 60 | #define TMIO_MMC_BLKSZ_2BYTES		(1 << 1) | 
| Arnd Hannemann | 845ecd2 | 2010-12-28 23:22:31 +0100 | [diff] [blame] | 61 | /* | 
 | 62 |  * Some controllers can support SDIO IRQ signalling. | 
 | 63 |  */ | 
 | 64 | #define TMIO_MMC_SDIO_IRQ		(1 << 2) | 
| Guennadi Liakhovetski | 7311bef | 2011-05-11 16:51:11 +0000 | [diff] [blame] | 65 | /* | 
 | 66 |  * Some platforms can detect card insertion events with controller powered | 
 | 67 |  * down, in which case they have to call tmio_mmc_cd_wakeup() to power up the | 
 | 68 |  * controller and report the event to the driver. | 
 | 69 |  */ | 
 | 70 | #define TMIO_MMC_HAS_COLD_CD		(1 << 3) | 
| Guennadi Liakhovetski | ac8fb3e | 2010-05-19 18:36:02 +0000 | [diff] [blame] | 71 |  | 
| Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 72 | int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base); | 
 | 73 | int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base); | 
 | 74 | void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state); | 
 | 75 | void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state); | 
 | 76 |  | 
| Guennadi Liakhovetski | 42a4533 | 2010-05-19 18:34:11 +0000 | [diff] [blame] | 77 | struct tmio_mmc_dma { | 
 | 78 | 	void *chan_priv_tx; | 
 | 79 | 	void *chan_priv_rx; | 
| Guennadi Liakhovetski | 9317305 | 2010-12-22 12:02:15 +0100 | [diff] [blame] | 80 | 	int alignment_shift; | 
| Guennadi Liakhovetski | 42a4533 | 2010-05-19 18:34:11 +0000 | [diff] [blame] | 81 | }; | 
 | 82 |  | 
| Dmitry Baryshkov | f024ff1 | 2008-06-27 10:37:57 +0100 | [diff] [blame] | 83 | /* | 
| Philipp Zabel | f0e46cc | 2009-06-04 20:12:31 +0200 | [diff] [blame] | 84 |  * data for the MMC controller | 
 | 85 |  */ | 
 | 86 | struct tmio_mmc_data { | 
| Magnus Damm | 707f0b2 | 2010-02-17 16:38:14 +0900 | [diff] [blame] | 87 | 	unsigned int			hclk; | 
| Yusuke Goda | b741d44 | 2010-02-17 16:37:55 +0900 | [diff] [blame] | 88 | 	unsigned long			capabilities; | 
| Guennadi Liakhovetski | ac8fb3e | 2010-05-19 18:36:02 +0000 | [diff] [blame] | 89 | 	unsigned long			flags; | 
| Guennadi Liakhovetski | a2b14dc | 2010-05-19 18:37:25 +0000 | [diff] [blame] | 90 | 	u32				ocr_mask;	/* available voltages */ | 
| Guennadi Liakhovetski | 42a4533 | 2010-05-19 18:34:11 +0000 | [diff] [blame] | 91 | 	struct tmio_mmc_dma		*dma; | 
| Guennadi Liakhovetski | 7311bef | 2011-05-11 16:51:11 +0000 | [diff] [blame] | 92 | 	struct device			*dev; | 
 | 93 | 	bool				power; | 
| Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 94 | 	void (*set_pwr)(struct platform_device *host, int state); | 
 | 95 | 	void (*set_clk_div)(struct platform_device *host, int state); | 
| Arnd Hannemann | 19ca750 | 2010-08-24 17:26:59 +0200 | [diff] [blame] | 96 | 	int (*get_cd)(struct platform_device *host); | 
| Philipp Zabel | f0e46cc | 2009-06-04 20:12:31 +0200 | [diff] [blame] | 97 | }; | 
 | 98 |  | 
| Guennadi Liakhovetski | 7311bef | 2011-05-11 16:51:11 +0000 | [diff] [blame] | 99 | static inline void tmio_mmc_cd_wakeup(struct tmio_mmc_data *pdata) | 
 | 100 | { | 
 | 101 | 	if (pdata && !pdata->power) { | 
 | 102 | 		pdata->power = true; | 
 | 103 | 		pm_runtime_get(pdata->dev); | 
 | 104 | 	} | 
 | 105 | } | 
 | 106 |  | 
| Philipp Zabel | f0e46cc | 2009-06-04 20:12:31 +0200 | [diff] [blame] | 107 | /* | 
| Dmitry Baryshkov | f024ff1 | 2008-06-27 10:37:57 +0100 | [diff] [blame] | 108 |  * data for the NAND controller | 
 | 109 |  */ | 
 | 110 | struct tmio_nand_data { | 
 | 111 | 	struct nand_bbt_descr	*badblock_pattern; | 
 | 112 | 	struct mtd_partition	*partition; | 
 | 113 | 	unsigned int		num_partitions; | 
 | 114 | }; | 
 | 115 |  | 
| Dmitry Baryshkov | b53cde3 | 2008-10-15 22:03:55 -0700 | [diff] [blame] | 116 | #define FBIO_TMIO_ACC_WRITE	0x7C639300 | 
 | 117 | #define FBIO_TMIO_ACC_SYNC	0x7C639301 | 
 | 118 |  | 
 | 119 | struct tmio_fb_data { | 
 | 120 | 	int			(*lcd_set_power)(struct platform_device *fb_dev, | 
 | 121 | 								bool on); | 
 | 122 | 	int			(*lcd_mode)(struct platform_device *fb_dev, | 
 | 123 | 					const struct fb_videomode *mode); | 
 | 124 | 	int			num_modes; | 
 | 125 | 	struct fb_videomode	*modes; | 
 | 126 |  | 
 | 127 | 	/* in mm: size of screen */ | 
 | 128 | 	int			height; | 
 | 129 | 	int			width; | 
 | 130 | }; | 
 | 131 |  | 
 | 132 |  | 
| Dmitry Baryshkov | f024ff1 | 2008-06-27 10:37:57 +0100 | [diff] [blame] | 133 | #endif |