blob: 57ce7c0ffcd78971a03f8600652eafdb8ed070be [file] [log] [blame]
Kiran Kumar H Ndd128472011-12-01 09:35:34 -08001/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070013#ifndef __LINUX_MSM_CAMERA_H
14#define __LINUX_MSM_CAMERA_H
15
16#ifdef MSM_CAMERA_BIONIC
17#include <sys/types.h>
18#endif
19#include <linux/types.h>
20#include <linux/ioctl.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070021#ifdef __KERNEL__
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/cdev.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070023#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#ifdef MSM_CAMERA_GCC
25#include <time.h>
26#else
27#include <linux/time.h>
28#endif
29
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -070030#include <linux/ion.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070031
Nishant Pandit5dd54422012-06-26 22:52:44 +053032#define BIT(nr) (1UL << (nr))
33
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070034#define MSM_CAM_IOCTL_MAGIC 'm'
35
36#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
37 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
38
39#define MSM_CAM_IOCTL_REGISTER_PMEM \
40 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
41
42#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
43 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
44
45#define MSM_CAM_IOCTL_CTRL_COMMAND \
46 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
47
48#define MSM_CAM_IOCTL_CONFIG_VFE \
49 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
50
51#define MSM_CAM_IOCTL_GET_STATS \
52 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
53
54#define MSM_CAM_IOCTL_GETFRAME \
55 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
56
57#define MSM_CAM_IOCTL_ENABLE_VFE \
58 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
59
60#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
61 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
62
63#define MSM_CAM_IOCTL_CONFIG_CMD \
64 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
65
66#define MSM_CAM_IOCTL_DISABLE_VFE \
67 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
68
69#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
70 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
71
72#define MSM_CAM_IOCTL_VFE_APPS_RESET \
73 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
74
75#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
76 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
77
78#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
79 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
80
81#define MSM_CAM_IOCTL_AXI_CONFIG \
82 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
83
84#define MSM_CAM_IOCTL_GET_PICTURE \
85 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
86
87#define MSM_CAM_IOCTL_SET_CROP \
88 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
89
90#define MSM_CAM_IOCTL_PICT_PP \
91 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
92
93#define MSM_CAM_IOCTL_PICT_PP_DONE \
94 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
95
96#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
97 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
98
99#define MSM_CAM_IOCTL_FLASH_LED_CFG \
100 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
101
102#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
103 _IO(MSM_CAM_IOCTL_MAGIC, 23)
104
105#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
106 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
107
108#define MSM_CAM_IOCTL_AF_CTRL \
109 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
110
111#define MSM_CAM_IOCTL_AF_CTRL_DONE \
112 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
113
114#define MSM_CAM_IOCTL_CONFIG_VPE \
115 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
116
117#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
118 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
119
120#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
121 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
122
123#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
124 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
125
126#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
127 _IO(MSM_CAM_IOCTL_MAGIC, 31)
128
129#define MSM_CAM_IOCTL_FLASH_CTRL \
130 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
131
132#define MSM_CAM_IOCTL_ERROR_CONFIG \
133 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
134
135#define MSM_CAM_IOCTL_ABORT_CAPTURE \
136 _IO(MSM_CAM_IOCTL_MAGIC, 34)
137
138#define MSM_CAM_IOCTL_SET_FD_ROI \
139 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
140
141#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
142 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
143
144#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
145 _IO(MSM_CAM_IOCTL_MAGIC, 37)
146
147#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
148 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
149
150#define MSM_CAM_IOCTL_PUT_ST_FRAME \
151 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
152
Mansoor Aftab5d418372011-07-26 17:01:26 -0700153#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
Kevin Chan94b4c832012-03-02 21:27:16 -0800154 _IOR(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event *)
Mansoor Aftab5d418372011-07-26 17:01:26 -0700155
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700156#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800157 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *)
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700158
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700159#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
Kevin Chan94b4c832012-03-02 21:27:16 -0800160 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *)
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700161
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700162#define MSM_CAM_IOCTL_MCTL_POST_PROC \
Kevin Chan94b4c832012-03-02 21:27:16 -0800163 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700164
165#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800166 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700167
168#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800169 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700170
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800171#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800172 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *)
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800173
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800174#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800175 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800176
177#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800178 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800179
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800180#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800181 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *)
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800182
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800183#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800184 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800185
186#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800187 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800188
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800189#define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800190 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *)
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800191
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700192#define MSM_CAM_IOCTL_EEPROM_IO_CFG \
193 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *)
194
Nishant Panditb2157c92012-04-25 01:09:28 +0530195#define MSM_CAM_IOCTL_ISPIF_IO_CFG \
196 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *)
197
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700198#define MSM_CAM_IOCTL_STATS_REQBUF \
199 _IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *)
200
201#define MSM_CAM_IOCTL_STATS_ENQUEUEBUF \
202 _IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *)
203
204#define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ \
205 _IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *)
206
Ankit Premrajka4b3443f2012-06-11 14:06:31 -0700207#define MSM_CAM_IOCTL_SET_MCTL_SDEV \
208 _IOW(MSM_CAM_IOCTL_MAGIC, 58, struct msm_mctl_set_sdev_data *)
209
210#define MSM_CAM_IOCTL_UNSET_MCTL_SDEV \
211 _IOW(MSM_CAM_IOCTL_MAGIC, 59, struct msm_mctl_set_sdev_data *)
212
Kiran Kumar H N90785902012-07-05 13:59:38 -0700213#define MSM_CAM_IOCTL_GET_INST_HANDLE \
214 _IOR(MSM_CAM_IOCTL_MAGIC, 60, uint32_t *)
215
Lakshmi Narayana Kalavala58243db2012-07-24 00:06:27 -0700216#define MSM_CAM_IOCTL_STATS_UNREG_BUF \
217 _IOR(MSM_CAM_IOCTL_MAGIC, 61, struct msm_stats_flush_bufq *)
218
219
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700220struct msm_stats_reqbuf {
221 int num_buf; /* how many buffers requested */
222 int stats_type; /* stats type */
223};
224
225struct msm_stats_flush_bufq {
226 int stats_type; /* enum msm_stats_enum_type */
227};
228
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700229struct msm_mctl_pp_cmd {
230 int32_t id;
231 uint16_t length;
232 void *value;
233};
234
235struct msm_mctl_post_proc_cmd {
236 int32_t type;
237 struct msm_mctl_pp_cmd cmd;
238};
239
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700240#define MSM_CAMERA_LED_OFF 0
241#define MSM_CAMERA_LED_LOW 1
242#define MSM_CAMERA_LED_HIGH 2
Nishant Pandit474f2252011-07-23 23:17:56 +0530243#define MSM_CAMERA_LED_INIT 3
244#define MSM_CAMERA_LED_RELEASE 4
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700245
246#define MSM_CAMERA_STROBE_FLASH_NONE 0
247#define MSM_CAMERA_STROBE_FLASH_XENON 1
248
249#define MSM_MAX_CAMERA_SENSORS 5
250#define MAX_SENSOR_NAME 32
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800251#define MAX_CAM_NAME_SIZE 32
252#define MAX_ACT_MOD_NAME_SIZE 32
253#define MAX_ACT_NAME_SIZE 32
254#define NUM_ACTUATOR_DIR 2
255#define MAX_ACTUATOR_SCENARIO 8
256#define MAX_ACTUATOR_REGION 5
257#define MAX_ACTUATOR_INIT_SET 12
258#define MAX_ACTUATOR_TYPE_SIZE 32
259#define MAX_ACTUATOR_REG_TBL_SIZE 8
260
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700261
262#define MSM_MAX_CAMERA_CONFIGS 2
263
264#define PP_SNAP 0x01
265#define PP_RAW_SNAP ((0x01)<<1)
266#define PP_PREV ((0x01)<<2)
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800267#define PP_THUMB ((0x01)<<3)
268#define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700269
270#define MSM_CAM_CTRL_CMD_DONE 0
271#define MSM_CAM_SENSOR_VFE_CMD 1
272
Kiran Kumar H Nceea7622011-08-23 14:01:03 -0700273/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
274#define MAX_PLANES 8
275
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700276/*****************************************************
277 * structure
278 *****************************************************/
279
280/* define five type of structures for userspace <==> kernel
281 * space communication:
282 * command 1 - 2 are from userspace ==> kernel
283 * command 3 - 4 are from kernel ==> userspace
284 *
285 * 1. control command: control command(from control thread),
286 * control status (from config thread);
287 */
288struct msm_ctrl_cmd {
289 uint16_t type;
290 uint16_t length;
291 void *value;
292 uint16_t status;
293 uint32_t timeout_ms;
294 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
295 int vnode_id; /* video dev id. Can we overload resp_fd? */
Kevin Chan94b4c832012-03-02 21:27:16 -0800296 int queue_idx;
297 uint32_t evt_id;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700298 uint32_t stream_type; /* used to pass value to qcamera server */
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -0700299 int config_ident; /*used as identifier for config node*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700300};
301
302struct msm_cam_evt_msg {
303 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */
304 unsigned short msg_id;
305 unsigned int len; /* size in, number of bytes out */
306 uint32_t frame_id;
307 void *data;
Ninad Mahimkaree55c192012-04-25 14:36:17 -0700308 struct timespec timestamp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700309};
310
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700311struct msm_pp_frame_sp {
312 /* phy addr of the buffer */
313 unsigned long phy_addr;
314 uint32_t y_off;
315 uint32_t cbcr_off;
316 /* buffer length */
317 uint32_t length;
318 int32_t fd;
319 uint32_t addr_offset;
320 /* mapped addr */
321 unsigned long vaddr;
322};
323
324struct msm_pp_frame_mp {
325 /* phy addr of the plane */
326 unsigned long phy_addr;
327 /* offset of plane data */
328 uint32_t data_offset;
329 /* plane length */
330 uint32_t length;
331 int32_t fd;
332 uint32_t addr_offset;
333 /* mapped addr */
334 unsigned long vaddr;
335};
336
337struct msm_pp_frame {
338 uint32_t handle; /* stores vb cookie */
339 uint32_t frame_id;
Kevin Chan318d7cb2011-11-29 14:24:26 -0800340 unsigned short buf_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700341 int path;
342 unsigned short image_type;
343 unsigned short num_planes; /* 1 for sp */
344 struct timeval timestamp;
345 union {
346 struct msm_pp_frame_sp sp;
347 struct msm_pp_frame_mp mp[MAX_PLANES];
348 };
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800349 int node_type;
Kiran Kumar H N90785902012-07-05 13:59:38 -0700350 uint32_t inst_handle;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700351};
352
Mingcheng Zhu49505502011-07-19 20:44:36 -0700353struct msm_cam_evt_divert_frame {
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700354 unsigned short image_mode;
355 unsigned short op_mode;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700356 unsigned short inst_idx;
357 unsigned short node_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700358 struct msm_pp_frame frame;
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700359 int do_pp;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700360};
361
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700362struct msm_mctl_pp_cmd_ack_event {
363 uint32_t cmd; /* VPE_CMD_ZOOM? */
364 int status; /* 0 done, < 0 err */
365 uint32_t cookie; /* daemon's cookie */
366};
367
368struct msm_mctl_pp_event_info {
369 int32_t event;
370 union {
371 struct msm_mctl_pp_cmd_ack_event ack;
372 };
373};
374
375struct msm_isp_event_ctrl {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700376 unsigned short resptype;
377 union {
378 struct msm_cam_evt_msg isp_msg;
379 struct msm_ctrl_cmd ctrl;
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700380 struct msm_cam_evt_divert_frame div_frame;
381 struct msm_mctl_pp_event_info pp_event_info;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700382 } isp_data;
383};
384
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700385#define MSM_CAM_RESP_CTRL 0
386#define MSM_CAM_RESP_STAT_EVT_MSG 1
387#define MSM_CAM_RESP_STEREO_OP_1 2
388#define MSM_CAM_RESP_STEREO_OP_2 3
389#define MSM_CAM_RESP_V4L2 4
Mingcheng Zhu49505502011-07-19 20:44:36 -0700390#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700391#define MSM_CAM_RESP_DONE_EVENT 6
392#define MSM_CAM_RESP_MCTL_PP_EVENT 7
393#define MSM_CAM_RESP_MAX 8
Mingcheng Zhu49505502011-07-19 20:44:36 -0700394
Mingcheng Zhu270813a2011-08-10 17:23:18 -0700395#define MSM_CAM_APP_NOTIFY_EVENT 0
Kevin Chan4bb6ead2012-02-29 01:01:41 -0800396#define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700397
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700398/* this one is used to send ctrl/status up to config thread */
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700399
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700400struct msm_stats_event_ctrl {
401 /* 0 - ctrl_cmd from control thread,
402 * 1 - stats/event kernel,
403 * 2 - V4L control or read request */
404 int resptype;
405 int timeout_ms;
406 struct msm_ctrl_cmd ctrl_cmd;
407 /* struct vfe_event_t stats_event; */
408 struct msm_cam_evt_msg stats_event;
409};
410
411/* 2. config command: config command(from config thread); */
412struct msm_camera_cfg_cmd {
413 /* what to config:
414 * 1 - sensor config, 2 - vfe config */
415 uint16_t cfg_type;
416
417 /* sensor config type */
418 uint16_t cmd_type;
419 uint16_t queue;
420 uint16_t length;
421 void *value;
422};
423
424#define CMD_GENERAL 0
425#define CMD_AXI_CFG_OUT1 1
426#define CMD_AXI_CFG_SNAP_O1_AND_O2 2
427#define CMD_AXI_CFG_OUT2 3
428#define CMD_PICT_T_AXI_CFG 4
429#define CMD_PICT_M_AXI_CFG 5
430#define CMD_RAW_PICT_AXI_CFG 6
431
432#define CMD_FRAME_BUF_RELEASE 7
433#define CMD_PREV_BUF_CFG 8
434#define CMD_SNAP_BUF_RELEASE 9
435#define CMD_SNAP_BUF_CFG 10
436#define CMD_STATS_DISABLE 11
437#define CMD_STATS_AEC_AWB_ENABLE 12
438#define CMD_STATS_AF_ENABLE 13
439#define CMD_STATS_AEC_ENABLE 14
440#define CMD_STATS_AWB_ENABLE 15
441#define CMD_STATS_ENABLE 16
442
443#define CMD_STATS_AXI_CFG 17
444#define CMD_STATS_AEC_AXI_CFG 18
445#define CMD_STATS_AF_AXI_CFG 19
446#define CMD_STATS_AWB_AXI_CFG 20
447#define CMD_STATS_RS_AXI_CFG 21
448#define CMD_STATS_CS_AXI_CFG 22
449#define CMD_STATS_IHIST_AXI_CFG 23
450#define CMD_STATS_SKIN_AXI_CFG 24
451
452#define CMD_STATS_BUF_RELEASE 25
453#define CMD_STATS_AEC_BUF_RELEASE 26
454#define CMD_STATS_AF_BUF_RELEASE 27
455#define CMD_STATS_AWB_BUF_RELEASE 28
456#define CMD_STATS_RS_BUF_RELEASE 29
457#define CMD_STATS_CS_BUF_RELEASE 30
458#define CMD_STATS_IHIST_BUF_RELEASE 31
459#define CMD_STATS_SKIN_BUF_RELEASE 32
460
461#define UPDATE_STATS_INVALID 33
462#define CMD_AXI_CFG_SNAP_GEMINI 34
463#define CMD_AXI_CFG_SNAP 35
464#define CMD_AXI_CFG_PREVIEW 36
465#define CMD_AXI_CFG_VIDEO 37
466
467#define CMD_STATS_IHIST_ENABLE 38
468#define CMD_STATS_RS_ENABLE 39
469#define CMD_STATS_CS_ENABLE 40
470#define CMD_VPE 41
471#define CMD_AXI_CFG_VPE 42
472#define CMD_AXI_CFG_ZSL 43
473#define CMD_AXI_CFG_SNAP_VPE 44
474#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700475
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530476#define CMD_CONFIG_PING_ADDR 46
477#define CMD_CONFIG_PONG_ADDR 47
478#define CMD_CONFIG_FREE_BUF_ADDR 48
479#define CMD_AXI_CFG_ZSL_ALL_CHNLS 49
480#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50
Suresh Vankadara055cb8e2012-01-18 00:50:04 +0530481#define CMD_VFE_BUFFER_RELEASE 51
Kevin Chancf264862012-04-19 19:10:38 -0700482#define CMD_VFE_PROCESS_IRQ 52
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700483#define CMD_STATS_BG_ENABLE 53
484#define CMD_STATS_BF_ENABLE 54
485#define CMD_STATS_BHIST_ENABLE 55
486#define CMD_STATS_BG_BUF_RELEASE 56
487#define CMD_STATS_BF_BUF_RELEASE 57
488#define CMD_STATS_BHIST_BUF_RELEASE 58
489
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700490
Nishant Pandit5dd54422012-06-26 22:52:44 +0530491#define CMD_AXI_CFG_PRIM BIT(8)
492#define CMD_AXI_CFG_PRIM_ALL_CHNLS BIT(9)
493#define CMD_AXI_CFG_SEC BIT(10)
494#define CMD_AXI_CFG_SEC_ALL_CHNLS BIT(11)
495#define CMD_AXI_CFG_TERT1 BIT(12)
496#define CMD_AXI_CFG_TERT2 BIT(13)
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800497
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700498#define CMD_AXI_START 0xE1
499#define CMD_AXI_STOP 0xE2
500
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700501/* vfe config command: config command(from config thread)*/
502struct msm_vfe_cfg_cmd {
503 int cmd_type;
504 uint16_t length;
505 void *value;
506};
507
508struct msm_vpe_cfg_cmd {
509 int cmd_type;
510 uint16_t length;
511 void *value;
512};
513
514#define MAX_CAMERA_ENABLE_NAME_LEN 32
515struct camera_enable_cmd {
516 char name[MAX_CAMERA_ENABLE_NAME_LEN];
517};
518
519#define MSM_PMEM_OUTPUT1 0
520#define MSM_PMEM_OUTPUT2 1
521#define MSM_PMEM_OUTPUT1_OUTPUT2 2
522#define MSM_PMEM_THUMBNAIL 3
523#define MSM_PMEM_MAINIMG 4
524#define MSM_PMEM_RAW_MAINIMG 5
525#define MSM_PMEM_AEC_AWB 6
526#define MSM_PMEM_AF 7
527#define MSM_PMEM_AEC 8
528#define MSM_PMEM_AWB 9
529#define MSM_PMEM_RS 10
530#define MSM_PMEM_CS 11
531#define MSM_PMEM_IHIST 12
532#define MSM_PMEM_SKIN 13
533#define MSM_PMEM_VIDEO 14
534#define MSM_PMEM_PREVIEW 15
535#define MSM_PMEM_VIDEO_VPE 16
536#define MSM_PMEM_C2D 17
537#define MSM_PMEM_MAINIMG_VPE 18
538#define MSM_PMEM_THUMBNAIL_VPE 19
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700539#define MSM_PMEM_BAYER_GRID 20
540#define MSM_PMEM_BAYER_FOCUS 21
541#define MSM_PMEM_BAYER_HIST 22
542#define MSM_PMEM_MAX 23
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700543
544#define STAT_AEAW 0
545#define STAT_AEC 1
546#define STAT_AF 2
547#define STAT_AWB 3
548#define STAT_RS 4
549#define STAT_CS 5
550#define STAT_IHIST 6
551#define STAT_SKIN 7
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700552#define STAT_BG 8
553#define STAT_BF 9
554#define STAT_BHIST 10
555#define STAT_MAX 11
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700556
557#define FRAME_PREVIEW_OUTPUT1 0
558#define FRAME_PREVIEW_OUTPUT2 1
559#define FRAME_SNAPSHOT 2
560#define FRAME_THUMBNAIL 3
561#define FRAME_RAW_SNAPSHOT 4
562#define FRAME_MAX 5
563
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700564enum msm_stats_enum_type {
565 MSM_STATS_TYPE_AEC, /* legacy based AEC */
566 MSM_STATS_TYPE_AF, /* legacy based AF */
567 MSM_STATS_TYPE_AWB, /* legacy based AWB */
568 MSM_STATS_TYPE_RS, /* legacy based RS */
569 MSM_STATS_TYPE_CS, /* legacy based CS */
570 MSM_STATS_TYPE_IHIST, /* legacy based HIST */
571 MSM_STATS_TYPE_SKIN, /* legacy based SKIN */
572 MSM_STATS_TYPE_BG, /* Bayer Grids */
573 MSM_STATS_TYPE_BF, /* Bayer Focus */
574 MSM_STATS_TYPE_BHIST, /* Bayer Hist */
575 MSM_STATS_TYPE_AE_AW, /* legacy stats for vfe 2.x*/
576 MSM_STATS_TYPE_MAX /* MAX */
577};
578
579struct msm_stats_buf_info {
580 int type; /* msm_stats_enum_type */
581 int fd;
582 void *vaddr;
583 uint32_t offset;
584 uint32_t len;
585 uint32_t y_off;
586 uint32_t cbcr_off;
587 uint32_t planar0_off;
588 uint32_t planar1_off;
589 uint32_t planar2_off;
590 uint8_t active;
591 int buf_idx;
592};
593
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700594struct msm_pmem_info {
595 int type;
596 int fd;
597 void *vaddr;
598 uint32_t offset;
599 uint32_t len;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700600 uint32_t y_off;
601 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530602 uint32_t planar0_off;
603 uint32_t planar1_off;
604 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700605 uint8_t active;
606};
607
608struct outputCfg {
609 uint32_t height;
610 uint32_t width;
611
612 uint32_t window_height_firstline;
613 uint32_t window_height_lastline;
614};
615
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800616#define VIDEO_NODE 0
617#define MCTL_NODE 1
618
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700619#define OUTPUT_1 0
620#define OUTPUT_2 1
621#define OUTPUT_1_AND_2 2 /* snapshot only */
622#define OUTPUT_1_AND_3 3 /* video */
623#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
624#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
625#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
626#define OUTPUT_1_2_AND_3 7
Kiran Kumar H N4cff94a2011-10-17 11:37:33 -0700627#define OUTPUT_ALL_CHNLS 8
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530628#define OUTPUT_VIDEO_ALL_CHNLS 9
629#define OUTPUT_ZSL_ALL_CHNLS 10
630#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700631
Nishant Pandit5dd54422012-06-26 22:52:44 +0530632#define OUTPUT_PRIM BIT(8)
633#define OUTPUT_PRIM_ALL_CHNLS BIT(9)
634#define OUTPUT_SEC BIT(10)
635#define OUTPUT_SEC_ALL_CHNLS BIT(11)
636#define OUTPUT_TERT1 BIT(12)
637#define OUTPUT_TERT2 BIT(13)
638
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800639
640
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700641#define MSM_FRAME_PREV_1 0
642#define MSM_FRAME_PREV_2 1
643#define MSM_FRAME_ENC 2
644
Nishant Pandit5dd54422012-06-26 22:52:44 +0530645#define OUTPUT_TYPE_P BIT(0)
646#define OUTPUT_TYPE_T BIT(1)
647#define OUTPUT_TYPE_S BIT(2)
648#define OUTPUT_TYPE_V BIT(3)
649#define OUTPUT_TYPE_L BIT(4)
650#define OUTPUT_TYPE_ST_L BIT(5)
651#define OUTPUT_TYPE_ST_R BIT(6)
652#define OUTPUT_TYPE_ST_D BIT(7)
653#define OUTPUT_TYPE_R BIT(8)
654#define OUTPUT_TYPE_R1 BIT(9)
655
656
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700657
658struct fd_roi_info {
659 void *info;
660 int info_len;
661};
662
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700663struct msm_mem_map_info {
664 uint32_t cookie;
665 uint32_t length;
Mingcheng Zhufe7abc02011-08-09 13:27:39 -0700666 uint32_t mem_type;
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700667};
668
Mingcheng Zhu49505502011-07-19 20:44:36 -0700669#define MSM_MEM_MMAP 0
670#define MSM_MEM_USERPTR 1
671#define MSM_PLANE_MAX 8
672#define MSM_PLANE_Y 0
673#define MSM_PLANE_UV 1
674
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700675struct msm_frame {
676 struct timespec ts;
677 int path;
678 int type;
679 unsigned long buffer;
680 uint32_t phy_offset;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700681 uint32_t y_off;
682 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530683 uint32_t planar0_off;
684 uint32_t planar1_off;
685 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700686 int fd;
687
688 void *cropinfo;
689 int croplen;
690 uint32_t error_code;
691 struct fd_roi_info roi_info;
692 uint32_t frame_id;
693 int stcam_quality_ind;
694 uint32_t stcam_conv_value;
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -0700695
696 struct ion_allocation_data ion_alloc;
697 struct ion_fd_data fd_data;
Ankit Premrajkae2c9c0b2012-06-07 17:18:25 -0700698 int ion_dev_fd;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700699};
700
701enum msm_st_frame_packing {
702 SIDE_BY_SIDE_HALF,
703 SIDE_BY_SIDE_FULL,
704 TOP_DOWN_HALF,
705 TOP_DOWN_FULL,
706};
707
708struct msm_st_crop {
709 uint32_t in_w;
710 uint32_t in_h;
711 uint32_t out_w;
712 uint32_t out_h;
713};
714
715struct msm_st_half {
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530716 uint32_t buf_p0_off;
717 uint32_t buf_p1_off;
718 uint32_t buf_p0_stride;
719 uint32_t buf_p1_stride;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700720 uint32_t pix_x_off;
721 uint32_t pix_y_off;
722 struct msm_st_crop stCropInfo;
723};
724
725struct msm_st_frame {
726 struct msm_frame buf_info;
727 int type;
728 enum msm_st_frame_packing packing;
729 struct msm_st_half L;
730 struct msm_st_half R;
731 int frame_id;
732};
733
734#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
735
736struct stats_buff {
737 unsigned long buff;
738 int fd;
739};
740
741struct msm_stats_buf {
Lakshmi Narayana Kalavala4ab97a92011-07-26 15:30:14 -0700742 uint8_t awb_ymin;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700743 struct stats_buff aec;
744 struct stats_buff awb;
745 struct stats_buff af;
746 struct stats_buff ihist;
747 struct stats_buff rs;
748 struct stats_buff cs;
749 struct stats_buff skin;
750 int type;
751 uint32_t status_bits;
752 unsigned long buffer;
753 int fd;
Ankit Premrajka073e0ca2012-03-06 12:26:08 -0800754 int length;
755 struct ion_handle *handle;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700756 uint32_t frame_id;
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700757 int buf_idx;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700758};
759#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
760/* video capture mode in VIDIOC_S_PARM */
761#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
762 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
763/* extendedmode for video recording in VIDIOC_S_PARM */
764#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
765 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
766/* extendedmode for the full size main image in VIDIOC_S_PARM */
767#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
768/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
769#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
770 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
771#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
772 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
Nishant Pandit5dd54422012-06-26 22:52:44 +0530773#define MSM_V4L2_EXT_CAPTURE_MODE_RDI \
774 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
775#define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \
776 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7)
777#define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \
778 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8)
779#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700780
781
782#define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE
783#define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1)
784#define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2)
785#define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3)
786#define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4)
787#define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5)
788#define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6)
789#define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7)
790#define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8)
791#define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9)
792#define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10)
793#define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11)
794#define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12)
795#define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13)
796#define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700797#define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15)
Kiran Kumar H N90785902012-07-05 13:59:38 -0700798#define MSM_V4L2_PID_INST_HANDLE (V4L2_CID_PRIVATE_BASE+16)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700799#define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800800#define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18)
801#define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700802
803/* camera operation mode for video recording - two frame output queues */
804#define MSM_V4L2_CAM_OP_DEFAULT 0
805/* camera operation mode for video recording - two frame output queues */
806#define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1)
807/* camera operation mode for video recording - two frame output queues */
808#define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2)
809/* camera operation mode for standard shapshot - two frame output queues */
810#define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3)
811/* camera operation mode for zsl shapshot - three output queues */
812#define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4)
813/* camera operation mode for raw snapshot - one frame output queue */
814#define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5)
Jignesh Mehta6cf8a742012-02-04 23:40:50 -0800815/* camera operation mode for jpeg snapshot - one frame output queue */
816#define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6)
817
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700818
819#define MSM_V4L2_VID_CAP_TYPE 0
820#define MSM_V4L2_STREAM_ON 1
821#define MSM_V4L2_STREAM_OFF 2
822#define MSM_V4L2_SNAPSHOT 3
823#define MSM_V4L2_QUERY_CTRL 4
824#define MSM_V4L2_GET_CTRL 5
825#define MSM_V4L2_SET_CTRL 6
826#define MSM_V4L2_QUERY 7
827#define MSM_V4L2_GET_CROP 8
828#define MSM_V4L2_SET_CROP 9
829#define MSM_V4L2_OPEN 10
830#define MSM_V4L2_CLOSE 11
831#define MSM_V4L2_SET_CTRL_CMD 12
832#define MSM_V4L2_EVT_SUB_MASK 13
833#define MSM_V4L2_MAX 14
834#define V4L2_CAMERA_EXIT 43
835
836struct crop_info {
837 void *info;
838 int len;
839};
840
841struct msm_postproc {
842 int ftnum;
843 struct msm_frame fthumnail;
844 int fmnum;
845 struct msm_frame fmain;
846};
847
848struct msm_snapshot_pp_status {
849 void *status;
850};
851
852#define CFG_SET_MODE 0
853#define CFG_SET_EFFECT 1
854#define CFG_START 2
855#define CFG_PWR_UP 3
856#define CFG_PWR_DOWN 4
857#define CFG_WRITE_EXPOSURE_GAIN 5
858#define CFG_SET_DEFAULT_FOCUS 6
859#define CFG_MOVE_FOCUS 7
860#define CFG_REGISTER_TO_REAL_GAIN 8
861#define CFG_REAL_TO_REGISTER_GAIN 9
862#define CFG_SET_FPS 10
863#define CFG_SET_PICT_FPS 11
864#define CFG_SET_BRIGHTNESS 12
865#define CFG_SET_CONTRAST 13
866#define CFG_SET_ZOOM 14
867#define CFG_SET_EXPOSURE_MODE 15
868#define CFG_SET_WB 16
869#define CFG_SET_ANTIBANDING 17
870#define CFG_SET_EXP_GAIN 18
871#define CFG_SET_PICT_EXP_GAIN 19
872#define CFG_SET_LENS_SHADING 20
873#define CFG_GET_PICT_FPS 21
874#define CFG_GET_PREV_L_PF 22
875#define CFG_GET_PREV_P_PL 23
876#define CFG_GET_PICT_L_PF 24
877#define CFG_GET_PICT_P_PL 25
878#define CFG_GET_AF_MAX_STEPS 26
879#define CFG_GET_PICT_MAX_EXP_LC 27
880#define CFG_SEND_WB_INFO 28
881#define CFG_SENSOR_INIT 29
882#define CFG_GET_3D_CALI_DATA 30
883#define CFG_GET_CALIB_DATA 31
Kevin Chana980f392011-08-01 20:55:00 -0700884#define CFG_GET_OUTPUT_INFO 32
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700885#define CFG_GET_EEPROM_INFO 33
886#define CFG_GET_EEPROM_DATA 34
887#define CFG_SET_ACTUATOR_INFO 35
888#define CFG_GET_ACTUATOR_INFO 36
Su Liu6c3bb322012-02-14 02:15:05 +0530889/* TBD: QRD */
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700890#define CFG_SET_SATURATION 37
891#define CFG_SET_SHARPNESS 38
892#define CFG_SET_TOUCHAEC 39
893#define CFG_SET_AUTO_FOCUS 40
894#define CFG_SET_AUTOFLASH 41
895#define CFG_SET_EXPOSURE_COMPENSATION 42
896#define CFG_SET_ISO 43
Nishant Panditb2157c92012-04-25 01:09:28 +0530897#define CFG_START_STREAM 44
898#define CFG_STOP_STREAM 45
899#define CFG_GET_CSI_PARAMS 46
900#define CFG_MAX 47
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700901
902
903#define MOVE_NEAR 0
904#define MOVE_FAR 1
905
906#define SENSOR_PREVIEW_MODE 0
907#define SENSOR_SNAPSHOT_MODE 1
908#define SENSOR_RAW_SNAPSHOT_MODE 2
909#define SENSOR_HFR_60FPS_MODE 3
910#define SENSOR_HFR_90FPS_MODE 4
911#define SENSOR_HFR_120FPS_MODE 5
912
913#define SENSOR_QTR_SIZE 0
914#define SENSOR_FULL_SIZE 1
915#define SENSOR_QVGA_SIZE 2
916#define SENSOR_INVALID_SIZE 3
917
918#define CAMERA_EFFECT_OFF 0
919#define CAMERA_EFFECT_MONO 1
920#define CAMERA_EFFECT_NEGATIVE 2
921#define CAMERA_EFFECT_SOLARIZE 3
922#define CAMERA_EFFECT_SEPIA 4
923#define CAMERA_EFFECT_POSTERIZE 5
924#define CAMERA_EFFECT_WHITEBOARD 6
925#define CAMERA_EFFECT_BLACKBOARD 7
926#define CAMERA_EFFECT_AQUA 8
Yonggui Maoc0055a12011-09-29 19:31:47 -0700927#define CAMERA_EFFECT_EMBOSS 9
928#define CAMERA_EFFECT_SKETCH 10
929#define CAMERA_EFFECT_NEON 11
930#define CAMERA_EFFECT_MAX 12
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700931
Taniya Dasa9bdb012011-09-08 11:21:33 +0530932/* QRD */
933#define CAMERA_EFFECT_BW 10
934#define CAMERA_EFFECT_BLUISH 12
935#define CAMERA_EFFECT_REDDISH 13
936#define CAMERA_EFFECT_GREENISH 14
937
938/* QRD */
939#define CAMERA_ANTIBANDING_OFF 0
940#define CAMERA_ANTIBANDING_50HZ 2
941#define CAMERA_ANTIBANDING_60HZ 1
942#define CAMERA_ANTIBANDING_AUTO 3
943
944#define CAMERA_CONTRAST_LV0 0
945#define CAMERA_CONTRAST_LV1 1
946#define CAMERA_CONTRAST_LV2 2
947#define CAMERA_CONTRAST_LV3 3
948#define CAMERA_CONTRAST_LV4 4
949#define CAMERA_CONTRAST_LV5 5
950#define CAMERA_CONTRAST_LV6 6
951#define CAMERA_CONTRAST_LV7 7
952#define CAMERA_CONTRAST_LV8 8
953#define CAMERA_CONTRAST_LV9 9
954
955#define CAMERA_BRIGHTNESS_LV0 0
956#define CAMERA_BRIGHTNESS_LV1 1
957#define CAMERA_BRIGHTNESS_LV2 2
958#define CAMERA_BRIGHTNESS_LV3 3
959#define CAMERA_BRIGHTNESS_LV4 4
960#define CAMERA_BRIGHTNESS_LV5 5
961#define CAMERA_BRIGHTNESS_LV6 6
962#define CAMERA_BRIGHTNESS_LV7 7
963#define CAMERA_BRIGHTNESS_LV8 8
964
965
966#define CAMERA_SATURATION_LV0 0
967#define CAMERA_SATURATION_LV1 1
968#define CAMERA_SATURATION_LV2 2
969#define CAMERA_SATURATION_LV3 3
970#define CAMERA_SATURATION_LV4 4
971#define CAMERA_SATURATION_LV5 5
972#define CAMERA_SATURATION_LV6 6
973#define CAMERA_SATURATION_LV7 7
974#define CAMERA_SATURATION_LV8 8
975
976#define CAMERA_SHARPNESS_LV0 0
977#define CAMERA_SHARPNESS_LV1 3
978#define CAMERA_SHARPNESS_LV2 6
979#define CAMERA_SHARPNESS_LV3 9
980#define CAMERA_SHARPNESS_LV4 12
981#define CAMERA_SHARPNESS_LV5 15
982#define CAMERA_SHARPNESS_LV6 18
983#define CAMERA_SHARPNESS_LV7 21
984#define CAMERA_SHARPNESS_LV8 24
985#define CAMERA_SHARPNESS_LV9 27
986#define CAMERA_SHARPNESS_LV10 30
987
988#define CAMERA_SETAE_AVERAGE 0
989#define CAMERA_SETAE_CENWEIGHT 1
990
Taniya Dasa9bdb012011-09-08 11:21:33 +0530991#define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */
992#define CAMERA_WB_CUSTOM 2
993#define CAMERA_WB_INCANDESCENT 3
994#define CAMERA_WB_FLUORESCENT 4
995#define CAMERA_WB_DAYLIGHT 5
996#define CAMERA_WB_CLOUDY_DAYLIGHT 6
997#define CAMERA_WB_TWILIGHT 7
998#define CAMERA_WB_SHADE 8
999
1000#define CAMERA_EXPOSURE_COMPENSATION_LV0 12
1001#define CAMERA_EXPOSURE_COMPENSATION_LV1 6
1002#define CAMERA_EXPOSURE_COMPENSATION_LV2 0
1003#define CAMERA_EXPOSURE_COMPENSATION_LV3 -6
1004#define CAMERA_EXPOSURE_COMPENSATION_LV4 -12
1005
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001006enum msm_v4l2_saturation_level {
1007 MSM_V4L2_SATURATION_L0,
1008 MSM_V4L2_SATURATION_L1,
1009 MSM_V4L2_SATURATION_L2,
1010 MSM_V4L2_SATURATION_L3,
1011 MSM_V4L2_SATURATION_L4,
1012 MSM_V4L2_SATURATION_L5,
1013 MSM_V4L2_SATURATION_L6,
1014 MSM_V4L2_SATURATION_L7,
1015 MSM_V4L2_SATURATION_L8,
1016 MSM_V4L2_SATURATION_L9,
1017 MSM_V4L2_SATURATION_L10,
1018};
1019
Suresh Vankadara212d9722012-05-30 15:51:20 +05301020enum msm_v4l2_contrast_level {
1021 MSM_V4L2_CONTRAST_L0,
1022 MSM_V4L2_CONTRAST_L1,
1023 MSM_V4L2_CONTRAST_L2,
1024 MSM_V4L2_CONTRAST_L3,
1025 MSM_V4L2_CONTRAST_L4,
1026 MSM_V4L2_CONTRAST_L5,
1027 MSM_V4L2_CONTRAST_L6,
1028 MSM_V4L2_CONTRAST_L7,
1029 MSM_V4L2_CONTRAST_L8,
1030 MSM_V4L2_CONTRAST_L9,
1031 MSM_V4L2_CONTRAST_L10,
1032};
1033
1034
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001035enum msm_v4l2_exposure_level {
1036 MSM_V4L2_EXPOSURE_N2,
1037 MSM_V4L2_EXPOSURE_N1,
1038 MSM_V4L2_EXPOSURE_D,
1039 MSM_V4L2_EXPOSURE_P1,
1040 MSM_V4L2_EXPOSURE_P2,
1041};
1042
1043enum msm_v4l2_sharpness_level {
1044 MSM_V4L2_SHARPNESS_L0,
1045 MSM_V4L2_SHARPNESS_L1,
1046 MSM_V4L2_SHARPNESS_L2,
1047 MSM_V4L2_SHARPNESS_L3,
1048 MSM_V4L2_SHARPNESS_L4,
1049 MSM_V4L2_SHARPNESS_L5,
1050 MSM_V4L2_SHARPNESS_L6,
1051};
1052
1053enum msm_v4l2_expo_metering_mode {
1054 MSM_V4L2_EXP_FRAME_AVERAGE,
1055 MSM_V4L2_EXP_CENTER_WEIGHTED,
1056 MSM_V4L2_EXP_SPOT_METERING,
1057};
1058
1059enum msm_v4l2_iso_mode {
1060 MSM_V4L2_ISO_AUTO = 0,
1061 MSM_V4L2_ISO_DEBLUR,
1062 MSM_V4L2_ISO_100,
1063 MSM_V4L2_ISO_200,
1064 MSM_V4L2_ISO_400,
1065 MSM_V4L2_ISO_800,
1066 MSM_V4L2_ISO_1600,
1067};
1068
1069enum msm_v4l2_wb_mode {
Suresh Vankadara212d9722012-05-30 15:51:20 +05301070 MSM_V4L2_WB_OFF,
1071 MSM_V4L2_WB_AUTO ,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001072 MSM_V4L2_WB_CUSTOM,
1073 MSM_V4L2_WB_INCANDESCENT,
1074 MSM_V4L2_WB_FLUORESCENT,
1075 MSM_V4L2_WB_DAYLIGHT,
1076 MSM_V4L2_WB_CLOUDY_DAYLIGHT,
Suresh Vankadara212d9722012-05-30 15:51:20 +05301077};
1078
1079enum msm_v4l2_special_effect {
1080 MSM_V4L2_EFFECT_OFF,
1081 MSM_V4L2_EFFECT_MONO,
1082 MSM_V4L2_EFFECT_NEGATIVE,
1083 MSM_V4L2_EFFECT_SOLARIZE,
1084 MSM_V4L2_EFFECT_SEPIA,
1085 MSM_V4L2_EFFECT_POSTERAIZE,
1086 MSM_V4L2_EFFECT_WHITEBOARD,
1087 MSM_V4L2_EFFECT_BLACKBOARD,
1088 MSM_V4L2_EFFECT_AQUA,
1089 MSM_V4L2_EFFECT_EMBOSS,
1090 MSM_V4L2_EFFECT_SKETCH,
1091 MSM_V4L2_EFFECT_NEON,
1092 MSM_V4L2_EFFECT_MAX,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001093};
1094
1095enum msm_v4l2_power_line_frequency {
1096 MSM_V4L2_POWER_LINE_OFF,
1097 MSM_V4L2_POWER_LINE_60HZ,
1098 MSM_V4L2_POWER_LINE_50HZ,
1099 MSM_V4L2_POWER_LINE_AUTO,
1100};
Taniya Dasa9bdb012011-09-08 11:21:33 +05301101
Su Liu6c3bb322012-02-14 02:15:05 +05301102#define CAMERA_ISO_TYPE_AUTO 0
1103#define CAMEAR_ISO_TYPE_HJR 1
1104#define CAMEAR_ISO_TYPE_100 2
1105#define CAMERA_ISO_TYPE_200 3
1106#define CAMERA_ISO_TYPE_400 4
1107#define CAMEAR_ISO_TYPE_800 5
1108#define CAMERA_ISO_TYPE_1600 6
1109
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001110struct sensor_pict_fps {
1111 uint16_t prevfps;
1112 uint16_t pictfps;
1113};
1114
1115struct exp_gain_cfg {
1116 uint16_t gain;
1117 uint32_t line;
1118};
1119
1120struct focus_cfg {
1121 int32_t steps;
1122 int dir;
1123};
1124
1125struct fps_cfg {
1126 uint16_t f_mult;
1127 uint16_t fps_div;
1128 uint32_t pict_fps_div;
1129};
1130struct wb_info_cfg {
1131 uint16_t red_gain;
1132 uint16_t green_gain;
1133 uint16_t blue_gain;
1134};
1135struct sensor_3d_exp_cfg {
1136 uint16_t gain;
1137 uint32_t line;
1138 uint16_t r_gain;
1139 uint16_t b_gain;
1140 uint16_t gr_gain;
1141 uint16_t gb_gain;
1142 uint16_t gain_adjust;
1143};
1144struct sensor_3d_cali_data_t{
1145 unsigned char left_p_matrix[3][4][8];
1146 unsigned char right_p_matrix[3][4][8];
1147 unsigned char square_len[8];
1148 unsigned char focal_len[8];
1149 unsigned char pixel_pitch[8];
1150 uint16_t left_r;
1151 uint16_t left_b;
1152 uint16_t left_gb;
1153 uint16_t left_af_far;
1154 uint16_t left_af_mid;
1155 uint16_t left_af_short;
1156 uint16_t left_af_5um;
1157 uint16_t left_af_50up;
1158 uint16_t left_af_50down;
1159 uint16_t right_r;
1160 uint16_t right_b;
1161 uint16_t right_gb;
1162 uint16_t right_af_far;
1163 uint16_t right_af_mid;
1164 uint16_t right_af_short;
1165 uint16_t right_af_5um;
1166 uint16_t right_af_50up;
1167 uint16_t right_af_50down;
1168};
1169struct sensor_init_cfg {
1170 uint8_t prev_res;
1171 uint8_t pict_res;
1172};
1173
1174struct sensor_calib_data {
1175 /* Color Related Measurements */
1176 uint16_t r_over_g;
1177 uint16_t b_over_g;
1178 uint16_t gr_over_gb;
1179
1180 /* Lens Related Measurements */
1181 uint16_t macro_2_inf;
1182 uint16_t inf_2_macro;
1183 uint16_t stroke_amt;
1184 uint16_t af_pos_1m;
1185 uint16_t af_pos_inf;
1186};
1187
Kevin Chana980f392011-08-01 20:55:00 -07001188enum msm_sensor_resolution_t {
Kevin Chan36e2bdc2011-08-30 17:21:21 -07001189 MSM_SENSOR_RES_FULL,
1190 MSM_SENSOR_RES_QTR,
Kevin Chana980f392011-08-01 20:55:00 -07001191 MSM_SENSOR_RES_2,
1192 MSM_SENSOR_RES_3,
1193 MSM_SENSOR_RES_4,
1194 MSM_SENSOR_RES_5,
1195 MSM_SENSOR_RES_6,
1196 MSM_SENSOR_RES_7,
1197 MSM_SENSOR_INVALID_RES,
1198};
1199
1200struct msm_sensor_output_info_t {
1201 uint16_t x_output;
1202 uint16_t y_output;
1203 uint16_t line_length_pclk;
1204 uint16_t frame_length_lines;
Kevin Chane30d3692011-10-14 16:11:01 -07001205 uint32_t vt_pixel_clk;
1206 uint32_t op_pixel_clk;
Kevin Chan272f6602011-10-18 14:20:03 -07001207 uint16_t binning_factor;
Kevin Chana980f392011-08-01 20:55:00 -07001208};
1209
1210struct sensor_output_info_t {
1211 struct msm_sensor_output_info_t *output_info;
1212 uint16_t num_info;
1213};
1214
Taniya Dasa9bdb012011-09-08 11:21:33 +05301215struct mirror_flip {
1216 int32_t x_mirror;
1217 int32_t y_flip;
1218};
1219
1220struct cord {
1221 uint32_t x;
1222 uint32_t y;
1223};
1224
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001225struct msm_eeprom_data_t {
1226 void *eeprom_data;
1227 uint16_t index;
1228};
1229
Nishant Panditb2157c92012-04-25 01:09:28 +05301230struct msm_camera_csid_vc_cfg {
1231 uint8_t cid;
1232 uint8_t dt;
1233 uint8_t decode_format;
1234};
1235
1236struct csi_lane_params_t {
1237 uint8_t csi_lane_assign;
1238 uint8_t csi_lane_mask;
1239 uint8_t csi_if;
1240 uint8_t csid_core;
1241 uint32_t csid_version;
1242};
1243
1244#define CSI_EMBED_DATA 0x12
1245#define CSI_RESERVED_DATA_0 0x13
1246#define CSI_YUV422_8 0x1E
1247#define CSI_RAW8 0x2A
1248#define CSI_RAW10 0x2B
1249#define CSI_RAW12 0x2C
1250
1251#define CSI_DECODE_6BIT 0
1252#define CSI_DECODE_8BIT 1
1253#define CSI_DECODE_10BIT 2
1254#define CSI_DECODE_DPCM_10_8_10 5
1255
1256#define ISPIF_STREAM(intf, action) (((intf)<<ISPIF_S_STREAM_SHIFT)+(action))
1257#define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0)
1258#define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1)
1259#define ISPIF_OFF_IMMEDIATELY (0x01 << 2)
1260#define ISPIF_S_STREAM_SHIFT 4
1261
1262
1263#define PIX_0 (0x01 << 0)
1264#define RDI_0 (0x01 << 1)
1265#define PIX_1 (0x01 << 2)
1266#define RDI_1 (0x01 << 3)
1267#define PIX_2 (0x01 << 4)
1268#define RDI_2 (0x01 << 5)
1269
1270
1271enum msm_ispif_intftype {
1272 PIX0,
1273 RDI0,
1274 PIX1,
1275 RDI1,
1276 PIX2,
1277 RDI2,
1278 INTF_MAX,
1279};
1280
1281enum msm_ispif_vc {
1282 VC0,
1283 VC1,
1284 VC2,
1285 VC3,
1286};
1287
1288enum msm_ispif_cid {
1289 CID0,
1290 CID1,
1291 CID2,
1292 CID3,
1293 CID4,
1294 CID5,
1295 CID6,
1296 CID7,
1297 CID8,
1298 CID9,
1299 CID10,
1300 CID11,
1301 CID12,
1302 CID13,
1303 CID14,
1304 CID15,
1305};
1306
1307struct msm_ispif_params {
1308 uint8_t intftype;
1309 uint16_t cid_mask;
1310 uint8_t csid;
1311};
1312
1313struct msm_ispif_params_list {
1314 uint32_t len;
1315 struct msm_ispif_params params[4];
1316};
1317
1318enum ispif_cfg_type_t {
1319 ISPIF_INIT,
1320 ISPIF_SET_CFG,
1321 ISPIF_SET_ON_FRAME_BOUNDARY,
1322 ISPIF_SET_OFF_FRAME_BOUNDARY,
1323 ISPIF_SET_OFF_IMMEDIATELY,
1324 ISPIF_RELEASE,
1325};
1326
1327struct ispif_cfg_data {
1328 enum ispif_cfg_type_t cfgtype;
1329 union {
1330 uint32_t csid_version;
1331 int cmd;
1332 struct msm_ispif_params_list ispif_params;
1333 } cfg;
1334};
1335
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001336struct sensor_cfg_data {
1337 int cfgtype;
1338 int mode;
1339 int rs;
1340 uint8_t max_steps;
1341
1342 union {
1343 int8_t effect;
1344 uint8_t lens_shading;
1345 uint16_t prevl_pf;
1346 uint16_t prevp_pl;
1347 uint16_t pictl_pf;
1348 uint16_t pictp_pl;
1349 uint32_t pict_max_exp_lc;
1350 uint16_t p_fps;
Su Liu6c3bb322012-02-14 02:15:05 +05301351 uint8_t iso_type;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001352 struct sensor_init_cfg init_info;
1353 struct sensor_pict_fps gfps;
1354 struct exp_gain_cfg exp_gain;
1355 struct focus_cfg focus;
1356 struct fps_cfg fps;
1357 struct wb_info_cfg wb_info;
1358 struct sensor_3d_exp_cfg sensor_3d_exp;
1359 struct sensor_calib_data calib_info;
Kevin Chana980f392011-08-01 20:55:00 -07001360 struct sensor_output_info_t output_info;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001361 struct msm_eeprom_data_t eeprom_data;
Nishant Panditb2157c92012-04-25 01:09:28 +05301362 struct csi_lane_params_t csi_lane_params;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301363 /* QRD */
1364 uint16_t antibanding;
1365 uint8_t contrast;
1366 uint8_t saturation;
1367 uint8_t sharpness;
1368 int8_t brightness;
1369 int ae_mode;
1370 uint8_t wb_val;
1371 int8_t exp_compensation;
1372 struct cord aec_cord;
1373 int is_autoflash;
1374 struct mirror_flip mirror_flip;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001375 } cfg;
1376};
1377
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001378struct damping_params_t {
1379 uint32_t damping_step;
1380 uint32_t damping_delay;
1381 uint32_t hw_params;
1382};
1383
1384enum actuator_type {
1385 ACTUATOR_VCM,
1386 ACTUATOR_PIEZO,
1387};
1388
1389enum msm_actuator_data_type {
1390 MSM_ACTUATOR_BYTE_DATA = 1,
1391 MSM_ACTUATOR_WORD_DATA,
1392};
1393
1394enum msm_actuator_addr_type {
1395 MSM_ACTUATOR_BYTE_ADDR = 1,
1396 MSM_ACTUATOR_WORD_ADDR,
1397};
1398
1399enum msm_actuator_write_type {
1400 MSM_ACTUATOR_WRITE_HW_DAMP,
1401 MSM_ACTUATOR_WRITE_DAC,
1402};
1403
1404struct msm_actuator_reg_params_t {
1405 enum msm_actuator_write_type reg_write_type;
1406 uint32_t hw_mask;
1407 uint16_t reg_addr;
1408 uint16_t hw_shift;
1409 uint16_t data_shift;
1410};
1411
1412struct reg_settings_t {
1413 uint16_t reg_addr;
1414 uint16_t reg_data;
1415};
1416
1417struct region_params_t {
1418 /* [0] = ForwardDirection Macro boundary
1419 [1] = ReverseDirection Inf boundary
1420 */
1421 uint16_t step_bound[2];
1422 uint16_t code_per_step;
1423};
1424
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001425struct msm_actuator_move_params_t {
1426 int8_t dir;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001427 int8_t sign_dir;
1428 int16_t dest_step_pos;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001429 int32_t num_steps;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001430 struct damping_params_t *ringing_params;
1431};
1432
1433struct msm_actuator_tuning_params_t {
1434 int16_t initial_code;
1435 uint16_t pwd_step;
1436 uint16_t region_size;
1437 uint32_t total_steps;
1438 struct region_params_t *region_params;
1439};
1440
1441struct msm_actuator_params_t {
1442 enum actuator_type act_type;
1443 uint8_t reg_tbl_size;
1444 uint16_t data_size;
1445 uint16_t init_setting_size;
1446 uint32_t i2c_addr;
1447 enum msm_actuator_addr_type i2c_addr_type;
1448 enum msm_actuator_data_type i2c_data_type;
1449 struct msm_actuator_reg_params_t *reg_tbl_params;
1450 struct reg_settings_t *init_settings;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001451};
1452
1453struct msm_actuator_set_info_t {
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001454 struct msm_actuator_params_t actuator_params;
1455 struct msm_actuator_tuning_params_t af_tuning_params;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001456};
1457
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001458struct msm_actuator_get_info_t {
1459 uint32_t focal_length_num;
1460 uint32_t focal_length_den;
1461 uint32_t f_number_num;
1462 uint32_t f_number_den;
1463 uint32_t f_pix_num;
1464 uint32_t f_pix_den;
1465 uint32_t total_f_dist_num;
1466 uint32_t total_f_dist_den;
Jeyaprakash Soundrapandian04592002012-02-08 10:29:50 -08001467 uint32_t hor_view_angle_num;
1468 uint32_t hor_view_angle_den;
1469 uint32_t ver_view_angle_num;
1470 uint32_t ver_view_angle_den;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001471};
1472
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001473enum af_camera_name {
1474 ACTUATOR_MAIN_CAM_0,
1475 ACTUATOR_MAIN_CAM_1,
1476 ACTUATOR_MAIN_CAM_2,
1477 ACTUATOR_MAIN_CAM_3,
1478 ACTUATOR_MAIN_CAM_4,
1479 ACTUATOR_MAIN_CAM_5,
1480 ACTUATOR_WEB_CAM_0,
1481 ACTUATOR_WEB_CAM_1,
1482 ACTUATOR_WEB_CAM_2,
1483};
1484
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001485struct msm_actuator_cfg_data {
1486 int cfgtype;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001487 uint8_t is_af_supported;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001488 union {
1489 struct msm_actuator_move_params_t move;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001490 struct msm_actuator_set_info_t set_info;
1491 struct msm_actuator_get_info_t get_info;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001492 enum af_camera_name cam_name;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001493 } cfg;
1494};
1495
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001496struct msm_eeprom_support {
1497 uint16_t is_supported;
1498 uint16_t size;
1499 uint16_t index;
1500 uint16_t qvalue;
1501};
1502
1503struct msm_calib_wb {
1504 uint16_t r_over_g;
1505 uint16_t b_over_g;
1506 uint16_t gr_over_gb;
1507};
1508
1509struct msm_calib_af {
1510 uint16_t macro_dac;
1511 uint16_t inf_dac;
1512 uint16_t start_dac;
1513};
1514
1515struct msm_calib_lsc {
1516 uint16_t r_gain[221];
1517 uint16_t b_gain[221];
1518 uint16_t gr_gain[221];
1519 uint16_t gb_gain[221];
1520};
1521
1522struct pixel_t {
1523 int x;
1524 int y;
1525};
1526
1527struct msm_calib_dpc {
1528 uint16_t validcount;
1529 struct pixel_t snapshot_coord[128];
1530 struct pixel_t preview_coord[128];
1531 struct pixel_t video_coord[128];
1532};
1533
1534struct msm_camera_eeprom_info_t {
1535 struct msm_eeprom_support af;
1536 struct msm_eeprom_support wb;
1537 struct msm_eeprom_support lsc;
1538 struct msm_eeprom_support dpc;
1539};
1540
1541struct msm_eeprom_cfg_data {
1542 int cfgtype;
1543 uint8_t is_eeprom_supported;
1544 union {
1545 struct msm_eeprom_data_t get_data;
1546 struct msm_camera_eeprom_info_t get_info;
1547 } cfg;
1548};
1549
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001550struct sensor_large_data {
1551 int cfgtype;
1552 union {
1553 struct sensor_3d_cali_data_t sensor_3d_cali_data;
1554 } data;
1555};
1556
1557enum sensor_type_t {
1558 BAYER,
1559 YUV,
1560 JPEG_SOC,
1561};
1562
1563enum flash_type {
1564 LED_FLASH,
1565 STROBE_FLASH,
1566};
1567
1568enum strobe_flash_ctrl_type {
1569 STROBE_FLASH_CTRL_INIT,
1570 STROBE_FLASH_CTRL_CHARGE,
1571 STROBE_FLASH_CTRL_RELEASE
1572};
1573
1574struct strobe_flash_ctrl_data {
1575 enum strobe_flash_ctrl_type type;
1576 int charge_en;
1577};
1578
1579struct msm_camera_info {
1580 int num_cameras;
1581 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
1582 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
1583 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
1584 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
1585 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001586};
1587
1588struct msm_cam_config_dev_info {
1589 int num_config_nodes;
1590 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -07001591 int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001592};
1593
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -08001594struct msm_mctl_node_info {
1595 int num_mctl_nodes;
1596 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
1597};
1598
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001599struct flash_ctrl_data {
1600 int flashtype;
1601 union {
1602 int led_state;
1603 struct strobe_flash_ctrl_data strobe_ctrl;
1604 } ctrl_data;
1605};
1606
1607#define GET_NAME 0
1608#define GET_PREVIEW_LINE_PER_FRAME 1
1609#define GET_PREVIEW_PIXELS_PER_LINE 2
1610#define GET_SNAPSHOT_LINE_PER_FRAME 3
1611#define GET_SNAPSHOT_PIXELS_PER_LINE 4
1612#define GET_SNAPSHOT_FPS 5
1613#define GET_SNAPSHOT_MAX_EP_LINE_CNT 6
1614
1615struct msm_camsensor_info {
1616 char name[MAX_SENSOR_NAME];
1617 uint8_t flash_enabled;
Sreesudhan Ramakrish Ramkumara2688822012-04-05 20:22:50 -07001618 uint8_t strobe_flash_enabled;
1619 uint8_t actuator_enabled;
Nishant Panditb2157c92012-04-25 01:09:28 +05301620 uint8_t ispif_supported;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001621 int8_t total_steps;
1622 uint8_t support_3d;
Mingcheng Zhuc85b8ad2012-03-08 17:47:17 -08001623 enum flash_type flashtype;
1624 enum sensor_type_t sensor_type;
1625 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
1626 uint32_t camera_type; /* msm_camera_type */
1627 int mount_angle;
1628 uint32_t max_width;
1629 uint32_t max_height;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001630};
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001631
1632#define V4L2_SINGLE_PLANE 0
1633#define V4L2_MULTI_PLANE_Y 0
1634#define V4L2_MULTI_PLANE_CBCR 1
1635#define V4L2_MULTI_PLANE_CB 1
1636#define V4L2_MULTI_PLANE_CR 2
1637
1638struct plane_data {
1639 int plane_id;
1640 uint32_t offset;
1641 unsigned long size;
1642};
1643
1644struct img_plane_info {
1645 uint32_t width;
1646 uint32_t height;
1647 uint32_t pixelformat;
1648 uint8_t buffer_type; /*Single/Multi planar*/
1649 uint8_t output_port;
1650 uint32_t ext_mode;
1651 uint8_t num_planes;
1652 struct plane_data plane[MAX_PLANES];
Mingcheng Zhu996be182011-10-16 16:04:23 -07001653 uint32_t sp_y_offset;
Kiran Kumar H N90785902012-07-05 13:59:38 -07001654 uint32_t inst_handle;
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001655};
1656
Kevin Chan210061f2012-02-14 20:56:16 -08001657#define QCAMERA_NAME "qcamera"
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001658#define QCAMERA_SERVER_NAME "qcamera_server"
Kevin Chan210061f2012-02-14 20:56:16 -08001659#define QCAMERA_DEVICE_GROUP_ID 1
1660#define QCAMERA_VNODE_GROUP_ID 2
1661
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001662enum msm_cam_subdev_type {
1663 CSIPHY_DEV,
1664 CSID_DEV,
1665 CSIC_DEV,
1666 ISPIF_DEV,
1667 VFE_DEV,
1668 AXI_DEV,
1669 VPE_DEV,
1670 SENSOR_DEV,
1671 ACTUATOR_DEV,
1672 EEPROM_DEV,
1673 GESTURE_DEV,
1674 IRQ_ROUTER_DEV,
1675 CPP_DEV,
1676};
1677
1678struct msm_mctl_set_sdev_data {
1679 uint32_t revision;
1680 enum msm_cam_subdev_type sdev_type;
1681};
1682
Kevin Chan94b4c832012-03-02 21:27:16 -08001683#define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001684 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001685
1686#define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001687 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001688
1689#define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001690 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001691
1692#define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \
Kevin Chan41a38702012-06-06 22:25:41 -07001693 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001694
1695#define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \
Kevin Chan41a38702012-06-06 22:25:41 -07001696 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001697
Sunid Wilson4584b5f2012-04-13 12:48:25 -07001698#define MSM_CAM_IOCTL_SEND_EVENT \
1699 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event)
1700
Kiran Kumar H N64bd23c2012-05-25 12:06:21 -07001701#define MSM_CAM_V4L2_IOCTL_CFG_VPE \
1702 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd)
1703
Kevin Chan41a38702012-06-06 22:25:41 -07001704#define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \
1705 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
1706
Kiran Kumar H N90785902012-07-05 13:59:38 -07001707#define MSM_CAM_V4L2_IOCTL_PRIVATE_G_CTRL \
1708 _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t)
1709
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001710#define VIDIOC_MSM_VPE_INIT \
1711 _IO('V', BASE_VIDIOC_PRIVATE + 15)
1712
1713#define VIDIOC_MSM_VPE_RELEASE \
1714 _IO('V', BASE_VIDIOC_PRIVATE + 16)
1715
1716#define VIDIOC_MSM_VPE_CFG \
1717 _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_mctl_pp_params *)
1718
1719#define VIDIOC_MSM_AXI_INIT \
1720 _IO('V', BASE_VIDIOC_PRIVATE + 18)
1721
1722#define VIDIOC_MSM_AXI_RELEASE \
1723 _IO('V', BASE_VIDIOC_PRIVATE + 19)
1724
1725#define VIDIOC_MSM_AXI_CFG \
1726 _IOWR('V', BASE_VIDIOC_PRIVATE + 20, void *)
1727
1728#define VIDIOC_MSM_AXI_IRQ \
1729 _IOWR('V', BASE_VIDIOC_PRIVATE + 21, void *)
1730
1731#define VIDIOC_MSM_AXI_BUF_CFG \
1732 _IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *)
1733
1734#define VIDIOC_MSM_VFE_INIT \
1735 _IO('V', BASE_VIDIOC_PRIVATE + 22)
1736
1737#define VIDIOC_MSM_VFE_RELEASE \
1738 _IO('V', BASE_VIDIOC_PRIVATE + 23)
1739
Kevin Chan94b4c832012-03-02 21:27:16 -08001740struct msm_camera_v4l2_ioctl_t {
Kevin Chan41a38702012-06-06 22:25:41 -07001741 uint32_t id;
Kevin Chan94b4c832012-03-02 21:27:16 -08001742 void __user *ioctl_ptr;
Kevin Chan41a38702012-06-06 22:25:41 -07001743 uint32_t len;
Kevin Chan94b4c832012-03-02 21:27:16 -08001744};
1745
Kiran Kumar H Nb4a278e2012-06-18 19:25:47 -07001746enum msm_camss_irq_idx {
1747 CAMERA_SS_IRQ_0,
1748 CAMERA_SS_IRQ_1,
1749 CAMERA_SS_IRQ_2,
1750 CAMERA_SS_IRQ_3,
1751 CAMERA_SS_IRQ_4,
1752 CAMERA_SS_IRQ_5,
1753 CAMERA_SS_IRQ_6,
1754 CAMERA_SS_IRQ_7,
1755 CAMERA_SS_IRQ_8,
1756 CAMERA_SS_IRQ_9,
1757 CAMERA_SS_IRQ_10,
1758 CAMERA_SS_IRQ_11,
1759 CAMERA_SS_IRQ_12,
1760 CAMERA_SS_IRQ_MAX
1761};
1762
1763enum msm_cam_hw_idx {
1764 MSM_CAM_HW_MICRO,
1765 MSM_CAM_HW_CCI,
1766 MSM_CAM_HW_CSI0,
1767 MSM_CAM_HW_CSI1,
1768 MSM_CAM_HW_CSI2,
1769 MSM_CAM_HW_CSI3,
1770 MSM_CAM_HW_ISPIF,
1771 MSM_CAM_HW_CPP,
1772 MSM_CAM_HW_VFE0,
1773 MSM_CAM_HW_VFE1,
1774 MSM_CAM_HW_JPEG0,
1775 MSM_CAM_HW_JPEG1,
1776 MSM_CAM_HW_JPEG2,
1777 MSM_CAM_HW_MAX
1778};
1779
1780struct msm_camera_irq_cfg {
1781 /* Bit mask of all the camera hardwares that needs to
1782 * be composited into a single IRQ to the MSM.
1783 * Current usage: (may be updated based on hw changes)
1784 * Bits 31:13 - Reserved.
1785 * Bits 12:0
1786 * 12 - MSM_CAM_HW_JPEG2
1787 * 11 - MSM_CAM_HW_JPEG1
1788 * 10 - MSM_CAM_HW_JPEG0
1789 * 9 - MSM_CAM_HW_VFE1
1790 * 8 - MSM_CAM_HW_VFE0
1791 * 7 - MSM_CAM_HW_CPP
1792 * 6 - MSM_CAM_HW_ISPIF
1793 * 5 - MSM_CAM_HW_CSI3
1794 * 4 - MSM_CAM_HW_CSI2
1795 * 3 - MSM_CAM_HW_CSI1
1796 * 2 - MSM_CAM_HW_CSI0
1797 * 1 - MSM_CAM_HW_CCI
1798 * 0 - MSM_CAM_HW_MICRO
1799 */
1800 uint32_t cam_hw_mask;
1801 uint8_t irq_idx;
1802 uint8_t num_hwcore;
1803};
1804
1805#define MSM_IRQROUTER_CFG_COMPIRQ \
1806 _IOWR('V', BASE_VIDIOC_PRIVATE, void __user *)
1807
Kevin Chan73ec7282012-06-07 01:32:00 -07001808#define MAX_NUM_CPP_STRIPS 8
1809
1810enum msm_cpp_frame_type {
1811 MSM_CPP_OFFLINE_FRAME,
1812 MSM_CPP_REALTIME_FRAME,
1813};
1814
1815struct msm_cpp_frame_strip_info {
1816 int scale_v_en;
1817 int scale_h_en;
1818
1819 int upscale_v_en;
1820 int upscale_h_en;
1821
1822 int src_start_x;
1823 int src_end_x;
1824 int src_start_y;
1825 int src_end_y;
1826
1827 /* Padding is required for upscaler because it does not
1828 * pad internally like other blocks, also needed for rotation
1829 * rotation expects all the blocks in the stripe to be the same size
1830 * Padding is done such that all the extra padded pixels
1831 * are on the right and bottom
1832 */
1833 int pad_bottom;
1834 int pad_top;
1835 int pad_right;
1836 int pad_left;
1837
1838 int v_init_phase;
1839 int h_init_phase;
1840 int h_phase_step;
1841 int v_phase_step;
1842
1843 int prescale_crop_width_first_pixel;
1844 int prescale_crop_width_last_pixel;
1845 int prescale_crop_height_first_line;
1846 int prescale_crop_height_last_line;
1847
1848 int postscale_crop_height_first_line;
1849 int postscale_crop_height_last_line;
1850 int postscale_crop_width_first_pixel;
1851 int postscale_crop_width_last_pixel;
1852
1853 int dst_start_x;
1854 int dst_end_x;
1855 int dst_start_y;
1856 int dst_end_y;
1857
1858 int bytes_per_pixel;
1859 unsigned int source_address;
1860 unsigned int destination_address;
1861 unsigned int src_stride;
1862 unsigned int dst_stride;
1863 int rotate_270;
1864 int horizontal_flip;
1865 int vertical_flip;
1866 int scale_output_width;
1867 int scale_output_height;
1868};
1869
1870struct msm_cpp_frame_info_t {
1871 int32_t frame_id;
1872 uint32_t inst_id;
1873 uint32_t client_id;
1874 enum msm_cpp_frame_type frame_type;
1875 uint32_t num_strips;
1876 struct msm_cpp_frame_strip_info *strip_info;
1877};
1878
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -07001879struct msm_ver_num_info {
1880 uint32_t main;
1881 uint32_t minor;
1882 uint32_t rev;
1883};
1884
Kevin Chan73ec7282012-06-07 01:32:00 -07001885#define VIDIOC_MSM_CPP_CFG \
1886 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
1887
1888#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
1889 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
1890
1891#define VIDIOC_MSM_CPP_GET_INST_INFO \
1892 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
1893
1894#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
1895
Kiran Kumar H N90785902012-07-05 13:59:38 -07001896/* Instance Handle - inst_handle
1897 * Data bundle containing the information about where
1898 * to get a buffer for a particular camera instance.
1899 * This is a bitmask containing the following data:
1900 * Buffer Handle Bitmask:
1901 * ------------------------------------
1902 * Bits : Purpose
1903 * ------------------------------------
1904 * 31 - 24 : Reserved.
1905 * 23 : is Image mode valid?
1906 * 22 - 16 : Image mode.
1907 * 15 : is MCTL PP inst idx valid?
1908 * 14 - 8 : MCTL PP inst idx.
1909 * 7 : is Video inst idx valid?
1910 * 6 - 0 : Video inst idx.
1911 */
1912#define CLR_IMG_MODE(handle) (handle &= 0xFF00FFFF)
1913#define SET_IMG_MODE(handle, data) \
1914 (handle |= ((0x1 << 23) | ((data & 0x7F) << 16)))
1915#define GET_IMG_MODE(handle) \
1916 ((handle & 0x800000) ? ((handle & 0x7F0000) >> 16) : 0xFF)
1917
1918#define CLR_MCTLPP_INST_IDX(handle) (handle &= 0xFFFF00FF)
1919#define SET_MCTLPP_INST_IDX(handle, data) \
1920 (handle |= ((0x1 << 15) | ((data & 0x7F) << 8)))
1921#define GET_MCTLPP_INST_IDX(handle) \
1922 ((handle & 0x8000) ? ((handle & 0x7F00) >> 8) : 0xFF)
1923
1924#define CLR_VIDEO_INST_IDX(handle) (handle &= 0xFFFFFF00)
1925#define GET_VIDEO_INST_IDX(handle) \
1926 ((handle & 0x80) ? (handle & 0x7F) : 0xFF)
1927#define SET_VIDEO_INST_IDX(handle, data) \
1928 (handle |= (0x1 << 7) | (data & 0x7F))
1929
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001930#endif /* __LINUX_MSM_CAMERA_H */