blob: af6cc3dbb9a3431e89643ea7b649c8e8f80c17da [file] [log] [blame]
eric miao8f58de72007-12-19 17:14:02 +08001#include <linux/module.h>
2#include <linux/kernel.h>
3#include <linux/init.h>
4#include <linux/platform_device.h>
5#include <linux/dma-mapping.h>
6
7#include <asm/arch/gpio.h>
8#include <asm/arch/udc.h>
9#include <asm/arch/pxafb.h>
10#include <asm/arch/mmc.h>
11#include <asm/arch/irda.h>
12#include <asm/arch/i2c.h>
Philipp Zabelbc3a5952008-06-02 18:49:27 +010013#include <asm/arch/mfp-pxa27x.h>
eric miaocd5604d2008-01-29 09:00:19 +080014#include <asm/arch/ohci.h>
eric miao37320982008-01-23 13:39:13 +080015#include <asm/arch/pxa27x_keypad.h>
Guennadi Liakhovetski3f3acef2008-04-11 22:19:45 +020016#include <asm/arch/camera.h>
eric miao8f58de72007-12-19 17:14:02 +080017
18#include "devices.h"
Philipp Zabelbc3a5952008-06-02 18:49:27 +010019#include "generic.h"
eric miao8f58de72007-12-19 17:14:02 +080020
21void __init pxa_register_device(struct platform_device *dev, void *data)
22{
23 int ret;
24
25 dev->dev.platform_data = data;
26
27 ret = platform_device_register(dev);
28 if (ret)
29 dev_err(&dev->dev, "unable to register device: %d\n", ret);
30}
31
32static struct resource pxamci_resources[] = {
33 [0] = {
34 .start = 0x41100000,
35 .end = 0x41100fff,
36 .flags = IORESOURCE_MEM,
37 },
38 [1] = {
39 .start = IRQ_MMC,
40 .end = IRQ_MMC,
41 .flags = IORESOURCE_IRQ,
42 },
43 [2] = {
44 .start = 21,
45 .end = 21,
46 .flags = IORESOURCE_DMA,
47 },
48 [3] = {
49 .start = 22,
50 .end = 22,
51 .flags = IORESOURCE_DMA,
52 },
53};
54
55static u64 pxamci_dmamask = 0xffffffffUL;
56
57struct platform_device pxa_device_mci = {
58 .name = "pxa2xx-mci",
Bridge Wufafc9d32007-12-21 19:00:13 +080059 .id = 0,
eric miao8f58de72007-12-19 17:14:02 +080060 .dev = {
61 .dma_mask = &pxamci_dmamask,
62 .coherent_dma_mask = 0xffffffff,
63 },
64 .num_resources = ARRAY_SIZE(pxamci_resources),
65 .resource = pxamci_resources,
66};
67
68void __init pxa_set_mci_info(struct pxamci_platform_data *info)
69{
70 pxa_register_device(&pxa_device_mci, info);
71}
72
73
74static struct pxa2xx_udc_mach_info pxa_udc_info;
75
76void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
77{
78 memcpy(&pxa_udc_info, info, sizeof *info);
79}
80
81static struct resource pxa2xx_udc_resources[] = {
82 [0] = {
83 .start = 0x40600000,
84 .end = 0x4060ffff,
85 .flags = IORESOURCE_MEM,
86 },
87 [1] = {
88 .start = IRQ_USB,
89 .end = IRQ_USB,
90 .flags = IORESOURCE_IRQ,
91 },
92};
93
94static u64 udc_dma_mask = ~(u32)0;
95
96struct platform_device pxa_device_udc = {
97 .name = "pxa2xx-udc",
98 .id = -1,
99 .resource = pxa2xx_udc_resources,
100 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
101 .dev = {
102 .platform_data = &pxa_udc_info,
103 .dma_mask = &udc_dma_mask,
104 }
105};
106
107static struct resource pxafb_resources[] = {
108 [0] = {
109 .start = 0x44000000,
110 .end = 0x4400ffff,
111 .flags = IORESOURCE_MEM,
112 },
113 [1] = {
114 .start = IRQ_LCD,
115 .end = IRQ_LCD,
116 .flags = IORESOURCE_IRQ,
117 },
118};
119
120static u64 fb_dma_mask = ~(u64)0;
121
122struct platform_device pxa_device_fb = {
123 .name = "pxa2xx-fb",
124 .id = -1,
125 .dev = {
126 .dma_mask = &fb_dma_mask,
127 .coherent_dma_mask = 0xffffffff,
128 },
129 .num_resources = ARRAY_SIZE(pxafb_resources),
130 .resource = pxafb_resources,
131};
132
133void __init set_pxa_fb_info(struct pxafb_mach_info *info)
134{
135 pxa_register_device(&pxa_device_fb, info);
136}
137
138void __init set_pxa_fb_parent(struct device *parent_dev)
139{
140 pxa_device_fb.dev.parent = parent_dev;
141}
142
143static struct resource pxa_resource_ffuart[] = {
144 {
145 .start = __PREG(FFUART),
146 .end = __PREG(FFUART) + 35,
147 .flags = IORESOURCE_MEM,
148 }, {
149 .start = IRQ_FFUART,
150 .end = IRQ_FFUART,
151 .flags = IORESOURCE_IRQ,
152 }
153};
154
155struct platform_device pxa_device_ffuart= {
156 .name = "pxa2xx-uart",
157 .id = 0,
158 .resource = pxa_resource_ffuart,
159 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
160};
161
162static struct resource pxa_resource_btuart[] = {
163 {
164 .start = __PREG(BTUART),
165 .end = __PREG(BTUART) + 35,
166 .flags = IORESOURCE_MEM,
167 }, {
168 .start = IRQ_BTUART,
169 .end = IRQ_BTUART,
170 .flags = IORESOURCE_IRQ,
171 }
172};
173
174struct platform_device pxa_device_btuart = {
175 .name = "pxa2xx-uart",
176 .id = 1,
177 .resource = pxa_resource_btuart,
178 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
179};
180
181static struct resource pxa_resource_stuart[] = {
182 {
183 .start = __PREG(STUART),
184 .end = __PREG(STUART) + 35,
185 .flags = IORESOURCE_MEM,
186 }, {
187 .start = IRQ_STUART,
188 .end = IRQ_STUART,
189 .flags = IORESOURCE_IRQ,
190 }
191};
192
193struct platform_device pxa_device_stuart = {
194 .name = "pxa2xx-uart",
195 .id = 2,
196 .resource = pxa_resource_stuart,
197 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
198};
199
200static struct resource pxa_resource_hwuart[] = {
201 {
202 .start = __PREG(HWUART),
203 .end = __PREG(HWUART) + 47,
204 .flags = IORESOURCE_MEM,
205 }, {
206 .start = IRQ_HWUART,
207 .end = IRQ_HWUART,
208 .flags = IORESOURCE_IRQ,
209 }
210};
211
212struct platform_device pxa_device_hwuart = {
213 .name = "pxa2xx-uart",
214 .id = 3,
215 .resource = pxa_resource_hwuart,
216 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
217};
218
219static struct resource pxai2c_resources[] = {
220 {
221 .start = 0x40301680,
222 .end = 0x403016a3,
223 .flags = IORESOURCE_MEM,
224 }, {
225 .start = IRQ_I2C,
226 .end = IRQ_I2C,
227 .flags = IORESOURCE_IRQ,
228 },
229};
230
231struct platform_device pxa_device_i2c = {
232 .name = "pxa2xx-i2c",
233 .id = 0,
234 .resource = pxai2c_resources,
235 .num_resources = ARRAY_SIZE(pxai2c_resources),
236};
237
Philipp Zabelbc3a5952008-06-02 18:49:27 +0100238static unsigned long pxa27x_i2c_mfp_cfg[] = {
239 GPIO117_I2C_SCL,
240 GPIO118_I2C_SDA,
241};
242
eric miao8f58de72007-12-19 17:14:02 +0800243void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
244{
Philipp Zabelbc3a5952008-06-02 18:49:27 +0100245 if (cpu_is_pxa27x())
246 pxa2xx_mfp_config(ARRAY_AND_SIZE(pxa27x_i2c_mfp_cfg));
eric miao8f58de72007-12-19 17:14:02 +0800247 pxa_register_device(&pxa_device_i2c, info);
248}
249
250static struct resource pxai2s_resources[] = {
251 {
252 .start = 0x40400000,
253 .end = 0x40400083,
254 .flags = IORESOURCE_MEM,
255 }, {
256 .start = IRQ_I2S,
257 .end = IRQ_I2S,
258 .flags = IORESOURCE_IRQ,
259 },
260};
261
262struct platform_device pxa_device_i2s = {
263 .name = "pxa2xx-i2s",
264 .id = -1,
265 .resource = pxai2s_resources,
266 .num_resources = ARRAY_SIZE(pxai2s_resources),
267};
268
269static u64 pxaficp_dmamask = ~(u32)0;
270
271struct platform_device pxa_device_ficp = {
272 .name = "pxa2xx-ir",
273 .id = -1,
274 .dev = {
275 .dma_mask = &pxaficp_dmamask,
276 .coherent_dma_mask = 0xffffffff,
277 },
278};
279
280void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
281{
282 pxa_register_device(&pxa_device_ficp, info);
283}
284
285struct platform_device pxa_device_rtc = {
286 .name = "sa1100-rtc",
287 .id = -1,
288};
289
290#ifdef CONFIG_PXA25x
291
292static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
293
294static struct resource pxa25x_resource_ssp[] = {
295 [0] = {
296 .start = 0x41000000,
297 .end = 0x4100001f,
298 .flags = IORESOURCE_MEM,
299 },
300 [1] = {
301 .start = IRQ_SSP,
302 .end = IRQ_SSP,
303 .flags = IORESOURCE_IRQ,
304 },
305 [2] = {
306 /* DRCMR for RX */
307 .start = 13,
308 .end = 13,
309 .flags = IORESOURCE_DMA,
310 },
311 [3] = {
312 /* DRCMR for TX */
313 .start = 14,
314 .end = 14,
315 .flags = IORESOURCE_DMA,
316 },
317};
318
319struct platform_device pxa25x_device_ssp = {
320 .name = "pxa25x-ssp",
321 .id = 0,
322 .dev = {
323 .dma_mask = &pxa25x_ssp_dma_mask,
324 .coherent_dma_mask = DMA_BIT_MASK(32),
325 },
326 .resource = pxa25x_resource_ssp,
327 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
328};
329
330static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
331
332static struct resource pxa25x_resource_nssp[] = {
333 [0] = {
334 .start = 0x41400000,
335 .end = 0x4140002f,
336 .flags = IORESOURCE_MEM,
337 },
338 [1] = {
339 .start = IRQ_NSSP,
340 .end = IRQ_NSSP,
341 .flags = IORESOURCE_IRQ,
342 },
343 [2] = {
344 /* DRCMR for RX */
345 .start = 15,
346 .end = 15,
347 .flags = IORESOURCE_DMA,
348 },
349 [3] = {
350 /* DRCMR for TX */
351 .start = 16,
352 .end = 16,
353 .flags = IORESOURCE_DMA,
354 },
355};
356
357struct platform_device pxa25x_device_nssp = {
358 .name = "pxa25x-nssp",
359 .id = 1,
360 .dev = {
361 .dma_mask = &pxa25x_nssp_dma_mask,
362 .coherent_dma_mask = DMA_BIT_MASK(32),
363 },
364 .resource = pxa25x_resource_nssp,
365 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
366};
367
368static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
369
370static struct resource pxa25x_resource_assp[] = {
371 [0] = {
372 .start = 0x41500000,
373 .end = 0x4150002f,
374 .flags = IORESOURCE_MEM,
375 },
376 [1] = {
377 .start = IRQ_ASSP,
378 .end = IRQ_ASSP,
379 .flags = IORESOURCE_IRQ,
380 },
381 [2] = {
382 /* DRCMR for RX */
383 .start = 23,
384 .end = 23,
385 .flags = IORESOURCE_DMA,
386 },
387 [3] = {
388 /* DRCMR for TX */
389 .start = 24,
390 .end = 24,
391 .flags = IORESOURCE_DMA,
392 },
393};
394
395struct platform_device pxa25x_device_assp = {
396 /* ASSP is basically equivalent to NSSP */
397 .name = "pxa25x-nssp",
398 .id = 2,
399 .dev = {
400 .dma_mask = &pxa25x_assp_dma_mask,
401 .coherent_dma_mask = DMA_BIT_MASK(32),
402 },
403 .resource = pxa25x_resource_assp,
404 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
405};
406#endif /* CONFIG_PXA25x */
407
408#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
409
eric miao37320982008-01-23 13:39:13 +0800410static struct resource pxa27x_resource_keypad[] = {
411 [0] = {
412 .start = 0x41500000,
413 .end = 0x4150004c,
414 .flags = IORESOURCE_MEM,
415 },
416 [1] = {
417 .start = IRQ_KEYPAD,
418 .end = IRQ_KEYPAD,
419 .flags = IORESOURCE_IRQ,
420 },
421};
422
423struct platform_device pxa27x_device_keypad = {
424 .name = "pxa27x-keypad",
425 .id = -1,
426 .resource = pxa27x_resource_keypad,
427 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
428};
429
430void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
431{
432 pxa_register_device(&pxa27x_device_keypad, info);
433}
434
eric miaoec68e452007-12-12 09:29:33 +0800435static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
436
437static struct resource pxa27x_resource_ohci[] = {
438 [0] = {
439 .start = 0x4C000000,
440 .end = 0x4C00ff6f,
441 .flags = IORESOURCE_MEM,
442 },
443 [1] = {
444 .start = IRQ_USBH1,
445 .end = IRQ_USBH1,
446 .flags = IORESOURCE_IRQ,
447 },
448};
449
450struct platform_device pxa27x_device_ohci = {
451 .name = "pxa27x-ohci",
452 .id = -1,
453 .dev = {
454 .dma_mask = &pxa27x_ohci_dma_mask,
455 .coherent_dma_mask = DMA_BIT_MASK(32),
456 },
457 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
458 .resource = pxa27x_resource_ohci,
459};
460
461void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
462{
463 pxa_register_device(&pxa27x_device_ohci, info);
464}
465
eric miao8f58de72007-12-19 17:14:02 +0800466static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
467
468static struct resource pxa27x_resource_ssp1[] = {
469 [0] = {
470 .start = 0x41000000,
471 .end = 0x4100003f,
472 .flags = IORESOURCE_MEM,
473 },
474 [1] = {
475 .start = IRQ_SSP,
476 .end = IRQ_SSP,
477 .flags = IORESOURCE_IRQ,
478 },
479 [2] = {
480 /* DRCMR for RX */
481 .start = 13,
482 .end = 13,
483 .flags = IORESOURCE_DMA,
484 },
485 [3] = {
486 /* DRCMR for TX */
487 .start = 14,
488 .end = 14,
489 .flags = IORESOURCE_DMA,
490 },
491};
492
493struct platform_device pxa27x_device_ssp1 = {
494 .name = "pxa27x-ssp",
495 .id = 0,
496 .dev = {
497 .dma_mask = &pxa27x_ssp1_dma_mask,
498 .coherent_dma_mask = DMA_BIT_MASK(32),
499 },
500 .resource = pxa27x_resource_ssp1,
501 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
502};
503
504static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
505
506static struct resource pxa27x_resource_ssp2[] = {
507 [0] = {
508 .start = 0x41700000,
509 .end = 0x4170003f,
510 .flags = IORESOURCE_MEM,
511 },
512 [1] = {
513 .start = IRQ_SSP2,
514 .end = IRQ_SSP2,
515 .flags = IORESOURCE_IRQ,
516 },
517 [2] = {
518 /* DRCMR for RX */
519 .start = 15,
520 .end = 15,
521 .flags = IORESOURCE_DMA,
522 },
523 [3] = {
524 /* DRCMR for TX */
525 .start = 16,
526 .end = 16,
527 .flags = IORESOURCE_DMA,
528 },
529};
530
531struct platform_device pxa27x_device_ssp2 = {
532 .name = "pxa27x-ssp",
533 .id = 1,
534 .dev = {
535 .dma_mask = &pxa27x_ssp2_dma_mask,
536 .coherent_dma_mask = DMA_BIT_MASK(32),
537 },
538 .resource = pxa27x_resource_ssp2,
539 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
540};
541
542static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
543
544static struct resource pxa27x_resource_ssp3[] = {
545 [0] = {
546 .start = 0x41900000,
547 .end = 0x4190003f,
548 .flags = IORESOURCE_MEM,
549 },
550 [1] = {
551 .start = IRQ_SSP3,
552 .end = IRQ_SSP3,
553 .flags = IORESOURCE_IRQ,
554 },
555 [2] = {
556 /* DRCMR for RX */
557 .start = 66,
558 .end = 66,
559 .flags = IORESOURCE_DMA,
560 },
561 [3] = {
562 /* DRCMR for TX */
563 .start = 67,
564 .end = 67,
565 .flags = IORESOURCE_DMA,
566 },
567};
568
569struct platform_device pxa27x_device_ssp3 = {
570 .name = "pxa27x-ssp",
571 .id = 2,
572 .dev = {
573 .dma_mask = &pxa27x_ssp3_dma_mask,
574 .coherent_dma_mask = DMA_BIT_MASK(32),
575 },
576 .resource = pxa27x_resource_ssp3,
577 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
578};
Guennadi Liakhovetski3f3acef2008-04-11 22:19:45 +0200579
580static struct resource pxa27x_resource_camera[] = {
581 [0] = {
582 .start = 0x50000000,
583 .end = 0x50000fff,
584 .flags = IORESOURCE_MEM,
585 },
586 [1] = {
587 .start = IRQ_CAMERA,
588 .end = IRQ_CAMERA,
589 .flags = IORESOURCE_IRQ,
590 },
591};
592
593static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
594
595static struct platform_device pxa27x_device_camera = {
596 .name = "pxa27x-camera",
597 .id = 0, /* This is used to put cameras on this interface */
598 .dev = {
599 .dma_mask = &pxa27x_dma_mask_camera,
600 .coherent_dma_mask = 0xffffffff,
601 },
602 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
603 .resource = pxa27x_resource_camera,
604};
605
606void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
607{
608 pxa_register_device(&pxa27x_device_camera, info);
609}
eric miao8f58de72007-12-19 17:14:02 +0800610#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
611
612#ifdef CONFIG_PXA3xx
613static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
614
615static struct resource pxa3xx_resource_ssp4[] = {
616 [0] = {
617 .start = 0x41a00000,
618 .end = 0x41a0003f,
619 .flags = IORESOURCE_MEM,
620 },
621 [1] = {
622 .start = IRQ_SSP4,
623 .end = IRQ_SSP4,
624 .flags = IORESOURCE_IRQ,
625 },
626 [2] = {
627 /* DRCMR for RX */
628 .start = 2,
629 .end = 2,
630 .flags = IORESOURCE_DMA,
631 },
632 [3] = {
633 /* DRCMR for TX */
634 .start = 3,
635 .end = 3,
636 .flags = IORESOURCE_DMA,
637 },
638};
639
640struct platform_device pxa3xx_device_ssp4 = {
641 /* PXA3xx SSP is basically equivalent to PXA27x */
642 .name = "pxa27x-ssp",
643 .id = 3,
644 .dev = {
645 .dma_mask = &pxa3xx_ssp4_dma_mask,
646 .coherent_dma_mask = DMA_BIT_MASK(32),
647 },
648 .resource = pxa3xx_resource_ssp4,
649 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
650};
Bridge Wu8d33b052007-12-21 19:15:36 +0800651
652static struct resource pxa3xx_resources_mci2[] = {
653 [0] = {
654 .start = 0x42000000,
655 .end = 0x42000fff,
656 .flags = IORESOURCE_MEM,
657 },
658 [1] = {
659 .start = IRQ_MMC2,
660 .end = IRQ_MMC2,
661 .flags = IORESOURCE_IRQ,
662 },
663 [2] = {
664 .start = 93,
665 .end = 93,
666 .flags = IORESOURCE_DMA,
667 },
668 [3] = {
669 .start = 94,
670 .end = 94,
671 .flags = IORESOURCE_DMA,
672 },
673};
674
675struct platform_device pxa3xx_device_mci2 = {
676 .name = "pxa2xx-mci",
677 .id = 1,
678 .dev = {
679 .dma_mask = &pxamci_dmamask,
680 .coherent_dma_mask = 0xffffffff,
681 },
682 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
683 .resource = pxa3xx_resources_mci2,
684};
685
686void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
687{
688 pxa_register_device(&pxa3xx_device_mci2, info);
689}
690
Bridge Wu5a1f21b2007-12-21 19:27:08 +0800691static struct resource pxa3xx_resources_mci3[] = {
692 [0] = {
693 .start = 0x42500000,
694 .end = 0x42500fff,
695 .flags = IORESOURCE_MEM,
696 },
697 [1] = {
698 .start = IRQ_MMC3,
699 .end = IRQ_MMC3,
700 .flags = IORESOURCE_IRQ,
701 },
702 [2] = {
703 .start = 100,
704 .end = 100,
705 .flags = IORESOURCE_DMA,
706 },
707 [3] = {
708 .start = 101,
709 .end = 101,
710 .flags = IORESOURCE_DMA,
711 },
712};
713
714struct platform_device pxa3xx_device_mci3 = {
715 .name = "pxa2xx-mci",
716 .id = 2,
717 .dev = {
718 .dma_mask = &pxamci_dmamask,
719 .coherent_dma_mask = 0xffffffff,
720 },
721 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
722 .resource = pxa3xx_resources_mci3,
723};
724
725void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
726{
727 pxa_register_device(&pxa3xx_device_mci3, info);
728}
729
eric miao8f58de72007-12-19 17:14:02 +0800730#endif /* CONFIG_PXA3xx */