blob: 9012b57b3cf0d8299e23829746e6b85d30f09b85 [file] [log] [blame]
Laurent Pinchartde1135d2011-02-12 18:05:06 -03001/*
2 * ispccdc.c
3 *
4 * TI OMAP3 ISP - CCDC module
5 *
6 * Copyright (C) 2009-2010 Nokia Corporation
7 * Copyright (C) 2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */
26
27#include <linux/module.h>
28#include <linux/uaccess.h>
29#include <linux/delay.h>
30#include <linux/device.h>
31#include <linux/dma-mapping.h>
32#include <linux/mm.h>
33#include <linux/sched.h>
Joerg Roedele74d83a2011-09-06 11:02:15 -030034#include <linux/slab.h>
Laurent Pinchartde1135d2011-02-12 18:05:06 -030035#include <media/v4l2-event.h>
36
37#include "isp.h"
38#include "ispreg.h"
39#include "ispccdc.h"
40
41static struct v4l2_mbus_framefmt *
42__ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
43 unsigned int pad, enum v4l2_subdev_format_whence which);
44
45static const unsigned int ccdc_fmts[] = {
46 V4L2_MBUS_FMT_Y8_1X8,
Michael Jones5782f972011-03-29 05:19:08 -030047 V4L2_MBUS_FMT_Y10_1X10,
48 V4L2_MBUS_FMT_Y12_1X12,
49 V4L2_MBUS_FMT_SGRBG8_1X8,
50 V4L2_MBUS_FMT_SRGGB8_1X8,
51 V4L2_MBUS_FMT_SBGGR8_1X8,
52 V4L2_MBUS_FMT_SGBRG8_1X8,
Laurent Pinchartde1135d2011-02-12 18:05:06 -030053 V4L2_MBUS_FMT_SGRBG10_1X10,
54 V4L2_MBUS_FMT_SRGGB10_1X10,
55 V4L2_MBUS_FMT_SBGGR10_1X10,
56 V4L2_MBUS_FMT_SGBRG10_1X10,
57 V4L2_MBUS_FMT_SGRBG12_1X12,
58 V4L2_MBUS_FMT_SRGGB12_1X12,
59 V4L2_MBUS_FMT_SBGGR12_1X12,
60 V4L2_MBUS_FMT_SGBRG12_1X12,
61};
62
63/*
64 * ccdc_print_status - Print current CCDC Module register values.
65 * @ccdc: Pointer to ISP CCDC device.
66 *
67 * Also prints other debug information stored in the CCDC module.
68 */
69#define CCDC_PRINT_REGISTER(isp, name)\
70 dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
71 isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
72
73static void ccdc_print_status(struct isp_ccdc_device *ccdc)
74{
75 struct isp_device *isp = to_isp_device(ccdc);
76
77 dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
78
79 CCDC_PRINT_REGISTER(isp, PCR);
80 CCDC_PRINT_REGISTER(isp, SYN_MODE);
81 CCDC_PRINT_REGISTER(isp, HD_VD_WID);
82 CCDC_PRINT_REGISTER(isp, PIX_LINES);
83 CCDC_PRINT_REGISTER(isp, HORZ_INFO);
84 CCDC_PRINT_REGISTER(isp, VERT_START);
85 CCDC_PRINT_REGISTER(isp, VERT_LINES);
86 CCDC_PRINT_REGISTER(isp, CULLING);
87 CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
88 CCDC_PRINT_REGISTER(isp, SDOFST);
89 CCDC_PRINT_REGISTER(isp, SDR_ADDR);
90 CCDC_PRINT_REGISTER(isp, CLAMP);
91 CCDC_PRINT_REGISTER(isp, DCSUB);
92 CCDC_PRINT_REGISTER(isp, COLPTN);
93 CCDC_PRINT_REGISTER(isp, BLKCMP);
94 CCDC_PRINT_REGISTER(isp, FPC);
95 CCDC_PRINT_REGISTER(isp, FPC_ADDR);
96 CCDC_PRINT_REGISTER(isp, VDINT);
97 CCDC_PRINT_REGISTER(isp, ALAW);
98 CCDC_PRINT_REGISTER(isp, REC656IF);
99 CCDC_PRINT_REGISTER(isp, CFG);
100 CCDC_PRINT_REGISTER(isp, FMTCFG);
101 CCDC_PRINT_REGISTER(isp, FMT_HORZ);
102 CCDC_PRINT_REGISTER(isp, FMT_VERT);
103 CCDC_PRINT_REGISTER(isp, PRGEVEN0);
104 CCDC_PRINT_REGISTER(isp, PRGEVEN1);
105 CCDC_PRINT_REGISTER(isp, PRGODD0);
106 CCDC_PRINT_REGISTER(isp, PRGODD1);
107 CCDC_PRINT_REGISTER(isp, VP_OUT);
108 CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
109 CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
110 CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
111 CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
112
113 dev_dbg(isp->dev, "--------------------------------------------\n");
114}
115
116/*
117 * omap3isp_ccdc_busy - Get busy state of the CCDC.
118 * @ccdc: Pointer to ISP CCDC device.
119 */
120int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
121{
122 struct isp_device *isp = to_isp_device(ccdc);
123
124 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
125 ISPCCDC_PCR_BUSY;
126}
127
128/* -----------------------------------------------------------------------------
129 * Lens Shading Compensation
130 */
131
132/*
133 * ccdc_lsc_validate_config - Check that LSC configuration is valid.
134 * @ccdc: Pointer to ISP CCDC device.
135 * @lsc_cfg: the LSC configuration to check.
136 *
137 * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
138 */
139static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
140 struct omap3isp_ccdc_lsc_config *lsc_cfg)
141{
142 struct isp_device *isp = to_isp_device(ccdc);
143 struct v4l2_mbus_framefmt *format;
144 unsigned int paxel_width, paxel_height;
145 unsigned int paxel_shift_x, paxel_shift_y;
146 unsigned int min_width, min_height, min_size;
147 unsigned int input_width, input_height;
148
149 paxel_shift_x = lsc_cfg->gain_mode_m;
150 paxel_shift_y = lsc_cfg->gain_mode_n;
151
152 if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
153 (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
154 dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
155 return -EINVAL;
156 }
157
158 if (lsc_cfg->offset & 3) {
159 dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
160 "4\n");
161 return -EINVAL;
162 }
163
164 if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
165 dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
166 return -EINVAL;
167 }
168
169 format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
170 V4L2_SUBDEV_FORMAT_ACTIVE);
171 input_width = format->width;
172 input_height = format->height;
173
174 /* Calculate minimum bytesize for validation */
175 paxel_width = 1 << paxel_shift_x;
176 min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
177 >> paxel_shift_x) + 1;
178
179 paxel_height = 1 << paxel_shift_y;
180 min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
181 >> paxel_shift_y) + 1;
182
183 min_size = 4 * min_width * min_height;
184 if (min_size > lsc_cfg->size) {
185 dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
186 return -EINVAL;
187 }
188 if (lsc_cfg->offset < (min_width * 4)) {
189 dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
190 return -EINVAL;
191 }
192 if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
193 dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
194 return -EINVAL;
195 }
196 return 0;
197}
198
199/*
200 * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
201 * @ccdc: Pointer to ISP CCDC device.
202 */
203static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc, u32 addr)
204{
205 isp_reg_writel(to_isp_device(ccdc), addr,
206 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
207}
208
209/*
210 * ccdc_lsc_setup_regs - Configures the lens shading compensation module
211 * @ccdc: Pointer to ISP CCDC device.
212 */
213static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
214 struct omap3isp_ccdc_lsc_config *cfg)
215{
216 struct isp_device *isp = to_isp_device(ccdc);
217 int reg;
218
219 isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
220 ISPCCDC_LSC_TABLE_OFFSET);
221
222 reg = 0;
223 reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
224 reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
225 reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
226 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
227
228 reg = 0;
229 reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
230 reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
231 reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
232 reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
233 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
234 ISPCCDC_LSC_INITIAL);
235}
236
237static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
238{
239 struct isp_device *isp = to_isp_device(ccdc);
240 unsigned int wait;
241
242 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
243 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
244
245 /* timeout 1 ms */
246 for (wait = 0; wait < 1000; wait++) {
247 if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
248 IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
249 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
250 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
251 return 0;
252 }
253
254 rmb();
255 udelay(1);
256 }
257
258 return -ETIMEDOUT;
259}
260
261/*
262 * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
263 * @ccdc: Pointer to ISP CCDC device.
264 * @enable: 0 Disables LSC, 1 Enables LSC.
265 */
266static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
267{
268 struct isp_device *isp = to_isp_device(ccdc);
269 const struct v4l2_mbus_framefmt *format =
270 __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
271 V4L2_SUBDEV_FORMAT_ACTIVE);
272
273 if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
274 (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
275 (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
276 (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
277 return -EINVAL;
278
279 if (enable)
280 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
281
282 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
283 ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
284
285 if (enable) {
286 if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
287 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
288 ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
289 ccdc->lsc.state = LSC_STATE_STOPPED;
290 dev_warn(to_device(ccdc), "LSC prefecth timeout\n");
291 return -ETIMEDOUT;
292 }
293 ccdc->lsc.state = LSC_STATE_RUNNING;
294 } else {
295 ccdc->lsc.state = LSC_STATE_STOPPING;
296 }
297
298 return 0;
299}
300
301static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
302{
303 struct isp_device *isp = to_isp_device(ccdc);
304
305 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
306 ISPCCDC_LSC_BUSY;
307}
308
309/* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
310 * @ccdc: Pointer to ISP CCDC device
311 * @req: New configuration request
312 *
313 * context: in_interrupt()
314 */
315static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
316 struct ispccdc_lsc_config_req *req)
317{
318 if (!req->enable)
319 return -EINVAL;
320
321 if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
322 dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
323 return -EINVAL;
324 }
325
326 if (ccdc_lsc_busy(ccdc))
327 return -EBUSY;
328
329 ccdc_lsc_setup_regs(ccdc, &req->config);
330 ccdc_lsc_program_table(ccdc, req->table);
331 return 0;
332}
333
334/*
335 * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
336 * @ccdc: Pointer to ISP CCDC device.
337 *
338 * Disables LSC, and defers enablement to shadow registers update time.
339 */
340static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
341{
342 struct isp_device *isp = to_isp_device(ccdc);
343 /*
344 * From OMAP3 TRM: When this event is pending, the module
345 * goes into transparent mode (output =input). Normal
346 * operation can be resumed at the start of the next frame
347 * after:
348 * 1) Clearing this event
349 * 2) Disabling the LSC module
350 * 3) Enabling it
351 */
352 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
353 ISPCCDC_LSC_ENABLE);
354 ccdc->lsc.state = LSC_STATE_STOPPED;
355}
356
357static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
358 struct ispccdc_lsc_config_req *req)
359{
360 struct isp_device *isp = to_isp_device(ccdc);
361
362 if (req == NULL)
363 return;
364
365 if (req->iovm)
366 dma_unmap_sg(isp->dev, req->iovm->sgt->sgl,
367 req->iovm->sgt->nents, DMA_TO_DEVICE);
368 if (req->table)
Ohad Ben-Cohen6c32df42011-08-17 22:57:56 +0300369 omap_iommu_vfree(isp->domain, isp->iommu, req->table);
Laurent Pinchartde1135d2011-02-12 18:05:06 -0300370 kfree(req);
371}
372
373static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
374 struct list_head *queue)
375{
376 struct ispccdc_lsc_config_req *req, *n;
377 unsigned long flags;
378
379 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
380 list_for_each_entry_safe(req, n, queue, list) {
381 list_del(&req->list);
382 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
383 ccdc_lsc_free_request(ccdc, req);
384 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
385 }
386 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
387}
388
389static void ccdc_lsc_free_table_work(struct work_struct *work)
390{
391 struct isp_ccdc_device *ccdc;
392 struct ispccdc_lsc *lsc;
393
394 lsc = container_of(work, struct ispccdc_lsc, table_work);
395 ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
396
397 ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
398}
399
400/*
401 * ccdc_lsc_config - Configure the LSC module from a userspace request
402 *
403 * Store the request LSC configuration in the LSC engine request pointer. The
404 * configuration will be applied to the hardware when the CCDC will be enabled,
405 * or at the next LSC interrupt if the CCDC is already running.
406 */
407static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
408 struct omap3isp_ccdc_update_config *config)
409{
410 struct isp_device *isp = to_isp_device(ccdc);
411 struct ispccdc_lsc_config_req *req;
412 unsigned long flags;
413 void *table;
414 u16 update;
415 int ret;
416
417 update = config->update &
418 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
419 if (!update)
420 return 0;
421
422 if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
423 dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
424 "need to be supplied\n", __func__);
425 return -EINVAL;
426 }
427
428 req = kzalloc(sizeof(*req), GFP_KERNEL);
429 if (req == NULL)
430 return -ENOMEM;
431
432 if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
433 if (copy_from_user(&req->config, config->lsc_cfg,
434 sizeof(req->config))) {
435 ret = -EFAULT;
436 goto done;
437 }
438
439 req->enable = 1;
440
Ohad Ben-Cohen6c32df42011-08-17 22:57:56 +0300441 req->table = omap_iommu_vmalloc(isp->domain, isp->iommu, 0,
Ohad Ben-Cohenf626b522011-06-02 01:46:12 +0300442 req->config.size, IOMMU_FLAG);
Laurent Pinchartde1135d2011-02-12 18:05:06 -0300443 if (IS_ERR_VALUE(req->table)) {
444 req->table = 0;
445 ret = -ENOMEM;
446 goto done;
447 }
448
Ohad Ben-Cohen6c32df42011-08-17 22:57:56 +0300449 req->iovm = omap_find_iovm_area(isp->iommu, req->table);
Laurent Pinchartde1135d2011-02-12 18:05:06 -0300450 if (req->iovm == NULL) {
451 ret = -ENOMEM;
452 goto done;
453 }
454
455 if (!dma_map_sg(isp->dev, req->iovm->sgt->sgl,
456 req->iovm->sgt->nents, DMA_TO_DEVICE)) {
457 ret = -ENOMEM;
458 req->iovm = NULL;
459 goto done;
460 }
461
462 dma_sync_sg_for_cpu(isp->dev, req->iovm->sgt->sgl,
463 req->iovm->sgt->nents, DMA_TO_DEVICE);
464
Ohad Ben-Cohen6c32df42011-08-17 22:57:56 +0300465 table = omap_da_to_va(isp->iommu, req->table);
Laurent Pinchartde1135d2011-02-12 18:05:06 -0300466 if (copy_from_user(table, config->lsc, req->config.size)) {
467 ret = -EFAULT;
468 goto done;
469 }
470
471 dma_sync_sg_for_device(isp->dev, req->iovm->sgt->sgl,
472 req->iovm->sgt->nents, DMA_TO_DEVICE);
473 }
474
475 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
476 if (ccdc->lsc.request) {
477 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
478 schedule_work(&ccdc->lsc.table_work);
479 }
480 ccdc->lsc.request = req;
481 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
482
483 ret = 0;
484
485done:
486 if (ret < 0)
487 ccdc_lsc_free_request(ccdc, req);
488
489 return ret;
490}
491
492static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
493{
494 unsigned long flags;
495
496 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
497 if (ccdc->lsc.active) {
498 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
499 return 1;
500 }
501 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
502 return 0;
503}
504
505static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
506{
507 struct ispccdc_lsc *lsc = &ccdc->lsc;
508
509 if (lsc->state != LSC_STATE_STOPPED)
510 return -EINVAL;
511
512 if (lsc->active) {
513 list_add_tail(&lsc->active->list, &lsc->free_queue);
514 lsc->active = NULL;
515 }
516
517 if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
518 omap3isp_sbl_disable(to_isp_device(ccdc),
519 OMAP3_ISP_SBL_CCDC_LSC_READ);
520 list_add_tail(&lsc->request->list, &lsc->free_queue);
521 lsc->request = NULL;
522 goto done;
523 }
524
525 lsc->active = lsc->request;
526 lsc->request = NULL;
527 __ccdc_lsc_enable(ccdc, 1);
528
529done:
530 if (!list_empty(&lsc->free_queue))
531 schedule_work(&lsc->table_work);
532
533 return 0;
534}
535
536/* -----------------------------------------------------------------------------
537 * Parameters configuration
538 */
539
540/*
541 * ccdc_configure_clamp - Configure optical-black or digital clamping
542 * @ccdc: Pointer to ISP CCDC device.
543 *
544 * The CCDC performs either optical-black or digital clamp. Configure and enable
545 * the selected clamp method.
546 */
547static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
548{
549 struct isp_device *isp = to_isp_device(ccdc);
550 u32 clamp;
551
552 if (ccdc->obclamp) {
553 clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
554 clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
555 clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
556 clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
557 isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
558 } else {
559 isp_reg_writel(isp, ccdc->clamp.dcsubval,
560 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
561 }
562
563 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
564 ISPCCDC_CLAMP_CLAMPEN,
565 ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
566}
567
568/*
569 * ccdc_configure_fpc - Configure Faulty Pixel Correction
570 * @ccdc: Pointer to ISP CCDC device.
571 */
572static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
573{
574 struct isp_device *isp = to_isp_device(ccdc);
575
576 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
577
578 if (!ccdc->fpc_en)
579 return;
580
581 isp_reg_writel(isp, ccdc->fpc.fpcaddr, OMAP3_ISP_IOMEM_CCDC,
582 ISPCCDC_FPC_ADDR);
583 /* The FPNUM field must be set before enabling FPC. */
584 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
585 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
586 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
587 ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
588}
589
590/*
591 * ccdc_configure_black_comp - Configure Black Level Compensation.
592 * @ccdc: Pointer to ISP CCDC device.
593 */
594static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
595{
596 struct isp_device *isp = to_isp_device(ccdc);
597 u32 blcomp;
598
599 blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
600 blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
601 blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
602 blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
603
604 isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
605}
606
607/*
608 * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
609 * @ccdc: Pointer to ISP CCDC device.
610 */
611static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
612{
613 struct isp_device *isp = to_isp_device(ccdc);
614
615 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
616 ISPCCDC_SYN_MODE_LPF,
617 ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
618}
619
620/*
621 * ccdc_configure_alaw - Configure A-law compression.
622 * @ccdc: Pointer to ISP CCDC device.
623 */
624static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
625{
626 struct isp_device *isp = to_isp_device(ccdc);
627 u32 alaw = 0;
628
629 switch (ccdc->syncif.datsz) {
630 case 8:
631 return;
632
633 case 10:
634 alaw = ISPCCDC_ALAW_GWDI_9_0;
635 break;
636 case 11:
637 alaw = ISPCCDC_ALAW_GWDI_10_1;
638 break;
639 case 12:
640 alaw = ISPCCDC_ALAW_GWDI_11_2;
641 break;
642 case 13:
643 alaw = ISPCCDC_ALAW_GWDI_12_3;
644 break;
645 }
646
647 if (ccdc->alaw)
648 alaw |= ISPCCDC_ALAW_CCDTBL;
649
650 isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
651}
652
653/*
654 * ccdc_config_imgattr - Configure sensor image specific attributes.
655 * @ccdc: Pointer to ISP CCDC device.
656 * @colptn: Color pattern of the sensor.
657 */
658static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
659{
660 struct isp_device *isp = to_isp_device(ccdc);
661
662 isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
663}
664
665/*
666 * ccdc_config - Set CCDC configuration from userspace
667 * @ccdc: Pointer to ISP CCDC device.
668 * @userspace_add: Structure containing CCDC configuration sent from userspace.
669 *
670 * Returns 0 if successful, -EINVAL if the pointer to the configuration
671 * structure is null, or the copy_from_user function fails to copy user space
672 * memory to kernel space memory.
673 */
674static int ccdc_config(struct isp_ccdc_device *ccdc,
675 struct omap3isp_ccdc_update_config *ccdc_struct)
676{
677 struct isp_device *isp = to_isp_device(ccdc);
678 unsigned long flags;
679
680 spin_lock_irqsave(&ccdc->lock, flags);
681 ccdc->shadow_update = 1;
682 spin_unlock_irqrestore(&ccdc->lock, flags);
683
684 if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
685 ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
686 ccdc->update |= OMAP3ISP_CCDC_ALAW;
687 }
688
689 if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
690 ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
691 ccdc->update |= OMAP3ISP_CCDC_LPF;
692 }
693
694 if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
695 if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
696 sizeof(ccdc->clamp))) {
697 ccdc->shadow_update = 0;
698 return -EFAULT;
699 }
700
701 ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
702 ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
703 }
704
705 if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
706 if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
707 sizeof(ccdc->blcomp))) {
708 ccdc->shadow_update = 0;
709 return -EFAULT;
710 }
711
712 ccdc->update |= OMAP3ISP_CCDC_BCOMP;
713 }
714
715 ccdc->shadow_update = 0;
716
717 if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
718 u32 table_old = 0;
719 u32 table_new;
720 u32 size;
721
722 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
723 return -EBUSY;
724
725 ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
726
727 if (ccdc->fpc_en) {
728 if (copy_from_user(&ccdc->fpc, ccdc_struct->fpc,
729 sizeof(ccdc->fpc)))
730 return -EFAULT;
731
732 /*
733 * table_new must be 64-bytes aligned, but it's
Ohad Ben-Cohen6c32df42011-08-17 22:57:56 +0300734 * already done by omap_iommu_vmalloc().
Laurent Pinchartde1135d2011-02-12 18:05:06 -0300735 */
736 size = ccdc->fpc.fpnum * 4;
Ohad Ben-Cohen6c32df42011-08-17 22:57:56 +0300737 table_new = omap_iommu_vmalloc(isp->domain, isp->iommu,
738 0, size, IOMMU_FLAG);
Laurent Pinchartde1135d2011-02-12 18:05:06 -0300739 if (IS_ERR_VALUE(table_new))
740 return -ENOMEM;
741
Ohad Ben-Cohen6c32df42011-08-17 22:57:56 +0300742 if (copy_from_user(omap_da_to_va(isp->iommu, table_new),
Laurent Pinchartde1135d2011-02-12 18:05:06 -0300743 (__force void __user *)
744 ccdc->fpc.fpcaddr, size)) {
Ohad Ben-Cohen6c32df42011-08-17 22:57:56 +0300745 omap_iommu_vfree(isp->domain, isp->iommu,
746 table_new);
Laurent Pinchartde1135d2011-02-12 18:05:06 -0300747 return -EFAULT;
748 }
749
750 table_old = ccdc->fpc.fpcaddr;
751 ccdc->fpc.fpcaddr = table_new;
752 }
753
754 ccdc_configure_fpc(ccdc);
755 if (table_old != 0)
Ohad Ben-Cohen6c32df42011-08-17 22:57:56 +0300756 omap_iommu_vfree(isp->domain, isp->iommu, table_old);
Laurent Pinchartde1135d2011-02-12 18:05:06 -0300757 }
758
759 return ccdc_lsc_config(ccdc, ccdc_struct);
760}
761
762static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
763{
764 if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
765 ccdc_configure_alaw(ccdc);
766 ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
767 }
768
769 if (ccdc->update & OMAP3ISP_CCDC_LPF) {
770 ccdc_configure_lpf(ccdc);
771 ccdc->update &= ~OMAP3ISP_CCDC_LPF;
772 }
773
774 if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
775 ccdc_configure_clamp(ccdc);
776 ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
777 }
778
779 if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
780 ccdc_configure_black_comp(ccdc);
781 ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
782 }
783}
784
785/*
786 * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
787 * @dev: Pointer to ISP device
788 */
789void omap3isp_ccdc_restore_context(struct isp_device *isp)
790{
791 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
792
793 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
794
795 ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
796 | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
797 ccdc_apply_controls(ccdc);
798 ccdc_configure_fpc(ccdc);
799}
800
801/* -----------------------------------------------------------------------------
802 * Format- and pipeline-related configuration helpers
803 */
804
805/*
806 * ccdc_config_vp - Configure the Video Port.
807 * @ccdc: Pointer to ISP CCDC device.
808 */
809static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
810{
811 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
812 struct isp_device *isp = to_isp_device(ccdc);
813 unsigned long l3_ick = pipe->l3_ick;
814 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
815 unsigned int div = 0;
816 u32 fmtcfg_vp;
817
818 fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
819 & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
820
821 switch (ccdc->syncif.datsz) {
822 case 8:
823 case 10:
824 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
825 break;
826 case 11:
827 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
828 break;
829 case 12:
830 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
831 break;
832 case 13:
833 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
834 break;
835 };
836
837 if (pipe->input)
838 div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
839 else if (ccdc->vpcfg.pixelclk)
840 div = l3_ick / ccdc->vpcfg.pixelclk;
841
842 div = clamp(div, 2U, max_div);
843 fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
844
845 isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
846}
847
848/*
849 * ccdc_enable_vp - Enable Video Port.
850 * @ccdc: Pointer to ISP CCDC device.
851 * @enable: 0 Disables VP, 1 Enables VP
852 *
853 * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
854 */
855static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
856{
857 struct isp_device *isp = to_isp_device(ccdc);
858
859 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
860 ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
861}
862
863/*
864 * ccdc_config_outlineoffset - Configure memory saving output line offset
865 * @ccdc: Pointer to ISP CCDC device.
866 * @offset: Address offset to start a new line. Must be twice the
867 * Output width and aligned on 32 byte boundary
868 * @oddeven: Specifies the odd/even line pattern to be chosen to store the
869 * output.
870 * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
871 *
872 * - Configures the output line offset when stored in memory
873 * - Sets the odd/even line pattern to store the output
874 * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
875 * - Configures the number of even and odd line fields in case of rearranging
876 * the lines.
877 */
878static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
879 u32 offset, u8 oddeven, u8 numlines)
880{
881 struct isp_device *isp = to_isp_device(ccdc);
882
883 isp_reg_writel(isp, offset & 0xffff,
884 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
885
886 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
887 ISPCCDC_SDOFST_FINV);
888
889 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
890 ISPCCDC_SDOFST_FOFST_4L);
891
892 switch (oddeven) {
893 case EVENEVEN:
894 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
895 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
896 break;
897 case ODDEVEN:
898 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
899 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
900 break;
901 case EVENODD:
902 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
903 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
904 break;
905 case ODDODD:
906 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
907 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
908 break;
909 default:
910 break;
911 }
912}
913
914/*
915 * ccdc_set_outaddr - Set memory address to save output image
916 * @ccdc: Pointer to ISP CCDC device.
917 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
918 *
919 * Sets the memory address where the output will be saved.
920 */
921static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
922{
923 struct isp_device *isp = to_isp_device(ccdc);
924
925 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
926}
927
928/*
929 * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
930 * @ccdc: Pointer to ISP CCDC device.
931 * @max_rate: Maximum calculated data rate.
932 *
933 * Returns in *max_rate less value between calculated and passed
934 */
935void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
936 unsigned int *max_rate)
937{
938 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
939 unsigned int rate;
940
941 if (pipe == NULL)
942 return;
943
944 /*
945 * TRM says that for parallel sensors the maximum data rate
946 * should be 90% form L3/2 clock, otherwise just L3/2.
947 */
948 if (ccdc->input == CCDC_INPUT_PARALLEL)
949 rate = pipe->l3_ick / 2 * 9 / 10;
950 else
951 rate = pipe->l3_ick / 2;
952
953 *max_rate = min(*max_rate, rate);
954}
955
956/*
957 * ccdc_config_sync_if - Set CCDC sync interface configuration
958 * @ccdc: Pointer to ISP CCDC device.
959 * @syncif: Structure containing the sync parameters like field state, CCDC in
960 * master/slave mode, raw/yuv data, polarity of data, field, hs, vs
961 * signals.
962 */
963static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
964 struct ispccdc_syncif *syncif)
965{
966 struct isp_device *isp = to_isp_device(ccdc);
967 u32 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC,
968 ISPCCDC_SYN_MODE);
969
970 syn_mode |= ISPCCDC_SYN_MODE_VDHDEN;
971
972 if (syncif->fldstat)
973 syn_mode |= ISPCCDC_SYN_MODE_FLDSTAT;
974 else
975 syn_mode &= ~ISPCCDC_SYN_MODE_FLDSTAT;
976
977 syn_mode &= ~ISPCCDC_SYN_MODE_DATSIZ_MASK;
978 switch (syncif->datsz) {
979 case 8:
980 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
981 break;
982 case 10:
983 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
984 break;
985 case 11:
986 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
987 break;
988 case 12:
989 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
990 break;
991 };
992
993 if (syncif->fldmode)
994 syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
995 else
996 syn_mode &= ~ISPCCDC_SYN_MODE_FLDMODE;
997
998 if (syncif->datapol)
999 syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
1000 else
1001 syn_mode &= ~ISPCCDC_SYN_MODE_DATAPOL;
1002
1003 if (syncif->fldpol)
1004 syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
1005 else
1006 syn_mode &= ~ISPCCDC_SYN_MODE_FLDPOL;
1007
1008 if (syncif->hdpol)
1009 syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
1010 else
1011 syn_mode &= ~ISPCCDC_SYN_MODE_HDPOL;
1012
1013 if (syncif->vdpol)
1014 syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
1015 else
1016 syn_mode &= ~ISPCCDC_SYN_MODE_VDPOL;
1017
1018 if (syncif->ccdc_mastermode) {
1019 syn_mode |= ISPCCDC_SYN_MODE_FLDOUT | ISPCCDC_SYN_MODE_VDHDOUT;
1020 isp_reg_writel(isp,
1021 syncif->hs_width << ISPCCDC_HD_VD_WID_HDW_SHIFT
1022 | syncif->vs_width << ISPCCDC_HD_VD_WID_VDW_SHIFT,
1023 OMAP3_ISP_IOMEM_CCDC,
1024 ISPCCDC_HD_VD_WID);
1025
1026 isp_reg_writel(isp,
1027 syncif->ppln << ISPCCDC_PIX_LINES_PPLN_SHIFT
1028 | syncif->hlprf << ISPCCDC_PIX_LINES_HLPRF_SHIFT,
1029 OMAP3_ISP_IOMEM_CCDC,
1030 ISPCCDC_PIX_LINES);
1031 } else
1032 syn_mode &= ~(ISPCCDC_SYN_MODE_FLDOUT |
1033 ISPCCDC_SYN_MODE_VDHDOUT);
1034
1035 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1036
1037 if (!syncif->bt_r656_en)
1038 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1039 ISPCCDC_REC656IF_R656ON);
1040}
1041
1042/* CCDC formats descriptions */
1043static const u32 ccdc_sgrbg_pattern =
1044 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1045 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1046 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1047 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1048 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1049 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1050 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1051 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1052 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1053 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1054 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1055 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1056 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1057 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1058 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1059 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1060
1061static const u32 ccdc_srggb_pattern =
1062 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1063 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1064 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1065 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1066 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1067 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1068 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1069 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1070 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1071 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1072 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1073 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1074 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1075 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1076 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1077 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1078
1079static const u32 ccdc_sbggr_pattern =
1080 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1081 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1082 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1083 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1084 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1085 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1086 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1087 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1088 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1089 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1090 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1091 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1092 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1093 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1094 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1095 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1096
1097static const u32 ccdc_sgbrg_pattern =
1098 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1099 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1100 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1101 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1102 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1103 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1104 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1105 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1106 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1107 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1108 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1109 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1110 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1111 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1112 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1113 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1114
1115static void ccdc_configure(struct isp_ccdc_device *ccdc)
1116{
1117 struct isp_device *isp = to_isp_device(ccdc);
1118 struct isp_parallel_platform_data *pdata = NULL;
1119 struct v4l2_subdev *sensor;
1120 struct v4l2_mbus_framefmt *format;
Michael Jonesc09af042011-03-29 05:19:09 -03001121 const struct isp_format_info *fmt_info;
1122 struct v4l2_subdev_format fmt_src;
1123 unsigned int depth_out;
1124 unsigned int depth_in = 0;
Laurent Pinchartde1135d2011-02-12 18:05:06 -03001125 struct media_pad *pad;
1126 unsigned long flags;
Michael Jonesc09af042011-03-29 05:19:09 -03001127 unsigned int shift;
Laurent Pinchartde1135d2011-02-12 18:05:06 -03001128 u32 syn_mode;
1129 u32 ccdc_pattern;
1130
Michael Jonesc09af042011-03-29 05:19:09 -03001131 pad = media_entity_remote_source(&ccdc->pads[CCDC_PAD_SINK]);
1132 sensor = media_entity_to_v4l2_subdev(pad->entity);
1133 if (ccdc->input == CCDC_INPUT_PARALLEL)
Laurent Pinchartde1135d2011-02-12 18:05:06 -03001134 pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
1135 ->bus.parallel;
Michael Jonesc09af042011-03-29 05:19:09 -03001136
1137 /* Compute shift value for lane shifter to configure the bridge. */
1138 fmt_src.pad = pad->index;
1139 fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1140 if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
1141 fmt_info = omap3isp_video_format_info(fmt_src.format.code);
1142 depth_in = fmt_info->bpp;
Laurent Pinchartde1135d2011-02-12 18:05:06 -03001143 }
1144
Michael Jonesc09af042011-03-29 05:19:09 -03001145 fmt_info = omap3isp_video_format_info
1146 (isp->isp_ccdc.formats[CCDC_PAD_SINK].code);
1147 depth_out = fmt_info->bpp;
Laurent Pinchartde1135d2011-02-12 18:05:06 -03001148
Michael Jonesc09af042011-03-29 05:19:09 -03001149 shift = depth_in - depth_out;
1150 omap3isp_configure_bridge(isp, ccdc->input, pdata, shift);
1151
1152 ccdc->syncif.datsz = depth_out;
Laurent Pinchart1752cd52011-05-25 04:16:28 -03001153 ccdc->syncif.hdpol = pdata ? pdata->hs_pol : 0;
1154 ccdc->syncif.vdpol = pdata ? pdata->vs_pol : 0;
Laurent Pinchartde1135d2011-02-12 18:05:06 -03001155 ccdc_config_sync_if(ccdc, &ccdc->syncif);
1156
1157 /* CCDC_PAD_SINK */
1158 format = &ccdc->formats[CCDC_PAD_SINK];
1159
1160 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1161
1162 /* Use the raw, unprocessed data when writing to memory. The H3A and
1163 * histogram modules are still fed with lens shading corrected data.
1164 */
1165 syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
1166
1167 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1168 syn_mode |= ISPCCDC_SYN_MODE_WEN;
1169 else
1170 syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
1171
1172 if (ccdc->output & CCDC_OUTPUT_RESIZER)
1173 syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
1174 else
1175 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1176
1177 /* Use PACK8 mode for 1byte per pixel formats. */
1178 if (omap3isp_video_format_info(format->code)->bpp <= 8)
1179 syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1180 else
1181 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
1182
1183 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1184
1185 /* Mosaic filter */
1186 switch (format->code) {
1187 case V4L2_MBUS_FMT_SRGGB10_1X10:
1188 case V4L2_MBUS_FMT_SRGGB12_1X12:
1189 ccdc_pattern = ccdc_srggb_pattern;
1190 break;
1191 case V4L2_MBUS_FMT_SBGGR10_1X10:
1192 case V4L2_MBUS_FMT_SBGGR12_1X12:
1193 ccdc_pattern = ccdc_sbggr_pattern;
1194 break;
1195 case V4L2_MBUS_FMT_SGBRG10_1X10:
1196 case V4L2_MBUS_FMT_SGBRG12_1X12:
1197 ccdc_pattern = ccdc_sgbrg_pattern;
1198 break;
1199 default:
1200 /* Use GRBG */
1201 ccdc_pattern = ccdc_sgrbg_pattern;
1202 break;
1203 }
1204 ccdc_config_imgattr(ccdc, ccdc_pattern);
1205
1206 /* Generate VD0 on the last line of the image and VD1 on the
1207 * 2/3 height line.
1208 */
1209 isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
1210 ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
1211 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
1212
1213 /* CCDC_PAD_SOURCE_OF */
1214 format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
1215
1216 isp_reg_writel(isp, (0 << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1217 ((format->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
1218 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
1219 isp_reg_writel(isp, 0 << ISPCCDC_VERT_START_SLV0_SHIFT,
1220 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
1221 isp_reg_writel(isp, (format->height - 1)
1222 << ISPCCDC_VERT_LINES_NLV_SHIFT,
1223 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1224
1225 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
1226
1227 /* CCDC_PAD_SOURCE_VP */
1228 format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
1229
1230 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
1231 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
1232 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
1233 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
1234 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
1235 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
1236
1237 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
1238 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
1239 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
1240
1241 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1242 if (ccdc->lsc.request == NULL)
1243 goto unlock;
1244
1245 WARN_ON(ccdc->lsc.active);
1246
1247 /* Get last good LSC configuration. If it is not supported for
1248 * the current active resolution discard it.
1249 */
1250 if (ccdc->lsc.active == NULL &&
1251 __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
1252 ccdc->lsc.active = ccdc->lsc.request;
1253 } else {
1254 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
1255 schedule_work(&ccdc->lsc.table_work);
1256 }
1257
1258 ccdc->lsc.request = NULL;
1259
1260unlock:
1261 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1262
1263 ccdc_apply_controls(ccdc);
1264}
1265
1266static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1267{
1268 struct isp_device *isp = to_isp_device(ccdc);
1269
1270 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1271 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1272}
1273
1274static int ccdc_disable(struct isp_ccdc_device *ccdc)
1275{
1276 unsigned long flags;
1277 int ret = 0;
1278
1279 spin_lock_irqsave(&ccdc->lock, flags);
1280 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1281 ccdc->stopping = CCDC_STOP_REQUEST;
1282 spin_unlock_irqrestore(&ccdc->lock, flags);
1283
1284 ret = wait_event_timeout(ccdc->wait,
1285 ccdc->stopping == CCDC_STOP_FINISHED,
1286 msecs_to_jiffies(2000));
1287 if (ret == 0) {
1288 ret = -ETIMEDOUT;
1289 dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
1290 }
1291
1292 omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
1293
1294 mutex_lock(&ccdc->ioctl_lock);
1295 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
1296 ccdc->lsc.request = ccdc->lsc.active;
1297 ccdc->lsc.active = NULL;
1298 cancel_work_sync(&ccdc->lsc.table_work);
1299 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
1300 mutex_unlock(&ccdc->ioctl_lock);
1301
1302 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
1303
1304 return ret > 0 ? 0 : ret;
1305}
1306
1307static void ccdc_enable(struct isp_ccdc_device *ccdc)
1308{
1309 if (ccdc_lsc_is_configured(ccdc))
1310 __ccdc_lsc_enable(ccdc, 1);
1311 __ccdc_enable(ccdc, 1);
1312}
1313
1314/* -----------------------------------------------------------------------------
1315 * Interrupt handling
1316 */
1317
1318/*
1319 * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1320 * @ccdc: Pointer to ISP CCDC device.
1321 *
1322 * Returns zero if the CCDC is idle and the image has been written to
1323 * memory, too.
1324 */
1325static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
1326{
1327 struct isp_device *isp = to_isp_device(ccdc);
1328
1329 return omap3isp_ccdc_busy(ccdc)
1330 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
1331 ISPSBL_CCDC_WR_0_DATA_READY)
1332 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
1333 ISPSBL_CCDC_WR_0_DATA_READY)
1334 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
1335 ISPSBL_CCDC_WR_0_DATA_READY)
1336 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
1337 ISPSBL_CCDC_WR_0_DATA_READY);
1338}
1339
1340/*
1341 * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1342 * @ccdc: Pointer to ISP CCDC device.
1343 * @max_wait: Max retry count in us for wait for idle/busy transition.
1344 */
1345static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1346 unsigned int max_wait)
1347{
1348 unsigned int wait = 0;
1349
1350 if (max_wait == 0)
1351 max_wait = 10000; /* 10 ms */
1352
1353 for (wait = 0; wait <= max_wait; wait++) {
1354 if (!ccdc_sbl_busy(ccdc))
1355 return 0;
1356
1357 rmb();
1358 udelay(1);
1359 }
1360
1361 return -EBUSY;
1362}
1363
1364/* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1365 * @ccdc: Pointer to ISP CCDC device.
1366 * @event: Pointing which event trigger handler
1367 *
Michael Jones2d4e9d12011-02-28 08:29:03 -03001368 * Return 1 when the event and stopping request combination is satisfied,
Laurent Pinchartde1135d2011-02-12 18:05:06 -03001369 * zero otherwise.
1370 */
1371static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1372{
1373 int rval = 0;
1374
1375 switch ((ccdc->stopping & 3) | event) {
1376 case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
1377 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1378 __ccdc_lsc_enable(ccdc, 0);
1379 __ccdc_enable(ccdc, 0);
1380 ccdc->stopping = CCDC_STOP_EXECUTED;
1381 return 1;
1382
1383 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
1384 ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
1385 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1386 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1387 rval = 1;
1388 break;
1389
1390 case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
1391 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1392 rval = 1;
1393 break;
1394
1395 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
1396 return 1;
1397 }
1398
1399 if (ccdc->stopping == CCDC_STOP_FINISHED) {
1400 wake_up(&ccdc->wait);
1401 rval = 1;
1402 }
1403
1404 return rval;
1405}
1406
1407static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1408{
Laurent Pinchartbd0f2e62011-11-11 11:22:20 -03001409 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
Laurent Pinchartde1135d2011-02-12 18:05:06 -03001410 struct video_device *vdev = &ccdc->subdev.devnode;
1411 struct v4l2_event event;
1412
1413 memset(&event, 0, sizeof(event));
Sakari Ailus69d232a2011-06-15 15:58:48 -03001414 event.type = V4L2_EVENT_FRAME_SYNC;
1415 event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
Laurent Pinchartde1135d2011-02-12 18:05:06 -03001416
1417 v4l2_event_queue(vdev, &event);
1418}
1419
1420/*
1421 * ccdc_lsc_isr - Handle LSC events
1422 * @ccdc: Pointer to ISP CCDC device.
1423 * @events: LSC events
1424 */
1425static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1426{
1427 unsigned long flags;
1428
1429 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
1430 ccdc_lsc_error_handler(ccdc);
1431 ccdc->error = 1;
1432 dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1433 }
1434
1435 if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
1436 return;
1437
1438 /* LSC_DONE interrupt occur, there are two cases
1439 * 1. stopping for reconfiguration
1440 * 2. stopping because of STREAM OFF command
1441 */
1442 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1443
1444 if (ccdc->lsc.state == LSC_STATE_STOPPING)
1445 ccdc->lsc.state = LSC_STATE_STOPPED;
1446
1447 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1448 goto done;
1449
1450 if (ccdc->lsc.state != LSC_STATE_RECONFIG)
1451 goto done;
1452
1453 /* LSC is in STOPPING state, change to the new state */
1454 ccdc->lsc.state = LSC_STATE_STOPPED;
1455
1456 /* This is an exception. Start of frame and LSC_DONE interrupt
1457 * have been received on the same time. Skip this event and wait
1458 * for better times.
1459 */
1460 if (events & IRQ0STATUS_HS_VS_IRQ)
1461 goto done;
1462
1463 /* The LSC engine is stopped at this point. Enable it if there's a
1464 * pending request.
1465 */
1466 if (ccdc->lsc.request == NULL)
1467 goto done;
1468
1469 ccdc_lsc_enable(ccdc);
1470
1471done:
1472 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1473}
1474
1475static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1476{
1477 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1478 struct isp_device *isp = to_isp_device(ccdc);
1479 struct isp_buffer *buffer;
1480 int restart = 0;
1481
1482 /* The CCDC generates VD0 interrupts even when disabled (the datasheet
1483 * doesn't explicitly state if that's supposed to happen or not, so it
1484 * can be considered as a hardware bug or as a feature, but we have to
1485 * deal with it anyway). Disabling the CCDC when no buffer is available
1486 * would thus not be enough, we need to handle the situation explicitly.
1487 */
1488 if (list_empty(&ccdc->video_out.dmaqueue))
1489 goto done;
1490
1491 /* We're in continuous mode, and memory writes were disabled due to a
1492 * buffer underrun. Reenable them now that we have a buffer. The buffer
1493 * address has been set in ccdc_video_queue.
1494 */
1495 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
1496 restart = 1;
1497 ccdc->underrun = 0;
1498 goto done;
1499 }
1500
1501 if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1502 dev_info(isp->dev, "CCDC won't become idle!\n");
1503 goto done;
1504 }
1505
1506 buffer = omap3isp_video_buffer_next(&ccdc->video_out, ccdc->error);
1507 if (buffer != NULL) {
1508 ccdc_set_outaddr(ccdc, buffer->isp_addr);
1509 restart = 1;
1510 }
1511
1512 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1513
1514 if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1515 isp_pipeline_ready(pipe))
1516 omap3isp_pipeline_set_stream(pipe,
1517 ISP_PIPELINE_STREAM_SINGLESHOT);
1518
1519done:
1520 ccdc->error = 0;
1521 return restart;
1522}
1523
1524/*
1525 * ccdc_vd0_isr - Handle VD0 event
1526 * @ccdc: Pointer to ISP CCDC device.
1527 *
1528 * Executes LSC deferred enablement before next frame starts.
1529 */
1530static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1531{
1532 unsigned long flags;
1533 int restart = 0;
1534
1535 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1536 restart = ccdc_isr_buffer(ccdc);
1537
1538 spin_lock_irqsave(&ccdc->lock, flags);
1539 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1540 spin_unlock_irqrestore(&ccdc->lock, flags);
1541 return;
1542 }
1543
1544 if (!ccdc->shadow_update)
1545 ccdc_apply_controls(ccdc);
1546 spin_unlock_irqrestore(&ccdc->lock, flags);
1547
1548 if (restart)
1549 ccdc_enable(ccdc);
1550}
1551
1552/*
1553 * ccdc_vd1_isr - Handle VD1 event
1554 * @ccdc: Pointer to ISP CCDC device.
1555 */
1556static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1557{
1558 unsigned long flags;
1559
1560 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1561
1562 /*
1563 * Depending on the CCDC pipeline state, CCDC stopping should be
1564 * handled differently. In SINGLESHOT we emulate an internal CCDC
1565 * stopping because the CCDC hw works only in continuous mode.
1566 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1567 * data to memory the CCDC and LSC are stopped immediately but
1568 * without change the CCDC stopping state machine. The CCDC
1569 * stopping state machine should be used only when user request
1570 * for stopping is received (SINGLESHOT is an exeption).
1571 */
1572 switch (ccdc->state) {
1573 case ISP_PIPELINE_STREAM_SINGLESHOT:
1574 ccdc->stopping = CCDC_STOP_REQUEST;
1575 break;
1576
1577 case ISP_PIPELINE_STREAM_CONTINUOUS:
1578 if (ccdc->output & CCDC_OUTPUT_MEMORY) {
1579 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1580 __ccdc_lsc_enable(ccdc, 0);
1581 __ccdc_enable(ccdc, 0);
1582 }
1583 break;
1584
1585 case ISP_PIPELINE_STREAM_STOPPED:
1586 break;
1587 }
1588
1589 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1590 goto done;
1591
1592 if (ccdc->lsc.request == NULL)
1593 goto done;
1594
1595 /*
1596 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1597 * do the appropriate changes in registers
1598 */
1599 if (ccdc->lsc.state == LSC_STATE_RUNNING) {
1600 __ccdc_lsc_enable(ccdc, 0);
1601 ccdc->lsc.state = LSC_STATE_RECONFIG;
1602 goto done;
1603 }
1604
1605 /* LSC has been in STOPPED state, enable it */
1606 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1607 ccdc_lsc_enable(ccdc);
1608
1609done:
1610 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1611}
1612
1613/*
1614 * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1615 * @ccdc: Pointer to ISP CCDC device.
1616 * @events: CCDC events
1617 */
1618int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1619{
1620 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
1621 return 0;
1622
1623 if (events & IRQ0STATUS_CCDC_VD1_IRQ)
1624 ccdc_vd1_isr(ccdc);
1625
1626 ccdc_lsc_isr(ccdc, events);
1627
1628 if (events & IRQ0STATUS_CCDC_VD0_IRQ)
1629 ccdc_vd0_isr(ccdc);
1630
1631 if (events & IRQ0STATUS_HS_VS_IRQ)
1632 ccdc_hs_vs_isr(ccdc);
1633
1634 return 0;
1635}
1636
1637/* -----------------------------------------------------------------------------
1638 * ISP video operations
1639 */
1640
1641static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1642{
1643 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1644
1645 if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1646 return -ENODEV;
1647
1648 ccdc_set_outaddr(ccdc, buffer->isp_addr);
1649
Michael Jones2d4e9d12011-02-28 08:29:03 -03001650 /* We now have a buffer queued on the output, restart the pipeline
Laurent Pinchartde1135d2011-02-12 18:05:06 -03001651 * on the next CCDC interrupt if running in continuous mode (or when
1652 * starting the stream).
1653 */
1654 ccdc->underrun = 1;
1655
1656 return 0;
1657}
1658
1659static const struct isp_video_operations ccdc_video_ops = {
1660 .queue = ccdc_video_queue,
1661};
1662
1663/* -----------------------------------------------------------------------------
1664 * V4L2 subdev operations
1665 */
1666
1667/*
1668 * ccdc_ioctl - CCDC module private ioctl's
1669 * @sd: ISP CCDC V4L2 subdevice
1670 * @cmd: ioctl command
1671 * @arg: ioctl argument
1672 *
1673 * Return 0 on success or a negative error code otherwise.
1674 */
1675static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1676{
1677 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1678 int ret;
1679
1680 switch (cmd) {
1681 case VIDIOC_OMAP3ISP_CCDC_CFG:
1682 mutex_lock(&ccdc->ioctl_lock);
1683 ret = ccdc_config(ccdc, arg);
1684 mutex_unlock(&ccdc->ioctl_lock);
1685 break;
1686
1687 default:
1688 return -ENOIOCTLCMD;
1689 }
1690
1691 return ret;
1692}
1693
1694static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1695 struct v4l2_event_subscription *sub)
1696{
Sakari Ailus69d232a2011-06-15 15:58:48 -03001697 if (sub->type != V4L2_EVENT_FRAME_SYNC)
1698 return -EINVAL;
1699
1700 /* line number is zero at frame start */
1701 if (sub->id != 0)
Laurent Pinchartde1135d2011-02-12 18:05:06 -03001702 return -EINVAL;
1703
Hans Verkuilf1e393d2011-06-13 19:24:17 -03001704 return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS);
Laurent Pinchartde1135d2011-02-12 18:05:06 -03001705}
1706
1707static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1708 struct v4l2_event_subscription *sub)
1709{
1710 return v4l2_event_unsubscribe(fh, sub);
1711}
1712
1713/*
1714 * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1715 * @sd: ISP CCDC V4L2 subdevice
1716 * @enable: Enable/disable stream
1717 *
1718 * When writing to memory, the CCDC hardware can't be enabled without a memory
1719 * buffer to write to. As the s_stream operation is called in response to a
1720 * STREAMON call without any buffer queued yet, just update the enabled field
1721 * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1722 *
1723 * When not writing to memory enable the CCDC immediately.
1724 */
1725static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1726{
1727 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1728 struct isp_device *isp = to_isp_device(ccdc);
1729 int ret = 0;
1730
1731 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
1732 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1733 return 0;
1734
1735 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
1736 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1737 ISPCCDC_CFG_VDLC);
1738
1739 ccdc_configure(ccdc);
1740
1741 /* TODO: Don't configure the video port if all of its output
1742 * links are inactive.
1743 */
1744 ccdc_config_vp(ccdc);
1745 ccdc_enable_vp(ccdc, 1);
1746 ccdc->error = 0;
1747 ccdc_print_status(ccdc);
1748 }
1749
1750 switch (enable) {
1751 case ISP_PIPELINE_STREAM_CONTINUOUS:
1752 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1753 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1754
1755 if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
1756 ccdc_enable(ccdc);
1757
1758 ccdc->underrun = 0;
1759 break;
1760
1761 case ISP_PIPELINE_STREAM_SINGLESHOT:
1762 if (ccdc->output & CCDC_OUTPUT_MEMORY &&
1763 ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
1764 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1765
1766 ccdc_enable(ccdc);
1767 break;
1768
1769 case ISP_PIPELINE_STREAM_STOPPED:
1770 ret = ccdc_disable(ccdc);
1771 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1772 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1773 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
1774 ccdc->underrun = 0;
1775 break;
1776 }
1777
1778 ccdc->state = enable;
1779 return ret;
1780}
1781
1782static struct v4l2_mbus_framefmt *
1783__ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1784 unsigned int pad, enum v4l2_subdev_format_whence which)
1785{
1786 if (which == V4L2_SUBDEV_FORMAT_TRY)
1787 return v4l2_subdev_get_try_format(fh, pad);
1788 else
1789 return &ccdc->formats[pad];
1790}
1791
1792/*
1793 * ccdc_try_format - Try video format on a pad
1794 * @ccdc: ISP CCDC device
1795 * @fh : V4L2 subdev file handle
1796 * @pad: Pad number
1797 * @fmt: Format
1798 */
1799static void
1800ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1801 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
1802 enum v4l2_subdev_format_whence which)
1803{
1804 struct v4l2_mbus_framefmt *format;
1805 const struct isp_format_info *info;
1806 unsigned int width = fmt->width;
1807 unsigned int height = fmt->height;
1808 unsigned int i;
1809
1810 switch (pad) {
1811 case CCDC_PAD_SINK:
1812 /* TODO: If the CCDC output formatter pad is connected directly
1813 * to the resizer, only YUV formats can be used.
1814 */
1815 for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
1816 if (fmt->code == ccdc_fmts[i])
1817 break;
1818 }
1819
1820 /* If not found, use SGRBG10 as default */
1821 if (i >= ARRAY_SIZE(ccdc_fmts))
1822 fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
1823
1824 /* Clamp the input size. */
1825 fmt->width = clamp_t(u32, width, 32, 4096);
1826 fmt->height = clamp_t(u32, height, 32, 4096);
1827 break;
1828
1829 case CCDC_PAD_SOURCE_OF:
1830 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
1831 memcpy(fmt, format, sizeof(*fmt));
1832
1833 /* The data formatter truncates the number of horizontal output
1834 * pixels to a multiple of 16. To avoid clipping data, allow
1835 * callers to request an output size bigger than the input size
1836 * up to the nearest multiple of 16.
1837 */
Guennadi Liakhovetski882cc852011-09-29 07:57:00 -03001838 fmt->width = clamp_t(u32, width, 32, fmt->width + 15);
Laurent Pinchartde1135d2011-02-12 18:05:06 -03001839 fmt->width &= ~15;
1840 fmt->height = clamp_t(u32, height, 32, fmt->height);
1841 break;
1842
1843 case CCDC_PAD_SOURCE_VP:
1844 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
1845 memcpy(fmt, format, sizeof(*fmt));
1846
1847 /* The video port interface truncates the data to 10 bits. */
1848 info = omap3isp_video_format_info(fmt->code);
1849 fmt->code = info->truncated;
1850
1851 /* The number of lines that can be clocked out from the video
1852 * port output must be at least one line less than the number
1853 * of input lines.
1854 */
1855 fmt->width = clamp_t(u32, width, 32, fmt->width);
1856 fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
1857 break;
1858 }
1859
1860 /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
1861 * stored on 2 bytes.
1862 */
1863 fmt->colorspace = V4L2_COLORSPACE_SRGB;
1864 fmt->field = V4L2_FIELD_NONE;
1865}
1866
1867/*
1868 * ccdc_enum_mbus_code - Handle pixel format enumeration
1869 * @sd : pointer to v4l2 subdev structure
1870 * @fh : V4L2 subdev file handle
1871 * @code : pointer to v4l2_subdev_mbus_code_enum structure
1872 * return -EINVAL or zero on success
1873 */
1874static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
1875 struct v4l2_subdev_fh *fh,
1876 struct v4l2_subdev_mbus_code_enum *code)
1877{
1878 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1879 struct v4l2_mbus_framefmt *format;
1880
1881 switch (code->pad) {
1882 case CCDC_PAD_SINK:
1883 if (code->index >= ARRAY_SIZE(ccdc_fmts))
1884 return -EINVAL;
1885
1886 code->code = ccdc_fmts[code->index];
1887 break;
1888
1889 case CCDC_PAD_SOURCE_OF:
1890 case CCDC_PAD_SOURCE_VP:
1891 /* No format conversion inside CCDC */
1892 if (code->index != 0)
1893 return -EINVAL;
1894
1895 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK,
1896 V4L2_SUBDEV_FORMAT_TRY);
1897
1898 code->code = format->code;
1899 break;
1900
1901 default:
1902 return -EINVAL;
1903 }
1904
1905 return 0;
1906}
1907
1908static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
1909 struct v4l2_subdev_fh *fh,
1910 struct v4l2_subdev_frame_size_enum *fse)
1911{
1912 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1913 struct v4l2_mbus_framefmt format;
1914
1915 if (fse->index != 0)
1916 return -EINVAL;
1917
1918 format.code = fse->code;
1919 format.width = 1;
1920 format.height = 1;
1921 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
1922 fse->min_width = format.width;
1923 fse->min_height = format.height;
1924
1925 if (format.code != fse->code)
1926 return -EINVAL;
1927
1928 format.code = fse->code;
1929 format.width = -1;
1930 format.height = -1;
1931 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
1932 fse->max_width = format.width;
1933 fse->max_height = format.height;
1934
1935 return 0;
1936}
1937
1938/*
1939 * ccdc_get_format - Retrieve the video format on a pad
1940 * @sd : ISP CCDC V4L2 subdevice
1941 * @fh : V4L2 subdev file handle
1942 * @fmt: Format
1943 *
1944 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
1945 * to the format type.
1946 */
1947static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
1948 struct v4l2_subdev_format *fmt)
1949{
1950 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1951 struct v4l2_mbus_framefmt *format;
1952
1953 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
1954 if (format == NULL)
1955 return -EINVAL;
1956
1957 fmt->format = *format;
1958 return 0;
1959}
1960
1961/*
1962 * ccdc_set_format - Set the video format on a pad
1963 * @sd : ISP CCDC V4L2 subdevice
1964 * @fh : V4L2 subdev file handle
1965 * @fmt: Format
1966 *
1967 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
1968 * to the format type.
1969 */
1970static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
1971 struct v4l2_subdev_format *fmt)
1972{
1973 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1974 struct v4l2_mbus_framefmt *format;
1975
1976 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
1977 if (format == NULL)
1978 return -EINVAL;
1979
1980 ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
1981 *format = fmt->format;
1982
1983 /* Propagate the format from sink to source */
1984 if (fmt->pad == CCDC_PAD_SINK) {
1985 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
1986 fmt->which);
1987 *format = fmt->format;
1988 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
1989 fmt->which);
1990
1991 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
1992 fmt->which);
1993 *format = fmt->format;
1994 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
1995 fmt->which);
1996 }
1997
1998 return 0;
1999}
2000
2001/*
2002 * ccdc_init_formats - Initialize formats on all pads
2003 * @sd: ISP CCDC V4L2 subdevice
2004 * @fh: V4L2 subdev file handle
2005 *
2006 * Initialize all pad formats with default values. If fh is not NULL, try
2007 * formats are initialized on the file handle. Otherwise active formats are
2008 * initialized on the device.
2009 */
2010static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2011{
2012 struct v4l2_subdev_format format;
2013
2014 memset(&format, 0, sizeof(format));
2015 format.pad = CCDC_PAD_SINK;
2016 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2017 format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
2018 format.format.width = 4096;
2019 format.format.height = 4096;
2020 ccdc_set_format(sd, fh, &format);
2021
2022 return 0;
2023}
2024
2025/* V4L2 subdev core operations */
2026static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
2027 .ioctl = ccdc_ioctl,
2028 .subscribe_event = ccdc_subscribe_event,
2029 .unsubscribe_event = ccdc_unsubscribe_event,
2030};
2031
2032/* V4L2 subdev video operations */
2033static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
2034 .s_stream = ccdc_set_stream,
2035};
2036
2037/* V4L2 subdev pad operations */
2038static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
2039 .enum_mbus_code = ccdc_enum_mbus_code,
2040 .enum_frame_size = ccdc_enum_frame_size,
2041 .get_fmt = ccdc_get_format,
2042 .set_fmt = ccdc_set_format,
2043};
2044
2045/* V4L2 subdev operations */
2046static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
2047 .core = &ccdc_v4l2_core_ops,
2048 .video = &ccdc_v4l2_video_ops,
2049 .pad = &ccdc_v4l2_pad_ops,
2050};
2051
2052/* V4L2 subdev internal operations */
2053static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
2054 .open = ccdc_init_formats,
2055};
2056
2057/* -----------------------------------------------------------------------------
2058 * Media entity operations
2059 */
2060
2061/*
2062 * ccdc_link_setup - Setup CCDC connections
2063 * @entity: CCDC media entity
2064 * @local: Pad at the local end of the link
2065 * @remote: Pad at the remote end of the link
2066 * @flags: Link flags
2067 *
2068 * return -EINVAL or zero on success
2069 */
2070static int ccdc_link_setup(struct media_entity *entity,
2071 const struct media_pad *local,
2072 const struct media_pad *remote, u32 flags)
2073{
2074 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2075 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2076 struct isp_device *isp = to_isp_device(ccdc);
2077
2078 switch (local->index | media_entity_type(remote->entity)) {
2079 case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
2080 /* Read from the sensor (parallel interface), CCP2, CSI2a or
2081 * CSI2c.
2082 */
2083 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
2084 ccdc->input = CCDC_INPUT_NONE;
2085 break;
2086 }
2087
2088 if (ccdc->input != CCDC_INPUT_NONE)
2089 return -EBUSY;
2090
2091 if (remote->entity == &isp->isp_ccp2.subdev.entity)
2092 ccdc->input = CCDC_INPUT_CCP2B;
2093 else if (remote->entity == &isp->isp_csi2a.subdev.entity)
2094 ccdc->input = CCDC_INPUT_CSI2A;
2095 else if (remote->entity == &isp->isp_csi2c.subdev.entity)
2096 ccdc->input = CCDC_INPUT_CSI2C;
2097 else
2098 ccdc->input = CCDC_INPUT_PARALLEL;
2099
2100 break;
2101
2102 /*
2103 * The ISP core doesn't support pipelines with multiple video outputs.
2104 * Revisit this when it will be implemented, and return -EBUSY for now.
2105 */
2106
2107 case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
2108 /* Write to preview engine, histogram and H3A. When none of
2109 * those links are active, the video port can be disabled.
2110 */
2111 if (flags & MEDIA_LNK_FL_ENABLED) {
2112 if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
2113 return -EBUSY;
2114 ccdc->output |= CCDC_OUTPUT_PREVIEW;
2115 } else {
2116 ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
2117 }
2118 break;
2119
2120 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
2121 /* Write to memory */
2122 if (flags & MEDIA_LNK_FL_ENABLED) {
2123 if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
2124 return -EBUSY;
2125 ccdc->output |= CCDC_OUTPUT_MEMORY;
2126 } else {
2127 ccdc->output &= ~CCDC_OUTPUT_MEMORY;
2128 }
2129 break;
2130
2131 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
2132 /* Write to resizer */
2133 if (flags & MEDIA_LNK_FL_ENABLED) {
2134 if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
2135 return -EBUSY;
2136 ccdc->output |= CCDC_OUTPUT_RESIZER;
2137 } else {
2138 ccdc->output &= ~CCDC_OUTPUT_RESIZER;
2139 }
2140 break;
2141
2142 default:
2143 return -EINVAL;
2144 }
2145
2146 return 0;
2147}
2148
2149/* media operations */
2150static const struct media_entity_operations ccdc_media_ops = {
2151 .link_setup = ccdc_link_setup,
2152};
2153
Laurent Pinchart39099d02011-09-22 16:59:26 -03002154void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
2155{
2156 v4l2_device_unregister_subdev(&ccdc->subdev);
2157 omap3isp_video_unregister(&ccdc->video_out);
2158}
2159
2160int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
2161 struct v4l2_device *vdev)
2162{
2163 int ret;
2164
2165 /* Register the subdev and video node. */
2166 ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
2167 if (ret < 0)
2168 goto error;
2169
2170 ret = omap3isp_video_register(&ccdc->video_out, vdev);
2171 if (ret < 0)
2172 goto error;
2173
2174 return 0;
2175
2176error:
2177 omap3isp_ccdc_unregister_entities(ccdc);
2178 return ret;
2179}
2180
2181/* -----------------------------------------------------------------------------
2182 * ISP CCDC initialisation and cleanup
2183 */
2184
Laurent Pinchartde1135d2011-02-12 18:05:06 -03002185/*
2186 * ccdc_init_entities - Initialize V4L2 subdev and media entity
2187 * @ccdc: ISP CCDC module
2188 *
2189 * Return 0 on success and a negative error code on failure.
2190 */
2191static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
2192{
2193 struct v4l2_subdev *sd = &ccdc->subdev;
2194 struct media_pad *pads = ccdc->pads;
2195 struct media_entity *me = &sd->entity;
2196 int ret;
2197
2198 ccdc->input = CCDC_INPUT_NONE;
2199
2200 v4l2_subdev_init(sd, &ccdc_v4l2_ops);
2201 sd->internal_ops = &ccdc_v4l2_internal_ops;
2202 strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
2203 sd->grp_id = 1 << 16; /* group ID for isp subdevs */
2204 v4l2_set_subdevdata(sd, ccdc);
2205 sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
Laurent Pinchartde1135d2011-02-12 18:05:06 -03002206
2207 pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
2208 pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
2209 pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
2210
2211 me->ops = &ccdc_media_ops;
2212 ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
2213 if (ret < 0)
2214 return ret;
2215
2216 ccdc_init_formats(sd, NULL);
2217
2218 ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2219 ccdc->video_out.ops = &ccdc_video_ops;
2220 ccdc->video_out.isp = to_isp_device(ccdc);
2221 ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
2222 ccdc->video_out.bpl_alignment = 32;
2223
2224 ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
2225 if (ret < 0)
Laurent Pinchart9b6390b2011-09-22 17:10:30 -03002226 goto error_video;
Laurent Pinchartde1135d2011-02-12 18:05:06 -03002227
2228 /* Connect the CCDC subdev to the video node. */
2229 ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
2230 &ccdc->video_out.video.entity, 0, 0);
2231 if (ret < 0)
Laurent Pinchart9b6390b2011-09-22 17:10:30 -03002232 goto error_link;
Laurent Pinchartde1135d2011-02-12 18:05:06 -03002233
2234 return 0;
Laurent Pinchart9b6390b2011-09-22 17:10:30 -03002235
2236error_link:
2237 omap3isp_video_cleanup(&ccdc->video_out);
2238error_video:
2239 media_entity_cleanup(me);
2240 return ret;
Laurent Pinchartde1135d2011-02-12 18:05:06 -03002241}
2242
Laurent Pinchartde1135d2011-02-12 18:05:06 -03002243/*
2244 * omap3isp_ccdc_init - CCDC module initialization.
2245 * @dev: Device pointer specific to the OMAP3 ISP.
2246 *
2247 * TODO: Get the initialisation values from platform data.
2248 *
2249 * Return 0 on success or a negative error code otherwise.
2250 */
2251int omap3isp_ccdc_init(struct isp_device *isp)
2252{
2253 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
Laurent Pinchart9b6390b2011-09-22 17:10:30 -03002254 int ret;
Laurent Pinchartde1135d2011-02-12 18:05:06 -03002255
2256 spin_lock_init(&ccdc->lock);
2257 init_waitqueue_head(&ccdc->wait);
2258 mutex_init(&ccdc->ioctl_lock);
2259
2260 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
2261
2262 INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
2263 ccdc->lsc.state = LSC_STATE_STOPPED;
2264 INIT_LIST_HEAD(&ccdc->lsc.free_queue);
2265 spin_lock_init(&ccdc->lsc.req_lock);
2266
2267 ccdc->syncif.ccdc_mastermode = 0;
2268 ccdc->syncif.datapol = 0;
2269 ccdc->syncif.datsz = 0;
2270 ccdc->syncif.fldmode = 0;
2271 ccdc->syncif.fldout = 0;
2272 ccdc->syncif.fldpol = 0;
2273 ccdc->syncif.fldstat = 0;
Laurent Pinchartde1135d2011-02-12 18:05:06 -03002274
2275 ccdc->clamp.oblen = 0;
2276 ccdc->clamp.dcsubval = 0;
2277
2278 ccdc->vpcfg.pixelclk = 0;
2279
2280 ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
2281 ccdc_apply_controls(ccdc);
2282
Laurent Pinchart9b6390b2011-09-22 17:10:30 -03002283 ret = ccdc_init_entities(ccdc);
2284 if (ret < 0) {
2285 mutex_destroy(&ccdc->ioctl_lock);
2286 return ret;
2287 }
2288
2289 return 0;
Laurent Pinchartde1135d2011-02-12 18:05:06 -03002290}
2291
2292/*
2293 * omap3isp_ccdc_cleanup - CCDC module cleanup.
2294 * @dev: Device pointer specific to the OMAP3 ISP.
2295 */
2296void omap3isp_ccdc_cleanup(struct isp_device *isp)
2297{
2298 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2299
Laurent Pinchart63b4ca22011-09-22 16:54:34 -03002300 omap3isp_video_cleanup(&ccdc->video_out);
2301 media_entity_cleanup(&ccdc->subdev.entity);
2302
Laurent Pinchartde1135d2011-02-12 18:05:06 -03002303 /* Free LSC requests. As the CCDC is stopped there's no active request,
2304 * so only the pending request and the free queue need to be handled.
2305 */
2306 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
2307 cancel_work_sync(&ccdc->lsc.table_work);
2308 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
2309
2310 if (ccdc->fpc.fpcaddr != 0)
Ohad Ben-Cohen6c32df42011-08-17 22:57:56 +03002311 omap_iommu_vfree(isp->domain, isp->iommu, ccdc->fpc.fpcaddr);
Laurent Pincharted33ac82011-09-22 17:09:26 -03002312
2313 mutex_destroy(&ccdc->ioctl_lock);
Laurent Pinchartde1135d2011-02-12 18:05:06 -03002314}