Steve Sakoman | cc17557 | 2008-10-30 21:35:26 -0700 | [diff] [blame] | 1 | /* |
| 2 | * ALSA SoC TWL4030 codec driver |
| 3 | * |
| 4 | * Author: Steve Sakoman, <steve@sakoman.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * version 2 as published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, but |
| 11 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 13 | * General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA |
| 18 | * 02110-1301 USA |
| 19 | * |
| 20 | */ |
| 21 | |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/moduleparam.h> |
| 24 | #include <linux/init.h> |
| 25 | #include <linux/delay.h> |
| 26 | #include <linux/pm.h> |
| 27 | #include <linux/i2c.h> |
| 28 | #include <linux/platform_device.h> |
| 29 | #include <linux/i2c/twl4030.h> |
| 30 | #include <sound/core.h> |
| 31 | #include <sound/pcm.h> |
| 32 | #include <sound/pcm_params.h> |
| 33 | #include <sound/soc.h> |
| 34 | #include <sound/soc-dapm.h> |
| 35 | #include <sound/initval.h> |
Peter Ujfalusi | c10b82c | 2008-11-24 13:49:35 +0200 | [diff] [blame^] | 36 | #include <sound/tlv.h> |
Steve Sakoman | cc17557 | 2008-10-30 21:35:26 -0700 | [diff] [blame] | 37 | |
| 38 | #include "twl4030.h" |
| 39 | |
| 40 | /* |
| 41 | * twl4030 register cache & default register settings |
| 42 | */ |
| 43 | static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { |
| 44 | 0x00, /* this register not used */ |
| 45 | 0x93, /* REG_CODEC_MODE (0x1) */ |
| 46 | 0xc3, /* REG_OPTION (0x2) */ |
| 47 | 0x00, /* REG_UNKNOWN (0x3) */ |
| 48 | 0x00, /* REG_MICBIAS_CTL (0x4) */ |
| 49 | 0x24, /* REG_ANAMICL (0x5) */ |
| 50 | 0x04, /* REG_ANAMICR (0x6) */ |
| 51 | 0x0a, /* REG_AVADC_CTL (0x7) */ |
| 52 | 0x00, /* REG_ADCMICSEL (0x8) */ |
| 53 | 0x00, /* REG_DIGMIXING (0x9) */ |
| 54 | 0x0c, /* REG_ATXL1PGA (0xA) */ |
| 55 | 0x0c, /* REG_ATXR1PGA (0xB) */ |
| 56 | 0x00, /* REG_AVTXL2PGA (0xC) */ |
| 57 | 0x00, /* REG_AVTXR2PGA (0xD) */ |
| 58 | 0x01, /* REG_AUDIO_IF (0xE) */ |
| 59 | 0x00, /* REG_VOICE_IF (0xF) */ |
| 60 | 0x00, /* REG_ARXR1PGA (0x10) */ |
| 61 | 0x00, /* REG_ARXL1PGA (0x11) */ |
| 62 | 0x6c, /* REG_ARXR2PGA (0x12) */ |
| 63 | 0x6c, /* REG_ARXL2PGA (0x13) */ |
| 64 | 0x00, /* REG_VRXPGA (0x14) */ |
| 65 | 0x00, /* REG_VSTPGA (0x15) */ |
| 66 | 0x00, /* REG_VRX2ARXPGA (0x16) */ |
| 67 | 0x0c, /* REG_AVDAC_CTL (0x17) */ |
| 68 | 0x00, /* REG_ARX2VTXPGA (0x18) */ |
| 69 | 0x00, /* REG_ARXL1_APGA_CTL (0x19) */ |
| 70 | 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */ |
| 71 | 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */ |
| 72 | 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */ |
| 73 | 0x00, /* REG_ATX2ARXPGA (0x1D) */ |
| 74 | 0x00, /* REG_BT_IF (0x1E) */ |
| 75 | 0x00, /* REG_BTPGA (0x1F) */ |
| 76 | 0x00, /* REG_BTSTPGA (0x20) */ |
| 77 | 0x00, /* REG_EAR_CTL (0x21) */ |
| 78 | 0x24, /* REG_HS_SEL (0x22) */ |
| 79 | 0x0a, /* REG_HS_GAIN_SET (0x23) */ |
| 80 | 0x00, /* REG_HS_POPN_SET (0x24) */ |
| 81 | 0x00, /* REG_PREDL_CTL (0x25) */ |
| 82 | 0x00, /* REG_PREDR_CTL (0x26) */ |
| 83 | 0x00, /* REG_PRECKL_CTL (0x27) */ |
| 84 | 0x00, /* REG_PRECKR_CTL (0x28) */ |
| 85 | 0x00, /* REG_HFL_CTL (0x29) */ |
| 86 | 0x00, /* REG_HFR_CTL (0x2A) */ |
| 87 | 0x00, /* REG_ALC_CTL (0x2B) */ |
| 88 | 0x00, /* REG_ALC_SET1 (0x2C) */ |
| 89 | 0x00, /* REG_ALC_SET2 (0x2D) */ |
| 90 | 0x00, /* REG_BOOST_CTL (0x2E) */ |
Peter Ujfalusi | f8d05bd | 2008-11-24 08:25:45 +0200 | [diff] [blame] | 91 | 0x00, /* REG_SOFTVOL_CTL (0x2F) */ |
Steve Sakoman | cc17557 | 2008-10-30 21:35:26 -0700 | [diff] [blame] | 92 | 0x00, /* REG_DTMF_FREQSEL (0x30) */ |
| 93 | 0x00, /* REG_DTMF_TONEXT1H (0x31) */ |
| 94 | 0x00, /* REG_DTMF_TONEXT1L (0x32) */ |
| 95 | 0x00, /* REG_DTMF_TONEXT2H (0x33) */ |
| 96 | 0x00, /* REG_DTMF_TONEXT2L (0x34) */ |
| 97 | 0x00, /* REG_DTMF_TONOFF (0x35) */ |
| 98 | 0x00, /* REG_DTMF_WANONOFF (0x36) */ |
| 99 | 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */ |
| 100 | 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */ |
| 101 | 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */ |
| 102 | 0x16, /* REG_APLL_CTL (0x3A) */ |
| 103 | 0x00, /* REG_DTMF_CTL (0x3B) */ |
| 104 | 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */ |
| 105 | 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */ |
| 106 | 0x00, /* REG_MISC_SET_1 (0x3E) */ |
| 107 | 0x00, /* REG_PCMBTMUX (0x3F) */ |
| 108 | 0x00, /* not used (0x40) */ |
| 109 | 0x00, /* not used (0x41) */ |
| 110 | 0x00, /* not used (0x42) */ |
| 111 | 0x00, /* REG_RX_PATH_SEL (0x43) */ |
| 112 | 0x00, /* REG_VDL_APGA_CTL (0x44) */ |
| 113 | 0x00, /* REG_VIBRA_CTL (0x45) */ |
| 114 | 0x00, /* REG_VIBRA_SET (0x46) */ |
| 115 | 0x00, /* REG_VIBRA_PWM_SET (0x47) */ |
| 116 | 0x00, /* REG_ANAMIC_GAIN (0x48) */ |
| 117 | 0x00, /* REG_MISC_SET_2 (0x49) */ |
| 118 | }; |
| 119 | |
| 120 | /* |
| 121 | * read twl4030 register cache |
| 122 | */ |
| 123 | static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec, |
| 124 | unsigned int reg) |
| 125 | { |
| 126 | u8 *cache = codec->reg_cache; |
| 127 | |
| 128 | return cache[reg]; |
| 129 | } |
| 130 | |
| 131 | /* |
| 132 | * write twl4030 register cache |
| 133 | */ |
| 134 | static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec, |
| 135 | u8 reg, u8 value) |
| 136 | { |
| 137 | u8 *cache = codec->reg_cache; |
| 138 | |
| 139 | if (reg >= TWL4030_CACHEREGNUM) |
| 140 | return; |
| 141 | cache[reg] = value; |
| 142 | } |
| 143 | |
| 144 | /* |
| 145 | * write to the twl4030 register space |
| 146 | */ |
| 147 | static int twl4030_write(struct snd_soc_codec *codec, |
| 148 | unsigned int reg, unsigned int value) |
| 149 | { |
| 150 | twl4030_write_reg_cache(codec, reg, value); |
| 151 | return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg); |
| 152 | } |
| 153 | |
| 154 | static void twl4030_clear_codecpdz(struct snd_soc_codec *codec) |
| 155 | { |
| 156 | u8 mode; |
| 157 | |
| 158 | mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE); |
| 159 | twl4030_write(codec, TWL4030_REG_CODEC_MODE, |
| 160 | mode & ~TWL4030_CODECPDZ); |
| 161 | |
| 162 | /* REVISIT: this delay is present in TI sample drivers */ |
| 163 | /* but there seems to be no TRM requirement for it */ |
| 164 | udelay(10); |
| 165 | } |
| 166 | |
| 167 | static void twl4030_set_codecpdz(struct snd_soc_codec *codec) |
| 168 | { |
| 169 | u8 mode; |
| 170 | |
| 171 | mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE); |
| 172 | twl4030_write(codec, TWL4030_REG_CODEC_MODE, |
| 173 | mode | TWL4030_CODECPDZ); |
| 174 | |
| 175 | /* REVISIT: this delay is present in TI sample drivers */ |
| 176 | /* but there seems to be no TRM requirement for it */ |
| 177 | udelay(10); |
| 178 | } |
| 179 | |
| 180 | static void twl4030_init_chip(struct snd_soc_codec *codec) |
| 181 | { |
| 182 | int i; |
| 183 | |
| 184 | /* clear CODECPDZ prior to setting register defaults */ |
| 185 | twl4030_clear_codecpdz(codec); |
| 186 | |
| 187 | /* set all audio section registers to reasonable defaults */ |
| 188 | for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++) |
| 189 | twl4030_write(codec, i, twl4030_reg[i]); |
| 190 | |
| 191 | } |
| 192 | |
Peter Ujfalusi | c10b82c | 2008-11-24 13:49:35 +0200 | [diff] [blame^] | 193 | /* |
| 194 | * FGAIN volume control: |
| 195 | * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB) |
| 196 | */ |
| 197 | static DECLARE_TLV_DB_SCALE(master_tlv, -6300, 100, 1); |
| 198 | |
Steve Sakoman | cc17557 | 2008-10-30 21:35:26 -0700 | [diff] [blame] | 199 | static const struct snd_kcontrol_new twl4030_snd_controls[] = { |
Peter Ujfalusi | c10b82c | 2008-11-24 13:49:35 +0200 | [diff] [blame^] | 200 | SOC_DOUBLE_R_TLV("Master Playback Volume", |
Steve Sakoman | cc17557 | 2008-10-30 21:35:26 -0700 | [diff] [blame] | 201 | TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA, |
Peter Ujfalusi | c10b82c | 2008-11-24 13:49:35 +0200 | [diff] [blame^] | 202 | 0, 0x3f, 0, master_tlv), |
Steve Sakoman | cc17557 | 2008-10-30 21:35:26 -0700 | [diff] [blame] | 203 | SOC_DOUBLE_R("Capture Volume", |
| 204 | TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA, |
Peter Ujfalusi | 6e5d9db | 2008-11-14 08:57:28 +0200 | [diff] [blame] | 205 | 0, 0x1f, 0), |
Steve Sakoman | cc17557 | 2008-10-30 21:35:26 -0700 | [diff] [blame] | 206 | }; |
| 207 | |
| 208 | /* add non dapm controls */ |
| 209 | static int twl4030_add_controls(struct snd_soc_codec *codec) |
| 210 | { |
| 211 | int err, i; |
| 212 | |
| 213 | for (i = 0; i < ARRAY_SIZE(twl4030_snd_controls); i++) { |
| 214 | err = snd_ctl_add(codec->card, |
| 215 | snd_soc_cnew(&twl4030_snd_controls[i], |
| 216 | codec, NULL)); |
| 217 | if (err < 0) |
| 218 | return err; |
| 219 | } |
| 220 | |
| 221 | return 0; |
| 222 | } |
| 223 | |
| 224 | static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = { |
| 225 | SND_SOC_DAPM_INPUT("INL"), |
| 226 | SND_SOC_DAPM_INPUT("INR"), |
| 227 | |
| 228 | SND_SOC_DAPM_OUTPUT("OUTL"), |
| 229 | SND_SOC_DAPM_OUTPUT("OUTR"), |
| 230 | |
| 231 | SND_SOC_DAPM_DAC("DACL", "Left Playback", SND_SOC_NOPM, 0, 0), |
| 232 | SND_SOC_DAPM_DAC("DACR", "Right Playback", SND_SOC_NOPM, 0, 0), |
| 233 | |
| 234 | SND_SOC_DAPM_ADC("ADCL", "Left Capture", SND_SOC_NOPM, 0, 0), |
| 235 | SND_SOC_DAPM_ADC("ADCR", "Right Capture", SND_SOC_NOPM, 0, 0), |
| 236 | }; |
| 237 | |
| 238 | static const struct snd_soc_dapm_route intercon[] = { |
| 239 | /* outputs */ |
| 240 | {"OUTL", NULL, "DACL"}, |
| 241 | {"OUTR", NULL, "DACR"}, |
| 242 | |
| 243 | /* inputs */ |
| 244 | {"ADCL", NULL, "INL"}, |
| 245 | {"ADCR", NULL, "INR"}, |
| 246 | }; |
| 247 | |
| 248 | static int twl4030_add_widgets(struct snd_soc_codec *codec) |
| 249 | { |
| 250 | snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets, |
| 251 | ARRAY_SIZE(twl4030_dapm_widgets)); |
| 252 | |
| 253 | snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon)); |
| 254 | |
| 255 | snd_soc_dapm_new_widgets(codec); |
| 256 | return 0; |
| 257 | } |
| 258 | |
| 259 | static void twl4030_power_up(struct snd_soc_codec *codec) |
| 260 | { |
| 261 | u8 anamicl, regmisc1, byte, popn, hsgain; |
| 262 | int i = 0; |
| 263 | |
| 264 | /* set CODECPDZ to turn on codec */ |
| 265 | twl4030_set_codecpdz(codec); |
| 266 | |
| 267 | /* initiate offset cancellation */ |
| 268 | anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL); |
| 269 | twl4030_write(codec, TWL4030_REG_ANAMICL, |
| 270 | anamicl | TWL4030_CNCL_OFFSET_START); |
| 271 | |
| 272 | /* wait for offset cancellation to complete */ |
| 273 | do { |
| 274 | /* this takes a little while, so don't slam i2c */ |
| 275 | udelay(2000); |
| 276 | twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, |
| 277 | TWL4030_REG_ANAMICL); |
| 278 | } while ((i++ < 100) && |
| 279 | ((byte & TWL4030_CNCL_OFFSET_START) == |
| 280 | TWL4030_CNCL_OFFSET_START)); |
| 281 | |
| 282 | /* anti-pop when changing analog gain */ |
| 283 | regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1); |
| 284 | twl4030_write(codec, TWL4030_REG_MISC_SET_1, |
| 285 | regmisc1 | TWL4030_SMOOTH_ANAVOL_EN); |
| 286 | |
| 287 | /* toggle CODECPDZ as per TRM */ |
| 288 | twl4030_clear_codecpdz(codec); |
| 289 | twl4030_set_codecpdz(codec); |
| 290 | |
| 291 | /* program anti-pop with bias ramp delay */ |
| 292 | popn = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET); |
| 293 | popn &= TWL4030_RAMP_DELAY; |
| 294 | popn |= TWL4030_RAMP_DELAY_645MS; |
| 295 | twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn); |
| 296 | popn |= TWL4030_VMID_EN; |
| 297 | twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn); |
| 298 | |
| 299 | /* enable output stage and gain setting */ |
| 300 | hsgain = TWL4030_HSR_GAIN_0DB | TWL4030_HSL_GAIN_0DB; |
| 301 | twl4030_write(codec, TWL4030_REG_HS_GAIN_SET, hsgain); |
| 302 | |
| 303 | /* enable anti-pop ramp */ |
| 304 | popn |= TWL4030_RAMP_EN; |
| 305 | twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn); |
| 306 | } |
| 307 | |
| 308 | static void twl4030_power_down(struct snd_soc_codec *codec) |
| 309 | { |
| 310 | u8 popn, hsgain; |
| 311 | |
| 312 | /* disable anti-pop ramp */ |
| 313 | popn = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET); |
| 314 | popn &= ~TWL4030_RAMP_EN; |
| 315 | twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn); |
| 316 | |
| 317 | /* disable output stage and gain setting */ |
| 318 | hsgain = TWL4030_HSR_GAIN_PWR_DOWN | TWL4030_HSL_GAIN_PWR_DOWN; |
| 319 | twl4030_write(codec, TWL4030_REG_HS_GAIN_SET, hsgain); |
| 320 | |
| 321 | /* disable bias out */ |
| 322 | popn &= ~TWL4030_VMID_EN; |
| 323 | twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn); |
| 324 | |
| 325 | /* power down */ |
| 326 | twl4030_clear_codecpdz(codec); |
| 327 | } |
| 328 | |
| 329 | static int twl4030_set_bias_level(struct snd_soc_codec *codec, |
| 330 | enum snd_soc_bias_level level) |
| 331 | { |
| 332 | switch (level) { |
| 333 | case SND_SOC_BIAS_ON: |
| 334 | twl4030_power_up(codec); |
| 335 | break; |
| 336 | case SND_SOC_BIAS_PREPARE: |
| 337 | /* TODO: develop a twl4030_prepare function */ |
| 338 | break; |
| 339 | case SND_SOC_BIAS_STANDBY: |
| 340 | /* TODO: develop a twl4030_standby function */ |
| 341 | twl4030_power_down(codec); |
| 342 | break; |
| 343 | case SND_SOC_BIAS_OFF: |
| 344 | twl4030_power_down(codec); |
| 345 | break; |
| 346 | } |
| 347 | codec->bias_level = level; |
| 348 | |
| 349 | return 0; |
| 350 | } |
| 351 | |
| 352 | static int twl4030_hw_params(struct snd_pcm_substream *substream, |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 353 | struct snd_pcm_hw_params *params, |
| 354 | struct snd_soc_dai *dai) |
Steve Sakoman | cc17557 | 2008-10-30 21:35:26 -0700 | [diff] [blame] | 355 | { |
| 356 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 357 | struct snd_soc_device *socdev = rtd->socdev; |
| 358 | struct snd_soc_codec *codec = socdev->codec; |
| 359 | u8 mode, old_mode, format, old_format; |
| 360 | |
| 361 | |
| 362 | /* bit rate */ |
| 363 | old_mode = twl4030_read_reg_cache(codec, |
| 364 | TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ; |
| 365 | mode = old_mode & ~TWL4030_APLL_RATE; |
| 366 | |
| 367 | switch (params_rate(params)) { |
| 368 | case 8000: |
| 369 | mode |= TWL4030_APLL_RATE_8000; |
| 370 | break; |
| 371 | case 11025: |
| 372 | mode |= TWL4030_APLL_RATE_11025; |
| 373 | break; |
| 374 | case 12000: |
| 375 | mode |= TWL4030_APLL_RATE_12000; |
| 376 | break; |
| 377 | case 16000: |
| 378 | mode |= TWL4030_APLL_RATE_16000; |
| 379 | break; |
| 380 | case 22050: |
| 381 | mode |= TWL4030_APLL_RATE_22050; |
| 382 | break; |
| 383 | case 24000: |
| 384 | mode |= TWL4030_APLL_RATE_24000; |
| 385 | break; |
| 386 | case 32000: |
| 387 | mode |= TWL4030_APLL_RATE_32000; |
| 388 | break; |
| 389 | case 44100: |
| 390 | mode |= TWL4030_APLL_RATE_44100; |
| 391 | break; |
| 392 | case 48000: |
| 393 | mode |= TWL4030_APLL_RATE_48000; |
| 394 | break; |
| 395 | default: |
| 396 | printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n", |
| 397 | params_rate(params)); |
| 398 | return -EINVAL; |
| 399 | } |
| 400 | |
| 401 | if (mode != old_mode) { |
| 402 | /* change rate and set CODECPDZ */ |
| 403 | twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode); |
| 404 | twl4030_set_codecpdz(codec); |
| 405 | } |
| 406 | |
| 407 | /* sample size */ |
| 408 | old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF); |
| 409 | format = old_format; |
| 410 | format &= ~TWL4030_DATA_WIDTH; |
| 411 | switch (params_format(params)) { |
| 412 | case SNDRV_PCM_FORMAT_S16_LE: |
| 413 | format |= TWL4030_DATA_WIDTH_16S_16W; |
| 414 | break; |
| 415 | case SNDRV_PCM_FORMAT_S24_LE: |
| 416 | format |= TWL4030_DATA_WIDTH_32S_24W; |
| 417 | break; |
| 418 | default: |
| 419 | printk(KERN_ERR "TWL4030 hw params: unknown format %d\n", |
| 420 | params_format(params)); |
| 421 | return -EINVAL; |
| 422 | } |
| 423 | |
| 424 | if (format != old_format) { |
| 425 | |
| 426 | /* clear CODECPDZ before changing format (codec requirement) */ |
| 427 | twl4030_clear_codecpdz(codec); |
| 428 | |
| 429 | /* change format */ |
| 430 | twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); |
| 431 | |
| 432 | /* set CODECPDZ afterwards */ |
| 433 | twl4030_set_codecpdz(codec); |
| 434 | } |
| 435 | return 0; |
| 436 | } |
| 437 | |
| 438 | static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
| 439 | int clk_id, unsigned int freq, int dir) |
| 440 | { |
| 441 | struct snd_soc_codec *codec = codec_dai->codec; |
| 442 | u8 infreq; |
| 443 | |
| 444 | switch (freq) { |
| 445 | case 19200000: |
| 446 | infreq = TWL4030_APLL_INFREQ_19200KHZ; |
| 447 | break; |
| 448 | case 26000000: |
| 449 | infreq = TWL4030_APLL_INFREQ_26000KHZ; |
| 450 | break; |
| 451 | case 38400000: |
| 452 | infreq = TWL4030_APLL_INFREQ_38400KHZ; |
| 453 | break; |
| 454 | default: |
| 455 | printk(KERN_ERR "TWL4030 set sysclk: unknown rate %d\n", |
| 456 | freq); |
| 457 | return -EINVAL; |
| 458 | } |
| 459 | |
| 460 | infreq |= TWL4030_APLL_EN; |
| 461 | twl4030_write(codec, TWL4030_REG_APLL_CTL, infreq); |
| 462 | |
| 463 | return 0; |
| 464 | } |
| 465 | |
| 466 | static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, |
| 467 | unsigned int fmt) |
| 468 | { |
| 469 | struct snd_soc_codec *codec = codec_dai->codec; |
| 470 | u8 old_format, format; |
| 471 | |
| 472 | /* get format */ |
| 473 | old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF); |
| 474 | format = old_format; |
| 475 | |
| 476 | /* set master/slave audio interface */ |
| 477 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 478 | case SND_SOC_DAIFMT_CBM_CFM: |
| 479 | format &= ~(TWL4030_AIF_SLAVE_EN); |
Grazvydas Ignotas | e18c94d | 2008-11-05 23:51:05 +0200 | [diff] [blame] | 480 | format &= ~(TWL4030_CLK256FS_EN); |
Steve Sakoman | cc17557 | 2008-10-30 21:35:26 -0700 | [diff] [blame] | 481 | break; |
| 482 | case SND_SOC_DAIFMT_CBS_CFS: |
Steve Sakoman | cc17557 | 2008-10-30 21:35:26 -0700 | [diff] [blame] | 483 | format |= TWL4030_AIF_SLAVE_EN; |
Grazvydas Ignotas | e18c94d | 2008-11-05 23:51:05 +0200 | [diff] [blame] | 484 | format |= TWL4030_CLK256FS_EN; |
Steve Sakoman | cc17557 | 2008-10-30 21:35:26 -0700 | [diff] [blame] | 485 | break; |
| 486 | default: |
| 487 | return -EINVAL; |
| 488 | } |
| 489 | |
| 490 | /* interface format */ |
| 491 | format &= ~TWL4030_AIF_FORMAT; |
| 492 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 493 | case SND_SOC_DAIFMT_I2S: |
| 494 | format |= TWL4030_AIF_FORMAT_CODEC; |
| 495 | break; |
| 496 | default: |
| 497 | return -EINVAL; |
| 498 | } |
| 499 | |
| 500 | if (format != old_format) { |
| 501 | |
| 502 | /* clear CODECPDZ before changing format (codec requirement) */ |
| 503 | twl4030_clear_codecpdz(codec); |
| 504 | |
| 505 | /* change format */ |
| 506 | twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); |
| 507 | |
| 508 | /* set CODECPDZ afterwards */ |
| 509 | twl4030_set_codecpdz(codec); |
| 510 | } |
| 511 | |
| 512 | return 0; |
| 513 | } |
| 514 | |
Jarkko Nikula | bbba944 | 2008-11-12 17:05:41 +0200 | [diff] [blame] | 515 | #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000) |
Steve Sakoman | cc17557 | 2008-10-30 21:35:26 -0700 | [diff] [blame] | 516 | #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE) |
| 517 | |
| 518 | struct snd_soc_dai twl4030_dai = { |
| 519 | .name = "twl4030", |
| 520 | .playback = { |
| 521 | .stream_name = "Playback", |
| 522 | .channels_min = 2, |
| 523 | .channels_max = 2, |
| 524 | .rates = TWL4030_RATES, |
| 525 | .formats = TWL4030_FORMATS,}, |
| 526 | .capture = { |
| 527 | .stream_name = "Capture", |
| 528 | .channels_min = 2, |
| 529 | .channels_max = 2, |
| 530 | .rates = TWL4030_RATES, |
| 531 | .formats = TWL4030_FORMATS,}, |
| 532 | .ops = { |
| 533 | .hw_params = twl4030_hw_params, |
Steve Sakoman | cc17557 | 2008-10-30 21:35:26 -0700 | [diff] [blame] | 534 | .set_sysclk = twl4030_set_dai_sysclk, |
| 535 | .set_fmt = twl4030_set_dai_fmt, |
| 536 | } |
| 537 | }; |
| 538 | EXPORT_SYMBOL_GPL(twl4030_dai); |
| 539 | |
| 540 | static int twl4030_suspend(struct platform_device *pdev, pm_message_t state) |
| 541 | { |
| 542 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 543 | struct snd_soc_codec *codec = socdev->codec; |
| 544 | |
| 545 | twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF); |
| 546 | |
| 547 | return 0; |
| 548 | } |
| 549 | |
| 550 | static int twl4030_resume(struct platform_device *pdev) |
| 551 | { |
| 552 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 553 | struct snd_soc_codec *codec = socdev->codec; |
| 554 | |
| 555 | twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 556 | twl4030_set_bias_level(codec, codec->suspend_bias_level); |
| 557 | return 0; |
| 558 | } |
| 559 | |
| 560 | /* |
| 561 | * initialize the driver |
| 562 | * register the mixer and dsp interfaces with the kernel |
| 563 | */ |
| 564 | |
| 565 | static int twl4030_init(struct snd_soc_device *socdev) |
| 566 | { |
| 567 | struct snd_soc_codec *codec = socdev->codec; |
| 568 | int ret = 0; |
| 569 | |
| 570 | printk(KERN_INFO "TWL4030 Audio Codec init \n"); |
| 571 | |
| 572 | codec->name = "twl4030"; |
| 573 | codec->owner = THIS_MODULE; |
| 574 | codec->read = twl4030_read_reg_cache; |
| 575 | codec->write = twl4030_write; |
| 576 | codec->set_bias_level = twl4030_set_bias_level; |
| 577 | codec->dai = &twl4030_dai; |
| 578 | codec->num_dai = 1; |
| 579 | codec->reg_cache_size = sizeof(twl4030_reg); |
| 580 | codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg), |
| 581 | GFP_KERNEL); |
| 582 | if (codec->reg_cache == NULL) |
| 583 | return -ENOMEM; |
| 584 | |
| 585 | /* register pcms */ |
| 586 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); |
| 587 | if (ret < 0) { |
| 588 | printk(KERN_ERR "twl4030: failed to create pcms\n"); |
| 589 | goto pcm_err; |
| 590 | } |
| 591 | |
| 592 | twl4030_init_chip(codec); |
| 593 | |
| 594 | /* power on device */ |
| 595 | twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 596 | |
| 597 | twl4030_add_controls(codec); |
| 598 | twl4030_add_widgets(codec); |
| 599 | |
| 600 | ret = snd_soc_register_card(socdev); |
| 601 | if (ret < 0) { |
| 602 | printk(KERN_ERR "twl4030: failed to register card\n"); |
| 603 | goto card_err; |
| 604 | } |
| 605 | |
| 606 | return ret; |
| 607 | |
| 608 | card_err: |
| 609 | snd_soc_free_pcms(socdev); |
| 610 | snd_soc_dapm_free(socdev); |
| 611 | pcm_err: |
| 612 | kfree(codec->reg_cache); |
| 613 | return ret; |
| 614 | } |
| 615 | |
| 616 | static struct snd_soc_device *twl4030_socdev; |
| 617 | |
| 618 | static int twl4030_probe(struct platform_device *pdev) |
| 619 | { |
| 620 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 621 | struct snd_soc_codec *codec; |
| 622 | |
| 623 | codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL); |
| 624 | if (codec == NULL) |
| 625 | return -ENOMEM; |
| 626 | |
| 627 | socdev->codec = codec; |
| 628 | mutex_init(&codec->mutex); |
| 629 | INIT_LIST_HEAD(&codec->dapm_widgets); |
| 630 | INIT_LIST_HEAD(&codec->dapm_paths); |
| 631 | |
| 632 | twl4030_socdev = socdev; |
| 633 | twl4030_init(socdev); |
| 634 | |
| 635 | return 0; |
| 636 | } |
| 637 | |
| 638 | static int twl4030_remove(struct platform_device *pdev) |
| 639 | { |
| 640 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 641 | struct snd_soc_codec *codec = socdev->codec; |
| 642 | |
| 643 | printk(KERN_INFO "TWL4030 Audio Codec remove\n"); |
| 644 | kfree(codec); |
| 645 | |
| 646 | return 0; |
| 647 | } |
| 648 | |
| 649 | struct snd_soc_codec_device soc_codec_dev_twl4030 = { |
| 650 | .probe = twl4030_probe, |
| 651 | .remove = twl4030_remove, |
| 652 | .suspend = twl4030_suspend, |
| 653 | .resume = twl4030_resume, |
| 654 | }; |
| 655 | EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030); |
| 656 | |
| 657 | MODULE_DESCRIPTION("ASoC TWL4030 codec driver"); |
| 658 | MODULE_AUTHOR("Steve Sakoman"); |
| 659 | MODULE_LICENSE("GPL"); |