blob: 1d518e3e3b0eb6db0850d550ea260b0e1ec841fc [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/*
2 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14/*
15 * Qualcomm PMIC PM8xxx Thermal Manager driver
16 */
17
18#define pr_fmt(fmt) "%s: " fmt, __func__
19
20#include <linux/module.h>
21#include <linux/err.h>
22#include <linux/string.h>
23#include <linux/kernel.h>
24#include <linux/slab.h>
25#include <linux/mutex.h>
26#include <linux/thermal.h>
27#include <linux/interrupt.h>
28#include <linux/platform_device.h>
29#include <linux/mfd/pm8xxx/core.h>
30#include <linux/mfd/pm8xxx/tm.h>
31#include <linux/completion.h>
Siddartha Mohanadoss77d106e2011-09-20 16:25:59 -070032#include <linux/mfd/pm8xxx/pm8921-adc.h>
Anirudh Ghayalc2019332011-11-12 06:29:10 +053033#include <linux/msm_adc.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070034
35/* Register TEMP_ALARM_CTRL bits */
36#define TEMP_ALARM_CTRL_ST3_SD 0x80
37#define TEMP_ALARM_CTRL_ST2_SD 0x40
38#define TEMP_ALARM_CTRL_STATUS_MASK 0x30
39#define TEMP_ALARM_CTRL_STATUS_SHIFT 4
40#define TEMP_ALARM_CTRL_THRESH_MASK 0x0C
41#define TEMP_ALARM_CTRL_THRESH_SHIFT 2
42#define TEMP_ALARM_CTRL_OVRD_ST3 0x02
43#define TEMP_ALARM_CTRL_OVRD_ST2 0x01
44#define TEMP_ALARM_CTRL_OVRD_MASK 0x03
45
46#define TEMP_STAGE_STEP 20000 /* Stage step: 20.000 C */
47#define TEMP_STAGE_HYSTERESIS 2000
48
49#define TEMP_THRESH_MIN 105000 /* Threshold Min: 105 C */
50#define TEMP_THRESH_STEP 5000 /* Threshold step: 5 C */
51
52/* Register TEMP_ALARM_PWM bits */
53#define TEMP_ALARM_PWM_EN_MASK 0xC0
54#define TEMP_ALARM_PWM_EN_SHIFT 6
55#define TEMP_ALARM_PWM_PER_PRE_MASK 0x38
56#define TEMP_ALARM_PWM_PER_PRE_SHIFT 3
57#define TEMP_ALARM_PWM_PER_DIV_MASK 0x07
58#define TEMP_ALARM_PWM_PER_DIV_SHIFT 0
59
60/* Trips: from critical to less critical */
61#define TRIP_STAGE3 0
62#define TRIP_STAGE2 1
63#define TRIP_STAGE1 2
64#define TRIP_NUM 3
65
66struct pm8xxx_tm_chip {
67 struct pm8xxx_tm_core_data cdata;
68 struct work_struct irq_work;
69 struct device *dev;
70 struct thermal_zone_device *tz_dev;
71 unsigned long temp;
72 enum thermal_device_mode mode;
73 unsigned int thresh;
74 unsigned int stage;
75 unsigned int tempstat_irq;
76 unsigned int overtemp_irq;
77 void *adc_handle;
78};
79
80enum pmic_thermal_override_mode {
81 SOFTWARE_OVERRIDE_DISABLED = 0,
82 SOFTWARE_OVERRIDE_ENABLED,
83};
84
85static inline int pm8xxx_tm_read_ctrl(struct pm8xxx_tm_chip *chip, u8 *reg)
86{
87 int rc;
88
89 rc = pm8xxx_readb(chip->dev->parent,
90 chip->cdata.reg_addr_temp_alarm_ctrl, reg);
91 if (rc)
92 pr_err("%s: pm8xxx_readb(0x%03X) failed, rc=%d\n",
93 chip->cdata.tm_name,
94 chip->cdata.reg_addr_temp_alarm_ctrl, rc);
95
96 return rc;
97}
98
99static inline int pm8xxx_tm_write_ctrl(struct pm8xxx_tm_chip *chip, u8 reg)
100{
101 int rc;
102
103 rc = pm8xxx_writeb(chip->dev->parent,
104 chip->cdata.reg_addr_temp_alarm_ctrl, reg);
105 if (rc)
106 pr_err("%s: pm8xxx_writeb(0x%03X)=0x%02X failed, rc=%d\n",
107 chip->cdata.tm_name,
108 chip->cdata.reg_addr_temp_alarm_ctrl, reg, rc);
109
110 return rc;
111}
112
113static inline int pm8xxx_tm_write_pwm(struct pm8xxx_tm_chip *chip, u8 reg)
114{
115 int rc;
116
117 rc = pm8xxx_writeb(chip->dev->parent,
118 chip->cdata.reg_addr_temp_alarm_pwm, reg);
119 if (rc)
120 pr_err("%s: pm8xxx_writeb(0x%03X)=0x%02X failed, rc=%d\n",
121 chip->cdata.tm_name,
122 chip->cdata.reg_addr_temp_alarm_pwm, reg, rc);
123
124 return rc;
125}
126
127static inline int
128pm8xxx_tm_shutdown_override(struct pm8xxx_tm_chip *chip,
129 enum pmic_thermal_override_mode mode)
130{
131 int rc;
132 u8 reg;
133
134 rc = pm8xxx_tm_read_ctrl(chip, &reg);
135 if (rc < 0)
136 return rc;
137
138 reg &= ~(TEMP_ALARM_CTRL_OVRD_MASK | TEMP_ALARM_CTRL_STATUS_MASK);
139 if (mode == SOFTWARE_OVERRIDE_ENABLED)
140 reg |= (TEMP_ALARM_CTRL_OVRD_ST3 | TEMP_ALARM_CTRL_OVRD_ST2) &
141 TEMP_ALARM_CTRL_OVRD_MASK;
142
143 rc = pm8xxx_tm_write_ctrl(chip, reg);
144
145 return rc;
146}
147
148/*
149 * This function initializes the internal temperature value based on only the
150 * current thermal stage and threshold.
151 */
152static int pm8xxx_tm_init_temp_no_adc(struct pm8xxx_tm_chip *chip)
153{
154 int rc;
155 u8 reg;
156
157 rc = pm8xxx_tm_read_ctrl(chip, &reg);
158 if (rc < 0)
159 return rc;
160
161 chip->stage = (reg & TEMP_ALARM_CTRL_STATUS_MASK)
162 >> TEMP_ALARM_CTRL_STATUS_SHIFT;
163 chip->thresh = (reg & TEMP_ALARM_CTRL_THRESH_MASK)
164 >> TEMP_ALARM_CTRL_THRESH_SHIFT;
165
166 if (chip->stage)
167 chip->temp = chip->thresh * TEMP_THRESH_MIN +
168 (chip->stage - 1) * TEMP_STAGE_STEP +
169 TEMP_THRESH_MIN;
170 else
171 chip->temp = chip->cdata.default_no_adc_temp;
172
173 return 0;
174}
175
176/*
177 * This function updates the internal temperature value based on the
178 * current thermal stage and threshold as well as the previous stage
179 */
180static int pm8xxx_tm_update_temp_no_adc(struct pm8xxx_tm_chip *chip)
181{
182 unsigned int stage;
183 int rc;
184 u8 reg;
185
186 rc = pm8xxx_tm_read_ctrl(chip, &reg);
187 if (rc < 0)
188 return rc;
189
190 stage = (reg & TEMP_ALARM_CTRL_STATUS_MASK)
191 >> TEMP_ALARM_CTRL_STATUS_SHIFT;
192 chip->thresh = (reg & TEMP_ALARM_CTRL_THRESH_MASK)
193 >> TEMP_ALARM_CTRL_THRESH_SHIFT;
194
195 if (stage > chip->stage) {
196 /* increasing stage, use lower bound */
197 chip->temp = (stage - 1) * TEMP_STAGE_STEP
198 + chip->thresh * TEMP_THRESH_STEP
199 + TEMP_STAGE_HYSTERESIS + TEMP_THRESH_MIN;
200 } else if (stage < chip->stage) {
201 /* decreasing stage, use upper bound */
202 chip->temp = stage * TEMP_STAGE_STEP
203 + chip->thresh * TEMP_THRESH_STEP
204 - TEMP_STAGE_HYSTERESIS + TEMP_THRESH_MIN;
205 }
206
207 chip->stage = stage;
208
209 return 0;
210}
211
212static int pm8xxx_tz_get_temp_no_adc(struct thermal_zone_device *thermal,
213 unsigned long *temp)
214{
215 struct pm8xxx_tm_chip *chip = thermal->devdata;
216 int rc;
217
218 if (!chip || !temp)
219 return -EINVAL;
220
221 rc = pm8xxx_tm_update_temp_no_adc(chip);
222 if (rc < 0)
223 return rc;
224
225 *temp = chip->temp;
226
227 return 0;
228}
229
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530230static int pm8xxx_tz_get_temp_pm8058_adc(struct thermal_zone_device *thermal,
231 unsigned long *temp)
232{
233 struct pm8xxx_tm_chip *chip = thermal->devdata;
234 DECLARE_COMPLETION_ONSTACK(wait);
235 struct adc_chan_result adc_result = {
236 .physical = 0lu,
237 };
238 int rc;
239
240 if (!chip || !temp)
241 return -EINVAL;
242
243 *temp = chip->temp;
244
245 rc = adc_channel_request_conv(chip->adc_handle, &wait);
246 if (rc < 0) {
247 pr_err("%s: adc_channel_request_conv() failed, rc = %d\n",
248 __func__, rc);
249 return rc;
250 }
251
252 wait_for_completion(&wait);
253
254 rc = adc_channel_read_result(chip->adc_handle, &adc_result);
255 if (rc < 0) {
256 pr_err("%s: adc_channel_read_result() failed, rc = %d\n",
257 __func__, rc);
258 return rc;
259 }
260
261 *temp = adc_result.physical;
262 chip->temp = adc_result.physical;
263
264 return 0;
265}
266
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700267static int pm8xxx_tz_get_temp_pm8921_adc(struct thermal_zone_device *thermal,
268 unsigned long *temp)
269{
270 struct pm8xxx_tm_chip *chip = thermal->devdata;
271 struct pm8921_adc_chan_result result = {
272 .physical = 0lu,
273 };
274 int rc;
275
276 if (!chip || !temp)
277 return -EINVAL;
278
279 *temp = chip->temp;
280
281 rc = pm8921_adc_read(chip->cdata.adc_channel, &result);
282 if (rc < 0) {
283 pr_err("%s: adc_channel_read_result() failed, rc = %d\n",
284 chip->cdata.tm_name, rc);
285 return rc;
286 }
287
288 *temp = result.physical;
289 chip->temp = result.physical;
290
291 return 0;
292}
293
294static int pm8xxx_tz_get_mode(struct thermal_zone_device *thermal,
295 enum thermal_device_mode *mode)
296{
297 struct pm8xxx_tm_chip *chip = thermal->devdata;
298
299 if (!chip || !mode)
300 return -EINVAL;
301
302 *mode = chip->mode;
303
304 return 0;
305}
306
307static int pm8xxx_tz_set_mode(struct thermal_zone_device *thermal,
308 enum thermal_device_mode mode)
309{
310 struct pm8xxx_tm_chip *chip = thermal->devdata;
311
312 if (!chip)
313 return -EINVAL;
314
315 if (mode != chip->mode) {
316 if (mode == THERMAL_DEVICE_ENABLED)
317 pm8xxx_tm_shutdown_override(chip,
318 SOFTWARE_OVERRIDE_ENABLED);
319 else
320 pm8xxx_tm_shutdown_override(chip,
321 SOFTWARE_OVERRIDE_DISABLED);
322 }
323 chip->mode = mode;
324
325 return 0;
326}
327
328static int pm8xxx_tz_get_trip_type(struct thermal_zone_device *thermal,
329 int trip, enum thermal_trip_type *type)
330{
331 if (trip < 0 || !type)
332 return -EINVAL;
333
334 switch (trip) {
335 case TRIP_STAGE3:
336 *type = THERMAL_TRIP_CRITICAL;
337 break;
338 case TRIP_STAGE2:
339 *type = THERMAL_TRIP_HOT;
340 break;
341 case TRIP_STAGE1:
342 *type = THERMAL_TRIP_HOT;
343 break;
344 default:
345 return -EINVAL;
346 }
347
348 return 0;
349}
350
351static int pm8xxx_tz_get_trip_temp(struct thermal_zone_device *thermal,
352 int trip, unsigned long *temp)
353{
354 struct pm8xxx_tm_chip *chip = thermal->devdata;
355 int thresh_temp;
356
357 if (!chip || trip < 0 || !temp)
358 return -EINVAL;
359
360 thresh_temp = chip->thresh * TEMP_THRESH_STEP +
361 TEMP_THRESH_MIN;
362
363 switch (trip) {
364 case TRIP_STAGE3:
365 thresh_temp += 2 * TEMP_STAGE_STEP;
366 break;
367 case TRIP_STAGE2:
368 thresh_temp += TEMP_STAGE_STEP;
369 break;
370 case TRIP_STAGE1:
371 break;
372 default:
373 return -EINVAL;
374 }
375
376 *temp = thresh_temp;
377
378 return 0;
379}
380
381static int pm8xxx_tz_get_crit_temp(struct thermal_zone_device *thermal,
382 unsigned long *temp)
383{
384 struct pm8xxx_tm_chip *chip = thermal->devdata;
385
386 if (!chip || !temp)
387 return -EINVAL;
388
389 *temp = chip->thresh * TEMP_THRESH_STEP + TEMP_THRESH_MIN +
390 2 * TEMP_STAGE_STEP;
391
392 return 0;
393}
394
395static struct thermal_zone_device_ops pm8xxx_thermal_zone_ops_no_adc = {
396 .get_temp = pm8xxx_tz_get_temp_no_adc,
397 .get_mode = pm8xxx_tz_get_mode,
398 .set_mode = pm8xxx_tz_set_mode,
399 .get_trip_type = pm8xxx_tz_get_trip_type,
400 .get_trip_temp = pm8xxx_tz_get_trip_temp,
401 .get_crit_temp = pm8xxx_tz_get_crit_temp,
402};
403
404static struct thermal_zone_device_ops pm8xxx_thermal_zone_ops_pm8921_adc = {
405 .get_temp = pm8xxx_tz_get_temp_pm8921_adc,
406 .get_mode = pm8xxx_tz_get_mode,
407 .set_mode = pm8xxx_tz_set_mode,
408 .get_trip_type = pm8xxx_tz_get_trip_type,
409 .get_trip_temp = pm8xxx_tz_get_trip_temp,
410 .get_crit_temp = pm8xxx_tz_get_crit_temp,
411};
412
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530413static struct thermal_zone_device_ops pm8xxx_thermal_zone_ops_pm8058_adc = {
414 .get_temp = pm8xxx_tz_get_temp_pm8058_adc,
415 .get_mode = pm8xxx_tz_get_mode,
416 .set_mode = pm8xxx_tz_set_mode,
417 .get_trip_type = pm8xxx_tz_get_trip_type,
418 .get_trip_temp = pm8xxx_tz_get_trip_temp,
419 .get_crit_temp = pm8xxx_tz_get_crit_temp,
420};
421
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700422static void pm8xxx_tm_work(struct work_struct *work)
423{
424 struct pm8xxx_tm_chip *chip
425 = container_of(work, struct pm8xxx_tm_chip, irq_work);
426 int rc;
427 u8 reg;
428
429 rc = pm8xxx_tm_read_ctrl(chip, &reg);
430 if (rc < 0)
431 goto bail;
432
433 if (chip->cdata.adc_type == PM8XXX_TM_ADC_NONE) {
434 rc = pm8xxx_tm_update_temp_no_adc(chip);
435 if (rc < 0)
436 goto bail;
437 pr_info("%s: Temp Alarm - stage=%u, threshold=%u, "
438 "temp=%lu mC\n", chip->cdata.tm_name, chip->stage,
439 chip->thresh, chip->temp);
440 } else {
441 chip->stage = (reg & TEMP_ALARM_CTRL_STATUS_MASK)
442 >> TEMP_ALARM_CTRL_STATUS_SHIFT;
443 chip->thresh = (reg & TEMP_ALARM_CTRL_THRESH_MASK)
444 >> TEMP_ALARM_CTRL_THRESH_SHIFT;
445 pr_info("%s: Temp Alarm - stage=%u, threshold=%u\n",
446 chip->cdata.tm_name, chip->stage, chip->thresh);
447 }
448
449 /* Clear status bits. */
450 if (reg & (TEMP_ALARM_CTRL_ST2_SD | TEMP_ALARM_CTRL_ST3_SD)) {
451 reg &= ~(TEMP_ALARM_CTRL_ST2_SD | TEMP_ALARM_CTRL_ST3_SD
452 | TEMP_ALARM_CTRL_STATUS_MASK);
453
454 pm8xxx_tm_write_ctrl(chip, reg);
455 }
456
457 thermal_zone_device_update(chip->tz_dev);
458
459 /* Notify user space */
460 if (chip->mode == THERMAL_DEVICE_ENABLED)
461 kobject_uevent(&chip->tz_dev->device.kobj, KOBJ_CHANGE);
462
463bail:
464 enable_irq(chip->tempstat_irq);
465 enable_irq(chip->overtemp_irq);
466}
467
468static irqreturn_t pm8xxx_tm_isr(int irq, void *data)
469{
470 struct pm8xxx_tm_chip *chip = data;
471
472 disable_irq_nosync(chip->tempstat_irq);
473 disable_irq_nosync(chip->overtemp_irq);
474 schedule_work(&chip->irq_work);
475
476 return IRQ_HANDLED;
477}
478
479static int pm8xxx_tm_init_reg(struct pm8xxx_tm_chip *chip)
480{
481 int rc;
482 u8 reg;
483
484 rc = pm8xxx_tm_read_ctrl(chip, &reg);
485 if (rc < 0)
486 return rc;
487
488 chip->stage = (reg & TEMP_ALARM_CTRL_STATUS_MASK)
489 >> TEMP_ALARM_CTRL_STATUS_SHIFT;
490 chip->temp = 0;
491
492 /* Use temperature threshold set 0: (105, 125, 145) */
493 chip->thresh = 0;
494 reg = (chip->thresh << TEMP_ALARM_CTRL_THRESH_SHIFT)
495 & TEMP_ALARM_CTRL_THRESH_MASK;
496 rc = pm8xxx_tm_write_ctrl(chip, reg);
497 if (rc < 0)
498 return rc;
499
500 /*
501 * Set the PMIC alarm module PWM to have a frequency of 8 Hz. This
502 * helps cut down on the number of unnecessary interrupts fired when
503 * changing between thermal stages. Also, Enable the over temperature
504 * PWM whenever the PMIC is enabled.
505 */
506 reg = (1 << TEMP_ALARM_PWM_EN_SHIFT)
507 | (3 << TEMP_ALARM_PWM_PER_PRE_SHIFT)
508 | (3 << TEMP_ALARM_PWM_PER_DIV_SHIFT);
509
510 rc = pm8xxx_tm_write_pwm(chip, reg);
511
512 return rc;
513}
514
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530515static int pm8xxx_init_adc(struct pm8xxx_tm_chip *chip, bool enable)
516{
517 int rc = 0;
518
519 if (chip->cdata.adc_type == PM8XXX_TM_ADC_PM8058_ADC) {
520 if (enable) {
521 rc = adc_channel_open(chip->cdata.adc_channel,
522 &(chip->adc_handle));
523 if (rc < 0)
524 pr_err("adc_channel_open() failed.\n");
525 } else {
526 adc_channel_close(chip->adc_handle);
527 }
528 }
529
530 return rc;
531}
532
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700533static int __devinit pm8xxx_tm_probe(struct platform_device *pdev)
534{
535 const struct pm8xxx_tm_core_data *cdata = pdev->dev.platform_data;
536 struct thermal_zone_device_ops *tz_ops;
537 struct pm8xxx_tm_chip *chip;
538 struct resource *res;
539 int rc = 0;
540
541 if (!cdata) {
542 pr_err("missing core data\n");
543 return -EINVAL;
544 }
545
546 chip = kzalloc(sizeof(struct pm8xxx_tm_chip), GFP_KERNEL);
547 if (chip == NULL) {
548 pr_err("kzalloc() failed.\n");
549 return -ENOMEM;
550 }
551
552 chip->dev = &pdev->dev;
553 memcpy(&(chip->cdata), cdata, sizeof(struct pm8xxx_tm_core_data));
554
555 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
556 chip->cdata.irq_name_temp_stat);
557 if (res) {
558 chip->tempstat_irq = res->start;
559 } else {
560 pr_err("temp stat IRQ not specified\n");
561 goto err_free_chip;
562 }
563
564 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
565 chip->cdata.irq_name_over_temp);
566 if (res) {
567 chip->overtemp_irq = res->start;
568 } else {
569 pr_err("over temp IRQ not specified\n");
570 goto err_free_chip;
571 }
572
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530573 rc = pm8xxx_init_adc(chip, true);
574 if (rc < 0) {
575 pr_err("Unable to initialize adc\n");
576 goto err_free_chip;
577 }
578
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700579 /* Select proper thermal zone ops functions based on ADC type. */
580 if (chip->cdata.adc_type == PM8XXX_TM_ADC_PM8921_ADC)
581 tz_ops = &pm8xxx_thermal_zone_ops_pm8921_adc;
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530582 else if (chip->cdata.adc_type == PM8XXX_TM_ADC_PM8058_ADC)
583 tz_ops = &pm8xxx_thermal_zone_ops_pm8058_adc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700584 else
585 tz_ops = &pm8xxx_thermal_zone_ops_no_adc;
586
587 chip->tz_dev = thermal_zone_device_register(chip->cdata.tm_name,
588 TRIP_NUM, chip, tz_ops, 0, 0, 0, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530589
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700590 if (chip->tz_dev == NULL) {
591 pr_err("thermal_zone_device_register() failed.\n");
592 rc = -ENODEV;
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530593 goto err_fail_adc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700594 }
595
596 rc = pm8xxx_tm_init_reg(chip);
597 if (rc < 0)
598 goto err_free_tz;
599 rc = pm8xxx_tm_shutdown_override(chip, SOFTWARE_OVERRIDE_DISABLED);
600 if (rc < 0)
601 goto err_free_tz;
602
603 if (chip->cdata.adc_type == PM8XXX_TM_ADC_NONE) {
604 rc = pm8xxx_tm_init_temp_no_adc(chip);
605 if (rc < 0)
606 goto err_free_tz;
607 }
608
609 /* Start in HW control; switch to SW control when user changes mode. */
610 chip->mode = THERMAL_DEVICE_DISABLED;
611 thermal_zone_device_update(chip->tz_dev);
612
613 INIT_WORK(&chip->irq_work, pm8xxx_tm_work);
614
615 rc = request_irq(chip->tempstat_irq, pm8xxx_tm_isr, IRQF_TRIGGER_RISING,
616 chip->cdata.irq_name_temp_stat, chip);
617 if (rc < 0) {
618 pr_err("request_irq(%d) failed: %d\n", chip->tempstat_irq, rc);
619 goto err_cancel_work;
620 }
621
622 rc = request_irq(chip->overtemp_irq, pm8xxx_tm_isr, IRQF_TRIGGER_RISING,
623 chip->cdata.irq_name_over_temp, chip);
624 if (rc < 0) {
625 pr_err("request_irq(%d) failed: %d\n", chip->overtemp_irq, rc);
626 goto err_free_irq_tempstat;
627 }
628
629 platform_set_drvdata(pdev, chip);
630
631 pr_info("OK\n");
632
633 return 0;
634
635err_free_irq_tempstat:
636 free_irq(chip->tempstat_irq, chip);
637err_cancel_work:
638 cancel_work_sync(&chip->irq_work);
639err_free_tz:
640 thermal_zone_device_unregister(chip->tz_dev);
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530641err_fail_adc:
642 pm8xxx_init_adc(chip, false);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700643err_free_chip:
644 kfree(chip);
645 return rc;
646}
647
648static int __devexit pm8xxx_tm_remove(struct platform_device *pdev)
649{
650 struct pm8xxx_tm_chip *chip = platform_get_drvdata(pdev);
651
652 if (chip) {
653 platform_set_drvdata(pdev, NULL);
654 cancel_work_sync(&chip->irq_work);
655 free_irq(chip->overtemp_irq, chip);
656 free_irq(chip->tempstat_irq, chip);
657 pm8xxx_tm_shutdown_override(chip, SOFTWARE_OVERRIDE_DISABLED);
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530658 pm8xxx_init_adc(chip, false);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700659 thermal_zone_device_unregister(chip->tz_dev);
660 kfree(chip);
661 }
662 return 0;
663}
664
665#ifdef CONFIG_PM
666static int pm8xxx_tm_suspend(struct device *dev)
667{
668 struct platform_device *pdev = to_platform_device(dev);
669 struct pm8xxx_tm_chip *chip = platform_get_drvdata(pdev);
670
671 /* Clear override bits in suspend to allow hardware control */
672 pm8xxx_tm_shutdown_override(chip, SOFTWARE_OVERRIDE_DISABLED);
673
674 return 0;
675}
676
677static int pm8xxx_tm_resume(struct device *dev)
678{
679 struct platform_device *pdev = to_platform_device(dev);
680 struct pm8xxx_tm_chip *chip = platform_get_drvdata(pdev);
681
682 /* Override hardware actions so software can control */
683 if (chip->mode == THERMAL_DEVICE_ENABLED)
684 pm8xxx_tm_shutdown_override(chip, SOFTWARE_OVERRIDE_ENABLED);
685
686 return 0;
687}
688
689static const struct dev_pm_ops pm8xxx_tm_pm_ops = {
690 .suspend = pm8xxx_tm_suspend,
691 .resume = pm8xxx_tm_resume,
692};
693
694#define PM8XXX_TM_PM_OPS (&pm8xxx_tm_pm_ops)
695#else
696#define PM8XXX_TM_PM_OPS NULL
697#endif
698
699static struct platform_driver pm8xxx_tm_driver = {
700 .probe = pm8xxx_tm_probe,
701 .remove = __devexit_p(pm8xxx_tm_remove),
702 .driver = {
703 .name = PM8XXX_TM_DEV_NAME,
704 .owner = THIS_MODULE,
705 .pm = PM8XXX_TM_PM_OPS,
706 },
707};
708
709static int __init pm8xxx_tm_init(void)
710{
711 return platform_driver_register(&pm8xxx_tm_driver);
712}
713
714static void __exit pm8xxx_tm_exit(void)
715{
716 platform_driver_unregister(&pm8xxx_tm_driver);
717}
718
719module_init(pm8xxx_tm_init);
720module_exit(pm8xxx_tm_exit);
721
722MODULE_LICENSE("GPL v2");
723MODULE_DESCRIPTION("PM8xxx Thermal Manager driver");
724MODULE_VERSION("1.0");
725MODULE_ALIAS("platform:" PM8XXX_TM_DEV_NAME);