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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13/*
14 * Qualcomm PMIC8058 driver header file
15 *
16 */
17
Anirudh Ghayalc2019332011-11-12 06:29:10 +053018#ifndef __MFD_PMIC8058_H__
19#define __MFD_PMIC8058_H__
20
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070021#include <linux/irq.h>
22#include <linux/mfd/core.h>
Anirudh Ghayalc2019332011-11-12 06:29:10 +053023#include <linux/mfd/pm8xxx/irq.h>
24#include <linux/mfd/pm8xxx/gpio.h>
25#include <linux/mfd/pm8xxx/mpp.h>
26#include <linux/mfd/pm8xxx/rtc.h>
27#include <linux/input/pmic8xxx-pwrkey.h>
28#include <linux/input/pmic8xxx-keypad.h>
29#include <linux/mfd/pm8xxx/vibrator.h>
30#include <linux/mfd/pm8xxx/nfc.h>
31#include <linux/mfd/pm8xxx/upl.h>
32#include <linux/mfd/pm8xxx/misc.h>
33#include <linux/mfd/pm8xxx/batt-alarm.h>
34#include <linux/leds-pmic8058.h>
35#include <linux/pmic8058-othc.h>
36#include <linux/mfd/pm8xxx/tm.h>
37#include <linux/pmic8058-xoadc.h>
38#include <linux/regulator/pmic8058-regulator.h>
39#include <linux/regulator/pm8058-xo.h>
40#include <linux/pwm.h>
41#include <linux/pmic8058-pwm.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070042
43#define PM8058_GPIOS 40
44#define PM8058_MPPS 12
45
Anirudh Ghayalc2019332011-11-12 06:29:10 +053046#define PM8058_GPIO_BLOCK_START 24
47#define PM8058_MPP_BLOCK_START 16
48
49#define PM8058_NR_IRQS 256
50
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070051#define PM8058_IRQ_BLOCK_BIT(block, bit) ((block) * 8 + (bit))
52
53/* MPPs and GPIOs [0,N) */
54#define PM8058_MPP_IRQ(base, mpp) ((base) + \
55 PM8058_IRQ_BLOCK_BIT(16, (mpp)))
56#define PM8058_GPIO_IRQ(base, gpio) ((base) + \
57 PM8058_IRQ_BLOCK_BIT(24, (gpio)))
58
Anirudh Ghayalc2019332011-11-12 06:29:10 +053059/* PM8058 IRQ's */
60#define PM8058_VCP_IRQ PM8058_IRQ_BLOCK_BIT(1, 0)
61#define PM8058_CHGILIM_IRQ PM8058_IRQ_BLOCK_BIT(1, 3)
62#define PM8058_VBATDET_LOW_IRQ PM8058_IRQ_BLOCK_BIT(1, 4)
63#define PM8058_BATT_REPLACE_IRQ PM8058_IRQ_BLOCK_BIT(1, 5)
64#define PM8058_CHGINVAL_IRQ PM8058_IRQ_BLOCK_BIT(1, 6)
65#define PM8058_CHGVAL_IRQ PM8058_IRQ_BLOCK_BIT(1, 7)
66#define PM8058_CHG_END_IRQ PM8058_IRQ_BLOCK_BIT(2, 0)
67#define PM8058_FASTCHG_IRQ PM8058_IRQ_BLOCK_BIT(2, 1)
68#define PM8058_CHGSTATE_IRQ PM8058_IRQ_BLOCK_BIT(2, 3)
69#define PM8058_AUTO_CHGFAIL_IRQ PM8058_IRQ_BLOCK_BIT(2, 4)
70#define PM8058_AUTO_CHGDONE_IRQ PM8058_IRQ_BLOCK_BIT(2, 5)
71#define PM8058_ATCFAIL_IRQ PM8058_IRQ_BLOCK_BIT(2, 6)
72#define PM8058_ATC_DONE_IRQ PM8058_IRQ_BLOCK_BIT(2, 7)
73#define PM8058_OVP_OK_IRQ PM8058_IRQ_BLOCK_BIT(3, 0)
74#define PM8058_COARSE_DET_OVP_IRQ PM8058_IRQ_BLOCK_BIT(3, 1)
75#define PM8058_VCPMAJOR_IRQ PM8058_IRQ_BLOCK_BIT(3, 2)
76#define PM8058_CHG_GONE_IRQ PM8058_IRQ_BLOCK_BIT(3, 3)
77#define PM8058_CHGTLIMIT_IRQ PM8058_IRQ_BLOCK_BIT(3, 4)
78#define PM8058_CHGHOT_IRQ PM8058_IRQ_BLOCK_BIT(3, 5)
79#define PM8058_BATTTEMP_IRQ PM8058_IRQ_BLOCK_BIT(3, 6)
80#define PM8058_BATTCONNECT_IRQ PM8058_IRQ_BLOCK_BIT(3, 7)
81#define PM8058_BATFET_IRQ PM8058_IRQ_BLOCK_BIT(5, 4)
82#define PM8058_VBATDET_IRQ PM8058_IRQ_BLOCK_BIT(5, 5)
83#define PM8058_VBAT_IRQ PM8058_IRQ_BLOCK_BIT(5, 6)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070084
Anirudh Ghayalc2019332011-11-12 06:29:10 +053085#define PM8058_RTC_IRQ PM8058_IRQ_BLOCK_BIT(6, 5)
86#define PM8058_RTC_ALARM_IRQ PM8058_IRQ_BLOCK_BIT(4, 7)
87#define PM8058_PWRKEY_REL_IRQ PM8058_IRQ_BLOCK_BIT(6, 2)
88#define PM8058_PWRKEY_PRESS_IRQ PM8058_IRQ_BLOCK_BIT(6, 3)
89#define PM8058_KEYPAD_IRQ PM8058_IRQ_BLOCK_BIT(9, 2)
90#define PM8058_KEYSTUCK_IRQ PM8058_IRQ_BLOCK_BIT(9, 3)
91#define PM8058_BATT_ALARM_IRQ PM8058_IRQ_BLOCK_BIT(5, 6)
92#define PM8058_SW_0_IRQ PM8058_IRQ_BLOCK_BIT(7, 1)
93#define PM8058_IR_0_IRQ PM8058_IRQ_BLOCK_BIT(7, 0)
94#define PM8058_SW_1_IRQ PM8058_IRQ_BLOCK_BIT(7, 3)
95#define PM8058_IR_1_IRQ PM8058_IRQ_BLOCK_BIT(7, 2)
96#define PM8058_SW_2_IRQ PM8058_IRQ_BLOCK_BIT(7, 5)
97#define PM8058_IR_2_IRQ PM8058_IRQ_BLOCK_BIT(7, 4)
98#define PM8058_TEMPSTAT_IRQ PM8058_IRQ_BLOCK_BIT(6, 7)
99#define PM8058_OVERTEMP_IRQ PM8058_IRQ_BLOCK_BIT(4, 2)
100#define PM8058_ADC_IRQ PM8058_IRQ_BLOCK_BIT(9, 4)
101#define PM8058_OSCHALT_IRQ PM8058_IRQ_BLOCK_BIT(4, 6)
102#define PM8058_CBLPWR_IRQ PM8058_IRQ_BLOCK_BIT(4, 3)
103#define PM8058_RESOUT_IRQ PM8058_IRQ_BLOCK_BIT(6, 4)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700104
Terence Hampson13163082011-08-09 10:17:06 -0400105struct pmic8058_charger_data {
106 unsigned int max_source_current;
107 int charger_type;
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530108 bool charger_data_valid;
Terence Hampson13163082011-08-09 10:17:06 -0400109};
110
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700111enum pon_config{
112 DISABLE_HARD_RESET = 0,
113 SHUTDOWN_ON_HARD_RESET,
114 RESTART_ON_HARD_RESET,
115 MAX_PON_CONFIG,
116};
117
118enum pm8058_smpl_delay {
119 PM8058_SMPL_DELAY_0p5,
120 PM8058_SMPL_DELAY_1p0,
121 PM8058_SMPL_DELAY_1p5,
122 PM8058_SMPL_DELAY_2p0,
123};
124
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530125struct pm8058_platform_data {
126 struct pm8xxx_mpp_platform_data *mpp_pdata;
127 struct pm8xxx_keypad_platform_data *keypad_pdata;
128 struct pm8xxx_gpio_platform_data *gpio_pdata;
129 struct pm8xxx_irq_platform_data *irq_pdata;
130 struct pm8xxx_rtc_platform_data *rtc_pdata;
131 struct pm8xxx_pwrkey_platform_data *pwrkey_pdata;
132 struct pm8xxx_vibrator_platform_data *vibrator_pdata;
133 struct pm8xxx_misc_platform_data *misc_pdata;
134 struct pmic8058_leds_platform_data *leds_pdata;
135 struct pmic8058_othc_config_pdata *othc0_pdata;
136 struct pmic8058_othc_config_pdata *othc1_pdata;
137 struct pmic8058_othc_config_pdata *othc2_pdata;
138 struct xoadc_platform_data *xoadc_pdata;
139 struct pm8058_pwm_pdata *pwm_pdata;
140 struct pm8058_vreg_pdata *regulator_pdatas;
141 int num_regulators;
142 struct pm8058_xo_pdata *xo_buffer_pdata;
143 int num_xo_buffers;
144 struct pmic8058_charger_data *charger_pdata;
145};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700146
147#ifdef CONFIG_PMIC8058
148int pm8058_reset_pwr_off(int reset);
149#else
150static inline int pm8058_reset_pwr_off(int reset) { return 0; }
151#endif
152
153
154int pm8058_hard_reset_config(enum pon_config config);
155
156/**
157 * pm8058_smpl_control - enables/disables SMPL detection
158 * @enable: 0 = shutdown PMIC on power loss, 1 = reset PMIC on power loss
159 *
160 * This function enables or disables the Sudden Momentary Power Loss detection
161 * module. If SMPL detection is enabled, then when a sufficiently long power
162 * loss event occurs, the PMIC will automatically reset itself. If SMPL
163 * detection is disabled, then the PMIC will shutdown when power loss occurs.
164 *
165 * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
166 */
167int pm8058_smpl_control(int enable);
168
169/**
170 * pm8058_smpl_set_delay - sets the SMPL detection time delay
171 * @delay: enum value corresponding to delay time
172 *
173 * This function sets the time delay of the SMPL detection module. If power
174 * is reapplied within this interval, then the PMIC reset automatically. The
175 * SMPL detection module must be enabled for this delay time to take effect.
176 *
177 * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
178 */
179int pm8058_smpl_set_delay(enum pm8058_smpl_delay delay);
180
181/**
182 * pm8058_watchdog_reset_control - enables/disables watchdog reset detection
183 * @enable: 0 = shutdown when PS_HOLD goes low, 1 = reset when PS_HOLD goes low
184 *
185 * This function enables or disables the PMIC watchdog reset detection feature.
186 * If watchdog reset detection is enabled, then the PMIC will reset itself
187 * when PS_HOLD goes low. If it is not enabled, then the PMIC will shutdown
188 * when PS_HOLD goes low.
189 *
190 * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
191 */
192int pm8058_watchdog_reset_control(int enable);
Willie Ruan6a3c9142011-07-14 16:52:41 -0700193
194/**
195 * pm8058_stay_on - enables stay_on feature
196 *
197 * PMIC stay-on feature allows PMIC to ignore MSM PS_HOLD=low
198 * signal so that some special functions like debugging could be
199 * performed.
200 *
201 * This feature should not be used in any product release.
202 *
203 * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
204 */
205int pm8058_stay_on(void);
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530206
207#endif /* __MFD_PMIC8058_H__ */