| Vitaly Wool | 78818e4 | 2006-05-16 11:54:37 +0100 | [diff] [blame] | 1 | /* | 
 | 2 |  *  linux/arch/arm/mach-pnx4008/serial.c | 
 | 3 |  * | 
 | 4 |  *  PNX4008 UART initialization | 
 | 5 |  * | 
 | 6 |  *  Copyright:	MontaVista Software Inc. (c) 2005 | 
 | 7 |  * | 
 | 8 |  *  This program is free software; you can redistribute it and/or modify | 
 | 9 |  *  it under the terms of the GNU General Public License version 2 as | 
 | 10 |  *  published by the Free Software Foundation. | 
 | 11 |  */ | 
 | 12 |  | 
 | 13 | #include <linux/kernel.h> | 
 | 14 | #include <linux/types.h> | 
 | 15 |  | 
 | 16 | #include <asm/io.h> | 
 | 17 |  | 
 | 18 | #include <asm/arch/platform.h> | 
| Russell King | ea75ee9 | 2006-06-20 19:53:16 +0100 | [diff] [blame] | 19 | #include <asm/hardware.h> | 
| Vitaly Wool | 78818e4 | 2006-05-16 11:54:37 +0100 | [diff] [blame] | 20 |  | 
 | 21 | #include <linux/serial_core.h> | 
 | 22 | #include <linux/serial_reg.h> | 
| Vitaly Wool | b741483 | 2006-06-22 10:26:21 +0100 | [diff] [blame] | 23 | #include <asm/arch/gpio.h> | 
| Vitaly Wool | 78818e4 | 2006-05-16 11:54:37 +0100 | [diff] [blame] | 24 |  | 
 | 25 | #include <asm/arch/clock.h> | 
 | 26 |  | 
 | 27 | #define UART_3		0 | 
 | 28 | #define UART_4		1 | 
 | 29 | #define UART_5		2 | 
 | 30 | #define UART_6		3 | 
 | 31 | #define UART_UNKNOWN	(-1) | 
 | 32 |  | 
 | 33 | #define UART3_BASE_VA	IO_ADDRESS(PNX4008_UART3_BASE) | 
 | 34 | #define UART4_BASE_VA	IO_ADDRESS(PNX4008_UART4_BASE) | 
 | 35 | #define UART5_BASE_VA	IO_ADDRESS(PNX4008_UART5_BASE) | 
 | 36 | #define UART6_BASE_VA	IO_ADDRESS(PNX4008_UART6_BASE) | 
 | 37 |  | 
 | 38 | #define UART_FCR_OFFSET		8 | 
 | 39 | #define UART_FIFO_SIZE		64 | 
 | 40 |  | 
 | 41 | void pnx4008_uart_init(void) | 
 | 42 | { | 
 | 43 | 	u32 tmp; | 
 | 44 | 	int i = UART_FIFO_SIZE; | 
 | 45 |  | 
 | 46 | 	__raw_writel(0xC1, UART5_BASE_VA + UART_FCR_OFFSET); | 
 | 47 | 	__raw_writel(0xC1, UART3_BASE_VA + UART_FCR_OFFSET); | 
 | 48 |  | 
 | 49 | 	/* Send a NULL to fix the UART HW bug */ | 
 | 50 | 	__raw_writel(0x00, UART5_BASE_VA); | 
 | 51 | 	__raw_writel(0x00, UART3_BASE_VA); | 
 | 52 |  | 
 | 53 | 	while (i--) { | 
 | 54 | 		tmp = __raw_readl(UART5_BASE_VA); | 
 | 55 | 		tmp = __raw_readl(UART3_BASE_VA); | 
 | 56 | 	} | 
 | 57 | 	__raw_writel(0, UART5_BASE_VA + UART_FCR_OFFSET); | 
 | 58 | 	__raw_writel(0, UART3_BASE_VA + UART_FCR_OFFSET); | 
 | 59 |  | 
 | 60 | 	/* setup wakeup interrupt */ | 
 | 61 | 	start_int_set_rising_edge(SE_U3_RX_INT); | 
 | 62 | 	start_int_ack(SE_U3_RX_INT); | 
 | 63 | 	start_int_umask(SE_U3_RX_INT); | 
 | 64 |  | 
 | 65 | 	start_int_set_rising_edge(SE_U5_RX_INT); | 
 | 66 | 	start_int_ack(SE_U5_RX_INT); | 
 | 67 | 	start_int_umask(SE_U5_RX_INT); | 
 | 68 | } | 
 | 69 |  |