| David Daney | 4c076fb | 2010-07-24 10:16:05 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  * This file is subject to the terms and conditions of the GNU General Public | 
 | 3 |  * License.  See the file "COPYING" in the main directory of this archive | 
 | 4 |  * for more details. | 
 | 5 |  * | 
 | 6 |  * Copyright (C) 2007 Cavium Networks | 
 | 7 |  */ | 
 | 8 | #include <asm/asm.h> | 
 | 9 | #include <asm/regdef.h> | 
 | 10 |  | 
 | 11 | #define SAVE_REG(r)	sd $r, -32768+6912-(32-r)*8($0) | 
 | 12 |  | 
 | 13 |         NESTED(octeon_wdt_nmi_stage2, 0, sp) | 
 | 14 | 	.set 	push | 
 | 15 | 	.set 	noreorder | 
 | 16 | 	.set 	noat | 
 | 17 | 	/* Save all registers to the top CVMSEG. This shouldn't | 
 | 18 | 	 * corrupt any state used by the kernel. Also all registers | 
 | 19 | 	 * should have the value right before the NMI. */ | 
 | 20 | 	SAVE_REG(0) | 
 | 21 | 	SAVE_REG(1) | 
 | 22 | 	SAVE_REG(2) | 
 | 23 | 	SAVE_REG(3) | 
 | 24 | 	SAVE_REG(4) | 
 | 25 | 	SAVE_REG(5) | 
 | 26 | 	SAVE_REG(6) | 
 | 27 | 	SAVE_REG(7) | 
 | 28 | 	SAVE_REG(8) | 
 | 29 | 	SAVE_REG(9) | 
 | 30 | 	SAVE_REG(10) | 
 | 31 | 	SAVE_REG(11) | 
 | 32 | 	SAVE_REG(12) | 
 | 33 | 	SAVE_REG(13) | 
 | 34 | 	SAVE_REG(14) | 
 | 35 | 	SAVE_REG(15) | 
 | 36 | 	SAVE_REG(16) | 
 | 37 | 	SAVE_REG(17) | 
 | 38 | 	SAVE_REG(18) | 
 | 39 | 	SAVE_REG(19) | 
 | 40 | 	SAVE_REG(20) | 
 | 41 | 	SAVE_REG(21) | 
 | 42 | 	SAVE_REG(22) | 
 | 43 | 	SAVE_REG(23) | 
 | 44 | 	SAVE_REG(24) | 
 | 45 | 	SAVE_REG(25) | 
 | 46 | 	SAVE_REG(26) | 
 | 47 | 	SAVE_REG(27) | 
 | 48 | 	SAVE_REG(28) | 
 | 49 | 	SAVE_REG(29) | 
 | 50 | 	SAVE_REG(30) | 
 | 51 | 	SAVE_REG(31) | 
 | 52 | 	/* Set the stack to begin right below the registers */ | 
 | 53 | 	li	sp, -32768+6912-32*8 | 
 | 54 | 	/* Load the address of the third stage handler */ | 
 | 55 | 	dla	a0, octeon_wdt_nmi_stage3 | 
 | 56 | 	/* Call the third stage handler */ | 
 | 57 | 	jal	a0 | 
 | 58 | 	/* a0 is the address of the saved registers */ | 
 | 59 | 	 move	a0, sp | 
 | 60 | 	/* Loop forvever if we get here. */ | 
 | 61 | 1:	b	1b | 
 | 62 | 	nop | 
 | 63 | 	.set pop | 
 | 64 | 	END(octeon_wdt_nmi_stage2) |