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Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05301/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#ifndef __MFD_TABLA_PDATA_H__
14
15#define __MFD_TABLA_PDATA_H__
16
17#include <linux/slimbus/slimbus.h>
18
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +053019#define SITAR_LDOH_1P95_V 0x0
20#define SITAR_LDOH_2P35_V 0x1
21#define SITAR_LDOH_2P75_V 0x2
22#define SITAR_LDOH_2P85_V 0x3
23
24#define SITAR_CFILT1_SEL 0x0
25#define SITAR_CFILT2_SEL 0x1
26#define SITAR_CFILT3_SEL 0x2
27
Patrick Lai3043fba2011-08-01 14:15:57 -070028#define TABLA_LDOH_1P95_V 0x0
29#define TABLA_LDOH_2P35_V 0x1
30#define TABLA_LDOH_2P75_V 0x2
31#define TABLA_LDOH_2P85_V 0x3
32
33#define TABLA_CFILT1_SEL 0x0
34#define TABLA_CFILT2_SEL 0x1
35#define TABLA_CFILT3_SEL 0x2
36
Kiran Kandic3b24402012-06-11 00:05:59 -070037#define TAIKO_CFILT1_SEL 0x0
38#define TAIKO_CFILT2_SEL 0x1
39#define TAIKO_CFILT3_SEL 0x2
40
41#define TAIKO_LDOH_1P95_V 0x0
42#define TAIKO_LDOH_2P35_V 0x1
43#define TAIKO_LDOH_2P75_V 0x2
44#define TAIKO_LDOH_2P85_V 0x3
45
46
Santosh Mardi22920282011-10-26 02:38:40 +053047#define MAX_AMIC_CHANNEL 7
48
Patrick Lai49efeac2011-11-03 11:01:12 -070049#define TABLA_OCP_300_MA 0x0
50#define TABLA_OCP_350_MA 0x2
51#define TABLA_OCP_365_MA 0x3
52#define TABLA_OCP_150_MA 0x4
53#define TABLA_OCP_190_MA 0x6
54#define TABLA_OCP_220_MA 0x7
55
56#define TABLA_DCYCLE_255 0x0
57#define TABLA_DCYCLE_511 0x1
58#define TABLA_DCYCLE_767 0x2
59#define TABLA_DCYCLE_1023 0x3
60#define TABLA_DCYCLE_1279 0x4
61#define TABLA_DCYCLE_1535 0x5
62#define TABLA_DCYCLE_1791 0x6
63#define TABLA_DCYCLE_2047 0x7
64#define TABLA_DCYCLE_2303 0x8
65#define TABLA_DCYCLE_2559 0x9
66#define TABLA_DCYCLE_2815 0xA
67#define TABLA_DCYCLE_3071 0xB
68#define TABLA_DCYCLE_3327 0xC
69#define TABLA_DCYCLE_3583 0xD
70#define TABLA_DCYCLE_3839 0xE
71#define TABLA_DCYCLE_4095 0xF
72
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +053073struct wcd9xxx_amic {
Santosh Mardi22920282011-10-26 02:38:40 +053074 /*legacy mode, txfe_enable and txfe_buff take 7 input
75 * each bit represent the channel / TXFE number
76 * and numbered as below
77 * bit 0 = channel 1 / TXFE1_ENABLE / TXFE1_BUFF
78 * bit 1 = channel 2 / TXFE2_ENABLE / TXFE2_BUFF
79 * ...
80 * bit 7 = channel 7 / TXFE7_ENABLE / TXFE7_BUFF
81 */
82 u8 legacy_mode:MAX_AMIC_CHANNEL;
83 u8 txfe_enable:MAX_AMIC_CHANNEL;
84 u8 txfe_buff:MAX_AMIC_CHANNEL;
85 u8 use_pdata:MAX_AMIC_CHANNEL;
86};
87
Patrick Lai3043fba2011-08-01 14:15:57 -070088/* Each micbias can be assigned to one of three cfilters
89 * Vbatt_min >= .15V + ldoh_v
90 * ldoh_v >= .15v + cfiltx_mv
91 * If ldoh_v = 1.95 160 mv < cfiltx_mv < 1800 mv
92 * If ldoh_v = 2.35 200 mv < cfiltx_mv < 2200 mv
93 * If ldoh_v = 2.75 240 mv < cfiltx_mv < 2600 mv
94 * If ldoh_v = 2.85 250 mv < cfiltx_mv < 2700 mv
95 */
96
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +053097struct wcd9xxx_micbias_setting {
Patrick Lai3043fba2011-08-01 14:15:57 -070098 u8 ldoh_v;
99 u32 cfilt1_mv; /* in mv */
100 u32 cfilt2_mv; /* in mv */
101 u32 cfilt3_mv; /* in mv */
102 u8 bias1_cfilt_sel;
103 u8 bias2_cfilt_sel;
104 u8 bias3_cfilt_sel;
105 u8 bias4_cfilt_sel;
106};
107
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +0530108struct wcd9xxx_ocp_setting {
Patrick Lai49efeac2011-11-03 11:01:12 -0700109 unsigned int use_pdata:1; /* 0 - use sys default as recommended */
110 unsigned int num_attempts:4; /* up to 15 attempts */
111 unsigned int run_time:4; /* in duty cycle */
112 unsigned int wait_time:4; /* in duty cycle */
113 unsigned int hph_ocp_limit:3; /* Headphone OCP current limit */
114};
115
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +0530116#define MAX_REGULATOR 6
117/*
118 * format : TABLA_<POWER_SUPPLY_PIN_NAME>_CUR_MAX
119 *
120 * <POWER_SUPPLY_PIN_NAME> from Tabla objective spec
121*/
122
123#define WCD9XXX_CDC_VDDA_CP_CUR_MAX 500000
124#define WCD9XXX_CDC_VDDA_RX_CUR_MAX 20000
125#define WCD9XXX_CDC_VDDA_TX_CUR_MAX 20000
126#define WCD9XXX_VDDIO_CDC_CUR_MAX 5000
127
128#define WCD9XXX_VDDD_CDC_D_CUR_MAX 5000
129#define WCD9XXX_VDDD_CDC_A_CUR_MAX 5000
130
131struct wcd9xxx_regulator {
132 const char *name;
133 int min_uV;
134 int max_uV;
135 int optimum_uA;
136 struct regulator *regulator;
137};
138
139struct wcd9xxx_pdata {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700140 int irq;
141 int irq_base;
142 int num_irqs;
143 int reset_gpio;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +0530144 struct wcd9xxx_amic amic_settings;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700145 struct slim_device slimbus_slave_device;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +0530146 struct wcd9xxx_micbias_setting micbias;
147 struct wcd9xxx_ocp_setting ocp;
148 struct wcd9xxx_regulator regulator[MAX_REGULATOR];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700149};
150
151#endif