| Haavard Skinnemoen | c3e2a79 | 2006-12-04 13:46:52 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * Pin definitions for AT32AP7000. |
| 3 | * |
| 4 | * Copyright (C) 2006 Atmel Corporation |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | #ifndef __ASM_ARCH_AT32AP7000_H__ |
| 11 | #define __ASM_ARCH_AT32AP7000_H__ |
| 12 | |
| 13 | #define GPIO_PERIPH_A 0 |
| 14 | #define GPIO_PERIPH_B 1 |
| 15 | |
| 16 | #define NR_GPIO_CONTROLLERS 4 |
| 17 | |
| 18 | /* |
| 19 | * Pin numbers identifying specific GPIO pins on the chip. They can |
| 20 | * also be converted to IRQ numbers by passing them through |
| 21 | * gpio_to_irq(). |
| 22 | */ |
| 23 | #define GPIO_PIOA_BASE (0) |
| 24 | #define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) |
| 25 | #define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) |
| 26 | #define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) |
| 27 | |
| 28 | #define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) |
| 29 | #define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) |
| 30 | #define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) |
| 31 | #define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) |
| 32 | |
| 33 | #endif /* __ASM_ARCH_AT32AP7000_H__ */ |