blob: ecefdc372711f09bd5dd190daeef36e9e013a798 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/sched.h>
17#include <linux/time.h>
18#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/spinlock.h>
21#include <linux/hrtimer.h>
22#include <linux/clk.h>
23#include <mach/hardware.h>
24#include <linux/io.h>
25#include <linux/debugfs.h>
26#include <linux/fb.h>
27#include <linux/msm_mdp.h>
28#include <linux/file.h>
29#include <linux/android_pmem.h>
30#include <linux/major.h>
31#include <asm/system.h>
32#include <asm/mach-types.h>
33#include <linux/semaphore.h>
34#include <linux/uaccess.h>
35#include <linux/mutex.h>
36#include <linux/msm_kgsl.h>
37#include "mdp.h"
38#include "msm_fb.h"
39#include "mdp4.h"
40
41#define VERSION_KEY_MASK 0xFFFFFF00
42
43struct mdp4_overlay_ctrl {
44 struct mdp4_pipe_desc ov_pipe[OVERLAY_PIPE_MAX];/* 4 */
45 struct mdp4_overlay_pipe plist[MDP4_MAX_PIPE]; /* 4 + 2 */
kuogee hsieh405dc302011-07-21 15:06:59 -070046 struct mdp4_overlay_pipe *stage[MDP4_MAX_MIXER][MDP4_MIXER_STAGE_MAX];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070047 uint32 panel_3d;
48 uint32 panel_mode;
49 uint32 mixer0_played;
50 uint32 mixer1_played;
51} mdp4_overlay_db = {
52 .ov_pipe = {
53 {
54 .share = 0, /* RGB 1 */
55 },
56 {
57 .share = 0, /* RGB 2 */
58 },
59 {
60 .share = 1, /* VG 1 */
61 },
62 {
63 .share = 1, /* VG 2 */
64 },
65 },
66 .plist = {
67 {
68 .pipe_type = OVERLAY_TYPE_RGB,
69 .pipe_num = OVERLAY_PIPE_RGB1,
70 .pipe_ndx = 1,
71 },
72 {
73 .pipe_type = OVERLAY_TYPE_RGB,
74 .pipe_num = OVERLAY_PIPE_RGB2,
75 .pipe_ndx = 2,
76 },
77 {
78 .pipe_type = OVERLAY_TYPE_RGB, /* shared */
79 .pipe_num = OVERLAY_PIPE_VG1,
80 .pipe_ndx = 3,
81 },
82 {
83 .pipe_type = OVERLAY_TYPE_RGB, /* shared */
84 .pipe_num = OVERLAY_PIPE_VG2,
85 .pipe_ndx = 4,
86 },
87 {
88 .pipe_type = OVERLAY_TYPE_VIDEO, /* shared */
89 .pipe_num = OVERLAY_PIPE_VG1,
90 .pipe_ndx = 5,
91 },
92 {
93 .pipe_type = OVERLAY_TYPE_VIDEO, /* shared */
94 .pipe_num = OVERLAY_PIPE_VG2,
95 .pipe_ndx = 6,
96 },
97 },
98};
99
100static struct mdp4_overlay_ctrl *ctrl = &mdp4_overlay_db;
kuogee hsieh9452ecb2011-08-01 18:26:23 -0700101static int new_perf_level;
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -0700102
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700103/* static array with index 0 for unset status and 1 for set status */
104static bool overlay_status[MDP4_OVERLAY_TYPE_MAX];
105
106void mdp4_overlay_status_write(enum mdp4_overlay_status type, bool val)
107{
108 overlay_status[type] = val;
109}
110
111bool mdp4_overlay_status_read(enum mdp4_overlay_status type)
112{
113 return overlay_status[type];
114}
115
116int mdp4_overlay_mixer_play(int mixer_num)
117{
118 if (mixer_num == MDP4_MIXER1)
119 return ctrl->mixer1_played;
120 else
121 return ctrl->mixer0_played;
122}
123
124void mdp4_overlay_panel_3d(int mixer_num, uint32 panel_3d)
125{
126 ctrl->panel_3d = panel_3d;
127}
128
129void mdp4_overlay_panel_mode(int mixer_num, uint32 mode)
130{
131 ctrl->panel_mode |= mode;
132}
133
134uint32 mdp4_overlay_panel_list(void)
135{
136 return ctrl->panel_mode;
137}
138
139void mdp4_overlay_dmae_cfg(struct msm_fb_data_type *mfd, int atv)
140{
141 uint32 dmae_cfg_reg;
142
143 if (atv)
144 dmae_cfg_reg = DMA_DEFLKR_EN;
145 else
146 dmae_cfg_reg = 0;
147
148 if (mfd->fb_imgType == MDP_BGR_565)
149 dmae_cfg_reg |= DMA_PACK_PATTERN_BGR;
150 else
151 dmae_cfg_reg |= DMA_PACK_PATTERN_RGB;
152
153
154 if (mfd->panel_info.bpp == 18) {
155 dmae_cfg_reg |= DMA_DSTC0G_6BITS | /* 666 18BPP */
156 DMA_DSTC1B_6BITS | DMA_DSTC2R_6BITS;
157 } else if (mfd->panel_info.bpp == 16) {
158 dmae_cfg_reg |= DMA_DSTC0G_6BITS | /* 565 16BPP */
159 DMA_DSTC1B_5BITS | DMA_DSTC2R_5BITS;
160 } else {
161 dmae_cfg_reg |= DMA_DSTC0G_8BITS | /* 888 16BPP */
162 DMA_DSTC1B_8BITS | DMA_DSTC2R_8BITS;
163 }
164
165 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
166
167 /* dma2 config register */
168 MDP_OUTP(MDP_BASE + 0xb0000, dmae_cfg_reg);
169 if (atv) {
170 MDP_OUTP(MDP_BASE + 0xb0070, 0xeb0010);
171 MDP_OUTP(MDP_BASE + 0xb0074, 0xf00010);
172 MDP_OUTP(MDP_BASE + 0xb0078, 0xf00010);
173 MDP_OUTP(MDP_BASE + 0xb3000, 0x80);
174 MDP_OUTP(MDP_BASE + 0xb3010, 0x1800040);
175 MDP_OUTP(MDP_BASE + 0xb3014, 0x1000080);
176 MDP_OUTP(MDP_BASE + 0xb4004, 0x67686970);
177 } else {
178 MDP_OUTP(MDP_BASE + 0xb0070, 0xff0000);
179 MDP_OUTP(MDP_BASE + 0xb0074, 0xff0000);
180 MDP_OUTP(MDP_BASE + 0xb0078, 0xff0000);
181 }
182
183 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
184}
185
Manoj Raob91fa712011-06-29 09:07:55 -0700186#ifdef CONFIG_FB_MSM_HDMI_3D
187void unfill_black_screen(void) { return; }
188#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700189void unfill_black_screen(void)
190{
191 uint32 temp_src_format;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700192 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
193 /*
194 * VG2 Constant Color
195 */
196 temp_src_format = inpdw(MDP_BASE + 0x30050);
197 MDP_OUTP(MDP_BASE + 0x30050, temp_src_format&(~BIT(22)));
198 /*
199 * MDP_OVERLAY_REG_FLUSH
200 */
201 MDP_OUTP(MDP_BASE + 0x18000, BIT(3));
202 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
Manoj Raob91fa712011-06-29 09:07:55 -0700203 return;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700204}
Manoj Raob91fa712011-06-29 09:07:55 -0700205#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700206
Manoj Raob91fa712011-06-29 09:07:55 -0700207#ifdef CONFIG_FB_MSM_HDMI_3D
208void fill_black_screen(void) { return; }
209#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700210void fill_black_screen(void)
211{
212 /*Black color*/
213 uint32 color = 0x00000000;
214 uint32 temp_src_format;
215 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
216 /*
217 * VG2 Constant Color
218 */
219 MDP_OUTP(MDP_BASE + 0x31008, color);
220 /*
221 * MDP_VG2_SRC_FORMAT
222 */
223 temp_src_format = inpdw(MDP_BASE + 0x30050);
224 MDP_OUTP(MDP_BASE + 0x30050, temp_src_format | BIT(22));
225 /*
226 * MDP_OVERLAY_REG_FLUSH
227 */
228 MDP_OUTP(MDP_BASE + 0x18000, BIT(3));
229 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
Manoj Raob91fa712011-06-29 09:07:55 -0700230 return;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700231}
Manoj Raob91fa712011-06-29 09:07:55 -0700232#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700233
234void mdp4_overlay_dmae_xy(struct mdp4_overlay_pipe *pipe)
235{
236
237 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
238
239 /* dma_p source */
240 MDP_OUTP(MDP_BASE + 0xb0004,
241 (pipe->src_height << 16 | pipe->src_width));
242 MDP_OUTP(MDP_BASE + 0xb0008, pipe->srcp0_addr);
243 MDP_OUTP(MDP_BASE + 0xb000c, pipe->srcp0_ystride);
244
245 /* dma_p dest */
246 MDP_OUTP(MDP_BASE + 0xb0010, (pipe->dst_y << 16 | pipe->dst_x));
247
248 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
249}
250
251void mdp4_overlay_dmap_cfg(struct msm_fb_data_type *mfd, int lcdc)
252{
253 uint32 dma2_cfg_reg;
254
255 dma2_cfg_reg = DMA_DITHER_EN;
256#ifdef BLT_RGB565
257 /* RGB888 is 0 */
258 dma2_cfg_reg |= DMA_BUF_FORMAT_RGB565; /* blt only */
259#endif
260
261 if (mfd->fb_imgType == MDP_BGR_565)
262 dma2_cfg_reg |= DMA_PACK_PATTERN_BGR;
263 else
264 dma2_cfg_reg |= DMA_PACK_PATTERN_RGB;
265
266
267 if (mfd->panel_info.bpp == 18) {
268 dma2_cfg_reg |= DMA_DSTC0G_6BITS | /* 666 18BPP */
269 DMA_DSTC1B_6BITS | DMA_DSTC2R_6BITS;
270 } else if (mfd->panel_info.bpp == 16) {
271 dma2_cfg_reg |= DMA_DSTC0G_6BITS | /* 565 16BPP */
272 DMA_DSTC1B_5BITS | DMA_DSTC2R_5BITS;
273 } else {
274 dma2_cfg_reg |= DMA_DSTC0G_8BITS | /* 888 16BPP */
275 DMA_DSTC1B_8BITS | DMA_DSTC2R_8BITS;
276 }
277
278 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
279
280#ifndef CONFIG_FB_MSM_LCDC_CHIMEI_WXGA_PANEL
281 if (lcdc)
282 dma2_cfg_reg |= DMA_PACK_ALIGN_MSB;
283#endif
284
285 /* dma2 config register */
286 MDP_OUTP(MDP_BASE + 0x90000, dma2_cfg_reg);
287
288 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
289}
290
291/*
292 * mdp4_overlay_dmap_xy: called form baselayer only
293 */
294void mdp4_overlay_dmap_xy(struct mdp4_overlay_pipe *pipe)
295{
296 uint32 off, bpp;
297
298 if (mdp_is_in_isr == FALSE)
299 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
300
301 /* dma_p source */
302 MDP_OUTP(MDP_BASE + 0x90004,
303 (pipe->src_height << 16 | pipe->src_width));
304 if (pipe->blt_addr) {
305#ifdef BLT_RGB565
306 bpp = 2; /* overlay ouput is RGB565 */
307#else
308 bpp = 3; /* overlay ouput is RGB888 */
309#endif
310 off = 0;
311 if (pipe->dmap_cnt & 0x01)
312 off = pipe->src_height * pipe->src_width * bpp;
313 MDP_OUTP(MDP_BASE + 0x90008, pipe->blt_addr + off);
314 /* RGB888, output of overlay blending */
315 MDP_OUTP(MDP_BASE + 0x9000c, pipe->src_width * bpp);
316 } else {
317 MDP_OUTP(MDP_BASE + 0x90008, pipe->srcp0_addr);
318 MDP_OUTP(MDP_BASE + 0x9000c, pipe->srcp0_ystride);
319 }
320
321 /* dma_p dest */
322 MDP_OUTP(MDP_BASE + 0x90010, (pipe->dst_y << 16 | pipe->dst_x));
323
324 if (mdp_is_in_isr == FALSE)
325 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
326}
327
328#define MDP4_VG_PHASE_STEP_DEFAULT 0x20000000
329#define MDP4_VG_PHASE_STEP_SHIFT 29
330
331static int mdp4_leading_0(uint32 num)
332{
333 uint32 bit = 0x80000000;
334 int i;
335
336 for (i = 0; i < 32; i++) {
337 if (bit & num)
338 return i;
339 bit >>= 1;
340 }
341
342 return i;
343}
344
345static uint32 mdp4_scale_phase_step(int f_num, uint32 src, uint32 dst)
346{
347 uint32 val;
348 int n;
349
350 n = mdp4_leading_0(src);
351 if (n > f_num)
352 n = f_num;
353 val = src << n; /* maximum to reduce lose of resolution */
354 val /= dst;
355 if (n < f_num) {
356 n = f_num - n;
357 val <<= n;
358 }
359
360 return val;
361}
362
363static void mdp4_scale_setup(struct mdp4_overlay_pipe *pipe)
364{
365 int ptype;
366
367 pipe->phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
368 pipe->phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
369 ptype = mdp4_overlay_format2type(pipe->src_format);
370
371 if (pipe->dst_h && pipe->src_h != pipe->dst_h) {
372 if (pipe->dst_h > pipe->src_h * 8) /* too much */
373 return;
374 pipe->op_mode |= MDP4_OP_SCALEY_EN;
375
376 if (pipe->pipe_num >= OVERLAY_PIPE_VG1) {
377 if (pipe->dst_h <= (pipe->src_h / 4))
378 pipe->op_mode |= MDP4_OP_SCALEY_MN_PHASE;
379 else
380 pipe->op_mode |= MDP4_OP_SCALEY_FIR;
381 }
382
383 pipe->phasey_step = mdp4_scale_phase_step(29,
384 pipe->src_h, pipe->dst_h);
385 }
386
387 if (pipe->dst_w && pipe->src_w != pipe->dst_w) {
388 if (pipe->dst_w > pipe->src_w * 8) /* too much */
389 return;
390 pipe->op_mode |= MDP4_OP_SCALEX_EN;
391
392 if (pipe->pipe_num >= OVERLAY_PIPE_VG1) {
393 if (pipe->dst_w <= (pipe->src_w / 4))
394 pipe->op_mode |= MDP4_OP_SCALEX_MN_PHASE;
395 else
396 pipe->op_mode |= MDP4_OP_SCALEX_FIR;
397 }
398
399 pipe->phasex_step = mdp4_scale_phase_step(29,
400 pipe->src_w, pipe->dst_w);
401 }
402}
403
404void mdp4_overlay_rgb_setup(struct mdp4_overlay_pipe *pipe)
405{
406 char *rgb_base;
407 uint32 src_size, src_xy, dst_size, dst_xy;
408 uint32 format, pattern;
409
410 rgb_base = MDP_BASE + MDP4_RGB_BASE;
411 rgb_base += (MDP4_RGB_OFF * pipe->pipe_num);
412
413 src_size = ((pipe->src_h << 16) | pipe->src_w);
414 src_xy = ((pipe->src_y << 16) | pipe->src_x);
415 dst_size = ((pipe->dst_h << 16) | pipe->dst_w);
416 dst_xy = ((pipe->dst_y << 16) | pipe->dst_x);
417
418 format = mdp4_overlay_format(pipe);
419 pattern = mdp4_overlay_unpack_pattern(pipe);
420
421#ifdef MDP4_IGC_LUT_ENABLE
422 pipe->op_mode |= MDP4_OP_IGC_LUT_EN;
423#endif
424
425 mdp4_scale_setup(pipe);
426
427 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
428
429 outpdw(rgb_base + 0x0000, src_size); /* MDP_RGB_SRC_SIZE */
430 outpdw(rgb_base + 0x0004, src_xy); /* MDP_RGB_SRC_XY */
431 outpdw(rgb_base + 0x0008, dst_size); /* MDP_RGB_DST_SIZE */
432 outpdw(rgb_base + 0x000c, dst_xy); /* MDP_RGB_DST_XY */
433
434 outpdw(rgb_base + 0x0010, pipe->srcp0_addr);
435 outpdw(rgb_base + 0x0040, pipe->srcp0_ystride);
436
437 outpdw(rgb_base + 0x0050, format);/* MDP_RGB_SRC_FORMAT */
438 outpdw(rgb_base + 0x0054, pattern);/* MDP_RGB_SRC_UNPACK_PATTERN */
439 outpdw(rgb_base + 0x0058, pipe->op_mode);/* MDP_RGB_OP_MODE */
440 outpdw(rgb_base + 0x005c, pipe->phasex_step);
441 outpdw(rgb_base + 0x0060, pipe->phasey_step);
442
443 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
444
445 mdp4_stat.pipe[pipe->pipe_num]++;
446}
447
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700448
449static void mdp4_overlay_vg_get_src_offset(struct mdp4_overlay_pipe *pipe,
450 char *vg_base, uint32 *luma_off, uint32 *chroma_off)
451{
452 uint32 src_xy;
453 *luma_off = 0;
454 *chroma_off = 0;
455
456 if (pipe->src_x) {
457 src_xy = (pipe->src_y << 16) | pipe->src_x;
458 src_xy &= 0xffff0000;
459 outpdw(vg_base + 0x0004, src_xy); /* MDP_RGB_SRC_XY */
460
461 switch (pipe->src_format) {
462 case MDP_Y_CR_CB_H2V2:
463 case MDP_Y_CB_CR_H2V2:
464 *luma_off = pipe->src_x;
465 *chroma_off = pipe->src_x/2;
466 break;
467
468 case MDP_Y_CBCR_H2V2_TILE:
469 case MDP_Y_CRCB_H2V2_TILE:
470 case MDP_Y_CBCR_H2V2:
471 case MDP_Y_CRCB_H2V2:
472 case MDP_Y_CRCB_H1V1:
473 case MDP_Y_CBCR_H1V1:
474 case MDP_Y_CRCB_H2V1:
475 case MDP_Y_CBCR_H2V1:
476 *luma_off = pipe->src_x;
477 *chroma_off = pipe->src_x;
478 break;
479
480 case MDP_YCRYCB_H2V1:
481 if (pipe->src_x & 0x1)
482 pipe->src_x += 1;
483 *luma_off += pipe->src_x * 2;
484 break;
485
486 case MDP_ARGB_8888:
487 case MDP_RGBA_8888:
488 case MDP_BGRA_8888:
489 case MDP_RGBX_8888:
490 case MDP_RGB_565:
491 case MDP_BGR_565:
492 case MDP_XRGB_8888:
493 case MDP_RGB_888:
494 *luma_off = pipe->src_x * pipe->bpp;
495 break;
496
497 default:
498 pr_err("Source format %u not supported for x offset adjustment\n",
499 pipe->src_format);
500 break;
501 }
502 }
503}
504
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700505void mdp4_overlay_vg_setup(struct mdp4_overlay_pipe *pipe)
506{
507 char *vg_base;
508 uint32 frame_size, src_size, src_xy, dst_size, dst_xy;
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700509 uint32 format, pattern, luma_offset, chroma_offset;
kuogee hsiehe1ed1ae2011-09-02 08:53:36 -0700510 int pnum, ptype;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700511
512 pnum = pipe->pipe_num - OVERLAY_PIPE_VG1; /* start from 0 */
513 vg_base = MDP_BASE + MDP4_VIDEO_BASE;
514 vg_base += (MDP4_VIDEO_OFF * pnum);
515
516 frame_size = ((pipe->src_height << 16) | pipe->src_width);
517 src_size = ((pipe->src_h << 16) | pipe->src_w);
518 src_xy = ((pipe->src_y << 16) | pipe->src_x);
519 dst_size = ((pipe->dst_h << 16) | pipe->dst_w);
520 dst_xy = ((pipe->dst_y << 16) | pipe->dst_x);
521
kuogee hsiehe1ed1ae2011-09-02 08:53:36 -0700522 ptype = mdp4_overlay_format2type(pipe->src_format);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700523 format = mdp4_overlay_format(pipe);
524 pattern = mdp4_overlay_unpack_pattern(pipe);
525
526 /* not RGB use VG pipe, pure VG pipe */
kuogee hsiehe1ed1ae2011-09-02 08:53:36 -0700527 if (ptype != OVERLAY_TYPE_RGB)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700528 pipe->op_mode |= (MDP4_OP_CSC_EN | MDP4_OP_SRC_DATA_YCBCR);
kuogee hsiehe1ed1ae2011-09-02 08:53:36 -0700529
530#ifdef MDP4_IGC_LUT_ENABLE
531 pipe->op_mode |= MDP4_OP_IGC_LUT_EN;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700532#endif
533
534 mdp4_scale_setup(pipe);
535
536 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
537
538 outpdw(vg_base + 0x0000, src_size); /* MDP_RGB_SRC_SIZE */
539 outpdw(vg_base + 0x0004, src_xy); /* MDP_RGB_SRC_XY */
540 outpdw(vg_base + 0x0008, dst_size); /* MDP_RGB_DST_SIZE */
541 outpdw(vg_base + 0x000c, dst_xy); /* MDP_RGB_DST_XY */
Nagamalleswararao Ganjic6ecb832011-09-14 10:00:18 -0700542
543 if (pipe->frame_format)
544 outpdw(vg_base + 0x0048, frame_size); /* TILE frame size */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700545
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700546 /*
547 * Adjust src X offset to avoid MDP from overfetching pixels
548 * present before the offset. This is required for video
549 * frames coming with unused green pixels along the left margin
550 */
kuogee hsiehe1ed1ae2011-09-02 08:53:36 -0700551 /* not RGB use VG pipe, pure VG pipe */
552 if (ptype != OVERLAY_TYPE_RGB) {
553 mdp4_overlay_vg_get_src_offset(pipe, vg_base, &luma_offset,
554 &chroma_offset);
555 } else {
556 luma_offset = 0;
557 chroma_offset = 0;
558 }
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700559
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700560 /* luma component plane */
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700561 outpdw(vg_base + 0x0010, pipe->srcp0_addr + luma_offset);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700562
563 /* chroma component plane or planar color 1 */
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700564 outpdw(vg_base + 0x0014, pipe->srcp1_addr + chroma_offset);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700565
566 /* planar color 2 */
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700567 outpdw(vg_base + 0x0018, pipe->srcp2_addr + chroma_offset);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700568
569 outpdw(vg_base + 0x0040,
570 pipe->srcp1_ystride << 16 | pipe->srcp0_ystride);
571
572 outpdw(vg_base + 0x0044,
573 pipe->srcp3_ystride << 16 | pipe->srcp2_ystride);
574
575 outpdw(vg_base + 0x0050, format); /* MDP_RGB_SRC_FORMAT */
576 outpdw(vg_base + 0x0054, pattern); /* MDP_RGB_SRC_UNPACK_PATTERN */
577 outpdw(vg_base + 0x0058, pipe->op_mode);/* MDP_RGB_OP_MODE */
578 outpdw(vg_base + 0x005c, pipe->phasex_step);
579 outpdw(vg_base + 0x0060, pipe->phasey_step);
580
581 if (pipe->op_mode & MDP4_OP_DITHER_EN) {
582 outpdw(vg_base + 0x0068,
583 pipe->r_bit << 4 | pipe->b_bit << 2 | pipe->g_bit);
584 }
585
586 if (pipe->flags & MDP_SHARPENING) {
587 outpdw(vg_base + 0x8200,
588 mdp4_ss_table_value(pipe->req_data.dpp.sharp_strength,
589 0));
590 outpdw(vg_base + 0x8204,
591 mdp4_ss_table_value(pipe->req_data.dpp.sharp_strength,
592 1));
593 }
594
595 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
596
597 mdp4_stat.pipe[pipe->pipe_num]++;
598}
599
600int mdp4_overlay_format2type(uint32 format)
601{
602 switch (format) {
603 case MDP_RGB_565:
604 case MDP_RGB_888:
605 case MDP_BGR_565:
606 case MDP_XRGB_8888:
607 case MDP_ARGB_8888:
608 case MDP_RGBA_8888:
609 case MDP_BGRA_8888:
610 case MDP_RGBX_8888:
611 return OVERLAY_TYPE_RGB;
612 case MDP_YCRYCB_H2V1:
613 case MDP_Y_CRCB_H2V1:
614 case MDP_Y_CBCR_H2V1:
615 case MDP_Y_CRCB_H2V2:
616 case MDP_Y_CBCR_H2V2:
617 case MDP_Y_CBCR_H2V2_TILE:
618 case MDP_Y_CRCB_H2V2_TILE:
619 case MDP_Y_CR_CB_H2V2:
620 case MDP_Y_CB_CR_H2V2:
621 case MDP_Y_CRCB_H1V1:
622 case MDP_Y_CBCR_H1V1:
623 return OVERLAY_TYPE_VIDEO;
624 default:
625 mdp4_stat.err_format++;
626 return -ERANGE;
627 }
628
629}
630
631#define C3_ALPHA 3 /* alpha */
632#define C2_R_Cr 2 /* R/Cr */
633#define C1_B_Cb 1 /* B/Cb */
634#define C0_G_Y 0 /* G/luma */
635#define YUV_444_MAX_WIDTH 1280 /* Max width for YUV 444*/
636
637int mdp4_overlay_format2pipe(struct mdp4_overlay_pipe *pipe)
638{
639 switch (pipe->src_format) {
640 case MDP_RGB_565:
641 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
642 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
643 pipe->a_bit = 0;
644 pipe->r_bit = 1; /* R, 5 bits */
645 pipe->b_bit = 1; /* B, 5 bits */
646 pipe->g_bit = 2; /* G, 6 bits */
647 pipe->alpha_enable = 0;
648 pipe->unpack_tight = 1;
649 pipe->unpack_align_msb = 0;
650 pipe->unpack_count = 2;
651 pipe->element2 = C2_R_Cr; /* R */
652 pipe->element1 = C0_G_Y; /* G */
653 pipe->element0 = C1_B_Cb; /* B */
654 pipe->bpp = 2; /* 2 bpp */
655 break;
656 case MDP_RGB_888:
657 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
658 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
659 pipe->a_bit = 0;
660 pipe->r_bit = 3; /* R, 8 bits */
661 pipe->b_bit = 3; /* B, 8 bits */
662 pipe->g_bit = 3; /* G, 8 bits */
663 pipe->alpha_enable = 0;
664 pipe->unpack_tight = 1;
665 pipe->unpack_align_msb = 0;
666 pipe->unpack_count = 2;
667 pipe->element2 = C2_R_Cr; /* R */
668 pipe->element1 = C0_G_Y; /* G */
669 pipe->element0 = C1_B_Cb; /* B */
670 pipe->bpp = 3; /* 3 bpp */
671 break;
672 case MDP_BGR_565:
673 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
674 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
675 pipe->a_bit = 0;
676 pipe->r_bit = 1; /* R, 5 bits */
677 pipe->b_bit = 1; /* B, 5 bits */
678 pipe->g_bit = 2; /* G, 6 bits */
679 pipe->alpha_enable = 0;
680 pipe->unpack_tight = 1;
681 pipe->unpack_align_msb = 0;
682 pipe->unpack_count = 2;
683 pipe->element2 = C1_B_Cb; /* B */
684 pipe->element1 = C0_G_Y; /* G */
685 pipe->element0 = C2_R_Cr; /* R */
686 pipe->bpp = 2; /* 2 bpp */
687 break;
688 case MDP_XRGB_8888:
689 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
690 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
691 pipe->a_bit = 3; /* alpha, 4 bits */
692 pipe->r_bit = 3; /* R, 8 bits */
693 pipe->b_bit = 3; /* B, 8 bits */
694 pipe->g_bit = 3; /* G, 8 bits */
695 pipe->alpha_enable = 0;
696 pipe->unpack_tight = 1;
697 pipe->unpack_align_msb = 0;
698 pipe->unpack_count = 3;
699 pipe->element3 = C3_ALPHA; /* alpha */
700 pipe->element2 = C2_R_Cr; /* R */
701 pipe->element1 = C0_G_Y; /* G */
702 pipe->element0 = C1_B_Cb; /* B */
703 pipe->bpp = 4; /* 4 bpp */
704 break;
705 case MDP_ARGB_8888:
706 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
707 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
708 pipe->a_bit = 3; /* alpha, 4 bits */
709 pipe->r_bit = 3; /* R, 8 bits */
710 pipe->b_bit = 3; /* B, 8 bits */
711 pipe->g_bit = 3; /* G, 8 bits */
712 pipe->alpha_enable = 1;
713 pipe->unpack_tight = 1;
714 pipe->unpack_align_msb = 0;
715 pipe->unpack_count = 3;
716 pipe->element3 = C3_ALPHA; /* alpha */
717 pipe->element2 = C2_R_Cr; /* R */
718 pipe->element1 = C0_G_Y; /* G */
719 pipe->element0 = C1_B_Cb; /* B */
720 pipe->bpp = 4; /* 4 bpp */
721 break;
722 case MDP_RGBA_8888:
723 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
724 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
725 pipe->a_bit = 3; /* alpha, 4 bits */
726 pipe->r_bit = 3; /* R, 8 bits */
727 pipe->b_bit = 3; /* B, 8 bits */
728 pipe->g_bit = 3; /* G, 8 bits */
729 pipe->alpha_enable = 1;
730 pipe->unpack_tight = 1;
731 pipe->unpack_align_msb = 0;
732 pipe->unpack_count = 3;
733 pipe->element3 = C3_ALPHA; /* alpha */
734 pipe->element2 = C1_B_Cb; /* B */
735 pipe->element1 = C0_G_Y; /* G */
736 pipe->element0 = C2_R_Cr; /* R */
737 pipe->bpp = 4; /* 4 bpp */
738 break;
739 case MDP_RGBX_8888:
740 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
741 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
742 pipe->a_bit = 3;
743 pipe->r_bit = 3; /* R, 8 bits */
744 pipe->b_bit = 3; /* B, 8 bits */
745 pipe->g_bit = 3; /* G, 8 bits */
746 pipe->alpha_enable = 0;
747 pipe->unpack_tight = 1;
748 pipe->unpack_align_msb = 0;
749 pipe->unpack_count = 3;
750 pipe->element3 = C3_ALPHA; /* alpha */
751 pipe->element2 = C1_B_Cb; /* B */
752 pipe->element1 = C0_G_Y; /* G */
753 pipe->element0 = C2_R_Cr; /* R */
754 pipe->bpp = 4; /* 4 bpp */
755 break;
756 case MDP_BGRA_8888:
757 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
758 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
759 pipe->a_bit = 3; /* alpha, 4 bits */
760 pipe->r_bit = 3; /* R, 8 bits */
761 pipe->b_bit = 3; /* B, 8 bits */
762 pipe->g_bit = 3; /* G, 8 bits */
763 pipe->alpha_enable = 1;
764 pipe->unpack_tight = 1;
765 pipe->unpack_align_msb = 0;
766 pipe->unpack_count = 3;
767 pipe->element3 = C3_ALPHA; /* alpha */
768 pipe->element2 = C2_R_Cr; /* R */
769 pipe->element1 = C0_G_Y; /* G */
770 pipe->element0 = C1_B_Cb; /* B */
771 pipe->bpp = 4; /* 4 bpp */
772 break;
773 case MDP_YCRYCB_H2V1:
774 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
775 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
776 pipe->a_bit = 0; /* alpha, 4 bits */
777 pipe->r_bit = 3; /* R, 8 bits */
778 pipe->b_bit = 3; /* B, 8 bits */
779 pipe->g_bit = 3; /* G, 8 bits */
780 pipe->alpha_enable = 0;
781 pipe->unpack_tight = 1;
782 pipe->unpack_align_msb = 0;
783 pipe->unpack_count = 3;
784 pipe->element3 = C0_G_Y; /* G */
785 pipe->element2 = C2_R_Cr; /* R */
786 pipe->element1 = C0_G_Y; /* G */
787 pipe->element0 = C1_B_Cb; /* B */
788 pipe->bpp = 2; /* 2 bpp */
789 pipe->chroma_sample = MDP4_CHROMA_H2V1;
790 break;
791 case MDP_Y_CRCB_H2V1:
792 case MDP_Y_CBCR_H2V1:
793 case MDP_Y_CRCB_H2V2:
794 case MDP_Y_CBCR_H2V2:
795 case MDP_Y_CRCB_H1V1:
796 case MDP_Y_CBCR_H1V1:
797 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
798 pipe->fetch_plane = OVERLAY_PLANE_PSEUDO_PLANAR;
799 pipe->a_bit = 0;
800 pipe->r_bit = 3; /* R, 8 bits */
801 pipe->b_bit = 3; /* B, 8 bits */
802 pipe->g_bit = 3; /* G, 8 bits */
803 pipe->alpha_enable = 0;
804 pipe->unpack_tight = 1;
805 pipe->unpack_align_msb = 0;
806 pipe->unpack_count = 1; /* 2 */
807 pipe->element3 = C0_G_Y; /* not used */
808 pipe->element2 = C0_G_Y; /* not used */
809 if (pipe->src_format == MDP_Y_CRCB_H2V1) {
810 pipe->element1 = C2_R_Cr; /* R */
811 pipe->element0 = C1_B_Cb; /* B */
812 pipe->chroma_sample = MDP4_CHROMA_H2V1;
813 } else if (pipe->src_format == MDP_Y_CRCB_H1V1) {
814 pipe->element1 = C2_R_Cr; /* R */
815 pipe->element0 = C1_B_Cb; /* B */
816 if (pipe->src_width > YUV_444_MAX_WIDTH)
817 pipe->chroma_sample = MDP4_CHROMA_H1V2;
818 else
819 pipe->chroma_sample = MDP4_CHROMA_RGB;
820 } else if (pipe->src_format == MDP_Y_CBCR_H2V1) {
821 pipe->element1 = C1_B_Cb; /* B */
822 pipe->element0 = C2_R_Cr; /* R */
823 pipe->chroma_sample = MDP4_CHROMA_H2V1;
824 } else if (pipe->src_format == MDP_Y_CBCR_H1V1) {
825 pipe->element1 = C1_B_Cb; /* B */
826 pipe->element0 = C2_R_Cr; /* R */
827 if (pipe->src_width > YUV_444_MAX_WIDTH)
828 pipe->chroma_sample = MDP4_CHROMA_H1V2;
829 else
830 pipe->chroma_sample = MDP4_CHROMA_RGB;
831 } else if (pipe->src_format == MDP_Y_CRCB_H2V2) {
832 pipe->element1 = C2_R_Cr; /* R */
833 pipe->element0 = C1_B_Cb; /* B */
834 pipe->chroma_sample = MDP4_CHROMA_420;
835 } else if (pipe->src_format == MDP_Y_CBCR_H2V2) {
836 pipe->element1 = C1_B_Cb; /* B */
837 pipe->element0 = C2_R_Cr; /* R */
838 pipe->chroma_sample = MDP4_CHROMA_420;
839 }
840 pipe->bpp = 2; /* 2 bpp */
841 break;
842 case MDP_Y_CBCR_H2V2_TILE:
843 case MDP_Y_CRCB_H2V2_TILE:
844 pipe->frame_format = MDP4_FRAME_FORMAT_VIDEO_SUPERTILE;
845 pipe->fetch_plane = OVERLAY_PLANE_PSEUDO_PLANAR;
846 pipe->a_bit = 0;
847 pipe->r_bit = 3; /* R, 8 bits */
848 pipe->b_bit = 3; /* B, 8 bits */
849 pipe->g_bit = 3; /* G, 8 bits */
850 pipe->alpha_enable = 0;
851 pipe->unpack_tight = 1;
852 pipe->unpack_align_msb = 0;
853 pipe->unpack_count = 1; /* 2 */
854 pipe->element3 = C0_G_Y; /* not used */
855 pipe->element2 = C0_G_Y; /* not used */
856 if (pipe->src_format == MDP_Y_CRCB_H2V2_TILE) {
857 pipe->element1 = C2_R_Cr; /* R */
858 pipe->element0 = C1_B_Cb; /* B */
859 pipe->chroma_sample = MDP4_CHROMA_420;
860 } else if (pipe->src_format == MDP_Y_CBCR_H2V2_TILE) {
861 pipe->element1 = C1_B_Cb; /* B */
862 pipe->element0 = C2_R_Cr; /* R */
863 pipe->chroma_sample = MDP4_CHROMA_420;
864 }
865 pipe->bpp = 2; /* 2 bpp */
866 break;
867 case MDP_Y_CR_CB_H2V2:
868 case MDP_Y_CB_CR_H2V2:
869 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
870 pipe->fetch_plane = OVERLAY_PLANE_PLANAR;
871 pipe->a_bit = 0;
872 pipe->r_bit = 3; /* R, 8 bits */
873 pipe->b_bit = 3; /* B, 8 bits */
874 pipe->g_bit = 3; /* G, 8 bits */
875 pipe->alpha_enable = 0;
Adrian Salido-Moreno33dc7b92011-08-18 16:16:12 -0700876 pipe->chroma_sample = MDP4_CHROMA_420;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700877 pipe->bpp = 2; /* 2 bpp */
878 break;
879 default:
880 /* not likely */
881 mdp4_stat.err_format++;
882 return -ERANGE;
883 }
884
885 return 0;
886}
887
888/*
889 * color_key_convert: output with 12 bits color key
890 */
891static uint32 color_key_convert(int start, int num, uint32 color)
892{
893 uint32 data;
894
895 data = (color >> start) & ((1 << num) - 1);
896
897 /* convert to 8 bits */
898 if (num == 5)
899 data = ((data << 3) | (data >> 2));
900 else if (num == 6)
901 data = ((data << 2) | (data >> 4));
902
903 /* convert 8 bits to 12 bits */
904 data = (data << 4) | (data >> 4);
905
906 return data;
907}
908
909void transp_color_key(int format, uint32 transp,
910 uint32 *c0, uint32 *c1, uint32 *c2)
911{
912 int b_start, g_start, r_start;
913 int b_num, g_num, r_num;
914
915 switch (format) {
916 case MDP_RGB_565:
917 b_start = 0;
918 g_start = 5;
919 r_start = 11;
920 r_num = 5;
921 g_num = 6;
922 b_num = 5;
923 break;
924 case MDP_RGB_888:
925 case MDP_XRGB_8888:
926 case MDP_ARGB_8888:
927 case MDP_BGRA_8888:
928 b_start = 0;
929 g_start = 8;
930 r_start = 16;
931 r_num = 8;
932 g_num = 8;
933 b_num = 8;
934 break;
935 case MDP_RGBA_8888:
936 case MDP_RGBX_8888:
937 b_start = 16;
938 g_start = 8;
939 r_start = 0;
940 r_num = 8;
941 g_num = 8;
942 b_num = 8;
943 break;
944 case MDP_BGR_565:
945 b_start = 11;
946 g_start = 5;
947 r_start = 0;
948 r_num = 5;
949 g_num = 6;
950 b_num = 5;
951 break;
952 case MDP_Y_CB_CR_H2V2:
953 case MDP_Y_CBCR_H2V2:
954 case MDP_Y_CBCR_H2V1:
955 b_start = 8;
956 g_start = 16;
957 r_start = 0;
958 r_num = 8;
959 g_num = 8;
960 b_num = 8;
961 break;
962 case MDP_Y_CR_CB_H2V2:
963 case MDP_Y_CRCB_H2V2:
964 case MDP_Y_CRCB_H2V1:
965 case MDP_Y_CRCB_H1V1:
966 case MDP_Y_CBCR_H1V1:
967 b_start = 0;
968 g_start = 16;
969 r_start = 8;
970 r_num = 8;
971 g_num = 8;
972 b_num = 8;
973 break;
974 default:
975 b_start = 0;
976 g_start = 8;
977 r_start = 16;
978 r_num = 8;
979 g_num = 8;
980 b_num = 8;
981 break;
982 }
983
984 *c0 = color_key_convert(g_start, g_num, transp);
985 *c1 = color_key_convert(b_start, b_num, transp);
986 *c2 = color_key_convert(r_start, r_num, transp);
987}
988
989uint32 mdp4_overlay_format(struct mdp4_overlay_pipe *pipe)
990{
991 uint32 format;
992
993 format = 0;
994
995 if (pipe->solid_fill)
996 format |= MDP4_FORMAT_SOLID_FILL;
997
998 if (pipe->unpack_align_msb)
999 format |= MDP4_FORMAT_UNPACK_ALIGN_MSB;
1000
1001 if (pipe->unpack_tight)
1002 format |= MDP4_FORMAT_UNPACK_TIGHT;
1003
1004 if (pipe->alpha_enable)
1005 format |= MDP4_FORMAT_ALPHA_ENABLE;
1006
1007 if (pipe->flags & MDP_SOURCE_ROTATED_90)
1008 format |= MDP4_FORMAT_90_ROTATED;
1009 format |= (pipe->unpack_count << 13);
1010 format |= ((pipe->bpp - 1) << 9);
1011 format |= (pipe->a_bit << 6);
1012 format |= (pipe->r_bit << 4);
1013 format |= (pipe->b_bit << 2);
1014 format |= pipe->g_bit;
1015
1016 format |= (pipe->frame_format << 29);
1017
1018 if (pipe->fetch_plane == OVERLAY_PLANE_PSEUDO_PLANAR ||
1019 pipe->fetch_plane == OVERLAY_PLANE_PLANAR) {
1020 /* video/graphic */
1021 format |= (pipe->fetch_plane << 19);
1022 format |= (pipe->chroma_site << 28);
1023 format |= (pipe->chroma_sample << 26);
1024 }
1025
1026 return format;
1027}
1028
1029uint32 mdp4_overlay_unpack_pattern(struct mdp4_overlay_pipe *pipe)
1030{
1031 return (pipe->element3 << 24) | (pipe->element2 << 16) |
1032 (pipe->element1 << 8) | pipe->element0;
1033}
1034
1035/*
1036 * mdp4_overlayproc_cfg: only be called from base layer
1037 */
1038void mdp4_overlayproc_cfg(struct mdp4_overlay_pipe *pipe)
1039{
1040 uint32 data, intf;
1041 char *overlay_base;
1042
1043 intf = 0;
1044 if (pipe->mixer_num == MDP4_MIXER1) {
1045 overlay_base = MDP_BASE + MDP4_OVERLAYPROC1_BASE;/* 0x18000 */
1046 intf = inpdw(MDP_BASE + 0x0038); /* MDP_DISP_INTF_SEL */
1047 intf >>= 4;
1048 intf &= 0x03;
1049 } else
1050 overlay_base = MDP_BASE + MDP4_OVERLAYPROC0_BASE;/* 0x10000 */
1051
1052 if (mdp_is_in_isr == FALSE)
1053 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1054
1055 /*
1056 * BLT only siupport at primary display
1057 */
1058 if (pipe->mixer_num == MDP4_MIXER0 && pipe->blt_addr) {
1059 int off, bpp;
1060#ifdef BLT_RGB565
1061 bpp = 2; /* overlay ouput is RGB565 */
1062#else
1063 bpp = 3; /* overlay ouput is RGB888 */
1064#endif
1065 data = pipe->src_height;
1066 data <<= 16;
1067 data |= pipe->src_width;
1068 outpdw(overlay_base + 0x0008, data); /* ROI, height + width */
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07001069 off = 0;
1070 if (pipe->ov_cnt & 0x01)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001071 off = pipe->src_height * pipe->src_width * bpp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001072
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07001073 outpdw(overlay_base + 0x000c, pipe->blt_addr + off);
1074 /* overlay ouput is RGB888 */
1075 outpdw(overlay_base + 0x0010, pipe->src_width * bpp);
1076 outpdw(overlay_base + 0x001c, pipe->blt_addr + off);
1077 /* MDDI - BLT + on demand */
1078 outpdw(overlay_base + 0x0004, 0x08);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001079#ifdef BLT_RGB565
1080 outpdw(overlay_base + 0x0014, 0x1); /* RGB565 */
1081#else
1082 outpdw(overlay_base + 0x0014, 0x0); /* RGB888 */
1083#endif
1084 } else {
1085 data = pipe->src_height;
1086 data <<= 16;
1087 data |= pipe->src_width;
1088 outpdw(overlay_base + 0x0008, data); /* ROI, height + width */
1089 outpdw(overlay_base + 0x000c, pipe->srcp0_addr);
1090 outpdw(overlay_base + 0x0010, pipe->srcp0_ystride);
1091 outpdw(overlay_base + 0x0004, 0x01); /* directout */
1092 }
1093
1094 if (pipe->mixer_num == MDP4_MIXER1) {
1095 if (intf == TV_INTF) {
1096 outpdw(overlay_base + 0x0014, 0x02); /* yuv422 */
1097 /* overlay1 CSC config */
1098 outpdw(overlay_base + 0x0200, 0x05); /* rgb->yuv */
1099 }
1100 }
1101
1102#ifdef MDP4_IGC_LUT_ENABLE
1103 outpdw(overlay_base + 0x0014, 0x4); /* GC_LUT_EN, 888 */
1104#endif
1105
1106 if (mdp_is_in_isr == FALSE)
1107 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1108}
1109
1110int mdp4_overlay_pipe_staged(int mixer)
1111{
1112 uint32 data, mask, i;
1113 int p1, p2;
1114
1115 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1116 data = inpdw(MDP_BASE + 0x10100);
1117 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1118 p1 = 0;
1119 p2 = 0;
1120 for (i = 0; i < 8; i++) {
1121 mask = data & 0x0f;
1122 if (mask) {
1123 if (mask <= 4)
1124 p1++;
1125 else
1126 p2++;
1127 }
1128 data >>= 4;
1129 }
1130
1131 if (mixer)
1132 return p2;
1133 else
1134 return p1;
1135}
1136
kuogee hsieh405dc302011-07-21 15:06:59 -07001137int mdp4_mixer_info(int mixer_num, struct mdp_mixer_info *info)
1138{
1139
1140 int ndx, cnt;
1141 struct mdp4_overlay_pipe *pipe;
1142
1143 if (mixer_num > MDP4_MIXER_MAX)
1144 return -ENODEV;
1145
1146 cnt = 0;
1147 ndx = 1; /* ndx 0 if not used */
1148
1149 for ( ; ndx < MDP4_MIXER_STAGE_MAX; ndx++) {
1150 pipe = ctrl->stage[mixer_num][ndx];
1151 if (pipe == NULL)
1152 continue;
1153 info->z_order = pipe->mixer_stage - MDP4_MIXER_STAGE0;
1154 info->ptype = pipe->pipe_type;
1155 info->pnum = pipe->pipe_num;
1156 info->pndx = pipe->pipe_ndx;
1157 info->mixer_num = pipe->mixer_num;
1158 info++;
1159 cnt++;
1160 }
1161 return cnt;
1162}
1163
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001164void mdp4_mixer_stage_up(struct mdp4_overlay_pipe *pipe)
1165{
1166 uint32 data, mask, snum, stage, mixer, pnum;
Adrian Salido-Morenoc4302232011-09-26 12:54:03 -07001167 struct mdp4_overlay_pipe *spipe;
1168
1169 spipe = mdp4_overlay_stage_pipe(pipe->mixer_num, pipe->mixer_stage);
1170 if ((spipe != NULL) && (spipe != pipe)) {
1171 pr_err("%s: unable to stage pipe=%d at mixer_stage=%d\n",
1172 __func__, pipe->pipe_ndx, pipe->mixer_stage);
1173 return;
1174 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001175
1176 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1177
1178 stage = pipe->mixer_stage;
1179 mixer = pipe->mixer_num;
1180 pnum = pipe->pipe_num;
1181
1182 /* MDP_LAYERMIXER_IN_CFG, shard by both mixer 0 and 1 */
1183 data = inpdw(MDP_BASE + 0x10100);
1184
1185 if (mixer == MDP4_MIXER1)
1186 stage += 8;
1187
1188 if (pipe->pipe_num >= OVERLAY_PIPE_VG1) {/* VG1 and VG2 */
1189 pnum -= OVERLAY_PIPE_VG1; /* start from 0 */
1190 snum = 0;
1191 snum += (4 * pnum);
1192 } else {
1193 snum = 8;
1194 snum += (4 * pnum); /* RGB1 and RGB2 */
1195 }
1196
1197 mask = 0x0f;
1198 mask <<= snum;
1199 stage <<= snum;
1200 data &= ~mask; /* clear old bits */
1201
1202 data |= stage;
1203
1204 outpdw(MDP_BASE + 0x10100, data); /* MDP_LAYERMIXER_IN_CFG */
1205
1206 data = inpdw(MDP_BASE + 0x10100);
1207
1208 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1209
1210 ctrl->stage[pipe->mixer_num][pipe->mixer_stage] = pipe; /* keep it */
1211}
1212
1213void mdp4_mixer_stage_down(struct mdp4_overlay_pipe *pipe)
1214{
1215 uint32 data, mask, snum, stage, mixer, pnum;
1216
1217 stage = pipe->mixer_stage;
1218 mixer = pipe->mixer_num;
1219 pnum = pipe->pipe_num;
1220
1221 if (pipe != ctrl->stage[mixer][stage]) /* not runing */
1222 return;
1223
1224 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1225
1226 /* MDP_LAYERMIXER_IN_CFG, shard by both mixer 0 and 1 */
1227 data = inpdw(MDP_BASE + 0x10100);
1228
1229 if (mixer == MDP4_MIXER1)
1230 stage += 8;
1231
1232 if (pipe->pipe_num >= OVERLAY_PIPE_VG1) {/* VG1 and VG2 */
1233 pnum -= OVERLAY_PIPE_VG1; /* start from 0 */
1234 snum = 0;
1235 snum += (4 * pnum);
1236 } else {
1237 snum = 8;
1238 snum += (4 * pnum); /* RGB1 and RGB2 */
1239 }
1240
1241 mask = 0x0f;
1242 mask <<= snum;
1243 data &= ~mask; /* clear old bits */
1244
1245 outpdw(MDP_BASE + 0x10100, data); /* MDP_LAYERMIXER_IN_CFG */
1246
1247 data = inpdw(MDP_BASE + 0x10100);
1248
1249 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1250
1251 ctrl->stage[pipe->mixer_num][pipe->mixer_stage] = NULL; /* clear it */
1252}
1253
1254void mdp4_mixer_blend_setup(struct mdp4_overlay_pipe *pipe)
1255{
1256 struct mdp4_overlay_pipe *bg_pipe;
1257 unsigned char *overlay_base, *rgb_base;
1258 uint32 c0, c1, c2, blend_op, constant_color = 0, rgb_src_format;
1259 int off;
1260
1261 if (pipe->mixer_num) /* mixer number, /dev/fb0, /dev/fb1 */
1262 overlay_base = MDP_BASE + MDP4_OVERLAYPROC1_BASE;/* 0x18000 */
1263 else
1264 overlay_base = MDP_BASE + MDP4_OVERLAYPROC0_BASE;/* 0x10000 */
1265
1266 /* stage 0 to stage 2 */
1267 off = 0x20 * (pipe->mixer_stage - MDP4_MIXER_STAGE0);
1268
1269 bg_pipe = mdp4_overlay_stage_pipe(pipe->mixer_num,
1270 MDP4_MIXER_STAGE_BASE);
1271 if (bg_pipe == NULL) {
1272 pr_err("%s: Error: no bg_pipe\n", __func__);
1273 return;
1274 }
1275
1276 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1277
1278 blend_op = 0;
1279
1280 if (pipe->is_fg) {
1281 blend_op |= (MDP4_BLEND_FG_ALPHA_FG_CONST |
1282 MDP4_BLEND_BG_ALPHA_BG_CONST);
1283 outpdw(overlay_base + off + 0x108, pipe->alpha);
1284 outpdw(overlay_base + off + 0x10c, 0xff - pipe->alpha);
1285 if (pipe->alpha == 0xff) {
1286 rgb_base = MDP_BASE + MDP4_RGB_BASE;
1287 rgb_base += MDP4_RGB_OFF * bg_pipe->pipe_num;
1288 rgb_src_format = inpdw(rgb_base + 0x50);
1289 rgb_src_format |= MDP4_FORMAT_SOLID_FILL;
1290 outpdw(rgb_base + 0x50, rgb_src_format);
1291 outpdw(rgb_base + 0x1008, constant_color);
1292 }
1293 } else {
1294 if (bg_pipe->alpha_enable && pipe->alpha_enable) {
1295 /* both pipe have alpha */
1296 blend_op |= (MDP4_BLEND_FG_ALPHA_BG_PIXEL |
1297 MDP4_BLEND_FG_INV_ALPHA |
1298 MDP4_BLEND_BG_ALPHA_BG_PIXEL);
1299 } else if (bg_pipe->alpha_enable && pipe->alpha_enable == 0) {
1300 /* no alpha on both pipe */
1301 blend_op = (MDP4_BLEND_BG_ALPHA_BG_PIXEL |
1302 MDP4_BLEND_FG_ALPHA_BG_PIXEL |
1303 MDP4_BLEND_FG_INV_ALPHA);
1304 }
1305 }
1306
1307
1308 if (pipe->transp != MDP_TRANSP_NOP) {
1309 if (pipe->is_fg) {
1310 transp_color_key(pipe->src_format, pipe->transp,
1311 &c0, &c1, &c2);
1312 /* Fg blocked */
1313 blend_op |= MDP4_BLEND_FG_TRANSP_EN;
1314 /* lower limit */
1315 outpdw(overlay_base + off + 0x110,
1316 (c1 << 16 | c0));/* low */
1317 outpdw(overlay_base + off + 0x114, c2);/* low */
1318 /* upper limit */
1319 outpdw(overlay_base + off + 0x118,
1320 (c1 << 16 | c0));
1321 outpdw(overlay_base + off + 0x11c, c2);
1322 } else {
1323 transp_color_key(bg_pipe->src_format,
1324 pipe->transp, &c0, &c1, &c2);
1325 /* bg blocked */
1326 blend_op |= MDP4_BLEND_BG_TRANSP_EN;
1327 /* lower limit */
1328 outpdw(overlay_base + 0x180,
1329 (c1 << 16 | c0));/* low */
1330 outpdw(overlay_base + 0x184, c2);/* low */
1331 /* upper limit */
1332 outpdw(overlay_base + 0x188,
1333 (c1 << 16 | c0));/* high */
1334 outpdw(overlay_base + 0x18c, c2);/* high */
1335 }
1336 }
1337
1338 outpdw(overlay_base + off + 0x104, blend_op);
1339
1340 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1341}
1342
1343void mdp4_overlay_reg_flush(struct mdp4_overlay_pipe *pipe, int all)
1344{
1345 struct mdp4_overlay_pipe *bg_pipe;
1346 uint32 bits = 0;
1347
1348 if (pipe->mixer_num == MDP4_MIXER1)
1349 bits |= 0x02;
1350 else
1351 bits |= 0x01;
1352
1353 if (all) {
1354 if (pipe->pipe_num <= OVERLAY_PIPE_RGB2) {
1355 if (pipe->pipe_num == OVERLAY_PIPE_RGB2)
1356 bits |= 0x20;
1357 else
1358 bits |= 0x10;
1359 } else {
1360 if (pipe->is_fg && pipe->alpha == 0xFF) {
1361 bg_pipe = mdp4_overlay_stage_pipe(
1362 pipe->mixer_num,
1363 MDP4_MIXER_STAGE_BASE);
1364 if (bg_pipe->pipe_num <= OVERLAY_PIPE_RGB2) {
1365 if (bg_pipe->pipe_num ==
1366 OVERLAY_PIPE_RGB2)
1367 bits |= 0x20;
1368 else
1369 bits |= 0x10;
1370 }
1371 }
1372 if (pipe->pipe_num == OVERLAY_PIPE_VG2)
1373 bits |= 0x08;
1374 else
1375 bits |= 0x04;
1376 }
1377 }
1378
1379 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1380 outpdw(MDP_BASE + 0x18000, bits); /* MDP_OVERLAY_REG_FLUSH */
1381 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1382}
1383
1384struct mdp4_overlay_pipe *mdp4_overlay_stage_pipe(int mixer, int stage)
1385{
1386 return ctrl->stage[mixer][stage];
1387}
1388
1389struct mdp4_overlay_pipe *mdp4_overlay_ndx2pipe(int ndx)
1390{
1391 struct mdp4_overlay_pipe *pipe;
1392
1393 if (ndx <= 0 || ndx > MDP4_MAX_PIPE)
1394 return NULL;
1395
1396 pipe = &ctrl->plist[ndx - 1]; /* ndx start from 1 */
1397
1398 if (pipe->pipe_used == 0)
1399 return NULL;
1400
1401 return pipe;
1402}
1403
1404struct mdp4_overlay_pipe *mdp4_overlay_pipe_alloc(
1405 int ptype, int mixer, int req_share)
1406{
1407 int i, j, ndx, found;
1408 struct mdp4_overlay_pipe *pipe, *opipe;
1409 struct mdp4_pipe_desc *pd;
1410
1411 found = 0;
1412 pipe = &ctrl->plist[0];
1413
1414 for (i = 0; i < MDP4_MAX_PIPE; i++) {
1415 if (pipe->pipe_type == ptype && pipe->pipe_used == 0) {
1416 pd = &ctrl->ov_pipe[pipe->pipe_num];
1417 if (pd->share) { /* pipe can be shared */
1418 if (pd->ref_cnt == 0) {
1419 /* not yet been used */
1420 found++;
1421 break;
1422 }
1423 /* pipe occupied already */
1424 if (req_share && pd->ref_cnt < MDP4_MAX_SHARE) {
1425 for (j = 0; j < MDP4_MAX_SHARE; j++) {
1426 ndx = pd->ndx_list[j];
1427 if (ndx != 0)
1428 break;
1429 }
1430 /* ndx satrt from 1 */
1431 opipe = &ctrl->plist[ndx - 1];
1432 /*
1433 * occupied pipe willing to share and
1434 * same mixer
1435 */
1436 if (opipe->pipe_share &&
1437 opipe->mixer_num == mixer) {
1438 found++;
1439 break;
1440 }
1441 }
1442 } else { /* not a shared pipe */
1443 if (req_share == 0 && pd->ref_cnt == 0) {
1444 found++;
1445 break;
1446 }
1447 }
1448 }
1449 pipe++;
1450 }
1451
1452 if (found) {
1453 init_completion(&pipe->comp);
1454 init_completion(&pipe->dmas_comp);
1455 pr_info("%s: pipe=%x ndx=%d num=%d share=%d cnt=%d\n",
1456 __func__, (int)pipe, pipe->pipe_ndx, pipe->pipe_num,
1457 pd->share, pd->ref_cnt);
1458 return pipe;
1459 }
1460
1461 pr_debug("%s: ptype=%d mixer=%d req_share=%d FAILED\n",
1462 __func__, ptype, mixer, req_share);
1463
1464 return NULL;
1465}
1466
1467
1468void mdp4_overlay_pipe_free(struct mdp4_overlay_pipe *pipe)
1469{
1470 int i;
1471 uint32 ptype, num, ndx;
1472 struct mdp4_pipe_desc *pd;
1473
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07001474 pr_info("%s: pipe=%x ndx=%d\n", __func__,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001475 (int)pipe, pipe->pipe_ndx);
1476 pd = &ctrl->ov_pipe[pipe->pipe_num];
1477 if (pd->ref_cnt) {
1478 pd->ref_cnt--;
1479 for (i = 0; i < MDP4_MAX_SHARE; i++) {
1480 if (pd->ndx_list[i] == pipe->pipe_ndx) {
1481 pd->ndx_list[i] = 0;
1482 break;
1483 }
1484 }
1485 }
1486
1487 pd->player = NULL;
1488
1489 ptype = pipe->pipe_type;
1490 num = pipe->pipe_num;
1491 ndx = pipe->pipe_ndx;
1492
1493 memset(pipe, 0, sizeof(*pipe));
1494
1495 pipe->pipe_type = ptype;
1496 pipe->pipe_num = num;
1497 pipe->pipe_ndx = ndx;
1498}
1499
1500int mdp4_overlay_req_check(uint32 id, uint32 z_order, uint32 mixer)
1501{
1502 struct mdp4_overlay_pipe *pipe;
1503
1504 pipe = ctrl->stage[mixer][z_order];
1505
1506 if (pipe == NULL)
1507 return 0;
1508
1509 if (pipe->pipe_ndx == id) /* same req, recycle */
1510 return 0;
1511
1512 if (id == MSMFB_NEW_REQUEST) { /* new request */
1513 if (pipe->pipe_num >= OVERLAY_PIPE_VG1) /* share pipe */
1514 return 0;
1515 }
1516
1517 return -EPERM;
1518}
1519
1520static int mdp4_overlay_validate_downscale(struct mdp_overlay *req,
1521 struct msm_fb_data_type *mfd, uint32 perf_level, uint32 pclk_rate)
1522{
1523 __u32 panel_clk_khz, mdp_clk_khz;
1524 __u32 num_hsync_pix_clks, mdp_clks_per_hsync, src_wh;
1525 __u32 hsync_period_ps, mdp_period_ps, total_hsync_period_ps;
1526 unsigned long fill_rate_y_dir, fill_rate_x_dir;
1527 unsigned long fillratex100, mdp_pixels_produced;
1528 unsigned long mdp_clk_hz;
1529
1530 pr_debug("%s: LCDC Mode Downscale validation with MDP Core"
1531 " Clk rate\n", __func__);
1532 pr_debug("src_w %u, src_h %u, dst_w %u, dst_h %u\n",
1533 req->src_rect.w, req->src_rect.h, req->dst_rect.w,
1534 req->dst_rect.h);
1535
1536
1537 panel_clk_khz = pclk_rate/1000;
1538 mdp_clk_hz = mdp_perf_level2clk_rate(perf_level);
1539
Ravishangar Kalyanamc42862a2011-09-14 11:42:34 -07001540 if (!mdp_clk_hz || !req->dst_rect.w || !req->dst_rect.h) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001541 pr_debug("mdp_perf_level2clk_rate returned 0,"
Ravishangar Kalyanamc42862a2011-09-14 11:42:34 -07001542 "or dst_rect height/width is 0,"
1543 "Downscale Validation incomplete\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001544 return 0;
1545 }
1546
1547 mdp_clk_khz = mdp_clk_hz/1000;
1548
1549 num_hsync_pix_clks = mfd->panel_info.lcdc.h_back_porch +
1550 mfd->panel_info.lcdc.h_front_porch +
1551 mfd->panel_info.lcdc.h_pulse_width +
1552 mfd->panel_info.xres;
1553
1554 hsync_period_ps = 1000000000/panel_clk_khz;
1555 mdp_period_ps = 1000000000/mdp_clk_khz;
1556
1557 total_hsync_period_ps = num_hsync_pix_clks * hsync_period_ps;
1558 mdp_clks_per_hsync = total_hsync_period_ps/mdp_period_ps;
1559
1560 pr_debug("hsync_period_ps %u, mdp_period_ps %u,"
1561 "total_hsync_period_ps %u\n", hsync_period_ps,
1562 mdp_period_ps, total_hsync_period_ps);
1563
1564 src_wh = req->src_rect.w * req->src_rect.h;
1565 if (src_wh % req->dst_rect.h)
1566 fill_rate_y_dir = (src_wh / req->dst_rect.h) + 1;
1567 else
1568 fill_rate_y_dir = (src_wh / req->dst_rect.h);
1569
1570 fill_rate_x_dir = (mfd->panel_info.xres - req->dst_rect.w)
1571 + req->src_rect.w;
1572
1573 if (fill_rate_y_dir >= fill_rate_x_dir)
1574 fillratex100 = 100 * fill_rate_y_dir / mfd->panel_info.xres;
1575 else
1576 fillratex100 = 100 * fill_rate_x_dir / mfd->panel_info.xres;
1577
1578 pr_debug("mdp_clks_per_hsync %u, fill_rate_y_dir %lu,"
1579 "fill_rate_x_dir %lu\n", mdp_clks_per_hsync,
1580 fill_rate_y_dir, fill_rate_x_dir);
1581
1582 mdp_pixels_produced = 100 * mdp_clks_per_hsync/fillratex100;
1583 pr_debug("fillratex100 %lu, mdp_pixels_produced %lu\n",
1584 fillratex100, mdp_pixels_produced);
1585 if (mdp_pixels_produced <= mfd->panel_info.xres) {
1586 pr_err("%s(): LCDC underflow detected during downscale\n",
1587 __func__);
1588 return -ERANGE;
1589 }
1590
1591 return 0;
1592}
1593
1594static int mdp4_overlay_req2pipe(struct mdp_overlay *req, int mixer,
1595 struct mdp4_overlay_pipe **ppipe,
1596 struct msm_fb_data_type *mfd)
1597{
1598 struct mdp4_overlay_pipe *pipe;
1599 struct mdp4_pipe_desc *pd;
1600 int ret, ptype, req_share;
1601 int j;
1602
1603 if (mfd == NULL) {
1604 pr_err("%s: mfd == NULL, -ENODEV\n", __func__);
1605 return -ENODEV;
1606 }
1607
1608 if (mixer >= MDP4_MAX_MIXER) {
1609 pr_err("%s: mixer out of range!\n", __func__);
1610 mdp4_stat.err_mixer++;
1611 return -ERANGE;
1612 }
1613
1614 if (req->z_order < 0 || req->z_order > 2) {
1615 pr_err("%s: z_order=%d out of range!\n", __func__,
1616 req->z_order);
1617 mdp4_stat.err_zorder++;
1618 return -ERANGE;
1619 }
1620
1621 if (req->src_rect.h == 0 || req->src_rect.w == 0) {
1622 pr_err("%s: src img of zero size!\n", __func__);
1623 mdp4_stat.err_size++;
1624 return -EINVAL;
1625 }
1626
1627
1628 if (req->dst_rect.h > (req->src_rect.h * 8)) { /* too much */
1629 mdp4_stat.err_scale++;
1630 pr_err("%s: scale up, too much (h)!\n", __func__);
1631 return -ERANGE;
1632 }
1633
1634 if (req->src_rect.h > (req->dst_rect.h * 8)) { /* too little */
1635 mdp4_stat.err_scale++;
1636 pr_err("%s: scale down, too little (h)!\n", __func__);
1637 return -ERANGE;
1638 }
1639
1640 if (req->dst_rect.w > (req->src_rect.w * 8)) { /* too much */
1641 mdp4_stat.err_scale++;
1642 pr_err("%s: scale up, too much (w)!\n", __func__);
1643 return -ERANGE;
1644 }
1645
1646 if (req->src_rect.w > (req->dst_rect.w * 8)) { /* too little */
1647 mdp4_stat.err_scale++;
1648 pr_err("%s: scale down, too little (w)!\n", __func__);
1649 return -ERANGE;
1650 }
1651
1652 if (mdp_hw_revision == MDP4_REVISION_V1) {
1653 /* non integer down saceling ratio smaller than 1/4
1654 * is not supportted
1655 */
1656 if (req->src_rect.h > (req->dst_rect.h * 4)) {
1657 if (req->src_rect.h % req->dst_rect.h) {
1658 mdp4_stat.err_scale++;
1659 pr_err("%s: need integer (h)!\n", __func__);
1660 return -ERANGE;
1661 }
1662 }
1663
1664 if (req->src_rect.w > (req->dst_rect.w * 4)) {
1665 if (req->src_rect.w % req->dst_rect.w) {
1666 mdp4_stat.err_scale++;
1667 pr_err("%s: need integer (w)!\n", __func__);
1668 return -ERANGE;
1669 }
1670 }
1671 }
1672
1673 if (((req->src_rect.x + req->src_rect.w) > req->src.width) ||
1674 ((req->src_rect.y + req->src_rect.h) > req->src.height)) {
1675 mdp4_stat.err_size++;
1676 pr_err("%s invalid src rectangle\n", __func__);
1677 return -ERANGE;
1678 }
1679
1680 if (ctrl->panel_3d != MDP4_3D_SIDE_BY_SIDE) {
1681 int xres;
1682 int yres;
1683
1684 xres = mfd->panel_info.xres;
1685 yres = mfd->panel_info.yres;
1686
1687 if (((req->dst_rect.x + req->dst_rect.w) > xres) ||
1688 ((req->dst_rect.y + req->dst_rect.h) > yres)) {
1689 mdp4_stat.err_size++;
1690 pr_err("%s invalid dst rectangle\n", __func__);
1691 return -ERANGE;
1692 }
1693 }
1694
1695 ptype = mdp4_overlay_format2type(req->src.format);
1696 if (ptype < 0) {
1697 pr_err("%s: mdp4_overlay_format2type!\n", __func__);
1698 return ptype;
1699 }
1700
1701 req_share = (req->flags & MDP_OV_PIPE_SHARE);
1702
1703 if (req->id == MSMFB_NEW_REQUEST) /* new request */
1704 pipe = mdp4_overlay_pipe_alloc(ptype, mixer, req_share);
1705 else
1706 pipe = mdp4_overlay_ndx2pipe(req->id);
1707
1708 if (pipe == NULL) {
1709 pr_err("%s: pipe == NULL!\n", __func__);
1710 return -ENOMEM;
1711 }
1712
1713 /* no down scale at rgb pipe */
1714 if (pipe->pipe_num <= OVERLAY_PIPE_RGB2) {
1715 if ((req->src_rect.h > req->dst_rect.h) ||
1716 (req->src_rect.w > req->dst_rect.w)) {
1717 pr_err("%s: h>h || w>w!\n", __func__);
1718 return -ERANGE;
1719 }
1720 }
1721
1722 pipe->src_format = req->src.format;
1723 ret = mdp4_overlay_format2pipe(pipe);
1724 if (ret < 0) {
1725 pr_err("%s: mdp4_overlay_format2pipe!\n", __func__);
1726 return ret;
1727 }
1728
1729 /*
1730 * base layer == 1, reserved for frame buffer
1731 * zorder 0 == stage 0 == 2
1732 * zorder 1 == stage 1 == 3
1733 * zorder 2 == stage 2 == 4
1734 */
1735 if (req->id == MSMFB_NEW_REQUEST) { /* new request */
1736 pd = &ctrl->ov_pipe[pipe->pipe_num];
1737 for (j = 0; j < MDP4_MAX_SHARE; j++) {
1738 if (pd->ndx_list[j] == 0) {
1739 pd->ndx_list[j] = pipe->pipe_ndx;
1740 break;
1741 }
1742 }
1743 pipe->pipe_share = req_share;
1744 pd->ref_cnt++;
1745 pipe->pipe_used++;
1746 pipe->mixer_num = mixer;
1747 pipe->mixer_stage = req->z_order + MDP4_MIXER_STAGE0;
1748 pr_debug("%s: zorder=%d pipe ndx=%d num=%d\n", __func__,
1749 req->z_order, pipe->pipe_ndx, pipe->pipe_num);
1750
1751 }
1752
1753 pipe->src_width = req->src.width & 0x07ff; /* source img width */
1754 pipe->src_height = req->src.height & 0x07ff; /* source img height */
1755 pipe->src_h = req->src_rect.h & 0x07ff;
1756 pipe->src_w = req->src_rect.w & 0x07ff;
1757 pipe->src_y = req->src_rect.y & 0x07ff;
1758 pipe->src_x = req->src_rect.x & 0x07ff;
1759 pipe->dst_h = req->dst_rect.h & 0x07ff;
1760 pipe->dst_w = req->dst_rect.w & 0x07ff;
1761 pipe->dst_y = req->dst_rect.y & 0x07ff;
1762 pipe->dst_x = req->dst_rect.x & 0x07ff;
1763
1764 pipe->op_mode = 0;
1765
1766 if (req->flags & MDP_FLIP_LR)
1767 pipe->op_mode |= MDP4_OP_FLIP_LR;
1768
1769 if (req->flags & MDP_FLIP_UD)
1770 pipe->op_mode |= MDP4_OP_FLIP_UD;
1771
1772 if (req->flags & MDP_DITHER)
1773 pipe->op_mode |= MDP4_OP_DITHER_EN;
1774
1775 if (req->flags & MDP_DEINTERLACE)
1776 pipe->op_mode |= MDP4_OP_DEINT_EN;
1777
1778 if (req->flags & MDP_DEINTERLACE_ODD)
1779 pipe->op_mode |= MDP4_OP_DEINT_ODD_REF;
1780
1781 pipe->is_fg = req->is_fg;/* control alpha and color key */
1782
1783 pipe->alpha = req->alpha & 0x0ff;
1784
1785 pipe->transp = req->transp_mask;
1786
1787 *ppipe = pipe;
1788
1789 return 0;
1790}
1791
1792static int get_img(struct msmfb_data *img, struct fb_info *info,
1793 unsigned long *start, unsigned long *len, struct file **pp_file)
1794{
1795 int put_needed, ret = 0, fb_num;
1796 struct file *file;
1797#ifdef CONFIG_ANDROID_PMEM
1798 unsigned long vstart;
1799#endif
1800
1801 if (img->flags & MDP_BLIT_SRC_GEM) {
1802 *pp_file = NULL;
1803 return kgsl_gem_obj_addr(img->memory_id, (int) img->priv,
1804 start, len);
1805 }
1806
1807#ifdef CONFIG_ANDROID_PMEM
1808 if (!get_pmem_file(img->memory_id, start, &vstart, len, pp_file))
1809 return 0;
1810#endif
1811 file = fget_light(img->memory_id, &put_needed);
1812 if (file == NULL)
1813 return -1;
1814
1815 if (MAJOR(file->f_dentry->d_inode->i_rdev) == FB_MAJOR) {
1816 fb_num = MINOR(file->f_dentry->d_inode->i_rdev);
1817 if (get_fb_phys_info(start, len, fb_num))
1818 ret = -1;
1819 else
1820 *pp_file = file;
1821 } else
1822 ret = -1;
1823 if (ret)
1824 fput_light(file, put_needed);
1825 return ret;
1826}
1827
kuogee hsieh4aea2742011-07-06 11:05:05 -07001828#ifdef CONFIG_FB_MSM_MIPI_DSI
1829int mdp4_overlay_3d_sbys(struct fb_info *info, struct msmfb_overlay_3d *req)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001830{
1831 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
1832 int ret = -EPERM;
1833
1834 if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
1835 return -EINTR;
1836
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001837 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
kuogee hsieh4aea2742011-07-06 11:05:05 -07001838 mdp4_dsi_cmd_3d_sbys(mfd, req);
1839 ret = 0;
1840 } else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
1841 mdp4_dsi_video_3d_sbys(mfd, req);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001842 ret = 0;
1843 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001844 mutex_unlock(&mfd->dma->ov_mutex);
1845
1846 return ret;
1847}
kuogee hsieh4aea2742011-07-06 11:05:05 -07001848#else
1849int mdp4_overlay_3d_sbys(struct fb_info *info, struct msmfb_overlay_3d *req)
1850{
1851 /* do nothing */
1852 return -EPERM;
1853}
1854#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001855
1856#ifdef CONFIG_FB_MSM_OVERLAY_WRITEBACK
1857int mdp4_overlay_blt(struct fb_info *info, struct msmfb_overlay_blt *req)
1858{
1859 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
1860
1861 if (mfd == NULL)
1862 return -ENODEV;
1863
1864 if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
1865 return -EINTR;
1866
1867 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD)
1868 mdp4_dsi_overlay_blt(mfd, req);
1869 else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO)
1870 mdp4_dsi_video_overlay_blt(mfd, req);
1871 else if (ctrl->panel_mode & MDP4_PANEL_LCDC)
1872 mdp4_lcdc_overlay_blt(mfd, req);
1873
1874 mutex_unlock(&mfd->dma->ov_mutex);
1875
1876 return 0;
1877}
1878
1879int mdp4_overlay_blt_offset(struct fb_info *info, struct msmfb_overlay_blt *req)
1880{
1881 int ret = 0;
1882
1883 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
1884
1885 if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
1886 return -EINTR;
1887
1888 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD)
1889 ret = mdp4_dsi_overlay_blt_offset(mfd, req);
1890 else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO)
1891 ret = mdp4_dsi_video_overlay_blt_offset(mfd, req);
1892 else if (ctrl->panel_mode & MDP4_PANEL_LCDC)
1893 ret = mdp4_lcdc_overlay_blt_offset(mfd, req);
1894
1895 mutex_unlock(&mfd->dma->ov_mutex);
1896
1897 return ret;
1898}
1899#endif
1900
1901int mdp4_overlay_get(struct fb_info *info, struct mdp_overlay *req)
1902{
1903 struct mdp4_overlay_pipe *pipe;
1904
1905 pipe = mdp4_overlay_ndx2pipe(req->id);
1906 if (pipe == NULL)
1907 return -ENODEV;
1908
1909 *req = pipe->req_data;
1910
1911 return 0;
1912}
1913
1914#define OVERLAY_VGA_SIZE 0x04B000
1915#define OVERLAY_720P_TILE_SIZE 0x0E6000
1916#define OVERLAY_WSVGA_SIZE 0x98000 /* 1024x608, align 600 to 32bit */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001917
1918#ifdef CONFIG_MSM_BUS_SCALING
1919#define OVERLAY_BUS_SCALE_TABLE_BASE 6
1920#endif
1921
1922static int mdp4_overlay_is_rgb_type(int format)
1923{
1924 switch (format) {
1925 case MDP_RGB_565:
1926 case MDP_RGB_888:
1927 case MDP_BGR_565:
1928 case MDP_XRGB_8888:
1929 case MDP_ARGB_8888:
1930 case MDP_RGBA_8888:
1931 case MDP_BGRA_8888:
1932 case MDP_RGBX_8888:
1933 return 1;
1934 default:
1935 return 0;
1936 }
1937}
1938
1939static uint32 mdp4_overlay_get_perf_level(struct mdp_overlay *req)
1940{
1941 int is_fg;
1942
1943 if (req->is_fg && ((req->alpha & 0x0ff) == 0xff))
1944 is_fg = 1;
1945
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07001946 if (mdp4_extn_disp)
1947 return OVERLAY_PERF_LEVEL1;
1948
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001949 if (req->flags & MDP_DEINTERLACE)
1950 return OVERLAY_PERF_LEVEL1;
1951
1952 if (mdp4_overlay_is_rgb_type(req->src.format) && is_fg &&
1953 ((req->src.width * req->src.height) <= OVERLAY_WSVGA_SIZE))
1954 return OVERLAY_PERF_LEVEL4;
1955 else if (mdp4_overlay_is_rgb_type(req->src.format))
1956 return OVERLAY_PERF_LEVEL1;
1957
1958 if (ctrl->ov_pipe[OVERLAY_PIPE_VG1].ref_cnt &&
1959 ctrl->ov_pipe[OVERLAY_PIPE_VG2].ref_cnt)
1960 return OVERLAY_PERF_LEVEL1;
1961
1962 if (req->src.width*req->src.height <= OVERLAY_VGA_SIZE)
1963 return OVERLAY_PERF_LEVEL3;
1964 else if (req->src.width*req->src.height <= OVERLAY_720P_TILE_SIZE)
1965 return OVERLAY_PERF_LEVEL2;
1966 else
1967 return OVERLAY_PERF_LEVEL1;
1968}
1969
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07001970void mdp4_update_perf_level(u32 perf_level)
1971{
1972 new_perf_level = perf_level;
1973}
1974
kuogee hsiehc4b8b2f2011-07-12 13:32:14 -07001975void mdp4_set_perf_level(void)
1976{
1977 static int old_perf_level;
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07001978 int cur_perf_level;
kuogee hsiehc4b8b2f2011-07-12 13:32:14 -07001979
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07001980 if (mdp4_extn_disp)
1981 cur_perf_level = OVERLAY_PERF_LEVEL1;
1982 else
1983 cur_perf_level = new_perf_level;
1984
1985 if (old_perf_level != cur_perf_level) {
1986 mdp_set_core_clk(cur_perf_level);
1987 old_perf_level = cur_perf_level;
kuogee hsiehc4b8b2f2011-07-12 13:32:14 -07001988 }
1989}
1990
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001991int mdp4_overlay_set(struct fb_info *info, struct mdp_overlay *req)
1992{
1993 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
kuogee hsiehc4b8b2f2011-07-12 13:32:14 -07001994 int ret, mixer, perf_level;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001995 struct mdp4_overlay_pipe *pipe;
1996
1997 if (mfd == NULL) {
1998 pr_err("%s: mfd == NULL, -ENODEV\n", __func__);
1999 return -ENODEV;
2000 }
2001
2002 if (!mfd->panel_power_on) /* suspended */
2003 return -EPERM;
2004
2005 if (req->src.format == MDP_FB_FORMAT)
2006 req->src.format = mfd->fb_imgType;
2007
2008 if (mutex_lock_interruptible(&mfd->dma->ov_mutex)) {
2009 pr_err("%s: mutex_lock_interruptible, -EINTR\n", __func__);
2010 return -EINTR;
2011 }
2012
2013 perf_level = mdp4_overlay_get_perf_level(req);
2014
2015 if ((mfd->panel_info.type == LCDC_PANEL) &&
2016 (req->src_rect.h >
2017 req->dst_rect.h || req->src_rect.w > req->dst_rect.w)) {
2018 if (mdp4_overlay_validate_downscale(req, mfd,
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07002019 perf_level, mfd->panel_info.clk_rate))
2020 mdp4_lcdc_overlay_blt_start(mfd);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002021 }
kuogee hsieh4d3c7792011-07-25 11:02:24 -07002022
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002023 if ((mfd->panel_info.type == MIPI_VIDEO_PANEL) &&
2024 (req->src_rect.h >
2025 req->dst_rect.h || req->src_rect.w > req->dst_rect.w)) {
2026 if (mdp4_overlay_validate_downscale(req, mfd,
kuogee hsieh4d3c7792011-07-25 11:02:24 -07002027 perf_level, (&mfd->panel_info.mipi)->dsi_pclk_rate))
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07002028 mdp4_dsi_video_blt_start(mfd);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002029 }
kuogee hsieh4d3c7792011-07-25 11:02:24 -07002030
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002031 mixer = mfd->panel_info.pdest; /* DISPLAY_1 or DISPLAY_2 */
2032
2033 ret = mdp4_overlay_req2pipe(req, mixer, &pipe, mfd);
2034 if (ret < 0) {
2035 mutex_unlock(&mfd->dma->ov_mutex);
2036 pr_err("%s: mdp4_overlay_req2pipe, ret=%d\n", __func__, ret);
2037 return ret;
2038 }
2039
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002040 /*
2041 * writeback (blt) mode to provide work around for
2042 * dsi cmd mode interface hardware bug.
2043 */
2044 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
2045 if (mixer == MDP4_MIXER0 && req->dst_rect.x != 0) {
2046 mdp4_dsi_blt_dmap_busy_wait(mfd);
2047 mdp4_dsi_overlay_blt_start(mfd);
2048 }
2049 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002050
2051 /* return id back to user */
2052 req->id = pipe->pipe_ndx; /* pipe_ndx start from 1 */
2053 pipe->req_data = *req; /* keep original req */
2054
2055 pipe->flags = req->flags;
2056
2057 if (pipe->flags & MDP_SHARPENING) {
2058 bool test = ((pipe->req_data.dpp.sharp_strength > 0) &&
2059 ((req->src_rect.w > req->dst_rect.w) &&
2060 (req->src_rect.h > req->dst_rect.h)));
2061 if (test) {
2062 pr_warn("%s: No sharpening while downscaling.\n",
2063 __func__);
2064 pipe->flags &= ~MDP_SHARPENING;
2065 }
2066 }
2067
2068 mdp4_stat.overlay_set[pipe->mixer_num]++;
2069
2070 if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
2071 if (mdp_hw_revision == MDP4_REVISION_V2_1 &&
2072 pipe->mixer_num == MDP4_MIXER0)
2073 mdp4_overlay_status_write(MDP4_OVERLAY_TYPE_SET, true);
2074 }
2075
Adrian Salido-Moreno5e912032011-08-29 11:15:47 -07002076 if (new_perf_level != perf_level) {
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07002077 mdp4_update_perf_level(perf_level);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002078
Adrian Salido-Moreno5e912032011-08-29 11:15:47 -07002079 /* change clck base on perf level */
Adrian Salido-Moreno5e912032011-08-29 11:15:47 -07002080 if (pipe->mixer_num == MDP4_MIXER0) {
2081 if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
kuogee hsiehaff429a2011-09-22 17:50:05 -07002082 mdp4_overlay_dsi_video_set_perf(mfd);
Adrian Salido-Moreno5e912032011-08-29 11:15:47 -07002083 } else if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
2084 mdp4_dsi_cmd_dma_busy_wait(mfd);
2085 mdp4_dsi_blt_dmap_busy_wait(mfd);
2086 mdp4_set_perf_level();
2087 } else if (ctrl->panel_mode & MDP4_PANEL_LCDC) {
kuogee hsiehaff429a2011-09-22 17:50:05 -07002088 mdp4_overlay_lcdc_set_perf(mfd);
Adrian Salido-Moreno5e912032011-08-29 11:15:47 -07002089 } else if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
2090 mdp4_mddi_dma_busy_wait(mfd);
2091 mdp4_set_perf_level();
2092 }
2093 } else {
2094 if (ctrl->panel_mode & MDP4_PANEL_DTV)
2095 mdp4_overlay_dtv_vsync_push(mfd, pipe);
kuogee hsieh9452ecb2011-08-01 18:26:23 -07002096 }
kuogee hsieh9452ecb2011-08-01 18:26:23 -07002097 }
kuogee hsieh9452ecb2011-08-01 18:26:23 -07002098
2099 mutex_unlock(&mfd->dma->ov_mutex);
2100
2101
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002102#ifdef CONFIG_MSM_BUS_SCALING
2103 if (pipe->mixer_num == MDP4_MIXER0) {
2104 mdp_bus_scale_update_request(OVERLAY_BUS_SCALE_TABLE_BASE
2105 - perf_level);
2106 }
2107#endif
2108
2109 return 0;
2110}
2111
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002112int mdp4_overlay_unset(struct fb_info *info, int ndx)
2113{
2114 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
2115 struct mdp4_overlay_pipe *pipe;
2116 uint32 flags;
2117
2118 if (mfd == NULL)
2119 return -ENODEV;
2120
2121 if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
2122 return -EINTR;
2123
2124 pipe = mdp4_overlay_ndx2pipe(ndx);
2125
2126 if (pipe == NULL) {
2127 mutex_unlock(&mfd->dma->ov_mutex);
2128 return -ENODEV;
2129 }
2130
2131 if (pipe->mixer_num == MDP4_MIXER1)
2132 ctrl->mixer1_played = 0;
2133 else {
2134 /* mixer 0 */
2135 ctrl->mixer0_played = 0;
2136#ifdef CONFIG_FB_MSM_MIPI_DSI
2137 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
2138 if (mfd->panel_power_on) {
2139 mdp4_dsi_blt_dmap_busy_wait(mfd);
2140 }
2141 }
2142#else
2143 if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
2144 if (mfd->panel_power_on)
2145 mdp4_mddi_dma_busy_wait(mfd);
2146 }
2147#endif
2148 }
2149
2150 mdp4_mixer_stage_down(pipe);
2151
2152 if (pipe->mixer_num == MDP4_MIXER0) {
2153#ifdef CONFIG_FB_MSM_MIPI_DSI
2154 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
2155 if (mfd->panel_power_on)
2156 if (mdp4_dsi_overlay_blt_stop(mfd) == 0)
2157 mdp4_dsi_cmd_overlay_restore();
2158 } else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
kuogee hsiehebca0c72011-07-14 13:30:33 -07002159 mdp4_overlay_reg_flush(pipe, 1);
kuogee hsieh5c6cfbf2011-09-06 19:01:31 -07002160 if (mfd->panel_power_on) {
2161 flags = pipe->flags;
2162 pipe->flags &= ~MDP_OV_PLAY_NOWAIT;
2163 mdp4_overlay_dsi_video_vsync_push(mfd, pipe);
2164 pipe->flags = flags;
2165 }
kuogee hsieh4d3c7792011-07-25 11:02:24 -07002166 mdp4_dsi_video_blt_stop(mfd);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002167 }
2168#else
2169 if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
2170 if (mdp_hw_revision == MDP4_REVISION_V2_1)
2171 mdp4_overlay_status_write(
2172 MDP4_OVERLAY_TYPE_UNSET, true);
2173 if (mfd->panel_power_on)
2174 mdp4_mddi_overlay_restore();
2175 }
2176#endif
2177 else if (ctrl->panel_mode & MDP4_PANEL_LCDC) {
kuogee hsiehebca0c72011-07-14 13:30:33 -07002178 mdp4_overlay_reg_flush(pipe, 1);
kuogee hsieh5c6cfbf2011-09-06 19:01:31 -07002179 if (mfd->panel_power_on) {
2180 flags = pipe->flags;
2181 pipe->flags &= ~MDP_OV_PLAY_NOWAIT;
2182 mdp4_overlay_lcdc_vsync_push(mfd, pipe);
2183 pipe->flags = flags;
2184 }
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07002185 mdp4_lcdc_overlay_blt_stop(mfd);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002186 }
2187 }
2188#ifdef CONFIG_FB_MSM_DTV
2189 else { /* mixer1, DTV, ATV */
kuogee hsieh9452ecb2011-08-01 18:26:23 -07002190 if (ctrl->panel_mode & MDP4_PANEL_DTV) {
kuogee hsieh5c6cfbf2011-09-06 19:01:31 -07002191 if (mfd->panel_power_on) {
2192 flags = pipe->flags;
2193 pipe->flags &= ~MDP_OV_PLAY_NOWAIT;
2194 mdp4_overlay_dtv_vsync_push(mfd, pipe);
2195 pipe->flags = flags;
2196 }
kuogee hsieh9452ecb2011-08-01 18:26:23 -07002197 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002198 }
2199#endif
2200
2201 mdp4_stat.overlay_unset[pipe->mixer_num]++;
2202
2203 mdp4_overlay_pipe_free(pipe);
2204
2205 if (!(ctrl->ov_pipe[OVERLAY_PIPE_VG1].ref_cnt +
2206 ctrl->ov_pipe[OVERLAY_PIPE_VG2].ref_cnt))
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07002207 mdp4_update_perf_level(OVERLAY_PERF_LEVEL4);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002208
2209 mutex_unlock(&mfd->dma->ov_mutex);
2210
2211#ifdef CONFIG_MSM_BUS_SCALING
2212 if (pipe->mixer_num == MDP4_MIXER0)
2213 if (mfd->panel_power_on)
2214 mdp_bus_scale_update_request(2);
2215#endif
2216 return 0;
2217}
2218
2219struct tile_desc {
2220 uint32 width; /* tile's width */
2221 uint32 height; /* tile's height */
2222 uint32 row_tile_w; /* tiles per row's width */
2223 uint32 row_tile_h; /* tiles per row's height */
2224};
2225
2226void tile_samsung(struct tile_desc *tp)
2227{
2228 /*
2229 * each row of samsung tile consists of two tiles in height
2230 * and two tiles in width which means width should align to
2231 * 64 x 2 bytes and height should align to 32 x 2 bytes.
2232 * video decoder generate two tiles in width and one tile
2233 * in height which ends up height align to 32 X 1 bytes.
2234 */
2235 tp->width = 64; /* 64 bytes */
2236 tp->row_tile_w = 2; /* 2 tiles per row's width */
2237 tp->height = 32; /* 32 bytes */
2238 tp->row_tile_h = 1; /* 1 tiles per row's height */
2239}
2240
2241uint32 tile_mem_size(struct mdp4_overlay_pipe *pipe, struct tile_desc *tp)
2242{
2243 uint32 tile_w, tile_h;
2244 uint32 row_num_w, row_num_h;
2245
2246
2247 tile_w = tp->width * tp->row_tile_w;
2248 tile_h = tp->height * tp->row_tile_h;
2249
2250 row_num_w = (pipe->src_width + tile_w - 1) / tile_w;
2251 row_num_h = (pipe->src_height + tile_h - 1) / tile_h;
2252 return ((row_num_w * row_num_h * tile_w * tile_h) + 8191) & ~8191;
2253}
2254
2255int mdp4_overlay_play(struct fb_info *info, struct msmfb_overlay_data *req,
2256 struct file **pp_src_file, struct file **pp_src_plane1_file,
2257 struct file **pp_src_plane2_file)
2258{
2259 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
2260 struct msmfb_data *img;
2261 struct mdp4_overlay_pipe *pipe;
2262 struct mdp4_pipe_desc *pd;
2263 ulong start, addr;
2264 ulong len = 0;
2265 struct file *p_src_file = 0;
2266 struct file *p_src_plane1_file = 0, *p_src_plane2_file = 0;
2267 uint32_t overlay_version = 0;
2268
2269 if (mfd == NULL)
2270 return -ENODEV;
2271
2272 if (!mfd->panel_power_on) /* suspended */
2273 return -EPERM;
2274
2275 pipe = mdp4_overlay_ndx2pipe(req->id);
2276 if (pipe == NULL) {
2277 pr_err("%s: req_id=%d Error\n", __func__, req->id);
2278 return -ENODEV;
2279 }
2280
2281 if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
2282 return -EINTR;
2283
2284 pd = &ctrl->ov_pipe[pipe->pipe_num];
2285 if (pd->player && pipe != pd->player) {
2286 if (pipe->pipe_type == OVERLAY_TYPE_RGB) {
2287 mutex_unlock(&mfd->dma->ov_mutex);
2288 return 0; /* ignore it, kicked out already */
2289 }
2290 }
2291
2292 pd->player = pipe; /* keep */
2293
2294 img = &req->data;
2295 get_img(img, info, &start, &len, &p_src_file);
2296 if (len == 0) {
2297 mutex_unlock(&mfd->dma->ov_mutex);
2298 pr_err("%s: pmem Error\n", __func__);
2299 return -1;
2300 }
2301 *pp_src_file = p_src_file;
2302
2303 addr = start + img->offset;
2304 pipe->srcp0_addr = addr;
2305 pipe->srcp0_ystride = pipe->src_width * pipe->bpp;
2306
2307 if ((req->version_key & VERSION_KEY_MASK) == 0xF9E8D700)
2308 overlay_version = (req->version_key & ~VERSION_KEY_MASK);
2309
2310 if (pipe->fetch_plane == OVERLAY_PLANE_PSEUDO_PLANAR) {
2311 if (overlay_version > 0) {
2312 img = &req->plane1_data;
2313 get_img(img, info, &start, &len, &p_src_plane1_file);
2314 if (len == 0) {
2315 mutex_unlock(&mfd->dma->ov_mutex);
2316 pr_err("%s: Error to get plane1\n", __func__);
2317 return -EINVAL;
2318 }
2319 pipe->srcp1_addr = start + img->offset;
2320 *pp_src_plane1_file = p_src_plane1_file;
2321 } else if (pipe->frame_format ==
2322 MDP4_FRAME_FORMAT_VIDEO_SUPERTILE) {
2323 struct tile_desc tile;
2324
2325 tile_samsung(&tile);
2326 pipe->srcp1_addr = addr + tile_mem_size(pipe, &tile);
2327 } else {
2328 pipe->srcp1_addr = addr + (pipe->src_width *
2329 pipe->src_height);
2330 }
2331 pipe->srcp0_ystride = pipe->src_width;
2332 if ((pipe->src_format == MDP_Y_CRCB_H1V1) ||
2333 (pipe->src_format == MDP_Y_CBCR_H1V1)) {
2334 if (pipe->src_width > YUV_444_MAX_WIDTH)
2335 pipe->srcp1_ystride = pipe->src_width << 2;
2336 else
2337 pipe->srcp1_ystride = pipe->src_width << 1;
2338 } else
2339 pipe->srcp1_ystride = pipe->src_width;
2340
2341 } else if (pipe->fetch_plane == OVERLAY_PLANE_PLANAR) {
2342 if (overlay_version > 0) {
2343 img = &req->plane1_data;
2344 get_img(img, info, &start, &len, &p_src_plane1_file);
2345 if (len == 0) {
2346 mutex_unlock(&mfd->dma->ov_mutex);
2347 pr_err("%s: Error to get plane1\n", __func__);
2348 return -EINVAL;
2349 }
2350 pipe->srcp1_addr = start + img->offset;
2351 *pp_src_plane1_file = p_src_plane1_file;
2352
2353 img = &req->plane2_data;
2354 get_img(img, info, &start, &len, &p_src_plane2_file);
2355 if (len == 0) {
2356 mutex_unlock(&mfd->dma->ov_mutex);
2357 pr_err("%s: Error to get plane2\n", __func__);
2358 return -EINVAL;
2359 }
2360 pipe->srcp2_addr = start + img->offset;
2361 *pp_src_plane2_file = p_src_plane2_file;
2362 } else {
2363 addr += (pipe->src_width * pipe->src_height);
2364 pipe->srcp1_addr = addr;
2365 addr += ((pipe->src_width / 2) *
2366 (pipe->src_height / 2));
2367 pipe->srcp2_addr = addr;
2368 }
Adrian Salido-Moreno33dc7b92011-08-18 16:16:12 -07002369 /* mdp planar format expects Cb in srcp1 and Cr in p2 */
2370 if (pipe->src_format == MDP_Y_CR_CB_H2V2)
2371 swap(pipe->srcp1_addr, pipe->srcp2_addr);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002372 pipe->srcp0_ystride = pipe->src_width;
2373 pipe->srcp1_ystride = pipe->src_width / 2;
2374 pipe->srcp2_ystride = pipe->src_width / 2;
2375 }
2376
2377 if (pipe->pipe_num >= OVERLAY_PIPE_VG1)
2378 mdp4_overlay_vg_setup(pipe); /* video/graphic pipe */
2379 else {
2380 if (pipe->flags & MDP_SHARPENING) {
2381 pr_warn(
2382 "%s: Sharpening/Smoothing not supported on RGB pipe\n",
2383 __func__);
2384 pipe->flags &= ~MDP_SHARPENING;
2385 }
2386 mdp4_overlay_rgb_setup(pipe); /* rgb pipe */
2387 }
2388
2389 mdp4_mixer_blend_setup(pipe);
2390 mdp4_mixer_stage_up(pipe);
2391
2392 if (pipe->mixer_num == MDP4_MIXER1) {
2393 ctrl->mixer1_played++;
2394 /* enternal interface */
2395 if (ctrl->panel_mode & MDP4_PANEL_DTV)
2396#ifdef CONFIG_FB_MSM_DTV
2397 mdp4_overlay_dtv_ov_done_push(mfd, pipe);
2398#else
2399 mdp4_overlay_reg_flush(pipe, 1);
2400#endif
2401 else if (ctrl->panel_mode & MDP4_PANEL_ATV)
2402 mdp4_overlay_reg_flush(pipe, 1);
2403 } else {
2404 /* primary interface */
2405 ctrl->mixer0_played++;
kuogee hsieh3de11f32011-07-08 14:09:11 -07002406 if (ctrl->panel_mode & MDP4_PANEL_LCDC) {
2407 mdp4_overlay_reg_flush(pipe, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002408 mdp4_overlay_lcdc_vsync_push(mfd, pipe);
kuogee hsieh3de11f32011-07-08 14:09:11 -07002409 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002410#ifdef CONFIG_FB_MSM_MIPI_DSI
kuogee hsieh3de11f32011-07-08 14:09:11 -07002411 else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
2412 mdp4_overlay_reg_flush(pipe, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002413 mdp4_overlay_dsi_video_vsync_push(mfd, pipe);
kuogee hsieh3de11f32011-07-08 14:09:11 -07002414 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002415#endif
2416 else {
2417 /* mddi & mipi dsi cmd mode */
2418 if (pipe->flags & MDP_OV_PLAY_NOWAIT) {
2419 mdp4_stat.overlay_play[pipe->mixer_num]++;
2420 mutex_unlock(&mfd->dma->ov_mutex);
2421 return 0;
2422 }
2423#ifdef CONFIG_FB_MSM_MIPI_DSI
2424 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
2425 mdp4_dsi_cmd_dma_busy_wait(mfd);
2426 mdp4_dsi_cmd_kickoff_video(mfd, pipe);
2427 }
2428#else
2429 if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
2430 mdp4_mddi_dma_busy_wait(mfd);
2431 mdp4_mddi_kickoff_video(mfd, pipe);
2432 }
2433#endif
2434 }
2435 }
2436
2437 mdp4_stat.overlay_play[pipe->mixer_num]++;
2438
2439 mutex_unlock(&mfd->dma->ov_mutex);
2440
2441 return 0;
2442}