blob: 8cd55cfd2cb8bd0330ad4f4dc03f4ed72835fa94 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/gpio_event.h>
15#include <asm/mach-types.h>
16#include <asm/mach/arch.h>
17#include <mach/board.h>
18#include <mach/msm_iomap.h>
19#include <mach/msm_hsusb.h>
20#include <mach/rpc_hsusb.h>
21#include <mach/rpc_pmapp.h>
22#include <mach/usbdiag.h>
23#include <mach/msm_memtypes.h>
24#include <mach/msm_serial_hs.h>
25#include <linux/usb/android.h>
26#include <linux/platform_device.h>
27#include <linux/io.h>
28#include <linux/gpio.h>
29#include <mach/vreg.h>
30#include <mach/pmic.h>
31#include <mach/socinfo.h>
32#include <linux/mtd/nand.h>
33#include <linux/mtd/partitions.h>
34#include <asm/mach/mmc.h>
35#include <linux/i2c.h>
36#include <linux/i2c/sx150x.h>
37#include <linux/gpio.h>
38#include <linux/android_pmem.h>
39#include <linux/bootmem.h>
40#include <linux/mfd/marimba.h>
41#include <mach/vreg.h>
42#include <linux/power_supply.h>
43#include <mach/rpc_pmapp.h>
44
45#include <mach/msm_battery.h>
46#include <linux/smsc911x.h>
47#include <linux/atmel_maxtouch.h>
48#include "devices.h"
49#include "timer.h"
50#include "devices-msm7x2xa.h"
51#include "pm.h"
52#include <mach/rpc_server_handset.h>
53#include <mach/socinfo.h>
54
55#define PMEM_KERNEL_EBI1_SIZE 0x3A000
56#define MSM_PMEM_AUDIO_SIZE 0x5B000
57#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
58#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
Rahul Kashyap181d5552011-07-07 10:39:23 +053059#define BAHAMA_SLAVE_ID_FM_REG 0x02
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060#define FM_GPIO 83
61
62enum {
63 GPIO_EXPANDER_IRQ_BASE = NR_MSM_IRQS + NR_GPIO_IRQS,
64 GPIO_EXPANDER_GPIO_BASE = NR_MSM_GPIOS,
65 /* SURF expander */
66 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
67 GPIO_BT_SYS_REST_EN = GPIO_CORE_EXPANDER_BASE,
68 GPIO_WLAN_EXT_POR_N,
69 GPIO_DISPLAY_PWR_EN,
70 GPIO_BACKLIGHT_EN,
71 GPIO_PRESSURE_XCLR,
72 GPIO_VREG_S3_EXP,
73 GPIO_UBM2M_PWRDWN,
74 GPIO_ETM_MODE_CS_N,
75 GPIO_HOST_VBUS_EN,
76 GPIO_SPI_MOSI,
77 GPIO_SPI_MISO,
78 GPIO_SPI_CLK,
79 GPIO_SPI_CS0_N,
80 GPIO_CORE_EXPANDER_IO13,
81 GPIO_CORE_EXPANDER_IO14,
82 GPIO_CORE_EXPANDER_IO15,
83 /* Camera expander */
84 GPIO_CAM_EXPANDER_BASE = GPIO_CORE_EXPANDER_BASE + 16,
85 GPIO_CAM_GP_STROBE_READY = GPIO_CAM_EXPANDER_BASE,
86 GPIO_CAM_GP_AFBUSY,
87 GPIO_CAM_GP_CAM_PWDN,
88 GPIO_CAM_GP_CAM1MP_XCLR,
89 GPIO_CAM_GP_CAMIF_RESET_N,
90 GPIO_CAM_GP_STROBE_CE,
91 GPIO_CAM_GP_LED_EN1,
92 GPIO_CAM_GP_LED_EN2,
93};
94
95#if defined(CONFIG_GPIO_SX150X)
96enum {
97 SX150X_CORE,
98 SX150X_CAM,
99};
100
101static struct sx150x_platform_data sx150x_data[] __initdata = {
102 [SX150X_CORE] = {
103 .gpio_base = GPIO_CORE_EXPANDER_BASE,
104 .oscio_is_gpo = false,
105 .io_pullup_ena = 0,
106 .io_pulldn_ena = 0,
107 .io_open_drain_ena = 0xfef8,
108 .irq_summary = -1,
109 },
110 [SX150X_CAM] = {
111 .gpio_base = GPIO_CAM_EXPANDER_BASE,
112 .oscio_is_gpo = false,
113 .io_pullup_ena = 0,
114 .io_pulldn_ena = 0,
115 .io_open_drain_ena = 0x23,
116 .irq_summary = -1,
117 },
118};
119#endif
120
121#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
122
123 /* FM Platform power and shutdown routines */
124#define FPGA_MSM_CNTRL_REG2 0x90008010
125static void config_pcm_i2s_mode(int mode)
126{
127 void __iomem *cfg_ptr;
128 u8 reg2;
129
130 cfg_ptr = ioremap_nocache(FPGA_MSM_CNTRL_REG2, sizeof(char));
131
132 if (!cfg_ptr)
133 return;
134 if (mode) {
135 /*enable the pcm mode in FPGA*/
136 reg2 = readb_relaxed(cfg_ptr);
137 if (reg2 == 0) {
138 reg2 = 1;
139 writeb_relaxed(reg2, cfg_ptr);
140 }
141 } else {
142 /*enable i2s mode in FPGA*/
143 reg2 = readb_relaxed(cfg_ptr);
144 if (reg2 == 1) {
145 reg2 = 0;
146 writeb_relaxed(reg2, cfg_ptr);
147 }
148 }
149 iounmap(cfg_ptr);
150}
151
152static unsigned fm_i2s_config_power_on[] = {
153 /*FM_I2S_SD*/
154 GPIO_CFG(68, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
155 /*FM_I2S_WS*/
156 GPIO_CFG(70, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
157 /*FM_I2S_SCK*/
158 GPIO_CFG(71, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
159};
160
161static unsigned fm_i2s_config_power_off[] = {
162 /*FM_I2S_SD*/
163 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
164 /*FM_I2S_WS*/
165 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
166 /*FM_I2S_SCK*/
167 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
168};
169
170static unsigned bt_config_power_on[] = {
171 /*RFR*/
172 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
173 /*CTS*/
174 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
175 /*RX*/
176 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
177 /*TX*/
178 GPIO_CFG(46, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
179};
180static unsigned bt_config_pcm_on[] = {
181 /*PCM_DOUT*/
182 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
183 /*PCM_DIN*/
184 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
185 /*PCM_SYNC*/
186 GPIO_CFG(70, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
187 /*PCM_CLK*/
188 GPIO_CFG(71, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
189};
190static unsigned bt_config_power_off[] = {
191 /*RFR*/
192 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
193 /*CTS*/
194 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
195 /*RX*/
196 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
197 /*TX*/
198 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
199};
200static unsigned bt_config_pcm_off[] = {
201 /*PCM_DOUT*/
202 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
203 /*PCM_DIN*/
204 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
205 /*PCM_SYNC*/
206 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
207 /*PCM_CLK*/
208 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
209};
210
211static int config_i2s(int mode)
212{
213 int pin, rc = 0;
214
215 if (mode == FM_I2S_ON) {
216 if (machine_is_msm7x27a_surf())
217 config_pcm_i2s_mode(0);
218 pr_err("%s mode = FM_I2S_ON", __func__);
219 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_on);
220 pin++) {
221 rc = gpio_tlmm_config(
222 fm_i2s_config_power_on[pin],
223 GPIO_CFG_ENABLE
224 );
225 if (rc < 0)
226 return rc;
227 }
228 } else if (mode == FM_I2S_OFF) {
229 pr_err("%s mode = FM_I2S_OFF", __func__);
230 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_off);
231 pin++) {
232 rc = gpio_tlmm_config(
233 fm_i2s_config_power_off[pin],
234 GPIO_CFG_ENABLE
235 );
236 if (rc < 0)
237 return rc;
238 }
239 }
240 return rc;
241}
242static int config_pcm(int mode)
243{
244 int pin, rc = 0;
245
246 if (mode == BT_PCM_ON) {
247 if (machine_is_msm7x27a_surf())
248 config_pcm_i2s_mode(1);
249 pr_err("%s mode =BT_PCM_ON", __func__);
250 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_on);
251 pin++) {
252 rc = gpio_tlmm_config(bt_config_pcm_on[pin],
253 GPIO_CFG_ENABLE);
254 if (rc < 0)
255 return rc;
256 }
257 } else if (mode == BT_PCM_OFF) {
258 pr_err("%s mode =BT_PCM_OFF", __func__);
259 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_off);
260 pin++) {
261 rc = gpio_tlmm_config(bt_config_pcm_off[pin],
262 GPIO_CFG_ENABLE);
263 if (rc < 0)
264 return rc;
265 }
266
267 }
268
269 return rc;
270}
271
272static int msm_bahama_setup_pcm_i2s(int mode)
273{
274 int fm_state = 0, bt_state = 0;
275 int rc = 0;
276 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
277
278 fm_state = marimba_get_fm_status(&config);
279 bt_state = marimba_get_bt_status(&config);
280
281 switch (mode) {
282 case BT_PCM_ON:
283 case BT_PCM_OFF:
284 if (!fm_state)
285 rc = config_pcm(mode);
286 break;
287 case FM_I2S_ON:
288 rc = config_i2s(mode);
289 break;
290 case FM_I2S_OFF:
291 if (bt_state)
292 rc = config_pcm(BT_PCM_ON);
293 else
294 rc = config_i2s(mode);
295 break;
296 default:
297 rc = -EIO;
298 pr_err("%s:Unsupported mode", __func__);
299 }
300 return rc;
301}
302
Rahul Kashyap181d5552011-07-07 10:39:23 +0530303static int bt_set_gpio(int on)
304{
305 int rc = 0;
306 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
307
308 if (on) {
309 rc = gpio_direction_output(GPIO_BT_SYS_REST_EN, 1);
310 msleep(100);
311 } else {
312 if (!marimba_get_fm_status(&config) &&
313 !marimba_get_bt_status(&config)) {
314 gpio_set_value_cansleep(GPIO_BT_SYS_REST_EN, 0);
315 rc = gpio_direction_input(GPIO_BT_SYS_REST_EN);
316 msleep(100);
317 }
318 }
319 if (rc)
320 pr_err("%s: BT sys_reset_en GPIO : Error", __func__);
321
322 return rc;
323}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700324static struct vreg *fm_regulator;
325static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
326{
327 int rc = 0;
328 const char *id = "FMPW";
329 uint32_t irqcfg;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530330 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
331 u8 value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700332
333 /* Voting for 1.8V Regulator */
334 fm_regulator = vreg_get(NULL , "msme1");
335 if (IS_ERR(fm_regulator)) {
336 pr_err("%s: vreg get failed with : (%ld)\n",
337 __func__, PTR_ERR(fm_regulator));
338 return -EINVAL;
339 }
340
341 /* Set the voltage level to 1.8V */
342 rc = vreg_set_level(fm_regulator, 1800);
343 if (rc < 0) {
344 pr_err("%s: set regulator level failed with :(%d)\n",
345 __func__, rc);
346 goto fm_vreg_fail;
347 }
348
349 /* Enabling the 1.8V regulator */
350 rc = vreg_enable(fm_regulator);
351 if (rc) {
352 pr_err("%s: enable regulator failed with :(%d)\n",
353 __func__, rc);
354 goto fm_vreg_fail;
355 }
356
357 /* Voting for 19.2MHz clock */
358 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
359 PMAPP_CLOCK_VOTE_ON);
360 if (rc < 0) {
361 pr_err("%s: clock vote failed with :(%d)\n",
362 __func__, rc);
363 goto fm_clock_vote_fail;
364 }
365
Rahul Kashyap181d5552011-07-07 10:39:23 +0530366 rc = bt_set_gpio(1);
367 if (rc) {
368 pr_err("%s: bt_set_gpio = %d", __func__, rc);
369 goto fm_gpio_config_fail;
370 }
371 /*re-write FM Slave Id, after reset*/
372 value = BAHAMA_SLAVE_ID_FM_ADDR;
373 rc = marimba_write_bit_mask(&config,
374 BAHAMA_SLAVE_ID_FM_REG, &value, 1, 0xFF);
375 if (rc < 0) {
376 pr_err("%s: FM Slave ID rewrite Failed = %d", __func__, rc);
377 goto fm_gpio_config_fail;
378 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700379 /* Configuring the FM GPIO */
380 irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
381 GPIO_CFG_2MA);
382
383 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
384 if (rc) {
385 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
386 __func__, irqcfg, rc);
387 goto fm_gpio_config_fail;
388 }
389
390 return 0;
391
392fm_gpio_config_fail:
393 pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
394 PMAPP_CLOCK_VOTE_OFF);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530395 bt_set_gpio(0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700396fm_clock_vote_fail:
397 vreg_disable(fm_regulator);
398
399fm_vreg_fail:
400 vreg_put(fm_regulator);
401
402 return rc;
403};
404
405static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
406{
407 int rc;
408 const char *id = "FMPW";
409
410 /* Releasing the GPIO line used by FM */
411 uint32_t irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
412 GPIO_CFG_2MA);
413
414 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
415 if (rc)
416 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
417 __func__, irqcfg, rc);
418
419 /* Releasing the 1.8V Regulator */
420 if (fm_regulator != NULL) {
421 rc = vreg_disable(fm_regulator);
422
423 if (rc)
424 pr_err("%s: disable regulator failed:(%d)\n",
425 __func__, rc);
426 fm_regulator = NULL;
427 }
428
429 /* Voting off the clock */
430 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
431 PMAPP_CLOCK_VOTE_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700432 if (rc < 0)
433 pr_err("%s: voting off failed with :(%d)\n",
434 __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530435 rc = bt_set_gpio(0);
436 if (rc)
437 pr_err("%s: bt_set_gpio = %d", __func__, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700438}
439
440static struct marimba_fm_platform_data marimba_fm_pdata = {
441 .fm_setup = fm_radio_setup,
442 .fm_shutdown = fm_radio_shutdown,
443 .irq = MSM_GPIO_TO_INT(FM_GPIO),
444 .vreg_s2 = NULL,
445 .vreg_xo_out = NULL,
446 /* Configuring the FM SoC as I2S Master */
447 .is_fm_soc_i2s_master = true,
448 .config_i2s_gpio = msm_bahama_setup_pcm_i2s,
449};
450
Santosh Sajjan6822c682011-07-26 10:49:36 +0530451static struct platform_device msm_wlan_ar6000_pm_device = {
452 .name = "wlan_ar6000_pm_dev",
453 .id = -1,
454};
455
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700456static struct platform_device msm_bt_power_device = {
457 .name = "bt_power",
458};
459 struct bahama_config_register {
460 u8 reg;
461 u8 value;
462 u8 mask;
463 };
464static const char * const vregs_bahama_name[] = {
465 "msme1",
466 "bt",
467};
468static struct vreg *vregs_bahama[ARRAY_SIZE(vregs_bahama_name)];
469
470static int bahama_bt(int on)
471{
472
473 int rc = 0;
474 int i;
475
476 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
477
478 struct bahama_variant_register {
479 const size_t size;
480 const struct bahama_config_register *set;
481 };
482
483 const struct bahama_config_register *p;
484
485 u8 version;
486
487 const struct bahama_config_register v10_bt_on[] = {
488 { 0xE9, 0x00, 0xFF },
489 { 0xF4, 0x80, 0xFF },
490 { 0xE4, 0x00, 0xFF },
491 { 0xE5, 0x00, 0x0F },
492#ifdef CONFIG_WLAN
493 { 0xE6, 0x38, 0x7F },
494 { 0xE7, 0x06, 0xFF },
495#endif
496 { 0xE9, 0x21, 0xFF },
497 { 0x01, 0x0C, 0x1F },
498 { 0x01, 0x08, 0x1F },
499 };
500
501 const struct bahama_config_register v20_bt_on_fm_off[] = {
502 { 0x11, 0x0C, 0xFF },
503 { 0x13, 0x01, 0xFF },
504 { 0xF4, 0x80, 0xFF },
505 { 0xF0, 0x00, 0xFF },
506 { 0xE9, 0x00, 0xFF },
507#ifdef CONFIG_WLAN
508 { 0x81, 0x00, 0x7F },
509 { 0x82, 0x00, 0xFF },
510 { 0xE6, 0x38, 0x7F },
511 { 0xE7, 0x06, 0xFF },
512#endif
513 { 0x8E, 0x15, 0xFF },
514 { 0x8F, 0x15, 0xFF },
515 { 0x90, 0x15, 0xFF },
516
517 { 0xE9, 0x21, 0xFF },
518 };
519
520 const struct bahama_config_register v20_bt_on_fm_on[] = {
521 { 0x11, 0x0C, 0xFF },
522 { 0x13, 0x01, 0xFF },
523 { 0xF4, 0x86, 0xFF },
524 { 0xF0, 0x06, 0xFF },
525 { 0xE9, 0x00, 0xFF },
526#ifdef CONFIG_WLAN
527 { 0x81, 0x00, 0x7F },
528 { 0x82, 0x00, 0xFF },
529 { 0xE6, 0x38, 0x7F },
530 { 0xE7, 0x06, 0xFF },
531#endif
532 { 0xE9, 0x21, 0xFF },
533 };
534
535 const struct bahama_config_register v10_bt_off[] = {
536 { 0xE9, 0x00, 0xFF },
537 };
538
539 const struct bahama_config_register v20_bt_off_fm_off[] = {
540 { 0xF4, 0x84, 0xFF },
541 { 0xF0, 0x04, 0xFF },
542 { 0xE9, 0x00, 0xFF }
543 };
544
545 const struct bahama_config_register v20_bt_off_fm_on[] = {
546 { 0xF4, 0x86, 0xFF },
547 { 0xF0, 0x06, 0xFF },
548 { 0xE9, 0x00, 0xFF }
549 };
550 const struct bahama_variant_register bt_bahama[2][3] = {
551 {
552 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
553 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
554 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
555 },
556 {
557 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
558 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
559 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
560 }
561 };
562
563 u8 offset = 0; /* index into bahama configs */
564 on = on ? 1 : 0;
565 version = marimba_read_bahama_ver(&config);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530566 if ((int)version < 0 || version == BAHAMA_VER_UNSUPPORTED) {
567 dev_err(&msm_bt_power_device.dev, "%s: Bahama \
568 version read Error, version = %d \n",
569 __func__, version);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700570 return -EIO;
571 }
572
573 if (version == BAHAMA_VER_2_0) {
574 if (marimba_get_fm_status(&config))
575 offset = 0x01;
576 }
577
578 p = bt_bahama[on][version + offset].set;
579
580 dev_info(&msm_bt_power_device.dev,
581 "%s: found version %d\n", __func__, version);
582
583 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
584 u8 value = (p+i)->value;
585 rc = marimba_write_bit_mask(&config,
586 (p+i)->reg,
587 &value,
588 sizeof((p+i)->value),
589 (p+i)->mask);
590 if (rc < 0) {
591 dev_err(&msm_bt_power_device.dev,
592 "%s: reg %x write failed: %d\n",
593 __func__, (p+i)->reg, rc);
594 return rc;
595 }
Rahul Kashyap92497af2011-07-07 12:13:52 +0530596 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700597 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
598 __func__, (p+i)->reg,
599 value, (p+i)->mask);
600 value = 0;
601 rc = marimba_read_bit_mask(&config,
602 (p+i)->reg, &value,
603 sizeof((p+i)->value), (p+i)->mask);
604 if (rc < 0)
605 dev_err(&msm_bt_power_device.dev, "%s marimba_read_bit_mask- error",
606 __func__);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530607 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700608 "%s: reg 0x%02x read value 0x%02x mask 0x%02x\n",
609 __func__, (p+i)->reg,
610 value, (p+i)->mask);
611 }
612 /* Update BT Status */
613 if (on)
614 marimba_set_bt_status(&config, true);
615 else
616 marimba_set_bt_status(&config, false);
617 return rc;
618}
619static int bluetooth_switch_regulators(int on)
620{
621 int i, rc = 0;
622
623 for (i = 0; i < ARRAY_SIZE(vregs_bahama_name); i++) {
624 if (!vregs_bahama[i]) {
625 pr_err("%s: vreg_get %s failed(%d)\n",
626 __func__, vregs_bahama_name[i], rc);
627 goto vreg_fail;
628 }
629 rc = on ? vreg_set_level(vregs_bahama[i], i ? 2900 :
630 1800) : 0;
631
632 if (rc < 0) {
633 pr_err("%s: vreg set level failed (%d)\n",
634 __func__, rc);
635 goto vreg_set_level_fail;
636 }
637
638 rc = on ? vreg_enable(vregs_bahama[i]) :
639 vreg_disable(vregs_bahama[i]);
640
641 if (rc < 0) {
642 pr_err("%s: vreg %s %s failed(%d)\n",
643 __func__, vregs_bahama_name[i],
644 on ? "enable" : "disable", rc);
645 goto vreg_fail;
646 }
647 }
648 return rc;
649
650vreg_fail:
651 while (i) {
652 if (on)
653 vreg_disable(vregs_bahama[--i]);
654 }
655vreg_set_level_fail:
656 vreg_put(vregs_bahama[0]);
657 vreg_put(vregs_bahama[1]);
658 return rc;
659}
660
661static unsigned int msm_bahama_setup_power(void)
662{
663 int rc = 0;
664 struct vreg *vreg_s3 = NULL;
665
666 vreg_s3 = vreg_get(NULL, "msme1");
667 if (IS_ERR(vreg_s3)) {
668 pr_err("%s: vreg get failed (%ld)\n",
669 __func__, PTR_ERR(vreg_s3));
670 return PTR_ERR(vreg_s3);
671 }
672 rc = vreg_set_level(vreg_s3, 1800);
673 if (rc < 0) {
674 pr_err("%s: vreg set level failed (%d)\n",
675 __func__, rc);
676 goto vreg_fail;
677 }
678 rc = vreg_enable(vreg_s3);
679 if (rc < 0) {
680 pr_err("%s: vreg enable failed (%d)\n",
681 __func__, rc);
682 goto vreg_fail;
683 }
684
685 /*setup Bahama_sys_reset_n*/
686 rc = gpio_request(GPIO_BT_SYS_REST_EN, "bahama sys_rst_n");
687 if (rc < 0) {
688 pr_err("%s: gpio_request %d = %d\n", __func__,
689 GPIO_BT_SYS_REST_EN, rc);
690 goto vreg_fail;
691 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530692 rc = bt_set_gpio(1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700693 if (rc < 0) {
Rahul Kashyap181d5552011-07-07 10:39:23 +0530694 pr_err("%s: bt_set_gpio %d = %d\n", __func__,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700695 GPIO_BT_SYS_REST_EN, rc);
696 goto gpio_fail;
697 }
698 return rc;
699
700gpio_fail:
701 gpio_free(GPIO_BT_SYS_REST_EN);
702vreg_fail:
703 vreg_put(vreg_s3);
704 return rc;
705}
706
707static unsigned int msm_bahama_shutdown_power(int value)
708{
709 int rc = 0;
710 struct vreg *vreg_s3 = NULL;
711
712 vreg_s3 = vreg_get(NULL, "msme1");
713 if (IS_ERR(vreg_s3)) {
714 pr_err("%s: vreg get failed (%ld)\n",
715 __func__, PTR_ERR(vreg_s3));
716 return PTR_ERR(vreg_s3);
717 }
718 rc = vreg_disable(vreg_s3);
719 if (rc) {
720 pr_err("%s: vreg disable failed (%d)\n",
721 __func__, rc);
722 vreg_put(vreg_s3);
723 return rc;
724 }
Rahul Kashyape8698c62011-07-20 20:43:05 +0530725 if (value == BAHAMA_ID) {
726 rc = bt_set_gpio(0);
727 if (rc) {
728 pr_err("%s: bt_set_gpio = %d\n",
729 __func__, rc);
730 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530731 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700732 return rc;
733}
734
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700735static unsigned int msm_bahama_core_config(int type)
736{
737 int rc = 0;
738
739 if (type == BAHAMA_ID) {
740 int i;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530741 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700742 const struct bahama_config_register v20_init[] = {
743 /* reg, value, mask */
744 { 0xF4, 0x84, 0xFF }, /* AREG */
745 { 0xF0, 0x04, 0xFF } /* DREG */
746 };
747 if (marimba_read_bahama_ver(&config) == BAHAMA_VER_2_0) {
748 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
749 u8 value = v20_init[i].value;
750 rc = marimba_write_bit_mask(&config,
751 v20_init[i].reg,
752 &value,
753 sizeof(v20_init[i].value),
754 v20_init[i].mask);
755 if (rc < 0) {
756 pr_err("%s: reg %d write failed: %d\n",
757 __func__, v20_init[i].reg, rc);
758 return rc;
759 }
760 pr_debug("%s: reg 0x%02x value 0x%02x"
761 " mask 0x%02x\n",
762 __func__, v20_init[i].reg,
763 v20_init[i].value, v20_init[i].mask);
764 }
765 }
766 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530767 rc = bt_set_gpio(0);
768 if (rc) {
769 pr_err("%s: bt_set_gpio = %d\n",
770 __func__, rc);
771 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700772 pr_debug("core type: %d\n", type);
773 return rc;
774}
775
776static int bluetooth_power(int on)
777{
778 int pin, rc = 0;
779 const char *id = "BTPW";
780 int cid = 0;
781
782 cid = adie_get_detected_connectivity_type();
783 if (cid != BAHAMA_ID) {
784 pr_err("%s: unexpected adie connectivity type: %d\n",
785 __func__, cid);
786 return -ENODEV;
787 }
788 if (on) {
789 /*setup power for BT SOC*/
Rahul Kashyap181d5552011-07-07 10:39:23 +0530790 rc = bt_set_gpio(on);
791 if (rc) {
792 pr_err("%s: bt_set_gpio = %d\n",
793 __func__, rc);
794 goto exit;
795 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700796 rc = bluetooth_switch_regulators(on);
797 if (rc < 0) {
798 pr_err("%s: bluetooth_switch_regulators rc = %d",
799 __func__, rc);
800 goto exit;
801 }
802 /*setup BT GPIO lines*/
803 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on);
804 pin++) {
805 rc = gpio_tlmm_config(bt_config_power_on[pin],
806 GPIO_CFG_ENABLE);
807 if (rc < 0) {
808 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
809 __func__,
810 bt_config_power_on[pin],
811 rc);
812 goto fail_power;
813 }
814 }
815 /*Setup BT clocks*/
816 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
817 PMAPP_CLOCK_VOTE_ON);
818 if (rc < 0) {
819 pr_err("Failed to vote for TCXO_D1 ON\n");
820 goto fail_clock;
821 }
822 msleep(20);
823
824 /*I2C config for Bahama*/
825 rc = bahama_bt(1);
826 if (rc < 0) {
827 pr_err("%s: bahama_bt rc = %d", __func__, rc);
828 goto fail_i2c;
829 }
830 msleep(20);
831
832 /*setup BT PCM lines*/
833 rc = msm_bahama_setup_pcm_i2s(BT_PCM_ON);
834 if (rc < 0) {
835 pr_err("%s: msm_bahama_setup_pcm_i2s , rc =%d\n",
836 __func__, rc);
837 goto fail_power;
838 }
839 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
840 PMAPP_CLOCK_VOTE_PIN_CTRL);
841 if (rc < 0)
842 pr_err("%s:Pin Control Failed, rc = %d",
843 __func__, rc);
844
845 } else {
846 rc = bahama_bt(0);
847 if (rc < 0)
848 pr_err("%s: bahama_bt rc = %d", __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530849
850 rc = bt_set_gpio(on);
851 if (rc) {
852 pr_err("%s: bt_set_gpio = %d\n",
853 __func__, rc);
854 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700855fail_i2c:
856 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
857 PMAPP_CLOCK_VOTE_OFF);
858 if (rc < 0)
859 pr_err("%s: Failed to vote Off D1\n", __func__);
860fail_clock:
861 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off);
862 pin++) {
863 rc = gpio_tlmm_config(bt_config_power_off[pin],
864 GPIO_CFG_ENABLE);
865 if (rc < 0) {
866 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
867 __func__, bt_config_power_off[pin], rc);
868 }
869 }
870 rc = msm_bahama_setup_pcm_i2s(BT_PCM_OFF);
871 if (rc < 0) {
872 pr_err("%s: msm_bahama_setup_pcm_i2s, rc =%d\n",
873 __func__, rc);
874 }
875fail_power:
876 rc = bluetooth_switch_regulators(0);
877 if (rc < 0) {
878 pr_err("%s: switch_regulators : rc = %d",\
879 __func__, rc);
880 goto exit;
881 }
882 }
883 return rc;
884exit:
885 pr_err("%s: failed with rc = %d", __func__, rc);
886 return rc;
887}
888
889static int __init bt_power_init(void)
890{
891 int i, rc = 0;
892 for (i = 0; i < ARRAY_SIZE(vregs_bahama_name); i++) {
893 vregs_bahama[i] = vreg_get(NULL,
894 vregs_bahama_name[i]);
895 if (IS_ERR(vregs_bahama[i])) {
896 pr_err("%s: vreg get %s failed (%ld)\n",
897 __func__, vregs_bahama_name[i],
898 PTR_ERR(vregs_bahama[i]));
899 rc = PTR_ERR(vregs_bahama[i]);
900 goto vreg_get_fail;
901 }
902 }
903
904 msm_bt_power_device.dev.platform_data = &bluetooth_power;
905
906 return rc;
907
908vreg_get_fail:
909 while (i)
910 vreg_put(vregs_bahama[--i]);
911 return rc;
912}
913
914static struct marimba_platform_data marimba_pdata = {
915 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
916 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
917 .bahama_setup = msm_bahama_setup_power,
918 .bahama_shutdown = msm_bahama_shutdown_power,
919 .bahama_core_config = msm_bahama_core_config,
920 .fm = &marimba_fm_pdata,
921};
922
923#endif
924
925#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
926static struct i2c_board_info core_exp_i2c_info[] __initdata = {
927 {
928 I2C_BOARD_INFO("sx1509q", 0x3e),
929 },
930};
931static struct i2c_board_info cam_exp_i2c_info[] __initdata = {
932 {
933 I2C_BOARD_INFO("sx1508q", 0x22),
934 .platform_data = &sx150x_data[SX150X_CAM],
935 },
936};
937#endif
938#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
939static struct i2c_board_info bahama_devices[] = {
940{
941 I2C_BOARD_INFO("marimba", 0xc),
942 .platform_data = &marimba_pdata,
943},
944};
945#endif
946
947#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
948static void __init register_i2c_devices(void)
949{
950
951 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
952 cam_exp_i2c_info,
953 ARRAY_SIZE(cam_exp_i2c_info));
954
955 if (machine_is_msm7x27a_surf())
956 sx150x_data[SX150X_CORE].io_open_drain_ena = 0xe0f0;
957
958 core_exp_i2c_info[0].platform_data =
959 &sx150x_data[SX150X_CORE];
960
961 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
962 core_exp_i2c_info,
963 ARRAY_SIZE(core_exp_i2c_info));
964#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
965 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
966 bahama_devices,
967 ARRAY_SIZE(bahama_devices));
968#endif
969}
970#endif
971
972static struct msm_gpio qup_i2c_gpios_io[] = {
973 { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
974 "qup_scl" },
975 { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
976 "qup_sda" },
977 { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
978 "qup_scl" },
979 { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
980 "qup_sda" },
981};
982
983static struct msm_gpio qup_i2c_gpios_hw[] = {
984 { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
985 "qup_scl" },
986 { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
987 "qup_sda" },
988 { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
989 "qup_scl" },
990 { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
991 "qup_sda" },
992};
993
994static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
995{
996 int rc;
997
998 if (adap_id < 0 || adap_id > 1)
999 return;
1000
1001 /* Each adapter gets 2 lines from the table */
1002 if (config_type)
1003 rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2);
1004 else
1005 rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2);
1006 if (rc < 0)
1007 pr_err("QUP GPIO request/enable failed: %d\n", rc);
1008}
1009
1010static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = {
1011 .clk_freq = 100000,
1012 .clk = "gsbi_qup_clk",
1013 .pclk = "gsbi_qup_pclk",
1014 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1015};
1016
1017static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = {
1018 .clk_freq = 100000,
1019 .clk = "gsbi_qup_clk",
1020 .pclk = "gsbi_qup_pclk",
1021 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1022};
1023
1024#ifdef CONFIG_ARCH_MSM7X27A
1025#define MSM_PMEM_MDP_SIZE 0x1DD1000
1026#define MSM_PMEM_ADSP_SIZE 0x1000000
1027
1028#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
1029#define MSM_FB_SIZE 0x260000
1030#else
1031#define MSM_FB_SIZE 0x195000
1032#endif
1033
1034#endif
1035
1036static struct android_usb_platform_data android_usb_pdata = {
1037 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1038};
1039
1040static struct platform_device android_usb_device = {
1041 .name = "android_usb",
1042 .id = -1,
1043 .dev = {
1044 .platform_data = &android_usb_pdata,
1045 },
1046};
1047
1048#ifdef CONFIG_USB_EHCI_MSM_72K
1049static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1050{
1051 int rc = 0;
1052 unsigned gpio;
1053
1054 gpio = GPIO_HOST_VBUS_EN;
1055
1056 rc = gpio_request(gpio, "i2c_host_vbus_en");
1057 if (rc < 0) {
1058 pr_err("failed to request %d GPIO\n", gpio);
1059 return;
1060 }
1061 gpio_direction_output(gpio, !!on);
1062 gpio_set_value_cansleep(gpio, !!on);
1063 gpio_free(gpio);
1064}
1065
1066static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1067 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1068};
1069
1070static void __init msm7x2x_init_host(void)
1071{
1072 msm_add_host(0, &msm_usb_host_pdata);
1073}
1074#endif
1075
1076#ifdef CONFIG_USB_MSM_OTG_72K
1077static int hsusb_rpc_connect(int connect)
1078{
1079 if (connect)
1080 return msm_hsusb_rpc_connect();
1081 else
1082 return msm_hsusb_rpc_close();
1083}
1084
1085static struct vreg *vreg_3p3;
1086static int msm_hsusb_ldo_init(int init)
1087{
1088 if (init) {
1089 vreg_3p3 = vreg_get(NULL, "usb");
1090 if (IS_ERR(vreg_3p3))
1091 return PTR_ERR(vreg_3p3);
1092 } else
1093 vreg_put(vreg_3p3);
1094
1095 return 0;
1096}
1097
1098static int msm_hsusb_ldo_enable(int enable)
1099{
1100 static int ldo_status;
1101
1102 if (!vreg_3p3 || IS_ERR(vreg_3p3))
1103 return -ENODEV;
1104
1105 if (ldo_status == enable)
1106 return 0;
1107
1108 ldo_status = enable;
1109
1110 if (enable)
1111 return vreg_enable(vreg_3p3);
1112
1113 return vreg_disable(vreg_3p3);
1114}
1115
1116#ifndef CONFIG_USB_EHCI_MSM_72K
1117static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
1118{
1119 int ret = 0;
1120
1121 if (init)
1122 ret = msm_pm_app_rpc_init(callback);
1123 else
1124 msm_pm_app_rpc_deinit(callback);
1125
1126 return ret;
1127}
1128#endif
1129
1130static struct msm_otg_platform_data msm_otg_pdata = {
1131#ifndef CONFIG_USB_EHCI_MSM_72K
1132 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
1133#else
1134 .vbus_power = msm_hsusb_vbus_power,
1135#endif
1136 .rpc_connect = hsusb_rpc_connect,
1137 .core_clk = 1,
1138 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1139 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1140 .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT,
1141 .se1_gating = SE1_GATING_DISABLE,
1142 .ldo_init = msm_hsusb_ldo_init,
1143 .ldo_enable = msm_hsusb_ldo_enable,
1144 .chg_init = hsusb_chg_init,
1145 .chg_connected = hsusb_chg_connected,
1146 .chg_vbus_draw = hsusb_chg_vbus_draw,
1147};
1148#endif
1149
1150static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1151 .is_phy_status_timer_on = 1,
1152};
1153
1154static struct resource smc91x_resources[] = {
1155 [0] = {
1156 .start = 0x90000300,
1157 .end = 0x900003ff,
1158 .flags = IORESOURCE_MEM,
1159 },
1160 [1] = {
1161 .start = MSM_GPIO_TO_INT(4),
1162 .end = MSM_GPIO_TO_INT(4),
1163 .flags = IORESOURCE_IRQ,
1164 },
1165};
1166
1167static struct platform_device smc91x_device = {
1168 .name = "smc91x",
1169 .id = 0,
1170 .num_resources = ARRAY_SIZE(smc91x_resources),
1171 .resource = smc91x_resources,
1172};
1173
1174#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1175 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1176 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1177 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1178
1179static unsigned long vreg_sts, gpio_sts;
1180static struct vreg *vreg_mmc;
1181static struct vreg *vreg_emmc;
1182
1183struct sdcc_vreg {
1184 struct vreg *vreg_data;
1185 unsigned level;
1186};
1187
1188static struct sdcc_vreg sdcc_vreg_data[4];
1189
1190struct sdcc_gpio {
1191 struct msm_gpio *cfg_data;
1192 uint32_t size;
1193 struct msm_gpio *sleep_cfg_data;
1194};
1195
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301196/**
1197 * Due to insufficient drive strengths for SDC GPIO lines some old versioned
1198 * SD/MMC cards may cause data CRC errors. Hence, set optimal values
1199 * for SDC slots based on timing closure and marginality. SDC1 slot
1200 * require higher value since it should handle bad signal quality due
1201 * to size of T-flash adapters.
1202 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001203static struct msm_gpio sdc1_cfg_data[] = {
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301204 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001205 "sdc1_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301206 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001207 "sdc1_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301208 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001209 "sdc1_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301210 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001211 "sdc1_dat_0"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301212 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001213 "sdc1_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301214 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001215 "sdc1_clk"},
1216};
1217
1218static struct msm_gpio sdc2_cfg_data[] = {
1219 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1220 "sdc2_clk"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301221 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001222 "sdc2_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301223 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001224 "sdc2_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301225 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001226 "sdc2_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301227 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001228 "sdc2_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301229 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001230 "sdc2_dat_0"},
1231};
1232
1233static struct msm_gpio sdc2_sleep_cfg_data[] = {
1234 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1235 "sdc2_clk"},
1236 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1237 "sdc2_cmd"},
1238 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1239 "sdc2_dat_3"},
1240 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1241 "sdc2_dat_2"},
1242 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1243 "sdc2_dat_1"},
1244 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1245 "sdc2_dat_0"},
1246};
1247static struct msm_gpio sdc3_cfg_data[] = {
1248 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1249 "sdc3_clk"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301250 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001251 "sdc3_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301252 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001253 "sdc3_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301254 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001255 "sdc3_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301256 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001257 "sdc3_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301258 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001259 "sdc3_dat_0"},
1260#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301261 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001262 "sdc3_dat_7"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301263 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001264 "sdc3_dat_6"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301265 {GPIO_CFG(21, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001266 "sdc3_dat_5"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301267 {GPIO_CFG(108, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001268 "sdc3_dat_4"},
1269#endif
1270};
1271
1272static struct msm_gpio sdc4_cfg_data[] = {
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301273 {GPIO_CFG(19, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001274 "sdc4_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301275 {GPIO_CFG(20, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001276 "sdc4_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301277 {GPIO_CFG(21, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001278 "sdc4_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301279 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001280 "sdc4_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301281 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001282 "sdc4_dat_0"},
1283 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1284 "sdc4_clk"},
1285};
1286
1287static struct sdcc_gpio sdcc_cfg_data[] = {
1288 {
1289 .cfg_data = sdc1_cfg_data,
1290 .size = ARRAY_SIZE(sdc1_cfg_data),
1291 },
1292 {
1293 .cfg_data = sdc2_cfg_data,
1294 .size = ARRAY_SIZE(sdc2_cfg_data),
1295 .sleep_cfg_data = sdc2_sleep_cfg_data,
1296 },
1297 {
1298 .cfg_data = sdc3_cfg_data,
1299 .size = ARRAY_SIZE(sdc3_cfg_data),
1300 },
1301 {
1302 .cfg_data = sdc4_cfg_data,
1303 .size = ARRAY_SIZE(sdc4_cfg_data),
1304 },
1305};
1306
1307static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1308{
1309 int rc = 0;
1310 struct sdcc_gpio *curr;
1311
1312 curr = &sdcc_cfg_data[dev_id - 1];
1313 if (!(test_bit(dev_id, &gpio_sts)^enable))
1314 return rc;
1315
1316 if (enable) {
1317 set_bit(dev_id, &gpio_sts);
1318 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1319 if (rc)
1320 pr_err("%s: Failed to turn on GPIOs for slot %d\n",
1321 __func__, dev_id);
1322 } else {
1323 clear_bit(dev_id, &gpio_sts);
1324 if (curr->sleep_cfg_data) {
1325 rc = msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1326 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1327 return rc;
1328 }
1329 msm_gpios_disable_free(curr->cfg_data, curr->size);
1330 }
1331 return rc;
1332}
1333
1334static int msm_sdcc_setup_vreg(int dev_id, unsigned int enable)
1335{
1336 int rc = 0;
1337 struct sdcc_vreg *curr;
1338
1339 curr = &sdcc_vreg_data[dev_id - 1];
1340
1341 if (!(test_bit(dev_id, &vreg_sts)^enable))
1342 return rc;
1343
1344 if (enable) {
1345 set_bit(dev_id, &vreg_sts);
1346 rc = vreg_set_level(curr->vreg_data, curr->level);
1347 if (rc)
1348 pr_err("%s: vreg_set_level() = %d\n", __func__, rc);
1349
1350 rc = vreg_enable(curr->vreg_data);
1351 if (rc)
1352 pr_err("%s: vreg_enable() = %d\n", __func__, rc);
1353 } else {
1354 clear_bit(dev_id, &vreg_sts);
1355 rc = vreg_disable(curr->vreg_data);
1356 if (rc)
1357 pr_err("%s: vreg_disable() = %d\n", __func__, rc);
1358 }
1359 return rc;
1360}
1361
1362static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1363{
1364 int rc = 0;
1365 struct platform_device *pdev;
1366
1367 pdev = container_of(dv, struct platform_device, dev);
1368
1369 rc = msm_sdcc_setup_gpio(pdev->id, !!vdd);
1370 if (rc)
1371 goto out;
1372
1373 rc = msm_sdcc_setup_vreg(pdev->id, !!vdd);
1374out:
1375 return rc;
1376}
1377
1378#define GPIO_SDC1_HW_DET 85
1379
1380#if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \
1381 && defined(CONFIG_MMC_MSM_CARD_HW_DETECTION)
1382static unsigned int msm7x2xa_sdcc_slot_status(struct device *dev)
1383{
1384 int status;
1385
1386 status = gpio_tlmm_config(GPIO_CFG(GPIO_SDC1_HW_DET, 2, GPIO_CFG_INPUT,
1387 GPIO_CFG_PULL_UP, GPIO_CFG_8MA), GPIO_CFG_ENABLE);
1388 if (status)
1389 pr_err("%s:Failed to configure tlmm for GPIO %d\n", __func__,
1390 GPIO_SDC1_HW_DET);
1391
1392 status = gpio_request(GPIO_SDC1_HW_DET, "SD_HW_Detect");
1393 if (status) {
1394 pr_err("%s:Failed to request GPIO %d\n", __func__,
1395 GPIO_SDC1_HW_DET);
1396 } else {
1397 status = gpio_direction_input(GPIO_SDC1_HW_DET);
1398 if (!status)
1399 status = gpio_get_value(GPIO_SDC1_HW_DET);
1400 gpio_free(GPIO_SDC1_HW_DET);
1401 }
1402 return status;
1403}
1404#endif
1405
1406#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1407static struct mmc_platform_data sdc1_plat_data = {
1408 .ocr_mask = MMC_VDD_28_29,
1409 .translate_vdd = msm_sdcc_setup_power,
1410 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1411 .msmsdcc_fmin = 144000,
1412 .msmsdcc_fmid = 24576000,
1413 .msmsdcc_fmax = 49152000,
1414#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
1415 .status = msm7x2xa_sdcc_slot_status,
1416 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
1417 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1418#endif
1419};
1420#endif
1421
1422#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1423static struct mmc_platform_data sdc2_plat_data = {
1424 /*
1425 * SDC2 supports only 1.8V, claim for 2.85V range is just
1426 * for allowing buggy cards who advertise 2.8V even though
1427 * they can operate at 1.8V supply.
1428 */
1429 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_165_195,
1430 .translate_vdd = msm_sdcc_setup_power,
1431 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1432#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1433 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1434#endif
1435 .msmsdcc_fmin = 144000,
1436 .msmsdcc_fmid = 24576000,
1437 .msmsdcc_fmax = 49152000,
1438#ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED
1439 .dummy52_required = 1,
1440#endif
1441};
1442#endif
1443
1444#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1445static struct mmc_platform_data sdc3_plat_data = {
1446 .ocr_mask = MMC_VDD_28_29,
1447 .translate_vdd = msm_sdcc_setup_power,
1448#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1449 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
1450#else
1451 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1452#endif
1453 .msmsdcc_fmin = 144000,
1454 .msmsdcc_fmid = 24576000,
1455 .msmsdcc_fmax = 49152000,
1456 .nonremovable = 1,
1457};
1458#endif
1459
1460#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1461 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1462static struct mmc_platform_data sdc4_plat_data = {
1463 .ocr_mask = MMC_VDD_28_29,
1464 .translate_vdd = msm_sdcc_setup_power,
1465 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1466 .msmsdcc_fmin = 144000,
1467 .msmsdcc_fmid = 24576000,
1468 .msmsdcc_fmax = 49152000,
1469};
1470#endif
1471#endif
1472
1473#ifdef CONFIG_SERIAL_MSM_HS
1474static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
1475 .inject_rx_on_wakeup = 1,
1476 .rx_to_inject = 0xFD,
1477};
1478#endif
1479static struct msm_pm_platform_data msm7x27a_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1480 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1481 .idle_supported = 1,
1482 .suspend_supported = 1,
1483 .idle_enabled = 1,
1484 .suspend_enabled = 1,
1485 .latency = 16000,
1486 .residency = 20000,
1487 },
1488 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1489 .idle_supported = 1,
1490 .suspend_supported = 1,
1491 .idle_enabled = 1,
1492 .suspend_enabled = 1,
1493 .latency = 12000,
1494 .residency = 20000,
1495 },
1496 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1497 .idle_supported = 1,
1498 .suspend_supported = 1,
1499 .idle_enabled = 0,
1500 .suspend_enabled = 1,
1501 .latency = 2000,
1502 .residency = 0,
1503 },
1504 [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = {
1505 .idle_supported = 1,
1506 .suspend_supported = 1,
1507 .idle_enabled = 1,
1508 .suspend_enabled = 1,
1509 .latency = 2,
1510 .residency = 0,
1511 },
1512};
1513
1514static struct android_pmem_platform_data android_pmem_adsp_pdata = {
1515 .name = "pmem_adsp",
1516 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
Mahesh Lankac6af7eb2011-08-02 18:00:35 +05301517 .cached = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001518 .memory_type = MEMTYPE_EBI1,
1519};
1520
1521static struct platform_device android_pmem_adsp_device = {
1522 .name = "android_pmem",
1523 .id = 1,
1524 .dev = { .platform_data = &android_pmem_adsp_pdata },
1525};
1526
1527static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1528static int __init pmem_mdp_size_setup(char *p)
1529{
1530 pmem_mdp_size = memparse(p, NULL);
1531 return 0;
1532}
1533
1534early_param("pmem_mdp_size", pmem_mdp_size_setup);
1535
1536static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1537static int __init pmem_adsp_size_setup(char *p)
1538{
1539 pmem_adsp_size = memparse(p, NULL);
1540 return 0;
1541}
1542
1543early_param("pmem_adsp_size", pmem_adsp_size_setup);
1544
1545static unsigned fb_size = MSM_FB_SIZE;
1546static int __init fb_size_setup(char *p)
1547{
1548 fb_size = memparse(p, NULL);
1549 return 0;
1550}
1551
1552early_param("fb_size", fb_size_setup);
1553
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001554static const char * const msm_fb_lcdc_vreg[] = {
1555 "gp2",
1556 "msme1",
1557};
1558
1559static const int msm_fb_lcdc_vreg_mV[] = {
1560 2850,
1561 1800,
1562};
1563
1564struct vreg *lcdc_vreg[ARRAY_SIZE(msm_fb_lcdc_vreg)];
1565
1566static uint32_t lcdc_gpio_initialized;
1567
1568static void lcdc_toshiba_gpio_init(void)
1569{
1570 int i, rc = 0;
1571 if (!lcdc_gpio_initialized) {
1572 if (gpio_request(GPIO_SPI_CLK, "spi_clk")) {
1573 pr_err("failed to request gpio spi_clk\n");
1574 return;
1575 }
1576 if (gpio_request(GPIO_SPI_CS0_N, "spi_cs")) {
1577 pr_err("failed to request gpio spi_cs0_N\n");
1578 goto fail_gpio6;
1579 }
1580 if (gpio_request(GPIO_SPI_MOSI, "spi_mosi")) {
1581 pr_err("failed to request gpio spi_mosi\n");
1582 goto fail_gpio5;
1583 }
1584 if (gpio_request(GPIO_SPI_MISO, "spi_miso")) {
1585 pr_err("failed to request gpio spi_miso\n");
1586 goto fail_gpio4;
1587 }
1588 if (gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr")) {
1589 pr_err("failed to request gpio_disp_pwr\n");
1590 goto fail_gpio3;
1591 }
1592 if (gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en")) {
1593 pr_err("failed to request gpio_bkl_en\n");
1594 goto fail_gpio2;
1595 }
1596 pmapp_disp_backlight_init();
1597
1598 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1599 lcdc_vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
1600
1601 rc = vreg_set_level(lcdc_vreg[i],
1602 msm_fb_lcdc_vreg_mV[i]);
1603
1604 if (rc < 0) {
1605 pr_err("%s: set regulator level failed "
1606 "with :(%d)\n", __func__, rc);
1607 goto fail_gpio1;
1608 }
1609 }
1610 lcdc_gpio_initialized = 1;
1611 }
1612 return;
1613
1614fail_gpio1:
1615 for (; i > 0; i--)
1616 vreg_put(lcdc_vreg[i - 1]);
1617
1618 gpio_free(GPIO_BACKLIGHT_EN);
1619fail_gpio2:
1620 gpio_free(GPIO_DISPLAY_PWR_EN);
1621fail_gpio3:
1622 gpio_free(GPIO_SPI_MISO);
1623fail_gpio4:
1624 gpio_free(GPIO_SPI_MOSI);
1625fail_gpio5:
1626 gpio_free(GPIO_SPI_CS0_N);
1627fail_gpio6:
1628 gpio_free(GPIO_SPI_CLK);
1629 lcdc_gpio_initialized = 0;
1630}
1631
1632static uint32_t lcdc_gpio_table[] = {
1633 GPIO_SPI_CLK,
1634 GPIO_SPI_CS0_N,
1635 GPIO_SPI_MOSI,
1636 GPIO_DISPLAY_PWR_EN,
1637 GPIO_BACKLIGHT_EN,
1638 GPIO_SPI_MISO,
1639};
1640
1641static void config_lcdc_gpio_table(uint32_t *table, int len, unsigned enable)
1642{
1643 int n;
1644
1645 if (lcdc_gpio_initialized) {
1646 /* All are IO Expander GPIOs */
1647 for (n = 0; n < (len - 1); n++)
1648 gpio_direction_output(table[n], 1);
1649 }
1650}
1651
1652static void lcdc_toshiba_config_gpios(int enable)
1653{
1654 config_lcdc_gpio_table(lcdc_gpio_table,
1655 ARRAY_SIZE(lcdc_gpio_table), enable);
1656}
1657
1658static int msm_fb_lcdc_power_save(int on)
1659{
1660 int i, rc = 0;
1661 /* Doing the init of the LCDC GPIOs very late as they are from
1662 an I2C-controlled IO Expander */
1663 lcdc_toshiba_gpio_init();
1664
1665 if (lcdc_gpio_initialized) {
1666 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
1667 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
1668
1669 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1670 if (on) {
1671 rc = vreg_enable(lcdc_vreg[i]);
1672
1673 if (rc) {
1674 printk(KERN_ERR "vreg_enable: %s vreg"
1675 "operation failed\n",
1676 msm_fb_lcdc_vreg[i]);
1677 goto lcdc_vreg_fail;
1678 }
1679 } else {
1680 rc = vreg_disable(lcdc_vreg[i]);
1681
1682 if (rc) {
1683 printk(KERN_ERR "vreg_disable: %s vreg "
1684 "operation failed\n",
1685 msm_fb_lcdc_vreg[i]);
1686 goto lcdc_vreg_fail;
1687 }
1688 }
1689 }
1690 }
1691
1692 return rc;
1693
1694lcdc_vreg_fail:
1695 if (on) {
1696 for (; i > 0; i--)
1697 vreg_disable(lcdc_vreg[i - 1]);
1698 } else {
1699 for (; i > 0; i--)
1700 vreg_enable(lcdc_vreg[i - 1]);
1701 }
1702
1703return rc;
1704
1705}
1706
1707
1708static int lcdc_toshiba_set_bl(int level)
1709{
1710 int ret;
1711
1712 ret = pmapp_disp_backlight_set_brightness(level);
1713 if (ret)
1714 pr_err("%s: can't set lcd backlight!\n", __func__);
1715
1716 return ret;
1717}
1718
1719
1720static struct lcdc_platform_data lcdc_pdata = {
Jeevan Shriram15f2a5e2011-07-13 21:45:26 +05301721 .lcdc_gpio_config = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001722 .lcdc_power_save = msm_fb_lcdc_power_save,
1723};
1724
1725static int lcd_panel_spi_gpio_num[] = {
1726 GPIO_SPI_MOSI, /* spi_sdi */
1727 GPIO_SPI_MISO, /* spi_sdoi */
1728 GPIO_SPI_CLK, /* spi_clk */
1729 GPIO_SPI_CS0_N, /* spi_cs */
1730};
1731
1732static struct msm_panel_common_pdata lcdc_toshiba_panel_data = {
1733 .panel_config_gpio = lcdc_toshiba_config_gpios,
1734 .pmic_backlight = lcdc_toshiba_set_bl,
1735 .gpio_num = lcd_panel_spi_gpio_num,
1736};
1737
1738static struct platform_device lcdc_toshiba_panel_device = {
1739 .name = "lcdc_toshiba_fwvga_pt",
1740 .id = 0,
1741 .dev = {
1742 .platform_data = &lcdc_toshiba_panel_data,
1743 }
1744};
1745
1746static struct resource msm_fb_resources[] = {
1747 {
1748 .flags = IORESOURCE_DMA,
1749 }
1750};
1751
1752static int msm_fb_detect_panel(const char *name)
1753{
1754 int ret = -EPERM;
1755
1756 if (machine_is_msm7x27a_surf()) {
1757 if (!strncmp(name, "lcdc_toshiba_fwvga_pt", 21))
1758 ret = 0;
1759 } else {
1760 ret = -ENODEV;
1761 }
1762
1763 return ret;
1764}
1765
1766static struct msm_fb_platform_data msm_fb_pdata = {
1767 .detect_client = msm_fb_detect_panel,
1768};
1769
1770static struct platform_device msm_fb_device = {
1771 .name = "msm_fb",
1772 .id = 0,
1773 .num_resources = ARRAY_SIZE(msm_fb_resources),
1774 .resource = msm_fb_resources,
1775 .dev = {
1776 .platform_data = &msm_fb_pdata,
1777 }
1778};
1779
1780#ifdef CONFIG_FB_MSM_MIPI_DSI
1781static int mipi_renesas_set_bl(int level)
1782{
1783 int ret;
1784
1785 ret = pmapp_disp_backlight_set_brightness(level);
1786
1787 if (ret)
1788 pr_err("%s: can't set lcd backlight!\n", __func__);
1789
1790 return ret;
1791}
1792
1793static struct msm_panel_common_pdata mipi_renesas_pdata = {
1794 .pmic_backlight = mipi_renesas_set_bl,
1795};
1796
1797
1798static struct platform_device mipi_dsi_renesas_panel_device = {
1799 .name = "mipi_renesas",
1800 .id = 0,
1801 .dev = {
1802 .platform_data = &mipi_renesas_pdata,
1803 }
1804};
1805#endif
1806
1807static void __init msm7x27a_init_mmc(void)
1808{
1809 vreg_emmc = vreg_get(NULL, "emmc");
1810 if (IS_ERR(vreg_emmc)) {
1811 pr_err("%s: vreg get failed (%ld)\n",
1812 __func__, PTR_ERR(vreg_emmc));
1813 return;
1814 }
1815
1816 vreg_mmc = vreg_get(NULL, "mmc");
1817 if (IS_ERR(vreg_mmc)) {
1818 pr_err("%s: vreg get failed (%ld)\n",
1819 __func__, PTR_ERR(vreg_mmc));
1820 return;
1821 }
1822
1823 /* eMMC slot */
1824#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1825 sdcc_vreg_data[2].vreg_data = vreg_emmc;
1826 sdcc_vreg_data[2].level = 3000;
1827 msm_add_sdcc(3, &sdc3_plat_data);
1828#endif
1829 /* Micro-SD slot */
1830#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1831 sdcc_vreg_data[0].vreg_data = vreg_mmc;
1832 sdcc_vreg_data[0].level = 2850;
1833 msm_add_sdcc(1, &sdc1_plat_data);
1834#endif
1835 /* SDIO WLAN slot */
1836#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1837 sdcc_vreg_data[1].vreg_data = vreg_mmc;
1838 sdcc_vreg_data[1].level = 2850;
1839 msm_add_sdcc(2, &sdc2_plat_data);
1840#endif
1841 /* Not Used */
1842#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1843 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1844 sdcc_vreg_data[3].vreg_data = vreg_mmc;
1845 sdcc_vreg_data[3].level = 2850;
1846 msm_add_sdcc(4, &sdc4_plat_data);
1847#endif
1848}
1849#define SND(desc, num) { .name = #desc, .id = num }
1850static struct snd_endpoint snd_endpoints_list[] = {
1851 SND(HANDSET, 0),
1852 SND(MONO_HEADSET, 2),
1853 SND(HEADSET, 3),
1854 SND(SPEAKER, 6),
1855 SND(TTY_HEADSET, 8),
1856 SND(TTY_VCO, 9),
1857 SND(TTY_HCO, 10),
1858 SND(BT, 12),
1859 SND(IN_S_SADC_OUT_HANDSET, 16),
1860 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
1861 SND(FM_DIGITAL_STEREO_HEADSET, 26),
1862 SND(FM_DIGITAL_SPEAKER_PHONE, 27),
1863 SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
1864 SND(CURRENT, 34),
1865 SND(FM_ANALOG_STEREO_HEADSET, 35),
1866 SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
1867};
1868#undef SND
1869
1870static struct msm_snd_endpoints msm_device_snd_endpoints = {
1871 .endpoints = snd_endpoints_list,
1872 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
1873};
1874
1875static struct platform_device msm_device_snd = {
1876 .name = "msm_snd",
1877 .id = -1,
1878 .dev = {
1879 .platform_data = &msm_device_snd_endpoints
1880 },
1881};
1882
1883#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1884 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1885 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1886 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1887 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1888 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1889#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1890 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1891 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1892 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1893 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1894 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1895#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1896 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1897 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1898 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1899 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1900 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1901#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1902 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1903 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1904 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1905 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1906 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1907#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
1908
1909static unsigned int dec_concurrency_table[] = {
1910 /* Audio LP */
1911 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
1912 0, 0, 0,
1913
1914 /* Concurrency 1 */
1915 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1916 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1917 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1918 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1919 (DEC4_FORMAT),
1920
1921 /* Concurrency 2 */
1922 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1923 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1924 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1925 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1926 (DEC4_FORMAT),
1927
1928 /* Concurrency 3 */
1929 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1930 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1931 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1932 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1933 (DEC4_FORMAT),
1934
1935 /* Concurrency 4 */
1936 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1937 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1938 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1939 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1940 (DEC4_FORMAT),
1941
1942 /* Concurrency 5 */
1943 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1944 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1945 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1946 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1947 (DEC4_FORMAT),
1948
1949 /* Concurrency 6 */
1950 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1951 0, 0, 0, 0,
1952
1953 /* Concurrency 7 */
1954 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1955 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1956 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1957 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1958 (DEC4_FORMAT),
1959};
1960
1961#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
1962 .module_queueid = queueid, .module_decid = decid, \
1963 .nr_codec_support = nr_codec}
1964
1965static struct msm_adspdec_info dec_info_list[] = {
1966 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
1967 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
1968 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
1969 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
1970 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
1971};
1972
1973static struct msm_adspdec_database msm_device_adspdec_database = {
1974 .num_dec = ARRAY_SIZE(dec_info_list),
1975 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
1976 ARRAY_SIZE(dec_info_list)),
1977 .dec_concurrency_table = dec_concurrency_table,
1978 .dec_info_list = dec_info_list,
1979};
1980
1981static struct platform_device msm_device_adspdec = {
1982 .name = "msm_adspdec",
1983 .id = -1,
1984 .dev = {
1985 .platform_data = &msm_device_adspdec_database
1986 },
1987};
1988
1989static struct android_pmem_platform_data android_pmem_audio_pdata = {
1990 .name = "pmem_audio",
1991 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1992 .cached = 0,
1993 .memory_type = MEMTYPE_EBI1,
1994};
1995
1996static struct platform_device android_pmem_audio_device = {
1997 .name = "android_pmem",
1998 .id = 2,
1999 .dev = { .platform_data = &android_pmem_audio_pdata },
2000};
2001
2002static struct android_pmem_platform_data android_pmem_pdata = {
2003 .name = "pmem",
2004 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2005 .cached = 1,
2006 .memory_type = MEMTYPE_EBI1,
2007};
2008static struct platform_device android_pmem_device = {
2009 .name = "android_pmem",
2010 .id = 0,
2011 .dev = { .platform_data = &android_pmem_pdata },
2012};
2013
2014static u32 msm_calculate_batt_capacity(u32 current_voltage);
2015
2016static struct msm_psy_batt_pdata msm_psy_batt_data = {
2017 .voltage_min_design = 2800,
2018 .voltage_max_design = 4300,
2019 .avail_chg_sources = AC_CHG | USB_CHG ,
2020 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
2021 .calculate_capacity = &msm_calculate_batt_capacity,
2022};
2023
2024static u32 msm_calculate_batt_capacity(u32 current_voltage)
2025{
2026 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
2027 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
2028
2029 return (current_voltage - low_voltage) * 100
2030 / (high_voltage - low_voltage);
2031}
2032
2033static struct platform_device msm_batt_device = {
2034 .name = "msm-battery",
2035 .id = -1,
2036 .dev.platform_data = &msm_psy_batt_data,
2037};
2038
2039static struct smsc911x_platform_config smsc911x_config = {
2040 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
2041 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
2042 .flags = SMSC911X_USE_16BIT,
2043};
2044
2045static struct resource smsc911x_resources[] = {
2046 [0] = {
2047 .start = 0x90000000,
2048 .end = 0x90007fff,
2049 .flags = IORESOURCE_MEM,
2050 },
2051 [1] = {
2052 .start = MSM_GPIO_TO_INT(48),
2053 .end = MSM_GPIO_TO_INT(48),
2054 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
2055 },
2056};
2057
2058static struct platform_device smsc911x_device = {
2059 .name = "smsc911x",
2060 .id = 0,
2061 .num_resources = ARRAY_SIZE(smsc911x_resources),
2062 .resource = smsc911x_resources,
2063 .dev = {
2064 .platform_data = &smsc911x_config,
2065 },
2066};
2067
2068static struct msm_gpio smsc911x_gpios[] = {
2069 { GPIO_CFG(48, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2070 "smsc911x_irq" },
2071 { GPIO_CFG(49, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2072 "eth_fifo_sel" },
2073};
2074
2075#define ETH_FIFO_SEL_GPIO 49
2076static void msm7x27a_cfg_smsc911x(void)
2077{
2078 int res;
2079
2080 res = msm_gpios_request_enable(smsc911x_gpios,
2081 ARRAY_SIZE(smsc911x_gpios));
2082 if (res) {
2083 pr_err("%s: unable to enable gpios for SMSC911x\n", __func__);
2084 return;
2085 }
2086
2087 /* ETH_FIFO_SEL */
2088 res = gpio_direction_output(ETH_FIFO_SEL_GPIO, 0);
2089 if (res) {
2090 pr_err("%s: unable to get direction for gpio %d\n", __func__,
2091 ETH_FIFO_SEL_GPIO);
2092 msm_gpios_disable_free(smsc911x_gpios,
2093 ARRAY_SIZE(smsc911x_gpios));
2094 return;
2095 }
2096 gpio_set_value(ETH_FIFO_SEL_GPIO, 0);
2097}
2098
2099#ifdef CONFIG_MSM_CAMERA
2100static uint32_t camera_off_gpio_table[] = {
2101 GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2102};
2103
2104static uint32_t camera_on_gpio_table[] = {
2105 GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2106};
2107
2108#ifdef CONFIG_MSM_CAMERA_FLASH
2109static struct msm_camera_sensor_flash_src msm_flash_src = {
2110 .flash_sr_type = MSM_CAMERA_FLASH_SRC_CURRENT_DRIVER,
2111 ._fsrc.current_driver_src.led1 = GPIO_CAM_GP_LED_EN1,
2112 ._fsrc.current_driver_src.led2 = GPIO_CAM_GP_LED_EN2,
2113};
2114#endif
2115
2116static struct vreg *vreg_gp1;
2117static struct vreg *vreg_gp2;
2118static struct vreg *vreg_gp3;
2119static void msm_camera_vreg_config(int vreg_en)
2120{
2121 int rc;
2122
2123 if (vreg_gp1 == NULL) {
2124 vreg_gp1 = vreg_get(NULL, "msme1");
2125 if (IS_ERR(vreg_gp1)) {
2126 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2127 __func__, "msme1", PTR_ERR(vreg_gp1));
2128 return;
2129 }
2130
2131 rc = vreg_set_level(vreg_gp1, 1800);
2132 if (rc) {
2133 pr_err("%s: GP1 set_level failed (%d)\n",
2134 __func__, rc);
2135 return;
2136 }
2137 }
2138
2139 if (vreg_gp2 == NULL) {
2140 vreg_gp2 = vreg_get(NULL, "gp2");
2141 if (IS_ERR(vreg_gp2)) {
2142 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2143 __func__, "gp2", PTR_ERR(vreg_gp2));
2144 return;
2145 }
2146
2147 rc = vreg_set_level(vreg_gp2, 2850);
2148 if (rc) {
2149 pr_err("%s: GP2 set_level failed (%d)\n",
2150 __func__, rc);
2151 }
2152 }
2153
2154 if (vreg_gp3 == NULL) {
2155 vreg_gp3 = vreg_get(NULL, "usb2");
2156 if (IS_ERR(vreg_gp3)) {
2157 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2158 __func__, "gp3", PTR_ERR(vreg_gp3));
2159 return;
2160 }
2161
2162 rc = vreg_set_level(vreg_gp3, 1800);
2163 if (rc) {
2164 pr_err("%s: GP3 set level failed (%d)\n",
2165 __func__, rc);
2166 }
2167 }
2168
2169 if (vreg_en) {
2170 rc = vreg_enable(vreg_gp1);
2171 if (rc) {
2172 pr_err("%s: GP1 enable failed (%d)\n",
2173 __func__, rc);
2174 return;
2175 }
2176
2177 rc = vreg_enable(vreg_gp2);
2178 if (rc) {
2179 pr_err("%s: GP2 enable failed (%d)\n",
2180 __func__, rc);
2181 }
2182
2183 rc = vreg_enable(vreg_gp3);
2184 if (rc) {
2185 pr_err("%s: GP3 enable failed (%d)\n",
2186 __func__, rc);
2187 }
2188 } else {
2189 rc = vreg_disable(vreg_gp1);
2190 if (rc)
2191 pr_err("%s: GP1 disable failed (%d)\n",
2192 __func__, rc);
2193
2194 rc = vreg_disable(vreg_gp2);
2195 if (rc) {
2196 pr_err("%s: GP2 disable failed (%d)\n",
2197 __func__, rc);
2198 }
2199
2200 rc = vreg_disable(vreg_gp3);
2201 if (rc) {
2202 pr_err("%s: GP3 disable failed (%d)\n",
2203 __func__, rc);
2204 }
2205 }
2206}
2207
2208static int config_gpio_table(uint32_t *table, int len)
2209{
2210 int rc = 0, i = 0;
2211
2212 for (i = 0; i < len; i++) {
2213 rc = gpio_tlmm_config(table[i], GPIO_CFG_ENABLE);
2214 if (rc) {
2215 pr_err("%s not able to get gpio\n", __func__);
2216 for (i--; i >= 0; i--)
2217 gpio_tlmm_config(camera_off_gpio_table[i],
2218 GPIO_CFG_ENABLE);
2219 break;
2220 }
2221 }
2222 return rc;
2223}
2224
2225static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data;
2226static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data;
2227static int config_camera_on_gpios_rear(void)
2228{
2229 int rc = 0;
2230
2231 if (machine_is_msm7x27a_ffa())
2232 msm_camera_vreg_config(1);
2233
2234 rc = config_gpio_table(camera_on_gpio_table,
2235 ARRAY_SIZE(camera_on_gpio_table));
2236 if (rc < 0) {
2237 pr_err("%s: CAMSENSOR gpio table request"
2238 "failed\n", __func__);
2239 return rc;
2240 }
2241
2242 return rc;
2243}
2244
2245static void config_camera_off_gpios_rear(void)
2246{
2247 if (machine_is_msm7x27a_ffa())
2248 msm_camera_vreg_config(0);
2249
2250 config_gpio_table(camera_off_gpio_table,
2251 ARRAY_SIZE(camera_off_gpio_table));
2252}
2253
2254static int config_camera_on_gpios_front(void)
2255{
2256 int rc = 0;
2257
2258 if (machine_is_msm7x27a_ffa())
2259 msm_camera_vreg_config(1);
2260
2261 rc = config_gpio_table(camera_on_gpio_table,
2262 ARRAY_SIZE(camera_on_gpio_table));
2263 if (rc < 0) {
2264 pr_err("%s: CAMSENSOR gpio table request"
2265 "failed\n", __func__);
2266 return rc;
2267 }
2268
2269 return rc;
2270}
2271
2272static void config_camera_off_gpios_front(void)
2273{
2274 if (machine_is_msm7x27a_ffa())
2275 msm_camera_vreg_config(0);
2276
2277 config_gpio_table(camera_off_gpio_table,
2278 ARRAY_SIZE(camera_off_gpio_table));
2279}
2280
2281struct msm_camera_device_platform_data msm_camera_device_data_rear = {
2282 .camera_gpio_on = config_camera_on_gpios_rear,
2283 .camera_gpio_off = config_camera_off_gpios_rear,
2284 .ioext.csiphy = 0xA1000000,
2285 .ioext.csisz = 0x00100000,
2286 .ioext.csiirq = INT_CSI_IRQ_1,
2287 .ioclk.mclk_clk_rate = 24000000,
2288 .ioclk.vfe_clk_rate = 192000000,
2289 .ioext.appphy = MSM_CLK_CTL_PHYS,
2290 .ioext.appsz = MSM_CLK_CTL_SIZE,
2291};
2292
2293struct msm_camera_device_platform_data msm_camera_device_data_front = {
2294 .camera_gpio_on = config_camera_on_gpios_front,
2295 .camera_gpio_off = config_camera_off_gpios_front,
2296 .ioext.csiphy = 0xA0F00000,
2297 .ioext.csisz = 0x00100000,
2298 .ioext.csiirq = INT_CSI_IRQ_0,
2299 .ioclk.mclk_clk_rate = 24000000,
2300 .ioclk.vfe_clk_rate = 192000000,
2301 .ioext.appphy = MSM_CLK_CTL_PHYS,
2302 .ioext.appsz = MSM_CLK_CTL_SIZE,
2303};
2304
2305#ifdef CONFIG_S5K4E1
2306static struct msm_camera_sensor_platform_info s5k4e1_sensor_7627a_info = {
2307 .mount_angle = 90
2308};
2309
2310static struct msm_camera_sensor_flash_data flash_s5k4e1 = {
2311 .flash_type = MSM_CAMERA_FLASH_LED,
2312 .flash_src = &msm_flash_src
2313};
2314
2315static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data = {
2316 .sensor_name = "s5k4e1",
2317 .sensor_reset_enable = 1,
2318 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N,
2319 .sensor_pwd = 85,
2320 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2321 .vcm_enable = 1,
2322 .pdata = &msm_camera_device_data_rear,
2323 .flash_data = &flash_s5k4e1,
2324 .sensor_platform_info = &s5k4e1_sensor_7627a_info,
2325 .csi_if = 1
2326};
2327
2328static struct platform_device msm_camera_sensor_s5k4e1 = {
2329 .name = "msm_camera_s5k4e1",
2330 .dev = {
2331 .platform_data = &msm_camera_sensor_s5k4e1_data,
2332 },
2333};
2334#endif
2335
2336#ifdef CONFIG_IMX072
2337static struct msm_camera_sensor_platform_info imx072_sensor_7627a_info = {
2338 .mount_angle = 90
2339};
2340
2341static struct msm_camera_sensor_flash_data flash_imx072 = {
2342 .flash_type = MSM_CAMERA_FLASH_LED,
2343 .flash_src = &msm_flash_src
2344};
2345
2346static struct msm_camera_sensor_info msm_camera_sensor_imx072_data = {
2347 .sensor_name = "imx072",
2348 .sensor_reset_enable = 1,
2349 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N, /* TODO 106,*/
2350 .sensor_pwd = 85,
2351 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2352 .vcm_enable = 1,
2353 .pdata = &msm_camera_device_data_rear,
2354 .flash_data = &flash_imx072,
2355 .sensor_platform_info = &imx072_sensor_7627a_info,
2356 .csi_if = 1
2357};
2358
2359static struct platform_device msm_camera_sensor_imx072 = {
2360 .name = "msm_camera_imx072",
2361 .dev = {
2362 .platform_data = &msm_camera_sensor_imx072_data,
2363 },
2364};
2365#endif
2366
2367#ifdef CONFIG_WEBCAM_OV9726
2368static struct msm_camera_sensor_platform_info ov9726_sensor_7627a_info = {
2369 .mount_angle = 90
2370};
2371
2372static struct msm_camera_sensor_flash_data flash_ov9726 = {
2373 .flash_type = MSM_CAMERA_FLASH_NONE,
2374 .flash_src = &msm_flash_src
2375};
2376
2377static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2378 .sensor_name = "ov9726",
2379 .sensor_reset_enable = 0,
2380 .sensor_reset = GPIO_CAM_GP_CAM1MP_XCLR,
2381 .sensor_pwd = 85,
2382 .vcm_pwd = 1,
2383 .vcm_enable = 0,
2384 .pdata = &msm_camera_device_data_front,
2385 .flash_data = &flash_ov9726,
2386 .sensor_platform_info = &ov9726_sensor_7627a_info,
2387 .csi_if = 1
2388};
2389
2390static struct platform_device msm_camera_sensor_ov9726 = {
2391 .name = "msm_camera_ov9726",
2392 .dev = {
2393 .platform_data = &msm_camera_sensor_ov9726_data,
2394 },
2395};
2396#endif
2397
2398#ifdef CONFIG_MT9E013
2399static struct msm_camera_sensor_platform_info mt9e013_sensor_7627a_info = {
2400 .mount_angle = 90
2401};
2402
2403static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2404 .flash_type = MSM_CAMERA_FLASH_LED,
2405 .flash_src = &msm_flash_src
2406};
2407
2408static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2409 .sensor_name = "mt9e013",
2410 .sensor_reset = 0,
2411 .sensor_reset_enable = 1,
2412 .sensor_pwd = 85,
2413 .vcm_pwd = 1,
2414 .vcm_enable = 0,
2415 .pdata = &msm_camera_device_data_rear,
2416 .flash_data = &flash_mt9e013,
2417 .sensor_platform_info = &mt9e013_sensor_7627a_info,
2418 .csi_if = 1
2419};
2420
2421static struct platform_device msm_camera_sensor_mt9e013 = {
2422 .name = "msm_camera_mt9e013",
2423 .dev = {
2424 .platform_data = &msm_camera_sensor_mt9e013_data,
2425 },
2426};
2427#endif
2428
2429static struct i2c_board_info i2c_camera_devices[] = {
2430 #ifdef CONFIG_S5K4E1
2431 {
2432 I2C_BOARD_INFO("s5k4e1", 0x36),
2433 },
2434 {
2435 I2C_BOARD_INFO("s5k4e1_af", 0x8c >> 1),
2436 },
2437 #endif
2438 #ifdef CONFIG_WEBCAM_OV9726
2439 {
2440 I2C_BOARD_INFO("ov9726", 0x10),
2441 },
2442 #endif
2443 #ifdef CONFIG_IMX072
2444 {
2445 I2C_BOARD_INFO("imx072", 0x34),
2446 },
2447 #endif
2448 #ifdef CONFIG_MT9E013
2449 {
2450 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2451 },
2452 #endif
2453 {
2454 I2C_BOARD_INFO("sc628a", 0x37),
2455 },
2456};
2457#endif
2458#if defined(CONFIG_SERIAL_MSM_HSL_CONSOLE) \
2459 && defined(CONFIG_MSM_SHARED_GPIO_FOR_UART2DM)
2460static struct msm_gpio uart2dm_gpios[] = {
2461 {GPIO_CFG(19, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2462 "uart2dm_rfr_n" },
2463 {GPIO_CFG(20, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2464 "uart2dm_cts_n" },
2465 {GPIO_CFG(21, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2466 "uart2dm_rx" },
2467 {GPIO_CFG(108, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2468 "uart2dm_tx" },
2469};
2470
2471static void msm7x27a_cfg_uart2dm_serial(void)
2472{
2473 int ret;
2474 ret = msm_gpios_request_enable(uart2dm_gpios,
2475 ARRAY_SIZE(uart2dm_gpios));
2476 if (ret)
2477 pr_err("%s: unable to enable gpios for uart2dm\n", __func__);
2478}
2479#else
2480static void msm7x27a_cfg_uart2dm_serial(void) { }
2481#endif
2482
2483static struct platform_device *rumi_sim_devices[] __initdata = {
2484 &msm_device_dmov,
2485 &msm_device_smd,
2486 &smc91x_device,
2487 &msm_device_uart1,
2488 &msm_device_nand,
2489 &msm_device_uart_dm1,
2490 &msm_gsbi0_qup_i2c_device,
2491 &msm_gsbi1_qup_i2c_device,
2492};
2493
2494static struct platform_device *surf_ffa_devices[] __initdata = {
2495 &msm_device_dmov,
2496 &msm_device_smd,
2497 &msm_device_uart1,
2498 &msm_device_uart_dm1,
2499 &msm_device_uart_dm2,
2500 &msm_device_nand,
2501 &msm_gsbi0_qup_i2c_device,
2502 &msm_gsbi1_qup_i2c_device,
2503 &msm_device_otg,
2504 &msm_device_gadget_peripheral,
2505 &android_usb_device,
2506 &android_pmem_device,
2507 &android_pmem_adsp_device,
2508 &android_pmem_audio_device,
2509 &msm_device_snd,
2510 &msm_device_adspdec,
2511 &msm_fb_device,
2512 &lcdc_toshiba_panel_device,
2513 &msm_batt_device,
2514 &smsc911x_device,
2515#ifdef CONFIG_S5K4E1
2516 &msm_camera_sensor_s5k4e1,
2517#endif
2518#ifdef CONFIG_IMX072
2519 &msm_camera_sensor_imx072,
2520#endif
2521#ifdef CONFIG_WEBCAM_OV9726
2522 &msm_camera_sensor_ov9726,
2523#endif
2524#ifdef CONFIG_MT9E013
2525 &msm_camera_sensor_mt9e013,
2526#endif
2527#ifdef CONFIG_FB_MSM_MIPI_DSI
2528 &mipi_dsi_renesas_panel_device,
2529#endif
2530 &msm_kgsl_3d0,
2531#ifdef CONFIG_BT
2532 &msm_bt_power_device,
2533#endif
Santosh Sajjan6822c682011-07-26 10:49:36 +05302534#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
2535 &msm_wlan_ar6000_pm_device,
2536#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002537};
2538
2539static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
2540static int __init pmem_kernel_ebi1_size_setup(char *p)
2541{
2542 pmem_kernel_ebi1_size = memparse(p, NULL);
2543 return 0;
2544}
2545early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2546
2547static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2548static int __init pmem_audio_size_setup(char *p)
2549{
2550 pmem_audio_size = memparse(p, NULL);
2551 return 0;
2552}
2553early_param("pmem_audio_size", pmem_audio_size_setup);
2554
2555static void __init msm_msm7x2x_allocate_memory_regions(void)
2556{
2557 void *addr;
2558 unsigned long size;
2559
2560 size = fb_size ? : MSM_FB_SIZE;
2561 addr = alloc_bootmem_align(size, 0x1000);
2562 msm_fb_resources[0].start = __pa(addr);
2563 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
2564 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
2565 size, addr, __pa(addr));
2566}
2567
2568static struct memtype_reserve msm7x27a_reserve_table[] __initdata = {
2569 [MEMTYPE_SMI] = {
2570 },
2571 [MEMTYPE_EBI0] = {
2572 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2573 },
2574 [MEMTYPE_EBI1] = {
2575 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2576 },
2577};
2578
2579static void __init size_pmem_devices(void)
2580{
2581#ifdef CONFIG_ANDROID_PMEM
2582 android_pmem_adsp_pdata.size = pmem_adsp_size;
2583 android_pmem_pdata.size = pmem_mdp_size;
2584 android_pmem_audio_pdata.size = pmem_audio_size;
2585#endif
2586}
2587
2588static void __init reserve_memory_for(struct android_pmem_platform_data *p)
2589{
2590 msm7x27a_reserve_table[p->memory_type].size += p->size;
2591}
2592
2593static void __init reserve_pmem_memory(void)
2594{
2595#ifdef CONFIG_ANDROID_PMEM
2596 reserve_memory_for(&android_pmem_adsp_pdata);
2597 reserve_memory_for(&android_pmem_pdata);
2598 reserve_memory_for(&android_pmem_audio_pdata);
2599 msm7x27a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
2600#endif
2601}
2602
2603static void __init msm7x27a_calculate_reserve_sizes(void)
2604{
2605 size_pmem_devices();
2606 reserve_pmem_memory();
2607}
2608
2609static int msm7x27a_paddr_to_memtype(unsigned int paddr)
2610{
2611 return MEMTYPE_EBI1;
2612}
2613
2614static struct reserve_info msm7x27a_reserve_info __initdata = {
2615 .memtype_reserve_table = msm7x27a_reserve_table,
2616 .calculate_reserve_sizes = msm7x27a_calculate_reserve_sizes,
2617 .paddr_to_memtype = msm7x27a_paddr_to_memtype,
2618};
2619
2620static void __init msm7x27a_reserve(void)
2621{
2622 reserve_info = &msm7x27a_reserve_info;
2623 msm_reserve();
2624}
2625
2626static void __init msm_device_i2c_init(void)
2627{
2628 msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
2629 msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
2630}
2631
2632static struct msm_panel_common_pdata mdp_pdata = {
2633 .gpio = 97,
2634 .mdp_rev = MDP_REV_303,
2635};
2636
2637#define GPIO_LCDC_BRDG_PD 128
2638#define GPIO_LCDC_BRDG_RESET_N 129
2639
2640#define LCDC_RESET_PHYS 0x90008014
2641static void __iomem *lcdc_reset_ptr;
2642
2643static unsigned mipi_dsi_gpio[] = {
2644 GPIO_CFG(GPIO_LCDC_BRDG_RESET_N, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2645 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2646 GPIO_CFG(GPIO_LCDC_BRDG_PD, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2647 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2648};
2649
2650enum {
2651 DSI_SINGLE_LANE = 1,
2652 DSI_TWO_LANES,
2653};
2654
2655static int msm_fb_get_lane_config(void)
2656{
2657 int rc = DSI_TWO_LANES;
2658
2659 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
2660 rc = DSI_SINGLE_LANE;
2661 pr_info("DSI Single Lane\n");
2662 } else {
2663 pr_info("DSI Two Lanes\n");
2664 }
2665 return rc;
2666}
2667
2668static int msm_fb_dsi_client_reset(void)
2669{
2670 int rc = 0;
2671
2672 rc = gpio_request(GPIO_LCDC_BRDG_RESET_N, "lcdc_brdg_reset_n");
2673 if (rc < 0) {
2674 pr_err("failed to request lcd brdg reset_n\n");
2675 return rc;
2676 }
2677
2678 rc = gpio_request(GPIO_LCDC_BRDG_PD, "lcdc_brdg_pd");
2679 if (rc < 0) {
2680 pr_err("failed to request lcd brdg pd\n");
2681 return rc;
2682 }
2683
2684 rc = gpio_tlmm_config(mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
2685 if (rc) {
2686 pr_err("Failed to enable LCDC Bridge reset enable\n");
2687 goto gpio_error;
2688 }
2689
2690 rc = gpio_tlmm_config(mipi_dsi_gpio[1], GPIO_CFG_ENABLE);
2691 if (rc) {
2692 pr_err("Failed to enable LCDC Bridge pd enable\n");
2693 goto gpio_error2;
2694 }
2695
2696 rc = gpio_direction_output(GPIO_LCDC_BRDG_RESET_N, 1);
2697 rc |= gpio_direction_output(GPIO_LCDC_BRDG_PD, 1);
2698 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2699
2700 if (!rc) {
2701 if (machine_is_msm7x27a_surf()) {
2702 lcdc_reset_ptr = ioremap_nocache(LCDC_RESET_PHYS,
2703 sizeof(uint32_t));
2704
2705 if (!lcdc_reset_ptr)
2706 return 0;
2707 }
2708 return rc;
2709 } else {
2710 goto gpio_error;
2711 }
2712
2713gpio_error2:
2714 pr_err("Failed GPIO bridge pd\n");
2715 gpio_free(GPIO_LCDC_BRDG_PD);
2716
2717gpio_error:
2718 pr_err("Failed GPIO bridge reset\n");
2719 gpio_free(GPIO_LCDC_BRDG_RESET_N);
2720 return rc;
2721}
2722
2723static const char * const msm_fb_dsi_vreg[] = {
2724 "gp2",
2725 "msme1",
2726};
2727
2728static const int msm_fb_dsi_vreg_mV[] = {
2729 2850,
2730 1800,
2731};
2732
2733static struct vreg *dsi_vreg[ARRAY_SIZE(msm_fb_dsi_vreg)];
2734static int dsi_gpio_initialized;
2735
2736static int mipi_dsi_panel_power(int on)
2737{
2738 int i, rc = 0;
2739 uint32_t lcdc_reset_cfg;
2740
2741 /* I2C-controlled GPIO Expander -init of the GPIOs very late */
2742 if (!dsi_gpio_initialized) {
2743 pmapp_disp_backlight_init();
2744
2745 rc = gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr");
2746 if (rc < 0) {
2747 pr_err("failed to request gpio_disp_pwr\n");
2748 return rc;
2749 }
2750
2751 if (machine_is_msm7x27a_surf()) {
2752 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN, 1);
2753 if (rc < 0) {
2754 pr_err("failed to enable display pwr\n");
2755 goto fail_gpio1;
2756 }
2757
2758 rc = gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en");
2759 if (rc < 0) {
2760 pr_err("failed to request gpio_bkl_en\n");
2761 goto fail_gpio1;
2762 }
2763
2764 rc = gpio_direction_output(GPIO_BACKLIGHT_EN, 1);
2765 if (rc < 0) {
2766 pr_err("failed to enable backlight\n");
2767 goto fail_gpio2;
2768 }
2769 }
2770
2771 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2772 dsi_vreg[i] = vreg_get(0, msm_fb_dsi_vreg[i]);
2773
2774 if (IS_ERR(dsi_vreg[i])) {
2775 pr_err("%s: vreg get failed with : (%ld)\n",
2776 __func__, PTR_ERR(dsi_vreg[i]));
2777 goto fail_gpio2;
2778 }
2779
2780 rc = vreg_set_level(dsi_vreg[i],
2781 msm_fb_dsi_vreg_mV[i]);
2782
2783 if (rc < 0) {
2784 pr_err("%s: set regulator level failed "
2785 "with :(%d)\n", __func__, rc);
2786 goto vreg_fail1;
2787 }
2788 }
2789 dsi_gpio_initialized = 1;
2790 }
2791
2792 if (machine_is_msm7x27a_surf()) {
2793 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
2794 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
2795 } else if (machine_is_msm7x27a_ffa()) {
2796 if (on) {
2797 /* This line drives an active low pin on FFA */
2798 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN,
2799 !on);
2800 if (rc < 0)
2801 pr_err("failed to set direction for "
2802 "display pwr\n");
2803 } else {
2804 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN,
2805 !on);
2806 rc = gpio_direction_input(GPIO_DISPLAY_PWR_EN);
2807 if (rc < 0)
2808 pr_err("failed to set direction for "
2809 "display pwr\n");
2810 }
2811 }
2812
2813 if (on) {
2814 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2815
2816 if (machine_is_msm7x27a_surf()) {
2817 lcdc_reset_cfg = readl_relaxed(lcdc_reset_ptr);
2818 rmb();
2819 lcdc_reset_cfg &= ~1;
2820
2821 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2822 msleep(20);
2823 wmb();
2824 lcdc_reset_cfg |= 1;
2825 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2826 } else {
2827 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2828 0);
2829 msleep(20);
2830 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2831 1);
2832 }
2833
2834 if (pmapp_disp_backlight_set_brightness(100))
2835 pr_err("backlight set brightness failed\n");
2836 } else {
2837 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 1);
2838
2839 if (pmapp_disp_backlight_set_brightness(0))
2840 pr_err("backlight set brightness failed\n");
2841 }
2842
2843 /*Configure vreg lines */
2844 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2845 if (on) {
2846 rc = vreg_enable(dsi_vreg[i]);
2847
2848 if (rc) {
2849 printk(KERN_ERR "vreg_enable: %s vreg"
2850 "operation failed\n",
2851 msm_fb_dsi_vreg[i]);
2852
2853 goto vreg_fail2;
2854 }
2855 } else {
2856 rc = vreg_disable(dsi_vreg[i]);
2857
2858 if (rc) {
2859 printk(KERN_ERR "vreg_disable: %s vreg "
2860 "operation failed\n",
2861 msm_fb_dsi_vreg[i]);
2862 goto vreg_fail2;
2863 }
2864 }
2865 }
2866
2867 return rc;
2868
2869vreg_fail2:
2870 if (on) {
2871 for (; i > 0; i--)
2872 vreg_disable(dsi_vreg[i - 1]);
2873 } else {
2874 for (; i > 0; i--)
2875 vreg_enable(dsi_vreg[i - 1]);
2876 }
2877
2878 return rc;
2879
2880vreg_fail1:
2881 for (; i > 0; i--)
2882 vreg_put(dsi_vreg[i - 1]);
2883
2884fail_gpio2:
2885 gpio_free(GPIO_BACKLIGHT_EN);
2886fail_gpio1:
2887 gpio_free(GPIO_DISPLAY_PWR_EN);
2888 dsi_gpio_initialized = 0;
2889 return rc;
2890}
2891
2892#define MDP_303_VSYNC_GPIO 97
2893
2894#ifdef CONFIG_FB_MSM_MDP303
2895static struct mipi_dsi_platform_data mipi_dsi_pdata = {
2896 .vsync_gpio = MDP_303_VSYNC_GPIO,
2897 .dsi_power_save = mipi_dsi_panel_power,
2898 .dsi_client_reset = msm_fb_dsi_client_reset,
2899 .get_lane_config = msm_fb_get_lane_config,
2900};
2901#endif
2902
2903static void __init msm_fb_add_devices(void)
2904{
2905 msm_fb_register_device("mdp", &mdp_pdata);
2906 msm_fb_register_device("lcdc", &lcdc_pdata);
2907 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
2908}
2909
2910#define MSM_EBI2_PHYS 0xa0d00000
2911#define MSM_EBI2_XMEM_CS2_CFG1 0xa0d10030
2912
2913static void __init msm7x27a_init_ebi2(void)
2914{
2915 uint32_t ebi2_cfg;
2916 void __iomem *ebi2_cfg_ptr;
2917
2918 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_PHYS, sizeof(uint32_t));
2919 if (!ebi2_cfg_ptr)
2920 return;
2921
2922 ebi2_cfg = readl(ebi2_cfg_ptr);
2923 if (machine_is_msm7x27a_rumi3() || machine_is_msm7x27a_surf())
2924 ebi2_cfg |= (1 << 4); /* CS2 */
2925
2926 writel(ebi2_cfg, ebi2_cfg_ptr);
2927 iounmap(ebi2_cfg_ptr);
2928
2929 /* Enable A/D MUX[bit 31] from EBI2_XMEM_CS2_CFG1 */
2930 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_XMEM_CS2_CFG1,
2931 sizeof(uint32_t));
2932 if (!ebi2_cfg_ptr)
2933 return;
2934
2935 ebi2_cfg = readl(ebi2_cfg_ptr);
2936 if (machine_is_msm7x27a_surf())
2937 ebi2_cfg |= (1 << 31);
2938
2939 writel(ebi2_cfg, ebi2_cfg_ptr);
2940 iounmap(ebi2_cfg_ptr);
2941}
2942
2943#define ATMEL_TS_I2C_NAME "maXTouch"
2944static struct vreg *vreg_l12;
2945static struct vreg *vreg_s3;
2946
2947#define ATMEL_TS_GPIO_IRQ 82
2948
2949static int atmel_ts_power_on(bool on)
2950{
2951 int rc;
2952
2953 rc = on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2954 if (rc) {
2955 pr_err("%s: vreg %sable failed (%d)\n",
2956 __func__, on ? "en" : "dis", rc);
2957 return rc;
2958 }
2959
2960 rc = on ? vreg_enable(vreg_s3) : vreg_disable(vreg_s3);
2961 if (rc) {
2962 pr_err("%s: vreg %sable failed (%d) for S3\n",
2963 __func__, on ? "en" : "dis", rc);
2964 !on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2965 return rc;
2966 }
2967 /* vreg stabilization delay */
2968 msleep(50);
2969 return 0;
2970}
2971
2972static int atmel_ts_platform_init(struct i2c_client *client)
2973{
2974 int rc;
2975
2976 vreg_l12 = vreg_get(NULL, "gp2");
2977 if (IS_ERR(vreg_l12)) {
2978 pr_err("%s: vreg_get for L2 failed\n", __func__);
2979 return PTR_ERR(vreg_l12);
2980 }
2981
2982 rc = vreg_set_level(vreg_l12, 2850);
2983 if (rc) {
2984 pr_err("%s: vreg set level failed (%d) for l2\n",
2985 __func__, rc);
2986 goto vreg_put_l2;
2987 }
2988
2989 vreg_s3 = vreg_get(NULL, "msme1");
2990 if (IS_ERR(vreg_s3)) {
2991 pr_err("%s: vreg_get for S3 failed\n", __func__);
2992 rc = PTR_ERR(vreg_s3);
2993 goto vreg_put_l2;
2994 }
2995
2996 rc = vreg_set_level(vreg_s3, 1800);
2997 if (rc) {
2998 pr_err("%s: vreg set level failed (%d) for S3\n",
2999 __func__, rc);
3000 goto vreg_put_s3;
3001 }
3002
3003 rc = gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3004 GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
3005 GPIO_CFG_8MA), GPIO_CFG_ENABLE);
3006 if (rc) {
3007 pr_err("%s: gpio_tlmm_config for %d failed\n",
3008 __func__, ATMEL_TS_GPIO_IRQ);
3009 goto vreg_put_s3;
3010 }
3011
3012 /* configure touchscreen interrupt gpio */
3013 rc = gpio_request(ATMEL_TS_GPIO_IRQ, "atmel_maxtouch_gpio");
3014 if (rc) {
3015 pr_err("%s: unable to request gpio %d\n",
3016 __func__, ATMEL_TS_GPIO_IRQ);
3017 goto ts_gpio_tlmm_unconfig;
3018 }
3019
3020 rc = gpio_direction_input(ATMEL_TS_GPIO_IRQ);
3021 if (rc < 0) {
3022 pr_err("%s: unable to set the direction of gpio %d\n",
3023 __func__, ATMEL_TS_GPIO_IRQ);
3024 goto free_ts_gpio;
3025 }
3026 return 0;
3027
3028free_ts_gpio:
3029 gpio_free(ATMEL_TS_GPIO_IRQ);
3030ts_gpio_tlmm_unconfig:
3031 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3032 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3033 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3034vreg_put_s3:
3035 vreg_put(vreg_s3);
3036vreg_put_l2:
3037 vreg_put(vreg_l12);
3038 return rc;
3039}
3040
3041static int atmel_ts_platform_exit(struct i2c_client *client)
3042{
3043 gpio_free(ATMEL_TS_GPIO_IRQ);
3044 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3045 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3046 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3047 vreg_disable(vreg_s3);
3048 vreg_put(vreg_s3);
3049 vreg_disable(vreg_l12);
3050 vreg_put(vreg_l12);
3051 return 0;
3052}
3053
3054static u8 atmel_ts_read_chg(void)
3055{
3056 return gpio_get_value(ATMEL_TS_GPIO_IRQ);
3057}
3058
3059static u8 atmel_ts_valid_interrupt(void)
3060{
3061 return !atmel_ts_read_chg();
3062}
3063
3064#define ATMEL_X_OFFSET 13
3065#define ATMEL_Y_OFFSET 0
3066
3067static struct mxt_platform_data atmel_ts_pdata = {
3068 .numtouch = 4,
3069 .init_platform_hw = atmel_ts_platform_init,
3070 .exit_platform_hw = atmel_ts_platform_exit,
3071 .power_on = atmel_ts_power_on,
3072 .display_res_x = 480,
3073 .display_res_y = 864,
3074 .min_x = ATMEL_X_OFFSET,
3075 .max_x = (505 - ATMEL_X_OFFSET),
3076 .min_y = ATMEL_Y_OFFSET,
3077 .max_y = (863 - ATMEL_Y_OFFSET),
3078 .valid_interrupt = atmel_ts_valid_interrupt,
3079 .read_chg = atmel_ts_read_chg,
3080};
3081
3082static struct i2c_board_info atmel_ts_i2c_info[] __initdata = {
3083 {
3084 I2C_BOARD_INFO(ATMEL_TS_I2C_NAME, 0x4a),
3085 .platform_data = &atmel_ts_pdata,
3086 .irq = MSM_GPIO_TO_INT(ATMEL_TS_GPIO_IRQ),
3087 },
3088};
3089
3090#define KP_INDEX(row, col) ((row)*ARRAY_SIZE(kp_col_gpios) + (col))
3091
3092static unsigned int kp_row_gpios[] = {31, 32, 33, 34, 35};
3093static unsigned int kp_col_gpios[] = {36, 37, 38, 39, 40};
3094
3095static const unsigned short keymap[ARRAY_SIZE(kp_col_gpios) *
3096 ARRAY_SIZE(kp_row_gpios)] = {
3097 [KP_INDEX(0, 0)] = KEY_7,
3098 [KP_INDEX(0, 1)] = KEY_DOWN,
3099 [KP_INDEX(0, 2)] = KEY_UP,
3100 [KP_INDEX(0, 3)] = KEY_RIGHT,
3101 [KP_INDEX(0, 4)] = KEY_ENTER,
3102
3103 [KP_INDEX(1, 0)] = KEY_LEFT,
3104 [KP_INDEX(1, 1)] = KEY_SEND,
3105 [KP_INDEX(1, 2)] = KEY_1,
3106 [KP_INDEX(1, 3)] = KEY_4,
3107 [KP_INDEX(1, 4)] = KEY_CLEAR,
3108
3109 [KP_INDEX(2, 0)] = KEY_6,
3110 [KP_INDEX(2, 1)] = KEY_5,
3111 [KP_INDEX(2, 2)] = KEY_8,
3112 [KP_INDEX(2, 3)] = KEY_3,
3113 [KP_INDEX(2, 4)] = KEY_NUMERIC_STAR,
3114
3115 [KP_INDEX(3, 0)] = KEY_9,
3116 [KP_INDEX(3, 1)] = KEY_NUMERIC_POUND,
3117 [KP_INDEX(3, 2)] = KEY_0,
3118 [KP_INDEX(3, 3)] = KEY_2,
3119 [KP_INDEX(3, 4)] = KEY_SLEEP,
3120
3121 [KP_INDEX(4, 0)] = KEY_BACK,
3122 [KP_INDEX(4, 1)] = KEY_HOME,
3123 [KP_INDEX(4, 2)] = KEY_MENU,
3124 [KP_INDEX(4, 3)] = KEY_VOLUMEUP,
3125 [KP_INDEX(4, 4)] = KEY_VOLUMEDOWN,
3126};
3127
3128/* SURF keypad platform device information */
3129static struct gpio_event_matrix_info kp_matrix_info = {
3130 .info.func = gpio_event_matrix_func,
3131 .keymap = keymap,
3132 .output_gpios = kp_row_gpios,
3133 .input_gpios = kp_col_gpios,
3134 .noutputs = ARRAY_SIZE(kp_row_gpios),
3135 .ninputs = ARRAY_SIZE(kp_col_gpios),
3136 .settle_time.tv_nsec = 40 * NSEC_PER_USEC,
3137 .poll_time.tv_nsec = 20 * NSEC_PER_MSEC,
3138 .flags = GPIOKPF_LEVEL_TRIGGERED_IRQ | GPIOKPF_DRIVE_INACTIVE |
3139 GPIOKPF_PRINT_UNMAPPED_KEYS,
3140};
3141
3142static struct gpio_event_info *kp_info[] = {
3143 &kp_matrix_info.info
3144};
3145
3146static struct gpio_event_platform_data kp_pdata = {
3147 .name = "7x27a_kp",
3148 .info = kp_info,
3149 .info_count = ARRAY_SIZE(kp_info)
3150};
3151
3152static struct platform_device kp_pdev = {
3153 .name = GPIO_EVENT_DEV_NAME,
3154 .id = -1,
3155 .dev = {
3156 .platform_data = &kp_pdata,
3157 },
3158};
3159
3160static struct msm_handset_platform_data hs_platform_data = {
3161 .hs_name = "7k_handset",
3162 .pwr_key_delay_ms = 500, /* 0 will disable end key */
3163};
3164
3165static struct platform_device hs_pdev = {
3166 .name = "msm-handset",
3167 .id = -1,
3168 .dev = {
3169 .platform_data = &hs_platform_data,
3170 },
3171};
3172
3173#define LED_GPIO_PDM 96
3174#define UART1DM_RX_GPIO 45
3175static void __init msm7x2x_init(void)
3176{
Trilok Sonia416c492011-07-22 20:20:23 +05303177 msm7x2x_misc_init();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003178
3179 /* Common functions for SURF/FFA/RUMI3 */
3180 msm_device_i2c_init();
3181 msm7x27a_init_mmc();
3182 msm7x27a_init_ebi2();
3183 msm7x27a_cfg_uart2dm_serial();
3184#ifdef CONFIG_SERIAL_MSM_HS
3185 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
3186 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
3187#endif
3188
3189 if (machine_is_msm7x27a_rumi3()) {
3190 platform_add_devices(rumi_sim_devices,
3191 ARRAY_SIZE(rumi_sim_devices));
3192 }
3193 if (machine_is_msm7x27a_surf() || machine_is_msm7x27a_ffa()) {
3194#ifdef CONFIG_USB_MSM_OTG_72K
3195 msm_otg_pdata.swfi_latency =
3196 msm7x27a_pm_data
3197 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
3198 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3199#endif
3200 msm_device_gadget_peripheral.dev.platform_data =
3201 &msm_gadget_pdata;
3202 msm7x27a_cfg_smsc911x();
3203 platform_add_devices(msm_footswitch_devices,
3204 msm_num_footswitch_devices);
3205 platform_add_devices(surf_ffa_devices,
3206 ARRAY_SIZE(surf_ffa_devices));
3207 msm_fb_add_devices();
3208#ifdef CONFIG_USB_EHCI_MSM_72K
3209 msm7x2x_init_host();
3210#endif
3211 }
3212
3213 msm_pm_set_platform_data(msm7x27a_pm_data,
3214 ARRAY_SIZE(msm7x27a_pm_data));
3215
3216#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
3217 register_i2c_devices();
3218#endif
3219#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
3220 bt_power_init();
3221#endif
3222 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
3223 atmel_ts_pdata.min_x = 0;
3224 atmel_ts_pdata.max_x = 480;
3225 atmel_ts_pdata.min_y = 0;
3226 atmel_ts_pdata.max_y = 320;
3227 }
3228
3229 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
3230 atmel_ts_i2c_info,
3231 ARRAY_SIZE(atmel_ts_i2c_info));
3232
3233 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
3234 i2c_camera_devices,
3235 ARRAY_SIZE(i2c_camera_devices));
3236 platform_device_register(&kp_pdev);
3237 platform_device_register(&hs_pdev);
3238
3239 /* configure it as a pdm function*/
3240 if (gpio_tlmm_config(GPIO_CFG(LED_GPIO_PDM, 3,
3241 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
3242 GPIO_CFG_8MA), GPIO_CFG_ENABLE))
3243 pr_err("%s: gpio_tlmm_config for %d failed\n",
3244 __func__, LED_GPIO_PDM);
3245 else
3246 platform_device_register(&led_pdev);
3247
3248#ifdef CONFIG_MSM_RPC_VIBRATOR
3249 if (machine_is_msm7x27a_ffa())
3250 msm_init_pmic_vibrator();
3251#endif
3252 /*7x25a kgsl initializations*/
3253 msm7x25a_kgsl_3d0_init();
3254}
3255
3256static void __init msm7x2x_init_early(void)
3257{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003258 msm_msm7x2x_allocate_memory_regions();
3259}
3260
3261MACHINE_START(MSM7X27A_RUMI3, "QCT MSM7x27a RUMI3")
3262 .boot_params = PHYS_OFFSET + 0x100,
3263 .map_io = msm_common_io_init,
3264 .reserve = msm7x27a_reserve,
3265 .init_irq = msm_init_irq,
3266 .init_machine = msm7x2x_init,
3267 .timer = &msm_timer,
3268 .init_early = msm7x2x_init_early,
3269MACHINE_END
3270MACHINE_START(MSM7X27A_SURF, "QCT MSM7x27a SURF")
3271 .boot_params = PHYS_OFFSET + 0x100,
3272 .map_io = msm_common_io_init,
3273 .reserve = msm7x27a_reserve,
3274 .init_irq = msm_init_irq,
3275 .init_machine = msm7x2x_init,
3276 .timer = &msm_timer,
3277 .init_early = msm7x2x_init_early,
3278MACHINE_END
3279MACHINE_START(MSM7X27A_FFA, "QCT MSM7x27a FFA")
3280 .boot_params = PHYS_OFFSET + 0x100,
3281 .map_io = msm_common_io_init,
3282 .reserve = msm7x27a_reserve,
3283 .init_irq = msm_init_irq,
3284 .init_machine = msm7x2x_init,
3285 .timer = &msm_timer,
3286 .init_early = msm7x2x_init_early,
3287MACHINE_END