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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
Steve Mucklea55df6e2010-01-07 12:43:24 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Steve Mucklea55df6e2010-01-07 12:43:24 -080012 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016#include <linux/gpio.h>
Steve Muckle9161d302010-02-11 11:50:40 -080017#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/io.h>
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053019#include <linux/msm_ssbi.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/mfd/pmic8058.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080021
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/leds.h>
23#include <linux/pmic8058-othc.h>
24#include <linux/mfd/pmic8901.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053025#include <linux/regulator/gpio-regulator.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <linux/regulator/pmic8901-regulator.h>
27#include <linux/bootmem.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <linux/msm_adc.h>
29#include <linux/m_adcproc.h>
30#include <linux/mfd/marimba.h>
31#include <linux/msm-charger.h>
32#include <linux/i2c.h>
33#include <linux/i2c/sx150x.h>
34#include <linux/smsc911x.h>
35#include <linux/spi/spi.h>
36#include <linux/input/tdisc_shinetsu.h>
37#include <linux/input/cy8c_ts.h>
38#include <linux/cyttsp.h>
39#include <linux/i2c/isa1200.h>
40#include <linux/dma-mapping.h>
41#include <linux/i2c/bq27520.h>
42
43#ifdef CONFIG_ANDROID_PMEM
44#include <linux/android_pmem.h>
45#endif
46
47#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
48#include <linux/i2c/smb137b.h>
49#endif
Lei Zhou338cab82011-08-19 13:38:17 -040050#ifdef CONFIG_SND_SOC_WM8903
51#include <sound/wm8903.h>
52#endif
Steve Mucklea55df6e2010-01-07 12:43:24 -080053#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055#include <asm/setup.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080056
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070057#include <mach/dma.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080058#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070059#include <mach/irqs.h>
60#include <mach/msm_spi.h>
61#include <mach/msm_serial_hs.h>
62#include <mach/msm_serial_hs_lite.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080063#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070064#include <mach/msm_memtypes.h>
65#include <asm/mach/mmc.h>
66#include <mach/msm_battery.h>
67#include <mach/msm_hsusb.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070068#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070069#ifdef CONFIG_MSM_DSPS
70#include <mach/msm_dsps.h>
71#endif
72#include <mach/msm_xo.h>
73#include <mach/msm_bus_board.h>
74#include <mach/socinfo.h>
75#include <linux/i2c/isl9519.h>
76#ifdef CONFIG_USB_G_ANDROID
77#include <linux/usb/android.h>
78#include <mach/usbdiag.h>
79#endif
80#include <linux/regulator/consumer.h>
81#include <linux/regulator/machine.h>
82#include <mach/sdio_al.h>
83#include <mach/rpm.h>
84#include <mach/rpm-regulator.h>
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070085#include <mach/restart.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053086#include <mach/board-msm8660.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080087
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070088#include "devices.h"
89#include "devices-msm8x60.h"
90#include "cpuidle.h"
91#include "pm.h"
92#include "mpm.h"
93#include "spm.h"
94#include "rpm_log.h"
95#include "timer.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070096#include "gpiomux-8x60.h"
97#include "rpm_stats.h"
98#include "peripheral-loader.h"
99#include <linux/platform_data/qcom_crypto_device.h>
100#include "rpm_resources.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -0700101#include "acpuclock.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -0600102#include "pm-boot.h"
Laura Abbott63cfd7e2011-10-10 18:21:01 -0700103
104#include <linux/ion.h>
105#include <mach/ion.h>
106
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700107#define MSM_SHARED_RAM_PHYS 0x40000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108#define MDM2AP_SYNC 129
109
Terence Hampson1c73fef2011-07-19 17:10:49 -0400110#define GPIO_ETHERNET_RESET_N_DRAGON 30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700111#define LCDC_SPI_GPIO_CLK 73
112#define LCDC_SPI_GPIO_CS 72
113#define LCDC_SPI_GPIO_MOSI 70
114#define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga"
115#define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled"
116#define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga"
117#define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02"
118#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -0400119#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700120
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -0700121#define PANEL_NAME_MAX_LEN 30
122#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
123#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
124#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
125#define HDMI_PANEL_NAME "hdmi_msm"
126#define TVOUT_PANEL_NAME "tvout_msm"
127
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700128#define DSPS_PIL_GENERIC_NAME "dsps"
129#define DSPS_PIL_FLUID_NAME "dsps_fluid"
130
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800131#ifdef CONFIG_ION_MSM
132static struct platform_device ion_dev;
133#endif
134
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700135enum {
136 GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS,
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530137 GPIO_EXPANDER_GPIO_BASE = PM8901_MPP_BASE + PM8901_MPPS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700138 /* CORE expander */
139 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
140 GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE,
141 GPIO_WLAN_DEEP_SLEEP_N,
142 GPIO_LVDS_SHUTDOWN_N,
143 GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N,
144 GPIO_MS_SYS_RESET_N,
145 GPIO_CAP_TS_RESOUT_N,
146 GPIO_CAP_GAUGE_BI_TOUT,
147 GPIO_ETHERNET_PME,
148 GPIO_EXT_GPS_LNA_EN,
149 GPIO_MSM_WAKES_BT,
150 GPIO_ETHERNET_RESET_N,
151 GPIO_HEADSET_DET_N,
152 GPIO_USB_UICC_EN,
153 GPIO_BACKLIGHT_EN,
154 GPIO_EXT_CAMIF_PWR_EN,
155 GPIO_BATT_GAUGE_INT_N,
156 GPIO_BATT_GAUGE_EN,
157 /* DOCKING expander */
158 GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16,
159 GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE,
160 GPIO_AUX_JTAG_DET_N,
161 GPIO_DONGLE_DET_N,
162 GPIO_SVIDEO_LOAD_DET,
163 GPIO_SVID_AMP_SHUTDOWN1_N,
164 GPIO_SVID_AMP_SHUTDOWN0_N,
165 GPIO_SDC_WP,
166 GPIO_IRDA_PWDN,
167 GPIO_IRDA_RESET_N,
168 GPIO_DONGLE_GPIO0,
169 GPIO_DONGLE_GPIO1,
170 GPIO_DONGLE_GPIO2,
171 GPIO_DONGLE_GPIO3,
172 GPIO_DONGLE_PWR_EN,
173 GPIO_EMMC_RESET_N,
174 GPIO_TP_EXP2_IO15,
175 /* SURF expander */
176 GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2),
177 GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE,
178 GPIO_SD_CARD_DET_2,
179 GPIO_SD_CARD_DET_4,
180 GPIO_SD_CARD_DET_5,
181 GPIO_UIM3_RST,
182 GPIO_SURF_EXPANDER_IO5,
183 GPIO_SURF_EXPANDER_IO6,
184 GPIO_ADC_I2C_EN,
185 GPIO_SURF_EXPANDER_IO8,
186 GPIO_SURF_EXPANDER_IO9,
187 GPIO_SURF_EXPANDER_IO10,
188 GPIO_SURF_EXPANDER_IO11,
189 GPIO_SURF_EXPANDER_IO12,
190 GPIO_SURF_EXPANDER_IO13,
191 GPIO_SURF_EXPANDER_IO14,
192 GPIO_SURF_EXPANDER_IO15,
193 /* LEFT KB IO expander */
194 GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3),
195 GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE,
196 GPIO_LEFT_LED_2,
197 GPIO_LEFT_LED_3,
198 GPIO_LEFT_LED_WLAN,
199 GPIO_JOYSTICK_EN,
200 GPIO_CAP_TS_SLEEP,
201 GPIO_LEFT_KB_IO6,
202 GPIO_LEFT_LED_5,
203 /* RIGHT KB IO expander */
204 GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8,
205 GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE,
206 GPIO_RIGHT_LED_2,
207 GPIO_RIGHT_LED_3,
208 GPIO_RIGHT_LED_BT,
209 GPIO_WEB_CAMIF_STANDBY,
210 GPIO_COMPASS_RST_N,
211 GPIO_WEB_CAMIF_RESET_N,
212 GPIO_RIGHT_LED_5,
213 GPIO_R_ALTIMETER_RESET_N,
214 /* FLUID S IO expander */
215 GPIO_SOUTH_EXPANDER_BASE,
216 GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE,
217 GPIO_MIC1_ANCL_SEL,
218 GPIO_HS_MIC4_SEL,
219 GPIO_FML_MIC3_SEL,
220 GPIO_FMR_MIC5_SEL,
221 GPIO_TS_SLEEP,
222 GPIO_HAP_SHIFT_LVL_OE,
223 GPIO_HS_SW_DIR,
224 /* FLUID N IO expander */
225 GPIO_NORTH_EXPANDER_BASE,
226 GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE,
227 GPIO_EPM_5V_BOOST_EN,
228 GPIO_AUX_CAM_2P7_EN,
229 GPIO_LED_FLASH_EN,
230 GPIO_LED1_GREEN_N,
231 GPIO_LED2_RED_N,
232 GPIO_FRONT_CAM_RESET_N,
233 GPIO_EPM_LVLSFT_EN,
234 GPIO_N_ALTIMETER_RESET_N,
235 /* EPM expander */
236 GPIO_EPM_EXPANDER_BASE,
237 GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE,
238 GPIO_PWR_MON_RESET_N,
239 GPIO_ADC1_PWDN_N,
240 GPIO_ADC2_PWDN_N,
241 GPIO_EPM_EXPANDER_IO4,
242 GPIO_ADC1_MUX_SPI_INT_N_3_3V,
243 GPIO_ADC2_MUX_SPI_INT_N,
244 GPIO_EPM_EXPANDER_IO7,
245 GPIO_PWR_MON_ENABLE,
246 GPIO_EPM_SPI_ADC1_CS_N,
247 GPIO_EPM_SPI_ADC2_CS_N,
248 GPIO_EPM_EXPANDER_IO11,
249 GPIO_EPM_EXPANDER_IO12,
250 GPIO_EPM_EXPANDER_IO13,
251 GPIO_EPM_EXPANDER_IO14,
252 GPIO_EPM_EXPANDER_IO15,
253};
254
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530255struct pm8xxx_mpp_init_info {
256 unsigned mpp;
257 struct pm8xxx_mpp_config_data config;
258};
259
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530260#define PM8058_MPP_INIT(_mpp, _type, _level, _control) \
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530261{ \
262 .mpp = PM8058_MPP_PM_TO_SYS(_mpp), \
263 .config = { \
264 .type = PM8XXX_MPP_TYPE_##_type, \
265 .level = _level, \
266 .control = PM8XXX_MPP_##_control, \
267 } \
268}
269
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530270#define PM8901_MPP_INIT(_mpp, _type, _level, _control) \
271{ \
272 .mpp = PM8901_MPP_PM_TO_SYS(_mpp), \
273 .config = { \
274 .type = PM8XXX_MPP_TYPE_##_type, \
275 .level = _level, \
276 .control = PM8XXX_MPP_##_control, \
277 } \
278}
279
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700280/*
281 * The UI_INTx_N lines are pmic gpio lines which connect i2c
282 * gpio expanders to the pm8058.
283 */
284#define UI_INT1_N 25
285#define UI_INT2_N 34
286#define UI_INT3_N 14
287/*
288FM GPIO is GPIO 18 on PMIC 8058.
289As the index starts from 0 in the PMIC driver, and hence 17
290corresponds to GPIO 18 on PMIC 8058.
291*/
292#define FM_GPIO 17
293
294#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
295static void (*sdc2_status_notify_cb)(int card_present, void *dev_id);
296static void *sdc2_status_notify_cb_devid;
297#endif
298
299#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
300static void (*sdc5_status_notify_cb)(int card_present, void *dev_id);
301static void *sdc5_status_notify_cb_devid;
302#endif
303
304static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = {
305 [0] = {
306 .reg_base_addr = MSM_SAW0_BASE,
307
308#ifdef CONFIG_MSM_AVS_HW
309 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
310#endif
311 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
312 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
313 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
314 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
315
316 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
317 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
318 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
319
320 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
321 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
322 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
323
324 .awake_vlevel = 0x94,
325 .retention_vlevel = 0x81,
326 .collapse_vlevel = 0x20,
327 .retention_mid_vlevel = 0x94,
328 .collapse_mid_vlevel = 0x8C,
329
330 .vctl_timeout_us = 50,
331 },
332
333 [1] = {
334 .reg_base_addr = MSM_SAW1_BASE,
335
336#ifdef CONFIG_MSM_AVS_HW
337 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
338#endif
339 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
340 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
341 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
342 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
343
344 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
345 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
346 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
347
348 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
349 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
350 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
351
352 .awake_vlevel = 0x94,
353 .retention_vlevel = 0x81,
354 .collapse_vlevel = 0x20,
355 .retention_mid_vlevel = 0x94,
356 .collapse_mid_vlevel = 0x8C,
357
358 .vctl_timeout_us = 50,
359 },
360};
361
362static struct msm_spm_platform_data msm_spm_data[] __initdata = {
363 [0] = {
364 .reg_base_addr = MSM_SAW0_BASE,
365
366#ifdef CONFIG_MSM_AVS_HW
367 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
368#endif
369 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
370 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
371 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
372 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
373
374 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
375 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
376 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
377
378 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
379 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
380 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
381
382 .awake_vlevel = 0xA0,
383 .retention_vlevel = 0x89,
384 .collapse_vlevel = 0x20,
385 .retention_mid_vlevel = 0x89,
386 .collapse_mid_vlevel = 0x89,
387
388 .vctl_timeout_us = 50,
389 },
390
391 [1] = {
392 .reg_base_addr = MSM_SAW1_BASE,
393
394#ifdef CONFIG_MSM_AVS_HW
395 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
396#endif
397 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
398 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
399 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
400 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
401
402 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
403 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
404 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
405
406 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
407 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
408 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
409
410 .awake_vlevel = 0xA0,
411 .retention_vlevel = 0x89,
412 .collapse_vlevel = 0x20,
413 .retention_mid_vlevel = 0x89,
414 .collapse_mid_vlevel = 0x89,
415
416 .vctl_timeout_us = 50,
417 },
418};
419
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700420/*
421 * Consumer specific regulator names:
422 * regulator name consumer dev_name
423 */
424static struct regulator_consumer_supply vreg_consumers_8901_S0[] = {
425 REGULATOR_SUPPLY("8901_s0", NULL),
426};
427static struct regulator_consumer_supply vreg_consumers_8901_S1[] = {
428 REGULATOR_SUPPLY("8901_s1", NULL),
429};
430
431static struct regulator_init_data saw_s0_init_data = {
432 .constraints = {
433 .name = "8901_s0",
434 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700435 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700436 .max_uV = 1250000,
437 },
438 .consumer_supplies = vreg_consumers_8901_S0,
439 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
440};
441
442static struct regulator_init_data saw_s1_init_data = {
443 .constraints = {
444 .name = "8901_s1",
445 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700446 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700447 .max_uV = 1250000,
448 },
449 .consumer_supplies = vreg_consumers_8901_S1,
450 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
451};
452
453static struct platform_device msm_device_saw_s0 = {
454 .name = "saw-regulator",
455 .id = 0,
456 .dev = {
457 .platform_data = &saw_s0_init_data,
458 },
459};
460
461static struct platform_device msm_device_saw_s1 = {
462 .name = "saw-regulator",
463 .id = 1,
464 .dev = {
465 .platform_data = &saw_s1_init_data,
466 },
467};
468
469/*
470 * The smc91x configuration varies depending on platform.
471 * The resources data structure is filled in at runtime.
472 */
473static struct resource smc91x_resources[] = {
474 [0] = {
475 .flags = IORESOURCE_MEM,
476 },
477 [1] = {
478 .flags = IORESOURCE_IRQ,
479 },
480};
481
482static struct platform_device smc91x_device = {
483 .name = "smc91x",
484 .id = 0,
485 .num_resources = ARRAY_SIZE(smc91x_resources),
486 .resource = smc91x_resources,
487};
488
489static struct resource smsc911x_resources[] = {
490 [0] = {
491 .flags = IORESOURCE_MEM,
492 .start = 0x1b800000,
493 .end = 0x1b8000ff
494 },
495 [1] = {
496 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
497 },
498};
499
500static struct smsc911x_platform_config smsc911x_config = {
501 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
502 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
503 .flags = SMSC911X_USE_16BIT,
504 .has_reset_gpio = 1,
505 .reset_gpio = GPIO_ETHERNET_RESET_N
506};
507
508static struct platform_device smsc911x_device = {
509 .name = "smsc911x",
510 .id = 0,
511 .num_resources = ARRAY_SIZE(smsc911x_resources),
512 .resource = smsc911x_resources,
513 .dev = {
514 .platform_data = &smsc911x_config
515 }
516};
517
518#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
519 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
520 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
521 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
522
523#define QCE_SIZE 0x10000
524#define QCE_0_BASE 0x18500000
525
526#define QCE_HW_KEY_SUPPORT 0
527#define QCE_SHA_HMAC_SUPPORT 0
528#define QCE_SHARE_CE_RESOURCE 2
529#define QCE_CE_SHARED 1
530
531static struct resource qcrypto_resources[] = {
532 [0] = {
533 .start = QCE_0_BASE,
534 .end = QCE_0_BASE + QCE_SIZE - 1,
535 .flags = IORESOURCE_MEM,
536 },
537 [1] = {
538 .name = "crypto_channels",
539 .start = DMOV_CE_IN_CHAN,
540 .end = DMOV_CE_OUT_CHAN,
541 .flags = IORESOURCE_DMA,
542 },
543 [2] = {
544 .name = "crypto_crci_in",
545 .start = DMOV_CE_IN_CRCI,
546 .end = DMOV_CE_IN_CRCI,
547 .flags = IORESOURCE_DMA,
548 },
549 [3] = {
550 .name = "crypto_crci_out",
551 .start = DMOV_CE_OUT_CRCI,
552 .end = DMOV_CE_OUT_CRCI,
553 .flags = IORESOURCE_DMA,
554 },
555 [4] = {
556 .name = "crypto_crci_hash",
557 .start = DMOV_CE_HASH_CRCI,
558 .end = DMOV_CE_HASH_CRCI,
559 .flags = IORESOURCE_DMA,
560 },
561};
562
563static struct resource qcedev_resources[] = {
564 [0] = {
565 .start = QCE_0_BASE,
566 .end = QCE_0_BASE + QCE_SIZE - 1,
567 .flags = IORESOURCE_MEM,
568 },
569 [1] = {
570 .name = "crypto_channels",
571 .start = DMOV_CE_IN_CHAN,
572 .end = DMOV_CE_OUT_CHAN,
573 .flags = IORESOURCE_DMA,
574 },
575 [2] = {
576 .name = "crypto_crci_in",
577 .start = DMOV_CE_IN_CRCI,
578 .end = DMOV_CE_IN_CRCI,
579 .flags = IORESOURCE_DMA,
580 },
581 [3] = {
582 .name = "crypto_crci_out",
583 .start = DMOV_CE_OUT_CRCI,
584 .end = DMOV_CE_OUT_CRCI,
585 .flags = IORESOURCE_DMA,
586 },
587 [4] = {
588 .name = "crypto_crci_hash",
589 .start = DMOV_CE_HASH_CRCI,
590 .end = DMOV_CE_HASH_CRCI,
591 .flags = IORESOURCE_DMA,
592 },
593};
594
595#endif
596
597#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
598 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
599
600static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
601 .ce_shared = QCE_CE_SHARED,
602 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
603 .hw_key_support = QCE_HW_KEY_SUPPORT,
604 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
605};
606
607static struct platform_device qcrypto_device = {
608 .name = "qcrypto",
609 .id = 0,
610 .num_resources = ARRAY_SIZE(qcrypto_resources),
611 .resource = qcrypto_resources,
612 .dev = {
613 .coherent_dma_mask = DMA_BIT_MASK(32),
614 .platform_data = &qcrypto_ce_hw_suppport,
615 },
616};
617#endif
618
619#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
620 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
621
622static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
623 .ce_shared = QCE_CE_SHARED,
624 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
625 .hw_key_support = QCE_HW_KEY_SUPPORT,
626 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
627};
628
629static struct platform_device qcedev_device = {
630 .name = "qce",
631 .id = 0,
632 .num_resources = ARRAY_SIZE(qcedev_resources),
633 .resource = qcedev_resources,
634 .dev = {
635 .coherent_dma_mask = DMA_BIT_MASK(32),
636 .platform_data = &qcedev_ce_hw_suppport,
637 },
638};
639#endif
640
641#if defined(CONFIG_HAPTIC_ISA1200) || \
642 defined(CONFIG_HAPTIC_ISA1200_MODULE)
643
644static const char *vregs_isa1200_name[] = {
645 "8058_s3",
646 "8901_l4",
647};
648
649static const int vregs_isa1200_val[] = {
650 1800000,/* uV */
651 2600000,
652};
653static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)];
654static struct msm_xo_voter *xo_handle_a1;
655
656static int isa1200_power(int vreg_on)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800657{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700658 int i, rc = 0;
659
660 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
661 rc = vreg_on ? regulator_enable(vregs_isa1200[i]) :
662 regulator_disable(vregs_isa1200[i]);
663 if (rc < 0) {
664 pr_err("%s: vreg %s %s failed (%d)\n",
665 __func__, vregs_isa1200_name[i],
666 vreg_on ? "enable" : "disable", rc);
667 goto vreg_fail;
668 }
669 }
670
671 rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) :
672 msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF);
673 if (rc < 0) {
674 pr_err("%s: failed to %svote for TCXO A1 buffer%d\n",
675 __func__, vreg_on ? "" : "de-", rc);
676 goto vreg_fail;
677 }
678 return 0;
679
680vreg_fail:
681 while (i--)
682 !vreg_on ? regulator_enable(vregs_isa1200[i]) :
683 regulator_disable(vregs_isa1200[i]);
684 return rc;
Steve Mucklea55df6e2010-01-07 12:43:24 -0800685}
686
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700687static int isa1200_dev_setup(bool enable)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800688{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700689 int i, rc;
Steve Muckle9161d302010-02-11 11:50:40 -0800690
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700691 if (enable == true) {
692 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
693 vregs_isa1200[i] = regulator_get(NULL,
694 vregs_isa1200_name[i]);
695 if (IS_ERR(vregs_isa1200[i])) {
696 pr_err("%s: regulator get of %s failed (%ld)\n",
697 __func__, vregs_isa1200_name[i],
698 PTR_ERR(vregs_isa1200[i]));
699 rc = PTR_ERR(vregs_isa1200[i]);
700 goto vreg_get_fail;
701 }
702 rc = regulator_set_voltage(vregs_isa1200[i],
703 vregs_isa1200_val[i], vregs_isa1200_val[i]);
704 if (rc) {
705 pr_err("%s: regulator_set_voltage(%s) failed\n",
706 __func__, vregs_isa1200_name[i]);
707 goto vreg_get_fail;
708 }
709 }
Steve Muckle9161d302010-02-11 11:50:40 -0800710
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700711 rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe");
712 if (rc) {
713 pr_err("%s: unable to request gpio %d (%d)\n",
714 __func__, GPIO_HAP_SHIFT_LVL_OE, rc);
715 goto vreg_get_fail;
716 }
Steve Muckle9161d302010-02-11 11:50:40 -0800717
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700718 rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1);
719 if (rc) {
720 pr_err("%s: Unable to set direction\n", __func__);;
721 goto free_gpio;
722 }
723
724 xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200");
725 if (IS_ERR(xo_handle_a1)) {
726 rc = PTR_ERR(xo_handle_a1);
727 pr_err("%s: failed to get the handle for A1(%d)\n",
728 __func__, rc);
729 goto gpio_set_dir;
730 }
731 } else {
732 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
733 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
734
735 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++)
736 regulator_put(vregs_isa1200[i]);
737
738 msm_xo_put(xo_handle_a1);
739 }
740
741 return 0;
742gpio_set_dir:
743 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
744free_gpio:
745 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
746vreg_get_fail:
747 while (i)
748 regulator_put(vregs_isa1200[--i]);
749 return rc;
750}
751
752#define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530753#define PMIC_GPIO_HAP_LDO_ENABLE 5 /* PMIC GPIO Number 6 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700754static struct isa1200_platform_data isa1200_1_pdata = {
755 .name = "vibrator",
756 .power_on = isa1200_power,
757 .dev_setup = isa1200_dev_setup,
758 /*gpio to enable haptic*/
759 .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530760 .hap_len_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700761 .max_timeout = 15000,
762 .mode_ctrl = PWM_GEN_MODE,
763 .pwm_fd = {
764 .pwm_div = 256,
765 },
766 .is_erm = false,
767 .smart_en = true,
768 .ext_clk_en = true,
769 .chip_en = 1,
770};
771
772static struct i2c_board_info msm_isa1200_board_info[] = {
773 {
774 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
775 .platform_data = &isa1200_1_pdata,
776 },
777};
778#endif
779
780#if defined(CONFIG_BATTERY_BQ27520) || \
781 defined(CONFIG_BATTERY_BQ27520_MODULE)
782static struct bq27520_platform_data bq27520_pdata = {
783 .name = "fuel-gauge",
784 .vreg_name = "8058_s3",
785 .vreg_value = 1800000,
786 .soc_int = GPIO_BATT_GAUGE_INT_N,
787 .bi_tout = GPIO_CAP_GAUGE_BI_TOUT,
788 .chip_en = GPIO_BATT_GAUGE_EN,
789 .enable_dlog = 0, /* if enable coulomb counter logger */
790};
791
792static struct i2c_board_info msm_bq27520_board_info[] = {
793 {
794 I2C_BOARD_INFO("bq27520", 0xaa>>1),
795 .platform_data = &bq27520_pdata,
796 },
797};
798#endif
799
800static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
801 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
802 .idle_supported = 1,
803 .suspend_supported = 1,
804 .idle_enabled = 0,
805 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700806 },
807
808 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
809 .idle_supported = 1,
810 .suspend_supported = 1,
811 .idle_enabled = 0,
812 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700813 },
814
815 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
816 .idle_supported = 1,
817 .suspend_supported = 1,
818 .idle_enabled = 1,
819 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700820 },
821
822 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
823 .idle_supported = 1,
824 .suspend_supported = 1,
825 .idle_enabled = 0,
826 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700827 },
828
829 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
830 .idle_supported = 1,
831 .suspend_supported = 1,
832 .idle_enabled = 0,
833 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700834 },
835
836 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
837 .idle_supported = 1,
838 .suspend_supported = 1,
839 .idle_enabled = 1,
840 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700841 },
842};
843
844static struct msm_cpuidle_state msm_cstates[] __initdata = {
845 {0, 0, "C0", "WFI",
846 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
847
848 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
849 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
850
851 {0, 2, "C2", "POWER_COLLAPSE",
852 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
853
854 {1, 0, "C0", "WFI",
855 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
856
857 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
858 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
859};
860
861static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
862 {
863 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
864 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
865 true,
866 1, 8000, 100000, 1,
867 },
868
869 {
870 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
871 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
872 true,
873 1500, 5000, 60100000, 3000,
874 },
875
876 {
877 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
878 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
879 false,
880 1800, 5000, 60350000, 3500,
881 },
882 {
883 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
884 MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE),
885 false,
886 3800, 4500, 65350000, 5500,
887 },
888
889 {
890 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
891 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
892 false,
893 2800, 2500, 66850000, 4800,
894 },
895
896 {
897 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
898 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
899 false,
900 4800, 2000, 71850000, 6800,
901 },
902
903 {
904 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
905 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
906 false,
907 6800, 500, 75850000, 8800,
908 },
909
910 {
911 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
912 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
913 false,
914 7800, 0, 76350000, 9800,
915 },
916};
917
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -0600918static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
919 .mode = MSM_PM_BOOT_CONFIG_TZ,
920};
921
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700922#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
923
924#define ISP1763_INT_GPIO 117
925#define ISP1763_RST_GPIO 152
926static struct resource isp1763_resources[] = {
927 [0] = {
928 .flags = IORESOURCE_MEM,
929 .start = 0x1D000000,
930 .end = 0x1D005FFF, /* 24KB */
931 },
932 [1] = {
933 .flags = IORESOURCE_IRQ,
934 },
935};
936static void __init msm8x60_cfg_isp1763(void)
937{
938 isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO);
939 isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO);
940}
941
942static int isp1763_setup_gpio(int enable)
943{
944 int status = 0;
945
946 if (enable) {
947 status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb");
948 if (status) {
949 pr_err("%s:Failed to request GPIO %d\n",
950 __func__, ISP1763_INT_GPIO);
951 return status;
952 }
953 status = gpio_direction_input(ISP1763_INT_GPIO);
954 if (status) {
955 pr_err("%s:Failed to configure GPIO %d\n",
956 __func__, ISP1763_INT_GPIO);
957 goto gpio_free_int;
958 }
959 status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb");
960 if (status) {
961 pr_err("%s:Failed to request GPIO %d\n",
962 __func__, ISP1763_RST_GPIO);
963 goto gpio_free_int;
964 }
965 status = gpio_direction_output(ISP1763_RST_GPIO, 1);
966 if (status) {
967 pr_err("%s:Failed to configure GPIO %d\n",
968 __func__, ISP1763_RST_GPIO);
969 goto gpio_free_rst;
970 }
971 pr_debug("\nISP GPIO configuration done\n");
972 return status;
973 }
974
975gpio_free_rst:
976 gpio_free(ISP1763_RST_GPIO);
977gpio_free_int:
978 gpio_free(ISP1763_INT_GPIO);
979
980 return status;
981}
982static struct isp1763_platform_data isp1763_pdata = {
983 .reset_gpio = ISP1763_RST_GPIO,
984 .setup_gpio = isp1763_setup_gpio
985};
986
987static struct platform_device isp1763_device = {
988 .name = "isp1763_usb",
989 .num_resources = ARRAY_SIZE(isp1763_resources),
990 .resource = isp1763_resources,
991 .dev = {
992 .platform_data = &isp1763_pdata
993 }
994};
995#endif
996
997#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Anji jonnalaeb9e60d2011-10-05 12:19:46 +0530998static struct msm_otg_platform_data msm_otg_pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700999static struct regulator *ldo6_3p3;
1000static struct regulator *ldo7_1p8;
1001static struct regulator *vdd_cx;
1002#define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36)
Anji jonnalaae745e92011-11-14 18:34:31 +05301003#define PMIC_ID_GPIO 36
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001004notify_vbus_state notify_vbus_state_func_ptr;
1005static int usb_phy_susp_dig_vol = 750000;
1006static int pmic_id_notif_supported;
1007
1008#ifdef CONFIG_USB_EHCI_MSM_72K
1009#define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100)
1010struct delayed_work pmic_id_det;
1011
1012static int __init usb_id_pin_rework_setup(char *support)
1013{
1014 if (strncmp(support, "true", 4) == 0)
1015 pmic_id_notif_supported = 1;
1016
1017 return 1;
1018}
1019__setup("usb_id_pin_rework=", usb_id_pin_rework_setup);
1020
1021static void pmic_id_detect(struct work_struct *w)
1022{
1023 int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36));
1024 pr_debug("%s(): gpio_read_value = %d\n", __func__, val);
1025
1026 if (notify_vbus_state_func_ptr)
1027 (*notify_vbus_state_func_ptr) (val);
1028}
1029
1030static irqreturn_t pmic_id_on_irq(int irq, void *data)
1031{
1032 /*
1033 * Spurious interrupts are observed on pmic gpio line
1034 * even though there is no state change on USB ID. Schedule the
1035 * work to to allow debounce on gpio
Steve Muckle9161d302010-02-11 11:50:40 -08001036 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001037 schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY);
Steve Muckle9161d302010-02-11 11:50:40 -08001038
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001039 return IRQ_HANDLED;
1040}
1041
Anji jonnalaae745e92011-11-14 18:34:31 +05301042static int msm_hsusb_phy_id_setup_init(int init)
1043{
1044 unsigned ret;
1045
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301046 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
1047 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
1048 .level = PM8901_MPP_DIG_LEVEL_L5,
1049 };
1050
Anji jonnalaae745e92011-11-14 18:34:31 +05301051 if (init) {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301052 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
1053 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1054 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301055 if (ret < 0)
1056 pr_err("%s:MPP2 configuration failed\n", __func__);
1057 } else {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301058 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW;
1059 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1060 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301061 if (ret < 0)
1062 pr_err("%s:MPP2 un config failed\n", __func__);
1063 }
1064 return ret;
1065}
1066
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001067static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init)
1068{
1069 unsigned ret = -ENODEV;
1070
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301071 struct pm_gpio pmic_id_cfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301072 .direction = PM_GPIO_DIR_IN,
1073 .pull = PM_GPIO_PULL_UP_1P5,
1074 .function = PM_GPIO_FUNC_NORMAL,
1075 .vin_sel = 2,
1076 .inv_int_pol = 0,
1077 };
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301078 struct pm_gpio pmic_id_uncfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301079 .direction = PM_GPIO_DIR_IN,
1080 .pull = PM_GPIO_PULL_NO,
1081 .function = PM_GPIO_FUNC_NORMAL,
1082 .vin_sel = 2,
1083 .inv_int_pol = 0,
1084 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001085 if (!callback)
1086 return -EINVAL;
1087
1088 if (machine_is_msm8x60_fluid())
1089 return -ENOTSUPP;
1090
1091 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) {
1092 pr_debug("%s: USB_ID pin is not routed to PMIC"
1093 "on V1 surf/ffa\n", __func__);
1094 return -ENOTSUPP;
1095 }
1096
Manu Gautam62158eb2011-11-24 16:20:46 +05301097 if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa() ||
1098 machine_is_msm8x60_ffa()) && !pmic_id_notif_supported) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001099 pr_debug("%s: USB_ID is not routed to PMIC"
1100 "on V2 ffa\n", __func__);
1101 return -ENOTSUPP;
1102 }
1103
1104 usb_phy_susp_dig_vol = 500000;
1105
1106 if (init) {
1107 notify_vbus_state_func_ptr = callback;
Manu Gautame8420ef2011-11-11 15:37:21 +05301108 INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301109 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1110 &pmic_id_cfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301111 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301112 pr_err("%s:return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301113 __func__, ret);
1114 return ret;
1115 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001116 ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq,
1117 (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING),
1118 "msm_otg_id", NULL);
1119 if (ret) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001120 pr_err("%s:pmic_usb_id interrupt registration failed",
1121 __func__);
1122 return ret;
1123 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301124 msm_otg_pdata.pmic_id_irq = PMICID_INT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001125 } else {
Anji jonnalaae745e92011-11-14 18:34:31 +05301126 usb_phy_susp_dig_vol = 750000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001127 free_irq(PMICID_INT, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301128 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1129 &pmic_id_uncfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301130 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301131 pr_err("%s: return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301132 __func__, ret);
1133 return ret;
1134 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301135 msm_otg_pdata.pmic_id_irq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001136 cancel_delayed_work_sync(&pmic_id_det);
1137 notify_vbus_state_func_ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001138 }
1139 return 0;
1140}
1141#endif
1142
1143#define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000
1144#define USB_PHY_MAX_VDD_DIG_VOL 1320000
1145static int msm_hsusb_init_vddcx(int init)
1146{
1147 int ret = 0;
1148
1149 if (init) {
1150 vdd_cx = regulator_get(NULL, "8058_s1");
1151 if (IS_ERR(vdd_cx)) {
1152 return PTR_ERR(vdd_cx);
1153 }
1154
1155 ret = regulator_set_voltage(vdd_cx,
1156 USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL,
1157 USB_PHY_MAX_VDD_DIG_VOL);
1158 if (ret) {
1159 pr_err("%s: unable to set the voltage for regulator"
1160 "vdd_cx\n", __func__);
1161 regulator_put(vdd_cx);
1162 return ret;
1163 }
1164
1165 ret = regulator_enable(vdd_cx);
1166 if (ret) {
1167 pr_err("%s: unable to enable regulator"
1168 "vdd_cx\n", __func__);
1169 regulator_put(vdd_cx);
1170 }
1171 } else {
1172 ret = regulator_disable(vdd_cx);
1173 if (ret) {
1174 pr_err("%s: Unable to disable the regulator:"
1175 "vdd_cx\n", __func__);
1176 return ret;
1177 }
1178
1179 regulator_put(vdd_cx);
1180 }
1181
1182 return ret;
1183}
1184
1185static int msm_hsusb_config_vddcx(int high)
1186{
1187 int max_vol = USB_PHY_MAX_VDD_DIG_VOL;
1188 int min_vol;
1189 int ret;
1190
1191 if (high)
1192 min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL;
1193 else
1194 min_vol = usb_phy_susp_dig_vol;
1195
1196 ret = regulator_set_voltage(vdd_cx, min_vol, max_vol);
1197 if (ret) {
1198 pr_err("%s: unable to set the voltage for regulator"
1199 "vdd_cx\n", __func__);
1200 return ret;
1201 }
1202
1203 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
1204
1205 return ret;
1206}
1207
1208#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
1209#define USB_PHY_3P3_VOL_MAX 3050000 /* uV */
1210#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
1211#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
1212
1213#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
1214#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
1215#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
1216#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
1217static int msm_hsusb_ldo_init(int init)
1218{
1219 int rc = 0;
1220
1221 if (init) {
1222 ldo6_3p3 = regulator_get(NULL, "8058_l6");
1223 if (IS_ERR(ldo6_3p3))
1224 return PTR_ERR(ldo6_3p3);
1225
1226 ldo7_1p8 = regulator_get(NULL, "8058_l7");
1227 if (IS_ERR(ldo7_1p8)) {
1228 rc = PTR_ERR(ldo7_1p8);
1229 goto put_3p3;
1230 }
1231
1232 rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN,
1233 USB_PHY_3P3_VOL_MAX);
1234 if (rc) {
1235 pr_err("%s: Unable to set voltage level for"
1236 "ldo6_3p3 regulator\n", __func__);
1237 goto put_1p8;
1238 }
1239 rc = regulator_enable(ldo6_3p3);
1240 if (rc) {
1241 pr_err("%s: Unable to enable the regulator:"
1242 "ldo6_3p3\n", __func__);
1243 goto put_1p8;
1244 }
1245 rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN,
1246 USB_PHY_1P8_VOL_MAX);
1247 if (rc) {
1248 pr_err("%s: Unable to set voltage level for"
1249 "ldo7_1p8 regulator\n", __func__);
1250 goto disable_3p3;
1251 }
1252 rc = regulator_enable(ldo7_1p8);
1253 if (rc) {
1254 pr_err("%s: Unable to enable the regulator:"
1255 "ldo7_1p8\n", __func__);
1256 goto disable_3p3;
1257 }
1258
1259 return 0;
1260 }
1261
1262 regulator_disable(ldo7_1p8);
1263disable_3p3:
1264 regulator_disable(ldo6_3p3);
1265put_1p8:
1266 regulator_put(ldo7_1p8);
1267put_3p3:
1268 regulator_put(ldo6_3p3);
1269 return rc;
1270}
1271
1272static int msm_hsusb_ldo_enable(int on)
1273{
1274 int ret = 0;
1275
1276 if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) {
1277 pr_err("%s: ldo7_1p8 is not initialized\n", __func__);
1278 return -ENODEV;
1279 }
1280
1281 if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) {
1282 pr_err("%s: ldo6_3p3 is not initialized\n", __func__);
1283 return -ENODEV;
1284 }
1285
1286 if (on) {
1287 ret = regulator_set_optimum_mode(ldo7_1p8,
1288 USB_PHY_1P8_HPM_LOAD);
1289 if (ret < 0) {
1290 pr_err("%s: Unable to set HPM of the regulator:"
1291 "ldo7_1p8\n", __func__);
1292 return ret;
1293 }
1294 ret = regulator_set_optimum_mode(ldo6_3p3,
1295 USB_PHY_3P3_HPM_LOAD);
1296 if (ret < 0) {
1297 pr_err("%s: Unable to set HPM of the regulator:"
1298 "ldo6_3p3\n", __func__);
1299 regulator_set_optimum_mode(ldo7_1p8,
1300 USB_PHY_1P8_LPM_LOAD);
1301 return ret;
1302 }
1303 } else {
1304 ret = regulator_set_optimum_mode(ldo7_1p8,
1305 USB_PHY_1P8_LPM_LOAD);
1306 if (ret < 0)
1307 pr_err("%s: Unable to set LPM of the regulator:"
1308 "ldo7_1p8\n", __func__);
1309 ret = regulator_set_optimum_mode(ldo6_3p3,
1310 USB_PHY_3P3_LPM_LOAD);
1311 if (ret < 0)
1312 pr_err("%s: Unable to set LPM of the regulator:"
1313 "ldo6_3p3\n", __func__);
1314 }
1315
1316 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
1317 return ret < 0 ? ret : 0;
1318 }
1319#endif
1320#ifdef CONFIG_USB_EHCI_MSM_72K
1321#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1322static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on)
1323{
1324 static int vbus_is_on;
1325
1326 /* If VBUS is already on (or off), do nothing. */
1327 if (on == vbus_is_on)
1328 return;
1329 smb137b_otg_power(on);
1330 vbus_is_on = on;
1331}
1332#endif
1333static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1334{
1335 static struct regulator *votg_5v_switch;
1336 static struct regulator *ext_5v_reg;
1337 static int vbus_is_on;
1338
1339 /* If VBUS is already on (or off), do nothing. */
1340 if (on == vbus_is_on)
1341 return;
1342
1343 if (!votg_5v_switch) {
1344 votg_5v_switch = regulator_get(NULL, "8901_usb_otg");
1345 if (IS_ERR(votg_5v_switch)) {
1346 pr_err("%s: unable to get votg_5v_switch\n", __func__);
1347 return;
1348 }
1349 }
1350 if (!ext_5v_reg) {
1351 ext_5v_reg = regulator_get(NULL, "8901_mpp0");
1352 if (IS_ERR(ext_5v_reg)) {
1353 pr_err("%s: unable to get ext_5v_reg\n", __func__);
1354 return;
1355 }
1356 }
1357 if (on) {
1358 if (regulator_enable(ext_5v_reg)) {
1359 pr_err("%s: Unable to enable the regulator:"
1360 " ext_5v_reg\n", __func__);
1361 return;
1362 }
1363 if (regulator_enable(votg_5v_switch)) {
1364 pr_err("%s: Unable to enable the regulator:"
1365 " votg_5v_switch\n", __func__);
1366 return;
1367 }
1368 } else {
1369 if (regulator_disable(votg_5v_switch))
1370 pr_err("%s: Unable to enable the regulator:"
1371 " votg_5v_switch\n", __func__);
1372 if (regulator_disable(ext_5v_reg))
1373 pr_err("%s: Unable to enable the regulator:"
1374 " ext_5v_reg\n", __func__);
1375 }
1376
1377 vbus_is_on = on;
1378}
1379
1380static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1381 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1382 .power_budget = 390,
1383};
1384#endif
1385
1386#ifdef CONFIG_BATTERY_MSM8X60
1387static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online),
1388 int init)
1389{
1390 int ret = -ENOTSUPP;
1391
1392#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1393 if (machine_is_msm8x60_fluid()) {
1394 if (init)
1395 msm_charger_register_vbus_sn(callback);
1396 else
1397 msm_charger_unregister_vbus_sn(callback);
1398 return 0;
1399 }
1400#endif
1401 /* ID and VBUS lines are connected to pmic on 8660.V2.SURF,
1402 * hence, irrespective of either peripheral only mode or
1403 * OTG (host and peripheral) modes, can depend on pmic for
1404 * vbus notifications
Steve Muckle9161d302010-02-11 11:50:40 -08001405 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001406 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
1407 && (machine_is_msm8x60_surf() ||
1408 pmic_id_notif_supported)) {
1409 if (init)
1410 ret = msm_charger_register_vbus_sn(callback);
1411 else {
1412 msm_charger_unregister_vbus_sn(callback);
1413 ret = 0;
1414 }
1415 } else {
1416#if !defined(CONFIG_USB_EHCI_MSM_72K)
1417 if (init)
1418 ret = msm_charger_register_vbus_sn(callback);
1419 else {
1420 msm_charger_unregister_vbus_sn(callback);
1421 ret = 0;
1422 }
1423#endif
1424 }
1425 return ret;
1426}
1427#endif
1428
1429#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
1430static struct msm_otg_platform_data msm_otg_pdata = {
1431 /* if usb link is in sps there is no need for
1432 * usb pclk as dayatona fabric clock will be
1433 * used instead
1434 */
1435 .pclk_src_name = "dfab_usb_hs_clk",
1436 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1437 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1438 .se1_gating = SE1_GATING_DISABLE,
Chandra Devireddyb3fc78c2011-08-30 17:25:55 +05301439 .bam_disable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001440#ifdef CONFIG_USB_EHCI_MSM_72K
1441 .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init,
Anji jonnalaae745e92011-11-14 18:34:31 +05301442 .phy_id_setup_init = msm_hsusb_phy_id_setup_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001443#endif
1444#ifdef CONFIG_USB_EHCI_MSM_72K
1445 .vbus_power = msm_hsusb_vbus_power,
1446#endif
1447#ifdef CONFIG_BATTERY_MSM8X60
1448 .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init,
1449#endif
1450 .ldo_init = msm_hsusb_ldo_init,
1451 .ldo_enable = msm_hsusb_ldo_enable,
1452 .config_vddcx = msm_hsusb_config_vddcx,
1453 .init_vddcx = msm_hsusb_init_vddcx,
1454#ifdef CONFIG_BATTERY_MSM8X60
1455 .chg_vbus_draw = msm_charger_vbus_draw,
1456#endif
1457};
1458#endif
1459
1460#ifdef CONFIG_USB_GADGET_MSM_72K
1461static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1462 .is_phy_status_timer_on = 1,
1463};
1464#endif
1465
1466#ifdef CONFIG_USB_G_ANDROID
1467
1468#define PID_MAGIC_ID 0x71432909
1469#define SERIAL_NUM_MAGIC_ID 0x61945374
1470#define SERIAL_NUMBER_LENGTH 127
1471#define DLOAD_USB_BASE_ADD 0x2A05F0C8
1472
1473struct magic_num_struct {
1474 uint32_t pid;
1475 uint32_t serial_num;
1476};
1477
1478struct dload_struct {
1479 uint32_t reserved1;
1480 uint32_t reserved2;
1481 uint32_t reserved3;
1482 uint16_t reserved4;
1483 uint16_t pid;
1484 char serial_number[SERIAL_NUMBER_LENGTH];
1485 uint16_t reserved5;
1486 struct magic_num_struct
1487 magic_struct;
1488};
1489
1490static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1491{
1492 struct dload_struct __iomem *dload = 0;
1493
1494 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1495 if (!dload) {
1496 pr_err("%s: cannot remap I/O memory region: %08x\n",
1497 __func__, DLOAD_USB_BASE_ADD);
1498 return -ENXIO;
1499 }
1500
1501 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1502 __func__, dload, pid, snum);
1503 /* update pid */
1504 dload->magic_struct.pid = PID_MAGIC_ID;
1505 dload->pid = pid;
1506
1507 /* update serial number */
1508 dload->magic_struct.serial_num = 0;
1509 if (!snum)
1510 return 0;
1511
1512 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1513 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1514 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
1515
1516 iounmap(dload);
1517
1518 return 0;
1519}
1520
1521static struct android_usb_platform_data android_usb_pdata = {
1522 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1523};
1524
1525static struct platform_device android_usb_device = {
1526 .name = "android_usb",
1527 .id = -1,
1528 .dev = {
1529 .platform_data = &android_usb_pdata,
1530 },
1531};
1532
1533
1534#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08001535
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001536#ifdef CONFIG_MSM_VPE
1537static struct resource msm_vpe_resources[] = {
1538 {
1539 .start = 0x05300000,
1540 .end = 0x05300000 + SZ_1M - 1,
1541 .flags = IORESOURCE_MEM,
1542 },
1543 {
1544 .start = INT_VPE,
1545 .end = INT_VPE,
1546 .flags = IORESOURCE_IRQ,
1547 },
1548};
1549
1550static struct platform_device msm_vpe_device = {
1551 .name = "msm_vpe",
1552 .id = 0,
1553 .num_resources = ARRAY_SIZE(msm_vpe_resources),
1554 .resource = msm_vpe_resources,
1555};
1556#endif
1557
1558#ifdef CONFIG_MSM_CAMERA
1559#ifdef CONFIG_MSM_CAMERA_FLASH
1560#define VFE_CAMIF_TIMER1_GPIO 29
1561#define VFE_CAMIF_TIMER2_GPIO 30
1562#define VFE_CAMIF_TIMER3_GPIO_INT 31
1563#define FUSION_VFE_CAMIF_TIMER1_GPIO 42
1564static struct msm_camera_sensor_flash_src msm_flash_src = {
1565 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1566 ._fsrc.pmic_src.num_of_src = 2,
1567 ._fsrc.pmic_src.low_current = 100,
1568 ._fsrc.pmic_src.high_current = 300,
1569 ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0,
1570 ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1,
1571 ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current,
1572};
1573#ifdef CONFIG_IMX074
1574static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
1575 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
1576 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
1577 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
1578 .flash_recharge_duration = 50000,
1579 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
1580};
1581#endif
1582#endif
1583
1584int msm_cam_gpio_tbl[] = {
1585 32,/*CAMIF_MCLK*/
1586 47,/*CAMIF_I2C_DATA*/
1587 48,/*CAMIF_I2C_CLK*/
1588 105,/*STANDBY*/
1589};
1590
1591enum msm_cam_stat{
1592 MSM_CAM_OFF,
1593 MSM_CAM_ON,
1594};
1595
1596static int config_gpio_table(enum msm_cam_stat stat)
1597{
1598 int rc = 0, i = 0;
1599 if (stat == MSM_CAM_ON) {
1600 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
1601 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
1602 if (unlikely(rc < 0)) {
1603 pr_err("%s not able to get gpio\n", __func__);
1604 for (i--; i >= 0; i--)
1605 gpio_free(msm_cam_gpio_tbl[i]);
1606 break;
1607 }
1608 }
1609 } else {
1610 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
1611 gpio_free(msm_cam_gpio_tbl[i]);
1612 }
1613 return rc;
1614}
1615
1616static struct msm_camera_sensor_platform_info sensor_board_info = {
1617 .mount_angle = 0
1618};
1619
1620/*external regulator VREG_5V*/
1621static struct regulator *reg_flash_5V;
1622
1623static int config_camera_on_gpios_fluid(void)
1624{
1625 int rc = 0;
1626
1627 reg_flash_5V = regulator_get(NULL, "8901_mpp0");
1628 if (IS_ERR(reg_flash_5V)) {
1629 pr_err("'%s' regulator not found, rc=%ld\n",
1630 "8901_mpp0", IS_ERR(reg_flash_5V));
1631 return -ENODEV;
1632 }
1633
1634 rc = regulator_enable(reg_flash_5V);
1635 if (rc) {
1636 pr_err("'%s' regulator enable failed, rc=%d\n",
1637 "8901_mpp0", rc);
1638 regulator_put(reg_flash_5V);
1639 return rc;
1640 }
1641
1642#ifdef CONFIG_IMX074
1643 sensor_board_info.mount_angle = 90;
1644#endif
1645 rc = config_gpio_table(MSM_CAM_ON);
1646 if (rc < 0) {
1647 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1648 "failed\n", __func__);
1649 return rc;
1650 }
1651
1652 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1653 if (rc < 0) {
1654 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1655 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1656 regulator_disable(reg_flash_5V);
1657 regulator_put(reg_flash_5V);
1658 return rc;
1659 }
1660 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1661 msleep(20);
1662 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
1663
1664
1665 /*Enable LED_FLASH_EN*/
1666 rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN");
1667 if (rc < 0) {
1668 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1669 "failed\n", __func__, GPIO_LED_FLASH_EN);
1670
1671 regulator_disable(reg_flash_5V);
1672 regulator_put(reg_flash_5V);
1673 config_gpio_table(MSM_CAM_OFF);
1674 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1675 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1676 return rc;
1677 }
1678 gpio_direction_output(GPIO_LED_FLASH_EN, 1);
1679 msleep(20);
1680 return rc;
1681}
1682
1683
1684static void config_camera_off_gpios_fluid(void)
1685{
1686 regulator_disable(reg_flash_5V);
1687 regulator_put(reg_flash_5V);
1688
1689 gpio_direction_output(GPIO_LED_FLASH_EN, 0);
1690 gpio_free(GPIO_LED_FLASH_EN);
1691
1692 config_gpio_table(MSM_CAM_OFF);
1693
1694 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1695 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1696}
1697static int config_camera_on_gpios(void)
1698{
1699 int rc = 0;
1700
1701 if (machine_is_msm8x60_fluid())
1702 return config_camera_on_gpios_fluid();
1703
1704 rc = config_gpio_table(MSM_CAM_ON);
1705 if (rc < 0) {
1706 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1707 "failed\n", __func__);
1708 return rc;
1709 }
1710
Jilai Wang971f97f2011-07-13 14:25:25 -04001711 if (!machine_is_msm8x60_dragon()) {
1712 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1713 if (rc < 0) {
1714 config_gpio_table(MSM_CAM_OFF);
1715 pr_err("%s: CAMSENSOR gpio %d request"
1716 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1717 return rc;
1718 }
1719 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1720 msleep(20);
1721 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001722 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001723
1724#ifdef CONFIG_MSM_CAMERA_FLASH
1725#ifdef CONFIG_IMX074
1726 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
1727 strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO;
1728#endif
1729#endif
1730 return rc;
1731}
1732
1733static void config_camera_off_gpios(void)
1734{
1735 if (machine_is_msm8x60_fluid())
1736 return config_camera_off_gpios_fluid();
1737
1738
1739 config_gpio_table(MSM_CAM_OFF);
1740
Jilai Wang971f97f2011-07-13 14:25:25 -04001741 if (!machine_is_msm8x60_dragon()) {
1742 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1743 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1744 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001745}
1746
1747#ifdef CONFIG_QS_S5K4E1
1748
1749#define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26)
1750
1751static int config_camera_on_gpios_qs_cam_fluid(void)
1752{
1753 int rc = 0;
1754
1755 /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */
1756 rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD");
1757 if (rc < 0) {
1758 printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request"
1759 " failed\n", __func__, QS_CAM_HC37_CAM_PD);
1760 return rc;
1761 }
1762 gpio_direction_output(QS_CAM_HC37_CAM_PD, 0);
1763 msleep(20);
1764 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1);
1765 msleep(20);
1766
1767 /*
1768 * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2
1769 * to enable 2.7V power to Camera
1770 */
1771 rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN");
1772 if (rc < 0) {
1773 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1774 " failed\n", __func__, GPIO_AUX_CAM_2P7_EN);
1775 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1776 gpio_free(QS_CAM_HC37_CAM_PD);
1777 return rc;
1778 }
1779 gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0);
1780 msleep(20);
1781 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1);
1782 msleep(20);
1783
1784 rc = config_camera_on_gpios_fluid();
1785 if (rc < 0) {
1786 printk(KERN_ERR "%s: config_camera_on_gpios_fluid"
1787 " failed\n", __func__);
1788 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1789 gpio_free(QS_CAM_HC37_CAM_PD);
1790 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1791 gpio_free(GPIO_AUX_CAM_2P7_EN);
1792 return rc;
1793 }
1794 return rc;
1795}
1796
1797static void config_camera_off_gpios_qs_cam_fluid(void)
1798{
1799 /*
1800 * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2
1801 * to disable 2.7V power to Camera
1802 */
1803 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1804 gpio_free(GPIO_AUX_CAM_2P7_EN);
1805
1806 /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/
1807 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1808 gpio_free(QS_CAM_HC37_CAM_PD);
1809
1810 config_camera_off_gpios_fluid();
1811 return;
1812}
1813
1814static int config_camera_on_gpios_qs_cam(void)
1815{
1816 int rc = 0;
1817
1818 if (machine_is_msm8x60_fluid())
1819 return config_camera_on_gpios_qs_cam_fluid();
1820
1821 rc = config_camera_on_gpios();
1822 return rc;
1823}
1824
1825static void config_camera_off_gpios_qs_cam(void)
1826{
1827 if (machine_is_msm8x60_fluid())
1828 return config_camera_off_gpios_qs_cam_fluid();
1829
1830 config_camera_off_gpios();
1831 return;
1832}
1833#endif
1834
1835static int config_camera_on_gpios_web_cam(void)
1836{
1837 int rc = 0;
1838 rc = config_gpio_table(MSM_CAM_ON);
1839 if (rc < 0) {
1840 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1841 "failed\n", __func__);
1842 return rc;
1843 }
1844
Jilai Wang53d27a82011-07-13 14:32:58 -04001845 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001846 rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN");
1847 if (rc < 0) {
1848 config_gpio_table(MSM_CAM_OFF);
1849 pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request"
1850 "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY);
1851 return rc;
1852 }
1853 gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0);
1854 }
1855 return rc;
1856}
1857
1858static void config_camera_off_gpios_web_cam(void)
1859{
1860 config_gpio_table(MSM_CAM_OFF);
Jilai Wang53d27a82011-07-13 14:32:58 -04001861 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001862 gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1);
1863 gpio_free(GPIO_WEB_CAMIF_STANDBY);
1864 }
1865 return;
1866}
1867
1868#ifdef CONFIG_MSM_BUS_SCALING
1869static struct msm_bus_vectors cam_init_vectors[] = {
1870 {
1871 .src = MSM_BUS_MASTER_VFE,
1872 .dst = MSM_BUS_SLAVE_SMI,
1873 .ab = 0,
1874 .ib = 0,
1875 },
1876 {
1877 .src = MSM_BUS_MASTER_VFE,
1878 .dst = MSM_BUS_SLAVE_EBI_CH0,
1879 .ab = 0,
1880 .ib = 0,
1881 },
1882 {
1883 .src = MSM_BUS_MASTER_VPE,
1884 .dst = MSM_BUS_SLAVE_SMI,
1885 .ab = 0,
1886 .ib = 0,
1887 },
1888 {
1889 .src = MSM_BUS_MASTER_VPE,
1890 .dst = MSM_BUS_SLAVE_EBI_CH0,
1891 .ab = 0,
1892 .ib = 0,
1893 },
1894 {
1895 .src = MSM_BUS_MASTER_JPEG_ENC,
1896 .dst = MSM_BUS_SLAVE_SMI,
1897 .ab = 0,
1898 .ib = 0,
1899 },
1900 {
1901 .src = MSM_BUS_MASTER_JPEG_ENC,
1902 .dst = MSM_BUS_SLAVE_EBI_CH0,
1903 .ab = 0,
1904 .ib = 0,
1905 },
1906};
1907
1908static struct msm_bus_vectors cam_preview_vectors[] = {
1909 {
1910 .src = MSM_BUS_MASTER_VFE,
1911 .dst = MSM_BUS_SLAVE_SMI,
1912 .ab = 0,
1913 .ib = 0,
1914 },
1915 {
1916 .src = MSM_BUS_MASTER_VFE,
1917 .dst = MSM_BUS_SLAVE_EBI_CH0,
1918 .ab = 283115520,
1919 .ib = 452984832,
1920 },
1921 {
1922 .src = MSM_BUS_MASTER_VPE,
1923 .dst = MSM_BUS_SLAVE_SMI,
1924 .ab = 0,
1925 .ib = 0,
1926 },
1927 {
1928 .src = MSM_BUS_MASTER_VPE,
1929 .dst = MSM_BUS_SLAVE_EBI_CH0,
1930 .ab = 0,
1931 .ib = 0,
1932 },
1933 {
1934 .src = MSM_BUS_MASTER_JPEG_ENC,
1935 .dst = MSM_BUS_SLAVE_SMI,
1936 .ab = 0,
1937 .ib = 0,
1938 },
1939 {
1940 .src = MSM_BUS_MASTER_JPEG_ENC,
1941 .dst = MSM_BUS_SLAVE_EBI_CH0,
1942 .ab = 0,
1943 .ib = 0,
1944 },
1945};
1946
1947static struct msm_bus_vectors cam_video_vectors[] = {
1948 {
1949 .src = MSM_BUS_MASTER_VFE,
1950 .dst = MSM_BUS_SLAVE_SMI,
1951 .ab = 283115520,
1952 .ib = 452984832,
1953 },
1954 {
1955 .src = MSM_BUS_MASTER_VFE,
1956 .dst = MSM_BUS_SLAVE_EBI_CH0,
1957 .ab = 283115520,
1958 .ib = 452984832,
1959 },
1960 {
1961 .src = MSM_BUS_MASTER_VPE,
1962 .dst = MSM_BUS_SLAVE_SMI,
1963 .ab = 319610880,
1964 .ib = 511377408,
1965 },
1966 {
1967 .src = MSM_BUS_MASTER_VPE,
1968 .dst = MSM_BUS_SLAVE_EBI_CH0,
1969 .ab = 0,
1970 .ib = 0,
1971 },
1972 {
1973 .src = MSM_BUS_MASTER_JPEG_ENC,
1974 .dst = MSM_BUS_SLAVE_SMI,
1975 .ab = 0,
1976 .ib = 0,
1977 },
1978 {
1979 .src = MSM_BUS_MASTER_JPEG_ENC,
1980 .dst = MSM_BUS_SLAVE_EBI_CH0,
1981 .ab = 0,
1982 .ib = 0,
1983 },
1984};
1985
1986static struct msm_bus_vectors cam_snapshot_vectors[] = {
1987 {
1988 .src = MSM_BUS_MASTER_VFE,
1989 .dst = MSM_BUS_SLAVE_SMI,
1990 .ab = 566231040,
1991 .ib = 905969664,
1992 },
1993 {
1994 .src = MSM_BUS_MASTER_VFE,
1995 .dst = MSM_BUS_SLAVE_EBI_CH0,
1996 .ab = 69984000,
1997 .ib = 111974400,
1998 },
1999 {
2000 .src = MSM_BUS_MASTER_VPE,
2001 .dst = MSM_BUS_SLAVE_SMI,
2002 .ab = 0,
2003 .ib = 0,
2004 },
2005 {
2006 .src = MSM_BUS_MASTER_VPE,
2007 .dst = MSM_BUS_SLAVE_EBI_CH0,
2008 .ab = 0,
2009 .ib = 0,
2010 },
2011 {
2012 .src = MSM_BUS_MASTER_JPEG_ENC,
2013 .dst = MSM_BUS_SLAVE_SMI,
2014 .ab = 320864256,
2015 .ib = 513382810,
2016 },
2017 {
2018 .src = MSM_BUS_MASTER_JPEG_ENC,
2019 .dst = MSM_BUS_SLAVE_EBI_CH0,
2020 .ab = 320864256,
2021 .ib = 513382810,
2022 },
2023};
2024
2025static struct msm_bus_vectors cam_zsl_vectors[] = {
2026 {
2027 .src = MSM_BUS_MASTER_VFE,
2028 .dst = MSM_BUS_SLAVE_SMI,
2029 .ab = 566231040,
2030 .ib = 905969664,
2031 },
2032 {
2033 .src = MSM_BUS_MASTER_VFE,
2034 .dst = MSM_BUS_SLAVE_EBI_CH0,
2035 .ab = 706199040,
2036 .ib = 1129918464,
2037 },
2038 {
2039 .src = MSM_BUS_MASTER_VPE,
2040 .dst = MSM_BUS_SLAVE_SMI,
2041 .ab = 0,
2042 .ib = 0,
2043 },
2044 {
2045 .src = MSM_BUS_MASTER_VPE,
2046 .dst = MSM_BUS_SLAVE_EBI_CH0,
2047 .ab = 0,
2048 .ib = 0,
2049 },
2050 {
2051 .src = MSM_BUS_MASTER_JPEG_ENC,
2052 .dst = MSM_BUS_SLAVE_SMI,
2053 .ab = 320864256,
2054 .ib = 513382810,
2055 },
2056 {
2057 .src = MSM_BUS_MASTER_JPEG_ENC,
2058 .dst = MSM_BUS_SLAVE_EBI_CH0,
2059 .ab = 320864256,
2060 .ib = 513382810,
2061 },
2062};
2063
2064static struct msm_bus_vectors cam_stereo_video_vectors[] = {
2065 {
2066 .src = MSM_BUS_MASTER_VFE,
2067 .dst = MSM_BUS_SLAVE_SMI,
2068 .ab = 212336640,
2069 .ib = 339738624,
2070 },
2071 {
2072 .src = MSM_BUS_MASTER_VFE,
2073 .dst = MSM_BUS_SLAVE_EBI_CH0,
2074 .ab = 25090560,
2075 .ib = 40144896,
2076 },
2077 {
2078 .src = MSM_BUS_MASTER_VPE,
2079 .dst = MSM_BUS_SLAVE_SMI,
2080 .ab = 239708160,
2081 .ib = 383533056,
2082 },
2083 {
2084 .src = MSM_BUS_MASTER_VPE,
2085 .dst = MSM_BUS_SLAVE_EBI_CH0,
2086 .ab = 79902720,
2087 .ib = 127844352,
2088 },
2089 {
2090 .src = MSM_BUS_MASTER_JPEG_ENC,
2091 .dst = MSM_BUS_SLAVE_SMI,
2092 .ab = 0,
2093 .ib = 0,
2094 },
2095 {
2096 .src = MSM_BUS_MASTER_JPEG_ENC,
2097 .dst = MSM_BUS_SLAVE_EBI_CH0,
2098 .ab = 0,
2099 .ib = 0,
2100 },
2101};
2102
2103static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = {
2104 {
2105 .src = MSM_BUS_MASTER_VFE,
2106 .dst = MSM_BUS_SLAVE_SMI,
2107 .ab = 0,
2108 .ib = 0,
2109 },
2110 {
2111 .src = MSM_BUS_MASTER_VFE,
2112 .dst = MSM_BUS_SLAVE_EBI_CH0,
2113 .ab = 300902400,
2114 .ib = 481443840,
2115 },
2116 {
2117 .src = MSM_BUS_MASTER_VPE,
2118 .dst = MSM_BUS_SLAVE_SMI,
2119 .ab = 230307840,
2120 .ib = 368492544,
2121 },
2122 {
2123 .src = MSM_BUS_MASTER_VPE,
2124 .dst = MSM_BUS_SLAVE_EBI_CH0,
2125 .ab = 245113344,
2126 .ib = 392181351,
2127 },
2128 {
2129 .src = MSM_BUS_MASTER_JPEG_ENC,
2130 .dst = MSM_BUS_SLAVE_SMI,
2131 .ab = 106536960,
2132 .ib = 170459136,
2133 },
2134 {
2135 .src = MSM_BUS_MASTER_JPEG_ENC,
2136 .dst = MSM_BUS_SLAVE_EBI_CH0,
2137 .ab = 106536960,
2138 .ib = 170459136,
2139 },
2140};
2141
2142static struct msm_bus_paths cam_bus_client_config[] = {
2143 {
2144 ARRAY_SIZE(cam_init_vectors),
2145 cam_init_vectors,
2146 },
2147 {
2148 ARRAY_SIZE(cam_preview_vectors),
2149 cam_preview_vectors,
2150 },
2151 {
2152 ARRAY_SIZE(cam_video_vectors),
2153 cam_video_vectors,
2154 },
2155 {
2156 ARRAY_SIZE(cam_snapshot_vectors),
2157 cam_snapshot_vectors,
2158 },
2159 {
2160 ARRAY_SIZE(cam_zsl_vectors),
2161 cam_zsl_vectors,
2162 },
2163 {
2164 ARRAY_SIZE(cam_stereo_video_vectors),
2165 cam_stereo_video_vectors,
2166 },
2167 {
2168 ARRAY_SIZE(cam_stereo_snapshot_vectors),
2169 cam_stereo_snapshot_vectors,
2170 },
2171};
2172
2173static struct msm_bus_scale_pdata cam_bus_client_pdata = {
2174 cam_bus_client_config,
2175 ARRAY_SIZE(cam_bus_client_config),
2176 .name = "msm_camera",
2177};
2178#endif
2179
2180struct msm_camera_device_platform_data msm_camera_device_data = {
2181 .camera_gpio_on = config_camera_on_gpios,
2182 .camera_gpio_off = config_camera_off_gpios,
2183 .ioext.csiphy = 0x04800000,
2184 .ioext.csisz = 0x00000400,
2185 .ioext.csiirq = CSI_0_IRQ,
2186 .ioclk.mclk_clk_rate = 24000000,
2187 .ioclk.vfe_clk_rate = 228570000,
2188#ifdef CONFIG_MSM_BUS_SCALING
2189 .cam_bus_scale_table = &cam_bus_client_pdata,
2190#endif
2191};
2192
2193#ifdef CONFIG_QS_S5K4E1
2194struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = {
2195 .camera_gpio_on = config_camera_on_gpios_qs_cam,
2196 .camera_gpio_off = config_camera_off_gpios_qs_cam,
2197 .ioext.csiphy = 0x04800000,
2198 .ioext.csisz = 0x00000400,
2199 .ioext.csiirq = CSI_0_IRQ,
2200 .ioclk.mclk_clk_rate = 24000000,
2201 .ioclk.vfe_clk_rate = 228570000,
2202#ifdef CONFIG_MSM_BUS_SCALING
2203 .cam_bus_scale_table = &cam_bus_client_pdata,
2204#endif
2205};
2206#endif
2207
2208struct msm_camera_device_platform_data msm_camera_device_data_web_cam = {
2209 .camera_gpio_on = config_camera_on_gpios_web_cam,
2210 .camera_gpio_off = config_camera_off_gpios_web_cam,
2211 .ioext.csiphy = 0x04900000,
2212 .ioext.csisz = 0x00000400,
2213 .ioext.csiirq = CSI_1_IRQ,
2214 .ioclk.mclk_clk_rate = 24000000,
2215 .ioclk.vfe_clk_rate = 228570000,
2216#ifdef CONFIG_MSM_BUS_SCALING
2217 .cam_bus_scale_table = &cam_bus_client_pdata,
2218#endif
2219};
2220
2221struct resource msm_camera_resources[] = {
2222 {
2223 .start = 0x04500000,
2224 .end = 0x04500000 + SZ_1M - 1,
2225 .flags = IORESOURCE_MEM,
2226 },
2227 {
2228 .start = VFE_IRQ,
2229 .end = VFE_IRQ,
2230 .flags = IORESOURCE_IRQ,
2231 },
2232};
2233#ifdef CONFIG_MT9E013
2234static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = {
2235 .mount_angle = 0
2236};
2237
2238static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2239 .flash_type = MSM_CAMERA_FLASH_LED,
2240 .flash_src = &msm_flash_src
2241};
2242
2243static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2244 .sensor_name = "mt9e013",
2245 .sensor_reset = 106,
2246 .sensor_pwd = 85,
2247 .vcm_pwd = 1,
2248 .vcm_enable = 0,
2249 .pdata = &msm_camera_device_data,
2250 .resource = msm_camera_resources,
2251 .num_resources = ARRAY_SIZE(msm_camera_resources),
2252 .flash_data = &flash_mt9e013,
2253 .strobe_flash_data = &strobe_flash_xenon,
2254 .sensor_platform_info = &mt9e013_sensor_8660_info,
2255 .csi_if = 1
2256};
2257struct platform_device msm_camera_sensor_mt9e013 = {
2258 .name = "msm_camera_mt9e013",
2259 .dev = {
2260 .platform_data = &msm_camera_sensor_mt9e013_data,
2261 },
2262};
2263#endif
2264
2265#ifdef CONFIG_IMX074
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302266static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
2267 .mount_angle = 180
2268};
2269
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002270static struct msm_camera_sensor_flash_data flash_imx074 = {
2271 .flash_type = MSM_CAMERA_FLASH_LED,
2272 .flash_src = &msm_flash_src
2273};
2274
2275static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
2276 .sensor_name = "imx074",
2277 .sensor_reset = 106,
2278 .sensor_pwd = 85,
2279 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2280 .vcm_enable = 1,
2281 .pdata = &msm_camera_device_data,
2282 .resource = msm_camera_resources,
2283 .num_resources = ARRAY_SIZE(msm_camera_resources),
2284 .flash_data = &flash_imx074,
2285 .strobe_flash_data = &strobe_flash_xenon,
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302286 .sensor_platform_info = &imx074_sensor_board_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002287 .csi_if = 1
2288};
2289struct platform_device msm_camera_sensor_imx074 = {
2290 .name = "msm_camera_imx074",
2291 .dev = {
2292 .platform_data = &msm_camera_sensor_imx074_data,
2293 },
2294};
2295#endif
2296#ifdef CONFIG_WEBCAM_OV9726
2297
2298static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = {
2299 .mount_angle = 0
2300};
2301
2302static struct msm_camera_sensor_flash_data flash_ov9726 = {
2303 .flash_type = MSM_CAMERA_FLASH_LED,
2304 .flash_src = &msm_flash_src
2305};
2306static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2307 .sensor_name = "ov9726",
Kevin Chan3382c512011-07-19 21:00:45 -07002308 .sensor_reset_enable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002309 .sensor_reset = GPIO_FRONT_CAM_RESET_N,
2310 .sensor_pwd = 85,
2311 .vcm_pwd = 1,
2312 .vcm_enable = 0,
2313 .pdata = &msm_camera_device_data_web_cam,
2314 .resource = msm_camera_resources,
2315 .num_resources = ARRAY_SIZE(msm_camera_resources),
2316 .flash_data = &flash_ov9726,
2317 .sensor_platform_info = &ov9726_sensor_8660_info,
2318 .csi_if = 1
2319};
2320struct platform_device msm_camera_sensor_webcam_ov9726 = {
2321 .name = "msm_camera_ov9726",
2322 .dev = {
2323 .platform_data = &msm_camera_sensor_ov9726_data,
2324 },
2325};
2326#endif
2327#ifdef CONFIG_WEBCAM_OV7692
2328static struct msm_camera_sensor_flash_data flash_ov7692 = {
2329 .flash_type = MSM_CAMERA_FLASH_LED,
2330 .flash_src = &msm_flash_src
2331};
2332static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2333 .sensor_name = "ov7692",
2334 .sensor_reset = GPIO_WEB_CAMIF_RESET_N,
2335 .sensor_pwd = 85,
2336 .vcm_pwd = 1,
2337 .vcm_enable = 0,
2338 .pdata = &msm_camera_device_data_web_cam,
2339 .resource = msm_camera_resources,
2340 .num_resources = ARRAY_SIZE(msm_camera_resources),
2341 .flash_data = &flash_ov7692,
2342 .csi_if = 1
2343};
2344
2345static struct platform_device msm_camera_sensor_webcam_ov7692 = {
2346 .name = "msm_camera_ov7692",
2347 .dev = {
2348 .platform_data = &msm_camera_sensor_ov7692_data,
2349 },
2350};
2351#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002352#ifdef CONFIG_VX6953
2353static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = {
2354 .mount_angle = 270
2355};
2356
2357static struct msm_camera_sensor_flash_data flash_vx6953 = {
2358 .flash_type = MSM_CAMERA_FLASH_NONE,
2359 .flash_src = &msm_flash_src
2360};
2361
2362static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = {
2363 .sensor_name = "vx6953",
2364 .sensor_reset = 63,
2365 .sensor_pwd = 63,
2366 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2367 .vcm_enable = 1,
2368 .pdata = &msm_camera_device_data,
2369 .resource = msm_camera_resources,
2370 .num_resources = ARRAY_SIZE(msm_camera_resources),
2371 .flash_data = &flash_vx6953,
2372 .sensor_platform_info = &vx6953_sensor_8660_info,
2373 .csi_if = 1
2374};
2375struct platform_device msm_camera_sensor_vx6953 = {
2376 .name = "msm_camera_vx6953",
2377 .dev = {
2378 .platform_data = &msm_camera_sensor_vx6953_data,
2379 },
2380};
2381#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002382#ifdef CONFIG_QS_S5K4E1
2383
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302384static struct msm_camera_sensor_platform_info qs_s5k4e1_sensor_8660_info = {
2385#ifdef CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
2386 .mount_angle = 90
2387#else
2388 .mount_angle = 0
2389#endif
2390};
2391
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002392static char eeprom_data[864];
2393static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = {
2394 .flash_type = MSM_CAMERA_FLASH_LED,
2395 .flash_src = &msm_flash_src
2396};
2397
2398static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = {
2399 .sensor_name = "qs_s5k4e1",
2400 .sensor_reset = 106,
2401 .sensor_pwd = 85,
2402 .vcm_pwd = 1,
2403 .vcm_enable = 0,
2404 .pdata = &msm_camera_device_data_qs_cam,
2405 .resource = msm_camera_resources,
2406 .num_resources = ARRAY_SIZE(msm_camera_resources),
2407 .flash_data = &flash_qs_s5k4e1,
2408 .strobe_flash_data = &strobe_flash_xenon,
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302409 .sensor_platform_info = &qs_s5k4e1_sensor_8660_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002410 .csi_if = 1,
2411 .eeprom_data = eeprom_data,
2412};
2413struct platform_device msm_camera_sensor_qs_s5k4e1 = {
2414 .name = "msm_camera_qs_s5k4e1",
2415 .dev = {
2416 .platform_data = &msm_camera_sensor_qs_s5k4e1_data,
2417 },
2418};
2419#endif
2420static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2421 #ifdef CONFIG_MT9E013
2422 {
2423 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2424 },
2425 #endif
2426 #ifdef CONFIG_IMX074
2427 {
2428 I2C_BOARD_INFO("imx074", 0x1A),
2429 },
2430 #endif
2431 #ifdef CONFIG_WEBCAM_OV7692
2432 {
2433 I2C_BOARD_INFO("ov7692", 0x78),
2434 },
2435 #endif
2436 #ifdef CONFIG_WEBCAM_OV9726
2437 {
2438 I2C_BOARD_INFO("ov9726", 0x10),
2439 },
2440 #endif
2441 #ifdef CONFIG_QS_S5K4E1
2442 {
2443 I2C_BOARD_INFO("qs_s5k4e1", 0x20),
2444 },
2445 #endif
2446};
Jilai Wang971f97f2011-07-13 14:25:25 -04002447
2448static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = {
Jilai Wang53d27a82011-07-13 14:32:58 -04002449 #ifdef CONFIG_WEBCAM_OV9726
2450 {
2451 I2C_BOARD_INFO("ov9726", 0x10),
2452 },
2453 #endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002454 #ifdef CONFIG_VX6953
2455 {
2456 I2C_BOARD_INFO("vx6953", 0x20),
2457 },
2458 #endif
2459};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002460#endif
2461
2462#ifdef CONFIG_MSM_GEMINI
2463static struct resource msm_gemini_resources[] = {
2464 {
2465 .start = 0x04600000,
2466 .end = 0x04600000 + SZ_1M - 1,
2467 .flags = IORESOURCE_MEM,
2468 },
2469 {
2470 .start = INT_JPEG,
2471 .end = INT_JPEG,
2472 .flags = IORESOURCE_IRQ,
2473 },
2474};
2475
2476static struct platform_device msm_gemini_device = {
2477 .name = "msm_gemini",
2478 .resource = msm_gemini_resources,
2479 .num_resources = ARRAY_SIZE(msm_gemini_resources),
2480};
2481#endif
2482
2483#ifdef CONFIG_I2C_QUP
2484static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2485{
2486}
2487
2488static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = {
2489 .clk_freq = 384000,
2490 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002491 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2492};
2493
2494static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = {
2495 .clk_freq = 100000,
2496 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002497 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2498};
2499
2500static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = {
2501 .clk_freq = 100000,
2502 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002503 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2504};
2505
2506static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = {
2507 .clk_freq = 100000,
2508 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002509 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2510};
2511
2512static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = {
2513 .clk_freq = 100000,
2514 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002515 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2516};
2517
2518static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = {
2519 .clk_freq = 100000,
2520 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002521 .use_gsbi_shared_mode = 1,
2522 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2523};
2524#endif
2525
2526#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
2527static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = {
2528 .max_clock_speed = 24000000,
2529};
2530
2531static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = {
2532 .max_clock_speed = 24000000,
2533};
2534#endif
2535
2536#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002537/* CODEC/TSSC SSBI */
2538static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = {
2539 .controller_type = MSM_SBI_CTRL_SSBI,
2540};
2541#endif
2542
2543#ifdef CONFIG_BATTERY_MSM
2544/* Use basic value for fake MSM battery */
2545static struct msm_psy_batt_pdata msm_psy_batt_data = {
2546 .avail_chg_sources = AC_CHG,
2547};
2548
2549static struct platform_device msm_batt_device = {
2550 .name = "msm-battery",
2551 .id = -1,
2552 .dev.platform_data = &msm_psy_batt_data,
2553};
2554#endif
2555
2556#ifdef CONFIG_FB_MSM_LCDC_DSUB
2557/* VGA = 1440 x 900 x 4(bpp) x 2(pages)
2558 prim = 1024 x 600 x 4(bpp) x 2(pages)
2559 This is the difference. */
2560#define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000)
2561#else
2562#define MSM_FB_DSUB_PMEM_ADDER (0)
2563#endif
2564
2565/* Sensors DSPS platform data */
2566#ifdef CONFIG_MSM_DSPS
2567
2568static struct dsps_gpio_info dsps_surf_gpios[] = {
2569 {
2570 .name = "compass_rst_n",
2571 .num = GPIO_COMPASS_RST_N,
2572 .on_val = 1, /* device not in reset */
2573 .off_val = 0, /* device in reset */
2574 },
2575 {
2576 .name = "gpio_r_altimeter_reset_n",
2577 .num = GPIO_R_ALTIMETER_RESET_N,
2578 .on_val = 1, /* device not in reset */
2579 .off_val = 0, /* device in reset */
2580 }
2581};
2582
2583static struct dsps_gpio_info dsps_fluid_gpios[] = {
2584 {
2585 .name = "gpio_n_altimeter_reset_n",
2586 .num = GPIO_N_ALTIMETER_RESET_N,
2587 .on_val = 1, /* device not in reset */
2588 .off_val = 0, /* device in reset */
2589 }
2590};
2591
2592static void __init msm8x60_init_dsps(void)
2593{
2594 struct msm_dsps_platform_data *pdata =
2595 msm_dsps_device.dev.platform_data;
2596 /*
2597 * On Fluid the Compass sensor Chip-Select (CS) is directly connected
2598 * to the power supply and not controled via GPIOs. Fluid uses a
2599 * different IO-Expender (north) than used on surf/ffa.
2600 */
2601 if (machine_is_msm8x60_fluid()) {
2602 /* fluid has different firmware, gpios */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002603 pdata->pil_name = DSPS_PIL_FLUID_NAME;
2604 pdata->gpios = dsps_fluid_gpios;
2605 pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
2606 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002607 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
2608 pdata->gpios = dsps_surf_gpios;
2609 pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
2610 }
2611
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002612 platform_device_register(&msm_dsps_device);
2613}
2614#endif /* CONFIG_MSM_DSPS */
2615
2616#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002617#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 3) /* 4 bpp x 3 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002618#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002619#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 2) /* 4 bpp x 2 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002620#endif
2621
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002622#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2623#define MSM_FB_EXT_BUF_SIZE (1920 * 1080 * 2 * 1) /* 2 bpp x 1 page */
2624#elif defined(CONFIG_FB_MSM_TVOUT)
2625#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
2626#else
2627#define MSM_FB_EXT_BUFT_SIZE 0
2628#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002629
Huaibin Yang335f4012011-12-02 14:11:48 -08002630#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
kuogee hsieha39040b2011-08-11 15:40:45 -07002631/* width x height x 3 bpp x 2 frame buffer */
2632#define MSM_FB_WRITEBACK_SIZE (1024 * 600 * 3 * 2)
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002633#define MSM_FB_WRITEBACK_OFFSET \
2634 (MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002635#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002636#define MSM_FB_WRITEBACK_SIZE 0
2637#define MSM_FB_WRITEBACK_OFFSET 0
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002638#endif
2639
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002640#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2641/* 4 bpp x 2 page HDMI case */
2642#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
2643#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002644/* Note: must be multiple of 4096 */
2645#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
2646 MSM_FB_WRITEBACK_SIZE + \
2647 MSM_FB_DSUB_PMEM_ADDER, 4096)
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002648#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002649
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002650#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2651#define MSM_PMEM_SF_SIZE 0x8000000 /* 128 Mbytes */
2652#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002653#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002654#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002655
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002656static int writeback_offset(void)
2657{
2658 return MSM_FB_WRITEBACK_OFFSET;
2659}
2660
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002661#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
2662#define MSM_PMEM_ADSP_SIZE 0x2000000
Ben Romberger09e462d2011-08-09 15:24:37 -07002663#define MSM_PMEM_AUDIO_SIZE 0x28B000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002664
2665#define MSM_SMI_BASE 0x38000000
2666#define MSM_SMI_SIZE 0x4000000
2667
2668#define KERNEL_SMI_BASE (MSM_SMI_BASE)
Maheshwar Ajjac60c0462011-11-29 17:46:57 -08002669#define KERNEL_SMI_SIZE 0x600000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002670
2671#define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE)
2672#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
2673#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
2674
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002675#define MSM_ION_EBI_SIZE MSM_PMEM_SF_SIZE
2676#define MSM_ION_ADSP_SIZE MSM_PMEM_ADSP_SIZE
Laura Abbottdf8b8a82011-11-02 23:13:45 -07002677#define MSM_ION_SMI_SIZE MSM_PMEM_SMIPOOL_SIZE
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002678
2679#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
2680#define MSM_ION_HEAP_NUM 5
2681#else
2682#define MSM_ION_HEAP_NUM 2
2683#endif
2684
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002685static unsigned fb_size;
2686static int __init fb_size_setup(char *p)
2687{
2688 fb_size = memparse(p, NULL);
2689 return 0;
2690}
2691early_param("fb_size", fb_size_setup);
2692
2693static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
2694static int __init pmem_kernel_ebi1_size_setup(char *p)
2695{
2696 pmem_kernel_ebi1_size = memparse(p, NULL);
2697 return 0;
2698}
2699early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2700
2701#ifdef CONFIG_ANDROID_PMEM
2702static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
2703static int __init pmem_sf_size_setup(char *p)
2704{
2705 pmem_sf_size = memparse(p, NULL);
2706 return 0;
2707}
2708early_param("pmem_sf_size", pmem_sf_size_setup);
2709
2710static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
2711
2712static int __init pmem_adsp_size_setup(char *p)
2713{
2714 pmem_adsp_size = memparse(p, NULL);
2715 return 0;
2716}
2717early_param("pmem_adsp_size", pmem_adsp_size_setup);
2718
2719static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2720
2721static int __init pmem_audio_size_setup(char *p)
2722{
2723 pmem_audio_size = memparse(p, NULL);
2724 return 0;
2725}
2726early_param("pmem_audio_size", pmem_audio_size_setup);
2727#endif
2728
2729static struct resource msm_fb_resources[] = {
2730 {
2731 .flags = IORESOURCE_DMA,
2732 }
2733};
2734
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002735static int msm_fb_detect_panel(const char *name)
2736{
2737 if (machine_is_msm8x60_fluid()) {
2738 uint32_t soc_platform_version = socinfo_get_platform_version();
2739 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
2740#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2741 if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002742 strnlen(LCDC_SAMSUNG_OLED_PANEL_NAME,
2743 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002744 return 0;
2745#endif
2746 } else { /*P3 and up use AUO panel */
2747#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2748 if (!strncmp(name, LCDC_AUO_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002749 strnlen(LCDC_AUO_PANEL_NAME,
2750 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002751 return 0;
2752#endif
2753 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002754#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
2755 } else if machine_is_msm8x60_dragon() {
2756 if (!strncmp(name, LCDC_NT35582_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002757 strnlen(LCDC_NT35582_PANEL_NAME,
2758 PANEL_NAME_MAX_LEN)))
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002759 return 0;
2760#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002761 } else {
2762 if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002763 strnlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2764 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002765 return 0;
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002766
2767#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
2768 !defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
2769 !defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
2770 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2771 strnlen(MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2772 PANEL_NAME_MAX_LEN)))
2773 return 0;
2774
2775 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2776 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2777 PANEL_NAME_MAX_LEN)))
2778 return 0;
2779
2780 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2781 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2782 PANEL_NAME_MAX_LEN)))
2783 return 0;
2784#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002785 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002786
2787 if (!strncmp(name, HDMI_PANEL_NAME,
2788 strnlen(HDMI_PANEL_NAME,
2789 PANEL_NAME_MAX_LEN)))
2790 return 0;
2791
2792 if (!strncmp(name, TVOUT_PANEL_NAME,
2793 strnlen(TVOUT_PANEL_NAME,
2794 PANEL_NAME_MAX_LEN)))
2795 return 0;
2796
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002797 pr_warning("%s: not supported '%s'", __func__, name);
2798 return -ENODEV;
2799}
2800
2801static struct msm_fb_platform_data msm_fb_pdata = {
2802 .detect_client = msm_fb_detect_panel,
2803};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002804
2805static struct platform_device msm_fb_device = {
2806 .name = "msm_fb",
2807 .id = 0,
2808 .num_resources = ARRAY_SIZE(msm_fb_resources),
2809 .resource = msm_fb_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002810 .dev.platform_data = &msm_fb_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002811};
2812
2813#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002814#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002815static struct android_pmem_platform_data android_pmem_pdata = {
2816 .name = "pmem",
2817 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
2818 .cached = 1,
2819 .memory_type = MEMTYPE_EBI1,
2820};
2821
2822static struct platform_device android_pmem_device = {
2823 .name = "android_pmem",
2824 .id = 0,
2825 .dev = {.platform_data = &android_pmem_pdata},
2826};
2827
2828static struct android_pmem_platform_data android_pmem_adsp_pdata = {
2829 .name = "pmem_adsp",
2830 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2831 .cached = 0,
2832 .memory_type = MEMTYPE_EBI1,
2833};
2834
2835static struct platform_device android_pmem_adsp_device = {
2836 .name = "android_pmem",
2837 .id = 2,
2838 .dev = { .platform_data = &android_pmem_adsp_pdata },
2839};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002840#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002841static struct android_pmem_platform_data android_pmem_audio_pdata = {
2842 .name = "pmem_audio",
2843 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2844 .cached = 0,
2845 .memory_type = MEMTYPE_EBI1,
2846};
2847
2848static struct platform_device android_pmem_audio_device = {
2849 .name = "android_pmem",
2850 .id = 4,
2851 .dev = { .platform_data = &android_pmem_audio_pdata },
2852};
2853
Laura Abbott1e36a022011-06-22 17:08:13 -07002854#define PMEM_BUS_WIDTH(_bw) \
2855 { \
2856 .vectors = &(struct msm_bus_vectors){ \
2857 .src = MSM_BUS_MASTER_AMPSS_M0, \
2858 .dst = MSM_BUS_SLAVE_SMI, \
2859 .ib = (_bw), \
2860 .ab = 0, \
2861 }, \
2862 .num_paths = 1, \
2863 }
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002864#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Laura Abbott1e36a022011-06-22 17:08:13 -07002865static struct msm_bus_paths pmem_smi_table[] = {
2866 [0] = PMEM_BUS_WIDTH(0), /* Off */
2867 [1] = PMEM_BUS_WIDTH(1), /* On */
2868};
2869
2870static struct msm_bus_scale_pdata smi_client_pdata = {
2871 .usecase = pmem_smi_table,
2872 .num_usecases = ARRAY_SIZE(pmem_smi_table),
2873 .name = "pmem_smi",
2874};
2875
Alex Bird199980e2011-10-21 11:29:27 -07002876void request_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002877{
2878 int bus_id = (int) data;
2879
2880 msm_bus_scale_client_update_request(bus_id, 1);
2881}
2882
Alex Bird199980e2011-10-21 11:29:27 -07002883void release_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002884{
2885 int bus_id = (int) data;
2886
2887 msm_bus_scale_client_update_request(bus_id, 0);
2888}
2889
Alex Bird199980e2011-10-21 11:29:27 -07002890void *setup_smi_region(void)
Laura Abbott1e36a022011-06-22 17:08:13 -07002891{
2892 return (void *)msm_bus_scale_register_client(&smi_client_pdata);
2893}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002894static struct android_pmem_platform_data android_pmem_smipool_pdata = {
2895 .name = "pmem_smipool",
2896 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2897 .cached = 0,
2898 .memory_type = MEMTYPE_SMI,
Alex Bird199980e2011-10-21 11:29:27 -07002899 .request_region = request_smi_region,
2900 .release_region = release_smi_region,
2901 .setup_region = setup_smi_region,
Laura Abbott1e36a022011-06-22 17:08:13 -07002902 .map_on_demand = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002903};
2904static struct platform_device android_pmem_smipool_device = {
2905 .name = "android_pmem",
2906 .id = 7,
2907 .dev = { .platform_data = &android_pmem_smipool_pdata },
2908};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002909#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002910#endif
2911
2912#define GPIO_DONGLE_PWR_EN 258
2913static void setup_display_power(void);
2914static int lcdc_vga_enabled;
2915static int vga_enable_request(int enable)
2916{
2917 if (enable)
2918 lcdc_vga_enabled = 1;
2919 else
2920 lcdc_vga_enabled = 0;
2921 setup_display_power();
2922
2923 return 0;
2924}
2925
2926#define GPIO_BACKLIGHT_PWM0 0
2927#define GPIO_BACKLIGHT_PWM1 1
2928
2929static int pmic_backlight_gpio[2]
2930 = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 };
2931static struct msm_panel_common_pdata lcdc_samsung_panel_data = {
2932 .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */
2933 .vga_switch = vga_enable_request,
2934};
2935
2936static struct platform_device lcdc_samsung_panel_device = {
2937 .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2938 .id = 0,
2939 .dev = {
2940 .platform_data = &lcdc_samsung_panel_data,
2941 }
2942};
2943#if (!defined(CONFIG_SPI_QUP)) && \
2944 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
2945 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA))
2946
2947static int lcdc_spi_gpio_array_num[] = {
2948 LCDC_SPI_GPIO_CLK,
2949 LCDC_SPI_GPIO_CS,
2950 LCDC_SPI_GPIO_MOSI,
2951};
2952
2953static uint32_t lcdc_spi_gpio_config_data[] = {
2954 GPIO_CFG(LCDC_SPI_GPIO_CLK, 0,
2955 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2956 GPIO_CFG(LCDC_SPI_GPIO_CS, 0,
2957 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2958 GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0,
2959 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2960};
2961
2962static void lcdc_config_spi_gpios(int enable)
2963{
2964 int n;
2965 for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n)
2966 gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0);
2967}
2968#endif
2969
2970#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2971#ifdef CONFIG_SPI_QUP
2972static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = {
2973 {
2974 .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME,
2975 .mode = SPI_MODE_3,
2976 .bus_num = 1,
2977 .chip_select = 0,
2978 .max_speed_hz = 10800000,
2979 }
2980};
2981#endif /* CONFIG_SPI_QUP */
2982
2983static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = {
2984#ifndef CONFIG_SPI_QUP
2985 .panel_config_gpio = lcdc_config_spi_gpios,
2986 .gpio_num = lcdc_spi_gpio_array_num,
2987#endif
2988};
2989
2990static struct platform_device lcdc_samsung_oled_panel_device = {
2991 .name = LCDC_SAMSUNG_OLED_PANEL_NAME,
2992 .id = 0,
2993 .dev.platform_data = &lcdc_samsung_oled_panel_data,
2994};
2995#endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */
2996
2997#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2998#ifdef CONFIG_SPI_QUP
2999static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = {
3000 {
3001 .modalias = LCDC_AUO_SPI_DEVICE_NAME,
3002 .mode = SPI_MODE_3,
3003 .bus_num = 1,
3004 .chip_select = 0,
3005 .max_speed_hz = 10800000,
3006 }
3007};
3008#endif
3009
3010static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = {
3011#ifndef CONFIG_SPI_QUP
3012 .panel_config_gpio = lcdc_config_spi_gpios,
3013 .gpio_num = lcdc_spi_gpio_array_num,
3014#endif
3015};
3016
3017static struct platform_device lcdc_auo_wvga_panel_device = {
3018 .name = LCDC_AUO_PANEL_NAME,
3019 .id = 0,
3020 .dev.platform_data = &lcdc_auo_wvga_panel_data,
3021};
3022#endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/
3023
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04003024#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
3025
3026#define GPIO_NT35582_RESET 94
3027#define GPIO_NT35582_BL_EN_HW_PIN 24
3028#define GPIO_NT35582_BL_EN \
3029 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1)
3030
3031static int lcdc_nt35582_pmic_gpio[] = {GPIO_NT35582_BL_EN };
3032
3033static struct msm_panel_common_pdata lcdc_nt35582_panel_data = {
3034 .gpio_num = lcdc_nt35582_pmic_gpio,
3035};
3036
3037static struct platform_device lcdc_nt35582_panel_device = {
3038 .name = LCDC_NT35582_PANEL_NAME,
3039 .id = 0,
3040 .dev = {
3041 .platform_data = &lcdc_nt35582_panel_data,
3042 }
3043};
3044
3045static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = {
3046 {
3047 .modalias = "lcdc_nt35582_spi",
3048 .mode = SPI_MODE_0,
3049 .bus_num = 0,
3050 .chip_select = 0,
3051 .max_speed_hz = 1100000,
3052 }
3053};
3054#endif
3055
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003056#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
3057static struct resource hdmi_msm_resources[] = {
3058 {
3059 .name = "hdmi_msm_qfprom_addr",
3060 .start = 0x00700000,
3061 .end = 0x007060FF,
3062 .flags = IORESOURCE_MEM,
3063 },
3064 {
3065 .name = "hdmi_msm_hdmi_addr",
3066 .start = 0x04A00000,
3067 .end = 0x04A00FFF,
3068 .flags = IORESOURCE_MEM,
3069 },
3070 {
3071 .name = "hdmi_msm_irq",
3072 .start = HDMI_IRQ,
3073 .end = HDMI_IRQ,
3074 .flags = IORESOURCE_IRQ,
3075 },
3076};
3077
3078static int hdmi_enable_5v(int on);
3079static int hdmi_core_power(int on, int show);
3080static int hdmi_cec_power(int on);
3081
3082static struct msm_hdmi_platform_data hdmi_msm_data = {
3083 .irq = HDMI_IRQ,
3084 .enable_5v = hdmi_enable_5v,
3085 .core_power = hdmi_core_power,
3086 .cec_power = hdmi_cec_power,
3087};
3088
3089static struct platform_device hdmi_msm_device = {
3090 .name = "hdmi_msm",
3091 .id = 0,
3092 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
3093 .resource = hdmi_msm_resources,
3094 .dev.platform_data = &hdmi_msm_data,
3095};
3096#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
3097
3098#ifdef CONFIG_FB_MSM_MIPI_DSI
3099static struct platform_device mipi_dsi_toshiba_panel_device = {
3100 .name = "mipi_toshiba",
3101 .id = 0,
3102};
3103
3104#define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A
3105
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07003106static struct mipi_dsi_panel_platform_data novatek_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003107 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
Chandan Uddaraju83eac3c2011-09-11 18:32:23 -07003108 .fpga_ctrl_mode = FPGA_EBI2_INTF,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003109};
3110
3111static struct platform_device mipi_dsi_novatek_panel_device = {
3112 .name = "mipi_novatek",
3113 .id = 0,
3114 .dev = {
3115 .platform_data = &novatek_pdata,
3116 }
3117};
3118#endif
3119
3120static void __init msm8x60_allocate_memory_regions(void)
3121{
3122 void *addr;
3123 unsigned long size;
3124
3125 size = MSM_FB_SIZE;
3126 addr = alloc_bootmem_align(size, 0x1000);
3127 msm_fb_resources[0].start = __pa(addr);
3128 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
3129 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
3130 size, addr, __pa(addr));
3131
3132}
3133
3134#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
3135 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
3136/*virtual key support */
3137static ssize_t tma300_vkeys_show(struct kobject *kobj,
3138 struct kobj_attribute *attr, char *buf)
3139{
3140 return sprintf(buf,
3141 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120"
3142 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120"
3143 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120"
3144 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120"
3145 "\n");
3146}
3147
3148static struct kobj_attribute tma300_vkeys_attr = {
3149 .attr = {
3150 .mode = S_IRUGO,
3151 },
3152 .show = &tma300_vkeys_show,
3153};
3154
3155static struct attribute *tma300_properties_attrs[] = {
3156 &tma300_vkeys_attr.attr,
3157 NULL
3158};
3159
3160static struct attribute_group tma300_properties_attr_group = {
3161 .attrs = tma300_properties_attrs,
3162};
3163
3164static struct kobject *properties_kobj;
3165
3166
3167
3168#define CYTTSP_TS_GPIO_IRQ 61
3169static int cyttsp_platform_init(struct i2c_client *client)
3170{
3171 int rc = -EINVAL;
3172 struct regulator *pm8058_l5 = NULL, *pm8058_s3;
3173
3174 if (machine_is_msm8x60_fluid()) {
3175 pm8058_l5 = regulator_get(NULL, "8058_l5");
3176 if (IS_ERR(pm8058_l5)) {
3177 pr_err("%s: regulator get of 8058_l5 failed (%ld)\n",
3178 __func__, PTR_ERR(pm8058_l5));
3179 rc = PTR_ERR(pm8058_l5);
3180 return rc;
3181 }
3182 rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000);
3183 if (rc) {
3184 pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n",
3185 __func__, rc);
3186 goto reg_l5_put;
3187 }
3188
3189 rc = regulator_enable(pm8058_l5);
3190 if (rc) {
3191 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3192 __func__, rc);
3193 goto reg_l5_put;
3194 }
3195 }
3196 /* vote for s3 to enable i2c communication lines */
3197 pm8058_s3 = regulator_get(NULL, "8058_s3");
3198 if (IS_ERR(pm8058_s3)) {
3199 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3200 __func__, PTR_ERR(pm8058_s3));
3201 rc = PTR_ERR(pm8058_s3);
3202 goto reg_l5_disable;
3203 }
3204
3205 rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000);
3206 if (rc) {
3207 pr_err("%s: regulator_set_voltage() = %d\n",
3208 __func__, rc);
3209 goto reg_s3_put;
3210 }
3211
3212 rc = regulator_enable(pm8058_s3);
3213 if (rc) {
3214 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3215 __func__, rc);
3216 goto reg_s3_put;
3217 }
3218
3219 /* wait for vregs to stabilize */
3220 usleep_range(10000, 10000);
3221
3222 /* check this device active by reading first byte/register */
3223 rc = i2c_smbus_read_byte_data(client, 0x01);
3224 if (rc < 0) {
3225 pr_err("%s: i2c sanity check failed\n", __func__);
3226 goto reg_s3_disable;
3227 }
3228
3229 /* virtual keys */
3230 if (machine_is_msm8x60_fluid()) {
3231 tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
3232 properties_kobj = kobject_create_and_add("board_properties",
3233 NULL);
3234 if (properties_kobj)
3235 rc = sysfs_create_group(properties_kobj,
3236 &tma300_properties_attr_group);
3237 if (!properties_kobj || rc)
3238 pr_err("%s: failed to create board_properties\n",
3239 __func__);
3240 }
3241 return CY_OK;
3242
3243reg_s3_disable:
3244 regulator_disable(pm8058_s3);
3245reg_s3_put:
3246 regulator_put(pm8058_s3);
3247reg_l5_disable:
3248 if (machine_is_msm8x60_fluid())
3249 regulator_disable(pm8058_l5);
3250reg_l5_put:
3251 if (machine_is_msm8x60_fluid())
3252 regulator_put(pm8058_l5);
3253 return rc;
3254}
3255
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303256/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
3257static int cyttsp_platform_suspend(struct i2c_client *client)
3258{
3259 msleep(20);
3260
3261 return CY_OK;
3262}
3263
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003264static int cyttsp_platform_resume(struct i2c_client *client)
3265{
3266 /* add any special code to strobe a wakeup pin or chip reset */
3267 msleep(10);
3268
3269 return CY_OK;
3270}
3271
3272static struct cyttsp_platform_data cyttsp_fluid_pdata = {
3273 .flags = 0x04,
3274 .gen = CY_GEN3, /* or */
3275 .use_st = CY_USE_ST,
3276 .use_mt = CY_USE_MT,
3277 .use_hndshk = CY_SEND_HNDSHK,
3278 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303279 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003280 .use_gestures = CY_USE_GESTURES,
3281 /* activate up to 4 groups
3282 * and set active distance
3283 */
3284 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3285 CY_GEST_GRP3 | CY_GEST_GRP4 |
3286 CY_ACT_DIST,
3287 /* change act_intrvl to customize the Active power state
3288 * scanning/processing refresh interval for Operating mode
3289 */
3290 .act_intrvl = CY_ACT_INTRVL_DFLT,
3291 /* change tch_tmout to customize the touch timeout for the
3292 * Active power state for Operating mode
3293 */
3294 .tch_tmout = CY_TCH_TMOUT_DFLT,
3295 /* change lp_intrvl to customize the Low Power power state
3296 * scanning/processing refresh interval for Operating mode
3297 */
3298 .lp_intrvl = CY_LP_INTRVL_DFLT,
3299 .sleep_gpio = -1,
3300 .resout_gpio = -1,
3301 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3302 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303303 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003304 .init = cyttsp_platform_init,
3305};
3306
3307static struct cyttsp_platform_data cyttsp_tmg240_pdata = {
3308 .panel_maxx = 1083,
3309 .panel_maxy = 659,
3310 .disp_minx = 30,
3311 .disp_maxx = 1053,
3312 .disp_miny = 30,
3313 .disp_maxy = 629,
3314 .correct_fw_ver = 8,
3315 .fw_fname = "cyttsp_8660_ffa.hex",
3316 .flags = 0x00,
3317 .gen = CY_GEN2, /* or */
3318 .use_st = CY_USE_ST,
3319 .use_mt = CY_USE_MT,
3320 .use_hndshk = CY_SEND_HNDSHK,
3321 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303322 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003323 .use_gestures = CY_USE_GESTURES,
3324 /* activate up to 4 groups
3325 * and set active distance
3326 */
3327 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3328 CY_GEST_GRP3 | CY_GEST_GRP4 |
3329 CY_ACT_DIST,
3330 /* change act_intrvl to customize the Active power state
3331 * scanning/processing refresh interval for Operating mode
3332 */
3333 .act_intrvl = CY_ACT_INTRVL_DFLT,
3334 /* change tch_tmout to customize the touch timeout for the
3335 * Active power state for Operating mode
3336 */
3337 .tch_tmout = CY_TCH_TMOUT_DFLT,
3338 /* change lp_intrvl to customize the Low Power power state
3339 * scanning/processing refresh interval for Operating mode
3340 */
3341 .lp_intrvl = CY_LP_INTRVL_DFLT,
3342 .sleep_gpio = -1,
3343 .resout_gpio = -1,
3344 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3345 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303346 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003347 .init = cyttsp_platform_init,
Mohan Pallaka1ea7d8a2011-08-18 15:06:00 +05303348 .disable_ghost_det = true,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003349};
3350static void cyttsp_set_params(void)
3351{
3352 if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) {
3353 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex";
3354 cyttsp_fluid_pdata.panel_maxx = 539;
3355 cyttsp_fluid_pdata.panel_maxy = 994;
3356 cyttsp_fluid_pdata.disp_minx = 30;
3357 cyttsp_fluid_pdata.disp_maxx = 509;
3358 cyttsp_fluid_pdata.disp_miny = 60;
3359 cyttsp_fluid_pdata.disp_maxy = 859;
3360 cyttsp_fluid_pdata.correct_fw_ver = 4;
3361 } else {
3362 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex";
3363 cyttsp_fluid_pdata.panel_maxx = 550;
3364 cyttsp_fluid_pdata.panel_maxy = 1013;
3365 cyttsp_fluid_pdata.disp_minx = 35;
3366 cyttsp_fluid_pdata.disp_maxx = 515;
3367 cyttsp_fluid_pdata.disp_miny = 69;
3368 cyttsp_fluid_pdata.disp_maxy = 869;
3369 cyttsp_fluid_pdata.correct_fw_ver = 5;
3370 }
3371
3372}
3373
3374static struct i2c_board_info cyttsp_fluid_info[] __initdata = {
3375 {
3376 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
3377 .platform_data = &cyttsp_fluid_pdata,
3378#ifndef CY_USE_TIMER
3379 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3380#endif /* CY_USE_TIMER */
3381 },
3382};
3383
3384static struct i2c_board_info cyttsp_ffa_info[] __initdata = {
3385 {
3386 I2C_BOARD_INFO(CY_I2C_NAME, 0x3b),
3387 .platform_data = &cyttsp_tmg240_pdata,
3388#ifndef CY_USE_TIMER
3389 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3390#endif /* CY_USE_TIMER */
3391 },
3392};
3393#endif
3394
3395static struct regulator *vreg_tmg200;
3396
3397#define TS_PEN_IRQ_GPIO 61
3398static int tmg200_power(int vreg_on)
3399{
3400 int rc = -EINVAL;
3401
3402 if (!vreg_tmg200) {
3403 printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n",
3404 __func__, rc);
3405 return rc;
3406 }
3407
3408 rc = vreg_on ? regulator_enable(vreg_tmg200) :
3409 regulator_disable(vreg_tmg200);
3410 if (rc < 0)
3411 printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n",
3412 __func__, vreg_on ? "enable" : "disable", rc);
3413
3414 /* wait for vregs to stabilize */
Amy Maloche12b5d4e2011-08-03 15:42:28 -07003415 msleep(20);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003416
3417 return rc;
3418}
3419
3420static int tmg200_dev_setup(bool enable)
3421{
3422 int rc;
3423
3424 if (enable) {
3425 vreg_tmg200 = regulator_get(NULL, "8058_s3");
3426 if (IS_ERR(vreg_tmg200)) {
3427 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3428 __func__, PTR_ERR(vreg_tmg200));
3429 rc = PTR_ERR(vreg_tmg200);
3430 return rc;
3431 }
3432
3433 rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000);
3434 if (rc) {
3435 pr_err("%s: regulator_set_voltage() = %d\n",
3436 __func__, rc);
3437 goto reg_put;
3438 }
3439 } else {
3440 /* put voltage sources */
3441 regulator_put(vreg_tmg200);
3442 }
3443 return 0;
3444reg_put:
3445 regulator_put(vreg_tmg200);
3446 return rc;
3447}
3448
3449static struct cy8c_ts_platform_data cy8ctmg200_pdata = {
3450 .ts_name = "msm_tmg200_ts",
3451 .dis_min_x = 0,
3452 .dis_max_x = 1023,
3453 .dis_min_y = 0,
3454 .dis_max_y = 599,
3455 .min_tid = 0,
3456 .max_tid = 255,
3457 .min_touch = 0,
3458 .max_touch = 255,
3459 .min_width = 0,
3460 .max_width = 255,
3461 .power_on = tmg200_power,
3462 .dev_setup = tmg200_dev_setup,
3463 .nfingers = 2,
3464 .irq_gpio = TS_PEN_IRQ_GPIO,
3465 .resout_gpio = GPIO_CAP_TS_RESOUT_N,
3466};
3467
3468static struct i2c_board_info cy8ctmg200_board_info[] = {
3469 {
3470 I2C_BOARD_INFO("cy8ctmg200", 0x2),
3471 .platform_data = &cy8ctmg200_pdata,
3472 }
3473};
3474
Zhang Chang Ken211df572011-07-05 19:16:39 -04003475static struct regulator *vreg_tma340;
3476
3477static int tma340_power(int vreg_on)
3478{
3479 int rc = -EINVAL;
3480
3481 if (!vreg_tma340) {
3482 pr_err("%s: regulator 8901_l2 not found (%d)\n",
3483 __func__, rc);
3484 return rc;
3485 }
3486
3487 rc = vreg_on ? regulator_enable(vreg_tma340) :
3488 regulator_disable(vreg_tma340);
3489 if (rc < 0)
3490 pr_err("%s: vreg 8901_l2 %s failed (%d)\n",
3491 __func__, vreg_on ? "enable" : "disable", rc);
3492
3493 /* wait for vregs to stabilize */
Amy Malocheb5c67e8d2011-08-18 16:39:35 -07003494 msleep(100);
Zhang Chang Ken211df572011-07-05 19:16:39 -04003495
3496 return rc;
3497}
3498
3499static struct kobject *tma340_prop_kobj;
3500
3501static int tma340_dragon_dev_setup(bool enable)
3502{
3503 int rc;
3504
3505 if (enable) {
3506 vreg_tma340 = regulator_get(NULL, "8901_l2");
3507 if (IS_ERR(vreg_tma340)) {
3508 pr_err("%s: regulator get of 8901_l2 failed (%ld)\n",
3509 __func__, PTR_ERR(vreg_tma340));
3510 rc = PTR_ERR(vreg_tma340);
3511 return rc;
3512 }
3513
3514 rc = regulator_set_voltage(vreg_tma340, 3300000, 3300000);
3515 if (rc) {
3516 pr_err("%s: regulator_set_voltage() = %d\n",
3517 __func__, rc);
3518 goto reg_put;
3519 }
3520 tma300_vkeys_attr.attr.name = "virtualkeys.cy8ctma340";
3521 tma340_prop_kobj = kobject_create_and_add("board_properties",
3522 NULL);
3523 if (tma340_prop_kobj) {
3524 rc = sysfs_create_group(tma340_prop_kobj,
3525 &tma300_properties_attr_group);
3526 if (rc) {
3527 kobject_put(tma340_prop_kobj);
3528 pr_err("%s: failed to create board_properties\n",
3529 __func__);
3530 goto reg_put;
3531 }
3532 }
3533
3534 } else {
3535 /* put voltage sources */
3536 regulator_put(vreg_tma340);
3537 /* destroy virtual keys */
3538 if (tma340_prop_kobj) {
3539 sysfs_remove_group(tma340_prop_kobj,
3540 &tma300_properties_attr_group);
3541 kobject_put(tma340_prop_kobj);
3542 }
3543 }
3544 return 0;
3545reg_put:
3546 regulator_put(vreg_tma340);
3547 return rc;
3548}
3549
3550
3551static struct cy8c_ts_platform_data cy8ctma340_dragon_pdata = {
3552 .ts_name = "cy8ctma340",
3553 .dis_min_x = 0,
3554 .dis_max_x = 479,
3555 .dis_min_y = 0,
3556 .dis_max_y = 799,
3557 .min_tid = 0,
3558 .max_tid = 255,
3559 .min_touch = 0,
3560 .max_touch = 255,
3561 .min_width = 0,
3562 .max_width = 255,
3563 .power_on = tma340_power,
3564 .dev_setup = tma340_dragon_dev_setup,
3565 .nfingers = 2,
3566 .irq_gpio = TS_PEN_IRQ_GPIO,
3567 .resout_gpio = -1,
3568};
3569
3570static struct i2c_board_info cy8ctma340_dragon_board_info[] = {
3571 {
3572 I2C_BOARD_INFO("cy8ctma340", 0x24),
3573 .platform_data = &cy8ctma340_dragon_pdata,
3574 }
3575};
3576
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003577#ifdef CONFIG_SERIAL_MSM_HS
3578static int configure_uart_gpios(int on)
3579{
3580 int ret = 0, i;
3581 int uart_gpios[] = {53, 54, 55, 56};
3582 for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) {
3583 if (on) {
3584 ret = msm_gpiomux_get(uart_gpios[i]);
3585 if (unlikely(ret))
3586 break;
3587 } else {
3588 ret = msm_gpiomux_put(uart_gpios[i]);
3589 if (unlikely(ret))
3590 return ret;
3591 }
3592 }
3593 if (ret)
3594 for (; i >= 0; i--)
3595 msm_gpiomux_put(uart_gpios[i]);
3596 return ret;
3597}
3598static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
3599 .inject_rx_on_wakeup = 1,
3600 .rx_to_inject = 0xFD,
3601 .gpio_config = configure_uart_gpios,
3602};
3603#endif
3604
3605
3606#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
3607
3608static struct gpio_led gpio_exp_leds_config[] = {
3609 {
3610 .name = "left_led1:green",
3611 .gpio = GPIO_LEFT_LED_1,
3612 .active_low = 1,
3613 .retain_state_suspended = 0,
3614 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3615 },
3616 {
3617 .name = "left_led2:red",
3618 .gpio = GPIO_LEFT_LED_2,
3619 .active_low = 1,
3620 .retain_state_suspended = 0,
3621 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3622 },
3623 {
3624 .name = "left_led3:green",
3625 .gpio = GPIO_LEFT_LED_3,
3626 .active_low = 1,
3627 .retain_state_suspended = 0,
3628 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3629 },
3630 {
3631 .name = "wlan_led:orange",
3632 .gpio = GPIO_LEFT_LED_WLAN,
3633 .active_low = 1,
3634 .retain_state_suspended = 0,
3635 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3636 },
3637 {
3638 .name = "left_led5:green",
3639 .gpio = GPIO_LEFT_LED_5,
3640 .active_low = 1,
3641 .retain_state_suspended = 0,
3642 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3643 },
3644 {
3645 .name = "right_led1:green",
3646 .gpio = GPIO_RIGHT_LED_1,
3647 .active_low = 1,
3648 .retain_state_suspended = 0,
3649 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3650 },
3651 {
3652 .name = "right_led2:red",
3653 .gpio = GPIO_RIGHT_LED_2,
3654 .active_low = 1,
3655 .retain_state_suspended = 0,
3656 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3657 },
3658 {
3659 .name = "right_led3:green",
3660 .gpio = GPIO_RIGHT_LED_3,
3661 .active_low = 1,
3662 .retain_state_suspended = 0,
3663 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3664 },
3665 {
3666 .name = "bt_led:blue",
3667 .gpio = GPIO_RIGHT_LED_BT,
3668 .active_low = 1,
3669 .retain_state_suspended = 0,
3670 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3671 },
3672 {
3673 .name = "right_led5:green",
3674 .gpio = GPIO_RIGHT_LED_5,
3675 .active_low = 1,
3676 .retain_state_suspended = 0,
3677 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3678 },
3679};
3680
3681static struct gpio_led_platform_data gpio_leds_pdata = {
3682 .num_leds = ARRAY_SIZE(gpio_exp_leds_config),
3683 .leds = gpio_exp_leds_config,
3684};
3685
3686static struct platform_device gpio_leds = {
3687 .name = "leds-gpio",
3688 .id = -1,
3689 .dev = {
3690 .platform_data = &gpio_leds_pdata,
3691 },
3692};
3693
3694static struct gpio_led fluid_gpio_leds[] = {
3695 {
3696 .name = "dual_led:green",
3697 .gpio = GPIO_LED1_GREEN_N,
3698 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3699 .active_low = 1,
3700 .retain_state_suspended = 0,
3701 },
3702 {
3703 .name = "dual_led:red",
3704 .gpio = GPIO_LED2_RED_N,
3705 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3706 .active_low = 1,
3707 .retain_state_suspended = 0,
3708 },
3709};
3710
3711static struct gpio_led_platform_data gpio_led_pdata = {
3712 .leds = fluid_gpio_leds,
3713 .num_leds = ARRAY_SIZE(fluid_gpio_leds),
3714};
3715
3716static struct platform_device fluid_leds_gpio = {
3717 .name = "leds-gpio",
3718 .id = -1,
3719 .dev = {
3720 .platform_data = &gpio_led_pdata,
3721 },
3722};
3723
3724#endif
3725
3726#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
3727
3728static struct msm_rpm_log_platform_data msm_rpm_log_pdata = {
3729 .phys_addr_base = 0x00106000,
3730 .reg_offsets = {
3731 [MSM_RPM_LOG_PAGE_INDICES] = 0x00000C80,
3732 [MSM_RPM_LOG_PAGE_BUFFER] = 0x00000CA0,
3733 },
3734 .phys_size = SZ_8K,
3735 .log_len = 4096, /* log's buffer length in bytes */
3736 .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */
3737};
3738
3739static struct platform_device msm_rpm_log_device = {
3740 .name = "msm_rpm_log",
3741 .id = -1,
3742 .dev = {
3743 .platform_data = &msm_rpm_log_pdata,
3744 },
3745};
3746#endif
3747
3748#ifdef CONFIG_BATTERY_MSM8X60
3749static struct msm_charger_platform_data msm_charger_data = {
3750 .safety_time = 180,
3751 .update_time = 1,
3752 .max_voltage = 4200,
3753 .min_voltage = 3200,
3754};
3755
3756static struct platform_device msm_charger_device = {
3757 .name = "msm-charger",
3758 .id = -1,
3759 .dev = {
3760 .platform_data = &msm_charger_data,
3761 }
3762};
3763#endif
3764
3765/*
3766 * Consumer specific regulator names:
3767 * regulator name consumer dev_name
3768 */
3769static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = {
3770 REGULATOR_SUPPLY("8058_l0", NULL),
3771};
3772static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = {
3773 REGULATOR_SUPPLY("8058_l1", NULL),
3774};
3775static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = {
3776 REGULATOR_SUPPLY("8058_l2", NULL),
3777};
3778static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = {
3779 REGULATOR_SUPPLY("8058_l3", NULL),
3780};
3781static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = {
3782 REGULATOR_SUPPLY("8058_l4", NULL),
3783};
3784static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = {
3785 REGULATOR_SUPPLY("8058_l5", NULL),
3786};
3787static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = {
3788 REGULATOR_SUPPLY("8058_l6", NULL),
3789};
3790static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = {
3791 REGULATOR_SUPPLY("8058_l7", NULL),
3792};
3793static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = {
3794 REGULATOR_SUPPLY("8058_l8", NULL),
3795};
3796static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = {
3797 REGULATOR_SUPPLY("8058_l9", NULL),
3798};
3799static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = {
3800 REGULATOR_SUPPLY("8058_l10", NULL),
3801};
3802static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = {
3803 REGULATOR_SUPPLY("8058_l11", NULL),
3804};
3805static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = {
3806 REGULATOR_SUPPLY("8058_l12", NULL),
3807};
3808static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = {
3809 REGULATOR_SUPPLY("8058_l13", NULL),
3810};
3811static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = {
3812 REGULATOR_SUPPLY("8058_l14", NULL),
3813};
3814static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = {
3815 REGULATOR_SUPPLY("8058_l15", NULL),
3816};
3817static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = {
3818 REGULATOR_SUPPLY("8058_l16", NULL),
3819};
3820static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = {
3821 REGULATOR_SUPPLY("8058_l17", NULL),
3822};
3823static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = {
3824 REGULATOR_SUPPLY("8058_l18", NULL),
3825};
3826static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = {
3827 REGULATOR_SUPPLY("8058_l19", NULL),
3828};
3829static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = {
3830 REGULATOR_SUPPLY("8058_l20", NULL),
3831};
3832static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = {
3833 REGULATOR_SUPPLY("8058_l21", NULL),
3834};
3835static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = {
3836 REGULATOR_SUPPLY("8058_l22", NULL),
3837};
3838static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = {
3839 REGULATOR_SUPPLY("8058_l23", NULL),
3840};
3841static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = {
3842 REGULATOR_SUPPLY("8058_l24", NULL),
3843};
3844static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = {
3845 REGULATOR_SUPPLY("8058_l25", NULL),
3846};
3847static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = {
3848 REGULATOR_SUPPLY("8058_s0", NULL),
3849};
3850static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = {
3851 REGULATOR_SUPPLY("8058_s1", NULL),
3852};
3853static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = {
3854 REGULATOR_SUPPLY("8058_s2", NULL),
3855};
3856static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = {
3857 REGULATOR_SUPPLY("8058_s3", NULL),
3858};
3859static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = {
3860 REGULATOR_SUPPLY("8058_s4", NULL),
3861};
3862static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = {
3863 REGULATOR_SUPPLY("8058_lvs0", NULL),
3864};
3865static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = {
3866 REGULATOR_SUPPLY("8058_lvs1", NULL),
3867};
3868static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = {
3869 REGULATOR_SUPPLY("8058_ncp", NULL),
3870};
3871
3872static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = {
3873 REGULATOR_SUPPLY("8901_l0", NULL),
3874};
3875static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = {
3876 REGULATOR_SUPPLY("8901_l1", NULL),
3877};
3878static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = {
3879 REGULATOR_SUPPLY("8901_l2", NULL),
3880};
3881static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = {
3882 REGULATOR_SUPPLY("8901_l3", NULL),
3883};
3884static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = {
3885 REGULATOR_SUPPLY("8901_l4", NULL),
3886};
3887static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = {
3888 REGULATOR_SUPPLY("8901_l5", NULL),
3889};
3890static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = {
3891 REGULATOR_SUPPLY("8901_l6", NULL),
3892};
3893static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = {
3894 REGULATOR_SUPPLY("8901_s2", NULL),
3895};
3896static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = {
3897 REGULATOR_SUPPLY("8901_s3", NULL),
3898};
3899static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = {
3900 REGULATOR_SUPPLY("8901_s4", NULL),
3901};
3902static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = {
3903 REGULATOR_SUPPLY("8901_lvs0", NULL),
3904};
3905static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = {
3906 REGULATOR_SUPPLY("8901_lvs1", NULL),
3907};
3908static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = {
3909 REGULATOR_SUPPLY("8901_lvs2", NULL),
3910};
3911static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = {
3912 REGULATOR_SUPPLY("8901_lvs3", NULL),
3913};
3914static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = {
3915 REGULATOR_SUPPLY("8901_mvs0", NULL),
3916};
3917
David Collins6f032ba2011-08-31 14:08:15 -07003918/* Pin control regulators */
3919static struct regulator_consumer_supply vreg_consumers_PM8058_L8_PC[] = {
3920 REGULATOR_SUPPLY("8058_l8_pc", NULL),
3921};
3922static struct regulator_consumer_supply vreg_consumers_PM8058_L20_PC[] = {
3923 REGULATOR_SUPPLY("8058_l20_pc", NULL),
3924};
3925static struct regulator_consumer_supply vreg_consumers_PM8058_L21_PC[] = {
3926 REGULATOR_SUPPLY("8058_l21_pc", NULL),
3927};
3928static struct regulator_consumer_supply vreg_consumers_PM8058_S2_PC[] = {
3929 REGULATOR_SUPPLY("8058_s2_pc", NULL),
3930};
3931static struct regulator_consumer_supply vreg_consumers_PM8901_L0_PC[] = {
3932 REGULATOR_SUPPLY("8901_l0_pc", NULL),
3933};
3934static struct regulator_consumer_supply vreg_consumers_PM8901_S4_PC[] = {
3935 REGULATOR_SUPPLY("8901_s4_pc", NULL),
3936};
3937
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003938#define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
3939 _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \
David Collins6f032ba2011-08-31 14:08:15 -07003940 _freq, _pin_fn, _force_mode, _state, _sleep_selectable, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003941 _always_on) \
David Collins6f032ba2011-08-31 14:08:15 -07003942 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003943 .init_data = { \
3944 .constraints = { \
David Collins6f032ba2011-08-31 14:08:15 -07003945 .valid_modes_mask = _modes, \
3946 .valid_ops_mask = _ops, \
3947 .min_uV = _min_uV, \
3948 .max_uV = _max_uV, \
3949 .input_uV = _min_uV, \
3950 .apply_uV = _apply_uV, \
3951 .always_on = _always_on, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003952 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003953 .consumer_supplies = vreg_consumers_##_id, \
3954 .num_consumer_supplies = \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003955 ARRAY_SIZE(vreg_consumers_##_id), \
3956 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003957 .id = RPM_VREG_ID_##_id, \
3958 .default_uV = _default_uV, \
3959 .peak_uA = _peak_uA, \
3960 .avg_uA = _avg_uA, \
3961 .pull_down_enable = _pull_down, \
3962 .pin_ctrl = _pin_ctrl, \
3963 .freq = RPM_VREG_FREQ_##_freq, \
3964 .pin_fn = _pin_fn, \
3965 .force_mode = _force_mode, \
3966 .state = _state, \
3967 .sleep_selectable = _sleep_selectable, \
3968 }
3969
3970/* Pin control initialization */
3971#define RPM_PC(_id, _always_on, _pin_fn, _pin_ctrl) \
3972 { \
3973 .init_data = { \
3974 .constraints = { \
3975 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
3976 .always_on = _always_on, \
3977 }, \
3978 .num_consumer_supplies = \
3979 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
3980 .consumer_supplies = vreg_consumers_##_id##_PC, \
3981 }, \
3982 .id = RPM_VREG_ID_##_id##_PC, \
3983 .pin_fn = RPM_VREG_PIN_FN_8660_##_pin_fn, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003984 .pin_ctrl = _pin_ctrl, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003985 }
3986
3987/*
3988 * The default LPM/HPM state of an RPM controlled regulator can be controlled
3989 * via the peak_uA value specified in the table below. If the value is less
3990 * than the high power min threshold for the regulator, then the regulator will
3991 * be set to LPM. Otherwise, it will be set to HPM.
3992 *
3993 * This value can be further overridden by specifying an initial mode via
3994 * .init_data.constraints.initial_mode.
3995 */
3996
David Collins6f032ba2011-08-31 14:08:15 -07003997#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
3998 _init_peak_uA) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003999 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4000 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4001 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4002 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4003 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004004 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4005 RPM_VREG_PIN_FN_8660_ENABLE, \
4006 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004007 _sleep_selectable, _always_on)
4008
David Collins6f032ba2011-08-31 14:08:15 -07004009#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4010 _init_peak_uA, _freq) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004011 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4012 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4013 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4014 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4015 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004016 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, _freq, \
4017 RPM_VREG_PIN_FN_8660_ENABLE, \
4018 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4019 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004020
David Collins6f032ba2011-08-31 14:08:15 -07004021#define RPM_VS(_id, _always_on, _pd, _sleep_selectable) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004022 RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \
4023 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004024 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4025 RPM_VREG_PIN_FN_8660_ENABLE, \
4026 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4027 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004028
David Collins6f032ba2011-08-31 14:08:15 -07004029#define RPM_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004030 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
4031 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004032 _min_uV, 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4033 RPM_VREG_PIN_FN_8660_ENABLE, \
4034 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4035 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004036
David Collins6f032ba2011-08-31 14:08:15 -07004037#define LDO50HMIN RPM_VREG_8660_LDO_50_HPM_MIN_LOAD
4038#define LDO150HMIN RPM_VREG_8660_LDO_150_HPM_MIN_LOAD
4039#define LDO300HMIN RPM_VREG_8660_LDO_300_HPM_MIN_LOAD
4040#define SMPS_HMIN RPM_VREG_8660_SMPS_HPM_MIN_LOAD
4041#define FTS_HMIN RPM_VREG_8660_FTSMPS_HPM_MIN_LOAD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004042
David Collins6f032ba2011-08-31 14:08:15 -07004043/* RPM early regulator constraints */
4044static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
4045 /* ID a_on pd ss min_uV max_uV init_ip freq */
4046 RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
4047 RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004048};
4049
David Collins6f032ba2011-08-31 14:08:15 -07004050/* RPM regulator constraints */
4051static struct rpm_regulator_init_data rpm_regulator_init_data[] = {
4052 /* ID a_on pd ss min_uV max_uV init_ip */
4053 RPM_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4054 RPM_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4055 RPM_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN),
4056 RPM_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4057 RPM_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN),
4058 RPM_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4059 RPM_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN),
4060 RPM_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN),
4061 RPM_LDO(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN),
4062 RPM_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN),
4063 RPM_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4064 RPM_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN),
4065 RPM_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN),
4066 RPM_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN),
4067 RPM_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN),
4068 RPM_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4069 RPM_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN),
4070 RPM_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN),
4071 RPM_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN),
4072 RPM_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN),
4073 RPM_LDO(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4074 RPM_LDO(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN),
4075 RPM_LDO(PM8058_L22, 0, 1, 0, 1150000, 1150000, LDO300HMIN),
4076 RPM_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4077 RPM_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4078 RPM_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004079
David Collins6f032ba2011-08-31 14:08:15 -07004080 /* ID a_on pd ss min_uV max_uV init_ip freq */
4081 RPM_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, 1p60),
4082 RPM_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 1p60),
4083 RPM_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 1p60),
4084
4085 /* ID a_on pd ss */
4086 RPM_VS(PM8058_LVS0, 0, 1, 0),
4087 RPM_VS(PM8058_LVS1, 0, 1, 0),
4088
4089 /* ID a_on pd ss min_uV max_uV */
4090 RPM_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000),
4091
4092 /* ID a_on pd ss min_uV max_uV init_ip */
4093 RPM_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4094 RPM_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4095 RPM_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN),
4096 RPM_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4097 RPM_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4098 RPM_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4099 RPM_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN),
4100
4101 /* ID a_on pd ss min_uV max_uV init_ip freq */
4102 RPM_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 1p60),
4103 RPM_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 1p60),
4104 RPM_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, 1p60),
4105
4106 /* ID a_on pd ss */
4107 RPM_VS(PM8901_LVS0, 1, 1, 0),
4108 RPM_VS(PM8901_LVS1, 0, 1, 0),
4109 RPM_VS(PM8901_LVS2, 0, 1, 0),
4110 RPM_VS(PM8901_LVS3, 0, 1, 0),
4111 RPM_VS(PM8901_MVS0, 0, 1, 0),
4112
4113 /* ID a_on pin_func pin_ctrl */
4114 RPM_PC(PM8058_L8, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4115 RPM_PC(PM8058_L20, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4116 RPM_PC(PM8058_L21, 1, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4117 RPM_PC(PM8058_S2, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8058_A0),
4118 RPM_PC(PM8901_L0, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4119 RPM_PC(PM8901_S4, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4120};
4121
4122static struct rpm_regulator_platform_data rpm_regulator_early_pdata = {
4123 .init_data = rpm_regulator_early_init_data,
4124 .num_regulators = ARRAY_SIZE(rpm_regulator_early_init_data),
4125 .version = RPM_VREG_VERSION_8660,
4126 .vreg_id_vdd_mem = RPM_VREG_ID_PM8058_S0,
4127 .vreg_id_vdd_dig = RPM_VREG_ID_PM8058_S1,
4128};
4129
4130static struct rpm_regulator_platform_data rpm_regulator_pdata = {
4131 .init_data = rpm_regulator_init_data,
4132 .num_regulators = ARRAY_SIZE(rpm_regulator_init_data),
4133 .version = RPM_VREG_VERSION_8660,
4134};
4135
4136static struct platform_device rpm_regulator_early_device = {
4137 .name = "rpm-regulator",
4138 .id = 0,
4139 .dev = {
4140 .platform_data = &rpm_regulator_early_pdata,
4141 },
4142};
4143
4144static struct platform_device rpm_regulator_device = {
4145 .name = "rpm-regulator",
4146 .id = 1,
4147 .dev = {
4148 .platform_data = &rpm_regulator_pdata,
4149 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004150};
4151
4152static struct platform_device *early_regulators[] __initdata = {
4153 &msm_device_saw_s0,
4154 &msm_device_saw_s1,
David Collins6f032ba2011-08-31 14:08:15 -07004155 &rpm_regulator_early_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004156};
4157
4158static struct platform_device *early_devices[] __initdata = {
4159#ifdef CONFIG_MSM_BUS_SCALING
4160 &msm_bus_apps_fabric,
4161 &msm_bus_sys_fabric,
4162 &msm_bus_mm_fabric,
4163 &msm_bus_sys_fpb,
4164 &msm_bus_cpss_fpb,
4165#endif
4166 &msm_device_dmov_adm0,
4167 &msm_device_dmov_adm1,
4168};
4169
4170#if (defined(CONFIG_MARIMBA_CORE)) && \
4171 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
4172
4173static int bluetooth_power(int);
4174static struct platform_device msm_bt_power_device = {
4175 .name = "bt_power",
4176 .id = -1,
4177 .dev = {
4178 .platform_data = &bluetooth_power,
4179 },
4180};
4181#endif
4182
4183static struct platform_device msm_tsens_device = {
4184 .name = "tsens-tm",
4185 .id = -1,
4186};
4187
4188static struct platform_device *rumi_sim_devices[] __initdata = {
4189 &smc91x_device,
4190 &msm_device_uart_dm12,
4191#ifdef CONFIG_I2C_QUP
4192 &msm_gsbi3_qup_i2c_device,
4193 &msm_gsbi4_qup_i2c_device,
4194 &msm_gsbi7_qup_i2c_device,
4195 &msm_gsbi8_qup_i2c_device,
4196 &msm_gsbi9_qup_i2c_device,
4197 &msm_gsbi12_qup_i2c_device,
4198#endif
4199#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004200 &msm_device_ssbi3,
4201#endif
4202#ifdef CONFIG_ANDROID_PMEM
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004203#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004204 &android_pmem_device,
4205 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004206 &android_pmem_smipool_device,
4207#endif
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004208 &android_pmem_audio_device,
4209#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004210#ifdef CONFIG_MSM_ROTATOR
4211 &msm_rotator_device,
4212#endif
4213 &msm_fb_device,
4214 &msm_kgsl_3d0,
4215 &msm_kgsl_2d0,
4216 &msm_kgsl_2d1,
4217 &lcdc_samsung_panel_device,
4218#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
4219 &hdmi_msm_device,
4220#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
4221#ifdef CONFIG_MSM_CAMERA
4222#ifdef CONFIG_MT9E013
4223 &msm_camera_sensor_mt9e013,
4224#endif
4225#ifdef CONFIG_IMX074
4226 &msm_camera_sensor_imx074,
4227#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04004228#ifdef CONFIG_VX6953
4229 &msm_camera_sensor_vx6953,
4230#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004231#ifdef CONFIG_WEBCAM_OV7692
4232 &msm_camera_sensor_webcam_ov7692,
4233#endif
4234#ifdef CONFIG_WEBCAM_OV9726
4235 &msm_camera_sensor_webcam_ov9726,
4236#endif
4237#ifdef CONFIG_QS_S5K4E1
4238 &msm_camera_sensor_qs_s5k4e1,
4239#endif
4240#endif
4241#ifdef CONFIG_MSM_GEMINI
4242 &msm_gemini_device,
4243#endif
4244#ifdef CONFIG_MSM_VPE
4245 &msm_vpe_device,
4246#endif
4247 &msm_device_vidc,
4248};
4249
4250#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
4251enum {
4252 SX150X_CORE,
4253 SX150X_DOCKING,
4254 SX150X_SURF,
4255 SX150X_LEFT_FHA,
4256 SX150X_RIGHT_FHA,
4257 SX150X_SOUTH,
4258 SX150X_NORTH,
4259 SX150X_CORE_FLUID,
4260};
4261
4262static struct sx150x_platform_data sx150x_data[] __initdata = {
4263 [SX150X_CORE] = {
4264 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4265 .oscio_is_gpo = false,
4266 .io_pullup_ena = 0x0c08,
4267 .io_pulldn_ena = 0x4060,
4268 .io_open_drain_ena = 0x000c,
4269 .io_polarity = 0,
4270 .irq_summary = -1, /* see fixup_i2c_configs() */
4271 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4272 },
4273 [SX150X_DOCKING] = {
4274 .gpio_base = GPIO_DOCKING_EXPANDER_BASE,
4275 .oscio_is_gpo = false,
4276 .io_pullup_ena = 0x5e06,
4277 .io_pulldn_ena = 0x81b8,
4278 .io_open_drain_ena = 0,
4279 .io_polarity = 0,
4280 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4281 UI_INT2_N),
4282 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4283 GPIO_DOCKING_EXPANDER_BASE -
4284 GPIO_EXPANDER_GPIO_BASE,
4285 },
4286 [SX150X_SURF] = {
4287 .gpio_base = GPIO_SURF_EXPANDER_BASE,
4288 .oscio_is_gpo = false,
4289 .io_pullup_ena = 0,
4290 .io_pulldn_ena = 0,
4291 .io_open_drain_ena = 0,
4292 .io_polarity = 0,
4293 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4294 UI_INT1_N),
4295 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4296 GPIO_SURF_EXPANDER_BASE -
4297 GPIO_EXPANDER_GPIO_BASE,
4298 },
4299 [SX150X_LEFT_FHA] = {
4300 .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE,
4301 .oscio_is_gpo = false,
4302 .io_pullup_ena = 0,
4303 .io_pulldn_ena = 0x40,
4304 .io_open_drain_ena = 0,
4305 .io_polarity = 0,
4306 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4307 UI_INT3_N),
4308 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4309 GPIO_LEFT_KB_EXPANDER_BASE -
4310 GPIO_EXPANDER_GPIO_BASE,
4311 },
4312 [SX150X_RIGHT_FHA] = {
4313 .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE,
4314 .oscio_is_gpo = true,
4315 .io_pullup_ena = 0,
4316 .io_pulldn_ena = 0,
4317 .io_open_drain_ena = 0,
4318 .io_polarity = 0,
4319 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4320 UI_INT3_N),
4321 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4322 GPIO_RIGHT_KB_EXPANDER_BASE -
4323 GPIO_EXPANDER_GPIO_BASE,
4324 },
4325 [SX150X_SOUTH] = {
4326 .gpio_base = GPIO_SOUTH_EXPANDER_BASE,
4327 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4328 GPIO_SOUTH_EXPANDER_BASE -
4329 GPIO_EXPANDER_GPIO_BASE,
4330 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4331 },
4332 [SX150X_NORTH] = {
4333 .gpio_base = GPIO_NORTH_EXPANDER_BASE,
4334 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4335 GPIO_NORTH_EXPANDER_BASE -
4336 GPIO_EXPANDER_GPIO_BASE,
4337 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4338 .oscio_is_gpo = true,
4339 .io_open_drain_ena = 0x30,
4340 },
4341 [SX150X_CORE_FLUID] = {
4342 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4343 .oscio_is_gpo = false,
4344 .io_pullup_ena = 0x0408,
4345 .io_pulldn_ena = 0x4060,
4346 .io_open_drain_ena = 0x0008,
4347 .io_polarity = 0,
4348 .irq_summary = -1, /* see fixup_i2c_configs() */
4349 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4350 },
4351};
4352
4353#ifdef CONFIG_SENSORS_MSM_ADC
4354/* Configuration of EPM expander is done when client
4355 * request an adc read
4356 */
4357static struct sx150x_platform_data sx150x_epmdata = {
4358 .gpio_base = GPIO_EPM_EXPANDER_BASE,
4359 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4360 GPIO_EPM_EXPANDER_BASE -
4361 GPIO_EXPANDER_GPIO_BASE,
4362 .irq_summary = -1,
4363};
4364#endif
4365
4366/* sx150x_low_power_cfg
4367 *
4368 * This data and init function are used to put unused gpio-expander output
4369 * lines into their low-power states at boot. The init
4370 * function must be deferred until a later init stage because the i2c
4371 * gpio expander drivers do not probe until after they are registered
4372 * (see register_i2c_devices) and the work-queues for those registrations
4373 * are processed. Because these lines are unused, there is no risk of
4374 * competing with a device driver for the gpio.
4375 *
4376 * gpio lines whose low-power states are input are naturally in their low-
4377 * power configurations once probed, see the platform data structures above.
4378 */
4379struct sx150x_low_power_cfg {
4380 unsigned gpio;
4381 unsigned val;
4382};
4383
4384static struct sx150x_low_power_cfg
4385common_sx150x_lp_cfgs[] __initdata = {
4386 {GPIO_WLAN_DEEP_SLEEP_N, 0},
4387 {GPIO_EXT_GPS_LNA_EN, 0},
4388 {GPIO_MSM_WAKES_BT, 0},
4389 {GPIO_USB_UICC_EN, 0},
4390 {GPIO_BATT_GAUGE_EN, 0},
4391};
4392
4393static struct sx150x_low_power_cfg
4394surf_ffa_sx150x_lp_cfgs[] __initdata = {
4395 {GPIO_MIPI_DSI_RST_N, 0},
4396 {GPIO_DONGLE_PWR_EN, 0},
4397 {GPIO_CAP_TS_SLEEP, 1},
4398 {GPIO_WEB_CAMIF_RESET_N, 0},
4399};
4400
4401static void __init
4402cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems)
4403{
4404 unsigned n;
4405 int rc;
4406
4407 for (n = 0; n < nelems; ++n) {
4408 rc = gpio_request(cfgs[n].gpio, NULL);
4409 if (!rc) {
4410 rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val);
4411 gpio_free(cfgs[n].gpio);
4412 }
4413
4414 if (rc) {
4415 printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n",
4416 __func__, cfgs[n].gpio, rc);
4417 }
Steve Muckle9161d302010-02-11 11:50:40 -08004418 }
Steve Mucklea55df6e2010-01-07 12:43:24 -08004419}
4420
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004421static int __init cfg_sx150xs_low_power(void)
Steve Mucklea55df6e2010-01-07 12:43:24 -08004422{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004423 cfg_gpio_low_power(common_sx150x_lp_cfgs,
4424 ARRAY_SIZE(common_sx150x_lp_cfgs));
4425 if (!machine_is_msm8x60_fluid())
4426 cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs,
4427 ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs));
4428 return 0;
4429}
4430module_init(cfg_sx150xs_low_power);
4431
4432#ifdef CONFIG_I2C
4433static struct i2c_board_info core_expander_i2c_info[] __initdata = {
4434 {
4435 I2C_BOARD_INFO("sx1509q", 0x3e),
4436 .platform_data = &sx150x_data[SX150X_CORE]
4437 },
4438};
4439
4440static struct i2c_board_info docking_expander_i2c_info[] __initdata = {
4441 {
4442 I2C_BOARD_INFO("sx1509q", 0x3f),
4443 .platform_data = &sx150x_data[SX150X_DOCKING]
4444 },
4445};
4446
4447static struct i2c_board_info surf_expanders_i2c_info[] __initdata = {
4448 {
4449 I2C_BOARD_INFO("sx1509q", 0x70),
4450 .platform_data = &sx150x_data[SX150X_SURF]
4451 }
4452};
4453
4454static struct i2c_board_info fha_expanders_i2c_info[] __initdata = {
4455 {
4456 I2C_BOARD_INFO("sx1508q", 0x21),
4457 .platform_data = &sx150x_data[SX150X_LEFT_FHA]
4458 },
4459 {
4460 I2C_BOARD_INFO("sx1508q", 0x22),
4461 .platform_data = &sx150x_data[SX150X_RIGHT_FHA]
4462 }
4463};
4464
4465static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = {
4466 {
4467 I2C_BOARD_INFO("sx1508q", 0x23),
4468 .platform_data = &sx150x_data[SX150X_SOUTH]
4469 },
4470 {
4471 I2C_BOARD_INFO("sx1508q", 0x20),
4472 .platform_data = &sx150x_data[SX150X_NORTH]
4473 }
4474};
4475
4476static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = {
4477 {
4478 I2C_BOARD_INFO("sx1509q", 0x3e),
4479 .platform_data = &sx150x_data[SX150X_CORE_FLUID]
4480 },
4481};
4482
4483#ifdef CONFIG_SENSORS_MSM_ADC
4484static struct i2c_board_info fluid_expanders_i2c_epm_info[] = {
4485 {
4486 I2C_BOARD_INFO("sx1509q", 0x3e),
4487 .platform_data = &sx150x_epmdata
4488 },
4489};
4490#endif
4491#endif
4492#endif
4493
4494#ifdef CONFIG_SENSORS_MSM_ADC
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004495
4496static struct adc_access_fn xoadc_fn = {
4497 pm8058_xoadc_select_chan_and_start_conv,
4498 pm8058_xoadc_read_adc_code,
4499 pm8058_xoadc_get_properties,
4500 pm8058_xoadc_slot_request,
4501 pm8058_xoadc_restore_slot,
4502 pm8058_xoadc_calibrate,
4503};
4504
4505#if defined(CONFIG_I2C) && \
4506 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4507static struct regulator *vreg_adc_epm1;
4508
4509static struct i2c_client *epm_expander_i2c_register_board(void)
4510
4511{
4512 struct i2c_adapter *i2c_adap;
4513 struct i2c_client *client = NULL;
4514 i2c_adap = i2c_get_adapter(0x0);
4515
4516 if (i2c_adap == NULL)
4517 printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n");
4518
4519 if (i2c_adap != NULL)
4520 client = i2c_new_device(i2c_adap,
4521 &fluid_expanders_i2c_epm_info[0]);
4522 return client;
4523
4524}
4525
4526static unsigned int msm_adc_gpio_configure_expander_enable(void)
4527{
4528 int rc = 0;
4529 static struct i2c_client *epm_i2c_client;
4530
4531 printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n");
4532
4533 vreg_adc_epm1 = regulator_get(NULL, "8058_s3");
4534
4535 if (IS_ERR(vreg_adc_epm1)) {
4536 printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__);
4537 return 0;
4538 }
4539
4540 rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000);
4541 if (rc)
4542 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4543 "regulator set voltage failed\n");
4544
4545 rc = regulator_enable(vreg_adc_epm1);
4546 if (rc) {
4547 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4548 "Error while enabling regulator for epm s3 %d\n", rc);
4549 return rc;
4550 }
4551
4552 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start"
4553 " setting the value of the EPM 3.3, 5v and lvlsft\n");
4554
4555 msleep(1000);
4556
4557 rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v");
4558 if (!rc) {
4559 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4560 "Configure 5v boost\n");
4561 gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1);
4562 } else {
4563 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4564 "Error for epm 5v boost en\n");
4565 goto exit_vreg_epm;
4566 }
4567
4568 msleep(500);
4569
4570 rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v");
4571 if (!rc) {
4572 gpio_direction_output(GPIO_EPM_3_3V_EN, 1);
4573 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4574 "Configure epm 3.3v\n");
4575 } else {
4576 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4577 "Error for gpio 3.3ven\n");
4578 goto exit_vreg_epm;
4579 }
4580 msleep(500);
4581
4582 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4583 "Trying to request EPM LVLSFT_EN\n");
4584 rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en");
4585 if (!rc) {
4586 gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1);
4587 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4588 "Configure the lvlsft\n");
4589 } else {
4590 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4591 "Error for epm lvlsft_en\n");
4592 goto exit_vreg_epm;
4593 }
4594
4595 msleep(500);
4596
4597 if (!epm_i2c_client)
4598 epm_i2c_client = epm_expander_i2c_register_board();
4599
4600 rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable");
4601 if (!rc)
4602 rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
4603 if (rc) {
4604 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4605 ": GPIO PWR MON Enable issue\n");
4606 goto exit_vreg_epm;
4607 }
4608
4609 msleep(1000);
4610
4611 rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn");
4612 if (!rc) {
4613 rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
4614 if (rc) {
4615 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4616 ": ADC1_PWDN error direction out\n");
4617 goto exit_vreg_epm;
4618 }
4619 }
4620
4621 msleep(100);
4622
4623 rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn");
4624 if (!rc) {
4625 rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
4626 if (rc) {
4627 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4628 ": ADC2_PWD error direction out\n");
4629 goto exit_vreg_epm;
4630 }
4631 }
4632
4633 msleep(1000);
4634
4635 rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start");
4636 if (!rc) {
4637 rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
4638 if (rc) {
4639 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4640 "Gpio request problem %d\n", rc);
4641 goto exit_vreg_epm;
4642 }
4643 }
4644
4645 rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs");
4646 if (!rc) {
4647 rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
4648 if (rc) {
4649 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4650 ": EPM_SPI_ADC1_CS_N error\n");
4651 goto exit_vreg_epm;
4652 }
4653 }
4654
4655 rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs");
4656 if (!rc) {
4657 rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
4658 if (rc) {
4659 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4660 ": EPM_SPI_ADC2_Cs_N error\n");
4661 goto exit_vreg_epm;
4662 }
4663 }
4664
4665 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set "
4666 "the power monitor reset for epm\n");
4667
4668 rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n");
4669 if (!rc) {
4670 gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
4671 if (rc) {
4672 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4673 ": Error in the power mon reset\n");
4674 goto exit_vreg_epm;
4675 }
4676 }
4677
4678 msleep(1000);
4679
4680 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1);
4681
4682 msleep(500);
4683
4684 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4685
4686 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4687
4688 return rc;
4689
4690exit_vreg_epm:
4691 regulator_disable(vreg_adc_epm1);
4692
4693 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit."
4694 " rc = %d.\n", rc);
4695 return rc;
4696};
4697
4698static unsigned int msm_adc_gpio_configure_expander_disable(void)
4699{
4700 int rc = 0;
4701
4702 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0);
4703 gpio_free(GPIO_PWR_MON_RESET_N);
4704
4705 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4706 gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
4707
4708 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4709 gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
4710
4711 gpio_set_value_cansleep(GPIO_PWR_MON_START, 0);
4712 gpio_free(GPIO_PWR_MON_START);
4713
4714 gpio_direction_output(GPIO_ADC1_PWDN_N, 0);
4715 gpio_free(GPIO_ADC1_PWDN_N);
4716
4717 gpio_direction_output(GPIO_ADC2_PWDN_N, 0);
4718 gpio_free(GPIO_ADC2_PWDN_N);
4719
4720 gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0);
4721 gpio_free(GPIO_PWR_MON_ENABLE);
4722
4723 gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0);
4724 gpio_free(GPIO_EPM_LVLSFT_EN);
4725
4726 gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0);
4727 gpio_free(GPIO_EPM_5V_BOOST_EN);
4728
4729 gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0);
4730 gpio_free(GPIO_EPM_3_3V_EN);
4731
4732 rc = regulator_disable(vreg_adc_epm1);
4733 if (rc)
4734 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: "
4735 "Error while enabling regulator for epm s3 %d\n", rc);
4736 regulator_put(vreg_adc_epm1);
4737
4738 printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n");
4739 return rc;
4740};
4741
4742unsigned int msm_adc_gpio_expander_enable(int cs_enable)
4743{
4744 int rc = 0;
4745
4746 printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d",
4747 cs_enable);
4748
4749 if (cs_enable < 16) {
4750 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4751 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4752 } else {
4753 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4754 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4755 }
4756 return rc;
4757};
4758
4759unsigned int msm_adc_gpio_expander_disable(int cs_disable)
4760{
4761 int rc = 0;
4762
4763 printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n");
4764
4765 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4766
4767 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4768
4769 return rc;
4770};
4771#endif
4772
4773static struct msm_adc_channels msm_adc_channels_data[] = {
4774 {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2,
4775 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4776 {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1,
4777 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4778 {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3,
4779 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default},
4780 {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn,
4781 CHAN_PATH_TYPE4,
4782 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4783 {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5,
4784 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4785 {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11,
4786 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4787 {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12,
4788 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm},
4789 {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn,
4790 CHAN_PATH_TYPE12,
4791 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm},
4792 {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE,
4793 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm},
4794 {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn,
4795 CHAN_PATH_TYPE_NONE,
4796 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm},
4797 {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6,
4798 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4799 {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10,
4800 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1,
4801 scale_xtern_chgr_cur},
4802 {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8,
4803 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm},
4804 {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7,
4805 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm},
4806 {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9,
4807 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4808 {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15,
4809 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4810 {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13,
4811 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4812 {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14,
4813 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4814};
4815
4816static char *msm_adc_fluid_device_names[] = {
4817 "ADS_ADC1",
4818 "ADS_ADC2",
4819};
4820
4821static struct msm_adc_platform_data msm_adc_pdata = {
4822 .channel = msm_adc_channels_data,
4823 .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data),
4824#if defined(CONFIG_I2C) && \
4825 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4826 .adc_gpio_enable = msm_adc_gpio_expander_enable,
4827 .adc_gpio_disable = msm_adc_gpio_expander_disable,
4828 .adc_fluid_enable = msm_adc_gpio_configure_expander_enable,
4829 .adc_fluid_disable = msm_adc_gpio_configure_expander_disable,
4830#endif
4831};
4832
4833static struct platform_device msm_adc_device = {
4834 .name = "msm_adc",
4835 .id = -1,
4836 .dev = {
4837 .platform_data = &msm_adc_pdata,
4838 },
4839};
4840
4841static void pmic8058_xoadc_mpp_config(void)
4842{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304843 int rc, i;
4844 struct pm8xxx_mpp_init_info xoadc_mpps[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304845 PM8058_MPP_INIT(XOADC_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304846 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304847 PM8058_MPP_INIT(XOADC_MPP_5, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH9,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304848 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304849 PM8058_MPP_INIT(XOADC_MPP_7, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304850 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304851 PM8058_MPP_INIT(XOADC_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304852 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304853 PM8058_MPP_INIT(XOADC_MPP_10, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH7,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304854 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304855 PM8901_MPP_INIT(XOADC_MPP_4, D_OUTPUT, PM8901_MPP_DIG_LEVEL_S4,
4856 DOUT_CTRL_LOW),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304857 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004858
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304859 for (i = 0; i < ARRAY_SIZE(xoadc_mpps); i++) {
4860 rc = pm8xxx_mpp_config(xoadc_mpps[i].mpp,
4861 &xoadc_mpps[i].config);
4862 if (rc) {
4863 pr_err("%s: Config MPP %d of PM8058 failed\n",
4864 __func__, xoadc_mpps[i].mpp);
4865 }
4866 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004867}
4868
4869static struct regulator *vreg_ldo18_adc;
4870
4871static int pmic8058_xoadc_vreg_config(int on)
4872{
4873 int rc;
4874
4875 if (on) {
4876 rc = regulator_enable(vreg_ldo18_adc);
4877 if (rc)
4878 pr_err("%s: Enable of regulator ldo18_adc "
4879 "failed\n", __func__);
4880 } else {
4881 rc = regulator_disable(vreg_ldo18_adc);
4882 if (rc)
4883 pr_err("%s: Disable of regulator ldo18_adc "
4884 "failed\n", __func__);
4885 }
4886
4887 return rc;
4888}
4889
4890static int pmic8058_xoadc_vreg_setup(void)
4891{
4892 int rc;
4893
4894 vreg_ldo18_adc = regulator_get(NULL, "8058_l18");
4895 if (IS_ERR(vreg_ldo18_adc)) {
4896 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
4897 __func__, PTR_ERR(vreg_ldo18_adc));
4898 rc = PTR_ERR(vreg_ldo18_adc);
4899 goto fail;
4900 }
4901
4902 rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000);
4903 if (rc) {
4904 pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__);
4905 goto fail;
4906 }
4907
4908 return rc;
4909fail:
4910 regulator_put(vreg_ldo18_adc);
4911 return rc;
4912}
4913
4914static void pmic8058_xoadc_vreg_shutdown(void)
4915{
4916 regulator_put(vreg_ldo18_adc);
4917}
4918
4919/* usec. For this ADC,
4920 * this time represents clk rate @ txco w/ 1024 decimation ratio.
4921 * Each channel has different configuration, thus at the time of starting
4922 * the conversion, xoadc will return actual conversion time
4923 * */
4924static struct adc_properties pm8058_xoadc_data = {
4925 .adc_reference = 2200, /* milli-voltage for this adc */
4926 .bitresolution = 15,
4927 .bipolar = 0,
4928 .conversiontime = 54,
4929};
4930
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304931static struct xoadc_platform_data pm8058_xoadc_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004932 .xoadc_prop = &pm8058_xoadc_data,
4933 .xoadc_mpp_config = pmic8058_xoadc_mpp_config,
4934 .xoadc_vreg_set = pmic8058_xoadc_vreg_config,
4935 .xoadc_num = XOADC_PMIC_0,
4936 .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup,
4937 .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown,
4938};
4939#endif
4940
4941#ifdef CONFIG_MSM_SDIO_AL
4942
4943static unsigned mdm2ap_status = 140;
4944
4945static int configure_mdm2ap_status(int on)
4946{
4947 int ret = 0;
4948 if (on)
4949 ret = msm_gpiomux_get(mdm2ap_status);
4950 else
4951 ret = msm_gpiomux_put(mdm2ap_status);
4952
4953 if (ret)
4954 pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__,
4955 on);
4956
4957 return ret;
4958}
4959
4960
4961static int get_mdm2ap_status(void)
4962{
4963 return gpio_get_value(mdm2ap_status);
4964}
4965
4966static struct sdio_al_platform_data sdio_al_pdata = {
4967 .config_mdm2ap_status = configure_mdm2ap_status,
4968 .get_mdm2ap_status = get_mdm2ap_status,
4969 .allow_sdioc_version_major_2 = 0,
Konstantin Dorfmanee2e3082011-08-16 15:12:01 +03004970 .peer_sdioc_version_minor = 0x0202,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004971 .peer_sdioc_version_major = 0x0004,
4972 .peer_sdioc_boot_version_minor = 0x0001,
4973 .peer_sdioc_boot_version_major = 0x0003
4974};
4975
4976struct platform_device msm_device_sdio_al = {
4977 .name = "msm_sdio_al",
4978 .id = -1,
4979 .dev = {
Maya Erez6862b142011-08-22 09:07:07 +03004980 .parent = &msm_charm_modem.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004981 .platform_data = &sdio_al_pdata,
4982 },
4983};
4984
4985#endif /* CONFIG_MSM_SDIO_AL */
4986
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304987#define GPIO_VREG_ID_EXT_5V 0
4988
4989static struct regulator_consumer_supply vreg_consumers_EXT_5V[] = {
4990 REGULATOR_SUPPLY("ext_5v", NULL),
4991 REGULATOR_SUPPLY("8901_mpp0", NULL),
4992};
4993
4994#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \
4995 [GPIO_VREG_ID_##_id] = { \
4996 .init_data = { \
4997 .constraints = { \
4998 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
4999 }, \
5000 .num_consumer_supplies = \
5001 ARRAY_SIZE(vreg_consumers_##_id), \
5002 .consumer_supplies = vreg_consumers_##_id, \
5003 }, \
5004 .regulator_name = _reg_name, \
5005 .active_low = _active_low, \
5006 .gpio_label = _gpio_label, \
5007 .gpio = _gpio, \
5008 }
5009
5010/* GPIO regulator constraints */
5011static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
5012 GPIO_VREG_INIT(EXT_5V, "ext_5v", "ext_5v_en",
5013 PM8901_MPP_PM_TO_SYS(0), 0),
5014};
5015
5016/* GPIO regulator */
5017static struct platform_device msm8x60_8901_mpp_vreg __devinitdata = {
5018 .name = GPIO_REGULATOR_DEV_NAME,
5019 .id = PM8901_MPP_PM_TO_SYS(0),
5020 .dev = {
5021 .platform_data =
5022 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
5023 },
5024};
5025
5026static void __init pm8901_vreg_mpp0_init(void)
5027{
5028 int rc;
5029
5030 struct pm8xxx_mpp_init_info pm8901_vreg_mpp0 = {
5031 .mpp = PM8901_MPP_PM_TO_SYS(0),
5032 .config = {
5033 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
5034 .level = PM8901_MPP_DIG_LEVEL_VPH,
5035 },
5036 };
5037
5038 /*
5039 * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This
5040 * implies that the regulator connected to MPP0 is enabled when
5041 * MPP0 is low.
5042 */
5043 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) {
5044 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 1;
5045 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
5046 } else {
5047 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 0;
5048 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_LOW;
5049 }
5050
5051 rc = pm8xxx_mpp_config(pm8901_vreg_mpp0.mpp, &pm8901_vreg_mpp0.config);
5052 if (rc)
5053 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
5054}
5055
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005056static struct platform_device *charm_devices[] __initdata = {
5057 &msm_charm_modem,
5058#ifdef CONFIG_MSM_SDIO_AL
5059 &msm_device_sdio_al,
5060#endif
5061};
5062
Lei Zhou338cab82011-08-19 13:38:17 -04005063#ifdef CONFIG_SND_SOC_MSM8660_APQ
5064static struct platform_device *dragon_alsa_devices[] __initdata = {
5065 &msm_pcm,
5066 &msm_pcm_routing,
5067 &msm_cpudai0,
5068 &msm_cpudai1,
5069 &msm_cpudai_hdmi_rx,
5070 &msm_cpudai_bt_rx,
5071 &msm_cpudai_bt_tx,
5072 &msm_cpudai_fm_rx,
5073 &msm_cpudai_fm_tx,
5074 &msm_cpu_fe,
5075 &msm_stub_codec,
5076 &msm_lpa_pcm,
5077};
5078#endif
5079
5080static struct platform_device *asoc_devices[] __initdata = {
5081 &asoc_msm_pcm,
5082 &asoc_msm_dai0,
5083 &asoc_msm_dai1,
5084};
5085
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005086static struct platform_device *surf_devices[] __initdata = {
5087 &msm_device_smd,
5088 &msm_device_uart_dm12,
Stephen Boyd3acc9e42011-09-28 16:46:40 -07005089 &msm_pil_q6v3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005090#ifdef CONFIG_I2C_QUP
5091 &msm_gsbi3_qup_i2c_device,
5092 &msm_gsbi4_qup_i2c_device,
5093 &msm_gsbi7_qup_i2c_device,
5094 &msm_gsbi8_qup_i2c_device,
5095 &msm_gsbi9_qup_i2c_device,
5096 &msm_gsbi12_qup_i2c_device,
5097#endif
5098#ifdef CONFIG_SERIAL_MSM_HS
5099 &msm_device_uart_dm1,
5100#endif
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305101#ifdef CONFIG_MSM_SSBI
5102 &msm_device_ssbi_pmic1,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05305103 &msm_device_ssbi_pmic2,
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305104#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005105#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005106 &msm_device_ssbi3,
5107#endif
5108#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
5109 &isp1763_device,
5110#endif
5111
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005112#if defined (CONFIG_MSM_8x60_VOIP)
5113 &asoc_msm_mvs,
5114 &asoc_mvs_dai0,
5115 &asoc_mvs_dai1,
5116#endif
Lei Zhou338cab82011-08-19 13:38:17 -04005117
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005118#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
5119 &msm_device_otg,
5120#endif
5121#ifdef CONFIG_USB_GADGET_MSM_72K
5122 &msm_device_gadget_peripheral,
5123#endif
5124#ifdef CONFIG_USB_G_ANDROID
5125 &android_usb_device,
5126#endif
5127#ifdef CONFIG_BATTERY_MSM
5128 &msm_batt_device,
5129#endif
5130#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005131#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005132 &android_pmem_device,
5133 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005134 &android_pmem_smipool_device,
5135#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005136 &android_pmem_audio_device,
5137#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005138#ifdef CONFIG_MSM_ROTATOR
5139 &msm_rotator_device,
5140#endif
5141 &msm_fb_device,
5142 &msm_kgsl_3d0,
5143 &msm_kgsl_2d0,
5144 &msm_kgsl_2d1,
5145 &lcdc_samsung_panel_device,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005146#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5147 &lcdc_nt35582_panel_device,
5148#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005149#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
5150 &lcdc_samsung_oled_panel_device,
5151#endif
5152#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
5153 &lcdc_auo_wvga_panel_device,
5154#endif
5155#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
5156 &hdmi_msm_device,
5157#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
5158#ifdef CONFIG_FB_MSM_MIPI_DSI
5159 &mipi_dsi_toshiba_panel_device,
5160 &mipi_dsi_novatek_panel_device,
5161#endif
5162#ifdef CONFIG_MSM_CAMERA
5163#ifdef CONFIG_MT9E013
5164 &msm_camera_sensor_mt9e013,
5165#endif
5166#ifdef CONFIG_IMX074
5167 &msm_camera_sensor_imx074,
5168#endif
5169#ifdef CONFIG_WEBCAM_OV7692
5170 &msm_camera_sensor_webcam_ov7692,
5171#endif
5172#ifdef CONFIG_WEBCAM_OV9726
5173 &msm_camera_sensor_webcam_ov9726,
5174#endif
5175#ifdef CONFIG_QS_S5K4E1
5176 &msm_camera_sensor_qs_s5k4e1,
5177#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04005178#ifdef CONFIG_VX6953
5179 &msm_camera_sensor_vx6953,
5180#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005181#endif
5182#ifdef CONFIG_MSM_GEMINI
5183 &msm_gemini_device,
5184#endif
5185#ifdef CONFIG_MSM_VPE
5186 &msm_vpe_device,
5187#endif
5188
5189#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
5190 &msm_rpm_log_device,
5191#endif
5192#if defined(CONFIG_MSM_RPM_STATS_LOG)
5193 &msm_rpm_stat_device,
5194#endif
5195 &msm_device_vidc,
5196#if (defined(CONFIG_MARIMBA_CORE)) && \
5197 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
5198 &msm_bt_power_device,
5199#endif
5200#ifdef CONFIG_SENSORS_MSM_ADC
5201 &msm_adc_device,
5202#endif
David Collins6f032ba2011-08-31 14:08:15 -07005203 &rpm_regulator_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005204
5205#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
5206 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
5207 &qcrypto_device,
5208#endif
5209
5210#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
5211 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
5212 &qcedev_device,
5213#endif
5214
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005215
5216#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
5217#ifdef CONFIG_MSM_USE_TSIF1
5218 &msm_device_tsif[1],
5219#else
5220 &msm_device_tsif[0],
5221#endif /* CONFIG_MSM_USE_TSIF1 */
5222#endif /* CONFIG_TSIF */
5223
5224#ifdef CONFIG_HW_RANDOM_MSM
5225 &msm_device_rng,
5226#endif
5227
5228 &msm_tsens_device,
Praveen Chidambaram043f4ce2011-08-02 09:37:59 -06005229 &msm_rpm_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005230#ifdef CONFIG_ION_MSM
5231 &ion_dev,
5232#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -07005233 &msm8660_device_watchdog,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005234};
5235
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005236#ifdef CONFIG_ION_MSM
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005237static struct ion_platform_data ion_pdata = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005238 .nr = MSM_ION_HEAP_NUM,
5239 .heaps = {
5240 {
5241 .id = ION_HEAP_SYSTEM_ID,
5242 .type = ION_HEAP_TYPE_SYSTEM,
5243 .name = ION_VMALLOC_HEAP_NAME,
5244 },
5245 {
5246 .id = ION_HEAP_SYSTEM_CONTIG_ID,
5247 .type = ION_HEAP_TYPE_SYSTEM_CONTIG,
5248 .name = ION_KMALLOC_HEAP_NAME,
5249 },
5250#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5251 {
5252 .id = ION_HEAP_EBI_ID,
5253 .type = ION_HEAP_TYPE_CARVEOUT,
5254 .name = ION_EBI1_HEAP_NAME,
5255 .size = MSM_ION_EBI_SIZE,
5256 .memory_type = ION_EBI_TYPE,
5257 },
5258 {
5259 .id = ION_HEAP_ADSP_ID,
5260 .type = ION_HEAP_TYPE_CARVEOUT,
5261 .name = ION_ADSP_HEAP_NAME,
5262 .size = MSM_ION_ADSP_SIZE,
5263 .memory_type = ION_EBI_TYPE,
5264 },
5265 {
5266 .id = ION_HEAP_SMI_ID,
5267 .type = ION_HEAP_TYPE_CARVEOUT,
5268 .name = ION_SMI_HEAP_NAME,
5269 .size = MSM_ION_SMI_SIZE,
5270 .memory_type = ION_SMI_TYPE,
5271 },
5272#endif
5273 }
5274};
5275
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005276static struct platform_device ion_dev = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005277 .name = "ion-msm",
5278 .id = 1,
5279 .dev = { .platform_data = &ion_pdata },
5280};
5281#endif
5282
5283
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005284static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
5285 /* Kernel SMI memory pool for video core, used for firmware */
5286 /* and encoder, decoder scratch buffers */
5287 /* Kernel SMI memory pool should always precede the user space */
5288 /* SMI memory pool, as the video core will use offset address */
5289 /* from the Firmware base */
5290 [MEMTYPE_SMI_KERNEL] = {
5291 .start = KERNEL_SMI_BASE,
5292 .limit = KERNEL_SMI_SIZE,
5293 .size = KERNEL_SMI_SIZE,
5294 .flags = MEMTYPE_FLAGS_FIXED,
5295 },
5296 /* User space SMI memory pool for video core */
5297 /* used for encoder, decoder input & output buffers */
5298 [MEMTYPE_SMI] = {
5299 .start = USER_SMI_BASE,
5300 .limit = USER_SMI_SIZE,
5301 .flags = MEMTYPE_FLAGS_FIXED,
5302 },
5303 [MEMTYPE_EBI0] = {
5304 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5305 },
5306 [MEMTYPE_EBI1] = {
5307 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5308 },
5309};
5310
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005311static void reserve_ion_memory(void)
5312{
5313#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
5314 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_EBI_SIZE;
5315 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_ADSP_SIZE;
5316 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_SMI_SIZE;
5317#endif
5318}
5319
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005320static void __init size_pmem_devices(void)
5321{
5322#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005323#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005324 android_pmem_adsp_pdata.size = pmem_adsp_size;
5325 android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005326 android_pmem_pdata.size = pmem_sf_size;
5327#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005328 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
5329#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005330}
5331
5332static void __init reserve_memory_for(struct android_pmem_platform_data *p)
5333{
5334 msm8x60_reserve_table[p->memory_type].size += p->size;
5335}
5336
5337static void __init reserve_pmem_memory(void)
5338{
5339#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005340#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005341 reserve_memory_for(&android_pmem_adsp_pdata);
5342 reserve_memory_for(&android_pmem_smipool_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005343 reserve_memory_for(&android_pmem_pdata);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005344#endif
5345 reserve_memory_for(&android_pmem_audio_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005346 msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
5347#endif
5348}
5349
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005350
5351
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005352static void __init msm8x60_calculate_reserve_sizes(void)
5353{
5354 size_pmem_devices();
5355 reserve_pmem_memory();
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005356 reserve_ion_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005357}
5358
5359static int msm8x60_paddr_to_memtype(unsigned int paddr)
5360{
5361 if (paddr >= 0x40000000 && paddr < 0x60000000)
5362 return MEMTYPE_EBI1;
5363 if (paddr >= 0x38000000 && paddr < 0x40000000)
5364 return MEMTYPE_SMI;
5365 return MEMTYPE_NONE;
5366}
5367
5368static struct reserve_info msm8x60_reserve_info __initdata = {
5369 .memtype_reserve_table = msm8x60_reserve_table,
5370 .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes,
5371 .paddr_to_memtype = msm8x60_paddr_to_memtype,
5372};
5373
5374static void __init msm8x60_reserve(void)
5375{
5376 reserve_info = &msm8x60_reserve_info;
5377 msm_reserve();
5378}
5379
5380#define EXT_CHG_VALID_MPP 10
5381#define EXT_CHG_VALID_MPP_2 11
5382
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305383static struct pm8xxx_mpp_init_info isl_mpp[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305384 PM8058_MPP_INIT(EXT_CHG_VALID_MPP, D_INPUT,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305385 PM8058_MPP_DIG_LEVEL_S3, DIN_TO_INT),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305386 PM8058_MPP_INIT(EXT_CHG_VALID_MPP_2, D_BI_DIR,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305387 PM8058_MPP_DIG_LEVEL_S3, BI_PULLUP_10KOHM),
5388};
5389
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005390#ifdef CONFIG_ISL9519_CHARGER
5391static int isl_detection_setup(void)
5392{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305393 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005394
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305395 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5396 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5397 &isl_mpp[i].config);
5398 if (ret) {
5399 pr_err("%s: Config MPP %d of PM8058 failed\n",
5400 __func__, isl_mpp[i].mpp);
5401 return ret;
5402 }
5403 }
5404
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005405 return ret;
5406}
5407
5408static struct isl_platform_data isl_data __initdata = {
5409 .chgcurrent = 700,
5410 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5411 .chg_detection_config = isl_detection_setup,
5412 .max_system_voltage = 4200,
5413 .min_system_voltage = 3200,
5414 .term_current = 120,
5415 .input_current = 2048,
5416};
5417
5418static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
5419 {
5420 I2C_BOARD_INFO("isl9519q", 0x9),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305421 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005422 .platform_data = &isl_data,
5423 },
5424};
5425#endif
5426
5427#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
5428static int smb137b_detection_setup(void)
5429{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305430 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005431
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305432 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5433 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5434 &isl_mpp[i].config);
5435 if (ret) {
5436 pr_err("%s: Config MPP %d of PM8058 failed\n",
5437 __func__, isl_mpp[i].mpp);
5438 return ret;
5439 }
5440 }
5441
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005442 return ret;
5443}
5444
5445static struct smb137b_platform_data smb137b_data __initdata = {
5446 .chg_detection_config = smb137b_detection_setup,
5447 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5448 .batt_mah_rating = 950,
5449};
5450
5451static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = {
5452 {
5453 I2C_BOARD_INFO("smb137b", 0x08),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305454 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005455 .platform_data = &smb137b_data,
5456 },
5457};
5458#endif
5459
5460#ifdef CONFIG_PMIC8058
5461#define PMIC_GPIO_SDC3_DET 22
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305462#define PMIC_GPIO_TOUCH_DISC_INTR 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005463
5464static int pm8058_gpios_init(void)
5465{
5466 int i;
5467 int rc;
5468 struct pm8058_gpio_cfg {
5469 int gpio;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305470 struct pm_gpio cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005471 };
5472
5473 struct pm8058_gpio_cfg gpio_cfgs[] = {
5474 { /* FFA ethernet */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305475 PM8058_GPIO_PM_TO_SYS(6),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005476 {
5477 .direction = PM_GPIO_DIR_IN,
5478 .pull = PM_GPIO_PULL_DN,
5479 .vin_sel = 2,
5480 .function = PM_GPIO_FUNC_NORMAL,
5481 .inv_int_pol = 0,
5482 },
5483 },
5484#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
5485 {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305486 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005487 {
5488 .direction = PM_GPIO_DIR_IN,
5489 .pull = PM_GPIO_PULL_UP_30,
5490 .vin_sel = 2,
5491 .function = PM_GPIO_FUNC_NORMAL,
5492 .inv_int_pol = 0,
5493 },
5494 },
5495#endif
5496 { /* core&surf gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305497 PM8058_GPIO_PM_TO_SYS(UI_INT1_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005498 {
5499 .direction = PM_GPIO_DIR_IN,
5500 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305501 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005502 .function = PM_GPIO_FUNC_NORMAL,
5503 .inv_int_pol = 0,
5504 },
5505 },
5506 { /* docking gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305507 PM8058_GPIO_PM_TO_SYS(UI_INT2_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005508 {
5509 .direction = PM_GPIO_DIR_IN,
5510 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305511 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005512 .function = PM_GPIO_FUNC_NORMAL,
5513 .inv_int_pol = 0,
5514 },
5515 },
5516 { /* FHA/keypad gpio expanders */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305517 PM8058_GPIO_PM_TO_SYS(UI_INT3_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005518 {
5519 .direction = PM_GPIO_DIR_IN,
5520 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305521 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005522 .function = PM_GPIO_FUNC_NORMAL,
5523 .inv_int_pol = 0,
5524 },
5525 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005526 { /* Timpani Reset */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305527 PM8058_GPIO_PM_TO_SYS(20),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005528 {
5529 .direction = PM_GPIO_DIR_OUT,
5530 .output_value = 1,
5531 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5532 .pull = PM_GPIO_PULL_DN,
5533 .out_strength = PM_GPIO_STRENGTH_HIGH,
5534 .function = PM_GPIO_FUNC_NORMAL,
5535 .vin_sel = 2,
5536 .inv_int_pol = 0,
5537 }
5538 },
5539 { /* PMIC ID interrupt */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305540 PM8058_GPIO_PM_TO_SYS(36),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005541 {
5542 .direction = PM_GPIO_DIR_IN,
Anji jonnalaae745e92011-11-14 18:34:31 +05305543 .pull = PM_GPIO_PULL_NO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005544 .function = PM_GPIO_FUNC_NORMAL,
5545 .vin_sel = 2,
5546 .inv_int_pol = 0,
5547 }
5548 },
5549 };
5550
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305551#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5552 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305553 struct pm_gpio touchdisc_intr_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305554 .direction = PM_GPIO_DIR_IN,
5555 .pull = PM_GPIO_PULL_UP_1P5,
5556 .vin_sel = 2,
5557 .function = PM_GPIO_FUNC_NORMAL,
5558 };
5559#endif
5560
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005561#if defined(CONFIG_HAPTIC_ISA1200) || \
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305562 defined(CONFIG_HAPTIC_ISA1200_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305563 struct pm_gpio en_hap_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305564 .direction = PM_GPIO_DIR_OUT,
5565 .pull = PM_GPIO_PULL_NO,
5566 .out_strength = PM_GPIO_STRENGTH_HIGH,
5567 .function = PM_GPIO_FUNC_NORMAL,
5568 .inv_int_pol = 0,
5569 .vin_sel = 2,
5570 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5571 .output_value = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005572 };
5573#endif
5574
5575#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5576 struct pm8058_gpio_cfg line_in_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305577 PM8058_GPIO_PM_TO_SYS(18),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005578 {
5579 .direction = PM_GPIO_DIR_IN,
5580 .pull = PM_GPIO_PULL_UP_1P5,
5581 .vin_sel = 2,
5582 .function = PM_GPIO_FUNC_NORMAL,
5583 .inv_int_pol = 0,
5584 }
5585 };
5586#endif
5587
5588#if defined(CONFIG_QS_S5K4E1)
5589 {
5590 struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305591 PM8058_GPIO_PM_TO_SYS(26),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005592 {
5593 .direction = PM_GPIO_DIR_OUT,
5594 .output_value = 0,
5595 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5596 .pull = PM_GPIO_PULL_DN,
5597 .out_strength = PM_GPIO_STRENGTH_HIGH,
5598 .function = PM_GPIO_FUNC_NORMAL,
5599 .vin_sel = 2,
5600 .inv_int_pol = 0,
5601 }
5602 };
5603#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005604#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5605 struct pm8058_gpio_cfg pmic_lcdc_nt35582_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305606 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1),
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005607 {
5608 .direction = PM_GPIO_DIR_OUT,
5609 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5610 .output_value = 1,
5611 .pull = PM_GPIO_PULL_UP_30,
5612 /* 2.9V PM_GPIO_VIN_L2, which gives 2.6V */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305613 .vin_sel = PM8058_GPIO_VIN_L5,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005614 .out_strength = PM_GPIO_STRENGTH_HIGH,
5615 .function = PM_GPIO_FUNC_NORMAL,
5616 .inv_int_pol = 0,
5617 }
5618 };
5619#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005620#if defined(CONFIG_HAPTIC_ISA1200) || \
5621 defined(CONFIG_HAPTIC_ISA1200_MODULE)
5622 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305623 rc = pm8xxx_gpio_config(
5624 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
5625 &en_hap_gpio_cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005626 if (rc < 0) {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305627 pr_err("%s: pmic haptics gpio config failed\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005628 __func__);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305629 }
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305630 rc = pm8xxx_gpio_config(
5631 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
5632 &en_hap_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305633 if (rc < 0) {
5634 pr_err("%s: pmic haptics ldo gpio config failed\n",
5635 __func__);
5636 }
5637
5638 }
5639#endif
5640
5641#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5642 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
5643 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
5644 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305645 rc = pm8xxx_gpio_config(
5646 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_TOUCH_DISC_INTR),
5647 &touchdisc_intr_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305648 if (rc < 0) {
5649 pr_err("%s: Touchdisc interrupt gpio config failed\n",
5650 __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005651 }
5652 }
5653#endif
5654
5655#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5656 /* Line_in only for 8660 ffa & surf */
5657 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04005658 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005659 machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305660 rc = pm8xxx_gpio_config(line_in_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005661 &line_in_gpio_cfg.cfg);
5662 if (rc < 0) {
5663 pr_err("%s pmic line_in gpio config failed\n",
5664 __func__);
5665 return rc;
5666 }
5667 }
5668#endif
5669
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005670#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5671 if (machine_is_msm8x60_dragon()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305672 rc = pm8xxx_gpio_config(pmic_lcdc_nt35582_gpio_cfg.gpio,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005673 &pmic_lcdc_nt35582_gpio_cfg.cfg);
5674 if (rc < 0) {
5675 pr_err("%s pmic gpio config failed\n", __func__);
5676 return rc;
5677 }
5678 }
5679#endif
5680
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005681#if defined(CONFIG_QS_S5K4E1)
5682 /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/
5683 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305684 rc = pm8xxx_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005685 &qs_hc37_cam_pd_gpio_cfg.cfg);
5686 if (rc < 0) {
5687 pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n",
5688 __func__);
5689 return rc;
5690 }
5691 }
5692 }
5693#endif
5694
5695 for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305696 rc = pm8xxx_gpio_config(gpio_cfgs[i].gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005697 &gpio_cfgs[i].cfg);
5698 if (rc < 0) {
5699 pr_err("%s pmic gpio config failed\n",
5700 __func__);
5701 return rc;
5702 }
5703 }
5704
5705 return 0;
5706}
5707
5708static const unsigned int ffa_keymap[] = {
5709 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5710 KEY(0, 1, KEY_UP), /* NAV - UP */
5711 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5712 KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */
5713
5714 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5715 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5716 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5717 KEY(1, 3, KEY_VOLUMEDOWN),
5718
5719 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5720
5721 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5722 KEY(4, 1, KEY_UP), /* USER_UP */
5723 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5724 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5725 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5726
5727 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
5728 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5729 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5730 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5731 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5732};
5733
Zhang Chang Ken683be172011-08-10 17:45:34 -04005734static const unsigned int dragon_keymap[] = {
5735 KEY(0, 0, KEY_MENU),
5736 KEY(0, 2, KEY_1),
5737 KEY(0, 3, KEY_4),
5738 KEY(0, 4, KEY_7),
5739
5740 KEY(1, 0, KEY_UP),
5741 KEY(1, 1, KEY_LEFT),
5742 KEY(1, 2, KEY_DOWN),
5743 KEY(1, 3, KEY_5),
5744 KEY(1, 4, KEY_8),
5745
5746 KEY(2, 0, KEY_HOME),
5747 KEY(2, 1, KEY_REPLY),
5748 KEY(2, 2, KEY_2),
5749 KEY(2, 3, KEY_6),
5750 KEY(2, 4, KEY_0),
5751
5752 KEY(3, 0, KEY_VOLUMEUP),
5753 KEY(3, 1, KEY_RIGHT),
5754 KEY(3, 2, KEY_3),
5755 KEY(3, 3, KEY_9),
5756 KEY(3, 4, KEY_SWITCHVIDEOMODE),
5757
5758 KEY(4, 0, KEY_VOLUMEDOWN),
5759 KEY(4, 1, KEY_BACK),
5760 KEY(4, 2, KEY_CAMERA),
5761 KEY(4, 3, KEY_KBDILLUMTOGGLE),
5762};
5763
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005764static struct matrix_keymap_data ffa_keymap_data = {
5765 .keymap_size = ARRAY_SIZE(ffa_keymap),
5766 .keymap = ffa_keymap,
5767};
5768
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305769static struct pm8xxx_keypad_platform_data ffa_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005770 .input_name = "ffa-keypad",
5771 .input_phys_device = "ffa-keypad/input0",
5772 .num_rows = 6,
5773 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305774 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5775 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5776 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005777 .scan_delay_ms = 32,
5778 .row_hold_ns = 91500,
5779 .wakeup = 1,
5780 .keymap_data = &ffa_keymap_data,
5781};
5782
Zhang Chang Ken683be172011-08-10 17:45:34 -04005783static struct matrix_keymap_data dragon_keymap_data = {
5784 .keymap_size = ARRAY_SIZE(dragon_keymap),
5785 .keymap = dragon_keymap,
5786};
5787
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305788static struct pm8xxx_keypad_platform_data dragon_keypad_data = {
Zhang Chang Ken683be172011-08-10 17:45:34 -04005789 .input_name = "dragon-keypad",
5790 .input_phys_device = "dragon-keypad/input0",
5791 .num_rows = 6,
5792 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305793 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5794 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5795 .debounce_ms = 15,
Zhang Chang Ken683be172011-08-10 17:45:34 -04005796 .scan_delay_ms = 32,
5797 .row_hold_ns = 91500,
5798 .wakeup = 1,
5799 .keymap_data = &dragon_keymap_data,
5800};
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305801
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005802static const unsigned int fluid_keymap[] = {
5803 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5804 KEY(0, 1, KEY_UP), /* NAV - UP */
5805 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5806 KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */
5807
5808 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5809 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5810 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5811 KEY(1, 3, KEY_VOLUMEUP),
5812
5813 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5814
5815 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5816 KEY(4, 1, KEY_UP), /* USER_UP */
5817 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5818 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5819 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5820
Jilai Wang9a895102011-07-12 14:00:35 -04005821 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005822 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5823 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5824 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5825 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5826};
5827
5828static struct matrix_keymap_data fluid_keymap_data = {
5829 .keymap_size = ARRAY_SIZE(fluid_keymap),
5830 .keymap = fluid_keymap,
5831};
5832
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305833static struct pm8xxx_keypad_platform_data fluid_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005834 .input_name = "fluid-keypad",
5835 .input_phys_device = "fluid-keypad/input0",
5836 .num_rows = 6,
5837 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305838 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5839 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5840 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005841 .scan_delay_ms = 32,
5842 .row_hold_ns = 91500,
5843 .wakeup = 1,
5844 .keymap_data = &fluid_keymap_data,
5845};
5846
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305847static struct pm8xxx_vibrator_platform_data pm8058_vib_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005848 .initial_vibrate_ms = 500,
5849 .level_mV = 3000,
5850 .max_timeout_ms = 15000,
5851};
5852
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305853static struct pm8xxx_rtc_platform_data pm8058_rtc_pdata = {
5854 .rtc_write_enable = false,
5855 .rtc_alarm_powerup = false,
5856};
5857
5858static struct pm8xxx_pwrkey_platform_data pm8058_pwrkey_pdata = {
5859 .pull_up = 1,
Jing Lineecdc062011-11-17 09:47:09 -08005860 .kpd_trigger_delay_us = 15625,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305861 .wakeup = 1,
5862};
5863
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005864#define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18)
5865
5866static struct othc_accessory_info othc_accessories[] = {
5867 {
5868 .accessory = OTHC_SVIDEO_OUT,
5869 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT
5870 | OTHC_ADC_DETECT,
5871 .key_code = SW_VIDEOOUT_INSERT,
5872 .enabled = false,
5873 .adc_thres = {
5874 .min_threshold = 20,
5875 .max_threshold = 40,
5876 },
5877 },
5878 {
5879 .accessory = OTHC_ANC_HEADPHONE,
5880 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT |
5881 OTHC_SWITCH_DETECT,
5882 .gpio = PM8058_LINE_IN_DET_GPIO,
5883 .active_low = 1,
5884 .key_code = SW_HEADPHONE_INSERT,
5885 .enabled = true,
5886 },
5887 {
5888 .accessory = OTHC_ANC_HEADSET,
5889 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT,
5890 .gpio = PM8058_LINE_IN_DET_GPIO,
5891 .active_low = 1,
5892 .key_code = SW_HEADPHONE_INSERT,
5893 .enabled = true,
5894 },
5895 {
5896 .accessory = OTHC_HEADPHONE,
5897 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT,
5898 .key_code = SW_HEADPHONE_INSERT,
5899 .enabled = true,
5900 },
5901 {
5902 .accessory = OTHC_MICROPHONE,
5903 .detect_flags = OTHC_GPIO_DETECT,
5904 .gpio = PM8058_LINE_IN_DET_GPIO,
5905 .active_low = 1,
5906 .key_code = SW_MICROPHONE_INSERT,
5907 .enabled = true,
5908 },
5909 {
5910 .accessory = OTHC_HEADSET,
5911 .detect_flags = OTHC_MICBIAS_DETECT,
5912 .key_code = SW_HEADPHONE_INSERT,
5913 .enabled = true,
5914 },
5915};
5916
5917static struct othc_switch_info switch_info[] = {
5918 {
5919 .min_adc_threshold = 0,
5920 .max_adc_threshold = 100,
5921 .key_code = KEY_PLAYPAUSE,
5922 },
5923 {
5924 .min_adc_threshold = 100,
5925 .max_adc_threshold = 200,
5926 .key_code = KEY_REWIND,
5927 },
5928 {
5929 .min_adc_threshold = 200,
5930 .max_adc_threshold = 500,
5931 .key_code = KEY_FASTFORWARD,
5932 },
5933};
5934
5935static struct othc_n_switch_config switch_config = {
5936 .voltage_settling_time_ms = 0,
5937 .num_adc_samples = 3,
5938 .adc_channel = CHANNEL_ADC_HDSET,
5939 .switch_info = switch_info,
5940 .num_keys = ARRAY_SIZE(switch_info),
5941 .default_sw_en = true,
5942 .default_sw_idx = 0,
5943};
5944
5945static struct hsed_bias_config hsed_bias_config = {
5946 /* HSED mic bias config info */
5947 .othc_headset = OTHC_HEADSET_NO,
5948 .othc_lowcurr_thresh_uA = 100,
5949 .othc_highcurr_thresh_uA = 600,
5950 .othc_hyst_prediv_us = 7800,
5951 .othc_period_clkdiv_us = 62500,
5952 .othc_hyst_clk_us = 121000,
5953 .othc_period_clk_us = 312500,
5954 .othc_wakeup = 1,
5955};
5956
5957static struct othc_hsed_config hsed_config_1 = {
5958 .hsed_bias_config = &hsed_bias_config,
5959 /*
5960 * The detection delay and switch reporting delay are
5961 * required to encounter a hardware bug (spurious switch
5962 * interrupts on slow insertion/removal of the headset).
5963 * This will introduce a delay in reporting the accessory
5964 * insertion and removal to the userspace.
5965 */
5966 .detection_delay_ms = 1500,
5967 /* Switch info */
5968 .switch_debounce_ms = 1500,
5969 .othc_support_n_switch = false,
5970 .switch_config = &switch_config,
5971 .ir_gpio = -1,
5972 /* Accessory info */
5973 .accessories_support = true,
5974 .accessories = othc_accessories,
5975 .othc_num_accessories = ARRAY_SIZE(othc_accessories),
5976};
5977
5978static struct othc_regulator_config othc_reg = {
5979 .regulator = "8058_l5",
5980 .max_uV = 2850000,
5981 .min_uV = 2850000,
5982};
5983
5984/* MIC_BIAS0 is configured as normal MIC BIAS */
5985static struct pmic8058_othc_config_pdata othc_config_pdata_0 = {
5986 .micbias_select = OTHC_MICBIAS_0,
5987 .micbias_capability = OTHC_MICBIAS,
5988 .micbias_enable = OTHC_SIGNAL_OFF,
5989 .micbias_regulator = &othc_reg,
5990};
5991
5992/* MIC_BIAS1 is configured as HSED_BIAS for OTHC */
5993static struct pmic8058_othc_config_pdata othc_config_pdata_1 = {
5994 .micbias_select = OTHC_MICBIAS_1,
5995 .micbias_capability = OTHC_MICBIAS_HSED,
5996 .micbias_enable = OTHC_SIGNAL_PWM_TCXO,
5997 .micbias_regulator = &othc_reg,
5998 .hsed_config = &hsed_config_1,
5999 .hsed_name = "8660_handset",
6000};
6001
6002/* MIC_BIAS2 is configured as normal MIC BIAS */
6003static struct pmic8058_othc_config_pdata othc_config_pdata_2 = {
6004 .micbias_select = OTHC_MICBIAS_2,
6005 .micbias_capability = OTHC_MICBIAS,
6006 .micbias_enable = OTHC_SIGNAL_OFF,
6007 .micbias_regulator = &othc_reg,
6008};
6009
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006010
6011static void __init msm8x60_init_pm8058_othc(void)
6012{
6013 int i;
6014
6015 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 ||
6016 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
6017 machine_is_msm8x60_fusn_ffa()) {
6018 /* 3-switch headset supported only by V2 FFA and FLUID */
6019 hsed_config_1.accessories_adc_support = true,
6020 /* ADC based accessory detection works only on V2 and FLUID */
6021 hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET,
6022 hsed_config_1.othc_support_n_switch = true;
6023 }
6024
6025 /* IR GPIO is absent on FLUID */
6026 if (machine_is_msm8x60_fluid())
6027 hsed_config_1.ir_gpio = -1;
6028
6029 for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) {
6030 if (machine_is_msm8x60_fluid()) {
6031 switch (othc_accessories[i].accessory) {
6032 case OTHC_ANC_HEADPHONE:
6033 case OTHC_ANC_HEADSET:
6034 othc_accessories[i].gpio = GPIO_HEADSET_DET_N;
6035 break;
6036 case OTHC_MICROPHONE:
6037 othc_accessories[i].enabled = false;
6038 break;
6039 case OTHC_SVIDEO_OUT:
6040 othc_accessories[i].enabled = true;
6041 hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR;
6042 break;
6043 }
6044 }
6045 }
6046}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006047
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006048
6049static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on)
6050{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306051 struct pm_gpio pwm_gpio_config = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006052 .direction = PM_GPIO_DIR_OUT,
6053 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
6054 .output_value = 0,
6055 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306056 .vin_sel = PM8058_GPIO_VIN_VPH,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006057 .out_strength = PM_GPIO_STRENGTH_HIGH,
6058 .function = PM_GPIO_FUNC_2,
6059 };
6060
6061 int rc = -EINVAL;
6062 int id, mode, max_mA;
6063
6064 id = mode = max_mA = 0;
6065 switch (ch) {
6066 case 0:
6067 case 1:
6068 case 2:
6069 if (on) {
6070 id = 24 + ch;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306071 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(id - 1),
6072 &pwm_gpio_config);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006073 if (rc)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306074 pr_err("%s: pm8xxx_gpio_config(%d): rc=%d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006075 __func__, id, rc);
6076 }
6077 break;
6078
6079 case 6:
6080 id = PM_PWM_LED_FLASH;
6081 mode = PM_PWM_CONF_PWM1;
6082 max_mA = 300;
6083 break;
6084
6085 case 7:
6086 id = PM_PWM_LED_FLASH1;
6087 mode = PM_PWM_CONF_PWM1;
6088 max_mA = 300;
6089 break;
6090
6091 default:
6092 break;
6093 }
6094
6095 if (ch >= 6 && ch <= 7) {
6096 if (!on) {
6097 mode = PM_PWM_CONF_NONE;
6098 max_mA = 0;
6099 }
6100 rc = pm8058_pwm_config_led(pwm, id, mode, max_mA);
6101 if (rc)
6102 pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n",
6103 __func__, ch, rc);
6104 }
6105 return rc;
6106
6107}
6108
6109static struct pm8058_pwm_pdata pm8058_pwm_data = {
6110 .config = pm8058_pwm_config,
6111};
6112
6113#define PM8058_GPIO_INT 88
6114
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006115static struct pmic8058_led pmic8058_flash_leds[] = {
6116 [0] = {
6117 .name = "camera:flash0",
6118 .max_brightness = 15,
6119 .id = PMIC8058_ID_FLASH_LED_0,
6120 },
6121 [1] = {
6122 .name = "camera:flash1",
6123 .max_brightness = 15,
6124 .id = PMIC8058_ID_FLASH_LED_1,
6125 },
6126};
6127
6128static struct pmic8058_leds_platform_data pm8058_flash_leds_data = {
6129 .num_leds = ARRAY_SIZE(pmic8058_flash_leds),
6130 .leds = pmic8058_flash_leds,
6131};
6132
Terence Hampsonc0b6dfb2011-07-15 11:07:17 -04006133static struct pmic8058_led pmic8058_dragon_leds[] = {
6134 [0] = {
6135 /* RED */
6136 .name = "led_drv0",
6137 .max_brightness = 15,
6138 .id = PMIC8058_ID_LED_0,
6139 },/* 300 mA flash led0 drv sink */
6140 [1] = {
6141 /* Yellow */
6142 .name = "led_drv1",
6143 .max_brightness = 15,
6144 .id = PMIC8058_ID_LED_1,
6145 },/* 300 mA flash led0 drv sink */
6146 [2] = {
6147 /* Green */
6148 .name = "led_drv2",
6149 .max_brightness = 15,
6150 .id = PMIC8058_ID_LED_2,
6151 },/* 300 mA flash led0 drv sink */
6152 [3] = {
6153 .name = "led_psensor",
6154 .max_brightness = 15,
6155 .id = PMIC8058_ID_LED_KB_LIGHT,
6156 },/* 300 mA flash led0 drv sink */
6157};
6158
6159static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = {
6160 .num_leds = ARRAY_SIZE(pmic8058_dragon_leds),
6161 .leds = pmic8058_dragon_leds,
6162};
6163
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006164static struct pmic8058_led pmic8058_fluid_flash_leds[] = {
6165 [0] = {
6166 .name = "led:drv0",
6167 .max_brightness = 15,
6168 .id = PMIC8058_ID_FLASH_LED_0,
6169 },/* 300 mA flash led0 drv sink */
6170 [1] = {
6171 .name = "led:drv1",
6172 .max_brightness = 15,
6173 .id = PMIC8058_ID_FLASH_LED_1,
6174 },/* 300 mA flash led1 sink */
6175 [2] = {
6176 .name = "led:drv2",
6177 .max_brightness = 20,
6178 .id = PMIC8058_ID_LED_0,
6179 },/* 40 mA led0 sink */
6180 [3] = {
6181 .name = "keypad:drv",
6182 .max_brightness = 15,
6183 .id = PMIC8058_ID_LED_KB_LIGHT,
6184 },/* 300 mA keypad drv sink */
6185};
6186
6187static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = {
6188 .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds),
6189 .leds = pmic8058_fluid_flash_leds,
6190};
6191
Terence Hampson90508a92011-08-09 10:40:08 -04006192static struct pmic8058_charger_data pmic8058_charger_dragon = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306193 .charger_data_valid = true,
Terence Hampson90508a92011-08-09 10:40:08 -04006194 .max_source_current = 1800,
6195 .charger_type = CHG_TYPE_AC,
6196};
6197
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306198static struct pmic8058_charger_data pmic8058_charger_ffa_surf = {
6199 .charger_data_valid = false,
6200};
6201
6202static struct pm8xxx_misc_platform_data pm8058_misc_pdata = {
6203 .priority = 0,
6204};
6205
6206static struct pm8xxx_irq_platform_data pm8058_irq_pdata = {
6207 .irq_base = PM8058_IRQ_BASE,
6208 .devirq = MSM_GPIO_TO_INT(PM8058_GPIO_INT),
6209 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6210};
6211
6212static struct pm8xxx_gpio_platform_data pm8058_gpio_pdata = {
6213 .gpio_base = PM8058_GPIO_PM_TO_SYS(0),
6214};
6215
6216static struct pm8xxx_mpp_platform_data pm8058_mpp_pdata = {
6217 .mpp_base = PM8058_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006218};
6219
6220static struct pm8058_platform_data pm8058_platform_data = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306221 .irq_pdata = &pm8058_irq_pdata,
6222 .gpio_pdata = &pm8058_gpio_pdata,
6223 .mpp_pdata = &pm8058_mpp_pdata,
6224 .rtc_pdata = &pm8058_rtc_pdata,
6225 .pwrkey_pdata = &pm8058_pwrkey_pdata,
6226 .othc0_pdata = &othc_config_pdata_0,
6227 .othc1_pdata = &othc_config_pdata_1,
6228 .othc2_pdata = &othc_config_pdata_2,
6229 .pwm_pdata = &pm8058_pwm_data,
6230 .misc_pdata = &pm8058_misc_pdata,
6231#ifdef CONFIG_SENSORS_MSM_ADC
6232 .xoadc_pdata = &pm8058_xoadc_pdata,
6233#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006234};
6235
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05306236#ifdef CONFIG_MSM_SSBI
6237static struct msm_ssbi_platform_data msm8x60_ssbi_pm8058_pdata __devinitdata = {
6238 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6239 .slave = {
6240 .name = "pm8058-core",
6241 .platform_data = &pm8058_platform_data,
6242 },
6243};
6244#endif
6245#endif /* CONFIG_PMIC8058 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006246
6247#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6248 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6249#define TDISC_I2C_SLAVE_ADDR 0x67
6250#define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5)
6251#define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5)
6252
6253static const char *vregs_tdisc_name[] = {
6254 "8058_l5",
6255 "8058_s3",
6256};
6257
6258static const int vregs_tdisc_val[] = {
6259 2850000,/* uV */
6260 1800000,
6261};
6262static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)];
6263
6264static int tdisc_shinetsu_setup(void)
6265{
6266 int rc, i;
6267
6268 rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt");
6269 if (rc) {
6270 pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n",
6271 __func__);
6272 return rc;
6273 }
6274
6275 rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe");
6276 if (rc) {
6277 pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n",
6278 __func__);
6279 goto fail_gpio_oe;
6280 }
6281
6282 rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1);
6283 if (rc) {
6284 pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n",
6285 __func__);
6286 gpio_free(GPIO_JOYSTICK_EN);
6287 goto fail_gpio_oe;
6288 }
6289
6290 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6291 vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]);
6292 if (IS_ERR(vregs_tdisc[i])) {
6293 printk(KERN_ERR "%s: regulator get %s failed (%ld)\n",
6294 __func__, vregs_tdisc_name[i],
6295 PTR_ERR(vregs_tdisc[i]));
6296 rc = PTR_ERR(vregs_tdisc[i]);
6297 goto vreg_get_fail;
6298 }
6299
6300 rc = regulator_set_voltage(vregs_tdisc[i],
6301 vregs_tdisc_val[i], vregs_tdisc_val[i]);
6302 if (rc) {
6303 printk(KERN_ERR "%s: regulator_set_voltage() = %d\n",
6304 __func__, rc);
6305 goto vreg_set_voltage_fail;
6306 }
6307 }
6308
6309 return rc;
6310vreg_set_voltage_fail:
6311 i++;
6312vreg_get_fail:
6313 while (i)
6314 regulator_put(vregs_tdisc[--i]);
6315fail_gpio_oe:
6316 gpio_free(PMIC_GPIO_TDISC);
6317 return rc;
6318}
6319
6320static void tdisc_shinetsu_release(void)
6321{
6322 int i;
6323
6324 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++)
6325 regulator_put(vregs_tdisc[i]);
6326
6327 gpio_free(PMIC_GPIO_TDISC);
6328 gpio_free(GPIO_JOYSTICK_EN);
6329}
6330
6331static int tdisc_shinetsu_enable(void)
6332{
6333 int i, rc = -EINVAL;
6334
6335 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6336 rc = regulator_enable(vregs_tdisc[i]);
6337 if (rc < 0) {
6338 printk(KERN_ERR "%s: vreg %s enable failed (%d)\n",
6339 __func__, vregs_tdisc_name[i], rc);
6340 goto vreg_fail;
6341 }
6342 }
6343
6344 /* Enable the OE (output enable) gpio */
6345 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1);
6346 /* voltage and gpio stabilization delay */
6347 msleep(50);
6348
6349 return 0;
6350vreg_fail:
6351 while (i)
6352 regulator_disable(vregs_tdisc[--i]);
6353 return rc;
6354}
6355
6356static int tdisc_shinetsu_disable(void)
6357{
6358 int i, rc;
6359
6360 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6361 rc = regulator_disable(vregs_tdisc[i]);
6362 if (rc < 0) {
6363 printk(KERN_ERR "%s: vreg %s disable failed (%d)\n",
6364 __func__, vregs_tdisc_name[i], rc);
6365 goto tdisc_reg_fail;
6366 }
6367 }
6368
6369 /* Disable the OE (output enable) gpio */
6370 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0);
6371
6372 return 0;
6373
6374tdisc_reg_fail:
6375 while (i)
6376 regulator_enable(vregs_tdisc[--i]);
6377 return rc;
6378}
6379
6380static struct tdisc_abs_values tdisc_abs = {
6381 .x_max = 32,
6382 .y_max = 32,
6383 .x_min = -32,
6384 .y_min = -32,
6385 .pressure_max = 32,
6386 .pressure_min = 0,
6387};
6388
6389static struct tdisc_platform_data tdisc_data = {
6390 .tdisc_setup = tdisc_shinetsu_setup,
6391 .tdisc_release = tdisc_shinetsu_release,
6392 .tdisc_enable = tdisc_shinetsu_enable,
6393 .tdisc_disable = tdisc_shinetsu_disable,
6394 .tdisc_wakeup = 0,
6395 .tdisc_gpio = PMIC_GPIO_TDISC,
6396 .tdisc_report_keys = true,
6397 .tdisc_report_relative = true,
6398 .tdisc_report_absolute = false,
6399 .tdisc_report_wheel = false,
6400 .tdisc_reverse_x = false,
6401 .tdisc_reverse_y = true,
6402 .tdisc_abs = &tdisc_abs,
6403};
6404
6405static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = {
6406 {
6407 I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR),
6408 .irq = TDISC_INT,
6409 .platform_data = &tdisc_data,
6410 },
6411};
6412#endif
6413
6414#define PM_GPIO_CDC_RST_N 20
6415#define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N)
6416
6417static struct regulator *vreg_timpani_1;
6418static struct regulator *vreg_timpani_2;
6419
6420static unsigned int msm_timpani_setup_power(void)
6421{
6422 int rc;
6423
6424 vreg_timpani_1 = regulator_get(NULL, "8058_l0");
6425 if (IS_ERR(vreg_timpani_1)) {
6426 pr_err("%s: Unable to get 8058_l0\n", __func__);
6427 return -ENODEV;
6428 }
6429
6430 vreg_timpani_2 = regulator_get(NULL, "8058_s3");
6431 if (IS_ERR(vreg_timpani_2)) {
6432 pr_err("%s: Unable to get 8058_s3\n", __func__);
6433 regulator_put(vreg_timpani_1);
6434 return -ENODEV;
6435 }
6436
6437 rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000);
6438 if (rc) {
6439 pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__);
6440 goto fail;
6441 }
6442
6443 rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000);
6444 if (rc) {
6445 pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__);
6446 goto fail;
6447 }
6448
6449 rc = regulator_enable(vreg_timpani_1);
6450 if (rc) {
6451 pr_err("%s: Enable regulator 8058_l0 failed\n", __func__);
6452 goto fail;
6453 }
6454
6455 /* The settings for LDO0 should be set such that
6456 * it doesn't require to reset the timpani. */
6457 rc = regulator_set_optimum_mode(vreg_timpani_1, 5000);
6458 if (rc < 0) {
6459 pr_err("Timpani regulator optimum mode setting failed\n");
6460 goto fail;
6461 }
6462
6463 rc = regulator_enable(vreg_timpani_2);
6464 if (rc) {
6465 pr_err("%s: Enable regulator 8058_s3 failed\n", __func__);
6466 regulator_disable(vreg_timpani_1);
6467 goto fail;
6468 }
6469
6470 rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N");
6471 if (rc) {
6472 pr_err("%s: GPIO Request %d failed\n", __func__,
6473 GPIO_CDC_RST_N);
6474 regulator_disable(vreg_timpani_1);
6475 regulator_disable(vreg_timpani_2);
6476 goto fail;
6477 } else {
6478 gpio_direction_output(GPIO_CDC_RST_N, 1);
6479 usleep_range(1000, 1050);
6480 gpio_direction_output(GPIO_CDC_RST_N, 0);
6481 usleep_range(1000, 1050);
6482 gpio_direction_output(GPIO_CDC_RST_N, 1);
6483 gpio_free(GPIO_CDC_RST_N);
6484 }
6485 return rc;
6486
6487fail:
6488 regulator_put(vreg_timpani_1);
6489 regulator_put(vreg_timpani_2);
6490 return rc;
6491}
6492
6493static void msm_timpani_shutdown_power(void)
6494{
6495 int rc;
6496
6497 rc = regulator_disable(vreg_timpani_1);
6498 if (rc)
6499 pr_err("%s: Disable regulator 8058_l0 failed\n", __func__);
6500
6501 regulator_put(vreg_timpani_1);
6502
6503 rc = regulator_disable(vreg_timpani_2);
6504 if (rc)
6505 pr_err("%s: Disable regulator 8058_s3 failed\n", __func__);
6506
6507 regulator_put(vreg_timpani_2);
6508}
6509
6510/* Power analog function of codec */
6511static struct regulator *vreg_timpani_cdc_apwr;
6512static int msm_timpani_codec_power(int vreg_on)
6513{
6514 int rc = 0;
6515
6516 if (!vreg_timpani_cdc_apwr) {
6517
6518 vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4");
6519
6520 if (IS_ERR(vreg_timpani_cdc_apwr)) {
6521 pr_err("%s: vreg_get failed (%ld)\n",
6522 __func__, PTR_ERR(vreg_timpani_cdc_apwr));
6523 rc = PTR_ERR(vreg_timpani_cdc_apwr);
6524 return rc;
6525 }
6526 }
6527
6528 if (vreg_on) {
6529
6530 rc = regulator_set_voltage(vreg_timpani_cdc_apwr,
6531 2200000, 2200000);
6532 if (rc) {
6533 pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n",
6534 __func__);
6535 goto vreg_fail;
6536 }
6537
6538 rc = regulator_enable(vreg_timpani_cdc_apwr);
6539 if (rc) {
6540 pr_err("%s: vreg_enable failed %d\n", __func__, rc);
6541 goto vreg_fail;
6542 }
6543 } else {
6544 rc = regulator_disable(vreg_timpani_cdc_apwr);
6545 if (rc) {
6546 pr_err("%s: vreg_disable failed %d\n",
6547 __func__, rc);
6548 goto vreg_fail;
6549 }
6550 }
6551
6552 return 0;
6553
6554vreg_fail:
6555 regulator_put(vreg_timpani_cdc_apwr);
6556 vreg_timpani_cdc_apwr = NULL;
6557 return rc;
6558}
6559
6560static struct marimba_codec_platform_data timpani_codec_pdata = {
6561 .marimba_codec_power = msm_timpani_codec_power,
6562};
6563
6564#define TIMPANI_SLAVE_ID_CDC_ADDR 0X77
6565#define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66
6566
6567static struct marimba_platform_data timpani_pdata = {
6568 .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR,
6569 .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR,
6570 .marimba_setup = msm_timpani_setup_power,
6571 .marimba_shutdown = msm_timpani_shutdown_power,
6572 .codec = &timpani_codec_pdata,
6573 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6574};
6575
6576#define TIMPANI_I2C_SLAVE_ADDR 0xD
6577
6578static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = {
6579 {
6580 I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR),
6581 .platform_data = &timpani_pdata,
6582 },
6583};
6584
Lei Zhou338cab82011-08-19 13:38:17 -04006585#ifdef CONFIG_SND_SOC_WM8903
6586static struct wm8903_platform_data wm8903_pdata = {
6587 .gpio_cfg[2] = 0x3A8,
6588};
6589
6590#define WM8903_I2C_SLAVE_ADDR 0x34
6591static struct i2c_board_info wm8903_codec_i2c_info[] = {
6592 {
6593 I2C_BOARD_INFO("wm8903", WM8903_I2C_SLAVE_ADDR >> 1),
6594 .platform_data = &wm8903_pdata,
6595 },
6596};
6597#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006598#ifdef CONFIG_PMIC8901
6599
6600#define PM8901_GPIO_INT 91
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006601/*
6602 * Consumer specific regulator names:
6603 * regulator name consumer dev_name
6604 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006605static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = {
6606 REGULATOR_SUPPLY("8901_usb_otg", NULL),
6607};
6608static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = {
6609 REGULATOR_SUPPLY("8901_hdmi_mvs", NULL),
6610};
6611
6612#define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306613 _always_on) \
6614 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006615 .init_data = { \
6616 .constraints = { \
6617 .valid_modes_mask = _modes, \
6618 .valid_ops_mask = _ops, \
6619 .min_uV = _min_uV, \
6620 .max_uV = _max_uV, \
6621 .input_uV = _min_uV, \
6622 .apply_uV = _apply_uV, \
6623 .always_on = _always_on, \
6624 }, \
6625 .consumer_supplies = vreg_consumers_8901_##_id, \
6626 .num_consumer_supplies = \
6627 ARRAY_SIZE(vreg_consumers_8901_##_id), \
6628 }, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306629 .id = PM8901_VREG_ID_##_id, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006630 }
6631
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006632#define PM8901_VREG_INIT_VS(_id) \
6633 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306634 REGULATOR_CHANGE_STATUS, 0, 0)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006635
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306636static struct pm8901_vreg_pdata pm8901_vreg_init[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006637 PM8901_VREG_INIT_VS(USB_OTG),
6638 PM8901_VREG_INIT_VS(HDMI_MVS),
6639};
6640
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306641static struct pm8xxx_misc_platform_data pm8901_misc_pdata = {
6642 .priority = 1,
6643};
6644
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306645static struct pm8xxx_irq_platform_data pm8901_irq_pdata = {
6646 .irq_base = PM8901_IRQ_BASE,
6647 .devirq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
6648 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6649};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006650
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306651static struct pm8xxx_mpp_platform_data pm8901_mpp_pdata = {
6652 .mpp_base = PM8901_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006653};
6654
6655static struct pm8901_platform_data pm8901_platform_data = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306656 .irq_pdata = &pm8901_irq_pdata,
6657 .mpp_pdata = &pm8901_mpp_pdata,
6658 .regulator_pdatas = pm8901_vreg_init,
6659 .num_regulators = ARRAY_SIZE(pm8901_vreg_init),
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306660 .misc_pdata = &pm8901_misc_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006661};
6662
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306663static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
6664 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6665 .slave = {
6666 .name = "pm8901-core",
6667 .platform_data = &pm8901_platform_data,
6668 },
6669};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006670#endif /* CONFIG_PMIC8901 */
6671
6672#if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \
6673 || defined(CONFIG_GPIO_SX150X_MODULE))
6674
6675static struct regulator *vreg_bahama;
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006676static int msm_bahama_sys_rst = GPIO_MS_SYS_RESET_N;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006677
6678struct bahama_config_register{
6679 u8 reg;
6680 u8 value;
6681 u8 mask;
6682};
6683
6684enum version{
6685 VER_1_0,
6686 VER_2_0,
6687 VER_UNSUPPORTED = 0xFF
6688};
6689
6690static u8 read_bahama_ver(void)
6691{
6692 int rc;
6693 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6694 u8 bahama_version;
6695
6696 rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F);
6697 if (rc < 0) {
6698 printk(KERN_ERR
6699 "%s: version read failed: %d\n",
6700 __func__, rc);
6701 return VER_UNSUPPORTED;
6702 } else {
6703 printk(KERN_INFO
6704 "%s: version read got: 0x%x\n",
6705 __func__, bahama_version);
6706 }
6707
6708 switch (bahama_version) {
6709 case 0x08: /* varient of bahama v1 */
6710 case 0x10:
6711 case 0x00:
6712 return VER_1_0;
6713 case 0x09: /* variant of bahama v2 */
6714 return VER_2_0;
6715 default:
6716 return VER_UNSUPPORTED;
6717 }
6718}
6719
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006720static int msm_bahama_setup_power_enable;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006721static unsigned int msm_bahama_setup_power(void)
6722{
6723 int rc = 0;
6724 const char *msm_bahama_regulator = "8058_s3";
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006725
6726 if (machine_is_msm8x60_dragon())
6727 msm_bahama_sys_rst = GPIO_CDC_RST_N;
6728
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006729 vreg_bahama = regulator_get(NULL, msm_bahama_regulator);
6730
6731 if (IS_ERR(vreg_bahama)) {
6732 rc = PTR_ERR(vreg_bahama);
6733 pr_err("%s: regulator_get %s = %d\n", __func__,
6734 msm_bahama_regulator, rc);
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006735 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006736 }
6737
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006738 rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
6739 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006740 pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
6741 msm_bahama_regulator, rc);
6742 goto unget;
6743 }
6744
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006745 rc = regulator_enable(vreg_bahama);
6746 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006747 pr_err("%s: regulator_enable %s = %d\n", __func__,
6748 msm_bahama_regulator, rc);
6749 goto unget;
6750 }
6751
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006752 rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
6753 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006754 pr_err("%s: gpio_request %d = %d\n", __func__,
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006755 msm_bahama_sys_rst, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006756 goto unenable;
6757 }
6758
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006759 gpio_direction_output(msm_bahama_sys_rst, 0);
6760 usleep_range(1000, 1050);
6761 gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
6762 usleep_range(1000, 1050);
6763 msm_bahama_setup_power_enable = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006764 return rc;
6765
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006766unenable:
6767 regulator_disable(vreg_bahama);
6768unget:
6769 regulator_put(vreg_bahama);
6770 return rc;
6771};
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006772
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006773static unsigned int msm_bahama_shutdown_power(int value)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006774{
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006775 if (msm_bahama_setup_power_enable) {
6776 gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
6777 gpio_free(msm_bahama_sys_rst);
6778 regulator_disable(vreg_bahama);
6779 regulator_put(vreg_bahama);
6780 msm_bahama_setup_power_enable = 0;
6781 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006782
6783 return 0;
6784};
6785
6786static unsigned int msm_bahama_core_config(int type)
6787{
6788 int rc = 0;
6789
6790 if (type == BAHAMA_ID) {
6791
6792 int i;
6793 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6794
6795 const struct bahama_config_register v20_init[] = {
6796 /* reg, value, mask */
6797 { 0xF4, 0x84, 0xFF }, /* AREG */
6798 { 0xF0, 0x04, 0xFF } /* DREG */
6799 };
6800
6801 if (read_bahama_ver() == VER_2_0) {
6802 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
6803 u8 value = v20_init[i].value;
6804 rc = marimba_write_bit_mask(&config,
6805 v20_init[i].reg,
6806 &value,
6807 sizeof(v20_init[i].value),
6808 v20_init[i].mask);
6809 if (rc < 0) {
6810 printk(KERN_ERR
6811 "%s: reg %d write failed: %d\n",
6812 __func__, v20_init[i].reg, rc);
6813 return rc;
6814 }
6815 printk(KERN_INFO "%s: reg 0x%02x value 0x%02x"
6816 " mask 0x%02x\n",
6817 __func__, v20_init[i].reg,
6818 v20_init[i].value, v20_init[i].mask);
6819 }
6820 }
6821 }
6822 printk(KERN_INFO "core type: %d\n", type);
6823
6824 return rc;
6825}
6826
6827static struct regulator *fm_regulator_s3;
6828static struct msm_xo_voter *fm_clock;
6829
6830static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
6831{
6832 int rc = 0;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306833 struct pm_gpio cfg = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006834 .direction = PM_GPIO_DIR_IN,
6835 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306836 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006837 .function = PM_GPIO_FUNC_NORMAL,
6838 .inv_int_pol = 0,
6839 };
6840
6841 if (!fm_regulator_s3) {
6842 fm_regulator_s3 = regulator_get(NULL, "8058_s3");
6843 if (IS_ERR(fm_regulator_s3)) {
6844 rc = PTR_ERR(fm_regulator_s3);
6845 printk(KERN_ERR "%s: regulator get s3 (%d)\n",
6846 __func__, rc);
6847 goto out;
6848 }
6849 }
6850
6851
6852 rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000);
6853 if (rc < 0) {
6854 printk(KERN_ERR "%s: regulator set voltage failed (%d)\n",
6855 __func__, rc);
6856 goto fm_fail_put;
6857 }
6858
6859 rc = regulator_enable(fm_regulator_s3);
6860 if (rc < 0) {
6861 printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n",
6862 __func__, rc);
6863 goto fm_fail_put;
6864 }
6865
6866 /*Vote for XO clock*/
6867 fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power");
6868
6869 if (IS_ERR(fm_clock)) {
6870 rc = PTR_ERR(fm_clock);
6871 printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n",
6872 __func__, rc);
6873 goto fm_fail_switch;
6874 }
6875
6876 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON);
6877 if (rc < 0) {
6878 printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n",
6879 __func__, rc);
6880 goto fm_fail_vote;
6881 }
6882
6883 /*GPIO 18 on PMIC is FM_IRQ*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306884 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(FM_GPIO), &cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006885 if (rc) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306886 printk(KERN_ERR "%s: return val of pm8xxx_gpio_config: %d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006887 __func__, rc);
6888 goto fm_fail_clock;
6889 }
6890 goto out;
6891
6892fm_fail_clock:
6893 msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6894fm_fail_vote:
6895 msm_xo_put(fm_clock);
6896fm_fail_switch:
6897 regulator_disable(fm_regulator_s3);
6898fm_fail_put:
6899 regulator_put(fm_regulator_s3);
6900out:
6901 return rc;
6902};
6903
6904static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
6905{
6906 int rc = 0;
6907 if (fm_regulator_s3 != NULL) {
6908 rc = regulator_disable(fm_regulator_s3);
6909 if (rc < 0) {
6910 printk(KERN_ERR "%s: regulator s3 disable (%d)\n",
6911 __func__, rc);
6912 }
6913 regulator_put(fm_regulator_s3);
6914 fm_regulator_s3 = NULL;
6915 }
6916 printk(KERN_ERR "%s: Voting off for XO", __func__);
6917
6918 if (fm_clock != NULL) {
6919 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6920 if (rc < 0) {
6921 printk(KERN_ERR "%s: Voting off XO clock (%d)\n",
6922 __func__, rc);
6923 }
6924 msm_xo_put(fm_clock);
6925 }
6926 printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__);
6927}
6928
6929/* Slave id address for FM/CDC/QMEMBIST
6930 * Values can be programmed using Marimba slave id 0
6931 * should there be a conflict with other I2C devices
6932 * */
6933#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
6934#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
6935
6936static struct marimba_fm_platform_data marimba_fm_pdata = {
6937 .fm_setup = fm_radio_setup,
6938 .fm_shutdown = fm_radio_shutdown,
6939 .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO),
6940 .is_fm_soc_i2s_master = false,
6941 .config_i2s_gpio = NULL,
6942};
6943
6944/*
6945Just initializing the BAHAMA related slave
6946*/
6947static struct marimba_platform_data marimba_pdata = {
6948 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
6949 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
6950 .bahama_setup = msm_bahama_setup_power,
6951 .bahama_shutdown = msm_bahama_shutdown_power,
6952 .bahama_core_config = msm_bahama_core_config,
6953 .fm = &marimba_fm_pdata,
6954 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6955};
6956
6957
6958static struct i2c_board_info msm_marimba_board_info[] = {
6959 {
6960 I2C_BOARD_INFO("marimba", 0xc),
6961 .platform_data = &marimba_pdata,
6962 }
6963};
6964#endif /* CONFIG_MAIMBA_CORE */
6965
6966#ifdef CONFIG_I2C
6967#define I2C_SURF 1
6968#define I2C_FFA (1 << 1)
6969#define I2C_RUMI (1 << 2)
6970#define I2C_SIM (1 << 3)
6971#define I2C_FLUID (1 << 4)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006972#define I2C_DRAGON (1 << 5)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006973
6974struct i2c_registry {
6975 u8 machs;
6976 int bus;
6977 struct i2c_board_info *info;
6978 int len;
6979};
6980
6981static struct i2c_registry msm8x60_i2c_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006982#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
6983 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006984 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006985 MSM_GSBI8_QUP_I2C_BUS_ID,
6986 core_expander_i2c_info,
6987 ARRAY_SIZE(core_expander_i2c_info),
6988 },
6989 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006990 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006991 MSM_GSBI8_QUP_I2C_BUS_ID,
6992 docking_expander_i2c_info,
6993 ARRAY_SIZE(docking_expander_i2c_info),
6994 },
6995 {
6996 I2C_SURF,
6997 MSM_GSBI8_QUP_I2C_BUS_ID,
6998 surf_expanders_i2c_info,
6999 ARRAY_SIZE(surf_expanders_i2c_info),
7000 },
7001 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007002 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007003 MSM_GSBI3_QUP_I2C_BUS_ID,
7004 fha_expanders_i2c_info,
7005 ARRAY_SIZE(fha_expanders_i2c_info),
7006 },
7007 {
7008 I2C_FLUID,
7009 MSM_GSBI3_QUP_I2C_BUS_ID,
7010 fluid_expanders_i2c_info,
7011 ARRAY_SIZE(fluid_expanders_i2c_info),
7012 },
7013 {
7014 I2C_FLUID,
7015 MSM_GSBI8_QUP_I2C_BUS_ID,
7016 fluid_core_expander_i2c_info,
7017 ARRAY_SIZE(fluid_core_expander_i2c_info),
7018 },
7019#endif
7020#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
7021 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
7022 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007023 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007024 MSM_GSBI3_QUP_I2C_BUS_ID,
7025 msm_i2c_gsbi3_tdisc_info,
7026 ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info),
7027 },
7028#endif
7029 {
Zhang Chang Ken211df572011-07-05 19:16:39 -04007030 I2C_SURF | I2C_FFA | I2C_FLUID,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007031 MSM_GSBI3_QUP_I2C_BUS_ID,
7032 cy8ctmg200_board_info,
7033 ARRAY_SIZE(cy8ctmg200_board_info),
7034 },
Zhang Chang Ken211df572011-07-05 19:16:39 -04007035 {
7036 I2C_DRAGON,
7037 MSM_GSBI3_QUP_I2C_BUS_ID,
7038 cy8ctma340_dragon_board_info,
7039 ARRAY_SIZE(cy8ctma340_dragon_board_info),
7040 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007041#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
7042 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
7043 {
7044 I2C_FLUID,
7045 MSM_GSBI3_QUP_I2C_BUS_ID,
7046 cyttsp_fluid_info,
7047 ARRAY_SIZE(cyttsp_fluid_info),
7048 },
7049 {
7050 I2C_FFA | I2C_SURF,
7051 MSM_GSBI3_QUP_I2C_BUS_ID,
7052 cyttsp_ffa_info,
7053 ARRAY_SIZE(cyttsp_ffa_info),
7054 },
7055#endif
7056#ifdef CONFIG_MSM_CAMERA
Jilai Wang971f97f2011-07-13 14:25:25 -04007057 {
7058 I2C_SURF | I2C_FFA | I2C_FLUID ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007059 MSM_GSBI4_QUP_I2C_BUS_ID,
7060 msm_camera_boardinfo,
7061 ARRAY_SIZE(msm_camera_boardinfo),
7062 },
Jilai Wang971f97f2011-07-13 14:25:25 -04007063 {
7064 I2C_DRAGON,
7065 MSM_GSBI4_QUP_I2C_BUS_ID,
7066 msm_camera_dragon_boardinfo,
7067 ARRAY_SIZE(msm_camera_dragon_boardinfo),
7068 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007069#endif
7070 {
7071 I2C_SURF | I2C_FFA | I2C_FLUID,
7072 MSM_GSBI7_QUP_I2C_BUS_ID,
7073 msm_i2c_gsbi7_timpani_info,
7074 ARRAY_SIZE(msm_i2c_gsbi7_timpani_info),
7075 },
7076#if defined(CONFIG_MARIMBA_CORE)
7077 {
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04007078 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007079 MSM_GSBI7_QUP_I2C_BUS_ID,
7080 msm_marimba_board_info,
7081 ARRAY_SIZE(msm_marimba_board_info),
7082 },
7083#endif /* CONFIG_MARIMBA_CORE */
7084#ifdef CONFIG_ISL9519_CHARGER
7085 {
7086 I2C_SURF | I2C_FFA,
7087 MSM_GSBI8_QUP_I2C_BUS_ID,
7088 isl_charger_i2c_info,
7089 ARRAY_SIZE(isl_charger_i2c_info),
7090 },
7091#endif
7092#if defined(CONFIG_HAPTIC_ISA1200) || \
7093 defined(CONFIG_HAPTIC_ISA1200_MODULE)
7094 {
7095 I2C_FLUID,
7096 MSM_GSBI8_QUP_I2C_BUS_ID,
7097 msm_isa1200_board_info,
7098 ARRAY_SIZE(msm_isa1200_board_info),
7099 },
7100#endif
7101#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
7102 {
7103 I2C_FLUID,
7104 MSM_GSBI8_QUP_I2C_BUS_ID,
7105 smb137b_charger_i2c_info,
7106 ARRAY_SIZE(smb137b_charger_i2c_info),
7107 },
7108#endif
7109#if defined(CONFIG_BATTERY_BQ27520) || \
7110 defined(CONFIG_BATTERY_BQ27520_MODULE)
7111 {
7112 I2C_FLUID,
7113 MSM_GSBI8_QUP_I2C_BUS_ID,
7114 msm_bq27520_board_info,
7115 ARRAY_SIZE(msm_bq27520_board_info),
7116 },
7117#endif
Lei Zhou338cab82011-08-19 13:38:17 -04007118#if defined(CONFIG_SND_SOC_WM8903) || defined(CONFIG_SND_SOC_WM8903_MODULE)
7119 {
7120 I2C_DRAGON,
7121 MSM_GSBI8_QUP_I2C_BUS_ID,
7122 wm8903_codec_i2c_info,
7123 ARRAY_SIZE(wm8903_codec_i2c_info),
7124 },
7125#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007126};
7127#endif /* CONFIG_I2C */
7128
7129static void fixup_i2c_configs(void)
7130{
7131#ifdef CONFIG_I2C
7132#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7133 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7134 sx150x_data[SX150X_CORE].irq_summary =
7135 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N);
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007136 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
7137 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007138 sx150x_data[SX150X_CORE].irq_summary =
7139 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7140 else if (machine_is_msm8x60_fluid())
7141 sx150x_data[SX150X_CORE_FLUID].irq_summary =
7142 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7143#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007144#endif
7145}
7146
7147static void register_i2c_devices(void)
7148{
7149#ifdef CONFIG_I2C
7150 u8 mach_mask = 0;
7151 int i;
7152
7153 /* Build the matching 'supported_machs' bitmask */
7154 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7155 mach_mask = I2C_SURF;
7156 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
7157 mach_mask = I2C_FFA;
7158 else if (machine_is_msm8x60_rumi3())
7159 mach_mask = I2C_RUMI;
7160 else if (machine_is_msm8x60_sim())
7161 mach_mask = I2C_SIM;
7162 else if (machine_is_msm8x60_fluid())
7163 mach_mask = I2C_FLUID;
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007164 else if (machine_is_msm8x60_dragon())
7165 mach_mask = I2C_DRAGON;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007166 else
7167 pr_err("unmatched machine ID in register_i2c_devices\n");
7168
7169 /* Run the array and install devices as appropriate */
7170 for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) {
7171 if (msm8x60_i2c_devices[i].machs & mach_mask)
7172 i2c_register_board_info(msm8x60_i2c_devices[i].bus,
7173 msm8x60_i2c_devices[i].info,
7174 msm8x60_i2c_devices[i].len);
7175 }
7176#endif
7177}
7178
7179static void __init msm8x60_init_uart12dm(void)
7180{
7181#if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE)
7182 /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */
7183 void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K);
7184
7185 if (!fpga_mem)
7186 pr_err("%s(): Error getting memory\n", __func__);
7187
7188 /* Advanced mode */
7189 writew(0xFFFF, fpga_mem + 0x15C);
7190 /* FPGA_UART_SEL */
7191 writew(0, fpga_mem + 0x172);
7192 /* FPGA_GPIO_CONFIG_117 */
7193 writew(1, fpga_mem + 0xEA);
7194 /* FPGA_GPIO_CONFIG_118 */
7195 writew(1, fpga_mem + 0xEC);
7196 mb();
7197 iounmap(fpga_mem);
7198#endif
7199}
7200
7201#define MSM_GSBI9_PHYS 0x19900000
7202#define GSBI_DUAL_MODE_CODE 0x60
7203
7204static void __init msm8x60_init_buses(void)
7205{
7206#ifdef CONFIG_I2C_QUP
7207 void *gsbi_mem = ioremap_nocache(0x19C00000, 4);
7208 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */
7209 writel_relaxed(0x6 << 4, gsbi_mem);
7210 /* Ensure protocol code is written before proceeding further */
7211 mb();
7212 iounmap(gsbi_mem);
7213
7214 msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata;
7215 msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata;
7216 msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata;
7217 msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata;
7218
7219#ifdef CONFIG_MSM_GSBI9_UART
7220 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7221 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */
7222 gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4);
7223 writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem);
7224 iounmap(gsbi_mem);
7225 msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1;
7226 }
7227#endif
7228 msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata;
7229 msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata;
7230#endif
7231#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7232 msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata;
7233#endif
7234#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007235 msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata;
7236#endif
7237
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307238#ifdef CONFIG_MSM_SSBI
7239 msm_device_ssbi_pmic1.dev.platform_data =
7240 &msm8x60_ssbi_pm8058_pdata;
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05307241 msm_device_ssbi_pmic2.dev.platform_data =
7242 &msm8x60_ssbi_pm8901_pdata;
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307243#endif
7244
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007245 if (machine_is_msm8x60_fluid()) {
7246#if (defined(CONFIG_USB_EHCI_MSM_72K) && \
7247 (defined(CONFIG_SMB137B_CHARGER) || \
7248 defined(CONFIG_SMB137B_CHARGER_MODULE)))
7249 msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power;
7250#endif
7251#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7252 msm_gsbi10_qup_spi_device.dev.platform_data =
7253 &msm_gsbi10_qup_spi_pdata;
7254#endif
7255 }
7256
7257#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
7258 /*
7259 * We can not put USB regulators (8058_l6 and 8058_l7) in LPM
7260 * when we depend on USB PHY for VBUS/ID notifications. VBUS
7261 * and ID notifications are available only on V2 surf and FFA
7262 * with a hardware workaround.
7263 */
7264 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 &&
7265 (machine_is_msm8x60_surf() ||
7266 (machine_is_msm8x60_ffa() &&
7267 pmic_id_notif_supported)))
7268 msm_otg_pdata.phy_can_powercollapse = 1;
7269 msm_device_otg.dev.platform_data = &msm_otg_pdata;
7270#endif
7271
7272#ifdef CONFIG_USB_GADGET_MSM_72K
7273 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
7274#endif
7275
7276#ifdef CONFIG_SERIAL_MSM_HS
7277 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */
7278 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
7279#endif
7280#ifdef CONFIG_MSM_GSBI9_UART
7281 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7282 msm_device_uart_gsbi9 = msm_add_gsbi9_uart();
7283 if (IS_ERR(msm_device_uart_gsbi9))
7284 pr_err("%s(): Failed to create uart gsbi9 device\n",
7285 __func__);
7286 }
7287#endif
7288
7289#ifdef CONFIG_MSM_BUS_SCALING
7290
7291 /* RPM calls are only enabled on V2 */
7292 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
7293 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
7294 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
7295 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
7296 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
7297 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
7298 }
7299
7300 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
7301 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
7302 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
7303 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
7304 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
7305#endif
7306}
7307
7308static void __init msm8x60_map_io(void)
7309{
7310 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
7311 msm_map_msm8x60_io();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07007312
7313 if (socinfo_init() < 0)
7314 pr_err("socinfo_init() failed!\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007315}
7316
7317/*
7318 * Most segments of the EBI2 bus are disabled by default.
7319 */
7320static void __init msm8x60_init_ebi2(void)
7321{
7322 uint32_t ebi2_cfg;
7323 void *ebi2_cfg_ptr;
Terence Hampsonb36a38c2011-09-19 19:10:40 -04007324 struct clk *mem_clk = clk_get_sys("msm_ebi2", "mem_clk");
7325
7326 if (IS_ERR(mem_clk)) {
7327 pr_err("%s: clk_get_sys(%s,%s), failed", __func__,
7328 "msm_ebi2", "mem_clk");
7329 return;
7330 }
7331 clk_enable(mem_clk);
7332 clk_put(mem_clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007333
7334 ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t));
7335 if (ebi2_cfg_ptr != 0) {
7336 ebi2_cfg = readl_relaxed(ebi2_cfg_ptr);
7337
7338 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007339 machine_is_msm8x60_fluid() ||
7340 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007341 ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
7342 else if (machine_is_msm8x60_sim())
7343 ebi2_cfg |= (1 << 4); /* CS2 */
7344 else if (machine_is_msm8x60_rumi3())
7345 ebi2_cfg |= (1 << 5); /* CS3 */
7346
7347 writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
7348 iounmap(ebi2_cfg_ptr);
7349 }
7350
7351 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007352 machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007353 ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K);
7354 if (ebi2_cfg_ptr != 0) {
7355 /* EBI2_XMEM_CFG:PWRSAVE_MODE off */
7356 writel_relaxed(0UL, ebi2_cfg_ptr);
7357
7358 /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC
7359 * LAN9221 Ethernet controller reads and writes.
7360 * The lowest 4 bits are the read delay, the next
7361 * 4 are the write delay. */
7362 writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10);
7363#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
7364 /*
7365 * RECOVERY=5, HOLD_WR=1
7366 * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1
7367 * WAIT_WR=1, WAIT_RD=2
7368 */
7369 writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14);
7370 /*
7371 * HOLD_RD=1
7372 * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1
7373 */
7374 writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34);
7375#else
7376 /* EBI2 CS3 muxed address/data,
7377 * two cyc addr enable */
7378 writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34);
7379
7380#endif
7381 iounmap(ebi2_cfg_ptr);
7382 }
7383 }
7384}
7385
7386static void __init msm8x60_configure_smc91x(void)
7387{
7388 if (machine_is_msm8x60_sim()) {
7389
7390 smc91x_resources[0].start = 0x1b800300;
7391 smc91x_resources[0].end = 0x1b8003ff;
7392
7393 smc91x_resources[1].start = (NR_MSM_IRQS + 40);
7394 smc91x_resources[1].end = (NR_MSM_IRQS + 40);
7395
7396 } else if (machine_is_msm8x60_rumi3()) {
7397
7398 smc91x_resources[0].start = 0x1d000300;
7399 smc91x_resources[0].end = 0x1d0003ff;
7400
7401 smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
7402 smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
7403 }
7404}
7405
7406static void __init msm8x60_init_tlmm(void)
7407{
7408 if (machine_is_msm8x60_rumi3())
7409 msm_gpio_install_direct_irq(0, 0, 1);
7410}
7411
7412#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
7413 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
7414 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
7415 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
7416 || defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
7417
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007418/* 8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007419#define MAX_SDCC_CONTROLLER 5
7420
7421struct msm_sdcc_gpio {
7422 /* maximum 10 GPIOs per SDCC controller */
7423 s16 no;
7424 /* name of this GPIO */
7425 const char *name;
7426 bool always_on;
7427 bool is_enabled;
7428};
7429
7430#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7431static struct msm_sdcc_gpio sdc1_gpio_cfg[] = {
7432 {159, "sdc1_dat_0"},
7433 {160, "sdc1_dat_1"},
7434 {161, "sdc1_dat_2"},
7435 {162, "sdc1_dat_3"},
7436#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
7437 {163, "sdc1_dat_4"},
7438 {164, "sdc1_dat_5"},
7439 {165, "sdc1_dat_6"},
7440 {166, "sdc1_dat_7"},
7441#endif
7442 {167, "sdc1_clk"},
7443 {168, "sdc1_cmd"}
7444};
7445#endif
7446
7447#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7448static struct msm_sdcc_gpio sdc2_gpio_cfg[] = {
7449 {143, "sdc2_dat_0"},
7450 {144, "sdc2_dat_1", 1},
7451 {145, "sdc2_dat_2"},
7452 {146, "sdc2_dat_3"},
7453#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT
7454 {147, "sdc2_dat_4"},
7455 {148, "sdc2_dat_5"},
7456 {149, "sdc2_dat_6"},
7457 {150, "sdc2_dat_7"},
7458#endif
7459 {151, "sdc2_cmd"},
7460 {152, "sdc2_clk", 1}
7461};
7462#endif
7463
7464#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7465static struct msm_sdcc_gpio sdc5_gpio_cfg[] = {
7466 {95, "sdc5_cmd"},
7467 {96, "sdc5_dat_3"},
7468 {97, "sdc5_clk", 1},
7469 {98, "sdc5_dat_2"},
7470 {99, "sdc5_dat_1", 1},
7471 {100, "sdc5_dat_0"}
7472};
7473#endif
7474
7475struct msm_sdcc_pad_pull_cfg {
7476 enum msm_tlmm_pull_tgt pull;
7477 u32 pull_val;
7478};
7479
7480struct msm_sdcc_pad_drv_cfg {
7481 enum msm_tlmm_hdrive_tgt drv;
7482 u32 drv_val;
7483};
7484
7485#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7486static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = {
7487 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
7488 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
7489 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
7490};
7491
7492static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = {
7493 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
7494 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
7495};
7496
7497static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = {
7498 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
7499 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
7500 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
7501};
7502
7503static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = {
7504 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
7505 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
7506};
7507#endif
7508
7509#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7510static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = {
7511 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA},
7512 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA},
7513 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA}
7514};
7515
7516static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = {
7517 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP},
7518 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP}
7519};
7520
7521static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = {
7522 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA},
7523 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA},
7524 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA}
7525};
7526
7527static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = {
7528 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN},
7529 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN}
7530};
7531#endif
7532
7533struct msm_sdcc_pin_cfg {
7534 /*
7535 * = 1 if controller pins are using gpios
7536 * = 0 if controller has dedicated MSM pins
7537 */
7538 u8 is_gpio;
7539 u8 cfg_sts;
7540 u8 gpio_data_size;
7541 struct msm_sdcc_gpio *gpio_data;
7542 struct msm_sdcc_pad_drv_cfg *pad_drv_on_data;
7543 struct msm_sdcc_pad_drv_cfg *pad_drv_off_data;
7544 struct msm_sdcc_pad_pull_cfg *pad_pull_on_data;
7545 struct msm_sdcc_pad_pull_cfg *pad_pull_off_data;
7546 u8 pad_drv_data_size;
7547 u8 pad_pull_data_size;
7548 u8 sdio_lpm_gpio_cfg;
7549};
7550
7551
7552static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = {
7553#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7554 [0] = {
7555 .is_gpio = 1,
7556 .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg),
7557 .gpio_data = sdc1_gpio_cfg
7558 },
7559#endif
7560#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7561 [1] = {
7562 .is_gpio = 1,
7563 .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg),
7564 .gpio_data = sdc2_gpio_cfg
7565 },
7566#endif
7567#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7568 [2] = {
7569 .is_gpio = 0,
7570 .pad_drv_on_data = sdc3_pad_on_drv_cfg,
7571 .pad_drv_off_data = sdc3_pad_off_drv_cfg,
7572 .pad_pull_on_data = sdc3_pad_on_pull_cfg,
7573 .pad_pull_off_data = sdc3_pad_off_pull_cfg,
7574 .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg),
7575 .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg)
7576 },
7577#endif
7578#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7579 [3] = {
7580 .is_gpio = 0,
7581 .pad_drv_on_data = sdc4_pad_on_drv_cfg,
7582 .pad_drv_off_data = sdc4_pad_off_drv_cfg,
7583 .pad_pull_on_data = sdc4_pad_on_pull_cfg,
7584 .pad_pull_off_data = sdc4_pad_off_pull_cfg,
7585 .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg),
7586 .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg)
7587 },
7588#endif
7589#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7590 [4] = {
7591 .is_gpio = 1,
7592 .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg),
7593 .gpio_data = sdc5_gpio_cfg
7594 }
7595#endif
7596};
7597
7598static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
7599{
7600 int rc = 0;
7601 struct msm_sdcc_pin_cfg *curr;
7602 int n;
7603
7604 curr = &sdcc_pin_cfg_data[dev_id - 1];
7605 if (!curr->gpio_data)
7606 goto out;
7607
7608 for (n = 0; n < curr->gpio_data_size; n++) {
7609 if (enable) {
7610
7611 if (curr->gpio_data[n].always_on &&
7612 curr->gpio_data[n].is_enabled)
7613 continue;
7614 pr_debug("%s: enable: %s\n", __func__,
7615 curr->gpio_data[n].name);
7616 rc = gpio_request(curr->gpio_data[n].no,
7617 curr->gpio_data[n].name);
7618 if (rc) {
7619 pr_err("%s: gpio_request(%d, %s)"
7620 "failed", __func__,
7621 curr->gpio_data[n].no,
7622 curr->gpio_data[n].name);
7623 goto free_gpios;
7624 }
7625 /* set direction as output for all GPIOs */
7626 rc = gpio_direction_output(
7627 curr->gpio_data[n].no, 1);
7628 if (rc) {
7629 pr_err("%s: gpio_direction_output"
7630 "(%d, 1) failed\n", __func__,
7631 curr->gpio_data[n].no);
7632 goto free_gpios;
7633 }
7634 curr->gpio_data[n].is_enabled = 1;
7635 } else {
7636 /*
7637 * now free this GPIO which will put GPIO
7638 * in low power mode and will also put GPIO
7639 * in input mode
7640 */
7641 if (curr->gpio_data[n].always_on)
7642 continue;
7643 pr_debug("%s: disable: %s\n", __func__,
7644 curr->gpio_data[n].name);
7645 gpio_free(curr->gpio_data[n].no);
7646 curr->gpio_data[n].is_enabled = 0;
7647 }
7648 }
7649 curr->cfg_sts = enable;
7650 goto out;
7651
7652free_gpios:
7653 for (; n >= 0; n--)
7654 gpio_free(curr->gpio_data[n].no);
7655out:
7656 return rc;
7657}
7658
7659static int msm_sdcc_setup_pad(int dev_id, unsigned int enable)
7660{
7661 int rc = 0;
7662 struct msm_sdcc_pin_cfg *curr;
7663 int n;
7664
7665 curr = &sdcc_pin_cfg_data[dev_id - 1];
7666 if (!curr->pad_drv_on_data || !curr->pad_pull_on_data)
7667 goto out;
7668
7669 if (enable) {
7670 /*
7671 * set up the normal driver strength and
7672 * pull config for pads
7673 */
7674 for (n = 0; n < curr->pad_drv_data_size; n++) {
7675 if (curr->sdio_lpm_gpio_cfg) {
7676 if (curr->pad_drv_on_data[n].drv ==
7677 TLMM_HDRV_SDC4_DATA)
7678 continue;
7679 }
7680 msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv,
7681 curr->pad_drv_on_data[n].drv_val);
7682 }
7683 for (n = 0; n < curr->pad_pull_data_size; n++) {
7684 if (curr->sdio_lpm_gpio_cfg) {
7685 if (curr->pad_pull_on_data[n].pull ==
7686 TLMM_PULL_SDC4_DATA)
7687 continue;
7688 }
7689 msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull,
7690 curr->pad_pull_on_data[n].pull_val);
7691 }
7692 } else {
7693 /* set the low power config for pads */
7694 for (n = 0; n < curr->pad_drv_data_size; n++) {
7695 if (curr->sdio_lpm_gpio_cfg) {
7696 if (curr->pad_drv_off_data[n].drv ==
7697 TLMM_HDRV_SDC4_DATA)
7698 continue;
7699 }
7700 msm_tlmm_set_hdrive(
7701 curr->pad_drv_off_data[n].drv,
7702 curr->pad_drv_off_data[n].drv_val);
7703 }
7704 for (n = 0; n < curr->pad_pull_data_size; n++) {
7705 if (curr->sdio_lpm_gpio_cfg) {
7706 if (curr->pad_pull_off_data[n].pull ==
7707 TLMM_PULL_SDC4_DATA)
7708 continue;
7709 }
7710 msm_tlmm_set_pull(
7711 curr->pad_pull_off_data[n].pull,
7712 curr->pad_pull_off_data[n].pull_val);
7713 }
7714 }
7715 curr->cfg_sts = enable;
7716out:
7717 return rc;
7718}
7719
7720struct sdcc_reg {
7721 /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/
7722 const char *reg_name;
7723 /*
7724 * is set voltage supported for this regulator?
7725 * 0 = not supported, 1 = supported
7726 */
7727 unsigned char set_voltage_sup;
7728 /* voltage level to be set */
7729 unsigned int level;
7730 /* VDD/VCC/VCCQ voltage regulator handle */
7731 struct regulator *reg;
7732 /* is this regulator enabled? */
7733 bool enabled;
7734 /* is this regulator needs to be always on? */
7735 bool always_on;
7736 /* is operating power mode setting required for this regulator? */
7737 bool op_pwr_mode_sup;
7738 /* Load values for low power and high power mode */
7739 unsigned int lpm_uA;
7740 unsigned int hpm_uA;
7741};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007742/* all SDCC controllers require VDD/VCC voltage */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007743static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
7744/* only SDCC1 requires VCCQ voltage */
7745static struct sdcc_reg sdcc_vccq_reg_data[1];
7746/* all SDCC controllers may require voting for VDD PAD voltage */
7747static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER];
7748
7749struct sdcc_reg_data {
7750 struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */
7751 struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */
7752 struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
7753 unsigned char sts; /* regulator enable/disable status */
7754};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007755/* msm8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007756static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
7757
7758static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
7759{
7760 int rc = 0;
7761
7762 /* Get the regulator handle */
7763 vreg->reg = regulator_get(NULL, vreg->reg_name);
7764 if (IS_ERR(vreg->reg)) {
7765 rc = PTR_ERR(vreg->reg);
7766 pr_err("%s: regulator_get(%s) failed. rc=%d\n",
7767 __func__, vreg->reg_name, rc);
7768 goto out;
7769 }
7770
7771 /* Set the voltage level if required */
7772 if (vreg->set_voltage_sup) {
7773 rc = regulator_set_voltage(vreg->reg, vreg->level,
7774 vreg->level);
7775 if (rc) {
7776 pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n",
7777 __func__, vreg->reg_name, rc);
7778 goto vreg_put;
7779 }
7780 }
7781 goto out;
7782
7783vreg_put:
7784 regulator_put(vreg->reg);
7785out:
7786 return rc;
7787}
7788
7789static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg)
7790{
7791 regulator_put(vreg->reg);
7792}
7793
7794/* this init function should be called only once for each SDCC */
7795static int msm_sdcc_vreg_init(int dev_id, unsigned char init)
7796{
7797 int rc = 0;
7798 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7799 struct sdcc_reg_data *curr;
7800
7801 curr = &sdcc_vreg_data[dev_id - 1];
7802 curr_vdd_reg = curr->vdd_data;
7803 curr_vccq_reg = curr->vccq_data;
7804 curr_vddp_reg = curr->vddp_data;
7805
7806 if (init) {
7807 /*
7808 * get the regulator handle from voltage regulator framework
7809 * and then try to set the voltage level for the regulator
7810 */
7811 if (curr_vdd_reg) {
7812 rc = msm_sdcc_vreg_init_reg(curr_vdd_reg);
7813 if (rc)
7814 goto out;
7815 }
7816 if (curr_vccq_reg) {
7817 rc = msm_sdcc_vreg_init_reg(curr_vccq_reg);
7818 if (rc)
7819 goto vdd_reg_deinit;
7820 }
7821 if (curr_vddp_reg) {
7822 rc = msm_sdcc_vreg_init_reg(curr_vddp_reg);
7823 if (rc)
7824 goto vccq_reg_deinit;
7825 }
7826 goto out;
7827 } else
7828 /* deregister with all regulators from regulator framework */
7829 goto vddp_reg_deinit;
7830
7831vddp_reg_deinit:
7832 if (curr_vddp_reg)
7833 msm_sdcc_vreg_deinit_reg(curr_vddp_reg);
7834vccq_reg_deinit:
7835 if (curr_vccq_reg)
7836 msm_sdcc_vreg_deinit_reg(curr_vccq_reg);
7837vdd_reg_deinit:
7838 if (curr_vdd_reg)
7839 msm_sdcc_vreg_deinit_reg(curr_vdd_reg);
7840out:
7841 return rc;
7842}
7843
7844static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg)
7845{
7846 int rc;
7847
7848 if (!vreg->enabled) {
7849 rc = regulator_enable(vreg->reg);
7850 if (rc) {
7851 pr_err("%s: regulator_enable(%s) failed. rc=%d\n",
7852 __func__, vreg->reg_name, rc);
7853 goto out;
7854 }
7855 vreg->enabled = 1;
7856 }
7857
7858 /* Put always_on regulator in HPM (high power mode) */
7859 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7860 rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA);
7861 if (rc < 0) {
7862 pr_err("%s: reg=%s: HPM setting failed"
7863 " hpm_uA=%d, rc=%d\n",
7864 __func__, vreg->reg_name,
7865 vreg->hpm_uA, rc);
7866 goto vreg_disable;
7867 }
7868 rc = 0;
7869 }
7870 goto out;
7871
7872vreg_disable:
7873 regulator_disable(vreg->reg);
7874 vreg->enabled = 0;
7875out:
7876 return rc;
7877}
7878
7879static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg)
7880{
7881 int rc;
7882
7883 /* Never disable always_on regulator */
7884 if (!vreg->always_on) {
7885 rc = regulator_disable(vreg->reg);
7886 if (rc) {
7887 pr_err("%s: regulator_disable(%s) failed. rc=%d\n",
7888 __func__, vreg->reg_name, rc);
7889 goto out;
7890 }
7891 vreg->enabled = 0;
7892 }
7893
7894 /* Put always_on regulator in LPM (low power mode) */
7895 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7896 rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA);
7897 if (rc < 0) {
7898 pr_err("%s: reg=%s: LPM setting failed"
7899 " lpm_uA=%d, rc=%d\n",
7900 __func__,
7901 vreg->reg_name,
7902 vreg->lpm_uA, rc);
7903 goto out;
7904 }
7905 rc = 0;
7906 }
7907
7908out:
7909 return rc;
7910}
7911
7912static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable)
7913{
7914 int rc = 0;
7915 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7916 struct sdcc_reg_data *curr;
7917
7918 curr = &sdcc_vreg_data[dev_id - 1];
7919 curr_vdd_reg = curr->vdd_data;
7920 curr_vccq_reg = curr->vccq_data;
7921 curr_vddp_reg = curr->vddp_data;
7922
7923 /* check if regulators are initialized or not? */
7924 if ((curr_vdd_reg && !curr_vdd_reg->reg) ||
7925 (curr_vccq_reg && !curr_vccq_reg->reg) ||
7926 (curr_vddp_reg && !curr_vddp_reg->reg)) {
7927 /* initialize voltage regulators required for this SDCC */
7928 rc = msm_sdcc_vreg_init(dev_id, 1);
7929 if (rc) {
7930 pr_err("%s: regulator init failed = %d\n",
7931 __func__, rc);
7932 goto out;
7933 }
7934 }
7935
7936 if (curr->sts == enable)
7937 goto out;
7938
7939 if (curr_vdd_reg) {
7940 if (enable)
7941 rc = msm_sdcc_vreg_enable(curr_vdd_reg);
7942 else
7943 rc = msm_sdcc_vreg_disable(curr_vdd_reg);
7944 if (rc)
7945 goto out;
7946 }
7947
7948 if (curr_vccq_reg) {
7949 if (enable)
7950 rc = msm_sdcc_vreg_enable(curr_vccq_reg);
7951 else
7952 rc = msm_sdcc_vreg_disable(curr_vccq_reg);
7953 if (rc)
7954 goto out;
7955 }
7956
7957 if (curr_vddp_reg) {
7958 if (enable)
7959 rc = msm_sdcc_vreg_enable(curr_vddp_reg);
7960 else
7961 rc = msm_sdcc_vreg_disable(curr_vddp_reg);
7962 if (rc)
7963 goto out;
7964 }
7965 curr->sts = enable;
7966
7967out:
7968 return rc;
7969}
7970
7971static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
7972{
7973 u32 rc_pin_cfg = 0;
7974 u32 rc_vreg_cfg = 0;
7975 u32 rc = 0;
7976 struct platform_device *pdev;
7977 struct msm_sdcc_pin_cfg *curr_pin_cfg;
7978
7979 pdev = container_of(dv, struct platform_device, dev);
7980
7981 /* setup gpio/pad */
7982 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
7983 if (curr_pin_cfg->cfg_sts == !!vdd)
7984 goto setup_vreg;
7985
7986 if (curr_pin_cfg->is_gpio)
7987 rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd);
7988 else
7989 rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd);
7990
7991setup_vreg:
7992 /* setup voltage regulators */
7993 rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd);
7994
7995 if (rc_pin_cfg || rc_vreg_cfg)
7996 rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg;
7997
7998 return rc;
7999}
8000
8001static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active)
8002{
8003 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8004 struct platform_device *pdev;
8005
8006 pdev = container_of(dv, struct platform_device, dev);
8007 /* setup gpio/pad */
8008 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8009
8010 if (curr_pin_cfg->cfg_sts == active)
8011 return;
8012
8013 curr_pin_cfg->sdio_lpm_gpio_cfg = 1;
8014 if (curr_pin_cfg->is_gpio)
8015 msm_sdcc_setup_gpio(pdev->id, active);
8016 else
8017 msm_sdcc_setup_pad(pdev->id, active);
8018 curr_pin_cfg->sdio_lpm_gpio_cfg = 0;
8019}
8020
8021static int msm_sdc3_get_wpswitch(struct device *dev)
8022{
8023 struct platform_device *pdev;
8024 int status;
8025 pdev = container_of(dev, struct platform_device, dev);
8026
8027 status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch");
8028 if (status) {
8029 pr_err("%s:Failed to request GPIO %d\n",
8030 __func__, GPIO_SDC_WP);
8031 } else {
8032 status = gpio_direction_input(GPIO_SDC_WP);
8033 if (!status) {
8034 status = gpio_get_value_cansleep(GPIO_SDC_WP);
8035 pr_info("%s: WP Status for Slot %d = %d\n",
8036 __func__, pdev->id, status);
8037 }
8038 gpio_free(GPIO_SDC_WP);
8039 }
8040 return status;
8041}
8042
8043#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8044int sdc5_register_status_notify(void (*callback)(int, void *),
8045 void *dev_id)
8046{
8047 sdc5_status_notify_cb = callback;
8048 sdc5_status_notify_cb_devid = dev_id;
8049 return 0;
8050}
8051#endif
8052
8053#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8054int sdc2_register_status_notify(void (*callback)(int, void *),
8055 void *dev_id)
8056{
8057 sdc2_status_notify_cb = callback;
8058 sdc2_status_notify_cb_devid = dev_id;
8059 return 0;
8060}
8061#endif
8062
8063/* Interrupt handler for SDC2 and SDC5 detection
8064 * This function uses dual-edge interrputs settings in order
8065 * to get SDIO detection when the GPIO is rising and SDIO removal
8066 * when the GPIO is falling */
8067static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id)
8068{
8069 int status;
8070
8071 if (!machine_is_msm8x60_fusion() &&
8072 !machine_is_msm8x60_fusn_ffa())
8073 return IRQ_NONE;
8074
8075 status = gpio_get_value(MDM2AP_SYNC);
8076 pr_info("%s: MDM2AP_SYNC Status = %d\n",
8077 __func__, status);
8078
8079#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8080 if (sdc2_status_notify_cb) {
8081 pr_info("%s: calling sdc2_status_notify_cb\n", __func__);
8082 sdc2_status_notify_cb(status,
8083 sdc2_status_notify_cb_devid);
8084 }
8085#endif
8086
8087#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8088 if (sdc5_status_notify_cb) {
8089 pr_info("%s: calling sdc5_status_notify_cb\n", __func__);
8090 sdc5_status_notify_cb(status,
8091 sdc5_status_notify_cb_devid);
8092 }
8093#endif
8094 return IRQ_HANDLED;
8095}
8096
8097static int msm8x60_multi_sdio_init(void)
8098{
8099 int ret, irq_num;
8100
8101 if (!machine_is_msm8x60_fusion() &&
8102 !machine_is_msm8x60_fusn_ffa())
8103 return 0;
8104
8105 ret = msm_gpiomux_get(MDM2AP_SYNC);
8106 if (ret) {
8107 pr_err("%s:Failed to request GPIO %d, ret=%d\n",
8108 __func__, MDM2AP_SYNC, ret);
8109 return ret;
8110 }
8111
8112 irq_num = gpio_to_irq(MDM2AP_SYNC);
8113
8114 ret = request_irq(irq_num,
8115 msm8x60_multi_sdio_slot_status_irq,
8116 IRQ_TYPE_EDGE_BOTH,
8117 "sdio_multidetection", NULL);
8118
8119 if (ret) {
8120 pr_err("%s:Failed to request irq, ret=%d\n",
8121 __func__, ret);
8122 return ret;
8123 }
8124
8125 return ret;
8126}
8127
8128#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8129#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8130static unsigned int msm8x60_sdcc_slot_status(struct device *dev)
8131{
8132 int status;
8133
8134 status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)
8135 , "SD_HW_Detect");
8136 if (status) {
8137 pr_err("%s:Failed to request GPIO %d\n", __func__,
8138 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8139 } else {
8140 status = gpio_direction_input(
8141 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8142 if (!status)
8143 status = !(gpio_get_value_cansleep(
8144 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)));
8145 gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8146 }
8147 return (unsigned int) status;
8148}
8149#endif
8150#endif
8151
8152#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8153static int msm_sdcc_cfg_mpm_sdiowakeup(struct device *dev, unsigned mode)
8154{
8155 struct platform_device *pdev;
8156 enum msm_mpm_pin pin;
8157 int ret = 0;
8158
8159 pdev = container_of(dev, struct platform_device, dev);
8160
8161 /* Only SDCC4 slot connected to WLAN chip has wakeup capability */
8162 if (pdev->id == 4)
8163 pin = MSM_MPM_PIN_SDC4_DAT1;
8164 else
8165 return -EINVAL;
8166
8167 switch (mode) {
8168 case SDC_DAT1_DISABLE:
8169 ret = msm_mpm_enable_pin(pin, 0);
8170 break;
8171 case SDC_DAT1_ENABLE:
8172 ret = msm_mpm_set_pin_type(pin, IRQ_TYPE_LEVEL_LOW);
8173 ret = msm_mpm_enable_pin(pin, 1);
8174 break;
8175 case SDC_DAT1_ENWAKE:
8176 ret = msm_mpm_set_pin_wake(pin, 1);
8177 break;
8178 case SDC_DAT1_DISWAKE:
8179 ret = msm_mpm_set_pin_wake(pin, 0);
8180 break;
8181 default:
8182 ret = -EINVAL;
8183 break;
8184 }
8185 return ret;
8186}
8187#endif
8188#endif
8189
8190#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8191static struct mmc_platform_data msm8x60_sdc1_data = {
8192 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8193 .translate_vdd = msm_sdcc_setup_power,
8194#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
8195 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8196#else
8197 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8198#endif
8199 .msmsdcc_fmin = 400000,
8200 .msmsdcc_fmid = 24000000,
8201 .msmsdcc_fmax = 48000000,
8202 .nonremovable = 1,
8203 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008204};
8205#endif
8206
8207#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8208static struct mmc_platform_data msm8x60_sdc2_data = {
8209 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8210 .translate_vdd = msm_sdcc_setup_power,
8211 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8212 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8213 .msmsdcc_fmin = 400000,
8214 .msmsdcc_fmid = 24000000,
8215 .msmsdcc_fmax = 48000000,
8216 .nonremovable = 0,
8217 .pclk_src_dfab = 1,
8218 .register_status_notify = sdc2_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008219#ifdef CONFIG_MSM_SDIO_AL
8220 .is_sdio_al_client = 1,
8221#endif
8222};
8223#endif
8224
8225#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8226static struct mmc_platform_data msm8x60_sdc3_data = {
8227 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8228 .translate_vdd = msm_sdcc_setup_power,
8229 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8230 .wpswitch = msm_sdc3_get_wpswitch,
8231#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8232 .status = msm8x60_sdcc_slot_status,
8233 .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
8234 PMIC_GPIO_SDC3_DET - 1),
8235 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
8236#endif
8237 .msmsdcc_fmin = 400000,
8238 .msmsdcc_fmid = 24000000,
8239 .msmsdcc_fmax = 48000000,
8240 .nonremovable = 0,
8241 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008242};
8243#endif
8244
8245#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8246static struct mmc_platform_data msm8x60_sdc4_data = {
8247 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8248 .translate_vdd = msm_sdcc_setup_power,
8249 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8250 .msmsdcc_fmin = 400000,
8251 .msmsdcc_fmid = 24000000,
8252 .msmsdcc_fmax = 48000000,
8253 .nonremovable = 0,
8254 .pclk_src_dfab = 1,
8255 .cfg_mpm_sdiowakeup = msm_sdcc_cfg_mpm_sdiowakeup,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008256};
8257#endif
8258
8259#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8260static struct mmc_platform_data msm8x60_sdc5_data = {
8261 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8262 .translate_vdd = msm_sdcc_setup_power,
8263 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8264 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8265 .msmsdcc_fmin = 400000,
8266 .msmsdcc_fmid = 24000000,
8267 .msmsdcc_fmax = 48000000,
8268 .nonremovable = 0,
8269 .pclk_src_dfab = 1,
8270 .register_status_notify = sdc5_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008271#ifdef CONFIG_MSM_SDIO_AL
8272 .is_sdio_al_client = 1,
8273#endif
8274};
8275#endif
8276
8277static void __init msm8x60_init_mmc(void)
8278{
8279#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8280 /* SDCC1 : eMMC card connected */
8281 sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0];
8282 sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5";
8283 sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1;
8284 sdcc_vreg_data[0].vdd_data->level = 2850000;
Subhash Jadavania8482a32011-08-08 11:01:44 +05308285 sdcc_vreg_data[0].vdd_data->always_on = 1;
8286 sdcc_vreg_data[0].vdd_data->op_pwr_mode_sup = 1;
8287 sdcc_vreg_data[0].vdd_data->lpm_uA = 9000;
8288 sdcc_vreg_data[0].vdd_data->hpm_uA = 200000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008289
8290 sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0];
8291 sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0";
8292 sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0;
8293 sdcc_vreg_data[0].vccq_data->always_on = 1;
8294
8295 msm_add_sdcc(1, &msm8x60_sdc1_data);
8296#endif
8297#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8298 /*
8299 * MDM SDIO client is connected to SDC2 on charm SURF/FFA
8300 * and no card is connected on 8660 SURF/FFA/FLUID.
8301 */
8302 sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1];
8303 sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3";
8304 sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1;
8305 sdcc_vreg_data[1].vdd_data->level = 1800000;
8306
8307 sdcc_vreg_data[1].vccq_data = NULL;
8308
8309 if (machine_is_msm8x60_fusion())
8310 msm8x60_sdc2_data.msmsdcc_fmax = 24000000;
8311 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8312#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8313 msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144);
8314 msm_sdcc_setup_gpio(2, 1);
8315#endif
8316 msm_add_sdcc(2, &msm8x60_sdc2_data);
8317 }
8318#endif
8319#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8320 /* SDCC3 : External card slot connected */
8321 sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2];
8322 sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14";
8323 sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1;
8324 sdcc_vreg_data[2].vdd_data->level = 2850000;
8325 sdcc_vreg_data[2].vdd_data->always_on = 1;
8326 sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1;
8327 sdcc_vreg_data[2].vdd_data->lpm_uA = 9000;
8328 sdcc_vreg_data[2].vdd_data->hpm_uA = 200000;
8329
8330 sdcc_vreg_data[2].vccq_data = NULL;
8331
8332 sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2];
8333 sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5";
8334 sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1;
8335 sdcc_vreg_data[2].vddp_data->level = 2850000;
8336 sdcc_vreg_data[2].vddp_data->always_on = 1;
8337 sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1;
8338 /* Sleep current required is ~300 uA. But min. RPM
8339 * vote can be in terms of mA (min. 1 mA).
8340 * So let's vote for 2 mA during sleep.
8341 */
8342 sdcc_vreg_data[2].vddp_data->lpm_uA = 2000;
8343 /* Max. Active current required is 16 mA */
8344 sdcc_vreg_data[2].vddp_data->hpm_uA = 16000;
8345
8346 if (machine_is_msm8x60_fluid())
8347 msm8x60_sdc3_data.wpswitch = NULL;
8348 msm_add_sdcc(3, &msm8x60_sdc3_data);
8349#endif
8350#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8351 /* SDCC4 : WLAN WCN1314 chip is connected */
8352 sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3];
8353 sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3";
8354 sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1;
8355 sdcc_vreg_data[3].vdd_data->level = 1800000;
8356
8357 sdcc_vreg_data[3].vccq_data = NULL;
8358
8359 msm_add_sdcc(4, &msm8x60_sdc4_data);
8360#endif
8361#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8362 /*
8363 * MDM SDIO client is connected to SDC5 on charm SURF/FFA
8364 * and no card is connected on 8660 SURF/FFA/FLUID.
8365 */
8366 sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4];
8367 sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3";
8368 sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1;
8369 sdcc_vreg_data[4].vdd_data->level = 1800000;
8370
8371 sdcc_vreg_data[4].vccq_data = NULL;
8372
8373 if (machine_is_msm8x60_fusion())
8374 msm8x60_sdc5_data.msmsdcc_fmax = 24000000;
8375 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8376#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8377 msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99);
8378 msm_sdcc_setup_gpio(5, 1);
8379#endif
8380 msm_add_sdcc(5, &msm8x60_sdc5_data);
8381 }
8382#endif
8383}
8384
8385#if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE)
8386static inline void display_common_power(int on) {}
8387#else
8388
8389#define _GET_REGULATOR(var, name) do { \
8390 if (var == NULL) { \
8391 var = regulator_get(NULL, name); \
8392 if (IS_ERR(var)) { \
8393 pr_err("'%s' regulator not found, rc=%ld\n", \
8394 name, PTR_ERR(var)); \
8395 var = NULL; \
8396 } \
8397 } \
8398} while (0)
8399
8400static int dsub_regulator(int on)
8401{
8402 static struct regulator *dsub_reg;
8403 static struct regulator *mpp0_reg;
8404 static int dsub_reg_enabled;
8405 int rc = 0;
8406
8407 _GET_REGULATOR(dsub_reg, "8901_l3");
8408 if (IS_ERR(dsub_reg)) {
8409 printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld",
8410 __func__, PTR_ERR(dsub_reg));
8411 return PTR_ERR(dsub_reg);
8412 }
8413
8414 _GET_REGULATOR(mpp0_reg, "8901_mpp0");
8415 if (IS_ERR(mpp0_reg)) {
8416 printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld",
8417 __func__, PTR_ERR(mpp0_reg));
8418 return PTR_ERR(mpp0_reg);
8419 }
8420
8421 if (on && !dsub_reg_enabled) {
8422 rc = regulator_set_voltage(dsub_reg, 3300000, 3300000);
8423 if (rc) {
8424 printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage"
8425 " err=%d", __func__, rc);
8426 goto dsub_regulator_err;
8427 }
8428 rc = regulator_enable(dsub_reg);
8429 if (rc) {
8430 printk(KERN_ERR "%s: failed to enable reg 8901_l3"
8431 " err=%d", __func__, rc);
8432 goto dsub_regulator_err;
8433 }
8434 rc = regulator_enable(mpp0_reg);
8435 if (rc) {
8436 printk(KERN_ERR "%s: failed to enable reg 8901_mpp0"
8437 " err=%d", __func__, rc);
8438 goto dsub_regulator_err;
8439 }
8440 dsub_reg_enabled = 1;
8441 } else if (!on && dsub_reg_enabled) {
8442 rc = regulator_disable(dsub_reg);
8443 if (rc)
8444 printk(KERN_WARNING "%s: failed to disable reg 8901_l3"
8445 " err=%d", __func__, rc);
8446 rc = regulator_disable(mpp0_reg);
8447 if (rc)
8448 printk(KERN_WARNING "%s: failed to disable reg "
8449 "8901_mpp0 err=%d", __func__, rc);
8450 dsub_reg_enabled = 0;
8451 }
8452
8453 return rc;
8454
8455dsub_regulator_err:
8456 regulator_put(mpp0_reg);
8457 regulator_put(dsub_reg);
8458 return rc;
8459}
8460
8461static int display_power_on;
8462static void setup_display_power(void)
8463{
8464 if (display_power_on)
8465 if (lcdc_vga_enabled) {
8466 dsub_regulator(1);
8467 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8468 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8469 if (machine_is_msm8x60_ffa() ||
8470 machine_is_msm8x60_fusn_ffa())
8471 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1);
8472 } else {
8473 dsub_regulator(0);
8474 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1);
8475 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1);
8476 if (machine_is_msm8x60_ffa() ||
8477 machine_is_msm8x60_fusn_ffa())
8478 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8479 }
8480 else {
8481 dsub_regulator(0);
8482 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
8483 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8484 /* BACKLIGHT */
8485 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8486 /* LVDS */
8487 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8488 }
8489}
8490
8491#define _GET_REGULATOR(var, name) do { \
8492 if (var == NULL) { \
8493 var = regulator_get(NULL, name); \
8494 if (IS_ERR(var)) { \
8495 pr_err("'%s' regulator not found, rc=%ld\n", \
8496 name, PTR_ERR(var)); \
8497 var = NULL; \
8498 } \
8499 } \
8500} while (0)
8501
8502#define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2)
8503
8504static void display_common_power(int on)
8505{
8506 int rc;
8507 static struct regulator *display_reg;
8508
8509 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
8510 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8511 if (on) {
8512 /* LVDS */
8513 _GET_REGULATOR(display_reg, "8901_l2");
8514 if (!display_reg)
8515 return;
8516 rc = regulator_set_voltage(display_reg,
8517 3300000, 3300000);
8518 if (rc)
8519 goto out;
8520 rc = regulator_enable(display_reg);
8521 if (rc)
8522 goto out;
8523 rc = gpio_request(GPIO_LVDS_SHUTDOWN_N,
8524 "LVDS_STDN_OUT_N");
8525 if (rc) {
8526 printk(KERN_ERR "%s: LVDS gpio %d request"
8527 "failed\n", __func__,
8528 GPIO_LVDS_SHUTDOWN_N);
8529 goto out2;
8530 }
8531
8532 /* BACKLIGHT */
8533 rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN");
8534 if (rc) {
8535 printk(KERN_ERR "%s: BACKLIGHT gpio %d request"
8536 "failed\n", __func__,
8537 GPIO_BACKLIGHT_EN);
8538 goto out3;
8539 }
8540
8541 if (machine_is_msm8x60_ffa() ||
8542 machine_is_msm8x60_fusn_ffa()) {
8543 rc = gpio_request(GPIO_DONGLE_PWR_EN,
8544 "DONGLE_PWR_EN");
8545 if (rc) {
8546 printk(KERN_ERR "%s: DONGLE_PWR_EN gpio"
8547 " %d request failed\n", __func__,
8548 GPIO_DONGLE_PWR_EN);
8549 goto out4;
8550 }
8551 }
8552
8553 gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0);
8554 gpio_direction_output(GPIO_BACKLIGHT_EN, 0);
8555 if (machine_is_msm8x60_ffa() ||
8556 machine_is_msm8x60_fusn_ffa())
8557 gpio_direction_output(GPIO_DONGLE_PWR_EN, 0);
8558 mdelay(20);
8559 display_power_on = 1;
8560 setup_display_power();
8561 } else {
8562 if (display_power_on) {
8563 display_power_on = 0;
8564 setup_display_power();
8565 mdelay(20);
8566 if (machine_is_msm8x60_ffa() ||
8567 machine_is_msm8x60_fusn_ffa())
8568 gpio_free(GPIO_DONGLE_PWR_EN);
8569 goto out4;
8570 }
8571 }
8572 }
8573#if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
8574 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)
8575 else if (machine_is_msm8x60_fluid()) {
8576 static struct regulator *fluid_reg;
8577 static struct regulator *fluid_reg2;
8578
8579 if (on) {
8580 _GET_REGULATOR(fluid_reg, "8901_l2");
8581 if (!fluid_reg)
8582 return;
8583 _GET_REGULATOR(fluid_reg2, "8058_s3");
8584 if (!fluid_reg2) {
8585 regulator_put(fluid_reg);
8586 return;
8587 }
8588 rc = gpio_request(GPIO_RESX_N, "RESX_N");
8589 if (rc) {
8590 regulator_put(fluid_reg2);
8591 regulator_put(fluid_reg);
8592 return;
8593 }
8594 regulator_set_voltage(fluid_reg, 2850000, 2850000);
8595 regulator_set_voltage(fluid_reg2, 1800000, 1800000);
8596 regulator_enable(fluid_reg);
8597 regulator_enable(fluid_reg2);
8598 msleep(20);
8599 gpio_direction_output(GPIO_RESX_N, 0);
8600 udelay(10);
8601 gpio_set_value_cansleep(GPIO_RESX_N, 1);
8602 display_power_on = 1;
8603 setup_display_power();
8604 } else {
8605 gpio_set_value_cansleep(GPIO_RESX_N, 0);
8606 gpio_free(GPIO_RESX_N);
8607 msleep(20);
8608 regulator_disable(fluid_reg2);
8609 regulator_disable(fluid_reg);
8610 regulator_put(fluid_reg2);
8611 regulator_put(fluid_reg);
8612 display_power_on = 0;
8613 setup_display_power();
8614 fluid_reg = NULL;
8615 fluid_reg2 = NULL;
8616 }
8617 }
8618#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04008619#if defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA)
8620 else if (machine_is_msm8x60_dragon()) {
8621 static struct regulator *dragon_reg;
8622 static struct regulator *dragon_reg2;
8623
8624 if (on) {
8625 _GET_REGULATOR(dragon_reg, "8901_l2");
8626 if (!dragon_reg)
8627 return;
8628 _GET_REGULATOR(dragon_reg2, "8058_l16");
8629 if (!dragon_reg2) {
8630 regulator_put(dragon_reg);
8631 dragon_reg = NULL;
8632 return;
8633 }
8634
8635 rc = gpio_request(GPIO_NT35582_BL_EN, "lcdc_bl_en");
8636 if (rc) {
8637 pr_err("%s: gpio %d request failed with rc=%d\n",
8638 __func__, GPIO_NT35582_BL_EN, rc);
8639 regulator_put(dragon_reg);
8640 regulator_put(dragon_reg2);
8641 dragon_reg = NULL;
8642 dragon_reg2 = NULL;
8643 return;
8644 }
8645
8646 if (gpio_tlmm_config(GPIO_CFG(GPIO_NT35582_RESET, 0,
8647 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
8648 GPIO_CFG_16MA), GPIO_CFG_ENABLE)) {
8649 pr_err("%s: config gpio '%d' failed!\n",
8650 __func__, GPIO_NT35582_RESET);
8651 gpio_free(GPIO_NT35582_BL_EN);
8652 regulator_put(dragon_reg);
8653 regulator_put(dragon_reg2);
8654 dragon_reg = NULL;
8655 dragon_reg2 = NULL;
8656 return;
8657 }
8658
8659 rc = gpio_request(GPIO_NT35582_RESET, "lcdc_reset");
8660 if (rc) {
8661 pr_err("%s: unable to request gpio %d (rc=%d)\n",
8662 __func__, GPIO_NT35582_RESET, rc);
8663 gpio_free(GPIO_NT35582_BL_EN);
8664 regulator_put(dragon_reg);
8665 regulator_put(dragon_reg2);
8666 dragon_reg = NULL;
8667 dragon_reg2 = NULL;
8668 return;
8669 }
8670
8671 regulator_set_voltage(dragon_reg, 3300000, 3300000);
8672 regulator_set_voltage(dragon_reg2, 1800000, 1800000);
8673 regulator_enable(dragon_reg);
8674 regulator_enable(dragon_reg2);
8675 msleep(20);
8676
8677 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8678 msleep(20);
8679 gpio_set_value_cansleep(GPIO_NT35582_RESET, 0);
8680 msleep(20);
8681 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8682 msleep(50);
8683
8684 gpio_set_value_cansleep(GPIO_NT35582_BL_EN, 1);
8685
8686 display_power_on = 1;
8687 } else if ((dragon_reg != NULL) && (dragon_reg2 != NULL)) {
8688 gpio_free(GPIO_NT35582_RESET);
8689 gpio_free(GPIO_NT35582_BL_EN);
8690 regulator_disable(dragon_reg2);
8691 regulator_disable(dragon_reg);
8692 regulator_put(dragon_reg2);
8693 regulator_put(dragon_reg);
8694 display_power_on = 0;
8695 dragon_reg = NULL;
8696 dragon_reg2 = NULL;
8697 }
8698 }
8699#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008700 return;
8701
8702out4:
8703 gpio_free(GPIO_BACKLIGHT_EN);
8704out3:
8705 gpio_free(GPIO_LVDS_SHUTDOWN_N);
8706out2:
8707 regulator_disable(display_reg);
8708out:
8709 regulator_put(display_reg);
8710 display_reg = NULL;
8711}
8712#undef _GET_REGULATOR
8713#endif
8714
8715static int mipi_dsi_panel_power(int on);
8716
8717#define LCDC_NUM_GPIO 28
8718#define LCDC_GPIO_START 0
8719
8720static void lcdc_samsung_panel_power(int on)
8721{
8722 int n, ret = 0;
8723
8724 display_common_power(on);
8725
8726 for (n = 0; n < LCDC_NUM_GPIO; n++) {
8727 if (on) {
8728 ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO");
8729 if (unlikely(ret)) {
8730 pr_err("%s not able to get gpio\n", __func__);
8731 break;
8732 }
8733 } else
8734 gpio_free(LCDC_GPIO_START + n);
8735 }
8736
8737 if (ret) {
8738 for (n--; n >= 0; n--)
8739 gpio_free(LCDC_GPIO_START + n);
8740 }
8741
8742 mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */
8743}
8744
8745#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
8746#define _GET_REGULATOR(var, name) do { \
8747 var = regulator_get(NULL, name); \
8748 if (IS_ERR(var)) { \
8749 pr_err("'%s' regulator not found, rc=%ld\n", \
8750 name, IS_ERR(var)); \
8751 var = NULL; \
8752 return -ENODEV; \
8753 } \
8754} while (0)
8755
8756static int hdmi_enable_5v(int on)
8757{
8758 static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */
8759 static struct regulator *reg_8901_mpp0; /* External 5V */
8760 static int prev_on;
8761 int rc;
8762
8763 if (on == prev_on)
8764 return 0;
8765
8766 if (!reg_8901_hdmi_mvs)
8767 _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs");
8768 if (!reg_8901_mpp0)
8769 _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0");
8770
8771 if (on) {
8772 rc = regulator_enable(reg_8901_mpp0);
8773 if (rc) {
8774 pr_err("'%s' regulator enable failed, rc=%d\n",
8775 "reg_8901_mpp0", rc);
8776 return rc;
8777 }
8778 rc = regulator_enable(reg_8901_hdmi_mvs);
8779 if (rc) {
8780 pr_err("'%s' regulator enable failed, rc=%d\n",
8781 "8901_hdmi_mvs", rc);
8782 return rc;
8783 }
8784 pr_info("%s(on): success\n", __func__);
8785 } else {
8786 rc = regulator_disable(reg_8901_hdmi_mvs);
8787 if (rc)
8788 pr_warning("'%s' regulator disable failed, rc=%d\n",
8789 "8901_hdmi_mvs", rc);
8790 rc = regulator_disable(reg_8901_mpp0);
8791 if (rc)
8792 pr_warning("'%s' regulator disable failed, rc=%d\n",
8793 "reg_8901_mpp0", rc);
8794 pr_info("%s(off): success\n", __func__);
8795 }
8796
8797 prev_on = on;
8798
8799 return 0;
8800}
8801
8802static int hdmi_core_power(int on, int show)
8803{
8804 static struct regulator *reg_8058_l16; /* VDD_HDMI */
8805 static int prev_on;
8806 int rc;
8807
8808 if (on == prev_on)
8809 return 0;
8810
8811 if (!reg_8058_l16)
8812 _GET_REGULATOR(reg_8058_l16, "8058_l16");
8813
8814 if (on) {
8815 rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000);
8816 if (!rc)
8817 rc = regulator_enable(reg_8058_l16);
8818 if (rc) {
8819 pr_err("'%s' regulator enable failed, rc=%d\n",
8820 "8058_l16", rc);
8821 return rc;
8822 }
8823 rc = gpio_request(170, "HDMI_DDC_CLK");
8824 if (rc) {
8825 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8826 "HDMI_DDC_CLK", 170, rc);
8827 goto error1;
8828 }
8829 rc = gpio_request(171, "HDMI_DDC_DATA");
8830 if (rc) {
8831 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8832 "HDMI_DDC_DATA", 171, rc);
8833 goto error2;
8834 }
8835 rc = gpio_request(172, "HDMI_HPD");
8836 if (rc) {
8837 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8838 "HDMI_HPD", 172, rc);
8839 goto error3;
8840 }
8841 pr_info("%s(on): success\n", __func__);
8842 } else {
8843 gpio_free(170);
8844 gpio_free(171);
8845 gpio_free(172);
8846 rc = regulator_disable(reg_8058_l16);
8847 if (rc)
8848 pr_warning("'%s' regulator disable failed, rc=%d\n",
8849 "8058_l16", rc);
8850 pr_info("%s(off): success\n", __func__);
8851 }
8852
8853 prev_on = on;
8854
8855 return 0;
8856
8857error3:
8858 gpio_free(171);
8859error2:
8860 gpio_free(170);
8861error1:
8862 regulator_disable(reg_8058_l16);
8863 return rc;
8864}
8865
8866static int hdmi_cec_power(int on)
8867{
8868 static struct regulator *reg_8901_l3; /* HDMI_CEC */
8869 static int prev_on;
8870 int rc;
8871
8872 if (on == prev_on)
8873 return 0;
8874
8875 if (!reg_8901_l3)
8876 _GET_REGULATOR(reg_8901_l3, "8901_l3");
8877
8878 if (on) {
8879 rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000);
8880 if (!rc)
8881 rc = regulator_enable(reg_8901_l3);
8882 if (rc) {
8883 pr_err("'%s' regulator enable failed, rc=%d\n",
8884 "8901_l3", rc);
8885 return rc;
8886 }
8887 rc = gpio_request(169, "HDMI_CEC_VAR");
8888 if (rc) {
8889 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8890 "HDMI_CEC_VAR", 169, rc);
8891 goto error;
8892 }
8893 pr_info("%s(on): success\n", __func__);
8894 } else {
8895 gpio_free(169);
8896 rc = regulator_disable(reg_8901_l3);
8897 if (rc)
8898 pr_warning("'%s' regulator disable failed, rc=%d\n",
8899 "8901_l3", rc);
8900 pr_info("%s(off): success\n", __func__);
8901 }
8902
8903 prev_on = on;
8904
8905 return 0;
8906error:
8907 regulator_disable(reg_8901_l3);
8908 return rc;
8909}
8910
8911#undef _GET_REGULATOR
8912
8913#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
8914
8915static int lcdc_panel_power(int on)
8916{
8917 int flag_on = !!on;
8918 static int lcdc_power_save_on;
8919
8920 if (lcdc_power_save_on == flag_on)
8921 return 0;
8922
8923 lcdc_power_save_on = flag_on;
8924
8925 lcdc_samsung_panel_power(on);
8926
8927 return 0;
8928}
8929
8930#ifdef CONFIG_MSM_BUS_SCALING
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008931static struct msm_bus_vectors mdp_init_vectors[] = {
8932 /* For now, 0th array entry is reserved.
8933 * Please leave 0 as is and don't use it
8934 */
8935 {
8936 .src = MSM_BUS_MASTER_MDP_PORT0,
8937 .dst = MSM_BUS_SLAVE_SMI,
8938 .ab = 0,
8939 .ib = 0,
8940 },
8941 /* Master and slaves can be from different fabrics */
8942 {
8943 .src = MSM_BUS_MASTER_MDP_PORT0,
8944 .dst = MSM_BUS_SLAVE_EBI_CH0,
8945 .ab = 0,
8946 .ib = 0,
8947 },
8948};
8949
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07008950#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
8951static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
8952 /* If HDMI is used as primary */
8953 {
8954 .src = MSM_BUS_MASTER_MDP_PORT0,
8955 .dst = MSM_BUS_SLAVE_SMI,
8956 .ab = 2000000000,
8957 .ib = 2000000000,
8958 },
8959 /* Master and slaves can be from different fabrics */
8960 {
8961 .src = MSM_BUS_MASTER_MDP_PORT0,
8962 .dst = MSM_BUS_SLAVE_EBI_CH0,
8963 .ab = 2000000000,
8964 .ib = 2000000000,
8965 },
8966};
8967
8968static struct msm_bus_paths mdp_bus_scale_usecases[] = {
8969 {
8970 ARRAY_SIZE(mdp_init_vectors),
8971 mdp_init_vectors,
8972 },
8973 {
8974 ARRAY_SIZE(hdmi_as_primary_vectors),
8975 hdmi_as_primary_vectors,
8976 },
8977 {
8978 ARRAY_SIZE(hdmi_as_primary_vectors),
8979 hdmi_as_primary_vectors,
8980 },
8981 {
8982 ARRAY_SIZE(hdmi_as_primary_vectors),
8983 hdmi_as_primary_vectors,
8984 },
8985 {
8986 ARRAY_SIZE(hdmi_as_primary_vectors),
8987 hdmi_as_primary_vectors,
8988 },
8989 {
8990 ARRAY_SIZE(hdmi_as_primary_vectors),
8991 hdmi_as_primary_vectors,
8992 },
8993};
8994#else
8995#ifdef CONFIG_FB_MSM_LCDC_DSUB
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008996static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
8997 /* Default case static display/UI/2d/3d if FB SMI */
8998 {
8999 .src = MSM_BUS_MASTER_MDP_PORT0,
9000 .dst = MSM_BUS_SLAVE_SMI,
9001 .ab = 388800000,
9002 .ib = 486000000,
9003 },
9004 /* Master and slaves can be from different fabrics */
9005 {
9006 .src = MSM_BUS_MASTER_MDP_PORT0,
9007 .dst = MSM_BUS_SLAVE_EBI_CH0,
9008 .ab = 0,
9009 .ib = 0,
9010 },
9011};
9012
9013static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9014 /* Default case static display/UI/2d/3d if FB SMI */
9015 {
9016 .src = MSM_BUS_MASTER_MDP_PORT0,
9017 .dst = MSM_BUS_SLAVE_SMI,
9018 .ab = 0,
9019 .ib = 0,
9020 },
9021 /* Master and slaves can be from different fabrics */
9022 {
9023 .src = MSM_BUS_MASTER_MDP_PORT0,
9024 .dst = MSM_BUS_SLAVE_EBI_CH0,
9025 .ab = 388800000,
9026 .ib = 486000000 * 2,
9027 },
9028};
9029static struct msm_bus_vectors mdp_vga_vectors[] = {
9030 /* VGA and less video */
9031 {
9032 .src = MSM_BUS_MASTER_MDP_PORT0,
9033 .dst = MSM_BUS_SLAVE_SMI,
9034 .ab = 458092800,
9035 .ib = 572616000,
9036 },
9037 {
9038 .src = MSM_BUS_MASTER_MDP_PORT0,
9039 .dst = MSM_BUS_SLAVE_EBI_CH0,
9040 .ab = 458092800,
9041 .ib = 572616000 * 2,
9042 },
9043};
9044static struct msm_bus_vectors mdp_720p_vectors[] = {
9045 /* 720p and less video */
9046 {
9047 .src = MSM_BUS_MASTER_MDP_PORT0,
9048 .dst = MSM_BUS_SLAVE_SMI,
9049 .ab = 471744000,
9050 .ib = 589680000,
9051 },
9052 /* Master and slaves can be from different fabrics */
9053 {
9054 .src = MSM_BUS_MASTER_MDP_PORT0,
9055 .dst = MSM_BUS_SLAVE_EBI_CH0,
9056 .ab = 471744000,
9057 .ib = 589680000 * 2,
9058 },
9059};
9060
9061static struct msm_bus_vectors mdp_1080p_vectors[] = {
9062 /* 1080p and less video */
9063 {
9064 .src = MSM_BUS_MASTER_MDP_PORT0,
9065 .dst = MSM_BUS_SLAVE_SMI,
9066 .ab = 575424000,
9067 .ib = 719280000,
9068 },
9069 /* Master and slaves can be from different fabrics */
9070 {
9071 .src = MSM_BUS_MASTER_MDP_PORT0,
9072 .dst = MSM_BUS_SLAVE_EBI_CH0,
9073 .ab = 575424000,
9074 .ib = 719280000 * 2,
9075 },
9076};
9077
9078#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009079static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9080 /* Default case static display/UI/2d/3d if FB SMI */
9081 {
9082 .src = MSM_BUS_MASTER_MDP_PORT0,
9083 .dst = MSM_BUS_SLAVE_SMI,
9084 .ab = 175110000,
9085 .ib = 218887500,
9086 },
9087 /* Master and slaves can be from different fabrics */
9088 {
9089 .src = MSM_BUS_MASTER_MDP_PORT0,
9090 .dst = MSM_BUS_SLAVE_EBI_CH0,
9091 .ab = 0,
9092 .ib = 0,
9093 },
9094};
9095
9096static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9097 /* Default case static display/UI/2d/3d if FB SMI */
9098 {
9099 .src = MSM_BUS_MASTER_MDP_PORT0,
9100 .dst = MSM_BUS_SLAVE_SMI,
9101 .ab = 0,
9102 .ib = 0,
9103 },
9104 /* Master and slaves can be from different fabrics */
9105 {
9106 .src = MSM_BUS_MASTER_MDP_PORT0,
9107 .dst = MSM_BUS_SLAVE_EBI_CH0,
9108 .ab = 216000000,
9109 .ib = 270000000 * 2,
9110 },
9111};
9112static struct msm_bus_vectors mdp_vga_vectors[] = {
9113 /* VGA and less video */
9114 {
9115 .src = MSM_BUS_MASTER_MDP_PORT0,
9116 .dst = MSM_BUS_SLAVE_SMI,
9117 .ab = 216000000,
9118 .ib = 270000000,
9119 },
9120 {
9121 .src = MSM_BUS_MASTER_MDP_PORT0,
9122 .dst = MSM_BUS_SLAVE_EBI_CH0,
9123 .ab = 216000000,
9124 .ib = 270000000 * 2,
9125 },
9126};
9127
9128static struct msm_bus_vectors mdp_720p_vectors[] = {
9129 /* 720p and less video */
9130 {
9131 .src = MSM_BUS_MASTER_MDP_PORT0,
9132 .dst = MSM_BUS_SLAVE_SMI,
9133 .ab = 230400000,
9134 .ib = 288000000,
9135 },
9136 /* Master and slaves can be from different fabrics */
9137 {
9138 .src = MSM_BUS_MASTER_MDP_PORT0,
9139 .dst = MSM_BUS_SLAVE_EBI_CH0,
9140 .ab = 230400000,
9141 .ib = 288000000 * 2,
9142 },
9143};
9144
9145static struct msm_bus_vectors mdp_1080p_vectors[] = {
9146 /* 1080p and less video */
9147 {
9148 .src = MSM_BUS_MASTER_MDP_PORT0,
9149 .dst = MSM_BUS_SLAVE_SMI,
9150 .ab = 334080000,
9151 .ib = 417600000,
9152 },
9153 /* Master and slaves can be from different fabrics */
9154 {
9155 .src = MSM_BUS_MASTER_MDP_PORT0,
9156 .dst = MSM_BUS_SLAVE_EBI_CH0,
9157 .ab = 334080000,
Ravishangar Kalyanam731beb92011-07-07 18:27:32 -07009158 .ib = 550000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009159 },
9160};
9161
9162#endif
9163static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9164 {
9165 ARRAY_SIZE(mdp_init_vectors),
9166 mdp_init_vectors,
9167 },
9168 {
9169 ARRAY_SIZE(mdp_sd_smi_vectors),
9170 mdp_sd_smi_vectors,
9171 },
9172 {
9173 ARRAY_SIZE(mdp_sd_ebi_vectors),
9174 mdp_sd_ebi_vectors,
9175 },
9176 {
9177 ARRAY_SIZE(mdp_vga_vectors),
9178 mdp_vga_vectors,
9179 },
9180 {
9181 ARRAY_SIZE(mdp_720p_vectors),
9182 mdp_720p_vectors,
9183 },
9184 {
9185 ARRAY_SIZE(mdp_1080p_vectors),
9186 mdp_1080p_vectors,
9187 },
9188};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009189#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009190static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
9191 mdp_bus_scale_usecases,
9192 ARRAY_SIZE(mdp_bus_scale_usecases),
9193 .name = "mdp",
9194};
9195
9196#endif
9197#ifdef CONFIG_MSM_BUS_SCALING
9198static struct msm_bus_vectors dtv_bus_init_vectors[] = {
9199 /* For now, 0th array entry is reserved.
9200 * Please leave 0 as is and don't use it
9201 */
9202 {
9203 .src = MSM_BUS_MASTER_MDP_PORT0,
9204 .dst = MSM_BUS_SLAVE_SMI,
9205 .ab = 0,
9206 .ib = 0,
9207 },
9208 /* Master and slaves can be from different fabrics */
9209 {
9210 .src = MSM_BUS_MASTER_MDP_PORT0,
9211 .dst = MSM_BUS_SLAVE_EBI_CH0,
9212 .ab = 0,
9213 .ib = 0,
9214 },
9215};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009216#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9217static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9218 /* For now, 0th array entry is reserved.
9219 * Please leave 0 as is and don't use it
9220 */
9221 {
9222 .src = MSM_BUS_MASTER_MDP_PORT0,
9223 .dst = MSM_BUS_SLAVE_SMI,
9224 .ab = 2000000000,
9225 .ib = 2000000000,
9226 },
9227 /* Master and slaves can be from different fabrics */
9228 {
9229 .src = MSM_BUS_MASTER_MDP_PORT0,
9230 .dst = MSM_BUS_SLAVE_EBI_CH0,
9231 .ab = 2000000000,
9232 .ib = 2000000000,
9233 },
9234};
9235#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009236static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9237 /* For now, 0th array entry is reserved.
9238 * Please leave 0 as is and don't use it
9239 */
9240 {
9241 .src = MSM_BUS_MASTER_MDP_PORT0,
9242 .dst = MSM_BUS_SLAVE_SMI,
9243 .ab = 566092800,
9244 .ib = 707616000,
9245 },
9246 /* Master and slaves can be from different fabrics */
9247 {
9248 .src = MSM_BUS_MASTER_MDP_PORT0,
9249 .dst = MSM_BUS_SLAVE_EBI_CH0,
9250 .ab = 566092800,
9251 .ib = 707616000,
9252 },
9253};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009254#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009255static struct msm_bus_paths dtv_bus_scale_usecases[] = {
9256 {
9257 ARRAY_SIZE(dtv_bus_init_vectors),
9258 dtv_bus_init_vectors,
9259 },
9260 {
9261 ARRAY_SIZE(dtv_bus_def_vectors),
9262 dtv_bus_def_vectors,
9263 },
9264};
9265static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
9266 dtv_bus_scale_usecases,
9267 ARRAY_SIZE(dtv_bus_scale_usecases),
9268 .name = "dtv",
9269};
9270
9271static struct lcdc_platform_data dtv_pdata = {
9272 .bus_scale_table = &dtv_bus_scale_pdata,
9273};
9274#endif
9275
9276
9277static struct lcdc_platform_data lcdc_pdata = {
9278 .lcdc_power_save = lcdc_panel_power,
9279};
9280
9281
9282#define MDP_VSYNC_GPIO 28
9283
9284/*
9285 * MIPI_DSI only use 8058_LDO0 which need always on
9286 * therefore it need to be put at low power mode if
9287 * it was not used instead of turn it off.
9288 */
9289static int mipi_dsi_panel_power(int on)
9290{
9291 int flag_on = !!on;
9292 static int mipi_dsi_power_save_on;
9293 static struct regulator *ldo0;
9294 int rc = 0;
9295
9296 if (mipi_dsi_power_save_on == flag_on)
9297 return 0;
9298
9299 mipi_dsi_power_save_on = flag_on;
9300
9301 if (ldo0 == NULL) { /* init */
9302 ldo0 = regulator_get(NULL, "8058_l0");
9303 if (IS_ERR(ldo0)) {
9304 pr_debug("%s: LDO0 failed\n", __func__);
9305 rc = PTR_ERR(ldo0);
9306 return rc;
9307 }
9308
9309 rc = regulator_set_voltage(ldo0, 1200000, 1200000);
9310 if (rc)
9311 goto out;
9312
9313 rc = regulator_enable(ldo0);
9314 if (rc)
9315 goto out;
9316 }
9317
9318 if (on) {
9319 /* set ldo0 to HPM */
9320 rc = regulator_set_optimum_mode(ldo0, 100000);
9321 if (rc < 0)
9322 goto out;
9323 } else {
9324 /* set ldo0 to LPM */
Padmanabhan Komanduru0b478ff2011-11-22 19:15:40 +05309325 rc = regulator_set_optimum_mode(ldo0, 1000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009326 if (rc < 0)
9327 goto out;
9328 }
9329
9330 return 0;
9331out:
9332 regulator_disable(ldo0);
9333 regulator_put(ldo0);
9334 ldo0 = NULL;
9335 return rc;
9336}
9337
9338static struct mipi_dsi_platform_data mipi_dsi_pdata = {
9339 .vsync_gpio = MDP_VSYNC_GPIO,
9340 .dsi_power_save = mipi_dsi_panel_power,
9341};
9342
9343#ifdef CONFIG_FB_MSM_TVOUT
9344static struct regulator *reg_8058_l13;
9345
9346static int atv_dac_power(int on)
9347{
9348 int rc = 0;
9349 #define _GET_REGULATOR(var, name) do { \
9350 var = regulator_get(NULL, name); \
9351 if (IS_ERR(var)) { \
9352 pr_info("'%s' regulator not found, rc=%ld\n", \
9353 name, IS_ERR(var)); \
9354 var = NULL; \
9355 return -ENODEV; \
9356 } \
9357 } while (0)
9358
9359 if (!reg_8058_l13)
9360 _GET_REGULATOR(reg_8058_l13, "8058_l13");
9361 #undef _GET_REGULATOR
9362
9363 if (on) {
9364 rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000);
9365 if (rc) {
9366 pr_info("%s: '%s' regulator set voltage failed,\
9367 rc=%d\n", __func__, "8058_l13", rc);
9368 return rc;
9369 }
9370
9371 rc = regulator_enable(reg_8058_l13);
9372 if (rc) {
9373 pr_err("%s: '%s' regulator enable failed,\
9374 rc=%d\n", __func__, "8058_l13", rc);
9375 return rc;
9376 }
9377 } else {
9378 rc = regulator_force_disable(reg_8058_l13);
9379 if (rc)
9380 pr_warning("%s: '%s' regulator disable failed, rc=%d\n",
9381 __func__, "8058_l13", rc);
9382 }
9383 return rc;
9384
9385}
9386#endif
9387
9388#ifdef CONFIG_FB_MSM_MIPI_DSI
9389int mdp_core_clk_rate_table[] = {
9390 85330000,
9391 85330000,
9392 160000000,
9393 200000000,
9394};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009395#elif defined(CONFIG_FB_MSM_HDMI_AS_PRIMARY)
9396int mdp_core_clk_rate_table[] = {
9397 200000000,
9398 200000000,
9399 200000000,
9400 200000000,
9401};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009402#else
9403int mdp_core_clk_rate_table[] = {
9404 59080000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009405 85330000,
kuogee hsieh26791a92011-08-01 18:35:58 -07009406 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009407 200000000,
9408};
9409#endif
9410
9411static struct msm_panel_common_pdata mdp_pdata = {
9412 .gpio = MDP_VSYNC_GPIO,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009413#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9414 .mdp_core_clk_rate = 200000000,
9415#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009416 .mdp_core_clk_rate = 59080000,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009417#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009418 .mdp_core_clk_table = mdp_core_clk_rate_table,
9419 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
9420#ifdef CONFIG_MSM_BUS_SCALING
9421 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
9422#endif
9423 .mdp_rev = MDP_REV_41,
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07009424 .writeback_offset = writeback_offset,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009425};
9426
9427#ifdef CONFIG_FB_MSM_TVOUT
9428
9429#ifdef CONFIG_MSM_BUS_SCALING
9430static struct msm_bus_vectors atv_bus_init_vectors[] = {
9431 /* For now, 0th array entry is reserved.
9432 * Please leave 0 as is and don't use it
9433 */
9434 {
9435 .src = MSM_BUS_MASTER_MDP_PORT0,
9436 .dst = MSM_BUS_SLAVE_SMI,
9437 .ab = 0,
9438 .ib = 0,
9439 },
9440 /* Master and slaves can be from different fabrics */
9441 {
9442 .src = MSM_BUS_MASTER_MDP_PORT0,
9443 .dst = MSM_BUS_SLAVE_EBI_CH0,
9444 .ab = 0,
9445 .ib = 0,
9446 },
9447};
9448static struct msm_bus_vectors atv_bus_def_vectors[] = {
9449 /* For now, 0th array entry is reserved.
9450 * Please leave 0 as is and don't use it
9451 */
9452 {
9453 .src = MSM_BUS_MASTER_MDP_PORT0,
9454 .dst = MSM_BUS_SLAVE_SMI,
9455 .ab = 236390400,
9456 .ib = 265939200,
9457 },
9458 /* Master and slaves can be from different fabrics */
9459 {
9460 .src = MSM_BUS_MASTER_MDP_PORT0,
9461 .dst = MSM_BUS_SLAVE_EBI_CH0,
9462 .ab = 236390400,
9463 .ib = 265939200,
9464 },
9465};
9466static struct msm_bus_paths atv_bus_scale_usecases[] = {
9467 {
9468 ARRAY_SIZE(atv_bus_init_vectors),
9469 atv_bus_init_vectors,
9470 },
9471 {
9472 ARRAY_SIZE(atv_bus_def_vectors),
9473 atv_bus_def_vectors,
9474 },
9475};
9476static struct msm_bus_scale_pdata atv_bus_scale_pdata = {
9477 atv_bus_scale_usecases,
9478 ARRAY_SIZE(atv_bus_scale_usecases),
9479 .name = "atv",
9480};
9481#endif
9482
9483static struct tvenc_platform_data atv_pdata = {
9484 .poll = 0,
9485 .pm_vid_en = atv_dac_power,
9486#ifdef CONFIG_MSM_BUS_SCALING
9487 .bus_scale_table = &atv_bus_scale_pdata,
9488#endif
9489};
9490#endif
9491
9492static void __init msm_fb_add_devices(void)
9493{
9494#ifdef CONFIG_FB_MSM_LCDC_DSUB
9495 mdp_pdata.mdp_core_clk_table = NULL;
9496 mdp_pdata.num_mdp_clk = 0;
9497 mdp_pdata.mdp_core_clk_rate = 200000000;
9498#endif
9499 if (machine_is_msm8x60_rumi3())
9500 msm_fb_register_device("mdp", NULL);
9501 else
9502 msm_fb_register_device("mdp", &mdp_pdata);
9503
9504 msm_fb_register_device("lcdc", &lcdc_pdata);
9505 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
9506#ifdef CONFIG_MSM_BUS_SCALING
9507 msm_fb_register_device("dtv", &dtv_pdata);
9508#endif
9509#ifdef CONFIG_FB_MSM_TVOUT
9510 msm_fb_register_device("tvenc", &atv_pdata);
9511 msm_fb_register_device("tvout_device", NULL);
9512#endif
9513}
9514
9515#if (defined(CONFIG_MARIMBA_CORE)) && \
9516 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
9517
9518static const struct {
9519 char *name;
9520 int vmin;
9521 int vmax;
9522} bt_regs_info[] = {
9523 { "8058_s3", 1800000, 1800000 },
9524 { "8058_s2", 1300000, 1300000 },
9525 { "8058_l8", 2900000, 3050000 },
9526};
9527
9528static struct {
9529 bool enabled;
9530} bt_regs_status[] = {
9531 { false },
9532 { false },
9533 { false },
9534};
9535static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)];
9536
9537static int bahama_bt(int on)
9538{
9539 int rc;
9540 int i;
9541 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
9542
9543 struct bahama_variant_register {
9544 const size_t size;
9545 const struct bahama_config_register *set;
9546 };
9547
9548 const struct bahama_config_register *p;
9549
9550 u8 version;
9551
9552 const struct bahama_config_register v10_bt_on[] = {
9553 { 0xE9, 0x00, 0xFF },
9554 { 0xF4, 0x80, 0xFF },
9555 { 0xE4, 0x00, 0xFF },
9556 { 0xE5, 0x00, 0x0F },
9557#ifdef CONFIG_WLAN
9558 { 0xE6, 0x38, 0x7F },
9559 { 0xE7, 0x06, 0xFF },
9560#endif
9561 { 0xE9, 0x21, 0xFF },
9562 { 0x01, 0x0C, 0x1F },
9563 { 0x01, 0x08, 0x1F },
9564 };
9565
9566 const struct bahama_config_register v20_bt_on_fm_off[] = {
9567 { 0x11, 0x0C, 0xFF },
9568 { 0x13, 0x01, 0xFF },
9569 { 0xF4, 0x80, 0xFF },
9570 { 0xF0, 0x00, 0xFF },
9571 { 0xE9, 0x00, 0xFF },
9572#ifdef CONFIG_WLAN
9573 { 0x81, 0x00, 0x7F },
9574 { 0x82, 0x00, 0xFF },
9575 { 0xE6, 0x38, 0x7F },
9576 { 0xE7, 0x06, 0xFF },
9577#endif
9578 { 0xE9, 0x21, 0xFF },
9579 };
9580
9581 const struct bahama_config_register v20_bt_on_fm_on[] = {
9582 { 0x11, 0x0C, 0xFF },
9583 { 0x13, 0x01, 0xFF },
9584 { 0xF4, 0x86, 0xFF },
9585 { 0xF0, 0x06, 0xFF },
9586 { 0xE9, 0x00, 0xFF },
9587#ifdef CONFIG_WLAN
9588 { 0x81, 0x00, 0x7F },
9589 { 0x82, 0x00, 0xFF },
9590 { 0xE6, 0x38, 0x7F },
9591 { 0xE7, 0x06, 0xFF },
9592#endif
9593 { 0xE9, 0x21, 0xFF },
9594 };
9595
9596 const struct bahama_config_register v10_bt_off[] = {
9597 { 0xE9, 0x00, 0xFF },
9598 };
9599
9600 const struct bahama_config_register v20_bt_off_fm_off[] = {
9601 { 0xF4, 0x84, 0xFF },
9602 { 0xF0, 0x04, 0xFF },
9603 { 0xE9, 0x00, 0xFF }
9604 };
9605
9606 const struct bahama_config_register v20_bt_off_fm_on[] = {
9607 { 0xF4, 0x86, 0xFF },
9608 { 0xF0, 0x06, 0xFF },
9609 { 0xE9, 0x00, 0xFF }
9610 };
9611 const struct bahama_variant_register bt_bahama[2][3] = {
9612 {
9613 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
9614 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
9615 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
9616 },
9617 {
9618 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
9619 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
9620 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
9621 }
9622 };
9623
9624 u8 offset = 0; /* index into bahama configs */
9625
9626 on = on ? 1 : 0;
9627 version = read_bahama_ver();
9628
9629 if (version == VER_UNSUPPORTED) {
9630 dev_err(&msm_bt_power_device.dev,
9631 "%s: unsupported version\n",
9632 __func__);
9633 return -EIO;
9634 }
9635
9636 if (version == VER_2_0) {
9637 if (marimba_get_fm_status(&config))
9638 offset = 0x01;
9639 }
9640
9641 /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */
9642 if (on && (version == VER_2_0)) {
9643 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9644 if ((!strcmp(bt_regs_info[i].name, "8058_s2"))
9645 && (bt_regs_status[i].enabled == true)) {
9646 if (regulator_disable(bt_regs[i])) {
9647 dev_err(&msm_bt_power_device.dev,
9648 "%s: regulator disable failed",
9649 __func__);
9650 }
9651 bt_regs_status[i].enabled = false;
9652 break;
9653 }
9654 }
9655 }
9656
9657 p = bt_bahama[on][version + offset].set;
9658
9659 dev_info(&msm_bt_power_device.dev,
9660 "%s: found version %d\n", __func__, version);
9661
9662 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
9663 u8 value = (p+i)->value;
9664 rc = marimba_write_bit_mask(&config,
9665 (p+i)->reg,
9666 &value,
9667 sizeof((p+i)->value),
9668 (p+i)->mask);
9669 if (rc < 0) {
9670 dev_err(&msm_bt_power_device.dev,
9671 "%s: reg %d write failed: %d\n",
9672 __func__, (p+i)->reg, rc);
9673 return rc;
9674 }
9675 dev_dbg(&msm_bt_power_device.dev,
9676 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
9677 __func__, (p+i)->reg,
9678 value, (p+i)->mask);
9679 }
9680 /* Update BT Status */
9681 if (on)
9682 marimba_set_bt_status(&config, true);
9683 else
9684 marimba_set_bt_status(&config, false);
9685
9686 return 0;
9687}
9688
9689static int bluetooth_use_regulators(int on)
9690{
9691 int i, recover = -1, rc = 0;
9692
9693 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9694 bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev,
9695 bt_regs_info[i].name) :
9696 (regulator_put(bt_regs[i]), NULL);
9697 if (IS_ERR(bt_regs[i])) {
9698 rc = PTR_ERR(bt_regs[i]);
9699 dev_err(&msm_bt_power_device.dev,
9700 "regulator %s get failed (%d)\n",
9701 bt_regs_info[i].name, rc);
9702 recover = i - 1;
9703 bt_regs[i] = NULL;
9704 break;
9705 }
9706
9707 if (!on)
9708 continue;
9709
9710 rc = regulator_set_voltage(bt_regs[i],
9711 bt_regs_info[i].vmin,
9712 bt_regs_info[i].vmax);
9713 if (rc < 0) {
9714 dev_err(&msm_bt_power_device.dev,
9715 "regulator %s voltage set (%d)\n",
9716 bt_regs_info[i].name, rc);
9717 recover = i;
9718 break;
9719 }
9720 }
9721
9722 if (on && (recover > -1))
9723 for (i = recover; i >= 0; i--) {
9724 regulator_put(bt_regs[i]);
9725 bt_regs[i] = NULL;
9726 }
9727
9728 return rc;
9729}
9730
9731static int bluetooth_switch_regulators(int on)
9732{
9733 int i, rc = 0;
9734
9735 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9736 if (on && (bt_regs_status[i].enabled == false)) {
9737 rc = regulator_enable(bt_regs[i]);
9738 if (rc < 0) {
9739 dev_err(&msm_bt_power_device.dev,
9740 "regulator %s %s failed (%d)\n",
9741 bt_regs_info[i].name,
9742 "enable", rc);
9743 if (i > 0) {
9744 while (--i) {
9745 regulator_disable(bt_regs[i]);
9746 bt_regs_status[i].enabled
9747 = false;
9748 }
9749 break;
9750 }
9751 }
9752 bt_regs_status[i].enabled = true;
9753 } else if (!on && (bt_regs_status[i].enabled == true)) {
9754 rc = regulator_disable(bt_regs[i]);
9755 if (rc < 0) {
9756 dev_err(&msm_bt_power_device.dev,
9757 "regulator %s %s failed (%d)\n",
9758 bt_regs_info[i].name,
9759 "disable", rc);
9760 break;
9761 }
9762 bt_regs_status[i].enabled = false;
9763 }
9764 }
9765 return rc;
9766}
9767
9768static struct msm_xo_voter *bt_clock;
9769
9770static int bluetooth_power(int on)
9771{
9772 int rc = 0;
9773 int id;
9774
9775 /* In case probe function fails, cur_connv_type would be -1 */
9776 id = adie_get_detected_connectivity_type();
9777 if (id != BAHAMA_ID) {
9778 pr_err("%s: unexpected adie connectivity type: %d\n",
9779 __func__, id);
9780 return -ENODEV;
9781 }
9782
9783 if (on) {
9784
9785 rc = bluetooth_use_regulators(1);
9786 if (rc < 0)
9787 goto out;
9788
9789 rc = bluetooth_switch_regulators(1);
9790
9791 if (rc < 0)
9792 goto fail_put;
9793
9794 bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power");
9795
9796 if (IS_ERR(bt_clock)) {
9797 pr_err("Couldn't get TCXO_D0 voter\n");
9798 goto fail_switch;
9799 }
9800
9801 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON);
9802
9803 if (rc < 0) {
9804 pr_err("Failed to vote for TCXO_DO ON\n");
9805 goto fail_vote;
9806 }
9807
9808 rc = bahama_bt(1);
9809
9810 if (rc < 0)
9811 goto fail_clock;
9812
9813 msleep(10);
9814
9815 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL);
9816
9817 if (rc < 0) {
9818 pr_err("Failed to vote for TCXO_DO pin control\n");
9819 goto fail_vote;
9820 }
9821 } else {
9822 /* check for initial RFKILL block (power off) */
9823 /* some RFKILL versions/configurations rfkill_register */
9824 /* calls here for an initial set_block */
9825 /* avoid calling i2c and regulator before unblock (on) */
9826 if (platform_get_drvdata(&msm_bt_power_device) == NULL) {
9827 dev_info(&msm_bt_power_device.dev,
9828 "%s: initialized OFF/blocked\n", __func__);
9829 goto out;
9830 }
9831
9832 bahama_bt(0);
9833
9834fail_clock:
9835 msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF);
9836fail_vote:
9837 msm_xo_put(bt_clock);
9838fail_switch:
9839 bluetooth_switch_regulators(0);
9840fail_put:
9841 bluetooth_use_regulators(0);
9842 }
9843
9844out:
9845 if (rc < 0)
9846 on = 0;
9847 dev_info(&msm_bt_power_device.dev,
9848 "Bluetooth power switch: state %d result %d\n", on, rc);
9849
9850 return rc;
9851}
9852
9853#endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/
9854
9855static void __init msm8x60_cfg_smsc911x(void)
9856{
9857 smsc911x_resources[1].start =
9858 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9859 smsc911x_resources[1].end =
9860 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9861}
9862
9863#ifdef CONFIG_MSM_RPM
9864static struct msm_rpm_platform_data msm_rpm_data = {
9865 .reg_base_addrs = {
9866 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
9867 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
9868 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
9869 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
9870 },
9871
9872 .irq_ack = RPM_SCSS_CPU0_GP_HIGH_IRQ,
9873 .irq_err = RPM_SCSS_CPU0_GP_LOW_IRQ,
9874 .irq_vmpm = RPM_SCSS_CPU0_GP_MEDIUM_IRQ,
9875 .msm_apps_ipc_rpm_reg = MSM_GCC_BASE + 0x008,
9876 .msm_apps_ipc_rpm_val = 4,
9877};
9878#endif
9879
Laura Abbott5d2d1e62011-08-10 16:27:35 -07009880void msm_fusion_setup_pinctrl(void)
9881{
9882 struct msm_xo_voter *a1;
9883
9884 if (socinfo_get_platform_subtype() == 0x3) {
9885 /*
9886 * Vote for the A1 clock to be in pin control mode before
9887 * the external images are loaded.
9888 */
9889 a1 = msm_xo_get(MSM_XO_TCXO_A1, "mdm");
9890 BUG_ON(!a1);
9891 msm_xo_mode_vote(a1, MSM_XO_MODE_PIN_CTRL);
9892 }
9893}
9894
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009895struct msm_board_data {
9896 struct msm_gpiomux_configs *gpiomux_cfgs;
9897};
9898
9899static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
9900 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9901};
9902
9903static struct msm_board_data msm8x60_sim_board_data __initdata = {
9904 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9905};
9906
9907static struct msm_board_data msm8x60_surf_board_data __initdata = {
9908 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9909};
9910
9911static struct msm_board_data msm8x60_ffa_board_data __initdata = {
9912 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9913};
9914
9915static struct msm_board_data msm8x60_fluid_board_data __initdata = {
9916 .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs,
9917};
9918
9919static struct msm_board_data msm8x60_charm_surf_board_data __initdata = {
9920 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9921};
9922
9923static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = {
9924 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9925};
9926
Zhang Chang Kenef05b172011-07-27 15:28:13 -04009927static struct msm_board_data msm8x60_dragon_board_data __initdata = {
9928 .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs,
9929};
9930
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009931static void __init msm8x60_init(struct msm_board_data *board_data)
9932{
9933 uint32_t soc_platform_version;
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05309934#ifdef CONFIG_USB_EHCI_MSM_72K
9935 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
9936 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
9937 .level = PM8901_MPP_DIG_LEVEL_L5,
9938 .control = PM8XXX_MPP_DOUT_CTRL_HIGH,
9939 };
9940#endif
Anirudh Ghayalc2019332011-11-12 06:29:10 +05309941 pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -07009942
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009943 /*
9944 * Initialize RPM first as other drivers and devices may need
9945 * it for their initialization.
9946 */
9947#ifdef CONFIG_MSM_RPM
9948 BUG_ON(msm_rpm_init(&msm_rpm_data));
9949#endif
9950 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
9951 ARRAY_SIZE(msm_rpmrs_levels)));
9952 if (msm_xo_init())
9953 pr_err("Failed to initialize XO votes\n");
9954
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009955 msm8x60_check_2d_hardware();
9956
9957 /* Change SPM handling of core 1 if PMM 8160 is present. */
9958 soc_platform_version = socinfo_get_platform_version();
9959 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 &&
9960 SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) {
9961 struct msm_spm_platform_data *spm_data;
9962
9963 spm_data = &msm_spm_data_v1[1];
9964 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9965 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9966
9967 spm_data = &msm_spm_data[1];
9968 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9969 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9970 }
9971
9972 /*
9973 * Initialize SPM before acpuclock as the latter calls into SPM
9974 * driver to set ACPU voltages.
9975 */
9976 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
9977 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
9978 else
9979 msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1));
9980
9981 /*
9982 * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF
9983 * devices so that the RPM doesn't drop into a low power mode that an
9984 * un-reworked SURF cannot resume from.
9985 */
9986 if (machine_is_msm8x60_surf()) {
David Collins6f032ba2011-08-31 14:08:15 -07009987 int i;
9988
9989 for (i = 0; i < ARRAY_SIZE(rpm_regulator_init_data); i++)
9990 if (rpm_regulator_init_data[i].id
9991 == RPM_VREG_ID_PM8901_L4
9992 || rpm_regulator_init_data[i].id
9993 == RPM_VREG_ID_PM8901_L6)
9994 rpm_regulator_init_data[i]
9995 .init_data.constraints.always_on = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009996 }
9997
9998 /*
9999 * Disable regulator info printing so that regulator registration
10000 * messages do not enter the kmsg log.
10001 */
10002 regulator_suppress_info_printing();
10003
10004 /* Initialize regulators needed for clock_init. */
10005 platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators));
10006
Stephen Boydbb600ae2011-08-02 20:11:40 -070010007 msm_clock_init(&msm8x60_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010008
10009 /* Buses need to be initialized before early-device registration
10010 * to get the platform data for fabrics.
10011 */
10012 msm8x60_init_buses();
10013 platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
10014 /* CPU frequency control is not supported on simulated targets. */
10015 if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim())
Matt Wagantallec57f062011-08-16 23:54:46 -070010016 acpuclk_init(&acpuclk_8x60_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010017
Terence Hampsonb36a38c2011-09-19 19:10:40 -040010018 /*
10019 * Enable EBI2 only for boards which make use of it. Leave
10020 * it disabled for all others for additional power savings.
10021 */
10022 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10023 machine_is_msm8x60_rumi3() ||
10024 machine_is_msm8x60_sim() ||
10025 machine_is_msm8x60_fluid() ||
10026 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010027 msm8x60_init_ebi2();
10028 msm8x60_init_tlmm();
10029 msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
10030 msm8x60_init_uart12dm();
10031 msm8x60_init_mmc();
10032
10033#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
10034 msm8x60_init_pm8058_othc();
10035#endif
10036
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010037 if (machine_is_msm8x60_fluid())
10038 pm8058_platform_data.keypad_pdata = &fluid_keypad_data;
10039 else if (machine_is_msm8x60_dragon())
10040 pm8058_platform_data.keypad_pdata = &dragon_keypad_data;
10041 else
10042 pm8058_platform_data.keypad_pdata = &ffa_keypad_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010043
Jilai Wang53d27a82011-07-13 14:32:58 -040010044 /* Specify reset pin for OV9726 */
10045 if (machine_is_msm8x60_dragon()) {
10046 msm_camera_sensor_ov9726_data.sensor_reset = 62;
10047 ov9726_sensor_8660_info.mount_angle = 270;
10048 }
10049
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010050#ifdef CONFIG_BATTERY_MSM8X60
10051 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10052 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
10053 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid())
10054 platform_device_register(&msm_charger_device);
10055#endif
10056
10057 if (machine_is_msm8x60_dragon())
10058 pm8058_platform_data.charger_pdata = &pmic8058_charger_dragon;
10059 if (!machine_is_msm8x60_fluid())
10060 pm8058_platform_data.charger_pdata = &pmic8058_charger_ffa_surf;
10061
10062 /* configure pmic leds */
10063 if (machine_is_msm8x60_fluid())
10064 pm8058_platform_data.leds_pdata = &pm8058_fluid_flash_leds_data;
10065 else if (machine_is_msm8x60_dragon())
10066 pm8058_platform_data.leds_pdata = &pm8058_dragon_leds_data;
10067 else
10068 pm8058_platform_data.leds_pdata = &pm8058_flash_leds_data;
10069
10070 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
10071 machine_is_msm8x60_dragon()) {
10072 pm8058_platform_data.vibrator_pdata = &pm8058_vib_pdata;
10073 }
10074
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010075 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10076 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010077 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010078 msm8x60_cfg_smsc911x();
10079 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10080 platform_add_devices(msm_footswitch_devices,
10081 msm_num_footswitch_devices);
10082 platform_add_devices(surf_devices,
10083 ARRAY_SIZE(surf_devices));
10084
10085#ifdef CONFIG_MSM_DSPS
10086 if (machine_is_msm8x60_fluid()) {
10087 platform_device_unregister(&msm_gsbi12_qup_i2c_device);
10088 msm8x60_init_dsps();
10089 }
10090#endif
10091
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010092 pm8901_vreg_mpp0_init();
10093
10094 platform_device_register(&msm8x60_8901_mpp_vreg);
10095
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010096#ifdef CONFIG_USB_EHCI_MSM_72K
10097 /*
10098 * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660
10099 * fluid
10100 */
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010101 if (machine_is_msm8x60_fluid())
10102 pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1), &hsusb_phy_mpp);
10103 msm_add_host(0, &msm_usb_host_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010104#endif
Lei Zhou338cab82011-08-19 13:38:17 -040010105
10106#ifdef CONFIG_SND_SOC_MSM8660_APQ
10107 if (machine_is_msm8x60_dragon())
10108 platform_add_devices(dragon_alsa_devices,
10109 ARRAY_SIZE(dragon_alsa_devices));
10110 else
10111#endif
10112 platform_add_devices(asoc_devices,
10113 ARRAY_SIZE(asoc_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010114 } else {
10115 msm8x60_configure_smc91x();
10116 platform_add_devices(rumi_sim_devices,
10117 ARRAY_SIZE(rumi_sim_devices));
10118 }
10119#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010120 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10121 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010122 msm8x60_cfg_isp1763();
10123#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010124
10125 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10126 platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices));
10127
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010128
10129#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
10130 if (machine_is_msm8x60_fluid())
10131 platform_device_register(&msm_gsbi10_qup_spi_device);
10132 else
10133 platform_device_register(&msm_gsbi1_qup_spi_device);
10134#endif
10135
10136#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
10137 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
10138 if (machine_is_msm8x60_fluid())
10139 cyttsp_set_params();
10140#endif
10141 if (!machine_is_msm8x60_sim())
10142 msm_fb_add_devices();
10143 fixup_i2c_configs();
10144 register_i2c_devices();
10145
Terence Hampson1c73fef2011-07-19 17:10:49 -040010146 if (machine_is_msm8x60_dragon())
10147 smsc911x_config.reset_gpio
10148 = GPIO_ETHERNET_RESET_N_DRAGON;
10149
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010150 platform_device_register(&smsc911x_device);
10151
10152#if (defined(CONFIG_SPI_QUP)) && \
10153 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010154 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) || \
10155 defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010156
10157 if (machine_is_msm8x60_fluid()) {
10158#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
10159 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
10160 spi_register_board_info(lcdc_samsung_spi_board_info,
10161 ARRAY_SIZE(lcdc_samsung_spi_board_info));
10162 } else
10163#endif
10164 {
10165#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
10166 spi_register_board_info(lcdc_auo_spi_board_info,
10167 ARRAY_SIZE(lcdc_auo_spi_board_info));
10168#endif
10169 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010170#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
10171 } else if (machine_is_msm8x60_dragon()) {
10172 spi_register_board_info(lcdc_nt35582_spi_board_info,
10173 ARRAY_SIZE(lcdc_nt35582_spi_board_info));
10174#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010175 }
10176#endif
10177
10178 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
10179 msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
10180 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
10181 msm_pm_data);
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -060010182 BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010183
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010184 pm8058_gpios_init();
10185
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010186#ifdef CONFIG_SENSORS_MSM_ADC
10187 if (machine_is_msm8x60_fluid()) {
10188 msm_adc_pdata.dev_names = msm_adc_fluid_device_names;
10189 msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names);
10190 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3)
10191 msm_adc_pdata.gpio_config = APROC_CONFIG;
10192 else
10193 msm_adc_pdata.gpio_config = MPROC_CONFIG;
10194 }
10195 msm_adc_pdata.target_hw = MSM_8x60;
10196#endif
10197#ifdef CONFIG_MSM8X60_AUDIO
10198 msm_snddev_init();
10199#endif
10200#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
10201 if (machine_is_msm8x60_fluid())
10202 platform_device_register(&fluid_leds_gpio);
10203 else
10204 platform_device_register(&gpio_leds);
10205#endif
10206
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010207 msm8x60_multi_sdio_init();
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010208
10209 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10210 msm_fusion_setup_pinctrl();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010211}
10212
10213static void __init msm8x60_rumi3_init(void)
10214{
10215 msm8x60_init(&msm8x60_rumi3_board_data);
10216}
10217
10218static void __init msm8x60_sim_init(void)
10219{
10220 msm8x60_init(&msm8x60_sim_board_data);
10221}
10222
10223static void __init msm8x60_surf_init(void)
10224{
10225 msm8x60_init(&msm8x60_surf_board_data);
10226}
10227
10228static void __init msm8x60_ffa_init(void)
10229{
10230 msm8x60_init(&msm8x60_ffa_board_data);
10231}
10232
10233static void __init msm8x60_fluid_init(void)
10234{
10235 msm8x60_init(&msm8x60_fluid_board_data);
10236}
10237
10238static void __init msm8x60_charm_surf_init(void)
10239{
10240 msm8x60_init(&msm8x60_charm_surf_board_data);
10241}
10242
10243static void __init msm8x60_charm_ffa_init(void)
10244{
10245 msm8x60_init(&msm8x60_charm_ffa_board_data);
10246}
10247
10248static void __init msm8x60_charm_init_early(void)
10249{
10250 msm8x60_allocate_memory_regions();
Steve Mucklea55df6e2010-01-07 12:43:24 -080010251}
10252
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010253static void __init msm8x60_dragon_init(void)
10254{
10255 msm8x60_init(&msm8x60_dragon_board_data);
10256}
10257
Steve Mucklea55df6e2010-01-07 12:43:24 -080010258MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
10259 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010260 .reserve = msm8x60_reserve,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010261 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010262 .init_machine = msm8x60_rumi3_init,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010263 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010264 .init_early = msm8x60_charm_init_early,
Steve Muckle49b76f72010-03-19 17:00:08 -070010265MACHINE_END
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010266
10267MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
10268 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010269 .reserve = msm8x60_reserve,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010270 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010271 .init_machine = msm8x60_sim_init,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010272 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010273 .init_early = msm8x60_charm_init_early,
10274MACHINE_END
10275
10276MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
10277 .map_io = msm8x60_map_io,
10278 .reserve = msm8x60_reserve,
10279 .init_irq = msm8x60_init_irq,
10280 .init_machine = msm8x60_surf_init,
10281 .timer = &msm_timer,
10282 .init_early = msm8x60_charm_init_early,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010283MACHINE_END
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010284
10285MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
10286 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010287 .reserve = msm8x60_reserve,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010288 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010289 .init_machine = msm8x60_ffa_init,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010290 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010291 .init_early = msm8x60_charm_init_early,
10292MACHINE_END
10293
10294MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID")
10295 .map_io = msm8x60_map_io,
10296 .reserve = msm8x60_reserve,
10297 .init_irq = msm8x60_init_irq,
10298 .init_machine = msm8x60_fluid_init,
10299 .timer = &msm_timer,
10300 .init_early = msm8x60_charm_init_early,
10301MACHINE_END
10302
10303MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF")
10304 .map_io = msm8x60_map_io,
10305 .reserve = msm8x60_reserve,
10306 .init_irq = msm8x60_init_irq,
10307 .init_machine = msm8x60_charm_surf_init,
10308 .timer = &msm_timer,
10309 .init_early = msm8x60_charm_init_early,
10310MACHINE_END
10311
10312MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA")
10313 .map_io = msm8x60_map_io,
10314 .reserve = msm8x60_reserve,
10315 .init_irq = msm8x60_init_irq,
10316 .init_machine = msm8x60_charm_ffa_init,
10317 .timer = &msm_timer,
10318 .init_early = msm8x60_charm_init_early,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010319MACHINE_END
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010320
10321MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON")
10322 .map_io = msm8x60_map_io,
10323 .reserve = msm8x60_reserve,
10324 .init_irq = msm8x60_init_irq,
10325 .init_machine = msm8x60_dragon_init,
10326 .timer = &msm_timer,
10327 .init_early = msm8x60_charm_init_early,
10328MACHINE_END