| Olof Johansson | c707ffc | 2005-09-20 13:45:41 +1000 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation |
| 3 | * Rewrite, cleanup: |
| 4 | * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | */ |
| 20 | |
| 21 | #ifndef _ASM_TCE_H |
| 22 | #define _ASM_TCE_H |
| 23 | |
| 24 | /* |
| 25 | * Tces come in two formats, one for the virtual bus and a different |
| 26 | * format for PCI |
| 27 | */ |
| 28 | #define TCE_VB 0 |
| 29 | #define TCE_PCI 1 |
| 30 | |
| 31 | /* tce_entry |
| 32 | * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's |
| 33 | * abstracted so layout is irrelevant. |
| 34 | */ |
| 35 | union tce_entry { |
| 36 | unsigned long te_word; |
| 37 | struct { |
| 38 | unsigned int tb_cacheBits :6; /* Cache hash bits - not used */ |
| 39 | unsigned int tb_rsvd :6; |
| 40 | unsigned long tb_rpn :40; /* Real page number */ |
| 41 | unsigned int tb_valid :1; /* Tce is valid (vb only) */ |
| 42 | unsigned int tb_allio :1; /* Tce is valid for all lps (vb only) */ |
| 43 | unsigned int tb_lpindex :8; /* LpIndex for user of TCE (vb only) */ |
| 44 | unsigned int tb_pciwr :1; /* Write allowed (pci only) */ |
| 45 | unsigned int tb_rdwr :1; /* Read allowed (pci), Write allowed (vb) */ |
| 46 | } te_bits; |
| 47 | #define te_cacheBits te_bits.tb_cacheBits |
| 48 | #define te_rpn te_bits.tb_rpn |
| 49 | #define te_valid te_bits.tb_valid |
| 50 | #define te_allio te_bits.tb_allio |
| 51 | #define te_lpindex te_bits.tb_lpindex |
| 52 | #define te_pciwr te_bits.tb_pciwr |
| 53 | #define te_rdwr te_bits.tb_rdwr |
| 54 | }; |
| 55 | |
| 56 | |
| 57 | #endif |